From 6f5a927b3dac50459e35fea7399874f144226a61 Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Sat, 11 Mar 2023 19:52:50 +0200 Subject: [PATCH] Add generated sourcde files --- .gitignore | 14 +- blit.h | 518 + blitfunc.cpp | 1516 + blitfunc.h | 44 + blittable.cpp | 77 + cpudefs.cpp | 469 + cpuemu_0.cpp | 64721 ++++++++++++++++++ cpuemu_11.cpp | 159840 +++++++++++++++++++++++++++++++++++++++++++ cpuemu_13.cpp | 161909 ++++++++++++++++++++++++++++++++++++++++++++ cpuemu_20.cpp | 41787 ++++++++++++ cpuemu_21.cpp | 45167 ++++++++++++ cpuemu_22.cpp | 42003 ++++++++++++ cpuemu_23.cpp | 45390 +++++++++++++ cpuemu_24.cpp | 42628 ++++++++++++ cpuemu_31.cpp | 43568 ++++++++++++ cpuemu_32.cpp | 43739 ++++++++++++ cpuemu_33.cpp | 41967 ++++++++++++ cpuemu_34.cpp | 45796 +++++++++++++ cpuemu_35.cpp | 49181 ++++++++++++++ cpuemu_40.cpp | 84624 +++++++++++++++++++++++ cpuemu_50.cpp | 61634 +++++++++++++++++ cpustbl.cpp | 73328 ++++++++++++++++++++ cputbl.h | 69295 +++++++++++++++++++ jit/compemu.cpp | 103734 ++++++++++++++++++++++++++++ jit/compstbl.cpp | 3758 + jit/comptbl.h | 2803 + linetoscr.cpp | 21120 ++++++ 27 files changed, 1250618 insertions(+), 12 deletions(-) create mode 100644 blit.h create mode 100644 blitfunc.cpp create mode 100644 blitfunc.h create mode 100644 blittable.cpp create mode 100644 cpudefs.cpp create mode 100644 cpuemu_0.cpp create mode 100644 cpuemu_11.cpp create mode 100644 cpuemu_13.cpp create mode 100644 cpuemu_20.cpp create mode 100644 cpuemu_21.cpp create mode 100644 cpuemu_22.cpp create mode 100644 cpuemu_23.cpp create mode 100644 cpuemu_24.cpp create mode 100644 cpuemu_31.cpp create mode 100644 cpuemu_32.cpp create mode 100644 cpuemu_33.cpp create mode 100644 cpuemu_34.cpp create mode 100644 cpuemu_35.cpp create mode 100644 cpuemu_40.cpp create mode 100644 cpuemu_50.cpp create mode 100644 cpustbl.cpp create mode 100644 cputbl.h create mode 100644 jit/compemu.cpp create mode 100644 jit/compstbl.cpp create mode 100644 jit/comptbl.h create mode 100644 linetoscr.cpp diff --git a/.gitignore b/.gitignore index bff4e7d8..ddf100eb 100644 --- a/.gitignore +++ b/.gitignore @@ -42,26 +42,16 @@ decompress *.htm *.orig *.rej -/blit.h -/blitfunc.cpp -/blitfunc.h -/blittable.cpp -/cpudefs.cpp -/cpuemu_*.cpp /cpuemu_*_test.cpp -/cpustbl.cpp /cpustbl_test.cpp -/cputbl.h /cputbl_test.h -/jit/compemu.cpp -/jit/compstbl.cpp -/jit/comptbl.h /cputest/data /cputest/cputest -/linetoscr.cpp *.iobj *.ipdb *.opendb +*.ilk +*.recipe packages packages.config *.sqlite diff --git a/blit.h b/blit.h new file mode 100644 index 00000000..eb620735 --- /dev/null +++ b/blit.h @@ -0,0 +1,518 @@ +STATIC_INLINE uae_u32 blit_func(uae_u32 srca, uae_u32 srcb, uae_u32 srcc, uae_u8 mt) +{ +switch(mt){ +case 0x0: + return 0; +case 0x1: + return ~(srca | srcb | srcc); +case 0x2: + return (srcc & ~(srca | srcb)); +case 0x3: + return ~(srca | srcb); +case 0x4: + return (srcb & ~(srca | srcc)); +case 0x5: + return ~(srca | srcc); +case 0x6: + return (~srca & (srcb ^ srcc)); +case 0x7: + return ~(srca | (srcb & srcc)); +case 0x8: + return (~srca & srcb & srcc); +case 0x9: + return ~(srca | (srcb ^ srcc)); +case 0xa: + return (~srca & srcc); +case 0xb: + return ~(srca | (srcb & ~srcc)); +case 0xc: + return (~srca & srcb); +case 0xd: + return ~(srca | (~srcb & srcc)); +case 0xe: + return (~srca & (srcb | srcc)); +case 0xf: + return ~srca; +case 0x10: + return (srca & ~(srcb | srcc)); +case 0x11: + return ~(srcb | srcc); +case 0x12: + return (~srcb & (srca ^ srcc)); +case 0x13: + return ~(srcb | (srca & srcc)); +case 0x14: + return (~srcc & (srca ^ srcb)); +case 0x15: + return ~(srcc | (srca & srcb)); +case 0x16: + return (srca ^ ((srca & srcb) | (srcb ^ srcc))); +case 0x17: + return ~(srca ^ ((srca ^ srcb) & (srca ^ srcc))); +case 0x18: + return ((srca ^ srcb) & (srca ^ srcc)); +case 0x19: + return (srcb ^ (~srcc | (srca & srcb))); +case 0x1a: + return (srca ^ (srcc | (srca & srcb))); +case 0x1b: + return (srca ^ (srcc | ~(srca ^ srcb))); +case 0x1c: + return (srca ^ (srcb | (srca & srcc))); +case 0x1d: + return (srca ^ (srcb | ~(srca ^ srcc))); +case 0x1e: + return (srca ^ (srcb | srcc)); +case 0x1f: + return ~(srca & (srcb | srcc)); +case 0x20: + return (srca & ~srcb & srcc); +case 0x21: + return ~(srcb | (srca ^ srcc)); +case 0x22: + return (~srcb & srcc); +case 0x23: + return ~(srcb | (srca & ~srcc)); +case 0x24: + return ((srca ^ srcb) & (srcb ^ srcc)); +case 0x25: + return (srca ^ (~srcc | (srca & srcb))); +case 0x26: + return (srcb ^ (srcc | (srca & srcb))); +case 0x27: + return ~(srca ^ (srcc & (srca ^ srcb))); +case 0x28: + return (srcc & (srca ^ srcb)); +case 0x29: + return ~(srca ^ srcb ^ (srcc | (srca & srcb))); +case 0x2a: + return (srcc & ~(srca & srcb)); +case 0x2b: + return ~(srca ^ ((srca ^ srcb) & (srcb ^ srcc))); +case 0x2c: + return (srcb ^ (srca & (srcb | srcc))); +case 0x2d: + return (srca ^ (srcb | ~srcc)); +case 0x2e: + return (srca ^ (srcb | (srca ^ srcc))); +case 0x2f: + return ~(srca & (srcb | ~srcc)); +case 0x30: + return (srca & ~srcb); +case 0x31: + return ~(srcb | (~srca & srcc)); +case 0x32: + return (~srcb & (srca | srcc)); +case 0x33: + return ~srcb; +case 0x34: + return (srcb ^ (srca | (srcb & srcc))); +case 0x35: + return (srcb ^ (srca | ~(srcb ^ srcc))); +case 0x36: + return (srcb ^ (srca | srcc)); +case 0x37: + return ~(srcb & (srca | srcc)); +case 0x38: + return (srca ^ (srcb & (srca | srcc))); +case 0x39: + return (srcb ^ (srca | ~srcc)); +case 0x3a: + return (srcb ^ (srca | (srcb ^ srcc))); +case 0x3b: + return ~(srcb & (srca | ~srcc)); +case 0x3c: + return (srca ^ srcb); +case 0x3d: + return (srca ^ (srcb | ~(srca | srcc))); +case 0x3e: + return (srca ^ (srcb | (srca ^ (srca | srcc)))); +case 0x3f: + return ~(srca & srcb); +case 0x40: + return (srca & srcb & ~srcc); +case 0x41: + return ~(srcc | (srca ^ srcb)); +case 0x42: + return ((srca ^ srcc) & (srcb ^ srcc)); +case 0x43: + return (srca ^ (~srcb | (srca & srcc))); +case 0x44: + return (srcb & ~srcc); +case 0x45: + return ~(srcc | (srca & ~srcb)); +case 0x46: + return (srcc ^ (srcb | (srca & srcc))); +case 0x47: + return ~(srca ^ (srcb & (srca ^ srcc))); +case 0x48: + return (srcb & (srca ^ srcc)); +case 0x49: + return ~(srca ^ srcc ^ (srcb | (srca & srcc))); +case 0x4a: + return (srcc ^ (srca & (srcb | srcc))); +case 0x4b: + return (srca ^ (~srcb | srcc)); +case 0x4c: + return (srcb & ~(srca & srcc)); +case 0x4d: + return (srca ^ ((srca ^ srcb) | ~(srca ^ srcc))); +case 0x4e: + return (srca ^ (srcc | (srca ^ srcb))); +case 0x4f: + return ~(srca & (~srcb | srcc)); +case 0x50: + return (srca & ~srcc); +case 0x51: + return ~(srcc | (~srca & srcb)); +case 0x52: + return (srcc ^ (srca | (srcb & srcc))); +case 0x53: + return ~(srcb ^ (srca & (srcb ^ srcc))); +case 0x54: + return (~srcc & (srca | srcb)); +case 0x55: + return ~srcc; +case 0x56: + return (srcc ^ (srca | srcb)); +case 0x57: + return ~(srcc & (srca | srcb)); +case 0x58: + return (srca ^ (srcc & (srca | srcb))); +case 0x59: + return (srcc ^ (srca | ~srcb)); +case 0x5a: + return (srca ^ srcc); +case 0x5b: + return (srca ^ (srcc | ~(srca | srcb))); +case 0x5c: + return (srcc ^ (srca | (srcb ^ srcc))); +case 0x5d: + return ~(srcc & (srca | ~srcb)); +case 0x5e: + return (srca ^ (srcc | (srca ^ (srca | srcb)))); +case 0x5f: + return ~(srca & srcc); +case 0x60: + return (srca & (srcb ^ srcc)); +case 0x61: + return ~(srcb ^ srcc ^ (srca | (srcb & srcc))); +case 0x62: + return (srcc ^ (srcb & (srca | srcc))); +case 0x63: + return (srcb ^ (~srca | srcc)); +case 0x64: + return (srcb ^ (srcc & (srca | srcb))); +case 0x65: + return (srcc ^ (~srca | srcb)); +case 0x66: + return (srcb ^ srcc); +case 0x67: + return (srcb ^ (srcc | ~(srca | srcb))); +case 0x68: + return ((srca & srcb) ^ (srcc & (srca | srcb))); +case 0x69: + return ~(srca ^ srcb ^ srcc); +case 0x6a: + return (srcc ^ (srca & srcb)); +case 0x6b: + return ~(srca ^ srcb ^ (srcc & (srca | srcb))); +case 0x6c: + return (srcb ^ (srca & srcc)); +case 0x6d: + return ~(srca ^ srcc ^ (srcb & (srca | srcc))); +case 0x6e: + return ((~srca & srcb) | (srcb ^ srcc)); +case 0x6f: + return (~srca | (srcb ^ srcc)); +case 0x70: + return (srca & ~(srcb & srcc)); +case 0x71: + return ~(srca ^ ((srca ^ srcb) | (srca ^ srcc))); +case 0x72: + return (srcb ^ (srcc | (srca ^ srcb))); +case 0x73: + return ~(srcb & (~srca | srcc)); +case 0x74: + return (srcc ^ (srcb | (srca ^ srcc))); +case 0x75: + return ~(srcc & (~srca | srcb)); +case 0x76: + return (srcb ^ (srcc | (srca ^ (srca & srcb)))); +case 0x77: + return ~(srcb & srcc); +case 0x78: + return (srca ^ (srcb & srcc)); +case 0x79: + return ~(srcb ^ srcc ^ (srca & (srcb | srcc))); +case 0x7a: + return ((srca & ~srcb) | (srca ^ srcc)); +case 0x7b: + return (~srcb | (srca ^ srcc)); +case 0x7c: + return ((srca ^ srcb) | (srca & ~srcc)); +case 0x7d: + return (~srcc | (srca ^ srcb)); +case 0x7e: + return ((srca ^ srcb) | (srca ^ srcc)); +case 0x7f: + return ~(srca & srcb & srcc); +case 0x80: + return (srca & srcb & srcc); +case 0x81: + return ~((srca ^ srcb) | (srca ^ srcc)); +case 0x82: + return (srcc & ~(srca ^ srcb)); +case 0x83: + return (srca ^ (~srcb | (srca & ~srcc))); +case 0x84: + return (srcb & ~(srca ^ srcc)); +case 0x85: + return (srca ^ (~srcc | (srca & ~srcb))); +case 0x86: + return (srcb ^ srcc ^ (srca & (srcb | srcc))); +case 0x87: + return ~(srca ^ (srcb & srcc)); +case 0x88: + return (srcb & srcc); +case 0x89: + return (srcb ^ (~srcc & (~srca | srcb))); +case 0x8a: + return (srcc & (~srca | srcb)); +case 0x8b: + return (srca ^ (~srcb | (srca ^ srcc))); +case 0x8c: + return (srcb & (~srca | srcc)); +case 0x8d: + return (srca ^ (~srcc | (srca ^ srcb))); +case 0x8e: + return (srca ^ ((srca ^ srcb) | (srca ^ srcc))); +case 0x8f: + return (~srca | (srcb & srcc)); +case 0x90: + return (srca & ~(srcb ^ srcc)); +case 0x91: + return (srcb ^ (~srcc | (~srca & srcb))); +case 0x92: + return (srca ^ srcc ^ (srcb & (srca | srcc))); +case 0x93: + return ~(srcb ^ (srca & srcc)); +case 0x94: + return (srca ^ srcb ^ (srcc & (srca | srcb))); +case 0x95: + return ~(srcc ^ (srca & srcb)); +case 0x96: + return (srca ^ srcb ^ srcc); +case 0x97: + return (srca ^ srcb ^ (srcc | ~(srca | srcb))); +case 0x98: + return (srcb ^ (~srcc & (srca | srcb))); +case 0x99: + return ~(srcb ^ srcc); +case 0x9a: + return (srcc ^ (srca & ~srcb)); +case 0x9b: + return ~(srcb ^ (srcc & (srca | srcb))); +case 0x9c: + return (srcb ^ (srca & ~srcc)); +case 0x9d: + return ~(srcc ^ (srcb & (srca | srcc))); +case 0x9e: + return (srcb ^ srcc ^ (srca | (srcb & srcc))); +case 0x9f: + return ~(srca & (srcb ^ srcc)); +case 0xa0: + return (srca & srcc); +case 0xa1: + return (srca ^ (~srcc & (srca | ~srcb))); +case 0xa2: + return (srcc & (srca | ~srcb)); +case 0xa3: + return (srcb ^ (~srca | (srcb ^ srcc))); +case 0xa4: + return (srca ^ (~srcc & (srca | srcb))); +case 0xa5: + return ~(srca ^ srcc); +case 0xa6: + return (srcc ^ (~srca & srcb)); +case 0xa7: + return ~(srca ^ (srcc & (srca | srcb))); +case 0xa8: + return (srcc & (srca | srcb)); +case 0xa9: + return ~(srcc ^ (srca | srcb)); +case 0xaa: + return srcc; +case 0xab: + return (srcc | ~(srca | srcb)); +case 0xac: + return (srcb ^ (srca & (srcb ^ srcc))); +case 0xad: + return ~(srcc ^ (srca | (srcb & srcc))); +case 0xae: + return (srcc | (~srca & srcb)); +case 0xaf: + return (~srca | srcc); +case 0xb0: + return (srca & (~srcb | srcc)); +case 0xb1: + return ~(srca ^ (srcc | (srca ^ srcb))); +case 0xb2: + return (srca ^ ((srca ^ srcc) & (srcb ^ srcc))); +case 0xb3: + return (~srcb | (srca & srcc)); +case 0xb4: + return (srca ^ (srcb & ~srcc)); +case 0xb5: + return ~(srcc ^ (srca & (srcb | srcc))); +case 0xb6: + return (srca ^ srcc ^ (srcb | (srca & srcc))); +case 0xb7: + return ~(srcb & (srca ^ srcc)); +case 0xb8: + return (srca ^ (srcb & (srca ^ srcc))); +case 0xb9: + return ~(srcc ^ (srcb | (srca & srcc))); +case 0xba: + return (srcc | (srca & ~srcb)); +case 0xbb: + return (~srcb | srcc); +case 0xbc: + return ((srca ^ srcb) | (srca & srcc)); +case 0xbd: + return ((srca ^ srcb) | ~(srca ^ srcc)); +case 0xbe: + return (srcc | (srca ^ srcb)); +case 0xbf: + return (srcc | ~(srca & srcb)); +case 0xc0: + return (srca & srcb); +case 0xc1: + return (srca ^ (~srcb & (srca | ~srcc))); +case 0xc2: + return (srca ^ (~srcb & (srca | srcc))); +case 0xc3: + return ~(srca ^ srcb); +case 0xc4: + return (srcb & (srca | ~srcc)); +case 0xc5: + return ~(srcb ^ (srca | (srcb ^ srcc))); +case 0xc6: + return (srcb ^ (~srca & srcc)); +case 0xc7: + return ~(srca ^ (srcb & (srca | srcc))); +case 0xc8: + return (srcb & (srca | srcc)); +case 0xc9: + return ~(srcb ^ (srca | srcc)); +case 0xca: + return (srcc ^ (srca & (srcb ^ srcc))); +case 0xcb: + return ~(srcb ^ (srca | (srcb & srcc))); +case 0xcc: + return srcb; +case 0xcd: + return (srcb | ~(srca | srcc)); +case 0xce: + return (srcb | (~srca & srcc)); +case 0xcf: + return (~srca | srcb); +case 0xd0: + return (srca & (srcb | ~srcc)); +case 0xd1: + return ~(srca ^ (srcb | (srca ^ srcc))); +case 0xd2: + return (srca ^ (~srcb & srcc)); +case 0xd3: + return ~(srcb ^ (srca & (srcb | srcc))); +case 0xd4: + return (srca ^ ((srca ^ srcb) & (srcb ^ srcc))); +case 0xd5: + return (~srcc | (srca & srcb)); +case 0xd6: + return (srca ^ srcb ^ (srcc | (srca & srcb))); +case 0xd7: + return ~(srcc & (srca ^ srcb)); +case 0xd8: + return (srca ^ (srcc & (srca ^ srcb))); +case 0xd9: + return ~(srcb ^ (srcc | (srca & srcb))); +case 0xda: + return ((srca & srcb) | (srca ^ srcc)); +case 0xdb: + return ~((srca ^ srcb) & (srcb ^ srcc)); +case 0xdc: + return (srcb | (srca & ~srcc)); +case 0xdd: + return (srcb | ~srcc); +case 0xde: + return (srcb | (srca ^ srcc)); +case 0xdf: + return (srcb | ~(srca & srcc)); +case 0xe0: + return (srca & (srcb | srcc)); +case 0xe1: + return ~(srca ^ (srcb | srcc)); +case 0xe2: + return (srcc ^ (srcb & (srca ^ srcc))); +case 0xe3: + return ~(srca ^ (srcb | (srca & srcc))); +case 0xe4: + return (srcb ^ (srcc & (srca ^ srcb))); +case 0xe5: + return ~(srca ^ (srcc | (srca & srcb))); +case 0xe6: + return ((srca & srcb) | (srcb ^ srcc)); +case 0xe7: + return ~((srca ^ srcb) & (srca ^ srcc)); +case 0xe8: + return (srca ^ ((srca ^ srcb) & (srca ^ srcc))); +case 0xe9: + return (srca ^ srcb ^ (~srcc | (srca & srcb))); +case 0xea: + return (srcc | (srca & srcb)); +case 0xeb: + return (srcc | ~(srca ^ srcb)); +case 0xec: + return (srcb | (srca & srcc)); +case 0xed: + return (srcb | ~(srca ^ srcc)); +case 0xee: + return (srcb | srcc); +case 0xef: + return (~srca | srcb | srcc); +case 0xf0: + return srca; +case 0xf1: + return (srca | ~(srcb | srcc)); +case 0xf2: + return (srca | (~srcb & srcc)); +case 0xf3: + return (srca | ~srcb); +case 0xf4: + return (srca | (srcb & ~srcc)); +case 0xf5: + return (srca | ~srcc); +case 0xf6: + return (srca | (srcb ^ srcc)); +case 0xf7: + return (srca | ~(srcb & srcc)); +case 0xf8: + return (srca | (srcb & srcc)); +case 0xf9: + return (srca | ~(srcb ^ srcc)); +case 0xfa: + return (srca | srcc); +case 0xfb: + return (srca | ~srcb | srcc); +case 0xfc: + return (srca | srcb); +case 0xfd: + return (srca | srcb | ~srcc); +case 0xfe: + return (srca | srcb | srcc); +case 0xff: + return 0xFFFFFFFF; +} +return 0; +} diff --git a/blitfunc.cpp b/blitfunc.cpp new file mode 100644 index 00000000..e444514d --- /dev/null +++ b/blitfunc.cpp @@ -0,0 +1,1516 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "custom.h" +#include "memory.h" +#include "blitter.h" +#include "blitfunc.h" + +void blitdofast_0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (0) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (ptd) ptd += b->bltdmod; +} + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (0) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (ptd) ptd -= b->bltdmod; +} + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((~srca & srcc)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((~srca & srcc)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_2a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc & ~(srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_2a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc & ~(srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_30 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca & ~srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_30 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca & ~srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_3a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcb ^ (srca | (srcb ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_3a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcb ^ (srca | (srcb ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_3c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca ^ srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_3c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca ^ srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_4a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srca & (srcb | srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_4a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srca & (srcb | srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_6a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_6a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_8a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc & (~srca | srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_8a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc & (~srca | srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_8c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcb & (~srca | srcc))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_8c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcb & (~srca | srcc))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_9a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srca & ~srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_9a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srca & ~srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_a8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc & (srca | srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_a8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc & (srca | srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_aa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (srcc) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_aa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (srcc) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_b1 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (~(srca ^ (srcc | (srca ^ srcb)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_b1 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (~(srca ^ (srcc | (srca ^ srcb)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_ca (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srca & (srcb ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_ca (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srca & (srcb ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_cc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (srcb) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (ptb) ptb += b->bltbmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_cc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (srcb) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (ptb) ptb -= b->bltbmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_d8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca ^ (srcc & (srca ^ srcb)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_d8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca ^ (srcc & (srca ^ srcb)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_e2 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srcb & (srca ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_e2 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc ^ (srcb & (srca ^ srcc)))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_ea (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc | (srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_ea (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srcc | (srca & srcb))) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_f0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (srca) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptd) ptd += b->bltdmod; +} + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_f0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = (srca) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptd) ptd -= b->bltdmod; +} + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_fa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc += 2; } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca | srcc)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptc) ptc += b->bltcmod; + if (ptd) ptd += b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_fa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcc = b->bltcdat; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptc) { srcc = chipmem_wget_indirect(ptc); ptc -= 2; } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca | srcc)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptc) ptc -= b->bltcmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltcdat = srcc; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_fc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +int i,j; +uae_u32 totald = 0; +uae_u32 srcb = b->bltbhold; +uae_u16 ashift = bltcon0 >> 12; +uae_u16 bshift = bltcon1 >> 12; +uae_u32 dstd=0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb += 2; + srcb = (((uae_u32)b->bltbold << 16) | bltbdat) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta += 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)b->bltaold << 16) | bltadat) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca | srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd += 2; } + } + if (pta) pta += b->bltamod; + if (ptb) ptb += b->bltbmod; + if (ptd) ptd += b->bltdmod; +} +b->bltbhold = srcb; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} +void blitdofast_desc_fc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) +{ +uae_u32 totald = 0; +int i,j; +uae_u32 srcb = b->bltbhold; +uae_u16 ashift = 16 - (bltcon0 >> 12); +uae_u16 bshift = 16 - (bltcon1 >> 12); +uae_u32 dstd = 0; +uaecptr dstp = 0; +for (j = 0; j < b->vblitsize; j++) { + for (i = 0; i < b->hblitsize; i++) { + uae_u32 bltadat, srca; + if (ptb) { + uae_u32 bltbdat = b->bltbdat = chipmem_wget_indirect(ptb); ptb -= 2; + srcb = ((bltbdat << 16) | b->bltbold) >> bshift; + b->bltbold = bltbdat; + } + if (pta) { bltadat = b->bltadat = chipmem_wget_indirect(pta); pta -= 2; } else { bltadat = b->bltadat; } + bltadat &= blit_masktable[i]; + srca = (((uae_u32)bltadat << 16) | b->bltaold) >> ashift; + b->bltaold = bltadat; + if (dstp) chipmem_wput_indirect(dstp, dstd); + dstd = ((srca | srcb)) & 0xFFFF; + totald |= dstd; + if (ptd) { dstp = ptd; ptd -= 2; } + } + if (pta) pta -= b->bltamod; + if (ptb) ptb -= b->bltbmod; + if (ptd) ptd -= b->bltdmod; +} +b->bltbhold = srcb; + if (dstp) chipmem_wput_indirect(dstp, dstd); +if (totald != 0) b->blitzero = 0; +} diff --git a/blitfunc.h b/blitfunc.h new file mode 100644 index 00000000..31df8e39 --- /dev/null +++ b/blitfunc.h @@ -0,0 +1,44 @@ +extern blitter_func blitdofast_0; +extern blitter_func blitdofast_desc_0; +extern blitter_func blitdofast_a; +extern blitter_func blitdofast_desc_a; +extern blitter_func blitdofast_2a; +extern blitter_func blitdofast_desc_2a; +extern blitter_func blitdofast_30; +extern blitter_func blitdofast_desc_30; +extern blitter_func blitdofast_3a; +extern blitter_func blitdofast_desc_3a; +extern blitter_func blitdofast_3c; +extern blitter_func blitdofast_desc_3c; +extern blitter_func blitdofast_4a; +extern blitter_func blitdofast_desc_4a; +extern blitter_func blitdofast_6a; +extern blitter_func blitdofast_desc_6a; +extern blitter_func blitdofast_8a; +extern blitter_func blitdofast_desc_8a; +extern blitter_func blitdofast_8c; +extern blitter_func blitdofast_desc_8c; +extern blitter_func blitdofast_9a; +extern blitter_func blitdofast_desc_9a; +extern blitter_func blitdofast_a8; +extern blitter_func blitdofast_desc_a8; +extern blitter_func blitdofast_aa; +extern blitter_func blitdofast_desc_aa; +extern blitter_func blitdofast_b1; +extern blitter_func blitdofast_desc_b1; +extern blitter_func blitdofast_ca; +extern blitter_func blitdofast_desc_ca; +extern blitter_func blitdofast_cc; +extern blitter_func blitdofast_desc_cc; +extern blitter_func blitdofast_d8; +extern blitter_func blitdofast_desc_d8; +extern blitter_func blitdofast_e2; +extern blitter_func blitdofast_desc_e2; +extern blitter_func blitdofast_ea; +extern blitter_func blitdofast_desc_ea; +extern blitter_func blitdofast_f0; +extern blitter_func blitdofast_desc_f0; +extern blitter_func blitdofast_fa; +extern blitter_func blitdofast_desc_fa; +extern blitter_func blitdofast_fc; +extern blitter_func blitdofast_desc_fc; diff --git a/blittable.cpp b/blittable.cpp new file mode 100644 index 00000000..5ffb09da --- /dev/null +++ b/blittable.cpp @@ -0,0 +1,77 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "custom.h" +#include "memory.h" +#include "blitter.h" +#include "blitfunc.h" + +blitter_func * const blitfunc_dofast[256] = { +blitdofast_0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_2a, 0, 0, 0, 0, 0, +blitdofast_30, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_3a, 0, blitdofast_3c, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_4a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_6a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_8a, 0, blitdofast_8c, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_9a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +blitdofast_a8, 0, blitdofast_aa, 0, 0, 0, 0, 0, +0, blitdofast_b1, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_ca, 0, blitdofast_cc, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +blitdofast_d8, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_e2, 0, 0, 0, 0, 0, +0, 0, blitdofast_ea, 0, 0, 0, 0, 0, +blitdofast_f0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_fa, 0, blitdofast_fc, 0, 0, 0 +}; + +blitter_func * const blitfunc_dofast_desc[256] = { +blitdofast_desc_0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_2a, 0, 0, 0, 0, 0, +blitdofast_desc_30, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_3a, 0, blitdofast_desc_3c, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_4a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_6a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_8a, 0, blitdofast_desc_8c, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_9a, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +blitdofast_desc_a8, 0, blitdofast_desc_aa, 0, 0, 0, 0, 0, +0, blitdofast_desc_b1, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_ca, 0, blitdofast_desc_cc, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, +blitdofast_desc_d8, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_e2, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_ea, 0, 0, 0, 0, 0, +blitdofast_desc_f0, 0, 0, 0, 0, 0, 0, 0, +0, 0, blitdofast_desc_fa, 0, blitdofast_desc_fc, 0, 0, 0 +}; diff --git a/cpudefs.cpp b/cpudefs.cpp new file mode 100644 index 00000000..5f61a945 --- /dev/null +++ b/cpudefs.cpp @@ -0,0 +1,469 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "readcpu.h" +struct instr_def defs68k[] = { +/* ORSR.B */ +{0x003C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x00,0x10,_T("ORSR.B #1"), 0, 0, 0, 0}, +/* ORSR.W */ +{0x007C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x04,0x10,_T("ORSR.W #1"), 0, 0, 0, 0}, +/* CHK2.z */ +{0x00C0, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xF9C0,2,5,0,{{1,1},{1,5},{1,0},{1,5},{1,0}},0x04,0x11,_T("CHK2.z #1,s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 0, 0, 0}, +/* OR.z */ +{0x0000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z #z,d[Dreg]"), 2, 0, 2, 3}, +/* OR.z */ +{0x0000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3}, +/* ANDSR.B */ +{0x023C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x00,0x10,_T("ANDSR.B #1"), 0, 0, 0, 0}, +/* ANDSR.W */ +{0x027C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x04,0x10,_T("ANDSR.W #1"), 0, 0, 0, 0}, +/* AND.z */ +{0x0200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z #z,d[Dreg]"), 2, 0, 2, 3}, +/* AND.z */ +{0x0200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3}, +/* SUB.z */ +{0x0400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z #z,d[Dreg]"), 2, 0, 2, 3}, +/* SUB.z */ +{0x0400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3}, +/* ADD.z */ +{0x0600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z #z,d[Dreg]"), 2, 0, 2, 3}, +/* ADD.z */ +{0x0600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3}, +/* CALLM */ +{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,3,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x00,0x10,_T("CALLM s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 0, 0, 0}, +/* RTM */ +{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,3,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x03,0x10,_T("RTM s[Dreg,Areg]"), 0, 0, 0, 0}, +/* BTST */ +{0x0800, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x11,_T("BTST #1,s[Dreg]"), 4, 0, 4, 0}, +/* BTST */ +{0x0800, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x11,_T("BTST #1,s[!Areg,Dreg,Immd]"), 0, 0, 4, 3}, +/* BCHG */ +{0x0840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCHG #1,s[Dreg]"), 6, 0, 6, 0}, +/* BCHG */ +{0x0840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCHG #1,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 3}, +/* BCLR */ +{0x0880, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCLR #1,s[Dreg]"), 6, 0, 6, 0}, +/* BCLR */ +{0x0880, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCLR #1,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 3}, +/* BSET */ +{0x08C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BSET #1,s[Dreg]"), 6, 0, 6, 0}, +/* BSET */ +{0x08C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BSET #1,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 3}, +/* EORSR.B */ +{0x0A3C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x00,0x10,_T("EORSR.B #1"), 0, 0, 0, 0}, +/* EORSR.W */ +{0x0A7C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x04,0x10,_T("EORSR.W #1"), 0, 0, 0, 0}, +/* EOR.z */ +{0x0A00, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("EOR.z #z,d[Dreg]"), 2, 0, 2, 3}, +/* EOR.z */ +{0x0A00, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("EOR.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3}, +/* CMP.z */ +{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z #z,s[Dreg]"), 2, 0, 2, 3}, +/* CMP.z */ +{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z #z,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 2, 3}, +/* CMP.z */ +{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z #z,s[PC8r,PC16]"), 0, 0, 2, 3}, +/* CAS.B */ +{0x0AC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("CAS.B #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* CAS.W */ +{0x0CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("CAS.W #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* CAS2.W */ +{0x0CFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,5,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x10,_T("CAS2.W #2"), 0, 0, 0, 0}, +/* MOVES.z */ +{0x0E00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,1,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x13,_T("MOVES.z #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* CAS.L */ +{0x0EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("CAS.L #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* CAS2.L */ +{0x0EFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,5,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x10,_T("CAS2.L #2"), 0, 0, 0, 0}, +/* MVPMR.W */ +{0x0100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MVPMR.W d[Areg-Ad16],Dr"), 0, 0, 0, 0}, +/* MVPMR.L */ +{0x0140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MVPMR.L d[Areg-Ad16],Dr"), 0, 0, 0, 0}, +/* MVPRM.W */ +{0x0180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MVPRM.W Dr,d[Areg-Ad16]"), 0, 0, 0, 0}, +/* MVPRM.L */ +{0x01C0, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MVPRM.L Dr,d[Areg-Ad16]"), 0, 0, 0, 0}, +/* BTST */ +{0x0100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x11,_T("BTST Dr,s[Dreg]"), 4, 0, 4, 0}, +/* BTST */ +{0x0100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x11,_T("BTST Dr,s[!Areg,Dreg]"), 0, 0, 4, 1}, +/* BCHG */ +{0x0140, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCHG Dr,s[Dreg]"), 6, 0, 6, 0}, +/* BCHG */ +{0x0140, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCHG Dr,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 1}, +/* BCLR */ +{0x0180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCLR Dr,s[Dreg]"), 6, 0, 6, 0}, +/* BCLR */ +{0x0180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCLR Dr,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 1}, +/* BSET */ +{0x01C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BSET Dr,s[Dreg]"), 6, 0, 6, 0}, +/* BSET */ +{0x01C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BSET Dr,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 1}, +/* MOVE.B */ +{0x1000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x12,_T("MOVE.B s,d[!Areg]"), 0, 0, 0, 0}, +/* MOVEA.W */ +{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVEA.W s,d[Areg]"), 0, 0, 0, 0}, +/* MOVE.W */ +{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x12,_T("MOVE.W s,d[!Areg]"), 0, 0, 0, 0}, +/* MOVEA.L */ +{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVEA.L s,d[Areg]"), 0, 0, 0, 0}, +/* MOVE.L */ +{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x12,_T("MOVE.L s,d[!Areg]"), 0, 0, 0, 0}, +/* NEGX.z */ +{0x4000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x30,_T("NEGX.z d[Dreg]"), 2, 0, 2, 0}, +/* NEGX.z */ +{0x4000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x30,_T("NEGX.z d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* MVSR2.W */ +{0x40C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,1,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x04,0x10,_T("MVSR2.W d[Dreg]"), 2, 0, 4, 0}, +/* MVSR2.W */ +{0x40C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,1,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x04,0x10,_T("MVSR2.W d[!Areg,Dreg]"), 2, 0, 4, 2}, +/* CLR.z */ +{0x4200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,2},{1,3},{1,2},{1,2}},0x00,0x20,_T("CLR.z d[Dreg]"), 2, 0, 2, 0}, +/* CLR.z */ +{0x4200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,2},{1,3},{1,2},{1,2}},0x00,0x20,_T("CLR.z d[!Areg,Dreg]"), 0, 1, 3, 2}, +/* MVSR2.B */ +{0x42C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,1,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x00,0x10,_T("MVSR2.B d[Dreg]"), 2, 0, 4, 0}, +/* MVSR2.B */ +{0x42C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,1,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x00,0x10,_T("MVSR2.B d[!Areg,Dreg]"), 2, 0, 4, 2}, +/* NEG.z */ +{0x4400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x30,_T("NEG.z d[Dreg]"), 2, 0, 2, 0}, +/* NEG.z */ +{0x4400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x30,_T("NEG.z d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* MV2SR.B */ +{0x44C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x10,_T("MV2SR.B s[Dreg]"), 4, 0, 4, 0}, +/* MV2SR.B */ +{0x44C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x10,_T("MV2SR.B s[!Areg,Dreg]"), 0, 0, 4, 1}, +/* NOT.z */ +{0x4600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("NOT.z d[Dreg]"), 2, 0, 2, 0}, +/* NOT.z */ +{0x4600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("NOT.z d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* MV2SR.W */ +{0x46C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x04,0x10,_T("MV2SR.W s[!Areg]"), 0, 0, 8, 1}, +/* LINK.L */ +{0x4808, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x31,_T("LINK.L Ar,#2"), 2, 0, 6, 0}, +/* NBCD.B */ +{0x4800, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x30,_T("NBCD.B d[!Areg]"), 0, 0, 6, 0}, +/* BKPT */ +{0x4848, 3,{ 9, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("BKPT #k"), 0, 0, 0, 0}, +/* SWAP.W */ +{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("SWAP.W s[Dreg]"), 4, 0, 4, 0}, +/* PEA.L */ +{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x00,_T("PEA.L s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 2, 4, 2}, +/* EXT.W */ +{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("EXT.W d[Dreg]"), 4, 0, 4, 0}, +/* MVMLE.W */ +{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x02,_T("MVMLE.W #1,d[!Dreg,Areg,Aipi]"), 0, 0, 0, 0}, +/* EXT.L */ +{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("EXT.L d[Dreg]"), 4, 0, 4, 0}, +/* MVMLE.L */ +{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x02,_T("MVMLE.L #1,d[!Dreg,Areg,Aipi]"), 0, 0, 0, 0}, +/* EXT.B */ +{0x49C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("EXT.B d[Dreg]"), 4, 0, 4, 0}, +/* TST.z */ +{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x10,_T("TST.z s[Dreg]"), 0, 0, 2, 0}, +/* TST.z */ +{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x10,_T("TST.z s[!Areg,Dreg,PC16,PC8r,Immd]"), 0, 0, 2, 1}, +/* TST.z */ +{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x10,_T("TST.z s[Areg,PC16,PC8r,Immd]"), 0, 0, 2, 1}, +/* TAS.B */ +{0x4AC0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("TAS.B d[Dreg]"), 0, 0, 2, 0}, +/* TAS.B */ +{0x4AC0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("TAS.B d[!Areg,Dreg]"), 0, 0, 2, 1}, +/* ILLEGAL */ +{0x4AFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("ILLEGAL"), 0, 0, 0, 0}, +/* MULL.L */ +{0x4C00, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("MULL.L #1,s[!Areg]"), 2, 0,30, 3}, +/* DIVL.L */ +{0x4C40, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVL.L #1,s[!Areg]"), 0, 0,50, 3}, +/* MVMEL.W */ +{0x4C80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x01,_T("MVMEL.W #1,s[!Dreg,Areg,Apdi,Immd]"), 0, 0, 0, 0}, +/* MVMEL.L */ +{0x4CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x01,_T("MVMEL.L #1,s[!Dreg,Areg,Apdi,Immd]"), 0, 0, 0, 0}, +/* TRAP */ +{0x4E40, 4,{ 8, 8, 8, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF0,0,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x00,0x10,_T("TRAP #J"), 0, 0, 0, 0}, +/* LINK.W */ +{0x4E50, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x31,_T("LINK.W Ar,#1"), 0, 0, 4, 0}, +/* UNLK.L */ +{0x4E58, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x30,_T("UNLK.L Ar"), 0, 0, 5, 0}, +/* MVR2USP.L */ +{0x4E60, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("MVR2USP.L Ar"), 4, 0, 4, 0}, +/* MVUSP2R.L */ +{0x4E68, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x20,_T("MVUSP2R.L Ar"), 4, 0, 4, 0}, +/* RESET */ +{0x4E70, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("RESET"), 0, 0,518, 0}, +/* NOP */ +{0x4E71, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x00,_T("NOP"), 0, 0, 2, 0}, +/* STOP */ +{0x4E72, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x04,0x10,_T("STOP #1"), 0, 0, 8, 0}, +/* RTE */ +{0x4E73, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x07,0x00,_T("RTE"), 1, 9,18, 0}, +/* RTD */ +{0x4E74, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x03,0x10,_T("RTD #1"), 2, 0,10, 0}, +/* RTS */ +{0x4E75, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x03,0x00,_T("RTS"), 1, 0, 9, 0}, +/* TRAPV */ +{0x4E76, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x04,0x00,_T("TRAPV"), 0, 0, 0, 0}, +/* RTR */ +{0x4E77, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x03,0x00,_T("RTR"), 1, 0,12, 0}, +/* MOVEC2 */ +{0x4E7A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("MOVEC2 #1"), 6, 0, 6, 0}, +/* MOVE2C */ +{0x4E7B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("MOVE2C #1"), 6, 0, 6, 0}, +/* JSR.L */ +{0x4E80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x02,0x80,_T("JSR.L s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 0, 4, 5}, +/* CHK.L */ +{0x4100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,0},{1,5},{1,5},{1,5}},0x04,0x11,_T("CHK.L s[!Areg],Dr"), 0, 0, 0, 0}, +/* CHK.W */ +{0x4180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,5},{1,5},{1,5}},0x04,0x11,_T("CHK.W s[!Areg],Dr"), 0, 0, 0, 0}, +/* JMP.L */ +{0x4EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x02,0x80,_T("JMP.L s[!Dreg,Areg,Aipi,Apdi,Immd]"), 4, 0, 4, 5}, +/* LEA.L */ +{0x41C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x02,_T("LEA.L s[!Dreg,Areg,Aipi,Apdi,Immd],Ar"), 2, 0, 2, 2}, +/* ADDA.W */ +{0x5040, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.W #j,d[Areg]"), 2, 0, 2, 0}, +/* ADDA.L */ +{0x5080, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.L #j,d[Areg]"), 2, 0, 2, 0}, +/* ADD.z */ +{0x5000,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z #j,d[Dreg]"), 2, 0, 2, 0}, +/* ADD.z */ +{0x5000,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z #j,d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* SUBA.W */ +{0x5140, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.W #j,d[Areg]"), 2, 0, 2, 0}, +/* SUBA.L */ +{0x5180, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.L #j,d[Areg]"), 2, 0, 2, 0}, +/* SUB.z */ +{0x5100,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z #j,d[Dreg]"), 2, 0, 2, 0}, +/* SUB.z */ +{0x5100,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z #j,d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* DBcc.W */ +{0x50C8, 7,{ 2, 2, 2, 2,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0F8,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x01,0x31,_T("DBcc.W Dr,#1"),-1, 0, 0, 0}, +/* Scc.B */ +{0x50C0,10,{ 2, 2, 2, 2,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0},0xF0C0,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x00,0x20,_T("Scc.B d[Dreg]"), 0, 0, 2, 0}, +/* Scc.B */ +{0x50C0,10,{ 2, 2, 2, 2,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0},0xF0C0,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x00,0x20,_T("Scc.B d[!Areg,Dreg]"), 0, 0, 2, 2}, +/* TRAPcc */ +{0x50FA, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}},0x04,0x10,_T("TRAPcc #1"), 0, 0, 0, 0}, +/* TRAPcc */ +{0x50FB, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}},0x04,0x10,_T("TRAPcc #2"), 0, 0, 0, 0}, +/* TRAPcc */ +{0x50FC, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}},0x04,0x00,_T("TRAPcc"), 0, 0, 0, 0}, +/* BSR.W */ +{0x6100, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x01,0x40,_T("BSR.W #1"), 2, 0, 6, 0}, +/* BSR.B */ +{0x6100, 8,{ 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x01,0x40,_T("BSR.B #i"), 2, 0, 6, 0}, +/* BSR.L */ +{0x61FF, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x01,0x40,_T("BSR.L #2"), 2, 0, 6, 0}, +/* Bcc.W */ +{0x6000, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x01,0x40,_T("Bcc.W #1"),-1, 0, 0, 0}, +/* Bcc.B */ +{0x6000,12,{ 3, 3, 3, 3, 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x01,0x40,_T("Bcc.B #i"),-1, 0, 0, 0}, +/* Bcc.L */ +{0x60FF, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x01,0x40,_T("Bcc.L #2"),-1, 0, 0, 0}, +/* MOVE.L */ +{0x7000,11,{15,15,15, 5, 5, 5, 5, 5, 5, 5, 5, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x12,_T("MOVE.L #i,Dr"), 0, 0, 0, 0}, +/* OR.z */ +{0x8000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z s[Dreg],Dr"), 2, 0, 2, 0}, +/* OR.z */ +{0x8000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1}, +/* DIVU.W */ +{0x80C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVU.W s[Dreg],Dr"), 2, 0,20, 0}, +/* DIVU.W */ +{0x80C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVU.W s[!Areg,Dreg],Dr"), 0, 0,20, 1}, +/* SBCD.B */ +{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x13,_T("SBCD.B d[Dreg],Dr"), 0, 0, 4, 0}, +/* SBCD.B */ +{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x13,_T("SBCD.B d[Areg-Apdi],Arp"), 2, 1,13, 0}, +/* OR.z */ +{0x8100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* PACK */ +{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("PACK d[Dreg],Dr"), 6, 0, 6, 0}, +/* PACK */ +{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("PACK d[Areg-Apdi],Arp"), 2, 1,11, 0}, +/* UNPK */ +{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("UNPK d[Dreg],Dr"), 8, 0, 8, 0}, +/* UNPK */ +{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("UNPK d[Areg-Apdi],Arp"), 2, 1,11, 0}, +/* DIVS.W */ +{0x81C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVS.W s[Dreg],Dr"), 2, 0,20, 0}, +/* DIVS.W */ +{0x81C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVS.W s[!Areg,Dreg],Dr"), 0, 0,20, 1}, +/* SUB.z */ +{0x9000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z s[Areg,Dreg],Dr"), 2, 0, 2, 0}, +/* SUB.z */ +{0x9000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1}, +/* SUBA.W */ +{0x90C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.W s[Areg,Dreg],Ar"), 4, 0, 4, 0}, +/* SUBA.W */ +{0x90C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.W s[!Areg,Dreg],Ar"), 0, 0, 4, 1}, +/* SUBX.z */ +{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x13,_T("SUBX.z d[Dreg],Dr"), 2, 0, 2, 0}, +/* SUBX.z */ +{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x13,_T("SUBX.z d[Areg-Apdi],Arp"), 2, 1, 9, 0}, +/* SUB.z */ +{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* SUBA.L */ +{0x91C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.L s[Areg,Dreg],Ar"), 2, 0, 2, 0}, +/* SUBA.L */ +{0x91C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.L s[!Areg,Dreg],Ar"), 0, 0, 2, 1}, +/* CMP.z */ +{0xB000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z s[Areg,Dreg],Dr"), 2, 0, 2, 0}, +/* CMP.z */ +{0xB000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1}, +/* CMPA.W */ +{0xB0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPA.W s[Areg,Dreg],Ar"), 4, 0, 4, 0}, +/* CMPA.W */ +{0xB0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPA.W s[!Areg,Dreg],Ar"), 0, 0, 4, 1}, +/* CMPA.L */ +{0xB1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPA.L s[Areg,Dreg],Ar"), 4, 0, 4, 0}, +/* CMPA.L */ +{0xB1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPA.L s[!Areg,Dreg],Ar"), 0, 0, 4, 1}, +/* CMPM.z */ +{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPM.z d[Areg-Aipi],ArP"), 0, 0, 8, 0}, +/* EOR.z */ +{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("EOR.z Dr,d[Dreg]"), 2, 0, 2, 0}, +/* EOR.z */ +{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("EOR.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* AND.z */ +{0xC000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z s[Dreg],Dr"), 2, 0, 2, 1}, +/* AND.z */ +{0xC000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z s[!Areg,Dreg],Dr"), 0, 1, 3, 1}, +/* MULU.W */ +{0xC0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("MULU.W s[!Areg],Dr"), 2, 0,12, 1}, +/* ABCD.B */ +{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x13,_T("ABCD.B d[Dreg],Dr"), 0, 0, 4, 0}, +/* ABCD.B */ +{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x13,_T("ABCD.B d[Areg-Apdi],Arp"), 2, 1,13, 0}, +/* AND.z */ +{0xC100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* EXG.L */ +{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x33,_T("EXG.L Dr,d[Dreg]"), 4, 0, 4, 0}, +/* EXG.L */ +{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x33,_T("EXG.L Ar,d[Areg]"), 4, 0, 4, 0}, +/* EXG.L */ +{0xC180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x33,_T("EXG.L Dr,d[Areg]"), 4, 0, 4, 0}, +/* MULS.W */ +{0xC1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("MULS.W s[!Areg],Dr"), 2, 0,12, 1}, +/* ADD.z */ +{0xD000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z s[Areg,Dreg],Dr"), 2, 0, 2, 0}, +/* ADD.z */ +{0xD000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1}, +/* ADDA.W */ +{0xD0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.W s[Areg,Dreg],Ar"), 0, 0, 4, 0}, +/* ADDA.W */ +{0xD0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.W s[!Areg,Dreg],Ar"), 4, 0, 4, 1}, +/* ADDX.z */ +{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x13,_T("ADDX.z d[Dreg],Dr"), 2, 0, 2, 0}, +/* ADDX.z */ +{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x13,_T("ADDX.z d[Areg-Apdi],Arp"), 2, 1, 9, 0}, +/* ADD.z */ +{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1}, +/* ADDA.L */ +{0xD1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.L s[Areg,Dreg],Ar"), 2, 0, 2, 0}, +/* ADDA.L */ +{0xD1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.L s[!Areg,Dreg],Ar"), 0, 0, 2, 1}, +/* ASf.z */ +{0xE000, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ASf.z #j,DR"), 2, 0, 6, 0}, +/* LSf.z */ +{0xE008, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("LSf.z #j,DR"), 4, 0, 4, 0}, +/* ROXf.z */ +{0xE010, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROXf.z #j,DR"),10, 0,12, 0}, +/* ROf.z */ +{0xE018, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROf.z #j,DR"), 4, 0, 6, 0}, +/* ASf.z */ +{0xE020, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ASf.z Dr,DR"), 4, 0, 6, 0}, +/* LSf.z */ +{0xE028, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("LSf.z Dr,DR"), 6, 0, 6, 0}, +/* ROXf.z */ +{0xE030, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROXf.z Dr,DR"),10, 0,12, 0}, +/* ROf.z */ +{0xE038, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROf.z Dr,DR"), 6, 0, 8, 0}, +/* ASfW.W */ +{0xE0C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ASfW.W d[!Dreg,Areg]"), 0, 0, 4, 1}, +/* LSfW.W */ +{0xE2C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("LSfW.W d[!Dreg,Areg]"), 0, 0, 4, 1}, +/* ROXfW.W */ +{0xE4C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROXfW.W d[!Dreg,Areg]"), 0, 0, 4, 1}, +/* ROfW.W */ +{0xE6C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROfW.W d[!Dreg,Areg]"), 0, 0, 6, 1}, +/* BFTST */ +{0xE8C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x11,_T("BFTST #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0}, +/* BFEXTU */ +{0xE9C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x11,_T("BFEXTU #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0}, +/* BFCHG */ +{0xEAC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("BFCHG #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* BFEXTS */ +{0xEBC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x11,_T("BFEXTS #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0}, +/* BFCLR */ +{0xECC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("BFCLR #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* BFFFO */ +{0xEDC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x11,_T("BFFFO #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0}, +/* BFSET */ +{0xEEC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("BFSET #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* BFINS */ +{0xEFC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* FPP */ +{0xF200, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x11,_T("FPP #1,s"), 0, 0, 0, 0}, +/* FDBcc */ +{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x01,0x11,_T("FDBcc #1,s[Areg-Dreg]"), 0, 0, 0, 0}, +/* FScc */ +{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x11,_T("FScc #1,s[!Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* FTRAPcc */ +{0xF27A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("FTRAPcc #1"), 0, 0, 0, 0}, +/* FTRAPcc */ +{0xF27B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("FTRAPcc #2"), 0, 0, 0, 0}, +/* FTRAPcc */ +{0xF27C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("FTRAPcc"), 0, 0, 0, 0}, +/* FBcc */ +{0xF280, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x01,0x11,_T("FBcc #K,#1"), 0, 0, 0, 0}, +/* FBcc */ +{0xF2C0, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x01,0x11,_T("FBcc #K,#2"), 0, 0, 0, 0}, +/* FSAVE */ +{0xF300, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x20,_T("FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0}, +/* FRESTORE */ +{0xF340, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x10,_T("FRESTORE s[!Dreg,Areg,Apdi,Immd]"), 0, 0, 0, 0}, +/* MMUOP030 */ +{0xF000, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x11,_T("MMUOP030 s[Dreg,Areg,Apdi,Aipi,Aind,Ad16,Ad8r,absl,absw],#1"), 0, 0, 0, 0}, +/* CINVL */ +{0xF408, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x02,_T("CINVL #p,Ar"), 0, 0, 0, 0}, +/* CINVP */ +{0xF410, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x02,_T("CINVP #p,Ar"), 0, 0, 0, 0}, +/* CINVA */ +{0xF418, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("CINVA #p"), 0, 0, 0, 0}, +/* CPUSHL */ +{0xF428, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x02,_T("CPUSHL #p,Ar"), 0, 0, 0, 0}, +/* CPUSHP */ +{0xF430, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x02,_T("CPUSHP #p,Ar"), 0, 0, 0, 0}, +/* CPUSHA */ +{0xF438, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("CPUSHA #p"), 0, 0, 0, 0}, +/* PFLUSHN */ +{0xF500, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PFLUSHN Ara"), 0, 0, 0, 0}, +/* PFLUSH */ +{0xF508, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PFLUSH Ara"), 0, 0, 0, 0}, +/* PFLUSHAN */ +{0xF510, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PFLUSHAN Ara"), 0, 0, 0, 0}, +/* PFLUSHA */ +{0xF518, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PFLUSHA Ara"), 0, 0, 0, 0}, +/* PTESTW */ +{0xF548, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PTESTW Ara"), 0, 0, 0, 0}, +/* PTESTR */ +{0xF568, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PTESTR Ara"), 0, 0, 0, 0}, +/* MOVE16 */ +{0xF620, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 ArP,AxP"), 0, 0, 0, 0}, +/* MOVE16 */ +{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 s[Dreg-Aipi],Al"), 0, 0, 0, 0}, +/* MOVE16 */ +{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 Al,d[Areg-Aipi]"), 0, 0, 0, 0}, +/* MOVE16 */ +{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 s[Aind],Al"), 0, 0, 0, 0}, +/* MOVE16 */ +{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 Al,d[Aipi-Aind]"), 0, 0, 0, 0}, +/* LPSTOP */ +{0xF800, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,5,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x04,0x10,_T("LPSTOP #1"), 0, 0, 0, 0}, +/* PLPAW */ +{0xF588, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,5,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PLPAW Ara"), 0, 0, 0, 0}, +/* PLPAR */ +{0xF5C8, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,5,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PLPAR Ara"), 0, 0, 0, 0}, +/* HALT */ +{0x4AC8, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,5,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x00,_T("HALT"), 0, 0, 0, 0}, +/* PULSE */ +{0x4ACC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,5,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x00,_T("PULSE"), 0, 0, 0, 0}}; +int n_defs68k = 232; diff --git a/cpuemu_0.cpp b/cpuemu_0.cpp new file mode 100644 index 00000000..663012a1 --- /dev/null +++ b/cpuemu_0.cpp @@ -0,0 +1,64721 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(10); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte(dsta); + upper = (uae_s32)(uae_s8)get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte(dsta); + upper = (uae_s32)(uae_s8)get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte(dsta); + upper = (uae_s32)(uae_s8)get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte(dsta); + upper = (uae_s32)(uae_s8)get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte(dsta); + upper = (uae_s32)(uae_s8)get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte(dsta); + upper = (uae_s32)(uae_s8)get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte(dsta); + upper = (uae_s32)(uae_s8)get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u16 val = (get_byte(mempa) & 0xff) << 8; + val |= (get_byte(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpc() + 2; + dsta += (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = get_dibyte(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u32 val = (get_byte(mempa) & 0xff) << 24; + val |= (get_byte(mempa + 2) & 0xff) << 16; + val |= (get_byte(mempa + 4) & 0xff) << 8; + val |= (get_byte(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 8); + put_byte(mempa + 2, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 24); + put_byte(mempa + 2, src >> 16); + put_byte(mempa + 4, src >> 8); + put_byte(mempa + 6, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(10); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word(dsta); + upper = (uae_s32)(uae_s16)get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word(dsta); + upper = (uae_s32)(uae_s16)get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word(dsta); + upper = (uae_s32)(uae_s16)get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word(dsta); + upper = (uae_s32)(uae_s16)get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word(dsta); + upper = (uae_s32)(uae_s16)get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word(dsta); + upper = (uae_s32)(uae_s16)get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word(dsta); + upper = (uae_s32)(uae_s16)get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(10); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long(dsta); upper = get_long(dsta + 4); + m68k_incpc(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long(dsta); upper = get_long(dsta + 4); + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long(dsta); upper = get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long(dsta); upper = get_long(dsta + 4); + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long(dsta); upper = get_long(dsta + 4); + m68k_incpc(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long(dsta); upper = get_long(dsta + 4); + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long(dsta); upper = get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(10); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + op_illg(opcode); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + op_illg(opcode); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + op_illg(opcode); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + op_illg(opcode); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(8); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(10); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(8); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(10); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_getpc() + 6; + dsta += (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cbb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpc(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpc(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(8); + op_unimpl (opcode); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(8); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 16 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(8); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(8); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(8); + } + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpc(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpc(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(8); + op_unimpl (opcode); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(8); + return (40 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 16 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_dilong(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(10); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + m68k_areg(regs, dstreg) = (src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + m68k_areg(regs, dstreg) = (src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_dilong(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(10); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(10); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_dilong(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(10); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(srca, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(srca, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(srca, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(srca, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(srca, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(srca, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(srca, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(srca, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(srca, newv); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(srca, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(srca, newv); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(srca, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(srca, newv); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + put_word(srca, regs.sr); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + put_word(srca, regs.sr); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + put_word(srca, regs.sr); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + put_word(srca, regs.sr); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + put_word(srca, regs.sr); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + put_word(srca, regs.sr); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + put_word(srca, regs.sr); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + m68k_areg(regs, dstreg) = (srca); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + m68k_areg(regs, dstreg) = (srca); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + put_word(srca, regs.sr & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + put_word(srca, regs.sr & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + put_word(srca, regs.sr & 0xff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + put_word(srca, regs.sr & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + put_word(srca, regs.sr & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + put_word(srca, regs.sr & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + put_word(srca, regs.sr & 0xff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(srca, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(srca, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(srca, dst); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(srca, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(srca, dst); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(srca, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(srca, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(srca, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(srca, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(srca, dst); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(srca, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(srca, dst); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(srca, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(srca, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(srca, dst); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(srca, dst); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(srca, dst); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(srca, dst); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(srca, dst); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(srca, dst); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(srca, dst); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte(srca, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte(srca, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte(srca, dst); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte(srca, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte(srca, dst); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte(srca, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte(srca, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word(srca, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word(srca, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word(srca, dst); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word(srca, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word(srca, dst); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word(srca, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word(srca, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long(srca, dst); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long(srca, dst); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long(srca, dst); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long(srca, dst); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long(srca, dst); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long(srca, dst); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long(srca, dst); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 offs; + offs = get_dilong(2); + put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte(srca, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte(srca, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte(srca, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long(dsta, srca); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long(dsta, srca); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long(dsta, srca); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long(dsta, srca); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long(dsta, srca); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long(dsta, srca); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long(dsta, srca); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + put_word(srca, m68k_areg(regs, movem_index2[amask])); + } else { + put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + put_long(srca, m68k_areg(regs, movem_index2[amask])); + } else { + put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_49c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_dibyte(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a48_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a88_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4aba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* HALT.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4ac8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + cpu_halt(CPU_HALT_68060_HALT); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* PULSE.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4acc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c10_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c18_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + mmufixup[0].reg = -1; + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c20_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + mmufixup[0].reg = -1; + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c28_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + m68k_incpc(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c30_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c38_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + m68k_incpc(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c39_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long(dsta); + m68k_incpc(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + m68k_incpc(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uae_s32 dst; + dst = get_dilong(4); + m68k_incpc(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c40_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c50_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c58_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + mmufixup[0].reg = -1; + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c60_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + mmufixup[0].reg = -1; + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c68_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + m68k_incpc(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c70_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c78_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + m68k_incpc(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c79_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long(dsta); + m68k_incpc(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + m68k_incpc(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uae_s32 dst; + dst = get_dilong(4); + m68k_incpc(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpc(2); + Exception_cpu(src + 32); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_diword(2); + put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + uae_s32 old = get_long(olda); + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = (old); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return (128 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (132 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + if (!(sr & 0x2000)) { + Exception(8); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word(a); + uae_u32 pc = get_long(a + 2); + uae_u16 format = get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_areg(regs, 7) += offset + 8; break; } + else { + Exception_cpu(14); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + regs.sr = oldsr & 0xff00; + MakeFromSR(); + SET_ZFLG(newsr == 0); + SET_NFLG(newsr & 0x8000); + exception3_read_prefetch(opcode, newpc); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_diword(2); + m68k_areg(regs, 7) += offs; + if (pc & 1) { + m68k_areg(regs, 7) -= 4 + offs; + exception3_read_prefetch_only(opcode, pc); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch_only(opcode, faultpc); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long(pca); + m68k_areg(regs, 7) += 4; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch(opcode, pc); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(0)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(0)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(0)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(1)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(1)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(1)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(2)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(2)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(2)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(3)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(3)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(3)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(4)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(4)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(4)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(5)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(5)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(5)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(6)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(6)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(6)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(7)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(7)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(7)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(8)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(8)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(8)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(9)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(9)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(9)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(10)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(10)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(10)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(11)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(11)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(11)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(12)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(12)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(12)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(13)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(13)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(13)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(14)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(14)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(14)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(15)) { + Exception_cpu(7); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(15)) { + Exception_cpu(7); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (cctrue(15)) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(0)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(0)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(0)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_dilong(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(2)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(2)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(2)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(3)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(3)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(3)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(4)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(4)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(4)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(5)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(5)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(5)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(6)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(6)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(6)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(7)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(7)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(7)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(8)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(8)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(8)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(9)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(9)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(9)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(10)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(10)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(10)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(11)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(11)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(11)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(12)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(12)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(12)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(13)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(13)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(13)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(14)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(14)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(14)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(15)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(15)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (cctrue(15)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu(5); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu(5); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(0); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(6); + Exception_cpu(5); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(0); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_diword(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(get_word(m68k_areg(regs, srcreg))); + val += get_diword(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + put_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_diword(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(get_byte(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_diword(2); + m68k_areg(regs, dstreg) -= 2; + put_word(m68k_areg(regs, dstreg), val); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu(5); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu(5); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(0); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(6); + Exception_cpu(5); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(0); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word(dataa, val); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word(dataa, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word(dataa, val); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word(dataa, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word(dataa, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word(dataa, val); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word(dataa, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word(dataa, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word(dataa, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word(dataa, val); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word(dataa, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word(dataa, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(8); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9d0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9e8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(8); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eac0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ead0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eae8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebc0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebe8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(8); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecc0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ece8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edc0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ede8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(8); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfa_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfb_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eec0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eed0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eee8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efc0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efd0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efe8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff9_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f000_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uae_u16 extraa = 0; + mmu_op30(pc, opcode, extra, extraa); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f008_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uae_u16 extraa = 0; + mmu_op30(pc, opcode, extra, extraa); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f010_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + mmu_op30(pc, opcode, extra, extraa); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f018_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + mmu_op30(pc, opcode, extra, extraa); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f020_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = extraa; + mmu_op30(pc, opcode, extra, extraa); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f028_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(0); + m68k_incpc(2); + mmu_op30(pc, opcode, extra, extraa); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f030_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + mmu_op30(pc, opcode, extra, extraa); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f038_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = (uae_s32)(uae_s16)get_diword(0); + m68k_incpc(2); + mmu_op30(pc, opcode, extra, extraa); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f039_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = get_dilong(0); + m68k_incpc(4); + mmu_op30(pc, opcode, extra, extraa); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f200_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f208_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f210_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f218_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f220_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f228_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f230_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f238_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f239_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f240_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f248_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f250_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f258_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f260_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f268_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f270_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f278_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f279_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpc(); + uae_u16 extra = get_diword(2); + uae_s16 dummy = get_diword(4); + m68k_incpc(6); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpc(); + uae_u16 extra = get_diword(2); + uae_s32 dummy; + dummy = get_dilong(4); + m68k_incpc(8); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f280_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpc(2); + uaecptr pc = m68k_getpc(); + uae_s16 extra = get_diword(0); + m68k_incpc(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f2c0_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpc(2); + uaecptr pc = m68k_getpc(); + uae_s32 extra; + extra = get_dilong(0); + m68k_incpc(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f310_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f320_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f328_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f330_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f338_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f339_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f350_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f358_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f368_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f370_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f378_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f379_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f408_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f410_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f418_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f419_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41d_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41e_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41f_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f428_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f430_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f438_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f439_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43a_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43b_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43c_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43d_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43e_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43f_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f500_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f508_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f510_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f518_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f548_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f568_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PLPAW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f588_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PLPAR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f5c8_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MOVE16.L (An)+,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f600_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_dilong(2); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = get_long(memsa); + v[1] = get_long(memsa + 4); + v[2] = get_long(memsa + 8); + v[3] = get_long(memsa + 12); + put_long(memda , v[0]); + put_long(memda + 4, v[1]); + put_long(memda + 8, v[2]); + put_long(memda + 12, v[3]); + m68k_areg(regs, srcreg) += 16; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MOVE16.L (xxx).L,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f608_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_dilong(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = get_long(memsa); + v[1] = get_long(memsa + 4); + v[2] = get_long(memsa + 8); + v[3] = get_long(memsa + 12); + put_long(memda , v[0]); + put_long(memda + 4, v[1]); + put_long(memda + 8, v[2]); + put_long(memda + 12, v[3]); + m68k_areg(regs, dstreg) += 16; + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MOVE16.L (An),(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f610_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_dilong(2); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = get_long(memsa); + v[1] = get_long(memsa + 4); + v[2] = get_long(memsa + 8); + v[3] = get_long(memsa + 12); + put_long(memda , v[0]); + put_long(memda + 4, v[1]); + put_long(memda + 8, v[2]); + put_long(memda + 12, v[3]); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MOVE16.L (xxx).L,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f618_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_dilong(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = get_long(memsa); + v[1] = get_long(memsa + 4); + v[2] = get_long(memsa + 8); + v[3] = get_long(memsa + 12); + put_long(memda , v[0]); + put_long(memda + 4, v[1]); + put_long(memda + 8, v[2]); + put_long(memda + 12, v[3]); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* MOVE16.L (An)+,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f620_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = 0; + uaecptr mems = m68k_areg(regs, srcreg) & ~15, memd; + dstreg = (get_diword(2) >> 12) & 7; + memd = m68k_areg(regs, dstreg) & ~15; + uae_u32 v[4]; + v[0] = get_long(mems); + v[1] = get_long(mems + 4); + v[2] = get_long(mems + 8); + v[3] = get_long(mems + 12); + put_long(memd , v[0]); + put_long(memd + 4, v[1]); + put_long(memd + 8, v[2]); + put_long(memd + 12, v[3]); + if (srcreg != dstreg) + m68k_areg(regs, srcreg) += 16; + m68k_areg(regs, dstreg) += 16; + m68k_incpc(4); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* LPSTOP.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f800_0_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 sw = get_diword(2); + if (sw != 0x01c0) { + Exception(11); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (!(regs.sr & 0x2000)) { + Exception(8); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u16 newsr = get_diword(4); + if (!(newsr & 0x2000)) { + Exception(8); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + regs.sr = newsr; + checkint(); + MakeFromSR_STOP(); + m68k_setstopped(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(8); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(8); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(8); + } + if(regs.t0) check_t0_trace(); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(8); + } + if(regs.t0) check_t0_trace(); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + if(regs.t0) check_t0_trace(); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(8); + } + if(regs.t0) check_t0_trace(); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return (36 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(8); + return (40 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 offs; + offs = get_dilong(2); + put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s16 offs = get_diword(2); + put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + if(regs.t0) check_t0_trace(); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if(regs.t0) check_t0_trace(); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word(a); + uae_u32 pc = get_long(a + 2); + uae_u16 format = get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_areg(regs, 7) += offset + 8; break; } + else if (frame == 0x7) { + m68k_areg(regs, 7) += offset + 52; break; } + else { + Exception_cpu(14); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, newpc, oldsr); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long(pca); + m68k_areg(regs, 7) += 4; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + uae_u16 oldsr = regs.sr; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, pc, oldsr); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f500_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f508_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f510_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f518_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f548_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f568_1_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +#endif +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(8); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(8); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(8); + } + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(8); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + m68k_incpc(6); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +#endif +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte(srca, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte(srca, newv); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte(srca, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + put_word(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + put_long(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 2,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word(a); + uae_u32 pc = get_long(a + 2); + uae_u16 format = get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + regs.t1 = regs.t0 = 0; + Exception_cpu(14); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_diword(2); + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 2,0 B */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpc_j(oldpc + 4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_dilong(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_2_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_3_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_3_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_3_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_3_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_3_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_3_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_3_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_3_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word(a); + uae_u32 pc = get_long(a + 2); + uae_u16 format = get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + Exception_cpu(14); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_3_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if(regs.t0) check_t0_trace(); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + uaecptr tmppc = m68k_getpc() + 2; + dsta = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(8); + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(8); + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_diword(2); + uaecptr dsta; + uaecptr tmppc = m68k_getpc() + 4; + dsta = get_disp_ea_000(tmppc, get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte(dsta, dst); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,4 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,4 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,4 */ + +#endif +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,4 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,4 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 8,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(8); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 8,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,4 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (32 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,4 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(6); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 8,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(8); + return (34 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 8,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,4 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 4,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,4 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 6,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 8,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(8); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 8,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(srca, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(srca, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(srca, newv); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + put_word(srca, regs.sr); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + setchkundefinedflags(src, dst, 1); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + put_word(srca, regs.sr & 0xff); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +#endif +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(srca, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(srca, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(srca, dst); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte(srca, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word(srca, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long(srca, dst); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte(srca, newv); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte(srca, newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte(srca, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte(srca, newv); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte(srca, newv); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpc(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(dsta, srca); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 old_opcode = opcode; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpc(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(dsta, srca); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 0; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + put_word(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 0; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + put_long(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 8 * CYCLE_UNIT / 2; + } else { + put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + count_cycles += 8 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 8 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_u8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + uae_u8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_u8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_u8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_u8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte(srca, src); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + get_word(srca); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(8); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 4; + srca = get_disp_ea_000(tmppc, get_diword(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + get_word(srca); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(8); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 4; + srca = get_disp_ea_000(tmppc, get_diword(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long(srca); + count_cycles += 8 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + get_word(srca); + m68k_incpc(6); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_diword(2); + if (olda & 1) { + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + m68k_incpc(6); + exception3_write_access(opcode, olda, sz_word, src >> 16, 1); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word(a); + uae_u32 pc = get_long(a + 2); + uae_u16 format = get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x8) { + m68k_areg(regs, 7) += offset + 50; break; } + else { + SET_NFLG(((uae_s16)format) < 0); + SET_ZFLG(format == 0); + SET_VFLG(0); + Exception_cpu(14); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 B */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(0)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (s & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (s & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (s & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(2)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(3)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(4)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(5)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(6)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(7)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(8)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(9)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(10)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(11)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(12)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(13)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(14)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc((uae_s32)src + 2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (cctrue(15)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu(5); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu(5); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(6); + Exception_cpu(5); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu(5); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu(5); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(6); + Exception_cpu(5); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu(5); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word(dsta, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long(dsta, src); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word(dsta, newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long(dsta, newv); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word(dataa, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word(dataa, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word(dataa, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_4_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word(dataa, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u16 val = (get_byte(mempa) & 0xff) << 8; + val |= (get_byte(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u32 val = (get_byte(mempa) & 0xff) << 24; + val |= (get_byte(mempa + 2) & 0xff) << 16; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (get_byte(mempa + 4) & 0xff) << 8; + val |= (get_byte(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 8); + put_byte(mempa + 2, src); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 24); + put_byte(mempa + 2, src >> 16); + put_byte(mempa + 4, src >> 8); + put_byte(mempa + 6, src); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(8); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return (26 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(6); + return (28 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_diword(2); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return (24 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_diword(2); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uaecptr oldpc = m68k_getpc(); + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word(a); + m68k_areg(regs, 7) += 6; + uae_u32 pc = get_word(a + 2) << 16; + pc |= get_word(a + 2 + 2); + uae_u16 oldt1 = regs.t1; + regs.sr = sr; + MakeFromSR(); + if (pc & 1) { + m68k_incpc(2); + exception3_read_access(opcode | 0x20000, pc, 1, 2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(pc); + branch_stack_pop_rte(oldpc); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu(7); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpc(4); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpc(6); + exception3_read_prefetch_only(opcode, srca); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_setpc_j(srca); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 B */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (12 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 B */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (14 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 6 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return (18 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_5_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return (30 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16); +} +/* 2 0,0 */ + diff --git a/cpuemu_11.cpp b/cpuemu_11.cpp new file mode 100644 index 00000000..6d9670a7 --- /dev/null +++ b/cpuemu_11.cpp @@ -0,0 +1,159840 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = regs.irc; + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = regs.irc; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = (get_byte_000(mempa) & 0xff) << 8; + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + exception2_read(opcode, mempa + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + val |= (get_byte_000(mempa + 2) & 0xff); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 2, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + uaecptr tmppc = m68k_getpci() + 2; + dsta = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (get_byte_000(mempa) & 0xff) << 24; + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + exception2_read(opcode, mempa + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + val |= (get_byte_000(mempa + 2) & 0xff) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 2, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (get_byte_000(mempa + 4) & 0xff) << 8; + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + exception2_read(opcode, mempa + 4, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + val |= (get_byte_000(mempa + 6) & 0xff); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 6, 0x0, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (val); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (6/0) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa, src >> 8); + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + uae_u16 val = src; + exception2_write(opcode, mempa + 0, 0x100, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + uae_u16 val = src; + exception2_write(opcode, mempa + 2, 0x100, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa, src >> 24); + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + uae_u16 val = src >> 16; + exception2_write(opcode, mempa + 0, 0x100, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa + 2, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + uae_u16 val = src >> 16; + exception2_write(opcode, mempa + 2, 0x100, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa + 4, src >> 8); + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + uae_u16 val = src >> 0; + exception2_write(opcode, mempa + 4, 0x100, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa + 6, src); + if(hardware_bus_error) { + m68k_incpci(2); + uae_u16 val = src >> 0; + exception2_write(opcode, mempa + 6, 0x100, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (2/4) */ +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = regs.irc; + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = regs.irc; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + uaecptr tmppc = m68k_getpci() + 4; + dsta = get_disp_ea_000(tmppc, get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/1) */ +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = regs.irc; + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = regs.irc; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (6/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (6/0) */ +/* 8 4,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (6/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (7/0) */ +/* 10 0,0 */ + +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = srca; + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/0) */ +/* 6 4,4 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/0) */ +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(6); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + regs.irc = extra; + if (dstreg + 8 == ((extra >> 12) & 15)) { + src += 2; + } + m68k_incpci(6); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + regs.irc = extra; + if (dstreg + 8 == ((extra >> 12) & 15)) { + src += -2; + } + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = srca; + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/0) */ +/* 6 4,4 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(10); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(10); + exception3_read_access(opcode, srca, 1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/0) */ +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(6); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + regs.irc = extra; + if (dstreg + 8 == ((extra >> 12) & 15)) { + src += 2; + } + m68k_areg(regs, dstreg) += 4; + m68k_incpci(6); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) += 4; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) += 4; + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) += 4; + exception2_read(opcode, srca + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + regs.irc = extra; + if (dstreg + 8 == ((extra >> 12) & 15)) { + src += -2; + } + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + m68k_areg(regs, dstreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) = srca; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = srca; + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) = srca; + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/0) */ +/* 6 4,4 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(10); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(10); + exception3_read_access(opcode, srca, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (6/0) */ +/* 8 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 4,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 6 4,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (6/1) */ +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (0/2) */ +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (0/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (0/2) */ +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (0/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (5/2) */ +/* 6 6,4 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (5/2) */ +/* 6 6,4 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 8 4,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 8,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 8, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 8,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception3_write_access(opcode, dsta, 1, src, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception3_write_access(opcode, dsta, 1, src, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regflags.cznv = oldflags.cznv; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(8); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 4,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 6 4,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (6/1) */ +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(8); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/0) */ +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/0) */ +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 4,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 4,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 4,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 4,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (0/1) */ +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + if(srca & 1) { + m68k_areg(regs, srcreg) -= 2; + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) -= 2; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (0/1) */ +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + if(srca & 1) { + m68k_areg(regs, srcreg) += 2; + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) += 2; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (0/1) */ +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if(srca & 1) { + get_word_000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if(srca & 1) { + get_word_000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if(srca & 1) { + get_word_000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if(srca & 1) { + get_word_000_prefetch(8); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(8); + exception3_write(opcode, srca, 1, 0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (0/2) */ +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + if(srca & 1) { + m68k_areg(regs, srcreg) -= 4; + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) -= 4; + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) -= 4; + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (0/2) */ +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = srca; + if(srca & 1) { + m68k_areg(regs, srcreg) += 4; + srca += 2; + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) += 4; + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) += 4; + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (0/2) */ +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if(srca & 1) { + srca += 2; + get_word_000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if(srca & 1) { + srca += 2; + get_word_000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if(srca & 1) { + srca += 2; + get_word_000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if(srca & 1) { + srca += 2; + get_word_000_prefetch(8); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(8); + exception3_write(opcode, srca, 1, 0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(8); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, dst); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, dst); + SET_VFLG(0);SET_ZFLG(!dst); + SET_NFLG(dst & 0x80000000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr = src; + MakeFromSR(); + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + m68k_dreg(regs, srcreg) = (dst); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (0/0) */ +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 old_opcode = opcode; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + regs.read_buffer = mask; + m68k_incpci(6); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + srca -= 2; + uaecptr srcav = srca; + if(amask) { + srcav = m68k_areg(regs, movem_index2[amask]); + } else if (dmask) { + srcav = m68k_dreg(regs, movem_index2[dmask]); + } + regs.read_buffer = mask; + m68k_incpci(6); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (amask) { + srca -= 2; + put_word_000(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index2[amask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word_000(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index2[dmask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 6 4,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += 2; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + m68k_incpci(10); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + regs.read_buffer = mask; + m68k_incpci(6); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + srca -= 2; + uaecptr srcav = srca; + if(amask) { + srcav = m68k_areg(regs, movem_index2[amask]); + } else if (dmask) { + srcav = m68k_dreg(regs, movem_index2[dmask]); + } + regs.read_buffer = mask; + m68k_incpci(6); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (amask) { + put_word_000(srca - 2, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -2, 0x1, m68k_areg(regs, movem_index2[amask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca - 4, m68k_areg(regs, movem_index2[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -4, 0x1, m68k_areg(regs, movem_index2[amask]) >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca -= 4; + amask = movem_next[amask]; + } + while (dmask) { + put_word_000(srca - 2, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -2, 0x1, m68k_dreg(regs, movem_index2[dmask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca - 4, m68k_dreg(regs, movem_index2[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -4, 0x1, m68k_dreg(regs, movem_index2[dmask]) >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca -= 4; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 6 4,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += 2; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + m68k_incpci(10); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 8 0,0 */ + +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_u8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (1/1) */ +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + uae_u8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (1/1) */ +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + m68k_incpci(2); + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + m68k_incpci(2); + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/1) */ +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + m68k_incpci(2); + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + m68k_incpci(2); + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(8); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_read_access(opcode, srca, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20+ (5/0) */ +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 4; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_read_access(opcode, srca, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20+ (5/0) */ +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 4; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpci(2); + Exception_cpu(src + 32); + return 0 * CYCLE_UNIT / 2 + count_cycles; + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (0/0) */ +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (olda & 1) { + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + m68k_incpci(6); + exception3_write_access(opcode, olda, sz_word, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(olda, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + exception2_write(opcode, olda + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(olda + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + exception2_write(opcode, olda + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + if (olda & 1) { + m68k_incpci(4); + exception3_read_access(opcode, olda, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 old = get_word_000(olda) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, olda + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + old |= get_word_000(olda + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, olda + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = (old); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return 128 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 132 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 132 * CYCLE_UNIT / 2 + count_cycles; +} +/* 132 (1/0) */ +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_u16 src = regs.irc; + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (0/0) */ + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 newsr; + uae_u32 newpc; + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_000(a); + if(hardware_bus_error) { + exception2_read(opcode, a + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 format = get_word_000(a + 2 + 4); + if(hardware_bus_error) { + exception2_read(opcode, a + 6, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 pc = get_word_000(a + 2) << 16; + if(hardware_bus_error) { + exception2_read(opcode, a + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + int frame = format >> 12; + int offset = 8; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; + } else if (frame == 0x8) { + m68k_areg(regs, 7) += offset + 50; + } else { + SET_NFLG(((uae_s16)format) < 0); + SET_ZFLG(format == 0); + SET_VFLG(0); + Exception_cpu(14); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + pc |= get_word_000(a + 2 + 2); + if(hardware_bus_error) { + exception2_read(opcode, a + 4, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr = sr; + MakeFromSR(); + if (pc & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, pc); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + newsr = sr; newpc = pc; + m68k_setpci_j(newpc); + branch_stack_pop_rte(oldpc); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (6/0) */ +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uaecptr pca; + pca = m68k_areg(regs, 7); + if (pca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, pca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 pc = get_word_000(pca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + pc |= get_word_000(pca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) += 4; + uae_s16 offs = regs.irc; + m68k_areg(regs, 7) += offs; + if (pc & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, pc); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(pc); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr newpc, dsta = m68k_areg(regs, 7); + newpc = get_word_000(dsta) << 16; + if(hardware_bus_error) { + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + newpc |= get_word_000(dsta + 2); + if(hardware_bus_error) { + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) += 4; + m68k_setpci_j(newpc); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, faultpc); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + if (sra & 1) { + m68k_incpci(2); + exception3_read_access(opcode, sra, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 sr = get_word_000(sra); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, sra + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + if (pca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, pca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 pc = get_word_000(pca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + pc |= get_word_000(pca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci_j(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if(!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if(!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(0, 2, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs.irc; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + nextpc += 2; + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (2/2) */ +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)regs.irc; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(4); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + srca |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)regs.irc; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + nextpc += 2; + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (2/2) */ +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(0, 2, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs.irc; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)regs.irc; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + srca |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)regs.irc; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(0) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(1) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(2) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(3) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(4) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(5) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(6) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(7) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(8) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(9) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(10) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(11) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(12) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(13) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(14) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 4 * CYCLE_UNIT / 2; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.irc = irc; + } else { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + count_cycles += loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(15) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + count_cycles += (regs.loop_mode >> 16) * CYCLE_UNIT / 2; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + count_cycles += (regs.loop_mode & 0xfffe) * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 6 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(0)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = regs.irc; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if (s & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if (s & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + if (s & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 2 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(2)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(3)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(4)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(5)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(6)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(7)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(8)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(9)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(10)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(11)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(12)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(13)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(14)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(15)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/0) */ +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access2(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_XFLG(GET_CFLG()); + SET_ZFLG(oldz); + if (newv & 0xffff) SET_ZFLG(0); + SET_NFLG(newv & 0x8000); + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + srca += 2; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + dsta += 2; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26+ (4/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 4,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 4,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg] + 0; + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 2; + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 0; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 0; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/0) */ +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access2(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgo) & (bflgo ^ bflgn))); + SET_XFLG(GET_CFLG()); + SET_ZFLG(oldz); + if (newv & 0xffff) SET_ZFLG(0); + SET_NFLG(newv & 0x8000); + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + srca += 2; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + dsta += 2; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgo) & (bflgo ^ bflgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26+ (4/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (2/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (2/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + count_cycles += 4 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_000_prefetch(4); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + if(loop_mode & 0xfffe) { + count_cycles += (loop_mode & 0xfffe) * CYCLE_UNIT / 2; + loop_mode = 1; + } + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (loop_mode) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (1/1) */ +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_11_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = (get_byte_000(mempa) & 0xff) << 8; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + val |= (get_byte_000(mempa + 2) & 0xff); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 2, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + uaecptr tmppc = m68k_getpci() + 2; + dsta = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (get_byte_000(mempa) & 0xff) << 24; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + val |= (get_byte_000(mempa + 2) & 0xff) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 2, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (get_byte_000(mempa + 4) & 0xff) << 8; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 4, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + val |= (get_byte_000(mempa + 6) & 0xff); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 6, 0x0, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (val); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (6/0) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa, src >> 8); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 0, 0x0, src >> 8, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 2, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa, src >> 24); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 0, 0x0, src >> 24, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa + 2, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 2, 0x0, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa + 4, src >> 8); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 4, 0x0, src >> 8, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_byte_000(mempa + 6, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 6, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (2/4) */ +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + uaecptr tmppc = m68k_getpci() + 4; + dsta = get_disp_ea_000(tmppc, get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/0) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 31; + if (src > 15) { + count_cycles += 2 * CYCLE_UNIT / 2; + } + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_000(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (6/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (6/0) */ +/* 8 4,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (6/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 12, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (7/0) */ +/* 10 0,0 */ + +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 4,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 6 4,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (6/1) */ +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(8); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(8); + m68k_areg(regs, dstreg) -= 4; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20+ (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20+ (3/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22+ (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24+ (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26+ (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24+ (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28+ (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24+ (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26+ (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20+ (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (5/2) */ +/* 6 6,4 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (5/2) */ +/* 6 6,4 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 8 4,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 8,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 8, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 36 * CYCLE_UNIT / 2 + count_cycles; + } + return 36 * CYCLE_UNIT / 2 + count_cycles; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 32 * CYCLE_UNIT / 2 + count_cycles; + } + return 32 * CYCLE_UNIT / 2 + count_cycles; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 34 * CYCLE_UNIT / 2 + count_cycles; + } + return 34 * CYCLE_UNIT / 2 + count_cycles; +} +/* 34 (6/2) */ +/* 8 8,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20+ (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + count_cycles += 2 * CYCLE_UNIT / 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 4,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 6 4,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(10); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (6/1) */ +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + MakeSR(); + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + MakeSR(); + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (1/2) */ +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + MakeSR(); + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (1/0) */ +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/0) */ +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 4,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/0) */ +/* 4 4,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + setchkundefinedflags(src, dst, 1); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 4,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (m68k_areg(regs, dstreg) & 0x0000ffff) | (srca & 0xffff0000); + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (srca); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 4,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, 0); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, srcreg) = (src & 0xffff0000); + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, dst); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, dst); + SET_VFLG(0);SET_ZFLG(!dst); + SET_NFLG(dst & 0x80000000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(6); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + int t1 = regs.t1; + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + m68k_dreg(regs, srcreg) = (dst); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(4); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(4); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 old_opcode = opcode; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + srca -= 2; + uaecptr srcav = srca; + m68k_incpci(6); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (amask) { + srca -= 2; + put_word_000(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index2[amask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word_000(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index2[dmask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 6 4,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += 2; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_write_access(opcode, srca, 1, srcav, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 2; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + srca -= 2; + uaecptr srcav = srca; + m68k_incpci(6); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (amask) { + put_word_000(srca - 2, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -2, 0x1, m68k_areg(regs, movem_index2[amask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca - 4, m68k_areg(regs, movem_index2[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -4, 0x1, m68k_areg(regs, movem_index2[amask]) >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca -= 4; + amask = movem_next[amask]; + } + while (dmask) { + put_word_000(srca - 2, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -2, 0x1, m68k_dreg(regs, movem_index2[dmask]), 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca - 4, m68k_dreg(regs, movem_index2[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -4, 0x1, m68k_dreg(regs, movem_index2[dmask]) >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca -= 4; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 6 4,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += 2; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_write_access(opcode, srca, 2, srcav, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + put_word_000(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_000(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(srca + 2, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + srca += 4; + amask = movem_next[amask]; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 8 0,0 */ + +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + do_cycles(2); + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + do_cycles(2); + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + do_cycles(2); + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/1) */ +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + do_cycles(2); + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + do_cycles(2); + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + do_cycles(2); + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + do_cycles(2); + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_000(srca, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_read_access(opcode, srca, 1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20+ (5/0) */ +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + opcode |= 0x00020000; + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 4; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + opcode |= 0x00020000; + uaecptr srcav = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)get_word_000(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_word_000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_read_access(opcode, srca, 2, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(8); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20+ (5/0) */ +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + opcode |= 0x00020000; + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 4; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + opcode |= 0x00020000; + uaecptr srcav = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + while (dmask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (get_word_000(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= get_word_000(srca + 2); + count_cycles += 4 * CYCLE_UNIT / 2; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch(opcode, 4, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (olda & 1) { + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + m68k_incpci(6); + exception3_write_access(opcode, olda, sz_word, src >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(olda, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + exception2_write(opcode, olda + 0, 0x1, src >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(olda + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + exception2_write(opcode, olda + 2, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + if (olda & 1) { + m68k_incpci(4); + exception3_read_access(opcode, olda, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 old = get_word_000(olda) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, olda + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + old |= get_word_000(olda + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, olda + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = (old); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return 128 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 132 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 132 * CYCLE_UNIT / 2 + count_cycles; +} +/* 132 (1/0) */ +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_u16 src = regs.irc; + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (0/0) */ + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_000(a); + if(hardware_bus_error) { + exception2_read(opcode, a + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) += 6; + uae_u32 pc = get_word_000(a + 2) << 16; + if(hardware_bus_error) { + exception2_read(opcode, a + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + pc |= get_word_000(a + 2 + 2); + if(hardware_bus_error) { + exception2_read(opcode, a + 4, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 oldt1 = regs.t1; + regs.sr = sr; + MakeFromSR(); + if (pc & 1) { + m68k_incpci(2); + exception3_read_access(opcode | 0x20000, pc, 1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(pc); + opcode |= 0x20000; + branch_stack_pop_rte(oldpc); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(oldt1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 2 0,0 B */ + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr newpc, dsta = m68k_areg(regs, 7); + newpc = get_word_000(dsta) << 16; + if(hardware_bus_error) { + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + newpc |= get_word_000(dsta + 2); + if(hardware_bus_error) { + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) += 4; + m68k_setpci_j(newpc); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, faultpc); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + uae_u16 opcode_v = opcode; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (GET_VFLG()) { + MakeSR(); + regs.sr |= 0x2000; + regs.sr &= ~0x8000; + MakeFromSR(); + pcoffset -= 2; + } else { + opcode = regs.ir | 0x20000; + if(regs.t1) opcode |= 0x10000; + } + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + if (GET_VFLG()) { + regs.ir = opcode_v; + Exception_cpu(7); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + if (sra & 1) { + m68k_incpci(2); + exception3_read_access(opcode, sra, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 sr = get_word_000(sra); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, sra + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + if (pca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, pca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 pc = get_word_000(pca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + pc |= get_word_000(pca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci_j(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 2 0,0 B */ + +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(0, 2, 0); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (2/2) */ +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs.irc; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + nextpc += 2; + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (2/2) */ +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)regs.irc; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(4); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + srca |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpci(6); + exception3_read_prefetch_only(opcode, srca); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)regs.irc; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + nextpc += 2; + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (2/2) */ +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(0, 2, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs.irc; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)regs.irc; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + srca |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)regs.irc; + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_setpci_j(srca); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + get_word_000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + count_cycles += 2 * CYCLE_UNIT / 2; + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_000(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(0)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = regs.irc; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(s); + if (m68k_getpci() & 1) { + uaecptr addr = m68k_getpci(); + m68k_incpci(-2); + exception3_read_prefetch(opcode, addr); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(s); + if (m68k_getpci() & 1) { + uaecptr addr = m68k_getpci(); + m68k_incpci(-2); + exception3_read_prefetch(opcode, addr); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + put_word_000(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(s); + if (m68k_getpci() & 1) { + uaecptr addr = m68k_getpci(); + m68k_incpci(-2); + exception3_read_prefetch(opcode, addr); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (2/2) */ +/* 2 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(2)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(3)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(4)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(5)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(6)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(7)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(8)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(9)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(10)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(11)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(12)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(13)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(14)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(4); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci((uae_s32)src + 2); + get_word_000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + return 10 * CYCLE_UNIT / 2; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + if (cctrue(15)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + count_cycles += (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) * CYCLE_UNIT / 2; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + int extra = 0; + count_cycles += (getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra)) * CYCLE_UNIT / 2; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_XFLG(GET_CFLG()); + SET_ZFLG(oldz); + if (newv & 0xffff) SET_ZFLG(0); + SET_NFLG(newv & 0x8000); + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(4); + srca += 2; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(4); + dsta += 2; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 4,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 4,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg] + 0; + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) += 2 + 2; + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (5/0) */ +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(6); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 0; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMulu68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 0; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += (getMuls68kCycles(src)) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 10 * CYCLE_UNIT / 2 + count_cycles; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s8 dst = get_byte_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_byte_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return 4 * CYCLE_UNIT / 2 + count_cycles; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 src = get_word_000(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 dst = get_word_000(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + put_word_000(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgo) & (bflgo ^ bflgn))); + SET_XFLG(GET_CFLG()); + SET_ZFLG(oldz); + if (newv & 0xffff) SET_ZFLG(0); + SET_NFLG(newv & 0x8000); + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(4); + srca += 2; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(4); + dsta += 2; + exception3_read_access(opcode, dsta, 2, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgo) & (bflgo ^ bflgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 30 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 30 * CYCLE_UNIT / 2 + count_cycles; +} +/* 30 (5/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 22 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 26 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 26 * CYCLE_UNIT / 2 + count_cycles; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 24 * CYCLE_UNIT / 2 + count_cycles; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dsta |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = get_word_000(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + dst |= get_word_000(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return 24 * CYCLE_UNIT / 2 + count_cycles; + } + put_word_000(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return 28 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 28 * CYCLE_UNIT / 2 + count_cycles; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + srca |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 22 * CYCLE_UNIT / 2 + count_cycles; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 src = get_word_000(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + src |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return 6 * CYCLE_UNIT / 2 + count_cycles; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + count_cycles += (2 * ccnt) * CYCLE_UNIT / 2; + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return 8 * CYCLE_UNIT / 2 + count_cycles; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 0 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 12 * CYCLE_UNIT / 2 + count_cycles; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return 2 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(2); + return 14 * CYCLE_UNIT / 2 + count_cycles; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return 6 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 10 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 14 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 18 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 18 * CYCLE_UNIT / 2 + count_cycles; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(4); + return 16 * CYCLE_UNIT / 2 + count_cycles; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_12_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_word_000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return 4 * CYCLE_UNIT / 2 + count_cycles; + } + dataa |= get_word_000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return 8 * CYCLE_UNIT / 2 + count_cycles; + } + uae_s16 data = get_word_000(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return 12 * CYCLE_UNIT / 2 + count_cycles; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 8, pcoffset); + return 16 * CYCLE_UNIT / 2 + count_cycles; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_000(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return 20 * CYCLE_UNIT / 2 + count_cycles; + } + m68k_incpci(6); + return 20 * CYCLE_UNIT / 2 + count_cycles; +} +/* 20 (4/1) */ +/* 6 0,0 */ + diff --git a/cpuemu_13.cpp b/cpuemu_13.cpp new file mode 100644 index 00000000..5372e74c --- /dev/null +++ b/cpuemu_13.cpp @@ -0,0 +1,161909 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +void REGPARAM2 op_0000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +void REGPARAM2 op_0010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +void REGPARAM2 op_0018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +void REGPARAM2 op_0020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +void REGPARAM2 op_0028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* OR.B #.B,(xxx).W */ +void REGPARAM2 op_0038_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +void REGPARAM2 op_0039_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ORSR.B #.W */ +void REGPARAM2 op_003c_13_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = regs.irc; + src &= 0xFF; + do_cycles_ce000_internal(8); + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_0040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +void REGPARAM2 op_0050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +void REGPARAM2 op_0058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +void REGPARAM2 op_0060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +void REGPARAM2 op_0068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* OR.W #.W,(xxx).W */ +void REGPARAM2 op_0078_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +void REGPARAM2 op_0079_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ORSR.W #.W */ +void REGPARAM2 op_007c_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(8); + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_0080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +void REGPARAM2 op_0090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +void REGPARAM2 op_0098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +void REGPARAM2 op_00a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +void REGPARAM2 op_00a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_00b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* OR.L #.L,(xxx).W */ +void REGPARAM2 op_00b8_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +void REGPARAM2 op_00b9_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* BTST.L Dn,Dn */ +void REGPARAM2 op_0100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + ipl_fetch_next_pre(); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +void REGPARAM2 op_0108_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_u16 val = (x_get_byte(mempa) & 0xff) << 8; + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + exception2_read(opcode, mempa + 0, 0x0, 1); + return; + } + val |= (x_get_byte(mempa + 2) & 0xff); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 2, 0x0, 1); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +void REGPARAM2 op_0110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +void REGPARAM2 op_0118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +void REGPARAM2 op_0120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +void REGPARAM2 op_0128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* BTST.B Dn,(xxx).W */ +void REGPARAM2 op_0138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +void REGPARAM2 op_0139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +void REGPARAM2 op_013a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 2); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +void REGPARAM2 op_013b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 2); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* BTST.B Dn,#.B */ +void REGPARAM2 op_013c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + src &= 7; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +void REGPARAM2 op_0140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +void REGPARAM2 op_0148_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 val = (x_get_byte(mempa) & 0xff) << 24; + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + exception2_read(opcode, mempa + 0, 0x0, 1); + return; + } + val |= (x_get_byte(mempa + 2) & 0xff) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 2, 0x0, 1); + return; + } + ipl_fetch_now(); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (x_get_byte(mempa + 4) & 0xff) << 8; + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + exception2_read(opcode, mempa + 4, 0x0, 1); + return; + } + val |= (x_get_byte(mempa + 6) & 0xff); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 6, 0x0, 1); + return; + } + m68k_dreg(regs, dstreg) = (val); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 24 (6/0) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +void REGPARAM2 op_0150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +void REGPARAM2 op_0158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +void REGPARAM2 op_0160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +void REGPARAM2 op_0168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BCHG.B Dn,(xxx).W */ +void REGPARAM2 op_0178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +void REGPARAM2 op_0179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +void REGPARAM2 op_0180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +void REGPARAM2 op_0188_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + x_put_byte(mempa, src >> 8); + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + uae_u16 val = src; + exception2_write(opcode, mempa + 0, 0x100, val, 1); + return; + } + x_put_byte(mempa + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + uae_u16 val = src; + exception2_write(opcode, mempa + 2, 0x100, val, 1); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +void REGPARAM2 op_0190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +void REGPARAM2 op_0198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +void REGPARAM2 op_01a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 16 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +void REGPARAM2 op_01a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +void REGPARAM2 op_01b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +void REGPARAM2 op_01b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +void REGPARAM2 op_01c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +void REGPARAM2 op_01c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + x_put_byte(mempa, src >> 24); + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + uae_u16 val = src >> 16; + exception2_write(opcode, mempa + 0, 0x100, val, 1); + return; + } + x_put_byte(mempa + 2, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + uae_u16 val = src >> 16; + exception2_write(opcode, mempa + 2, 0x100, val, 1); + return; + } + x_put_byte(mempa + 4, src >> 8); + if(hardware_bus_error) { + m68k_incpci(2); + opcode |= 0x10000; + uae_u16 val = src >> 0; + exception2_write(opcode, mempa + 4, 0x100, val, 1); + return; + } + x_put_byte(mempa + 6, src); + if(hardware_bus_error) { + m68k_incpci(2); + uae_u16 val = src >> 0; + exception2_write(opcode, mempa + 6, 0x100, val, 1); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 24 (2/4) */ +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +void REGPARAM2 op_01d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +void REGPARAM2 op_01d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +void REGPARAM2 op_01e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +void REGPARAM2 op_01e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BSET.B Dn,(xxx).W */ +void REGPARAM2 op_01f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +void REGPARAM2 op_01f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_0200_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +void REGPARAM2 op_0210_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +void REGPARAM2 op_0218_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +void REGPARAM2 op_0220_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +void REGPARAM2 op_0228_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0230_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* AND.B #.B,(xxx).W */ +void REGPARAM2 op_0238_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +void REGPARAM2 op_0239_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ANDSR.B #.W */ +void REGPARAM2 op_023c_13_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = regs.irc; + src &= 0xFF; + src |= 0xff00; + do_cycles_ce000_internal(8); + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_0240_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +void REGPARAM2 op_0250_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +void REGPARAM2 op_0258_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +void REGPARAM2 op_0260_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +void REGPARAM2 op_0268_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0270_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* AND.W #.W,(xxx).W */ +void REGPARAM2 op_0278_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +void REGPARAM2 op_0279_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ANDSR.W #.W */ +void REGPARAM2 op_027c_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(8); + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_0280_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +void REGPARAM2 op_0290_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +void REGPARAM2 op_0298_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +void REGPARAM2 op_02a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +void REGPARAM2 op_02a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_02b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* AND.L #.L,(xxx).W */ +void REGPARAM2 op_02b8_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +void REGPARAM2 op_02b9_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* SUB.B #.B,Dn */ +void REGPARAM2 op_0400_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +void REGPARAM2 op_0410_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +void REGPARAM2 op_0418_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +void REGPARAM2 op_0420_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +void REGPARAM2 op_0428_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0430_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* SUB.B #.B,(xxx).W */ +void REGPARAM2 op_0438_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +void REGPARAM2 op_0439_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_0440_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +void REGPARAM2 op_0450_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +void REGPARAM2 op_0458_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +void REGPARAM2 op_0460_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +void REGPARAM2 op_0468_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0470_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* SUB.W #.W,(xxx).W */ +void REGPARAM2 op_0478_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +void REGPARAM2 op_0479_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_0480_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +void REGPARAM2 op_0490_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +void REGPARAM2 op_0498_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +void REGPARAM2 op_04a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +void REGPARAM2 op_04a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_04b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* SUB.L #.L,(xxx).W */ +void REGPARAM2 op_04b8_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +void REGPARAM2 op_04b9_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* ADD.B #.B,Dn */ +void REGPARAM2 op_0600_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +void REGPARAM2 op_0610_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +void REGPARAM2 op_0618_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +void REGPARAM2 op_0620_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +void REGPARAM2 op_0628_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0630_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* ADD.B #.B,(xxx).W */ +void REGPARAM2 op_0638_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +void REGPARAM2 op_0639_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_0640_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +void REGPARAM2 op_0650_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +void REGPARAM2 op_0658_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +void REGPARAM2 op_0660_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +void REGPARAM2 op_0668_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0670_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* ADD.W #.W,(xxx).W */ +void REGPARAM2 op_0678_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +void REGPARAM2 op_0679_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_0680_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +void REGPARAM2 op_0690_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +void REGPARAM2 op_0698_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +void REGPARAM2 op_06a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +void REGPARAM2 op_06a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_06b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* ADD.L #.L,(xxx).W */ +void REGPARAM2 op_06b8_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +void REGPARAM2 op_06b9_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* BTST.L #.W,Dn */ +void REGPARAM2 op_0800_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + ipl_fetch_now(); + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +void REGPARAM2 op_0810_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +void REGPARAM2 op_0818_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +void REGPARAM2 op_0820_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +void REGPARAM2 op_0828_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0830_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* BTST.B #.W,(xxx).W */ +void REGPARAM2 op_0838_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +void REGPARAM2 op_0839_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +void REGPARAM2 op_083a_13_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 2); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +void REGPARAM2 op_083b_13_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + uaecptr tmppc = m68k_getpci() + 4; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(tmppc, get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 2); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* BCHG.L #.W,Dn */ +void REGPARAM2 op_0840_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +void REGPARAM2 op_0850_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +void REGPARAM2 op_0858_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +void REGPARAM2 op_0860_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +void REGPARAM2 op_0868_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0870_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BCHG.B #.W,(xxx).W */ +void REGPARAM2 op_0878_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +void REGPARAM2 op_0879_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +void REGPARAM2 op_0880_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +void REGPARAM2 op_0890_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +void REGPARAM2 op_0898_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +void REGPARAM2 op_08a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 20 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +void REGPARAM2 op_08a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 24 (4/1) */ +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +void REGPARAM2 op_08b8_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +void REGPARAM2 op_08b9_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(8); + return; +} +/* 26 (5/1) */ +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +void REGPARAM2 op_08c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +void REGPARAM2 op_08d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +void REGPARAM2 op_08d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +void REGPARAM2 op_08e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +void REGPARAM2 op_08e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BSET.B #.W,(xxx).W */ +void REGPARAM2 op_08f8_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +void REGPARAM2 op_08f9_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +void REGPARAM2 op_0a00_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +void REGPARAM2 op_0a10_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +void REGPARAM2 op_0a18_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +void REGPARAM2 op_0a20_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +void REGPARAM2 op_0a28_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0a30_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* EOR.B #.B,(xxx).W */ +void REGPARAM2 op_0a38_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +void REGPARAM2 op_0a39_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EORSR.B #.W */ +void REGPARAM2 op_0a3c_13_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = regs.irc; + src &= 0xFF; + do_cycles_ce000_internal(8); + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +void REGPARAM2 op_0a40_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +void REGPARAM2 op_0a50_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +void REGPARAM2 op_0a58_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +void REGPARAM2 op_0a60_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +void REGPARAM2 op_0a68_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0a70_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* EOR.W #.W,(xxx).W */ +void REGPARAM2 op_0a78_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +void REGPARAM2 op_0a79_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EORSR.W #.W */ +void REGPARAM2 op_0a7c_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(8); + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/0) */ +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +void REGPARAM2 op_0a80_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +void REGPARAM2 op_0a90_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +void REGPARAM2 op_0a98_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +void REGPARAM2 op_0aa0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +void REGPARAM2 op_0aa8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0ab0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* EOR.L #.L,(xxx).W */ +void REGPARAM2 op_0ab8_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +void REGPARAM2 op_0ab9_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* CMP.B #.B,Dn */ +void REGPARAM2 op_0c00_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +void REGPARAM2 op_0c10_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +void REGPARAM2 op_0c18_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +void REGPARAM2 op_0c20_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +void REGPARAM2 op_0c28_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0c30_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* CMP.B #.B,(xxx).W */ +void REGPARAM2 op_0c38_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +void REGPARAM2 op_0c39_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* CMP.W #.W,Dn */ +void REGPARAM2 op_0c40_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +void REGPARAM2 op_0c50_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +void REGPARAM2 op_0c58_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +void REGPARAM2 op_0c60_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +void REGPARAM2 op_0c68_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0c70_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* CMP.W #.W,(xxx).W */ +void REGPARAM2 op_0c78_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +void REGPARAM2 op_0c79_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,Dn */ +void REGPARAM2 op_0c80_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +void REGPARAM2 op_0c90_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +void REGPARAM2 op_0c98_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +void REGPARAM2 op_0ca0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +void REGPARAM2 op_0ca8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 24 (6/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0cb0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 26 (6/0) */ +/* 8 4,0 */ + +/* CMP.L #.L,(xxx).W */ +void REGPARAM2 op_0cb8_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 24 (6/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +void REGPARAM2 op_0cb9_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + m68k_incpci(10); + return; +} +/* 28 (7/0) */ +/* 10 0,0 */ + +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e10_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(2); + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e18_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e20_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = srca; + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e28_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e30_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/0) */ +/* 6 4,4 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e38_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e39_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + dfc_nommu_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = sfc_nommu_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/0) */ +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e50_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(2); + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(6); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(2); + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e58_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(4); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + regs.irc = extra; + if (dstreg + 8 == ((extra >> 12) & 15)) { + src += 2; + } + m68k_incpci(6); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(4); + if (srca & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e60_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(4); + if (dsta & 1) { + regs.irc = extra; + if (dstreg + 8 == ((extra >> 12) & 15)) { + src += -2; + } + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(4); + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = srca; + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e68_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e70_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/0) */ +/* 6 4,4 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e78_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e79_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(10); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + dfc_nommu_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(10); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = sfc_nommu_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/0) */ +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e90_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(2); + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(6); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(2); + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e98_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(4); + if (dsta & 1) { + regs.irc = extra; + if (dstreg + 8 == ((extra >> 12) & 15)) { + src += 2; + } + m68k_areg(regs, dstreg) += 4; + m68k_incpci(6); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + do_cycles_ce000_internal(4); + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) += 4; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) += 4; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) += 4; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(4); + if (dsta & 1) { + regs.irc = extra; + if (dstreg + 8 == ((extra >> 12) & 15)) { + src += -2; + } + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(4); + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + m68k_areg(regs, dstreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) = srca; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = srca; + regs.irc = extra; + regs.write_buffer = extra; + m68k_areg(regs, dstreg) = srca; + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/0) */ +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/0) */ +/* 6 4,4 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb8_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb9_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + regs.irc = extra; + m68k_incpci(10); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + regs.irc = extra; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + dfc_nommu_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + regs.irc = extra; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (srca & 1) { + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(10); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = sfc_nommu_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= sfc_nommu_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = extra; + regs.write_buffer = extra; + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (6/0) */ +/* 8 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +void REGPARAM2 op_1000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +void REGPARAM2 op_1010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +void REGPARAM2 op_1018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +void REGPARAM2 op_1020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +void REGPARAM2 op_1028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +void REGPARAM2 op_1030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,Dn */ +void REGPARAM2 op_1038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +void REGPARAM2 op_1039_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +void REGPARAM2 op_103a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_103b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.B #.B,Dn */ +void REGPARAM2 op_103c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +void REGPARAM2 op_1080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +void REGPARAM2 op_1090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +void REGPARAM2 op_1098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +void REGPARAM2 op_10a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +void REGPARAM2 op_10a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +void REGPARAM2 op_10b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(An) */ +void REGPARAM2 op_10b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +void REGPARAM2 op_10b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +void REGPARAM2 op_10ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +void REGPARAM2 op_10bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,(An) */ +void REGPARAM2 op_10bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +void REGPARAM2 op_10c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_next_pre(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +void REGPARAM2 op_10d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +void REGPARAM2 op_10d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +void REGPARAM2 op_10e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +void REGPARAM2 op_10e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +void REGPARAM2 op_10f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +void REGPARAM2 op_10f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +void REGPARAM2 op_10f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +void REGPARAM2 op_10fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_10fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,(An)+ */ +void REGPARAM2 op_10fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +void REGPARAM2 op_1100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +void REGPARAM2 op_1110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +void REGPARAM2 op_1118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +void REGPARAM2 op_1120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +void REGPARAM2 op_1128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +void REGPARAM2 op_1130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,-(An) */ +void REGPARAM2 op_1138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +void REGPARAM2 op_1139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +void REGPARAM2 op_113a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +void REGPARAM2 op_113b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,-(An) */ +void REGPARAM2 op_113c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +void REGPARAM2 op_1140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +void REGPARAM2 op_1150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +void REGPARAM2 op_1158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +void REGPARAM2 op_1160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +void REGPARAM2 op_1168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_1170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +void REGPARAM2 op_1178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +void REGPARAM2 op_1179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +void REGPARAM2 op_117a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_117b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B #.B,(d16,An) */ +void REGPARAM2 op_117c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_1180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +void REGPARAM2 op_1190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +void REGPARAM2 op_1198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +void REGPARAM2 op_11a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_11a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_11b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_11b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 4,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_11ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_11bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 6 4,0 */ + +/* MOVE.B Dn,(xxx).W */ +void REGPARAM2 op_11c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +void REGPARAM2 op_11d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +void REGPARAM2 op_11d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +void REGPARAM2 op_11e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +void REGPARAM2 op_11e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_11f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +void REGPARAM2 op_11f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +void REGPARAM2 op_11f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +void REGPARAM2 op_11fa_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_11fb_13_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).W */ +void REGPARAM2 op_11fc_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +void REGPARAM2 op_13c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +void REGPARAM2 op_13d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +void REGPARAM2 op_13d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +void REGPARAM2 op_13e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +void REGPARAM2 op_13e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_13f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +void REGPARAM2 op_13f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +void REGPARAM2 op_13f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(10); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (6/1) */ +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +void REGPARAM2 op_13fa_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_13fb_13_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.B #.B,(xxx).L */ +void REGPARAM2 op_13fc_13_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +void REGPARAM2 op_2000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +void REGPARAM2 op_2008_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +void REGPARAM2 op_2010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +void REGPARAM2 op_2018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +void REGPARAM2 op_2020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +void REGPARAM2 op_2028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +void REGPARAM2 op_2030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,Dn */ +void REGPARAM2 op_2038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +void REGPARAM2 op_2039_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +void REGPARAM2 op_203a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_203b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVE.L #.L,Dn */ +void REGPARAM2 op_203c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +void REGPARAM2 op_2040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.L An,An */ +void REGPARAM2 op_2048_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +void REGPARAM2 op_2050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +void REGPARAM2 op_2058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +void REGPARAM2 op_2060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +void REGPARAM2 op_2068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +void REGPARAM2 op_2070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVEA.L (xxx).W,An */ +void REGPARAM2 op_2078_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +void REGPARAM2 op_2079_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +void REGPARAM2 op_207a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_207b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVEA.L #.L,An */ +void REGPARAM2 op_207c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +void REGPARAM2 op_2080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +void REGPARAM2 op_2088_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +void REGPARAM2 op_2090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +void REGPARAM2 op_2098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +void REGPARAM2 op_20a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +void REGPARAM2 op_20a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +void REGPARAM2 op_20b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(An) */ +void REGPARAM2 op_20b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +void REGPARAM2 op_20b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +void REGPARAM2 op_20ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +void REGPARAM2 op_20bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,(An) */ +void REGPARAM2 op_20bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +void REGPARAM2 op_20c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +void REGPARAM2 op_20c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +void REGPARAM2 op_20d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +void REGPARAM2 op_20d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +void REGPARAM2 op_20e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +void REGPARAM2 op_20e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +void REGPARAM2 op_20f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +void REGPARAM2 op_20f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +void REGPARAM2 op_20f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +void REGPARAM2 op_20fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_20fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,(An)+ */ +void REGPARAM2 op_20fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(8); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +void REGPARAM2 op_2100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(2); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +void REGPARAM2 op_2108_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(2); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +void REGPARAM2 op_2110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +void REGPARAM2 op_2118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +void REGPARAM2 op_2120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +void REGPARAM2 op_2128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +void REGPARAM2 op_2130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,-(An) */ +void REGPARAM2 op_2138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +void REGPARAM2 op_2139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +void REGPARAM2 op_213a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +void REGPARAM2 op_213b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,-(An) */ +void REGPARAM2 op_213c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) = dsta + 4; + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +void REGPARAM2 op_2140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +void REGPARAM2 op_2148_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +void REGPARAM2 op_2150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +void REGPARAM2 op_2158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +void REGPARAM2 op_2160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +void REGPARAM2 op_2168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_2170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +void REGPARAM2 op_2178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +void REGPARAM2 op_2179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +void REGPARAM2 op_217a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_217b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L #.L,(d16,An) */ +void REGPARAM2 op_217c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_2180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +void REGPARAM2 op_2188_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +void REGPARAM2 op_2190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +void REGPARAM2 op_2198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +void REGPARAM2 op_21a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_21a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (5/2) */ +/* 6 6,4 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_21b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_21b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_21ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (5/2) */ +/* 6 6,4 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_21bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 8 4,0 */ + +/* MOVE.L Dn,(xxx).W */ +void REGPARAM2 op_21c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +void REGPARAM2 op_21c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +void REGPARAM2 op_21d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +void REGPARAM2 op_21d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +void REGPARAM2 op_21e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +void REGPARAM2 op_21e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_21f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +void REGPARAM2 op_21f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +void REGPARAM2 op_21f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +void REGPARAM2 op_21fa_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_21fb_13_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).W */ +void REGPARAM2 op_21fc_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +void REGPARAM2 op_23c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +void REGPARAM2 op_23c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +void REGPARAM2 op_23d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +void REGPARAM2 op_23d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +void REGPARAM2 op_23e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +void REGPARAM2 op_23e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_23f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 34 (6/2) */ +/* 8 8,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +void REGPARAM2 op_23f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +void REGPARAM2 op_23f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(10); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +void REGPARAM2 op_23fa_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_23fb_13_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 34 (6/2) */ +/* 8 8,0 */ + +/* MOVE.L #.L,(xxx).L */ +void REGPARAM2 op_23fc_13_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 10, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + if (dsta & 1) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(10); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +void REGPARAM2 op_3000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +void REGPARAM2 op_3008_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +void REGPARAM2 op_3010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +void REGPARAM2 op_3018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +void REGPARAM2 op_3020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +void REGPARAM2 op_3028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +void REGPARAM2 op_3030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,Dn */ +void REGPARAM2 op_3038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +void REGPARAM2 op_3039_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +void REGPARAM2 op_303a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_303b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.W #.W,Dn */ +void REGPARAM2 op_303c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +void REGPARAM2 op_3040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.W An,An */ +void REGPARAM2 op_3048_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +void REGPARAM2 op_3050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +void REGPARAM2 op_3058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +void REGPARAM2 op_3060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +void REGPARAM2 op_3068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +void REGPARAM2 op_3070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVEA.W (xxx).W,An */ +void REGPARAM2 op_3078_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +void REGPARAM2 op_3079_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +void REGPARAM2 op_307a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +void REGPARAM2 op_307b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVEA.W #.W,An */ +void REGPARAM2 op_307c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +void REGPARAM2 op_3080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +void REGPARAM2 op_3088_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +void REGPARAM2 op_3090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +void REGPARAM2 op_3098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +void REGPARAM2 op_30a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +void REGPARAM2 op_30a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +void REGPARAM2 op_30b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(An) */ +void REGPARAM2 op_30b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +void REGPARAM2 op_30b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +void REGPARAM2 op_30ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +void REGPARAM2 op_30bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,(An) */ +void REGPARAM2 op_30bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regflags.cznv = oldflags.cznv; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +void REGPARAM2 op_30c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + ipl_fetch_next_pre(); + if (dsta & 1) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +void REGPARAM2 op_30c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + ipl_fetch_next_pre(); + if (dsta & 1) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +void REGPARAM2 op_30d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +void REGPARAM2 op_30d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +void REGPARAM2 op_30e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +void REGPARAM2 op_30e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +void REGPARAM2 op_30f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +void REGPARAM2 op_30f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +void REGPARAM2 op_30f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +void REGPARAM2 op_30fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_30fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,(An)+ */ +void REGPARAM2 op_30fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +void REGPARAM2 op_3100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +void REGPARAM2 op_3108_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +void REGPARAM2 op_3110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +void REGPARAM2 op_3118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +void REGPARAM2 op_3120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.loop_mode = loop_mode; + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +void REGPARAM2 op_3128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +void REGPARAM2 op_3130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,-(An) */ +void REGPARAM2 op_3138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +void REGPARAM2 op_3139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(8); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +void REGPARAM2 op_313a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +void REGPARAM2 op_313b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,-(An) */ +void REGPARAM2 op_313c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(6); + get_word_ce000_prefetch((m68k_getpci() & 1) ? -1 : 0); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +void REGPARAM2 op_3140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +void REGPARAM2 op_3148_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +void REGPARAM2 op_3150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +void REGPARAM2 op_3158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +void REGPARAM2 op_3160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +void REGPARAM2 op_3168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_3170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +void REGPARAM2 op_3178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +void REGPARAM2 op_3179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +void REGPARAM2 op_317a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_317b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W #.W,(d16,An) */ +void REGPARAM2 op_317c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_3180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +void REGPARAM2 op_3188_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +void REGPARAM2 op_3190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +void REGPARAM2 op_3198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +void REGPARAM2 op_31a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_31a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_31b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_31b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 4,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_31ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_31bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 6 4,0 */ + +/* MOVE.W Dn,(xxx).W */ +void REGPARAM2 op_31c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +void REGPARAM2 op_31c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +void REGPARAM2 op_31d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +void REGPARAM2 op_31d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +void REGPARAM2 op_31e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +void REGPARAM2 op_31e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_31f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +void REGPARAM2 op_31f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +void REGPARAM2 op_31f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +void REGPARAM2 op_31fa_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_31fb_13_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).W */ +void REGPARAM2 op_31fc_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +void REGPARAM2 op_33c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +void REGPARAM2 op_33c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +void REGPARAM2 op_33d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +void REGPARAM2 op_33d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +void REGPARAM2 op_33e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +void REGPARAM2 op_33e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_33f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +void REGPARAM2 op_33f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +void REGPARAM2 op_33f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(10); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (6/1) */ +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +void REGPARAM2 op_33fa_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_33fb_13_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + regs.irc = dsta >> 16; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + regs.irc = dsta >> 16; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.W #.W,(xxx).L */ +void REGPARAM2 op_33fc_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, pcoffset); + return; + } + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 8 0,0 */ + +/* NEGX.B Dn */ +void REGPARAM2 op_4000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEGX.B (An) */ +void REGPARAM2 op_4010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +void REGPARAM2 op_4018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.B -(An) */ +void REGPARAM2 op_4020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +void REGPARAM2 op_4028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +void REGPARAM2 op_4030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEGX.B (xxx).W */ +void REGPARAM2 op_4038_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +void REGPARAM2 op_4039_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEGX.W Dn */ +void REGPARAM2 op_4040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEGX.W (An) */ +void REGPARAM2 op_4050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +void REGPARAM2 op_4058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.W -(An) */ +void REGPARAM2 op_4060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +void REGPARAM2 op_4068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +void REGPARAM2 op_4070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEGX.W (xxx).W */ +void REGPARAM2 op_4078_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +void REGPARAM2 op_4079_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEGX.L Dn */ +void REGPARAM2 op_4080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (newv); + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NEGX.L (An) */ +void REGPARAM2 op_4090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +void REGPARAM2 op_4098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEGX.L -(An) */ +void REGPARAM2 op_40a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +void REGPARAM2 op_40a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +void REGPARAM2 op_40b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NEGX.L (xxx).W */ +void REGPARAM2 op_40b8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +void REGPARAM2 op_40b9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MVSR2.W Dn */ +void REGPARAM2 op_40c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + regs.ir = regs.irc; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVSR2.W (An) */ +void REGPARAM2 op_40d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return; + } + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +void REGPARAM2 op_40d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return; + } + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +void REGPARAM2 op_40e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return; + } + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +void REGPARAM2 op_40e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return; + } + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +void REGPARAM2 op_40f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return; + } + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +void REGPARAM2 op_40f8_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return; + } + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +void REGPARAM2 op_40f9_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(8); + exception3_write(opcode, srca, 1, regs.sr & 0xffff, 1); + return; + } + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* CHK.W Dn,Dn */ +void REGPARAM2 op_4180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (1/0) */ +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +void REGPARAM2 op_4190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +void REGPARAM2 op_4198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +void REGPARAM2 op_41a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/0) */ +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +void REGPARAM2 op_41a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +void REGPARAM2 op_41b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 4,0 */ + +/* CHK.W (xxx).W,Dn */ +void REGPARAM2 op_41b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +void REGPARAM2 op_41b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +void REGPARAM2 op_41ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_41bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 4,0 */ + +/* CHK.W #.W,Dn */ +void REGPARAM2 op_41bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (An),An */ +void REGPARAM2 op_41d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +void REGPARAM2 op_41e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +void REGPARAM2 op_41f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 4,0 */ + +/* LEA.L (xxx).W,An */ +void REGPARAM2 op_41f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +void REGPARAM2 op_41f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +void REGPARAM2 op_41fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_41fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 4,0 */ + +/* CLR.B Dn */ +void REGPARAM2 op_4200_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + regs.ir = regs.irc; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CLR.B (An) */ +void REGPARAM2 op_4210_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* CLR.B (An)+ */ +void REGPARAM2 op_4218_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* CLR.B -(An) */ +void REGPARAM2 op_4220_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +void REGPARAM2 op_4228_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +void REGPARAM2 op_4230_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +void REGPARAM2 op_4238_13_ff(uae_u32 opcode) +{ + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +void REGPARAM2 op_4239_13_ff(uae_u32 opcode) +{ + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* CLR.W Dn */ +void REGPARAM2 op_4240_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + regs.ir = regs.irc; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CLR.W (An) */ +void REGPARAM2 op_4250_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* CLR.W (An)+ */ +void REGPARAM2 op_4258_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += 2; + if(srca & 1) { + m68k_areg(regs, srcreg) -= 2; + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) -= 2; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* CLR.W -(An) */ +void REGPARAM2 op_4260_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + if(srca & 1) { + m68k_areg(regs, srcreg) += 2; + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) += 2; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +void REGPARAM2 op_4268_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + if(srca & 1) { + get_word_ce000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +void REGPARAM2 op_4270_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + if(srca & 1) { + get_word_ce000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +void REGPARAM2 op_4278_13_ff(uae_u32 opcode) +{ + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + if(srca & 1) { + get_word_ce000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +void REGPARAM2 op_4279_13_ff(uae_u32 opcode) +{ + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + if(srca & 1) { + get_word_ce000_prefetch(8); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(8); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* CLR.L Dn */ +void REGPARAM2 op_4280_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CLR.L (An) */ +void REGPARAM2 op_4290_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* CLR.L (An)+ */ +void REGPARAM2 op_4298_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += 4; + if(srca & 1) { + m68k_areg(regs, srcreg) -= 4; + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) -= 4; + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) -= 4; + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* CLR.L -(An) */ +void REGPARAM2 op_42a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + if(srca & 1) { + m68k_areg(regs, srcreg) += 4; + srca += 2; + m68k_incpci(4); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 4 << 16; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode &= 0xffff0000; + loop_mode |= 1; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) += 4; + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + regflags.cznv = oldflags.cznv; + m68k_areg(regs, srcreg) += 4; + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (1/2) */ +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +void REGPARAM2 op_42a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + if(srca & 1) { + srca += 2; + get_word_ce000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +void REGPARAM2 op_42b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + if(srca & 1) { + srca += 2; + get_word_ce000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +void REGPARAM2 op_42b8_13_ff(uae_u32 opcode) +{ + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + if(srca & 1) { + srca += 2; + get_word_ce000_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(6); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +void REGPARAM2 op_42b9_13_ff(uae_u32 opcode) +{ + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + if(srca & 1) { + srca += 2; + get_word_ce000_prefetch(8); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(8); + exception3_write(opcode, srca, 1, 0, 1); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + regs.ir = regs.irc; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return; + } + x_put_word(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return; + } + x_put_word(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(4); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return; + } + x_put_word(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return; + } + x_put_word(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return; + } + x_put_word(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(6); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return; + } + x_put_word(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + MakeSR(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + if(srca & 1) { + m68k_incpci(8); + exception3_write(opcode, srca, 1, regs.sr & 0xff, 1); + return; + } + x_put_word(srca, regs.sr & 0xff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, regs.sr & 0xff, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +void REGPARAM2 op_4400_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEG.B (An) */ +void REGPARAM2 op_4410_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.B (An)+ */ +void REGPARAM2 op_4418_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.B -(An) */ +void REGPARAM2 op_4420_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +void REGPARAM2 op_4428_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +void REGPARAM2 op_4430_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEG.B (xxx).W */ +void REGPARAM2 op_4438_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +void REGPARAM2 op_4439_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEG.W Dn */ +void REGPARAM2 op_4440_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEG.W (An) */ +void REGPARAM2 op_4450_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.W (An)+ */ +void REGPARAM2 op_4458_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.W -(An) */ +void REGPARAM2 op_4460_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +void REGPARAM2 op_4468_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +void REGPARAM2 op_4470_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEG.W (xxx).W */ +void REGPARAM2 op_4478_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +void REGPARAM2 op_4479_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEG.L Dn */ +void REGPARAM2 op_4480_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, dst); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (dst); + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NEG.L (An) */ +void REGPARAM2 op_4490_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEG.L (An)+ */ +void REGPARAM2 op_4498_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEG.L -(An) */ +void REGPARAM2 op_44a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +void REGPARAM2 op_44a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +void REGPARAM2 op_44b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NEG.L (xxx).W */ +void REGPARAM2 op_44b8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +void REGPARAM2 op_44b9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MV2SR.B Dn */ +void REGPARAM2 op_44c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* MV2SR.B (An) */ +void REGPARAM2 op_44d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +void REGPARAM2 op_44d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +void REGPARAM2 op_44e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +void REGPARAM2 op_44e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +void REGPARAM2 op_44f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +void REGPARAM2 op_44f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +void REGPARAM2 op_44f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +void REGPARAM2 op_44fa_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +void REGPARAM2 op_44fb_13_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.B #.B */ +void REGPARAM2 op_44fc_13_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* NOT.B Dn */ +void REGPARAM2 op_4600_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NOT.B (An) */ +void REGPARAM2 op_4610_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.B (An)+ */ +void REGPARAM2 op_4618_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.B -(An) */ +void REGPARAM2 op_4620_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +void REGPARAM2 op_4628_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +void REGPARAM2 op_4630_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NOT.B (xxx).W */ +void REGPARAM2 op_4638_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +void REGPARAM2 op_4639_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NOT.W Dn */ +void REGPARAM2 op_4640_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NOT.W (An) */ +void REGPARAM2 op_4650_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.W (An)+ */ +void REGPARAM2 op_4658_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.W -(An) */ +void REGPARAM2 op_4660_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +void REGPARAM2 op_4668_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +void REGPARAM2 op_4670_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NOT.W (xxx).W */ +void REGPARAM2 op_4678_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +void REGPARAM2 op_4679_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NOT.L Dn */ +void REGPARAM2 op_4680_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, dst); + SET_VFLG(0);SET_ZFLG(!dst); + SET_NFLG(dst & 0x80000000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (dst); + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NOT.L (An) */ +void REGPARAM2 op_4690_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NOT.L (An)+ */ +void REGPARAM2 op_4698_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NOT.L -(An) */ +void REGPARAM2 op_46a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +void REGPARAM2 op_46a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +void REGPARAM2 op_46b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NOT.L (xxx).W */ +void REGPARAM2 op_46b8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +void REGPARAM2 op_46b9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MV2SR.W Dn */ +void REGPARAM2 op_46c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s16 src = m68k_dreg(regs, srcreg); + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* MV2SR.W (An) */ +void REGPARAM2 op_46d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +void REGPARAM2 op_46d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +void REGPARAM2 op_46e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +void REGPARAM2 op_46e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +void REGPARAM2 op_46f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +void REGPARAM2 op_46f8_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +void REGPARAM2 op_46f9_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +void REGPARAM2 op_46fa_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +void REGPARAM2 op_46fb_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.W #.W */ +void REGPARAM2 op_46fc_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* NBCD.B Dn */ +void REGPARAM2 op_4800_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NBCD.B (An) */ +void REGPARAM2 op_4810_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +void REGPARAM2 op_4818_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NBCD.B -(An) */ +void REGPARAM2 op_4820_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +void REGPARAM2 op_4828_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +void REGPARAM2 op_4830_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NBCD.B (xxx).W */ +void REGPARAM2 op_4838_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +void REGPARAM2 op_4839_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SWAP.W Dn */ +void REGPARAM2 op_4840_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + m68k_dreg(regs, srcreg) = (dst); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4848_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + do_cycles_ce000_internal(4); + op_illg_noret(opcode); + return; +} +/* 4 (0/0) */ +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +void REGPARAM2 op_4850_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +void REGPARAM2 op_4868_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +void REGPARAM2 op_4870_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(4); + return; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* PEA.L (xxx).W */ +void REGPARAM2 op_4878_13_ff(uae_u32 opcode) +{ + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +void REGPARAM2 op_4879_13_ff(uae_u32 opcode) +{ + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +void REGPARAM2 op_487a_13_ff(uae_u32 opcode) +{ + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +void REGPARAM2 op_487b_13_ff(uae_u32 opcode) +{ + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_u16 old_opcode = opcode; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(4); + return; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* EXT.W Dn */ +void REGPARAM2 op_4880_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +void REGPARAM2 op_4890_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + regs.read_buffer = mask; + m68k_incpci(6); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +void REGPARAM2 op_48a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + srca -= 2; + uaecptr srcav = srca; + if(amask) { + srcav = m68k_areg(regs, movem_index2[amask]); + } else if (dmask) { + srcav = m68k_dreg(regs, movem_index2[dmask]); + } + regs.read_buffer = mask; + m68k_incpci(6); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (amask) { + srca -= 2; + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index2[amask]), 1); + return; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index2[dmask]), 1); + return; + } + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +void REGPARAM2 op_48a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_48b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 14+ (3/0) */ +/* 6 4,0 */ + +/* MVMLE.W #.W,(xxx).W */ +void REGPARAM2 op_48b8_13_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +void REGPARAM2 op_48b9_13_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += 2; + exception2_fetch(opcode, 8, pcoffset); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 0; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 0; + } + m68k_incpci(10); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 16+ (4/0) */ +/* 8 0,0 */ + +/* EXT.L Dn */ +void REGPARAM2 op_48c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +void REGPARAM2 op_48d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + regs.read_buffer = mask; + m68k_incpci(6); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +void REGPARAM2 op_48e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + srca -= 2; + uaecptr srcav = srca; + if(amask) { + srcav = m68k_areg(regs, movem_index2[amask]); + } else if (dmask) { + srcav = m68k_dreg(regs, movem_index2[dmask]); + } + regs.read_buffer = mask; + m68k_incpci(6); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (amask) { + x_put_word(srca - 2, m68k_areg(regs, movem_index2[amask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -2, 0x1, m68k_areg(regs, movem_index2[amask]), 1); + return; + } + x_put_word(srca - 4, m68k_areg(regs, movem_index2[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -4, 0x1, m68k_areg(regs, movem_index2[amask]) >> 16, 1); + return; + } + srca -= 4; + amask = movem_next[amask]; + } + while (dmask) { + x_put_word(srca - 2, m68k_dreg(regs, movem_index2[dmask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -2, 0x1, m68k_dreg(regs, movem_index2[dmask]), 1); + return; + } + x_put_word(srca - 4, m68k_dreg(regs, movem_index2[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -4, 0x1, m68k_dreg(regs, movem_index2[dmask]) >> 16, 1); + return; + } + srca -= 4; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +void REGPARAM2 op_48e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_48f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 14+ (3/0) */ +/* 6 4,0 */ + +/* MVMLE.L #.W,(xxx).W */ +void REGPARAM2 op_48f8_13_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +void REGPARAM2 op_48f9_13_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += 2; + exception2_fetch(opcode, 8, pcoffset); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + if(dmask) { + srcav = m68k_dreg(regs, movem_index1[dmask]) >> 16; + } else if (amask) { + srcav = m68k_areg(regs, movem_index1[amask]) >> 16; + } + m68k_incpci(10); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 16+ (4/0) */ +/* 8 0,0 */ + +/* TST.B Dn */ +void REGPARAM2 op_4a00_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.B (An) */ +void REGPARAM2 op_4a10_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.B (An)+ */ +void REGPARAM2 op_4a18_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.B -(An) */ +void REGPARAM2 op_4a20_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* TST.B (d16,An) */ +void REGPARAM2 op_4a28_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +void REGPARAM2 op_4a30_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* TST.B (xxx).W */ +void REGPARAM2 op_4a38_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.B (xxx).L */ +void REGPARAM2 op_4a39_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* TST.W Dn */ +void REGPARAM2 op_4a40_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.W (An) */ +void REGPARAM2 op_4a50_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.W (An)+ */ +void REGPARAM2 op_4a58_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.W -(An) */ +void REGPARAM2 op_4a60_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* TST.W (d16,An) */ +void REGPARAM2 op_4a68_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +void REGPARAM2 op_4a70_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* TST.W (xxx).W */ +void REGPARAM2 op_4a78_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.W (xxx).L */ +void REGPARAM2 op_4a79_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* TST.L Dn */ +void REGPARAM2 op_4a80_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.L (An) */ +void REGPARAM2 op_4a90_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* TST.L (An)+ */ +void REGPARAM2 op_4a98_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* TST.L -(An) */ +void REGPARAM2 op_4aa0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* TST.L (d16,An) */ +void REGPARAM2 op_4aa8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +void REGPARAM2 op_4ab0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* TST.L (xxx).W */ +void REGPARAM2 op_4ab8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* TST.L (xxx).L */ +void REGPARAM2 op_4ab9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* TAS.B Dn */ +void REGPARAM2 op_4ac0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TAS.B (An) */ +void REGPARAM2 op_4ad0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + uae_u8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* TAS.B (An)+ */ +void REGPARAM2 op_4ad8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 14 (1/1) */ +/* 2 0,0 */ + +/* TAS.B -(An) */ +void REGPARAM2 op_4ae0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + m68k_areg(regs, srcreg) = srca; + uae_u8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 14 (1/1) */ +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +void REGPARAM2 op_4ae8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + m68k_incpci(2); + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (2/1) */ +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +void REGPARAM2 op_4af0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + m68k_incpci(2); + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 18 (2/1) */ +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +void REGPARAM2 op_4af8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + m68k_incpci(2); + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (2/1) */ +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +void REGPARAM2 op_4af9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_u8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + regs.read_buffer = regs.irc & 0xff00; + regs.read_buffer |= 0x80; + m68k_incpci(2); + opcode |= 0x80000; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(8); + opcode |= 0x80000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18 (3/1) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(An) */ +void REGPARAM2 op_4c90_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +void REGPARAM2 op_4c98_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + ipl_fetch_now(); + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +void REGPARAM2 op_4ca8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cb0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.W #.W,(xxx).W */ +void REGPARAM2 op_4cb8_13_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +void REGPARAM2 op_4cb9_13_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20+ (5/0) */ +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +void REGPARAM2 op_4cba_13_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 2); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cbb_13_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + do_cycles_ce000_internal(2); + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 4; + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 2); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.L #.W,(An) */ +void REGPARAM2 op_4cd0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +void REGPARAM2 op_4cd8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + ipl_fetch_now(); + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +void REGPARAM2 op_4ce8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cf0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.L #.W,(xxx).W */ +void REGPARAM2 op_4cf8_13_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +void REGPARAM2 op_4cf9_13_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20+ (5/0) */ +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +void REGPARAM2 op_4cfa_13_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 2); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cfb_13_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + do_cycles_ce000_internal(2); + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 4; + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 2); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* TRAPQ.L # */ +void REGPARAM2 op_4e40_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpci(2); + Exception_cpu(src + 32); + return; + return; +} +/* 4 (0/0) */ +/* 2 0,0 */ + +/* LINK.W An,#.W */ +void REGPARAM2 op_4e50_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + ipl_fetch_now(); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch(opcode, 4, 2); + return; + } + if (olda & 1) { + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + m68k_incpci(6); + exception3_write_access(opcode, olda, sz_word, src >> 16, 1); + return; + } + x_put_word(olda, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + exception2_write(opcode, olda + 0, 0x1, src >> 16, 1); + return; + } + x_put_word(olda + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + exception2_write(opcode, olda + 2, 0x1, src, 1); + return; + } + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* UNLK.L An */ +void REGPARAM2 op_4e58_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + ipl_fetch_now(); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + if (olda & 1) { + m68k_incpci(4); + exception3_read_access(opcode, olda, 2, 1); + return; + } + uae_s32 old = x_get_word(olda) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, olda + 0, 0x1, 1); + return; + } + old |= x_get_word(olda + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, olda + 2, 0x1, 1); + return; + } + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = (old); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MVR2USP.L An */ +void REGPARAM2 op_4e60_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVUSP2R.L An */ +void REGPARAM2 op_4e68_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_areg(regs, srcreg) = (regs.usp); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* RESET.L */ +void REGPARAM2 op_4e70_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + bool r = cpureset(); + do_cycles_ce000_internal(128); + if (r) { + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 132 (1/0) */ +/* 2 0,0 */ + +/* NOP.L */ +void REGPARAM2 op_4e71_13_ff(uae_u32 opcode) +{ + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* STOP.L #.W */ +void REGPARAM2 op_4e72_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + if (!regs.stopped) { + uae_u16 src = regs.irc; + regs.irc = src; + } + uae_u16 sr = regs.irc; + ipl_fetch_next(); + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return; +} +/* 4 (0/0) */ + +/* RTE.L */ +void REGPARAM2 op_4e73_13_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 newsr; + uae_u32 newpc; + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + if(hardware_bus_error) { + exception2_read(opcode, a + 0, 0x1, 1); + return; + } + uae_u16 format = x_get_word(a + 2 + 4); + if(hardware_bus_error) { + exception2_read(opcode, a + 6, 0x1, 1); + return; + } + uae_u32 pc = x_get_word(a + 2) << 16; + if(hardware_bus_error) { + exception2_read(opcode, a + 2, 0x1, 1); + return; + } + int frame = format >> 12; + int offset = 8; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; + } else if (frame == 0x8) { + m68k_areg(regs, 7) += offset + 50; + } else { + SET_NFLG(((uae_s16)format) < 0); + SET_ZFLG(format == 0); + SET_VFLG(0); + Exception_cpu(14); + return; + } + pc |= x_get_word(a + 2 + 2); + if(hardware_bus_error) { + exception2_read(opcode, a + 4, 0x1, 1); + return; + } + regs.sr = sr; + MakeFromSR(); + if (pc & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, pc); + return; + } + newsr = sr; newpc = pc; + m68k_setpci_j(newpc); + branch_stack_pop_rte(oldpc); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (6/0) */ +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e74_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uaecptr pca; + pca = m68k_areg(regs, 7); + if (pca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, pca, 2, 1); + return; + } + uae_s32 pc = x_get_word(pca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 0, 0x1, 1); + return; + } + pc |= x_get_word(pca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 2, 0x1, 1); + return; + } + m68k_areg(regs, 7) += 4; + uae_s16 offs = regs.irc; + m68k_areg(regs, 7) += offs; + if (pc & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, pc); + return; + } + m68k_setpci_j(pc); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 B */ + +#endif +/* RTS.L */ +void REGPARAM2 op_4e75_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return; + } + uaecptr newpc, dsta = m68k_areg(regs, 7); + newpc = x_get_word(dsta) << 16; + if(hardware_bus_error) { + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + newpc |= x_get_word(dsta + 2); + if(hardware_bus_error) { + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, 7) += 4; + m68k_setpci_j(newpc); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 2 0,0 B */ + +/* TRAPV.L */ +void REGPARAM2 op_4e76_13_ff(uae_u32 opcode) +{ + m68k_incpci(2); + if (GET_VFLG()) { + do_cycles_ce000_internal(2); + Exception_cpu(7); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* RTR.L */ +void REGPARAM2 op_4e77_13_ff(uae_u32 opcode) +{ + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return; + } + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + if (sra & 1) { + m68k_incpci(2); + exception3_read_access(opcode, sra, 1, 1); + return; + } + uae_s16 sr = x_get_word(sra); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, sra + 0, 0x1, 1); + return; + } + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + if (pca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, pca, 2, 1); + return; + } + uae_s32 pc = x_get_word(pca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 0, 0x1, 1); + return; + } + pc |= x_get_word(pca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 2, 0x1, 1); + return; + } + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci_j(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (5/0) */ +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7a_13_ff(uae_u32 opcode) +{ + if(!regs.s) { + Exception(8); + return; + } + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_now(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return; + } + do_cycles_ce000_internal(4); + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7b_13_ff(uae_u32 opcode) +{ + if(!regs.s) { + Exception(8); + return; + } + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_now(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return; + } + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +void REGPARAM2 op_4e90_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(0, 2, 0); + return; + } + return; +} +/* 16 (2/2) */ +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +void REGPARAM2 op_4ea8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +void REGPARAM2 op_4eb0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + do_cycles_ce000_internal(6); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(6); + nextpc += 2; + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 22 (2/2) */ +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +void REGPARAM2 op_4eb8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(4); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +void REGPARAM2 op_4eb9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + srca |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +void REGPARAM2 op_4eba_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +void REGPARAM2 op_4ebb_13_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + do_cycles_ce000_internal(6); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(6); + nextpc += 2; + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 22 (2/2) */ +/* 2 2,0 B */ + +/* JMP.L (An) */ +void REGPARAM2 op_4ed0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(0, 2, 0); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +void REGPARAM2 op_4ee8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +void REGPARAM2 op_4ef0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(6); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(6); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 14 (2/0) */ +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +void REGPARAM2 op_4ef8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +void REGPARAM2 op_4ef9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + srca |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 12 (3/0) */ +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +void REGPARAM2 op_4efa_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +void REGPARAM2 op_4efb_13_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(6); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(6); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 14 (2/0) */ +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +void REGPARAM2 op_5000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +void REGPARAM2 op_5010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +void REGPARAM2 op_5018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +void REGPARAM2 op_5020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +void REGPARAM2 op_5028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADDQ.B #,(xxx).W */ +void REGPARAM2 op_5038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +void REGPARAM2 op_5039_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +void REGPARAM2 op_5040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +void REGPARAM2 op_5048_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +void REGPARAM2 op_5050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +void REGPARAM2 op_5058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +void REGPARAM2 op_5060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +void REGPARAM2 op_5068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADDQ.W #,(xxx).W */ +void REGPARAM2 op_5078_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +void REGPARAM2 op_5079_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +void REGPARAM2 op_5080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +void REGPARAM2 op_5088_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +void REGPARAM2 op_5090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +void REGPARAM2 op_5098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +void REGPARAM2 op_50a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +void REGPARAM2 op_50a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_50b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* ADDQ.L #,(xxx).W */ +void REGPARAM2 op_50b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +void REGPARAM2 op_50b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +void REGPARAM2 op_50c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +void REGPARAM2 op_50c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(0) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +void REGPARAM2 op_50d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +void REGPARAM2 op_50d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +void REGPARAM2 op_50e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +void REGPARAM2 op_50e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +void REGPARAM2 op_50f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +void REGPARAM2 op_50f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +void REGPARAM2 op_50f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* SUBQ.B #,Dn */ +void REGPARAM2 op_5100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +void REGPARAM2 op_5110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +void REGPARAM2 op_5118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +void REGPARAM2 op_5120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +void REGPARAM2 op_5128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUBQ.B #,(xxx).W */ +void REGPARAM2 op_5138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +void REGPARAM2 op_5139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +void REGPARAM2 op_5140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +void REGPARAM2 op_5148_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +void REGPARAM2 op_5150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +void REGPARAM2 op_5158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +void REGPARAM2 op_5160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +void REGPARAM2 op_5168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUBQ.W #,(xxx).W */ +void REGPARAM2 op_5178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +void REGPARAM2 op_5179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +void REGPARAM2 op_5180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +void REGPARAM2 op_5188_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +void REGPARAM2 op_5190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +void REGPARAM2 op_5198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +void REGPARAM2 op_51a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +void REGPARAM2 op_51a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_51b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* SUBQ.L #,(xxx).W */ +void REGPARAM2 op_51b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +void REGPARAM2 op_51b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +void REGPARAM2 op_51c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +void REGPARAM2 op_51c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(1) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +void REGPARAM2 op_51d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +void REGPARAM2 op_51d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +void REGPARAM2 op_51e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +void REGPARAM2 op_51e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +void REGPARAM2 op_51f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +void REGPARAM2 op_51f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +void REGPARAM2 op_51f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +void REGPARAM2 op_52c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +void REGPARAM2 op_52c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(2) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +void REGPARAM2 op_52d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +void REGPARAM2 op_52d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +void REGPARAM2 op_52e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +void REGPARAM2 op_52e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +void REGPARAM2 op_52f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +void REGPARAM2 op_52f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +void REGPARAM2 op_52f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +void REGPARAM2 op_53c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +void REGPARAM2 op_53c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(3) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +void REGPARAM2 op_53d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +void REGPARAM2 op_53d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +void REGPARAM2 op_53e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +void REGPARAM2 op_53e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +void REGPARAM2 op_53f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +void REGPARAM2 op_53f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +void REGPARAM2 op_53f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +void REGPARAM2 op_54c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +void REGPARAM2 op_54c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(4) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +void REGPARAM2 op_54d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +void REGPARAM2 op_54d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +void REGPARAM2 op_54e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +void REGPARAM2 op_54e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +void REGPARAM2 op_54f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +void REGPARAM2 op_54f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +void REGPARAM2 op_54f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +void REGPARAM2 op_55c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +void REGPARAM2 op_55c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(5) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +void REGPARAM2 op_55d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +void REGPARAM2 op_55d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +void REGPARAM2 op_55e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +void REGPARAM2 op_55e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +void REGPARAM2 op_55f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +void REGPARAM2 op_55f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +void REGPARAM2 op_55f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +void REGPARAM2 op_56c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +void REGPARAM2 op_56c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(6) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +void REGPARAM2 op_56d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +void REGPARAM2 op_56d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +void REGPARAM2 op_56e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +void REGPARAM2 op_56e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +void REGPARAM2 op_56f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +void REGPARAM2 op_56f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +void REGPARAM2 op_56f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +void REGPARAM2 op_57c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +void REGPARAM2 op_57c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(7) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +void REGPARAM2 op_57d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +void REGPARAM2 op_57d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +void REGPARAM2 op_57e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +void REGPARAM2 op_57e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +void REGPARAM2 op_57f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +void REGPARAM2 op_57f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +void REGPARAM2 op_57f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +void REGPARAM2 op_58c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +void REGPARAM2 op_58c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(8) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +void REGPARAM2 op_58d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +void REGPARAM2 op_58d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +void REGPARAM2 op_58e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +void REGPARAM2 op_58e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +void REGPARAM2 op_58f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +void REGPARAM2 op_58f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +void REGPARAM2 op_58f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +void REGPARAM2 op_59c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +void REGPARAM2 op_59c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(9) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +void REGPARAM2 op_59d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +void REGPARAM2 op_59d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +void REGPARAM2 op_59e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +void REGPARAM2 op_59e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +void REGPARAM2 op_59f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +void REGPARAM2 op_59f8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +void REGPARAM2 op_59f9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +void REGPARAM2 op_5ac0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +void REGPARAM2 op_5ac8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(10) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +void REGPARAM2 op_5ad0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +void REGPARAM2 op_5ad8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +void REGPARAM2 op_5ae0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +void REGPARAM2 op_5ae8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +void REGPARAM2 op_5af0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +void REGPARAM2 op_5af8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +void REGPARAM2 op_5af9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +void REGPARAM2 op_5bc0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +void REGPARAM2 op_5bc8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(11) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +void REGPARAM2 op_5bd0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +void REGPARAM2 op_5bd8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +void REGPARAM2 op_5be0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +void REGPARAM2 op_5be8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +void REGPARAM2 op_5bf0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +void REGPARAM2 op_5bf8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +void REGPARAM2 op_5bf9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +void REGPARAM2 op_5cc0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +void REGPARAM2 op_5cc8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(12) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +void REGPARAM2 op_5cd0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +void REGPARAM2 op_5cd8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +void REGPARAM2 op_5ce0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +void REGPARAM2 op_5ce8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +void REGPARAM2 op_5cf0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +void REGPARAM2 op_5cf8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +void REGPARAM2 op_5cf9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +void REGPARAM2 op_5dc0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +void REGPARAM2 op_5dc8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(13) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +void REGPARAM2 op_5dd0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +void REGPARAM2 op_5dd8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +void REGPARAM2 op_5de0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +void REGPARAM2 op_5de8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +void REGPARAM2 op_5df0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +void REGPARAM2 op_5df8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +void REGPARAM2 op_5df9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +void REGPARAM2 op_5ec0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +void REGPARAM2 op_5ec8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(14) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +void REGPARAM2 op_5ed0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +void REGPARAM2 op_5ed8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +void REGPARAM2 op_5ee0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +void REGPARAM2 op_5ee8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +void REGPARAM2 op_5ef0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +void REGPARAM2 op_5ef8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +void REGPARAM2 op_5ef9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +void REGPARAM2 op_5fc0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +void REGPARAM2 op_5fc8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + int was_loop_mode = regs.loop_mode; + regs.loop_mode = 0; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + get_word_ce000_prefetch(-1); + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if(offs == -4 && !regs.t1 && loop_mode_table[regs.ird]) { + if(!was_loop_mode) { + uae_u16 irc = regs.irc; + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + regs.irc = irc; + } else { + do_cycles_ce000_internal(2); + } + regs.loop_mode = 1; + src = m68k_dreg(regs, srcreg); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + loop_mode_table[regs.ird](regs.ird); + // quick exit if condition false and count expired + if (!cctrue(15) && (m68k_dreg(regs, srcreg) & 0xffff) == 0) { + m68k_dreg(regs, srcreg) |= 0xffff; + // loop exit: add possible extra cycle(s) + if(regs.loop_mode >> 16) { + do_cycles_ce000_internal(regs.loop_mode >> 16); + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + // loop continue: add possible extra cycle(s) + if(regs.loop_mode & 0xfffe) { + do_cycles_ce000_internal(regs.loop_mode & 0xfffe); + } + m68k_setpci_j(oldpc); + ipl_fetch_now(); + return; + } + regs.loop_mode = 0; + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_setpci_j(oldpc + 2); + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + do_cycles_ce000_internal(2); + pcadjust = 0; + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +void REGPARAM2 op_5fd0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 10 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +void REGPARAM2 op_5fd8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +void REGPARAM2 op_5fe0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(4); + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +void REGPARAM2 op_5fe8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +void REGPARAM2 op_5ff0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + do_cycles_ce000_internal(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +void REGPARAM2 op_5ff8_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +void REGPARAM2 op_5ff9_13_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* Bcc.W #.W (T) */ +void REGPARAM2 op_6000_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +void REGPARAM2 op_6001_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +void REGPARAM2 op_60ff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(0)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* BSR.W #.W */ +void REGPARAM2 op_6100_13_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = regs.irc; + s = (uae_s32)src + 2; + do_cycles_ce000_internal(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return; + } + if (s & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + m68k_incpci(s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + ipl_fetch_next(); + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* BSRQ.B # */ +void REGPARAM2 op_6101_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + do_cycles_ce000_internal(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return; + } + if (s & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + m68k_incpci(s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + ipl_fetch_next(); + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 2 0,0 B */ + +/* BSR.L #.L */ +void REGPARAM2 op_61ff_13_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + do_cycles_ce000_internal(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return; + } + if (s & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + m68k_incpci(s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + ipl_fetch_next(); + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 2 0,0 B */ + +/* Bcc.W #.W (HI) */ +void REGPARAM2 op_6200_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +void REGPARAM2 op_6201_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +void REGPARAM2 op_62ff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(2)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LS) */ +void REGPARAM2 op_6300_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +void REGPARAM2 op_6301_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +void REGPARAM2 op_63ff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(3)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (CC) */ +void REGPARAM2 op_6400_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +void REGPARAM2 op_6401_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +void REGPARAM2 op_64ff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(4)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (CS) */ +void REGPARAM2 op_6500_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +void REGPARAM2 op_6501_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +void REGPARAM2 op_65ff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(5)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (NE) */ +void REGPARAM2 op_6600_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +void REGPARAM2 op_6601_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +void REGPARAM2 op_66ff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(6)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (EQ) */ +void REGPARAM2 op_6700_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +void REGPARAM2 op_6701_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +void REGPARAM2 op_67ff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(7)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (VC) */ +void REGPARAM2 op_6800_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +void REGPARAM2 op_6801_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +void REGPARAM2 op_68ff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(8)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (VS) */ +void REGPARAM2 op_6900_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +void REGPARAM2 op_6901_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +void REGPARAM2 op_69ff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(9)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (PL) */ +void REGPARAM2 op_6a00_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +void REGPARAM2 op_6a01_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +void REGPARAM2 op_6aff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(10)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (MI) */ +void REGPARAM2 op_6b00_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +void REGPARAM2 op_6b01_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +void REGPARAM2 op_6bff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(11)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (GE) */ +void REGPARAM2 op_6c00_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +void REGPARAM2 op_6c01_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +void REGPARAM2 op_6cff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(12)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LT) */ +void REGPARAM2 op_6d00_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +void REGPARAM2 op_6d01_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +void REGPARAM2 op_6dff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(13)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (GT) */ +void REGPARAM2 op_6e00_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +void REGPARAM2 op_6e01_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +void REGPARAM2 op_6eff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(14)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LE) */ +void REGPARAM2 op_6f00_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +void REGPARAM2 op_6f01_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpci(); + uae_u16 rb = regs.irc; + m68k_incpci(((uae_s32)src + 2) & ~1); + get_word_ce000_prefetch(0); + m68k_setpci_j(oldpc); + uaecptr newpc = m68k_getpci() + (uae_s32)src + 2; + m68k_incpci(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 6 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +void REGPARAM2 op_6fff_13_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(15)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* MOVEQ.L #,Dn */ +void REGPARAM2 op_7000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +void REGPARAM2 op_8000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.B (An),Dn */ +void REGPARAM2 op_8010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +void REGPARAM2 op_8018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +void REGPARAM2 op_8020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +void REGPARAM2 op_8028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +void REGPARAM2 op_8030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.B (xxx).W,Dn */ +void REGPARAM2 op_8038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +void REGPARAM2 op_8039_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +void REGPARAM2 op_803a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_803b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.B #.B,Dn */ +void REGPARAM2 op_803c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +void REGPARAM2 op_8040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.W (An),Dn */ +void REGPARAM2 op_8050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +void REGPARAM2 op_8058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +void REGPARAM2 op_8060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +void REGPARAM2 op_8068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +void REGPARAM2 op_8070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.W (xxx).W,Dn */ +void REGPARAM2 op_8078_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +void REGPARAM2 op_8079_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +void REGPARAM2 op_807a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_807b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_807c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +void REGPARAM2 op_8080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* OR.L (An),Dn */ +void REGPARAM2 op_8090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +void REGPARAM2 op_8098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +void REGPARAM2 op_80a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +void REGPARAM2 op_80a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +void REGPARAM2 op_80b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +void REGPARAM2 op_80b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +void REGPARAM2 op_80b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +void REGPARAM2 op_80ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_80bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_80bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +void REGPARAM2 op_80c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +void REGPARAM2 op_80d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +void REGPARAM2 op_80d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +void REGPARAM2 op_80e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +void REGPARAM2 op_80e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_80f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVU.W (xxx).W,Dn */ +void REGPARAM2 op_80f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +void REGPARAM2 op_80f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +void REGPARAM2 op_80fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_80fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVU.W #.W,Dn */ +void REGPARAM2 op_80fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +void REGPARAM2 op_8100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +void REGPARAM2 op_8108_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + ipl_fetch_next_pre(); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +void REGPARAM2 op_8110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +void REGPARAM2 op_8118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +void REGPARAM2 op_8120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +void REGPARAM2 op_8128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_8130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* OR.B Dn,(xxx).W */ +void REGPARAM2 op_8138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +void REGPARAM2 op_8139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W Dn,(An) */ +void REGPARAM2 op_8150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +void REGPARAM2 op_8158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +void REGPARAM2 op_8160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +void REGPARAM2 op_8168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_8170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* OR.W Dn,(xxx).W */ +void REGPARAM2 op_8178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +void REGPARAM2 op_8179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.L Dn,(An) */ +void REGPARAM2 op_8190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +void REGPARAM2 op_8198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +void REGPARAM2 op_81a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +void REGPARAM2 op_81a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_81b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* OR.L Dn,(xxx).W */ +void REGPARAM2 op_81b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +void REGPARAM2 op_81b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +void REGPARAM2 op_81c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +void REGPARAM2 op_81d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +void REGPARAM2 op_81d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +void REGPARAM2 op_81e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +void REGPARAM2 op_81e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_81f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVS.W (xxx).W,Dn */ +void REGPARAM2 op_81f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +void REGPARAM2 op_81f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +void REGPARAM2 op_81fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_81fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVS.W #.W,Dn */ +void REGPARAM2 op_81fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +void REGPARAM2 op_9000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +void REGPARAM2 op_9010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +void REGPARAM2 op_9018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +void REGPARAM2 op_9020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +void REGPARAM2 op_9028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +void REGPARAM2 op_9030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.B (xxx).W,Dn */ +void REGPARAM2 op_9038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +void REGPARAM2 op_9039_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +void REGPARAM2 op_903a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_903b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.B #.B,Dn */ +void REGPARAM2 op_903c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +void REGPARAM2 op_9040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.W An,Dn */ +void REGPARAM2 op_9048_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +void REGPARAM2 op_9050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +void REGPARAM2 op_9058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +void REGPARAM2 op_9060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +void REGPARAM2 op_9068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +void REGPARAM2 op_9070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.W (xxx).W,Dn */ +void REGPARAM2 op_9078_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +void REGPARAM2 op_9079_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +void REGPARAM2 op_907a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_907b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_907c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +void REGPARAM2 op_9080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SUB.L An,Dn */ +void REGPARAM2 op_9088_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +void REGPARAM2 op_9090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +void REGPARAM2 op_9098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +void REGPARAM2 op_90a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +void REGPARAM2 op_90a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +void REGPARAM2 op_90b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +void REGPARAM2 op_90b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +void REGPARAM2 op_90b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +void REGPARAM2 op_90ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_90bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_90bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +void REGPARAM2 op_90c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.W An,An */ +void REGPARAM2 op_90c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.W (An),An */ +void REGPARAM2 op_90d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(4); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +void REGPARAM2 op_90d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(4); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +void REGPARAM2 op_90e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(4); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +void REGPARAM2 op_90e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +void REGPARAM2 op_90f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* SUBA.W (xxx).W,An */ +void REGPARAM2 op_90f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +void REGPARAM2 op_90f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +void REGPARAM2 op_90fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +void REGPARAM2 op_90fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* SUBA.W #.W,An */ +void REGPARAM2 op_90fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +void REGPARAM2 op_9100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +void REGPARAM2 op_9108_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +void REGPARAM2 op_9110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +void REGPARAM2 op_9118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +void REGPARAM2 op_9120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +void REGPARAM2 op_9128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_9130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUB.B Dn,(xxx).W */ +void REGPARAM2 op_9138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +void REGPARAM2 op_9139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +void REGPARAM2 op_9140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +void REGPARAM2 op_9148_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access2(opcode, dsta, 1, 1); + return; + } + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +void REGPARAM2 op_9150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +void REGPARAM2 op_9158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +void REGPARAM2 op_9160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +void REGPARAM2 op_9168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_9170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUB.W Dn,(xxx).W */ +void REGPARAM2 op_9178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +void REGPARAM2 op_9179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +void REGPARAM2 op_9180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_XFLG(GET_CFLG()); + SET_ZFLG(oldz); + if (newv & 0xffff) SET_ZFLG(0); + SET_NFLG(newv & 0x8000); + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +void REGPARAM2 op_9188_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + srca += 2; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + src |= x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + dsta += 2; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 30 (5/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +void REGPARAM2 op_9190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +void REGPARAM2 op_9198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +void REGPARAM2 op_91a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +void REGPARAM2 op_91a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_91b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* SUB.L Dn,(xxx).W */ +void REGPARAM2 op_91b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +void REGPARAM2 op_91b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +void REGPARAM2 op_91c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.L An,An */ +void REGPARAM2 op_91c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.L (An),An */ +void REGPARAM2 op_91d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +void REGPARAM2 op_91d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +void REGPARAM2 op_91e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +void REGPARAM2 op_91e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +void REGPARAM2 op_91f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUBA.L (xxx).W,An */ +void REGPARAM2 op_91f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +void REGPARAM2 op_91f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +void REGPARAM2 op_91fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +void REGPARAM2 op_91fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUBA.L #.L,An */ +void REGPARAM2 op_91fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +void REGPARAM2 op_b000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +void REGPARAM2 op_b010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +void REGPARAM2 op_b018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +void REGPARAM2 op_b020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +void REGPARAM2 op_b028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +void REGPARAM2 op_b030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.B (xxx).W,Dn */ +void REGPARAM2 op_b038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +void REGPARAM2 op_b039_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +void REGPARAM2 op_b03a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_b03b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.B #.B,Dn */ +void REGPARAM2 op_b03c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +void REGPARAM2 op_b040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.W An,Dn */ +void REGPARAM2 op_b048_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +void REGPARAM2 op_b050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +void REGPARAM2 op_b058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +void REGPARAM2 op_b060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +void REGPARAM2 op_b068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +void REGPARAM2 op_b070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.W (xxx).W,Dn */ +void REGPARAM2 op_b078_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +void REGPARAM2 op_b079_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +void REGPARAM2 op_b07a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_b07b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.W #.W,Dn */ +void REGPARAM2 op_b07c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +void REGPARAM2 op_b080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMP.L An,Dn */ +void REGPARAM2 op_b088_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +void REGPARAM2 op_b090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 2 << 16; + } + do_cycles_ce000_internal(2); + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +void REGPARAM2 op_b098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 2 << 16; + } + do_cycles_ce000_internal(2); + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +void REGPARAM2 op_b0a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 2 << 16; + } + do_cycles_ce000_internal(2); + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +void REGPARAM2 op_b0a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +void REGPARAM2 op_b0b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMP.L (xxx).W,Dn */ +void REGPARAM2 op_b0b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +void REGPARAM2 op_b0b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +void REGPARAM2 op_b0ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_b0bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMP.L #.L,Dn */ +void REGPARAM2 op_b0bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +void REGPARAM2 op_b0c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.W An,An */ +void REGPARAM2 op_b0c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.W (An),An */ +void REGPARAM2 op_b0d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +void REGPARAM2 op_b0d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +void REGPARAM2 op_b0e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +void REGPARAM2 op_b0e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +void REGPARAM2 op_b0f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 4,0 */ + +/* CMPA.W (xxx).W,An */ +void REGPARAM2 op_b0f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +void REGPARAM2 op_b0f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +void REGPARAM2 op_b0fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +void REGPARAM2 op_b0fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 4,0 */ + +/* CMPA.W #.W,An */ +void REGPARAM2 op_b0fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +void REGPARAM2 op_b100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +void REGPARAM2 op_b108_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg] + 0; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +void REGPARAM2 op_b110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +void REGPARAM2 op_b118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +void REGPARAM2 op_b120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +void REGPARAM2 op_b128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_b130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* EOR.B Dn,(xxx).W */ +void REGPARAM2 op_b138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +void REGPARAM2 op_b139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +void REGPARAM2 op_b140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +void REGPARAM2 op_b148_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dsta, 1, 1); + return; + } + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +void REGPARAM2 op_b150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +void REGPARAM2 op_b158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +void REGPARAM2 op_b160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +void REGPARAM2 op_b168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_b170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* EOR.W Dn,(xxx).W */ +void REGPARAM2 op_b178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +void REGPARAM2 op_b179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +void REGPARAM2 op_b180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +void REGPARAM2 op_b188_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 2; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (5/0) */ +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +void REGPARAM2 op_b190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +void REGPARAM2 op_b198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +void REGPARAM2 op_b1a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +void REGPARAM2 op_b1a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_b1b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* EOR.L Dn,(xxx).W */ +void REGPARAM2 op_b1b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +void REGPARAM2 op_b1b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +void REGPARAM2 op_b1c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.L An,An */ +void REGPARAM2 op_b1c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.L (An),An */ +void REGPARAM2 op_b1d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +void REGPARAM2 op_b1d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +void REGPARAM2 op_b1e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +void REGPARAM2 op_b1e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +void REGPARAM2 op_b1f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMPA.L (xxx).W,An */ +void REGPARAM2 op_b1f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +void REGPARAM2 op_b1f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +void REGPARAM2 op_b1fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +void REGPARAM2 op_b1fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMPA.L #.L,An */ +void REGPARAM2 op_b1fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +void REGPARAM2 op_c000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* AND.B (An),Dn */ +void REGPARAM2 op_c010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +void REGPARAM2 op_c018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +void REGPARAM2 op_c020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +void REGPARAM2 op_c028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +void REGPARAM2 op_c030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.B (xxx).W,Dn */ +void REGPARAM2 op_c038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +void REGPARAM2 op_c039_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +void REGPARAM2 op_c03a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_c03b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_c03c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +void REGPARAM2 op_c040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* AND.W (An),Dn */ +void REGPARAM2 op_c050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +void REGPARAM2 op_c058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +void REGPARAM2 op_c060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +void REGPARAM2 op_c068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.W (xxx).W,Dn */ +void REGPARAM2 op_c078_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +void REGPARAM2 op_c079_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +void REGPARAM2 op_c07a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c07b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_c07c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +void REGPARAM2 op_c080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.L (An),Dn */ +void REGPARAM2 op_c090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +void REGPARAM2 op_c098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +void REGPARAM2 op_c0a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (src); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +void REGPARAM2 op_c0a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +void REGPARAM2 op_c0b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +void REGPARAM2 op_c0b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +void REGPARAM2 op_c0b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +void REGPARAM2 op_c0ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_c0bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, dstreg) = (src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +void REGPARAM2 op_c0c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +void REGPARAM2 op_c0d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +void REGPARAM2 op_c0d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +void REGPARAM2 op_c0e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 0; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +void REGPARAM2 op_c0e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c0f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULU.W (xxx).W,Dn */ +void REGPARAM2 op_c0f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +void REGPARAM2 op_c0f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +void REGPARAM2 op_c0fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULU.W #.W,Dn */ +void REGPARAM2 op_c0fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +void REGPARAM2 op_c100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +void REGPARAM2 op_c108_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + ipl_fetch_next_pre(); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 6; + loop_mode |= 6 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +void REGPARAM2 op_c110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +void REGPARAM2 op_c118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +void REGPARAM2 op_c120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +void REGPARAM2 op_c128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_c130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* AND.B Dn,(xxx).W */ +void REGPARAM2 op_c138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +void REGPARAM2 op_c139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +void REGPARAM2 op_c140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* EXG.L An,An */ +void REGPARAM2 op_c148_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +void REGPARAM2 op_c150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +void REGPARAM2 op_c158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +void REGPARAM2 op_c160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +void REGPARAM2 op_c168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_c170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* AND.W Dn,(xxx).W */ +void REGPARAM2 op_c178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +void REGPARAM2 op_c179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EXG.L Dn,An */ +void REGPARAM2 op_c188_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +void REGPARAM2 op_c190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +void REGPARAM2 op_c198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +void REGPARAM2 op_c1a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +void REGPARAM2 op_c1a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_c1b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* AND.L Dn,(xxx).W */ +void REGPARAM2 op_c1b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +void REGPARAM2 op_c1b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +void REGPARAM2 op_c1c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +void REGPARAM2 op_c1d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +void REGPARAM2 op_c1d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +void REGPARAM2 op_c1e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 0; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +void REGPARAM2 op_c1e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c1f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULS.W (xxx).W,Dn */ +void REGPARAM2 op_c1f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +void REGPARAM2 op_c1f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +void REGPARAM2 op_c1fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c1fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULS.W #.W,Dn */ +void REGPARAM2 op_c1fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +void REGPARAM2 op_d000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +void REGPARAM2 op_d010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +void REGPARAM2 op_d018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +void REGPARAM2 op_d020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +void REGPARAM2 op_d028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +void REGPARAM2 op_d030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.B (xxx).W,Dn */ +void REGPARAM2 op_d038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +void REGPARAM2 op_d039_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +void REGPARAM2 op_d03a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_d03b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.B #.B,Dn */ +void REGPARAM2 op_d03c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +void REGPARAM2 op_d040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.W An,Dn */ +void REGPARAM2 op_d048_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +void REGPARAM2 op_d050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +void REGPARAM2 op_d058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +void REGPARAM2 op_d060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + if(!loop_mode) { + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +void REGPARAM2 op_d068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +void REGPARAM2 op_d070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.W (xxx).W,Dn */ +void REGPARAM2 op_d078_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +void REGPARAM2 op_d079_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +void REGPARAM2 op_d07a_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_d07b_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_d07c_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +void REGPARAM2 op_d080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ADD.L An,Dn */ +void REGPARAM2 op_d088_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +void REGPARAM2 op_d090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +void REGPARAM2 op_d098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +void REGPARAM2 op_d0a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_dreg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +void REGPARAM2 op_d0a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +void REGPARAM2 op_d0b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +void REGPARAM2 op_d0b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +void REGPARAM2 op_d0b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +void REGPARAM2 op_d0ba_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_d0bb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_d0bc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +void REGPARAM2 op_d0c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.W An,An */ +void REGPARAM2 op_d0c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.W (An),An */ +void REGPARAM2 op_d0d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(4); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +void REGPARAM2 op_d0d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(4); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +void REGPARAM2 op_d0e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(4); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +void REGPARAM2 op_d0e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +void REGPARAM2 op_d0f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* ADDA.W (xxx).W,An */ +void REGPARAM2 op_d0f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +void REGPARAM2 op_d0f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +void REGPARAM2 op_d0fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +void REGPARAM2 op_d0fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* ADDA.W #.W,An */ +void REGPARAM2 op_d0fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +void REGPARAM2 op_d100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +void REGPARAM2 op_d108_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +void REGPARAM2 op_d110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +void REGPARAM2 op_d118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +void REGPARAM2 op_d120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +void REGPARAM2 op_d128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_d130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADD.B Dn,(xxx).W */ +void REGPARAM2 op_d138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +void REGPARAM2 op_d139_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +void REGPARAM2 op_d140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +void REGPARAM2 op_d148_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, srcreg) = srca; + m68k_incpci(2); + exception3_read_access2(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access2(opcode, dsta, 1, 1); + return; + } + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +void REGPARAM2 op_d150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +void REGPARAM2 op_d158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_areg(regs, dstreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +void REGPARAM2 op_d160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +void REGPARAM2 op_d168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_d170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADD.W Dn,(xxx).W */ +void REGPARAM2 op_d178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +void REGPARAM2 op_d179_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +void REGPARAM2 op_d180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgo) & (bflgo ^ bflgn))); + SET_XFLG(GET_CFLG()); + SET_ZFLG(oldz); + if (newv & 0xffff) SET_ZFLG(0); + SET_NFLG(newv & 0x8000); + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +void REGPARAM2 op_d188_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(2); + srca += 2; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + src |= x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(2); + dsta += 2; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgo) & (bflgo ^ bflgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 2; + loop_mode |= 2 << 16; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 30 (5/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +void REGPARAM2 op_d190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +void REGPARAM2 op_d198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +void REGPARAM2 op_d1a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + int loop_mode = regs.loop_mode; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +void REGPARAM2 op_d1a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_d1b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* ADD.L Dn,(xxx).W */ +void REGPARAM2 op_d1b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +void REGPARAM2 op_d1b9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +void REGPARAM2 op_d1c0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.L An,An */ +void REGPARAM2 op_d1c8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.L (An),An */ +void REGPARAM2 op_d1d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +void REGPARAM2 op_d1d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +void REGPARAM2 op_d1e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + int loop_mode = regs.loop_mode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + do_cycles_ce000_internal(2); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + m68k_areg(regs, dstreg) = (newv); + if (loop_mode) { + do_cycles_ce000_internal(4); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +void REGPARAM2 op_d1e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +void REGPARAM2 op_d1f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADDA.L (xxx).W,An */ +void REGPARAM2 op_d1f8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +void REGPARAM2 op_d1f9_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +void REGPARAM2 op_d1fa_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +void REGPARAM2 op_d1fb_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADDA.L #.L,An */ +void REGPARAM2 op_d1fc_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +void REGPARAM2 op_e000_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +void REGPARAM2 op_e008_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +void REGPARAM2 op_e010_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +void REGPARAM2 op_e018_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +void REGPARAM2 op_e020_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +void REGPARAM2 op_e028_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +void REGPARAM2 op_e030_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +void REGPARAM2 op_e038_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +void REGPARAM2 op_e040_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +void REGPARAM2 op_e048_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +void REGPARAM2 op_e050_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +void REGPARAM2 op_e058_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +void REGPARAM2 op_e060_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +void REGPARAM2 op_e068_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +void REGPARAM2 op_e070_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +void REGPARAM2 op_e078_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +void REGPARAM2 op_e080_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +void REGPARAM2 op_e088_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +void REGPARAM2 op_e090_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +void REGPARAM2 op_e098_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +void REGPARAM2 op_e0a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +void REGPARAM2 op_e0a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +void REGPARAM2 op_e0b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +void REGPARAM2 op_e0b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASRW.W (An) */ +void REGPARAM2 op_e0d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +void REGPARAM2 op_e0d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASRW.W -(An) */ +void REGPARAM2 op_e0e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +void REGPARAM2 op_e0e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +void REGPARAM2 op_e0f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ASRW.W (xxx).W */ +void REGPARAM2 op_e0f8_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +void REGPARAM2 op_e0f9_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +void REGPARAM2 op_e100_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +void REGPARAM2 op_e108_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +void REGPARAM2 op_e110_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +void REGPARAM2 op_e118_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +void REGPARAM2 op_e120_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +void REGPARAM2 op_e128_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +void REGPARAM2 op_e130_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +void REGPARAM2 op_e138_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +void REGPARAM2 op_e140_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +void REGPARAM2 op_e148_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +void REGPARAM2 op_e150_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +void REGPARAM2 op_e158_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +void REGPARAM2 op_e160_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +void REGPARAM2 op_e168_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +void REGPARAM2 op_e170_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +void REGPARAM2 op_e178_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +void REGPARAM2 op_e180_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +void REGPARAM2 op_e188_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +void REGPARAM2 op_e190_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +void REGPARAM2 op_e198_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +void REGPARAM2 op_e1a0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +void REGPARAM2 op_e1a8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +void REGPARAM2 op_e1b0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +void REGPARAM2 op_e1b8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASLW.W (An) */ +void REGPARAM2 op_e1d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +void REGPARAM2 op_e1d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASLW.W -(An) */ +void REGPARAM2 op_e1e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +void REGPARAM2 op_e1e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +void REGPARAM2 op_e1f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ASLW.W (xxx).W */ +void REGPARAM2 op_e1f8_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +void REGPARAM2 op_e1f9_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* LSRW.W (An) */ +void REGPARAM2 op_e2d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +void REGPARAM2 op_e2d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSRW.W -(An) */ +void REGPARAM2 op_e2e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +void REGPARAM2 op_e2e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +void REGPARAM2 op_e2f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* LSRW.W (xxx).W */ +void REGPARAM2 op_e2f8_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +void REGPARAM2 op_e2f9_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* LSLW.W (An) */ +void REGPARAM2 op_e3d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +void REGPARAM2 op_e3d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSLW.W -(An) */ +void REGPARAM2 op_e3e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +void REGPARAM2 op_e3e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +void REGPARAM2 op_e3f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* LSLW.W (xxx).W */ +void REGPARAM2 op_e3f8_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +void REGPARAM2 op_e3f9_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROXRW.W (An) */ +void REGPARAM2 op_e4d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +void REGPARAM2 op_e4d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +void REGPARAM2 op_e4e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +void REGPARAM2 op_e4e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +void REGPARAM2 op_e4f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROXRW.W (xxx).W */ +void REGPARAM2 op_e4f8_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +void REGPARAM2 op_e4f9_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROXLW.W (An) */ +void REGPARAM2 op_e5d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +void REGPARAM2 op_e5d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +void REGPARAM2 op_e5e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +void REGPARAM2 op_e5e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +void REGPARAM2 op_e5f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROXLW.W (xxx).W */ +void REGPARAM2 op_e5f8_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +void REGPARAM2 op_e5f9_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* RORW.W (An) */ +void REGPARAM2 op_e6d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* RORW.W (An)+ */ +void REGPARAM2 op_e6d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* RORW.W -(An) */ +void REGPARAM2 op_e6e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +void REGPARAM2 op_e6e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +void REGPARAM2 op_e6f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* RORW.W (xxx).W */ +void REGPARAM2 op_e6f8_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +void REGPARAM2 op_e6f9_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROLW.W (An) */ +void REGPARAM2 op_e7d0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +void REGPARAM2 op_e7d8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_areg(regs, srcreg) += 2 + 0; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROLW.W -(An) */ +void REGPARAM2 op_e7e0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int loop_mode = regs.loop_mode; + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_areg(regs, srcreg) = dataa; + m68k_incpci(2); + exception3_read_access2(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + if(!loop_mode) { + regs.ir = regs.irc; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + } else { + loop_mode = 0; + loop_mode |= 4; + loop_mode |= 4 << 16; + } + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + if(loop_mode & 0xfffe) { + do_cycles_ce000_internal(loop_mode & 0xfffe); + loop_mode = 1; + } + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + if (loop_mode) { + do_cycles_ce000_internal(2); + } + regs.loop_mode = loop_mode; + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +void REGPARAM2 op_e7e8_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +void REGPARAM2 op_e7f0_13_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROLW.W (xxx).W */ +void REGPARAM2 op_e7f8_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +void REGPARAM2 op_e7f9_13_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,Dn */ +void REGPARAM2 op_0000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +void REGPARAM2 op_0010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +void REGPARAM2 op_0018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +void REGPARAM2 op_0020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +void REGPARAM2 op_0028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* OR.B #.B,(xxx).W */ +void REGPARAM2 op_0038_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +void REGPARAM2 op_0039_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ORSR.B #.W */ +void REGPARAM2 op_003c_14_ff(uae_u32 opcode) +{ + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + src &= 0xFF; + do_cycles_ce000_internal(8); + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_0040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +void REGPARAM2 op_0050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +void REGPARAM2 op_0058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +void REGPARAM2 op_0060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +void REGPARAM2 op_0068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* OR.W #.W,(xxx).W */ +void REGPARAM2 op_0078_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +void REGPARAM2 op_0079_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ORSR.W #.W */ +void REGPARAM2 op_007c_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(8); + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_0080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +void REGPARAM2 op_0090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +void REGPARAM2 op_0098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +void REGPARAM2 op_00a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +void REGPARAM2 op_00a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_00b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* OR.L #.L,(xxx).W */ +void REGPARAM2 op_00b8_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +void REGPARAM2 op_00b9_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* BTST.L Dn,Dn */ +void REGPARAM2 op_0100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + ipl_fetch_next_pre(); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +void REGPARAM2 op_0108_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_u16 val = (x_get_byte(mempa) & 0xff) << 8; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 0, 0x0, 1); + return; + } + val |= (x_get_byte(mempa + 2) & 0xff); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 2, 0x0, 1); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +void REGPARAM2 op_0110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +void REGPARAM2 op_0118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +void REGPARAM2 op_0120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +void REGPARAM2 op_0128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* BTST.B Dn,(xxx).W */ +void REGPARAM2 op_0138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +void REGPARAM2 op_0139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +void REGPARAM2 op_013a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 2); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +void REGPARAM2 op_013b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 2); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* BTST.B Dn,#.B */ +void REGPARAM2 op_013c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + src &= 7; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +void REGPARAM2 op_0140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +void REGPARAM2 op_0148_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 val = (x_get_byte(mempa) & 0xff) << 24; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 0, 0x0, 1); + return; + } + val |= (x_get_byte(mempa + 2) & 0xff) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 2, 0x0, 1); + return; + } + ipl_fetch_now(); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (x_get_byte(mempa + 4) & 0xff) << 8; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 4, 0x0, 1); + return; + } + val |= (x_get_byte(mempa + 6) & 0xff); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, mempa + 6, 0x0, 1); + return; + } + m68k_dreg(regs, dstreg) = (val); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 24 (6/0) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +void REGPARAM2 op_0150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +void REGPARAM2 op_0158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +void REGPARAM2 op_0160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +void REGPARAM2 op_0168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BCHG.B Dn,(xxx).W */ +void REGPARAM2 op_0178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +void REGPARAM2 op_0179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +void REGPARAM2 op_0180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +void REGPARAM2 op_0188_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + x_put_byte(mempa, src >> 8); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 0, 0x0, src >> 8, 1); + return; + } + x_put_byte(mempa + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 2, 0x0, src, 1); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +void REGPARAM2 op_0190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +void REGPARAM2 op_0198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +void REGPARAM2 op_01a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +void REGPARAM2 op_01a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +void REGPARAM2 op_01b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +void REGPARAM2 op_01b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +void REGPARAM2 op_01c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +void REGPARAM2 op_01c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + x_put_byte(mempa, src >> 24); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 0, 0x0, src >> 24, 1); + return; + } + x_put_byte(mempa + 2, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 2, 0x0, src >> 16, 1); + return; + } + x_put_byte(mempa + 4, src >> 8); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 4, 0x0, src >> 8, 1); + return; + } + x_put_byte(mempa + 6, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, mempa + 6, 0x0, src, 1); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 24 (2/4) */ +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +void REGPARAM2 op_01d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +void REGPARAM2 op_01d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +void REGPARAM2 op_01e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +void REGPARAM2 op_01e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* BSET.B Dn,(xxx).W */ +void REGPARAM2 op_01f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +void REGPARAM2 op_01f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_0200_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +void REGPARAM2 op_0210_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +void REGPARAM2 op_0218_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +void REGPARAM2 op_0220_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +void REGPARAM2 op_0228_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0230_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* AND.B #.B,(xxx).W */ +void REGPARAM2 op_0238_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +void REGPARAM2 op_0239_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ANDSR.B #.W */ +void REGPARAM2 op_023c_14_ff(uae_u32 opcode) +{ + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + src &= 0xFF; + src |= 0xff00; + do_cycles_ce000_internal(8); + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_0240_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +void REGPARAM2 op_0250_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +void REGPARAM2 op_0258_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +void REGPARAM2 op_0260_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +void REGPARAM2 op_0268_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0270_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* AND.W #.W,(xxx).W */ +void REGPARAM2 op_0278_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +void REGPARAM2 op_0279_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ANDSR.W #.W */ +void REGPARAM2 op_027c_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(8); + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_0280_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +void REGPARAM2 op_0290_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +void REGPARAM2 op_0298_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +void REGPARAM2 op_02a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +void REGPARAM2 op_02a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_02b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* AND.L #.L,(xxx).W */ +void REGPARAM2 op_02b8_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +void REGPARAM2 op_02b9_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* SUB.B #.B,Dn */ +void REGPARAM2 op_0400_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +void REGPARAM2 op_0410_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +void REGPARAM2 op_0418_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +void REGPARAM2 op_0420_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +void REGPARAM2 op_0428_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0430_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* SUB.B #.B,(xxx).W */ +void REGPARAM2 op_0438_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +void REGPARAM2 op_0439_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_0440_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +void REGPARAM2 op_0450_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +void REGPARAM2 op_0458_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +void REGPARAM2 op_0460_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +void REGPARAM2 op_0468_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0470_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* SUB.W #.W,(xxx).W */ +void REGPARAM2 op_0478_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +void REGPARAM2 op_0479_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_0480_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +void REGPARAM2 op_0490_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +void REGPARAM2 op_0498_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +void REGPARAM2 op_04a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +void REGPARAM2 op_04a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_04b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* SUB.L #.L,(xxx).W */ +void REGPARAM2 op_04b8_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +void REGPARAM2 op_04b9_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* ADD.B #.B,Dn */ +void REGPARAM2 op_0600_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +void REGPARAM2 op_0610_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +void REGPARAM2 op_0618_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +void REGPARAM2 op_0620_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +void REGPARAM2 op_0628_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0630_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* ADD.B #.B,(xxx).W */ +void REGPARAM2 op_0638_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +void REGPARAM2 op_0639_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_0640_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +void REGPARAM2 op_0650_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +void REGPARAM2 op_0658_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +void REGPARAM2 op_0660_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +void REGPARAM2 op_0668_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0670_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* ADD.W #.W,(xxx).W */ +void REGPARAM2 op_0678_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +void REGPARAM2 op_0679_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_0680_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +void REGPARAM2 op_0690_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +void REGPARAM2 op_0698_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +void REGPARAM2 op_06a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +void REGPARAM2 op_06a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_06b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* ADD.L #.L,(xxx).W */ +void REGPARAM2 op_06b8_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +void REGPARAM2 op_06b9_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* BTST.L #.W,Dn */ +void REGPARAM2 op_0800_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + ipl_fetch_now(); + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +void REGPARAM2 op_0810_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +void REGPARAM2 op_0818_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +void REGPARAM2 op_0820_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +void REGPARAM2 op_0828_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0830_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* BTST.B #.W,(xxx).W */ +void REGPARAM2 op_0838_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +void REGPARAM2 op_0839_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +void REGPARAM2 op_083a_14_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 2); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +void REGPARAM2 op_083b_14_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + uaecptr tmppc = m68k_getpci() + 4; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(tmppc, get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 2); + return; + } + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* BCHG.L #.W,Dn */ +void REGPARAM2 op_0840_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +void REGPARAM2 op_0850_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +void REGPARAM2 op_0858_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +void REGPARAM2 op_0860_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +void REGPARAM2 op_0868_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0870_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BCHG.B #.W,(xxx).W */ +void REGPARAM2 op_0878_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +void REGPARAM2 op_0879_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +void REGPARAM2 op_0880_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +void REGPARAM2 op_0890_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +void REGPARAM2 op_0898_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +void REGPARAM2 op_08a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +void REGPARAM2 op_08a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +void REGPARAM2 op_08b8_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +void REGPARAM2 op_08b9_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +void REGPARAM2 op_08c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 31; + do_cycles_ce000_internal(2); + if (src > 15) do_cycles_ce000_internal(2); + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +void REGPARAM2 op_08d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +void REGPARAM2 op_08d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +void REGPARAM2 op_08e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +void REGPARAM2 op_08e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* BSET.B #.W,(xxx).W */ +void REGPARAM2 op_08f8_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +void REGPARAM2 op_08f9_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, dst, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +void REGPARAM2 op_0a00_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +void REGPARAM2 op_0a10_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +void REGPARAM2 op_0a18_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +void REGPARAM2 op_0a20_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +void REGPARAM2 op_0a28_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0a30_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* EOR.B #.B,(xxx).W */ +void REGPARAM2 op_0a38_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +void REGPARAM2 op_0a39_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EORSR.B #.W */ +void REGPARAM2 op_0a3c_14_ff(uae_u32 opcode) +{ + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + src &= 0xFF; + do_cycles_ce000_internal(8); + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +void REGPARAM2 op_0a40_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +void REGPARAM2 op_0a50_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +void REGPARAM2 op_0a58_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +void REGPARAM2 op_0a60_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +void REGPARAM2 op_0a68_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0a70_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* EOR.W #.W,(xxx).W */ +void REGPARAM2 op_0a78_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +void REGPARAM2 op_0a79_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(10); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* EORSR.W #.W */ +void REGPARAM2 op_0a7c_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + do_cycles_ce000_internal(8); + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +void REGPARAM2 op_0a80_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +void REGPARAM2 op_0a90_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +void REGPARAM2 op_0a98_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +void REGPARAM2 op_0aa0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +void REGPARAM2 op_0aa8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0ab0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* EOR.L #.L,(xxx).W */ +void REGPARAM2 op_0ab8_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(8); + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +void REGPARAM2 op_0ab9_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(12); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(10); + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* CMP.B #.B,Dn */ +void REGPARAM2 op_0c00_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +void REGPARAM2 op_0c10_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +void REGPARAM2 op_0c18_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +void REGPARAM2 op_0c20_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +void REGPARAM2 op_0c28_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0c30_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* CMP.B #.B,(xxx).W */ +void REGPARAM2 op_0c38_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +void REGPARAM2 op_0c39_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* CMP.W #.W,Dn */ +void REGPARAM2 op_0c40_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +void REGPARAM2 op_0c50_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +void REGPARAM2 op_0c58_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +void REGPARAM2 op_0c60_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +void REGPARAM2 op_0c68_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0c70_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 4,0 */ + +/* CMP.W #.W,(xxx).W */ +void REGPARAM2 op_0c78_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +void REGPARAM2 op_0c79_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20 (5/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,Dn */ +void REGPARAM2 op_0c80_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +void REGPARAM2 op_0c90_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +void REGPARAM2 op_0c98_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +void REGPARAM2 op_0ca0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +void REGPARAM2 op_0ca8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 24 (6/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0cb0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 26 (6/0) */ +/* 8 4,0 */ + +/* CMP.L #.L,(xxx).W */ +void REGPARAM2 op_0cb8_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 24 (6/0) */ +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +void REGPARAM2 op_0cb9_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(12); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 12, pcoffset); + return; + } + m68k_incpci(10); + return; +} +/* 28 (7/0) */ +/* 10 0,0 */ + +/* MOVE.B Dn,Dn */ +void REGPARAM2 op_1000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +void REGPARAM2 op_1010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +void REGPARAM2 op_1018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +void REGPARAM2 op_1020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +void REGPARAM2 op_1028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +void REGPARAM2 op_1030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,Dn */ +void REGPARAM2 op_1038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +void REGPARAM2 op_1039_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +void REGPARAM2 op_103a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_103b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.B #.B,Dn */ +void REGPARAM2 op_103c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +void REGPARAM2 op_1080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +void REGPARAM2 op_1090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +void REGPARAM2 op_1098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +void REGPARAM2 op_10a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +void REGPARAM2 op_10a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +void REGPARAM2 op_10b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(An) */ +void REGPARAM2 op_10b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +void REGPARAM2 op_10b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +void REGPARAM2 op_10ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +void REGPARAM2 op_10bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,(An) */ +void REGPARAM2 op_10bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +void REGPARAM2 op_10c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_next_pre(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +void REGPARAM2 op_10d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +void REGPARAM2 op_10d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +void REGPARAM2 op_10e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +void REGPARAM2 op_10e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +void REGPARAM2 op_10f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +void REGPARAM2 op_10f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +void REGPARAM2 op_10f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +void REGPARAM2 op_10fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_10fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,(An)+ */ +void REGPARAM2 op_10fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +void REGPARAM2 op_1100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +void REGPARAM2 op_1110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +void REGPARAM2 op_1118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +void REGPARAM2 op_1120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +void REGPARAM2 op_1128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +void REGPARAM2 op_1130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (xxx).W,-(An) */ +void REGPARAM2 op_1138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +void REGPARAM2 op_1139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +void REGPARAM2 op_113a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +void REGPARAM2 op_113b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B #.B,-(An) */ +void REGPARAM2 op_113c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +void REGPARAM2 op_1140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +void REGPARAM2 op_1150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +void REGPARAM2 op_1158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +void REGPARAM2 op_1160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +void REGPARAM2 op_1168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_1170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +void REGPARAM2 op_1178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +void REGPARAM2 op_1179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +void REGPARAM2 op_117a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_117b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B #.B,(d16,An) */ +void REGPARAM2 op_117c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_1180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +void REGPARAM2 op_1190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +void REGPARAM2 op_1198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +void REGPARAM2 op_11a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_11a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_11b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_11b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 4,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_11ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_11bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + ipl_fetch_now(); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 6 4,0 */ + +/* MOVE.B Dn,(xxx).W */ +void REGPARAM2 op_11c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +void REGPARAM2 op_11d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +void REGPARAM2 op_11d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +void REGPARAM2 op_11e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +void REGPARAM2 op_11e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_11f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +void REGPARAM2 op_11f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +void REGPARAM2 op_11f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +void REGPARAM2 op_11fa_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_11fb_14_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).W */ +void REGPARAM2 op_11fc_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +void REGPARAM2 op_13c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +void REGPARAM2 op_13d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +void REGPARAM2 op_13d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +void REGPARAM2 op_13e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +void REGPARAM2 op_13e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_13f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +void REGPARAM2 op_13f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +void REGPARAM2 op_13f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(10); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (6/1) */ +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +void REGPARAM2 op_13fa_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_13fb_14_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.B #.B,(xxx).L */ +void REGPARAM2 op_13fc_14_ff(uae_u32 opcode) +{ + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +void REGPARAM2 op_2000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +void REGPARAM2 op_2008_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +void REGPARAM2 op_2010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +void REGPARAM2 op_2018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +void REGPARAM2 op_2020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +void REGPARAM2 op_2028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +void REGPARAM2 op_2030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,Dn */ +void REGPARAM2 op_2038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +void REGPARAM2 op_2039_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +void REGPARAM2 op_203a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_203b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVE.L #.L,Dn */ +void REGPARAM2 op_203c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +void REGPARAM2 op_2040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.L An,An */ +void REGPARAM2 op_2048_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +void REGPARAM2 op_2050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +void REGPARAM2 op_2058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +void REGPARAM2 op_2060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +void REGPARAM2 op_2068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +void REGPARAM2 op_2070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVEA.L (xxx).W,An */ +void REGPARAM2 op_2078_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +void REGPARAM2 op_2079_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +void REGPARAM2 op_207a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_207b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* MOVEA.L #.L,An */ +void REGPARAM2 op_207c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +void REGPARAM2 op_2080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +void REGPARAM2 op_2088_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +void REGPARAM2 op_2090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +void REGPARAM2 op_2098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +void REGPARAM2 op_20a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +void REGPARAM2 op_20a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +void REGPARAM2 op_20b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(An) */ +void REGPARAM2 op_20b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +void REGPARAM2 op_20b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +void REGPARAM2 op_20ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +void REGPARAM2 op_20bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,(An) */ +void REGPARAM2 op_20bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(8); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +void REGPARAM2 op_20c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +void REGPARAM2 op_20c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +void REGPARAM2 op_20d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +void REGPARAM2 op_20d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +void REGPARAM2 op_20e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(2); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +void REGPARAM2 op_20e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +void REGPARAM2 op_20f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +void REGPARAM2 op_20f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +void REGPARAM2 op_20f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(8); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +void REGPARAM2 op_20fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_20fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,(An)+ */ +void REGPARAM2 op_20fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + ipl_fetch_now(); + if (dsta & 1) { + m68k_incpci(8); + m68k_areg(regs, dstreg) -= 4; + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + m68k_areg(regs, dstreg) -= 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +void REGPARAM2 op_2100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +void REGPARAM2 op_2108_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +void REGPARAM2 op_2110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +void REGPARAM2 op_2118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +void REGPARAM2 op_2120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +void REGPARAM2 op_2128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +void REGPARAM2 op_2130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (xxx).W,-(An) */ +void REGPARAM2 op_2138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +void REGPARAM2 op_2139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +void REGPARAM2 op_213a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +void REGPARAM2 op_213b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L #.L,-(An) */ +void REGPARAM2 op_213c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 4; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(8); + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) += 4; + regs.ir = opcode; + ccr_68000_long_move_ae_normal(src); + dsta += 2; + exception3_write_access(opcode, dsta, 2, src, 1); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + m68k_areg(regs, dstreg) += 4; + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +void REGPARAM2 op_2140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +void REGPARAM2 op_2148_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +void REGPARAM2 op_2150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +void REGPARAM2 op_2158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +void REGPARAM2 op_2160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +void REGPARAM2 op_2168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_2170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +void REGPARAM2 op_2178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +void REGPARAM2 op_2179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +void REGPARAM2 op_217a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_217b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L #.L,(d16,An) */ +void REGPARAM2 op_217c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_2180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +void REGPARAM2 op_2188_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + SET_NFLG(src < 0); + if((src & 0xffff0000)) SET_ZFLG(0); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +void REGPARAM2 op_2190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +void REGPARAM2 op_2198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +void REGPARAM2 op_21a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (4/2) */ +/* 4 4,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_21a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (5/2) */ +/* 6 6,4 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_21b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_21b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 34 (6/2) */ +/* 8 4,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_21ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 4,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (5/2) */ +/* 6 6,4 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_21bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_HNZ(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 8 4,0 */ + +/* MOVE.L Dn,(xxx).W */ +void REGPARAM2 op_21c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +void REGPARAM2 op_21c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +void REGPARAM2 op_21d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +void REGPARAM2 op_21d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +void REGPARAM2 op_21e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (4/2) */ +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +void REGPARAM2 op_21e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_21f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +void REGPARAM2 op_21f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +void REGPARAM2 op_21f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +void REGPARAM2 op_21fa_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_21fb_14_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).W */ +void REGPARAM2 op_21fc_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_now(); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/2) */ +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +void REGPARAM2 op_23c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +void REGPARAM2 op_23c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +void REGPARAM2 op_23d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +void REGPARAM2 op_23d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +void REGPARAM2 op_23e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 30 (5/2) */ +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +void REGPARAM2 op_23e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_23f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 34 (6/2) */ +/* 8 8,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +void REGPARAM2 op_23f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +void REGPARAM2 op_23f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 8, 0); + return; + } + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(10); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 36 (7/2) */ +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +void REGPARAM2 op_23fa_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 32 (6/2) */ +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_23fb_14_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + // nothing; + exception2_fetch(opcode, 6, 0); + return; + } + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_LZN(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 34 (6/2) */ +/* 8 8,0 */ + +/* MOVE.L #.L,(xxx).L */ +void REGPARAM2 op_23fc_14_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, -2); + return; + } + dsta |= get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch(opcode, 10, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception3_write_access(opcode, dsta, 2, src >> 16, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(10); + ccr_68000_long_move_ae_normal(src); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(10); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (5/2) */ +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +void REGPARAM2 op_3000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +void REGPARAM2 op_3008_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +void REGPARAM2 op_3010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +void REGPARAM2 op_3018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +void REGPARAM2 op_3020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +void REGPARAM2 op_3028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +void REGPARAM2 op_3030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,Dn */ +void REGPARAM2 op_3038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +void REGPARAM2 op_3039_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +void REGPARAM2 op_303a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_303b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVE.W #.W,Dn */ +void REGPARAM2 op_303c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +void REGPARAM2 op_3040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.W An,An */ +void REGPARAM2 op_3048_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +void REGPARAM2 op_3050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +void REGPARAM2 op_3058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +void REGPARAM2 op_3060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +void REGPARAM2 op_3068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +void REGPARAM2 op_3070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVEA.W (xxx).W,An */ +void REGPARAM2 op_3078_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +void REGPARAM2 op_3079_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +void REGPARAM2 op_307a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +void REGPARAM2 op_307b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* MOVEA.W #.W,An */ +void REGPARAM2 op_307c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +void REGPARAM2 op_3080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +void REGPARAM2 op_3088_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +void REGPARAM2 op_3090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +void REGPARAM2 op_3098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +void REGPARAM2 op_30a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +void REGPARAM2 op_30a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +void REGPARAM2 op_30b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(An) */ +void REGPARAM2 op_30b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +void REGPARAM2 op_30b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +void REGPARAM2 op_30ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +void REGPARAM2 op_30bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,(An) */ +void REGPARAM2 op_30bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +void REGPARAM2 op_30c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + ipl_fetch_next_pre(); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +void REGPARAM2 op_30c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + ipl_fetch_next_pre(); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +void REGPARAM2 op_30d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +void REGPARAM2 op_30d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +void REGPARAM2 op_30e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +void REGPARAM2 op_30e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +void REGPARAM2 op_30f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +void REGPARAM2 op_30f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +void REGPARAM2 op_30f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +void REGPARAM2 op_30fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_30fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,(An)+ */ +void REGPARAM2 op_30fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + m68k_areg(regs, dstreg) -= 2; + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) -= 2; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +void REGPARAM2 op_3100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +void REGPARAM2 op_3108_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_next_pre(); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 8 (1/1) */ +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +void REGPARAM2 op_3110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +void REGPARAM2 op_3118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +void REGPARAM2 op_3120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +void REGPARAM2 op_3128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +void REGPARAM2 op_3130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (xxx).W,-(An) */ +void REGPARAM2 op_3138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +void REGPARAM2 op_3139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +void REGPARAM2 op_313a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +void REGPARAM2 op_313b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W #.W,-(An) */ +void REGPARAM2 op_313c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) += 2; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + do_cycles_ce000_internal(2); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + m68k_areg(regs, dstreg) = dsta; + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +void REGPARAM2 op_3140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +void REGPARAM2 op_3148_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +void REGPARAM2 op_3150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +void REGPARAM2 op_3158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +void REGPARAM2 op_3160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +void REGPARAM2 op_3168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_3170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +void REGPARAM2 op_3178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +void REGPARAM2 op_3179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +void REGPARAM2 op_317a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_317b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W #.W,(d16,An) */ +void REGPARAM2 op_317c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_3180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +void REGPARAM2 op_3188_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/1) */ +/* 4 4,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +void REGPARAM2 op_3190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +void REGPARAM2 op_3198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +void REGPARAM2 op_31a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_31a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_31b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_31b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(8)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 4,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_31ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 4,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (4/1) */ +/* 6 6,4 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_31bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + ipl_fetch_now(); + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 6 4,0 */ + +/* MOVE.W Dn,(xxx).W */ +void REGPARAM2 op_31c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +void REGPARAM2 op_31c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/1) */ +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +void REGPARAM2 op_31d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +void REGPARAM2 op_31d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +void REGPARAM2 op_31e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(4); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +void REGPARAM2 op_31e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_31f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +void REGPARAM2 op_31f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +void REGPARAM2 op_31f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +void REGPARAM2 op_31fa_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_31fb_14_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).W */ +void REGPARAM2 op_31fc_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +void REGPARAM2 op_33c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +void REGPARAM2 op_33c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(6); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/1) */ +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +void REGPARAM2 op_33d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +void REGPARAM2 op_33d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +void REGPARAM2 op_33e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 4, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(4); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +void REGPARAM2 op_33e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_33f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +void REGPARAM2 op_33f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +void REGPARAM2 op_33f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(8) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(10); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 28 (6/1) */ +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +void REGPARAM2 op_33fa_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/1) */ +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_33fb_14_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + dsta |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 6, 0); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(6); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_now(); + m68k_incpci(8); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 26 (5/1) */ +/* 8 8,0 */ + +/* MOVE.W #.W,(xxx).L */ +void REGPARAM2 op_33fc_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + dsta |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_word_move_ae_normal((uae_s16)src); + exception2_fetch(opcode, 8, pcoffset); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + if (dsta & 1) { + m68k_incpci(8); + ccr_68000_word_move_ae_normal((uae_s16)(src)); + exception3_write_access(opcode, dsta, 1, src, 1); + return; + } + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + ipl_fetch_next(); + m68k_incpci(8); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/1) */ +/* 8 0,0 */ + +/* NEGX.B Dn */ +void REGPARAM2 op_4000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEGX.B (An) */ +void REGPARAM2 op_4010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +void REGPARAM2 op_4018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.B -(An) */ +void REGPARAM2 op_4020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +void REGPARAM2 op_4028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +void REGPARAM2 op_4030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEGX.B (xxx).W */ +void REGPARAM2 op_4038_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +void REGPARAM2 op_4039_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEGX.W Dn */ +void REGPARAM2 op_4040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEGX.W (An) */ +void REGPARAM2 op_4050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +void REGPARAM2 op_4058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEGX.W -(An) */ +void REGPARAM2 op_4060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +void REGPARAM2 op_4068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +void REGPARAM2 op_4070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEGX.W (xxx).W */ +void REGPARAM2 op_4078_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +void REGPARAM2 op_4079_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEGX.L Dn */ +void REGPARAM2 op_4080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (newv); + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NEGX.L (An) */ +void REGPARAM2 op_4090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +void REGPARAM2 op_4098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEGX.L -(An) */ +void REGPARAM2 op_40a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +void REGPARAM2 op_40a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +void REGPARAM2 op_40b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NEGX.L (xxx).W */ +void REGPARAM2 op_40b8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +void REGPARAM2 op_40b9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(srca + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, newv, 1); + return; + } + x_put_word(srca, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MVSR2.W Dn */ +void REGPARAM2 op_40c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* MVSR2.W (An) */ +void REGPARAM2 op_40d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + MakeSR(); + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +void REGPARAM2 op_40d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +void REGPARAM2 op_40e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (1/2) */ +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +void REGPARAM2 op_40e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + MakeSR(); + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +void REGPARAM2 op_40f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + MakeSR(); + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (2/2) */ +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +void REGPARAM2 op_40f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + MakeSR(); + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +void REGPARAM2 op_40f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + MakeSR(); + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, regs.sr); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, regs.sr, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* CHK.W Dn,Dn */ +void REGPARAM2 op_4180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 10 (1/0) */ +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +void REGPARAM2 op_4190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +void REGPARAM2 op_4198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +void REGPARAM2 op_41a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (2/0) */ +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +void REGPARAM2 op_41a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +void REGPARAM2 op_41b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 4,0 */ + +/* CHK.W (xxx).W,Dn */ +void REGPARAM2 op_41b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +void REGPARAM2 op_41b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +void REGPARAM2 op_41ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_41bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (3/0) */ +/* 4 4,0 */ + +/* CHK.W #.W,Dn */ +void REGPARAM2 op_41bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + do_cycles_ce000_internal(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + do_cycles_ce000_internal(2); + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 14 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (An),An */ +void REGPARAM2 op_41d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +void REGPARAM2 op_41e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + exception2_fetch(opcode, 4, -2); + return; + } + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +void REGPARAM2 op_41f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 4,0 */ + +/* LEA.L (xxx).W,An */ +void REGPARAM2 op_41f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + exception2_fetch(opcode, 4, -2); + return; + } + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +void REGPARAM2 op_41f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (m68k_areg(regs, dstreg) & 0x0000ffff) | (srca & 0xffff0000); + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + exception2_fetch(opcode, 6, pcoffset); + return; + } + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12 (3/0) */ +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +void REGPARAM2 op_41fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, dstreg) = (srca); + exception2_fetch(opcode, 4, -2); + return; + } + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_41fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (srca); + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 4,0 */ + +/* CLR.B Dn */ +void REGPARAM2 op_4200_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CLR.B (An) */ +void REGPARAM2 op_4210_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* CLR.B (An)+ */ +void REGPARAM2 op_4218_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* CLR.B -(An) */ +void REGPARAM2 op_4220_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +void REGPARAM2 op_4228_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +void REGPARAM2 op_4230_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +void REGPARAM2 op_4238_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +void REGPARAM2 op_4239_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, 0); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, 0, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* CLR.W Dn */ +void REGPARAM2 op_4240_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CLR.W (An) */ +void REGPARAM2 op_4250_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* CLR.W (An)+ */ +void REGPARAM2 op_4258_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* CLR.W -(An) */ +void REGPARAM2 op_4260_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +void REGPARAM2 op_4268_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +void REGPARAM2 op_4270_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +void REGPARAM2 op_4278_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +void REGPARAM2 op_4279_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, 0); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, 0, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* CLR.L Dn */ +void REGPARAM2 op_4280_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_dreg(regs, srcreg) = (src & 0xffff0000); + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (0); + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CLR.L (An) */ +void REGPARAM2 op_4290_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* CLR.L (An)+ */ +void REGPARAM2 op_4298_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* CLR.L -(An) */ +void REGPARAM2 op_42a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +void REGPARAM2 op_42a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +void REGPARAM2 op_42b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +void REGPARAM2 op_42b8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +void REGPARAM2 op_42b9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0);SET_ZFLG(1);SET_NFLG(0);SET_CFLG(0); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(srca + 2, 0); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, 0, 1); + return; + } + x_put_word(srca, 0 >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, 0 >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* NEG.B Dn */ +void REGPARAM2 op_4400_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEG.B (An) */ +void REGPARAM2 op_4410_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.B (An)+ */ +void REGPARAM2 op_4418_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.B -(An) */ +void REGPARAM2 op_4420_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +void REGPARAM2 op_4428_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +void REGPARAM2 op_4430_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEG.B (xxx).W */ +void REGPARAM2 op_4438_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +void REGPARAM2 op_4439_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEG.W Dn */ +void REGPARAM2 op_4440_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NEG.W (An) */ +void REGPARAM2 op_4450_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.W (An)+ */ +void REGPARAM2 op_4458_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NEG.W -(An) */ +void REGPARAM2 op_4460_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +void REGPARAM2 op_4468_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +void REGPARAM2 op_4470_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NEG.W (xxx).W */ +void REGPARAM2 op_4478_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +void REGPARAM2 op_4479_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NEG.L Dn */ +void REGPARAM2 op_4480_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, dst); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (dst); + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NEG.L (An) */ +void REGPARAM2 op_4490_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEG.L (An)+ */ +void REGPARAM2 op_4498_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NEG.L -(An) */ +void REGPARAM2 op_44a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +void REGPARAM2 op_44a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +void REGPARAM2 op_44b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NEG.L (xxx).W */ +void REGPARAM2 op_44b8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +void REGPARAM2 op_44b9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(0)) < 0; + int bflgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + SET_NFLG(bflgn != 0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MV2SR.B Dn */ +void REGPARAM2 op_44c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* MV2SR.B (An) */ +void REGPARAM2 op_44d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +void REGPARAM2 op_44d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +void REGPARAM2 op_44e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +void REGPARAM2 op_44e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +void REGPARAM2 op_44f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +void REGPARAM2 op_44f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +void REGPARAM2 op_44f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +void REGPARAM2 op_44fa_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +void REGPARAM2 op_44fb_14_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.B #.B */ +void REGPARAM2 op_44fc_14_ff(uae_u32 opcode) +{ + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* NOT.B Dn */ +void REGPARAM2 op_4600_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NOT.B (An) */ +void REGPARAM2 op_4610_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.B (An)+ */ +void REGPARAM2 op_4618_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.B -(An) */ +void REGPARAM2 op_4620_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +void REGPARAM2 op_4628_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +void REGPARAM2 op_4630_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NOT.B (xxx).W */ +void REGPARAM2 op_4638_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +void REGPARAM2 op_4639_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NOT.W Dn */ +void REGPARAM2 op_4640_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* NOT.W (An) */ +void REGPARAM2 op_4650_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.W (An)+ */ +void REGPARAM2 op_4658_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NOT.W -(An) */ +void REGPARAM2 op_4660_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +void REGPARAM2 op_4668_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +void REGPARAM2 op_4670_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NOT.W (xxx).W */ +void REGPARAM2 op_4678_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +void REGPARAM2 op_4679_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(srca, dst); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x1, dst, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* NOT.L Dn */ +void REGPARAM2 op_4680_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(srcreg, dst); + SET_VFLG(0);SET_ZFLG(!dst); + SET_NFLG(dst & 0x80000000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + m68k_dreg(regs, srcreg) = (dst); + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NOT.L (An) */ +void REGPARAM2 op_4690_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NOT.L (An)+ */ +void REGPARAM2 op_4698_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* NOT.L -(An) */ +void REGPARAM2 op_46a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +void REGPARAM2 op_46a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +void REGPARAM2 op_46b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* NOT.L (xxx).W */ +void REGPARAM2 op_46b8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +void REGPARAM2 op_46b9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + SET_VFLG(0); + SET_ZFLG(!(dst & 0xffff)); + SET_NFLG(dst & 0x8000); + SET_CFLG(0); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(srca + 2, dst); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, dst, 1); + return; + } + x_put_word(srca, dst >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, dst >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MV2SR.W Dn */ +void REGPARAM2 op_46c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* MV2SR.W (An) */ +void REGPARAM2 op_46d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +void REGPARAM2 op_46d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +void REGPARAM2 op_46e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (3/0) */ +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +void REGPARAM2 op_46e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +void REGPARAM2 op_46f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +void REGPARAM2 op_46f8_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +void REGPARAM2 op_46f9_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(6); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 24 (5/0) */ +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +void REGPARAM2 op_46fa_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (4/0) */ +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +void REGPARAM2 op_46fb_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 22 (4/0) */ +/* 4 4,0 */ + +/* MV2SR.W #.W */ +void REGPARAM2 op_46fc_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + int t1 = regs.t1; + do_cycles_ce000_internal(4); + regs.sr = src; + MakeFromSR(); + m68k_incpci(4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* NBCD.B Dn */ +void REGPARAM2 op_4800_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* NBCD.B (An) */ +void REGPARAM2 op_4810_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +void REGPARAM2 op_4818_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* NBCD.B -(An) */ +void REGPARAM2 op_4820_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +void REGPARAM2 op_4828_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +void REGPARAM2 op_4830_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* NBCD.B (xxx).W */ +void REGPARAM2 op_4838_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +void REGPARAM2 op_4839_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(srca, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SWAP.W Dn */ +void REGPARAM2 op_4840_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + m68k_dreg(regs, srcreg) = (dst); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* PEA.L (An) */ +void REGPARAM2 op_4850_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(4); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (1/2) */ +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +void REGPARAM2 op_4868_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +void REGPARAM2 op_4870_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(4); + return; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* PEA.L (xxx).W */ +void REGPARAM2 op_4878_14_ff(uae_u32 opcode) +{ + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(4); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +void REGPARAM2 op_4879_14_ff(uae_u32 opcode) +{ + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 20 (3/2) */ +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +void REGPARAM2 op_487a_14_ff(uae_u32 opcode) +{ + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +void REGPARAM2 op_487b_14_ff(uae_u32 opcode) +{ + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_u16 old_opcode = opcode; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpci(6); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return; + } + x_put_word(dsta, srca >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, srca >> 16, 1); + return; + } + x_put_word(dsta + 2, srca); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 2, 0x1, srca, 1); + return; + } + m68k_incpci(4); + return; +} +/* 20 (2/2) */ +/* 4 4,0 */ + +/* EXT.W Dn */ +void REGPARAM2 op_4880_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +void REGPARAM2 op_4890_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +void REGPARAM2 op_48a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + srca -= 2; + uaecptr srcav = srca; + m68k_incpci(6); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (amask) { + srca -= 2; + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index2[amask]), 1); + return; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index2[dmask]), 1); + return; + } + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +void REGPARAM2 op_48a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_48b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 14+ (3/0) */ +/* 6 4,0 */ + +/* MVMLE.W #.W,(xxx).W */ +void REGPARAM2 op_48b8_14_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +void REGPARAM2 op_48b9_14_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += 2; + exception2_fetch(opcode, 8, pcoffset); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_write_access(opcode, srca, 1, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 2; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 16+ (4/0) */ +/* 8 0,0 */ + +/* EXT.L Dn */ +void REGPARAM2 op_48c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +void REGPARAM2 op_48d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +void REGPARAM2 op_48e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 2); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + srca -= 2; + uaecptr srcav = srca; + m68k_incpci(6); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (amask) { + x_put_word(srca - 2, m68k_areg(regs, movem_index2[amask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -2, 0x1, m68k_areg(regs, movem_index2[amask]), 1); + return; + } + x_put_word(srca - 4, m68k_areg(regs, movem_index2[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -4, 0x1, m68k_areg(regs, movem_index2[amask]) >> 16, 1); + return; + } + srca -= 4; + amask = movem_next[amask]; + } + while (dmask) { + x_put_word(srca - 2, m68k_dreg(regs, movem_index2[dmask])); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -2, 0x1, m68k_dreg(regs, movem_index2[dmask]), 1); + return; + } + x_put_word(srca - 4, m68k_dreg(regs, movem_index2[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, srca + -4, 0x1, m68k_dreg(regs, movem_index2[dmask]) >> 16, 1); + return; + } + srca -= 4; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +void REGPARAM2 op_48e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_48f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 14+ (3/0) */ +/* 6 4,0 */ + +/* MVMLE.L #.W,(xxx).W */ +void REGPARAM2 op_48f8_14_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, 2); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 12+ (3/0) */ +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +void REGPARAM2 op_48f9_14_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += 2; + exception2_fetch(opcode, 8, pcoffset); + return; + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + if ((amask || dmask) && (srca & 1)) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_write_access(opcode, srca, 2, srcav, 1); + return; + } + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_dreg(regs, movem_index1[dmask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_dreg(regs, movem_index1[dmask])); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 2, 0x1, m68k_dreg(regs, movem_index1[dmask]), 1); + return; + } + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask]) >> 16); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 0, 0x1, m68k_areg(regs, movem_index1[amask]) >> 16, 1); + return; + } + x_put_word(srca + 2, m68k_areg(regs, movem_index1[amask])); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_write(opcode, srca + 2, 0x1, m68k_areg(regs, movem_index1[amask]), 1); + return; + } + srca += 4; + amask = movem_next[amask]; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 16+ (4/0) */ +/* 8 0,0 */ + +/* TST.B Dn */ +void REGPARAM2 op_4a00_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.B (An) */ +void REGPARAM2 op_4a10_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.B (An)+ */ +void REGPARAM2 op_4a18_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.B -(An) */ +void REGPARAM2 op_4a20_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* TST.B (d16,An) */ +void REGPARAM2 op_4a28_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +void REGPARAM2 op_4a30_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* TST.B (xxx).W */ +void REGPARAM2 op_4a38_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.B (xxx).L */ +void REGPARAM2 op_4a39_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* TST.W Dn */ +void REGPARAM2 op_4a40_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.W (An) */ +void REGPARAM2 op_4a50_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.W (An)+ */ +void REGPARAM2 op_4a58_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* TST.W -(An) */ +void REGPARAM2 op_4a60_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* TST.W (d16,An) */ +void REGPARAM2 op_4a68_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +void REGPARAM2 op_4a70_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* TST.W (xxx).W */ +void REGPARAM2 op_4a78_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* TST.W (xxx).L */ +void REGPARAM2 op_4a79_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* TST.L Dn */ +void REGPARAM2 op_4a80_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TST.L (An) */ +void REGPARAM2 op_4a90_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* TST.L (An)+ */ +void REGPARAM2 op_4a98_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* TST.L -(An) */ +void REGPARAM2 op_4aa0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* TST.L (d16,An) */ +void REGPARAM2 op_4aa8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +void REGPARAM2 op_4ab0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 4,0 */ + +/* TST.L (xxx).W */ +void REGPARAM2 op_4ab8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (4/0) */ +/* 4 0,0 */ + +/* TST.L (xxx).L */ +void REGPARAM2 op_4ab9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 20 (5/0) */ +/* 6 0,0 */ + +/* TAS.B Dn */ +void REGPARAM2 op_4ac0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* TAS.B (An) */ +void REGPARAM2 op_4ad0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + uae_u8 old_src = src; + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* TAS.B (An)+ */ +void REGPARAM2 op_4ad8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + uae_u8 old_src = src; + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* TAS.B -(An) */ +void REGPARAM2 op_4ae0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + do_cycles_ce000_internal(2); + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + uae_u8 old_src = src; + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 16 (2/1) */ +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +void REGPARAM2 op_4ae8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + uae_u8 old_src = src; + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +void REGPARAM2 op_4af0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + uae_u8 old_src = src; + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 20 (3/1) */ +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +void REGPARAM2 op_4af8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + do_cycles_ce000_internal(2); + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + uae_u8 old_src = src; + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +void REGPARAM2 op_4af9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + do_cycles_ce000_internal(2); + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + do_cycles_ce000_internal(2); + uae_u8 old_src = src; + src |= 0x80; + if (!is_cycle_ce(srca)) { + ipl_fetch_now(); + x_put_byte(srca, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, src, 1); + return; + } + } else { + do_cycles_ce000_internal(4); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 22 (4/1) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(An) */ +void REGPARAM2 op_4c90_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +void REGPARAM2 op_4c98_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + ipl_fetch_now(); + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +void REGPARAM2 op_4ca8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cb0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.W #.W,(xxx).W */ +void REGPARAM2 op_4cb8_14_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +void REGPARAM2 op_4cb9_14_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_read_access(opcode, srca, 1, 1); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20+ (5/0) */ +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +void REGPARAM2 op_4cba_14_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + opcode |= 0x00020000; + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 1, 2); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cbb_14_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + do_cycles_ce000_internal(2); + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 4; + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + opcode |= 0x00020000; + uaecptr srcav = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 2); + return; + } + while (dmask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (uae_s32)(uae_s16)x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.L #.W,(An) */ +void REGPARAM2 op_4cd0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +void REGPARAM2 op_4cd8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + ipl_fetch_now(); + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = srca; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +void REGPARAM2 op_4ce8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cf0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* MVMEL.L #.W,(xxx).W */ +void REGPARAM2 op_4cf8_14_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +void REGPARAM2 op_4cf9_14_ff(uae_u32 opcode) +{ + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_word_ce000_prefetch(6) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + srca |= get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 8, pcoffset); + return; + } + if (srca & 1) { + uaecptr srcav = srca; + m68k_incpci(10); + exception3_read_access(opcode, srca, 2, 1); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(10); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(10); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 10, pcoffset); + return; + } + m68k_incpci(8); + return; +} +/* 20+ (5/0) */ +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +void REGPARAM2 op_4cfa_14_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + opcode |= 0x00020000; + uaecptr srcav = srca; + m68k_incpci(8); + exception3_read_access(opcode, srca, 2, 2); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cfb_14_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + do_cycles_ce000_internal(2); + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 4; + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(6)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, -2); + return; + } + if (srca & 1) { + opcode |= 0x00020000; + uaecptr srcav = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 2); + return; + } + while (dmask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_dreg(regs, movem_index1[dmask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_dreg(regs, movem_index1[dmask]) = v; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + uae_u32 v = (x_get_word(srca) << 16) | (m68k_areg(regs, movem_index1[amask]) & 0xffff); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + v &= 0xffff0000; + v |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + m68k_areg(regs, movem_index1[amask]) = v; + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 18+ (4/0) */ +/* 6 4,0 */ + +/* LINK.W An,#.W */ +void REGPARAM2 op_4e50_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + ipl_fetch_now(); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + m68k_areg(regs, 7) += 4; + exception2_fetch(opcode, 4, 2); + return; + } + if (olda & 1) { + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + m68k_incpci(6); + exception3_write_access(opcode, olda, sz_word, src >> 16, 1); + return; + } + x_put_word(olda, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + exception2_write(opcode, olda + 0, 0x1, src >> 16, 1); + return; + } + x_put_word(olda + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + exception2_write(opcode, olda + 2, 0x1, src, 1); + return; + } + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 16 (2/2) */ +/* 4 0,0 */ + +/* UNLK.L An */ +void REGPARAM2 op_4e58_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + ipl_fetch_now(); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + if (olda & 1) { + m68k_incpci(4); + exception3_read_access(opcode, olda, 2, 1); + return; + } + uae_s32 old = x_get_word(olda) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, olda + 0, 0x1, 1); + return; + } + old |= x_get_word(olda + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, olda + 2, 0x1, 1); + return; + } + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = (old); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* MVR2USP.L An */ +void REGPARAM2 op_4e60_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* MVUSP2R.L An */ +void REGPARAM2 op_4e68_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_areg(regs, srcreg) = (regs.usp); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* RESET.L */ +void REGPARAM2 op_4e70_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + bool r = cpureset(); + do_cycles_ce000_internal(128); + if (r) { + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 132 (1/0) */ +/* 2 0,0 */ + +/* NOP.L */ +void REGPARAM2 op_4e71_14_ff(uae_u32 opcode) +{ + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* STOP.L #.W */ +void REGPARAM2 op_4e72_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + if (!regs.stopped) { + uae_u16 src = regs.irc; + regs.irc = src; + } + uae_u16 sr = regs.irc; + ipl_fetch_next(); + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return; +} +/* 4 (0/0) */ + +/* RTE.L */ +void REGPARAM2 op_4e73_14_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return; + } + uaecptr oldpc = m68k_getpci(); + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + if(hardware_bus_error) { + exception2_read(opcode, a + 0, 0x1, 1); + return; + } + m68k_areg(regs, 7) += 6; + uae_u32 pc = x_get_word(a + 2) << 16; + if(hardware_bus_error) { + exception2_read(opcode, a + 2, 0x1, 1); + return; + } + pc |= x_get_word(a + 2 + 2); + if(hardware_bus_error) { + exception2_read(opcode, a + 4, 0x1, 1); + return; + } + uae_u16 oldt1 = regs.t1; + regs.sr = sr; + MakeFromSR(); + if (pc & 1) { + m68k_incpci(2); + exception3_read_access(opcode | 0x20000, pc, 1, 2); + return; + } + m68k_setpci_j(pc); + opcode |= 0x20000; + branch_stack_pop_rte(oldpc); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(oldt1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (5/0) */ +/* 2 0,0 B */ + +/* RTS.L */ +void REGPARAM2 op_4e75_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return; + } + uaecptr newpc, dsta = m68k_areg(regs, 7); + newpc = x_get_word(dsta) << 16; + if(hardware_bus_error) { + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + newpc |= x_get_word(dsta + 2); + if(hardware_bus_error) { + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, 7) += 4; + m68k_setpci_j(newpc); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 16 (4/0) */ +/* 2 0,0 B */ + +/* TRAPV.L */ +void REGPARAM2 op_4e76_14_ff(uae_u32 opcode) +{ + m68k_incpci(2); + uae_u16 opcode_v = opcode; + int ipl0 = regs.ipl[0]; + int ipl1 = regs.ipl[1]; + regs.ir = regs.irc; + opcode |= 0x20000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (GET_VFLG()) { + MakeSR(); + regs.sr |= 0x2000; + regs.sr &= ~0x8000; + MakeFromSR(); + pcoffset -= 2; + } else { + opcode = regs.ir | 0x20000; + if(regs.t1) opcode |= 0x10000; + } + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + opcode = regs.ir; + if (GET_VFLG()) { + regs.ipl[0] = ipl0; + regs.ipl[1] = ipl1; + regs.ir = opcode_v; + Exception_cpu(7); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* RTR.L */ +void REGPARAM2 op_4e77_14_ff(uae_u32 opcode) +{ + if (m68k_areg(regs, 7) & 1) { + m68k_incpci(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return; + } + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + if (sra & 1) { + m68k_incpci(2); + exception3_read_access(opcode, sra, 1, 1); + return; + } + uae_s16 sr = x_get_word(sra); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, sra + 0, 0x1, 1); + return; + } + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + if (pca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, pca, 2, 1); + return; + } + uae_s32 pc = x_get_word(pca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 0, 0x1, 1); + return; + } + pc |= x_get_word(pca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, pca + 2, 0x1, 1); + return; + } + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci_j(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 20 (5/0) */ +/* 2 0,0 B */ + +/* JSR.L (An) */ +void REGPARAM2 op_4e90_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(0, 2, 0); + return; + } + return; +} +/* 16 (2/2) */ +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +void REGPARAM2 op_4ea8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +void REGPARAM2 op_4eb0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + do_cycles_ce000_internal(6); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(6); + nextpc += 2; + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 22 (2/2) */ +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +void REGPARAM2 op_4eb8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(4); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +void REGPARAM2 op_4eb9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + srca |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpci(6); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 20 (3/2) */ +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +void REGPARAM2 op_4eba_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +void REGPARAM2 op_4ebb_14_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + ipl_fetch_now(); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + do_cycles_ce000_internal(6); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(6); + nextpc += 2; + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpci_j(oldpc); + m68k_incpci(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return; + } + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 22 (2/2) */ +/* 2 2,0 B */ + +/* JMP.L (An) */ +void REGPARAM2 op_4ed0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(0, 2, 0); + return; + } + return; +} +/* 8 (2/0) */ +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +void REGPARAM2 op_4ee8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +void REGPARAM2 op_4ef0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(6); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(6); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 14 (2/0) */ +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +void REGPARAM2 op_4ef8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +void REGPARAM2 op_4ef9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + srca |= regs.irc; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 12 (3/0) */ +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +void REGPARAM2 op_4efa_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)regs.irc; + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(2); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(2); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 10 (2/0) */ +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +void REGPARAM2 op_4efb_14_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + srca = get_disp_ea_000(tmppc, regs.irc); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + ipl_fetch_now(); + if (srca & 1) { + do_cycles_ce000_internal(6); + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + do_cycles_ce000_internal(6); + m68k_setpci_j(srca); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, 0); + return; + } + regs.ir = regs.irc; + get_word_ce000_prefetch(2); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; +} +/* 14 (2/0) */ +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +void REGPARAM2 op_5000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +void REGPARAM2 op_5010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +void REGPARAM2 op_5018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +void REGPARAM2 op_5020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +void REGPARAM2 op_5028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADDQ.B #,(xxx).W */ +void REGPARAM2 op_5038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +void REGPARAM2 op_5039_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +void REGPARAM2 op_5040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +void REGPARAM2 op_5048_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +void REGPARAM2 op_5050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +void REGPARAM2 op_5058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +void REGPARAM2 op_5060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +void REGPARAM2 op_5068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADDQ.W #,(xxx).W */ +void REGPARAM2 op_5078_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +void REGPARAM2 op_5079_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +void REGPARAM2 op_5080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +void REGPARAM2 op_5088_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +void REGPARAM2 op_5090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +void REGPARAM2 op_5098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +void REGPARAM2 op_50a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +void REGPARAM2 op_50a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_50b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* ADDQ.L #,(xxx).W */ +void REGPARAM2 op_50b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +void REGPARAM2 op_50b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +void REGPARAM2 op_50c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +void REGPARAM2 op_50c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +void REGPARAM2 op_50d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +void REGPARAM2 op_50d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +void REGPARAM2 op_50e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +void REGPARAM2 op_50e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +void REGPARAM2 op_50f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +void REGPARAM2 op_50f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +void REGPARAM2 op_50f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.B #,Dn */ +void REGPARAM2 op_5100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +void REGPARAM2 op_5110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +void REGPARAM2 op_5118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +void REGPARAM2 op_5120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +void REGPARAM2 op_5128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUBQ.B #,(xxx).W */ +void REGPARAM2 op_5138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +void REGPARAM2 op_5139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +void REGPARAM2 op_5140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +void REGPARAM2 op_5148_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +void REGPARAM2 op_5150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +void REGPARAM2 op_5158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +void REGPARAM2 op_5160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +void REGPARAM2 op_5168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUBQ.W #,(xxx).W */ +void REGPARAM2 op_5178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +void REGPARAM2 op_5179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +void REGPARAM2 op_5180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +void REGPARAM2 op_5188_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +void REGPARAM2 op_5190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +void REGPARAM2 op_5198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +void REGPARAM2 op_51a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +void REGPARAM2 op_51a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_51b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* SUBQ.L #,(xxx).W */ +void REGPARAM2 op_51b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +void REGPARAM2 op_51b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +void REGPARAM2 op_51c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +void REGPARAM2 op_51c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +void REGPARAM2 op_51d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +void REGPARAM2 op_51d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +void REGPARAM2 op_51e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +void REGPARAM2 op_51e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +void REGPARAM2 op_51f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +void REGPARAM2 op_51f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +void REGPARAM2 op_51f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +void REGPARAM2 op_52c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +void REGPARAM2 op_52c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +void REGPARAM2 op_52d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +void REGPARAM2 op_52d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +void REGPARAM2 op_52e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +void REGPARAM2 op_52e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +void REGPARAM2 op_52f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +void REGPARAM2 op_52f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +void REGPARAM2 op_52f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +void REGPARAM2 op_53c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +void REGPARAM2 op_53c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +void REGPARAM2 op_53d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +void REGPARAM2 op_53d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +void REGPARAM2 op_53e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +void REGPARAM2 op_53e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +void REGPARAM2 op_53f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +void REGPARAM2 op_53f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +void REGPARAM2 op_53f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +void REGPARAM2 op_54c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +void REGPARAM2 op_54c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +void REGPARAM2 op_54d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +void REGPARAM2 op_54d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +void REGPARAM2 op_54e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +void REGPARAM2 op_54e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +void REGPARAM2 op_54f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +void REGPARAM2 op_54f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +void REGPARAM2 op_54f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +void REGPARAM2 op_55c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +void REGPARAM2 op_55c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +void REGPARAM2 op_55d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +void REGPARAM2 op_55d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +void REGPARAM2 op_55e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +void REGPARAM2 op_55e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +void REGPARAM2 op_55f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +void REGPARAM2 op_55f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +void REGPARAM2 op_55f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +void REGPARAM2 op_56c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +void REGPARAM2 op_56c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +void REGPARAM2 op_56d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +void REGPARAM2 op_56d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +void REGPARAM2 op_56e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +void REGPARAM2 op_56e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +void REGPARAM2 op_56f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +void REGPARAM2 op_56f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +void REGPARAM2 op_56f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +void REGPARAM2 op_57c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +void REGPARAM2 op_57c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +void REGPARAM2 op_57d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +void REGPARAM2 op_57d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +void REGPARAM2 op_57e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +void REGPARAM2 op_57e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +void REGPARAM2 op_57f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +void REGPARAM2 op_57f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +void REGPARAM2 op_57f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +void REGPARAM2 op_58c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +void REGPARAM2 op_58c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +void REGPARAM2 op_58d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +void REGPARAM2 op_58d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +void REGPARAM2 op_58e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +void REGPARAM2 op_58e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +void REGPARAM2 op_58f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +void REGPARAM2 op_58f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +void REGPARAM2 op_58f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +void REGPARAM2 op_59c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +void REGPARAM2 op_59c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +void REGPARAM2 op_59d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +void REGPARAM2 op_59d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +void REGPARAM2 op_59e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +void REGPARAM2 op_59e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +void REGPARAM2 op_59f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +void REGPARAM2 op_59f8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +void REGPARAM2 op_59f9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +void REGPARAM2 op_5ac0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +void REGPARAM2 op_5ac8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +void REGPARAM2 op_5ad0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +void REGPARAM2 op_5ad8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +void REGPARAM2 op_5ae0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +void REGPARAM2 op_5ae8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +void REGPARAM2 op_5af0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +void REGPARAM2 op_5af8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +void REGPARAM2 op_5af9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +void REGPARAM2 op_5bc0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +void REGPARAM2 op_5bc8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +void REGPARAM2 op_5bd0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +void REGPARAM2 op_5bd8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +void REGPARAM2 op_5be0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +void REGPARAM2 op_5be8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +void REGPARAM2 op_5bf0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +void REGPARAM2 op_5bf8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +void REGPARAM2 op_5bf9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +void REGPARAM2 op_5cc0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +void REGPARAM2 op_5cc8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +void REGPARAM2 op_5cd0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +void REGPARAM2 op_5cd8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +void REGPARAM2 op_5ce0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +void REGPARAM2 op_5ce8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +void REGPARAM2 op_5cf0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +void REGPARAM2 op_5cf8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +void REGPARAM2 op_5cf9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +void REGPARAM2 op_5dc0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +void REGPARAM2 op_5dc8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +void REGPARAM2 op_5dd0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +void REGPARAM2 op_5dd8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +void REGPARAM2 op_5de0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +void REGPARAM2 op_5de8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +void REGPARAM2 op_5df0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +void REGPARAM2 op_5df8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +void REGPARAM2 op_5df9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +void REGPARAM2 op_5ec0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +void REGPARAM2 op_5ec8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +void REGPARAM2 op_5ed0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +void REGPARAM2 op_5ed8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +void REGPARAM2 op_5ee0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +void REGPARAM2 op_5ee8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +void REGPARAM2 op_5ef0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +void REGPARAM2 op_5ef8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +void REGPARAM2 op_5ef9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +void REGPARAM2 op_5fc0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + int cycles = val ? 2 : 0; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + regs.ir = regs.irc; + if (!val) + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if(!val && regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + if (cycles > 0) do_cycles_ce000_internal(cycles); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +void REGPARAM2 op_5fc8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = regs.irc; + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 4; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, 0); + return; + } + return; + } + pcadjust = 0; + } else { + do_cycles_ce000_internal(2); + } + m68k_setpci_j(oldpc + 4); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset += pcadjust; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +void REGPARAM2 op_5fd0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +void REGPARAM2 op_5fd8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +void REGPARAM2 op_5fe0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +void REGPARAM2 op_5fe8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +void REGPARAM2 op_5ff0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +void REGPARAM2 op_5ff8_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +void REGPARAM2 op_5ff9_14_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, srca + 0, 0x0, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* Bcc.W #.W (T) */ +void REGPARAM2 op_6000_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +void REGPARAM2 op_6001_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +void REGPARAM2 op_60ff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(0)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* BSR.W #.W */ +void REGPARAM2 op_6100_14_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = regs.irc; + s = (uae_s32)src + 2; + do_cycles_ce000_internal(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + m68k_incpci(s); + if (m68k_getpci() & 1) { + uaecptr addr = m68k_getpci(); + m68k_incpci(-2); + exception3_read_prefetch(opcode, addr); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + ipl_fetch_next(); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 4 0,0 B */ + +/* BSRQ.B # */ +void REGPARAM2 op_6101_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + do_cycles_ce000_internal(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + m68k_incpci(s); + if (m68k_getpci() & 1) { + uaecptr addr = m68k_getpci(); + m68k_incpci(-2); + exception3_read_prefetch(opcode, addr); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + ipl_fetch_next(); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 2 0,0 B */ + +/* BSR.L #.L */ +void REGPARAM2 op_61ff_14_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + do_cycles_ce000_internal(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpci(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return; + } + m68k_areg(regs, 7) -= 4; + uaecptr dsta = m68k_areg(regs, 7); + x_put_word(dsta, nextpc >> 16); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 0, 0x1, nextpc >> 16, 1); + return; + } + x_put_word(dsta + 2, nextpc); + if(hardware_bus_error) { + exception2_write(opcode, dsta + 2, 0x1, nextpc, 1); + return; + } + m68k_incpci(s); + if (m68k_getpci() & 1) { + uaecptr addr = m68k_getpci(); + m68k_incpci(-2); + exception3_read_prefetch(opcode, addr); + return; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + ipl_fetch_next(); + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 18 (2/2) */ +/* 2 0,0 B */ + +/* Bcc.W #.W (HI) */ +void REGPARAM2 op_6200_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +void REGPARAM2 op_6201_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +void REGPARAM2 op_62ff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(2)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LS) */ +void REGPARAM2 op_6300_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +void REGPARAM2 op_6301_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +void REGPARAM2 op_63ff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(3)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (CC) */ +void REGPARAM2 op_6400_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +void REGPARAM2 op_6401_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +void REGPARAM2 op_64ff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(4)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (CS) */ +void REGPARAM2 op_6500_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +void REGPARAM2 op_6501_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +void REGPARAM2 op_65ff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(5)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (NE) */ +void REGPARAM2 op_6600_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +void REGPARAM2 op_6601_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +void REGPARAM2 op_66ff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(6)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (EQ) */ +void REGPARAM2 op_6700_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +void REGPARAM2 op_6701_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +void REGPARAM2 op_67ff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(7)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (VC) */ +void REGPARAM2 op_6800_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +void REGPARAM2 op_6801_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +void REGPARAM2 op_68ff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(8)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (VS) */ +void REGPARAM2 op_6900_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +void REGPARAM2 op_6901_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +void REGPARAM2 op_69ff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(9)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (PL) */ +void REGPARAM2 op_6a00_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +void REGPARAM2 op_6a01_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +void REGPARAM2 op_6aff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(10)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (MI) */ +void REGPARAM2 op_6b00_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +void REGPARAM2 op_6b01_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +void REGPARAM2 op_6bff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(11)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (GE) */ +void REGPARAM2 op_6c00_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +void REGPARAM2 op_6c01_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +void REGPARAM2 op_6cff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(12)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LT) */ +void REGPARAM2 op_6d00_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +void REGPARAM2 op_6d01_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +void REGPARAM2 op_6dff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(13)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (GT) */ +void REGPARAM2 op_6e00_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +void REGPARAM2 op_6e01_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +void REGPARAM2 op_6eff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(14)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* Bcc.W #.W (LE) */ +void REGPARAM2 op_6f00_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + uae_s16 src = regs.irc; + do_cycles_ce000_internal(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(4); + do_cycles_ce000_internal(2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 12 (2/0) */ +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +void REGPARAM2 op_6f01_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + do_cycles_ce000_internal(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + get_word_ce000_prefetch(0); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 0, pcoffset); + return; + } + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + pcoffset = oldpc - m68k_getpci() + 2; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +void REGPARAM2 op_6fff_14_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpci(); + do_cycles_ce000_internal(2); + if (cctrue(15)) { + exception3_read_prefetch(opcode, m68k_getpci() + 1); + return; + } + m68k_incpci(2); + do_cycles_ce000_internal(2); + regs.ir = regs.irc; + opcode = regs.ir; + if(regs.t1) opcode |= 0x10000; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* MOVEQ.L #,Dn */ +void REGPARAM2 op_7000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(2); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 2, pcoffset); + return; + } + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +void REGPARAM2 op_8000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.B (An),Dn */ +void REGPARAM2 op_8010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +void REGPARAM2 op_8018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +void REGPARAM2 op_8020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +void REGPARAM2 op_8028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +void REGPARAM2 op_8030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.B (xxx).W,Dn */ +void REGPARAM2 op_8038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +void REGPARAM2 op_8039_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +void REGPARAM2 op_803a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_803b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.B #.B,Dn */ +void REGPARAM2 op_803c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +void REGPARAM2 op_8040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* OR.W (An),Dn */ +void REGPARAM2 op_8050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +void REGPARAM2 op_8058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +void REGPARAM2 op_8060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +void REGPARAM2 op_8068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +void REGPARAM2 op_8070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.W (xxx).W,Dn */ +void REGPARAM2 op_8078_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +void REGPARAM2 op_8079_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +void REGPARAM2 op_807a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_807b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_807c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +void REGPARAM2 op_8080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* OR.L (An),Dn */ +void REGPARAM2 op_8090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +void REGPARAM2 op_8098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +void REGPARAM2 op_80a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +void REGPARAM2 op_80a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +void REGPARAM2 op_80b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +void REGPARAM2 op_80b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +void REGPARAM2 op_80b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +void REGPARAM2 op_80ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_80bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_80bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +void REGPARAM2 op_80c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +void REGPARAM2 op_80d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +void REGPARAM2 op_80d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +void REGPARAM2 op_80e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +void REGPARAM2 op_80e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_80f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVU.W (xxx).W,Dn */ +void REGPARAM2 op_80f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +void REGPARAM2 op_80f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +void REGPARAM2 op_80fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_80fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVU.W #.W,Dn */ +void REGPARAM2 op_80fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + int cycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); + do_cycles_ce000_internal(cycles); + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + ipl_fetch_next(); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +void REGPARAM2 op_8100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +void REGPARAM2 op_8108_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + ipl_fetch_next_pre(); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +void REGPARAM2 op_8110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +void REGPARAM2 op_8118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +void REGPARAM2 op_8120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +void REGPARAM2 op_8128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_8130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* OR.B Dn,(xxx).W */ +void REGPARAM2 op_8138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +void REGPARAM2 op_8139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.W Dn,(An) */ +void REGPARAM2 op_8150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +void REGPARAM2 op_8158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +void REGPARAM2 op_8160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +void REGPARAM2 op_8168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_8170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* OR.W Dn,(xxx).W */ +void REGPARAM2 op_8178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +void REGPARAM2 op_8179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* OR.L Dn,(An) */ +void REGPARAM2 op_8190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +void REGPARAM2 op_8198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +void REGPARAM2 op_81a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +void REGPARAM2 op_81a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_81b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* OR.L Dn,(xxx).W */ +void REGPARAM2 op_81b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +void REGPARAM2 op_81b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +void REGPARAM2 op_81c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +void REGPARAM2 op_81d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +void REGPARAM2 op_81d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +void REGPARAM2 op_81e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +void REGPARAM2 op_81e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_81f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVS.W (xxx).W,Dn */ +void REGPARAM2 op_81f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +void REGPARAM2 op_81f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +void REGPARAM2 op_81fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_81fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* DIVS.W #.W,Dn */ +void REGPARAM2 op_81fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + do_cycles_ce000_internal(4); + Exception_cpu(5); + return; + } + int extra = 0; + int cycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src, &extra); + if (extra) { + cycles -= 2; + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + cycles = 2; + do_cycles_ce000_internal(cycles); + } else { + do_cycles_ce000_internal(cycles); + ipl_fetch_next(); + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +void REGPARAM2 op_9000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +void REGPARAM2 op_9010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +void REGPARAM2 op_9018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +void REGPARAM2 op_9020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +void REGPARAM2 op_9028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +void REGPARAM2 op_9030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.B (xxx).W,Dn */ +void REGPARAM2 op_9038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +void REGPARAM2 op_9039_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +void REGPARAM2 op_903a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_903b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.B #.B,Dn */ +void REGPARAM2 op_903c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +void REGPARAM2 op_9040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.W An,Dn */ +void REGPARAM2 op_9048_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +void REGPARAM2 op_9050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +void REGPARAM2 op_9058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +void REGPARAM2 op_9060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +void REGPARAM2 op_9068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +void REGPARAM2 op_9070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.W (xxx).W,Dn */ +void REGPARAM2 op_9078_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +void REGPARAM2 op_9079_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +void REGPARAM2 op_907a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_907b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_907c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +void REGPARAM2 op_9080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUB.L An,Dn */ +void REGPARAM2 op_9088_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +void REGPARAM2 op_9090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +void REGPARAM2 op_9098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +void REGPARAM2 op_90a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +void REGPARAM2 op_90a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +void REGPARAM2 op_90b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +void REGPARAM2 op_90b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +void REGPARAM2 op_90b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +void REGPARAM2 op_90ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_90bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_90bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +void REGPARAM2 op_90c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.W An,An */ +void REGPARAM2 op_90c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.W (An),An */ +void REGPARAM2 op_90d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +void REGPARAM2 op_90d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +void REGPARAM2 op_90e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +void REGPARAM2 op_90e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +void REGPARAM2 op_90f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* SUBA.W (xxx).W,An */ +void REGPARAM2 op_90f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +void REGPARAM2 op_90f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +void REGPARAM2 op_90fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +void REGPARAM2 op_90fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* SUBA.W #.W,An */ +void REGPARAM2 op_90fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +void REGPARAM2 op_9100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +void REGPARAM2 op_9108_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +void REGPARAM2 op_9110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +void REGPARAM2 op_9118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +void REGPARAM2 op_9120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +void REGPARAM2 op_9128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_9130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUB.B Dn,(xxx).W */ +void REGPARAM2 op_9138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +void REGPARAM2 op_9139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +void REGPARAM2 op_9140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +void REGPARAM2 op_9148_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +void REGPARAM2 op_9150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +void REGPARAM2 op_9158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +void REGPARAM2 op_9160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +void REGPARAM2 op_9168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_9170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* SUB.W Dn,(xxx).W */ +void REGPARAM2 op_9178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +void REGPARAM2 op_9179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +void REGPARAM2 op_9180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + SET_XFLG(GET_CFLG()); + SET_ZFLG(oldz); + if (newv & 0xffff) SET_ZFLG(0); + SET_NFLG(newv & 0x8000); + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +void REGPARAM2 op_9188_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(4); + srca += 2; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + src |= x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(4); + dsta += 2; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgo) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgn) & (bflgo ^ bflgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 30 (5/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +void REGPARAM2 op_9190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +void REGPARAM2 op_9198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +void REGPARAM2 op_91a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +void REGPARAM2 op_91a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_91b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* SUB.L Dn,(xxx).W */ +void REGPARAM2 op_91b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +void REGPARAM2 op_91b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst - (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgo) & (bflgn ^ bflgo)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +void REGPARAM2 op_91c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.L An,An */ +void REGPARAM2 op_91c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* SUBA.L (An),An */ +void REGPARAM2 op_91d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +void REGPARAM2 op_91d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +void REGPARAM2 op_91e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +void REGPARAM2 op_91e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +void REGPARAM2 op_91f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUBA.L (xxx).W,An */ +void REGPARAM2 op_91f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +void REGPARAM2 op_91f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +void REGPARAM2 op_91fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +void REGPARAM2 op_91fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* SUBA.L #.L,An */ +void REGPARAM2 op_91fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +void REGPARAM2 op_b000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +void REGPARAM2 op_b010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +void REGPARAM2 op_b018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +void REGPARAM2 op_b020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +void REGPARAM2 op_b028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +void REGPARAM2 op_b030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.B (xxx).W,Dn */ +void REGPARAM2 op_b038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +void REGPARAM2 op_b039_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +void REGPARAM2 op_b03a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_b03b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.B #.B,Dn */ +void REGPARAM2 op_b03c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +void REGPARAM2 op_b040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.W An,Dn */ +void REGPARAM2 op_b048_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +void REGPARAM2 op_b050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +void REGPARAM2 op_b058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +void REGPARAM2 op_b060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +void REGPARAM2 op_b068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +void REGPARAM2 op_b070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.W (xxx).W,Dn */ +void REGPARAM2 op_b078_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +void REGPARAM2 op_b079_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +void REGPARAM2 op_b07a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_b07b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* CMP.W #.W,Dn */ +void REGPARAM2 op_b07c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +void REGPARAM2 op_b080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMP.L An,Dn */ +void REGPARAM2 op_b088_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +void REGPARAM2 op_b090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +void REGPARAM2 op_b098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +void REGPARAM2 op_b0a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +void REGPARAM2 op_b0a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +void REGPARAM2 op_b0b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMP.L (xxx).W,Dn */ +void REGPARAM2 op_b0b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +void REGPARAM2 op_b0b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +void REGPARAM2 op_b0ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_b0bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMP.L #.L,Dn */ +void REGPARAM2 op_b0bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +void REGPARAM2 op_b0c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.W An,An */ +void REGPARAM2 op_b0c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.W (An),An */ +void REGPARAM2 op_b0d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +void REGPARAM2 op_b0d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +void REGPARAM2 op_b0e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +void REGPARAM2 op_b0e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +void REGPARAM2 op_b0f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 4,0 */ + +/* CMPA.W (xxx).W,An */ +void REGPARAM2 op_b0f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +void REGPARAM2 op_b0f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 18 (4/0) */ +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +void REGPARAM2 op_b0fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +void REGPARAM2 op_b0fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 4,0 */ + +/* CMPA.W #.W,An */ +void REGPARAM2 op_b0fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 10 (2/0) */ +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +void REGPARAM2 op_b100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +void REGPARAM2 op_b108_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg] + 0; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +void REGPARAM2 op_b110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +void REGPARAM2 op_b118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +void REGPARAM2 op_b120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +void REGPARAM2 op_b128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_b130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* EOR.B Dn,(xxx).W */ +void REGPARAM2 op_b138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +void REGPARAM2 op_b139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +void REGPARAM2 op_b140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +void REGPARAM2 op_b148_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 12 (3/0) */ +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +void REGPARAM2 op_b150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +void REGPARAM2 op_b158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +void REGPARAM2 op_b160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +void REGPARAM2 op_b168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_b170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* EOR.W Dn,(xxx).W */ +void REGPARAM2 op_b178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +void REGPARAM2 op_b179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +void REGPARAM2 op_b180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +void REGPARAM2 op_b188_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) += 2 + 2; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 20 (5/0) */ +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +void REGPARAM2 op_b190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +void REGPARAM2 op_b198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +void REGPARAM2 op_b1a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +void REGPARAM2 op_b1a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_b1b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* EOR.L Dn,(xxx).W */ +void REGPARAM2 op_b1b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +void REGPARAM2 op_b1b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +void REGPARAM2 op_b1c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.L An,An */ +void REGPARAM2 op_b1c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* CMPA.L (An),An */ +void REGPARAM2 op_b1d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +void REGPARAM2 op_b1d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +void REGPARAM2 op_b1e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +void REGPARAM2 op_b1e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +void REGPARAM2 op_b1f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMPA.L (xxx).W,An */ +void REGPARAM2 op_b1f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +void REGPARAM2 op_b1f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +void REGPARAM2 op_b1fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +void REGPARAM2 op_b1fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* CMPA.L #.L,An */ +void REGPARAM2 op_b1fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(6); + return; +} +/* 14 (3/0) */ +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +void REGPARAM2 op_c000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* AND.B (An),Dn */ +void REGPARAM2 op_c010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +void REGPARAM2 op_c018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +void REGPARAM2 op_c020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +void REGPARAM2 op_c028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +void REGPARAM2 op_c030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.B (xxx).W,Dn */ +void REGPARAM2 op_c038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +void REGPARAM2 op_c039_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +void REGPARAM2 op_c03a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_c03b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_c03c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +void REGPARAM2 op_c040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* AND.W (An),Dn */ +void REGPARAM2 op_c050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +void REGPARAM2 op_c058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +void REGPARAM2 op_c060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +void REGPARAM2 op_c068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.W (xxx).W,Dn */ +void REGPARAM2 op_c078_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +void REGPARAM2 op_c079_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +void REGPARAM2 op_c07a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c07b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_c07c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +void REGPARAM2 op_c080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* AND.L (An),Dn */ +void REGPARAM2 op_c090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +void REGPARAM2 op_c098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +void REGPARAM2 op_c0a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +void REGPARAM2 op_c0a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +void REGPARAM2 op_c0b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +void REGPARAM2 op_c0b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +void REGPARAM2 op_c0b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +void REGPARAM2 op_c0ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_c0bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + dreg_68000_long_replace_low(dstreg, src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +void REGPARAM2 op_c0c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +void REGPARAM2 op_c0d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +void REGPARAM2 op_c0d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +void REGPARAM2 op_c0e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 0; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +void REGPARAM2 op_c0e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c0f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULU.W (xxx).W,Dn */ +void REGPARAM2 op_c0f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +void REGPARAM2 op_c0f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +void REGPARAM2 op_c0fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULU.W #.W,Dn */ +void REGPARAM2 op_c0fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMulu68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +void REGPARAM2 op_c100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +void REGPARAM2 op_c108_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + ipl_fetch_next_pre(); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +void REGPARAM2 op_c110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +void REGPARAM2 op_c118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +void REGPARAM2 op_c120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +void REGPARAM2 op_c128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_c130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* AND.B Dn,(xxx).W */ +void REGPARAM2 op_c138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +void REGPARAM2 op_c139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +void REGPARAM2 op_c140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* EXG.L An,An */ +void REGPARAM2 op_c148_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +void REGPARAM2 op_c150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +void REGPARAM2 op_c158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +void REGPARAM2 op_c160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +void REGPARAM2 op_c168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_c170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* AND.W Dn,(xxx).W */ +void REGPARAM2 op_c178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +void REGPARAM2 op_c179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, src); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, src, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* EXG.L Dn,An */ +void REGPARAM2 op_c188_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_incpci(2); + return; +} +/* 6 (1/0) */ +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +void REGPARAM2 op_c190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +void REGPARAM2 op_c198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +void REGPARAM2 op_c1a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +void REGPARAM2 op_c1a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_c1b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* AND.L Dn,(xxx).W */ +void REGPARAM2 op_c1b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +void REGPARAM2 op_c1b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + ccr_68000_long_move_ae_LZN(src); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, src); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, src, 1); + return; + } + x_put_word(dsta, src >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, src >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +void REGPARAM2 op_c1c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 4+ (1/0) */ +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +void REGPARAM2 op_c1d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +void REGPARAM2 op_c1d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +void REGPARAM2 op_c1e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 0; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 10+ (2/0) */ +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +void REGPARAM2 op_c1e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c1f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULS.W (xxx).W,Dn */ +void REGPARAM2 op_c1f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +void REGPARAM2 op_c1f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16+ (4/0) */ +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +void REGPARAM2 op_c1fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12+ (3/0) */ +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c1fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 4; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 14+ (3/0) */ +/* 4 4,0 */ + +/* MULS.W #.W,Dn */ +void REGPARAM2 op_c1fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.ir = regs.irc; + opcode |= 0x20000; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_ZFLG(1); + pcoffset -= 2; + m68k_dreg(regs, dstreg) &= 0xffff0000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + int cycles = getMuls68kCycles(src); + do_cycles_ce000_internal(cycles); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 8+ (2/0) */ +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +void REGPARAM2 op_d000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +void REGPARAM2 op_d010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +void REGPARAM2 op_d018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +void REGPARAM2 op_d020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +void REGPARAM2 op_d028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +void REGPARAM2 op_d030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.B (xxx).W,Dn */ +void REGPARAM2 op_d038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +void REGPARAM2 op_d039_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +void REGPARAM2 op_d03a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_d03b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x0, 2); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.B #.B,Dn */ +void REGPARAM2 op_d03c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +void REGPARAM2 op_d040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.W An,Dn */ +void REGPARAM2 op_d048_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +void REGPARAM2 op_d050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +void REGPARAM2 op_d058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 8 (2/0) */ +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +void REGPARAM2 op_d060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_incpci(2); + return; +} +/* 10 (2/0) */ +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +void REGPARAM2 op_d068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +void REGPARAM2 op_d070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.W (xxx).W,Dn */ +void REGPARAM2 op_d078_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +void REGPARAM2 op_d079_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + m68k_incpci(6); + return; +} +/* 16 (4/0) */ +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +void REGPARAM2 op_d07a_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 12 (3/0) */ +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_d07b_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + ipl_fetch_now(); + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 14 (3/0) */ +/* 4 4,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_d07c_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + m68k_incpci(4); + return; +} +/* 8 (2/0) */ +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +void REGPARAM2 op_d080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADD.L An,Dn */ +void REGPARAM2 op_d088_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +void REGPARAM2 op_d090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +void REGPARAM2 op_d098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +void REGPARAM2 op_d0a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +void REGPARAM2 op_d0a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +void REGPARAM2 op_d0b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +void REGPARAM2 op_d0b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +void REGPARAM2 op_d0b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +void REGPARAM2 op_d0ba_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_d0bb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + ipl_fetch_now(); + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_d0bc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + dreg_68000_long_replace_low(dstreg, bnewv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +void REGPARAM2 op_d0c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.W An,An */ +void REGPARAM2 op_d0c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.W (An),An */ +void REGPARAM2 op_d0d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +void REGPARAM2 op_d0d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 12 (2/0) */ +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +void REGPARAM2 op_d0e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (2/0) */ +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +void REGPARAM2 op_d0e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +void REGPARAM2 op_d0f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* ADDA.W (xxx).W,An */ +void REGPARAM2 op_d0f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +void REGPARAM2 op_d0f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 20 (4/0) */ +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +void REGPARAM2 op_d0fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 16 (3/0) */ +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +void REGPARAM2 op_d0fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 1, 2); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (3/0) */ +/* 4 4,0 */ + +/* ADDA.W #.W,An */ +void REGPARAM2 op_d0fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 12 (2/0) */ +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +void REGPARAM2 op_d100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +void REGPARAM2 op_d108_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x0, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +void REGPARAM2 op_d110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +void REGPARAM2 op_d118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +void REGPARAM2 op_d120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +void REGPARAM2 op_d128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_d130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADD.B Dn,(xxx).W */ +void REGPARAM2 op_d138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +void REGPARAM2 op_d139_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + ipl_fetch_now(); + uae_s8 dst = x_get_byte(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x0, 1); + return; + } + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_byte(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x0, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +void REGPARAM2 op_d140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + regs.ir = regs.irc; + opcode = regs.ir; + ipl_fetch_next(); + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + if (regs.t1) opcode |= 0x10000; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 4 (1/0) */ +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +void REGPARAM2 op_d148_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + ipl_fetch_now(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + m68k_areg(regs, srcreg) = srca; + m68k_incpci(4); + exception3_read_access(opcode, srca, 1, 1); + return; + } + uae_s16 src = x_get_word(srca); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 18 (3/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +void REGPARAM2 op_d150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +void REGPARAM2 op_d158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) += 2 + 0; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +void REGPARAM2 op_d160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +void REGPARAM2 op_d168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_d170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ADD.W Dn,(xxx).W */ +void REGPARAM2 op_d178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +void REGPARAM2 op_d179_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 dst = x_get_word(dsta); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + x_put_word(dsta, newv); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dsta + 0, 0x1, newv, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +void REGPARAM2 op_d180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgo) & (bflgo ^ bflgn))); + SET_XFLG(GET_CFLG()); + SET_ZFLG(oldz); + if (newv & 0xffff) SET_ZFLG(0); + SET_NFLG(newv & 0x8000); + dreg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +void REGPARAM2 op_d188_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + do_cycles_ce000_internal(2); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + m68k_incpci(4); + srca += 2; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + src |= x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + m68k_incpci(4); + dsta += 2; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = ((uae_s16)(newv)) < 0; + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + SET_CFLG(bflgs ^ ((bflgs ^ bflgo) & (bflgo ^ bflgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 30 (5/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +void REGPARAM2 op_d190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +void REGPARAM2 op_d198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 20 (3/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +void REGPARAM2 op_d1a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + do_cycles_ce000_internal(2); + if (dsta & 1) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, dstreg) = dsta; + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(2); + return; +} +/* 22 (3/2) */ +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +void REGPARAM2 op_d1a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_d1b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + do_cycles_ce000_internal(2); + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dsta & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 26 (4/2) */ +/* 4 4,0 */ + +/* ADD.L Dn,(xxx).W */ +void REGPARAM2 op_d1b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dsta & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(4); + return; +} +/* 24 (4/2) */ +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +void REGPARAM2 op_d1b9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dsta |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dsta & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dsta, 2, 1); + return; + } + uae_s32 dst = x_get_word(dsta) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 0, 0x1, 1); + return; + } + ipl_fetch_now(); + dst |= x_get_word(dsta + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dsta + 2, 0x1, 1); + return; + } + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + uae_s16 bnewv = (uae_s16)dst + (uae_s16)src; + int bflgs = ((uae_s16)(src)) < 0; + int bflgo = ((uae_s16)(dst)) < 0; + int bflgn = bnewv < 0; + ccr_68000_long_move_ae_LZN(bnewv); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + SET_XFLG(GET_CFLG()); + SET_VFLG((bflgs ^ bflgn) & (bflgo ^ bflgn)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + x_put_word(dsta + 2, newv); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 2, 0x1, newv, 1); + return; + } + x_put_word(dsta, newv >> 16); + if(hardware_bus_error) { + m68k_incpci(8); + exception2_write(opcode, dsta + 0, 0x1, newv >> 16, 1); + return; + } + m68k_incpci(6); + return; +} +/* 28 (5/2) */ +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +void REGPARAM2 op_d1c0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.L An,An */ +void REGPARAM2 op_d1c8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 8 (1/0) */ +/* 2 0,0 */ + +/* ADDA.L (An),An */ +void REGPARAM2 op_d1d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +void REGPARAM2 op_d1d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 14 (3/0) */ +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +void REGPARAM2 op_d1e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + do_cycles_ce000_internal(2); + if (srca & 1) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) = srca; + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 16 (3/0) */ +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +void REGPARAM2 op_d1e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +void REGPARAM2 op_d1f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADDA.L (xxx).W,An */ +void REGPARAM2 op_d1f8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (srca & 1) { + m68k_incpci(4); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +void REGPARAM2 op_d1f9_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + srca |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (srca & 1) { + m68k_incpci(6); + exception3_read_access(opcode, srca, 2, 1); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 0, 0x1, 1); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, srca + 2, 0x1, 1); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 22 (5/0) */ +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +void REGPARAM2 op_d1fa_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 18 (4/0) */ +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +void REGPARAM2 op_d1fb_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpci() + 2; + do_cycles_ce000_internal(2); + srca = get_disp_ea_000(tmppc, get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (srca & 1) { + m68k_incpci(2); + exception3_read_access(opcode, srca, 2, 2); + return; + } + uae_s32 src = x_get_word(srca) << 16; + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 0, 0x1, 2); + return; + } + src |= x_get_word(srca + 2); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, srca + 2, 0x1, 2); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 20 (4/0) */ +/* 4 4,0 */ + +/* ADDA.L #.L,An */ +void REGPARAM2 op_d1fc_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + src |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + areg_68000_long_replace_low(dstreg, newv); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + do_cycles_ce000_internal(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 16 (3/0) */ +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +void REGPARAM2 op_e000_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +void REGPARAM2 op_e008_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +void REGPARAM2 op_e010_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +void REGPARAM2 op_e018_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +void REGPARAM2 op_e020_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +void REGPARAM2 op_e028_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +void REGPARAM2 op_e030_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +void REGPARAM2 op_e038_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +void REGPARAM2 op_e040_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +void REGPARAM2 op_e048_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +void REGPARAM2 op_e050_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +void REGPARAM2 op_e058_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +void REGPARAM2 op_e060_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +void REGPARAM2 op_e068_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +void REGPARAM2 op_e070_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +void REGPARAM2 op_e078_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +void REGPARAM2 op_e080_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +void REGPARAM2 op_e088_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +void REGPARAM2 op_e090_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +void REGPARAM2 op_e098_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +void REGPARAM2 op_e0a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +void REGPARAM2 op_e0a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +void REGPARAM2 op_e0b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +void REGPARAM2 op_e0b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASRW.W (An) */ +void REGPARAM2 op_e0d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +void REGPARAM2 op_e0d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASRW.W -(An) */ +void REGPARAM2 op_e0e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +void REGPARAM2 op_e0e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +void REGPARAM2 op_e0f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ASRW.W (xxx).W */ +void REGPARAM2 op_e0f8_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +void REGPARAM2 op_e0f9_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val >> 1)); + SET_NFLG(val & 0x8000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +void REGPARAM2 op_e100_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +void REGPARAM2 op_e108_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +void REGPARAM2 op_e110_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +void REGPARAM2 op_e118_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +void REGPARAM2 op_e120_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +void REGPARAM2 op_e128_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +void REGPARAM2 op_e130_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +void REGPARAM2 op_e138_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xff)); + SET_NFLG(val & 0x80); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +void REGPARAM2 op_e140_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +void REGPARAM2 op_e148_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +void REGPARAM2 op_e150_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +void REGPARAM2 op_e158_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +void REGPARAM2 op_e160_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +void REGPARAM2 op_e168_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +void REGPARAM2 op_e170_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +void REGPARAM2 op_e178_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_ZFLG(!(val & 0xffff)); + SET_NFLG(val & 0x8000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + { + int cycles = 2; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 6+ (1/0) */ +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +void REGPARAM2 op_e180_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +void REGPARAM2 op_e188_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +void REGPARAM2 op_e190_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +void REGPARAM2 op_e198_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +void REGPARAM2 op_e1a0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +void REGPARAM2 op_e1a8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +void REGPARAM2 op_e1b0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + SET_CFLG(GET_XFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +void REGPARAM2 op_e1b8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + ipl_fetch_next_pre(); + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + SET_NFLG(val & 0x8000); + SET_ZFLG(!(val & 0xffff)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + { + int cycles = 4; + cycles += 2 * ccnt; + do_cycles_ce000_internal(cycles); + } + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 8+ (1/0) */ +/* 2 0,0 */ + +/* ASLW.W (An) */ +void REGPARAM2 op_e1d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +void REGPARAM2 op_e1d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ASLW.W -(An) */ +void REGPARAM2 op_e1e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +void REGPARAM2 op_e1e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +void REGPARAM2 op_e1f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ASLW.W (xxx).W */ +void REGPARAM2 op_e1f8_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +void REGPARAM2 op_e1f9_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + SET_VFLG((val & 0x8000) != ((val << 1) & 0x8000)); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* LSRW.W (An) */ +void REGPARAM2 op_e2d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +void REGPARAM2 op_e2d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSRW.W -(An) */ +void REGPARAM2 op_e2e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +void REGPARAM2 op_e2e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +void REGPARAM2 op_e2f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* LSRW.W (xxx).W */ +void REGPARAM2 op_e2f8_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +void REGPARAM2 op_e2f9_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u32 val = (uae_u16)data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!(val & 0xfffe)); + SET_NFLG(0); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* LSLW.W (An) */ +void REGPARAM2 op_e3d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +void REGPARAM2 op_e3d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* LSLW.W -(An) */ +void REGPARAM2 op_e3e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +void REGPARAM2 op_e3e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +void REGPARAM2 op_e3f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* LSLW.W (xxx).W */ +void REGPARAM2 op_e3f8_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +void REGPARAM2 op_e3f9_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!(val & 0x7fff)); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROXRW.W (An) */ +void REGPARAM2 op_e4d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +void REGPARAM2 op_e4d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +void REGPARAM2 op_e4e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +void REGPARAM2 op_e4e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +void REGPARAM2 op_e4f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROXRW.W (xxx).W */ +void REGPARAM2 op_e4f8_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +void REGPARAM2 op_e4f9_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 1); + SET_ZFLG(!((val &0x7ffe) | GET_XFLG())) + ;SET_NFLG(GET_XFLG()) + ;SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROXLW.W (An) */ +void REGPARAM2 op_e5d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +void REGPARAM2 op_e5d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +void REGPARAM2 op_e5e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +void REGPARAM2 op_e5e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +void REGPARAM2 op_e5f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROXLW.W (xxx).W */ +void REGPARAM2 op_e5f8_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +void REGPARAM2 op_e5f9_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 0x8000); + SET_ZFLG(!((val & 0x7fff) | GET_XFLG())); + SET_NFLG(val & 0x4000); + SET_XFLG(GET_CFLG()); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* RORW.W (An) */ +void REGPARAM2 op_e6d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* RORW.W (An)+ */ +void REGPARAM2 op_e6d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* RORW.W -(An) */ +void REGPARAM2 op_e6e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +void REGPARAM2 op_e6e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +void REGPARAM2 op_e6f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* RORW.W (xxx).W */ +void REGPARAM2 op_e6f8_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +void REGPARAM2 op_e6f9_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV(); + SET_CFLG(val & 1); + SET_ZFLG(!val); + SET_NFLG(val & 0x0001); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + +/* ROLW.W (An) */ +void REGPARAM2 op_e7d0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +void REGPARAM2 op_e7d8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + m68k_areg(regs, srcreg) += 2 + 0; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 12 (2/1) */ +/* 2 0,0 */ + +/* ROLW.W -(An) */ +void REGPARAM2 op_e7e0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + do_cycles_ce000_internal(2); + if (dataa & 1) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + m68k_areg(regs, srcreg) = dataa; + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 4, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(4); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(2); + return; +} +/* 14 (2/1) */ +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +void REGPARAM2 op_e7e8_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +void REGPARAM2 op_e7f0_14_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + do_cycles_ce000_internal(2); + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_word_ce000_prefetch(4)); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + if (dataa & 1) { + m68k_incpci(2); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(2); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 18 (3/1) */ +/* 4 4,0 */ + +/* ROLW.W (xxx).W */ +void REGPARAM2 op_e7f8_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce000_prefetch(4); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, 0); + return; + } + if (dataa & 1) { + m68k_incpci(4); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(4); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 6, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(6); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(4); + return; +} +/* 16 (3/1) */ +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +void REGPARAM2 op_e7f9_14_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_word_ce000_prefetch(4) << 16; + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 4, -2); + return; + } + dataa |= get_word_ce000_prefetch(6); + if(hardware_bus_error) { + int pcoffset = 0; + exception2_fetch(opcode, 6, pcoffset); + return; + } + if (dataa & 1) { + m68k_incpci(6); + exception3_read_access(opcode, dataa, 1, 1); + return; + } + ipl_fetch_now(); + uae_s16 data = x_get_word(dataa); + if(hardware_bus_error) { + m68k_incpci(6); + exception2_read(opcode, dataa + 0, 0x1, 1); + return; + } + uae_u16 val = data; + regs.ir = regs.irc; + opcode |= 0x20000; + get_word_ce000_prefetch(8); + if(hardware_bus_error) { + int pcoffset = 0; + CLEAR_CZNV();SET_CFLG(val & 0x8000); + SET_ZFLG(!val); + SET_NFLG(val & 0x4000); + exception2_fetch_opcode(opcode, 8, pcoffset); + return; + } + opcode = regs.ir; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + if(hardware_bus_error) { + m68k_incpci(8); + if (regs.t1) opcode |= 0x10000; + exception2_write(opcode, dataa + 0, 0x1, val, 1); + return; + } + m68k_incpci(6); + return; +} +/* 20 (4/1) */ +/* 6 0,0 */ + diff --git a/cpuemu_20.cpp b/cpuemu_20.cpp new file mode 100644 index 00000000..ddb356fc --- /dev/null +++ b/cpuemu_20.cpp @@ -0,0 +1,41787 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_020_prefetch(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_word_020_prefetch(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_u16 val = (x_get_byte(mempa) & 0xff) << 8; + val |= (x_get_byte(mempa + 2) & 0xff); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_word_020_prefetch(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_u32 val = (x_get_byte(mempa) & 0xff) << 24; + val |= (x_get_byte(mempa + 2) & 0xff) << 16; + val |= (x_get_byte(mempa + 4) & 0xff) << 8; + val |= (x_get_byte(mempa + 6) & 0xff); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + x_put_byte(mempa, src >> 8); + x_put_byte(mempa + 2, src); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + x_put_byte(mempa, src >> 24); + x_put_byte(mempa + 2, src >> 16); + x_put_byte(mempa + 4, src >> 8); + x_put_byte(mempa + 6, src); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_020_prefetch(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_word_020_prefetch(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, newv); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(10); + x_put_long(dsta, newv); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, newv); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(10); + x_put_long(dsta, newv); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, dst); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, dst); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, dst); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_020_prefetch(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_word_020_prefetch(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(4); + } else { + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(4); + } else { + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(4); + } else { + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(6); + } else { + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(0); + } else { + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(6); + } else { + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(8); + } else { + regs.irc = get_word_020_prefetch(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(10); + m68k_incpci(10); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cbb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(4); + } else { + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(4); + } else { + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(4); + } else { + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(6); + } else { + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(0); + } else { + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(6); + } else { + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(8); + } else { + regs.irc = get_word_020_prefetch(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_long_020_prefetch(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = x_get_word(rn1), dst2 = x_get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_020_prefetch(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_020_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_020_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + regs.irc = get_word_020_prefetch(6); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_020_prefetch(0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + regs.irc = get_word_020_prefetch(6); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_020_prefetch(4); + regs.irc = get_word_020_prefetch(8); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_020_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_020_prefetch(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_020_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_020_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + regs.irc = get_word_020_prefetch(6); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_020_prefetch(0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + regs.irc = get_word_020_prefetch(6); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_020_prefetch(4); + regs.irc = get_word_020_prefetch(8); + dfc_nommu_put_word(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_020_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_020_prefetch(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_020_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_020_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + regs.irc = get_word_020_prefetch(6); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_020_prefetch(0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + regs.irc = get_word_020_prefetch(6); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_020_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_020_prefetch(4); + regs.irc = get_word_020_prefetch(8); + dfc_nommu_put_long(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_020_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + regs.irc = get_word_020_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(4); + } else { + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(4); + } else { + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(4); + } else { + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(6); + } else { + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(0); + } else { + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, rc) = dst; + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(6); + } else { + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_020_prefetch(8); + } else { + regs.irc = get_word_020_prefetch(8); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_long_020_prefetch(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = x_get_long(rn1), dst2 = x_get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(10); + x_put_byte(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(10); + x_put_word(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_020_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + MakeSR(); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.irc = get_word_020_prefetch(0); + x_put_word(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + MakeSR(); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_long_020_prefetch(2); + MakeSR(); + regs.irc = get_word_020_prefetch(6); + x_put_word(srca, regs.sr); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(srca, 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(srca, 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + MakeSR(); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.irc = get_word_020_prefetch(0); + x_put_word(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + MakeSR(); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + MakeSR(); + regs.irc = get_word_020_prefetch(6); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(6); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_word_020_prefetch(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 offs; + offs = get_long_020_prefetch(2); + regs.irc = get_word_020_prefetch(6); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, srca); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, srca); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + x_put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = get_long_020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + x_put_long(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + x_put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + x_put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_020_prefetch(2); + uaecptr srca; + srca = get_long_020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_49c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a48_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a88_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4aba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_020_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_020_prefetch(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c10_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c18_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c20_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c28_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c30_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c38_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c39_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uae_s32 dst; + dst = get_long_020_prefetch(4); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c40_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c50_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c58_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c60_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c68_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c70_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c78_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c79_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(2); + uae_s32 dst; + dst = get_long_020_prefetch(4); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_long_020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_long_020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpci(2); + Exception_cpu(src + 32); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_word_020_prefetch(2); + regs.irc = get_word_020_prefetch(4); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + uae_s32 old = x_get_long(olda); + m68k_areg(regs, 7) = src + 4; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, srcreg) = (old); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_word_020_prefetch(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + Exception_cpu(14); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(newpc); + branch_stack_pop_rte(oldpc); + fill_prefetch_020_ntx(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_word_020_prefetch(2); + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(pc); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + m68k_do_rtsi(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci_j(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + fill_prefetch_020(); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_020_prefetch(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_020_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_020_prefetch(2); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_020_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_020_prefetch(2); + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_020_prefetch(2); + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_word_020_prefetch(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsri(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsri(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_long_020_prefetch(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsri(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_020_prefetch(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_020_prefetch(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(x_get_word(m68k_areg(regs, srcreg))); + val += get_word_020_prefetch(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + x_put_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(x_get_byte(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_word_020_prefetch(2); + m68k_areg(regs, dstreg) -= 2; + x_put_word(m68k_areg(regs, dstreg), val); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_byte(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_020_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_020_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_020_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_020_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_020_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_020_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_020_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_020_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_020_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_020_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_020_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_020_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_020_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_020_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9d0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9e8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eac0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ead0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eae8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebc0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebe8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecc0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ece8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edc0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ede8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfa_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfb_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eec0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eed0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eee8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efc0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efd0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efe8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff8_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff9_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_020_prefetch(2); + uaecptr dsta; + dsta = get_long_020_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_020_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f200_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f208_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f210_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f218_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f220_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f228_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f230_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f238_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f239_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f240_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f248_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f250_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f258_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f260_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f268_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f270_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f278_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f279_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_020_prefetch(2); + uae_s16 dummy = get_word_020_prefetch(4); + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_020_prefetch(2); + uae_s32 dummy; + dummy = get_long_020_prefetch(4); + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27c_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_020_prefetch(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f280_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_word_020_prefetch(0); + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f2c0_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_long_020_prefetch(0); + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f310_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f320_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f328_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f330_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f338_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f339_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f350_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f358_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f368_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f370_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f378_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f379_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37a_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37b_20_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_020_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif diff --git a/cpuemu_21.cpp b/cpuemu_21.cpp new file mode 100644 index 00000000..cb18d4ca --- /dev/null +++ b/cpuemu_21.cpp @@ -0,0 +1,45167 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +void REGPARAM2 op_0000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +void REGPARAM2 op_0010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +void REGPARAM2 op_0018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +void REGPARAM2 op_0020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +void REGPARAM2 op_0028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +void REGPARAM2 op_0038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +void REGPARAM2 op_0039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +void REGPARAM2 op_003c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_0040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +void REGPARAM2 op_0050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +void REGPARAM2 op_0058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +void REGPARAM2 op_0060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +void REGPARAM2 op_0068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +void REGPARAM2 op_0078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +void REGPARAM2 op_0079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +void REGPARAM2 op_007c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if(regs.t0) check_t0_trace(); + regs.sr |= src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_0080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +void REGPARAM2 op_0090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +void REGPARAM2 op_0098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +void REGPARAM2 op_00a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +void REGPARAM2 op_00a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_00b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +void REGPARAM2 op_00b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +void REGPARAM2 op_00b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +void REGPARAM2 op_0100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +void REGPARAM2 op_0108_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* OP zero */ + uae_u16 val = (x_get_byte(mempa) & 0xff) << 8; + val |= (x_get_byte(mempa + 2) & 0xff); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +void REGPARAM2 op_0110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +void REGPARAM2 op_0118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +void REGPARAM2 op_0120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +void REGPARAM2 op_0128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +void REGPARAM2 op_0138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +void REGPARAM2 op_0139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +void REGPARAM2 op_013a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +void REGPARAM2 op_013b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +void REGPARAM2 op_013c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +void REGPARAM2 op_0140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +void REGPARAM2 op_0148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* OP zero */ + uae_u32 val = (x_get_byte(mempa) & 0xff) << 24; + val |= (x_get_byte(mempa + 2) & 0xff) << 16; + val |= (x_get_byte(mempa + 4) & 0xff) << 8; + val |= (x_get_byte(mempa + 6) & 0xff); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +void REGPARAM2 op_0150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +void REGPARAM2 op_0158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +void REGPARAM2 op_0160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +void REGPARAM2 op_0168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +void REGPARAM2 op_0178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +void REGPARAM2 op_0179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +void REGPARAM2 op_0180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +void REGPARAM2 op_0188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + x_put_byte(mempa, src >> 8); + x_put_byte(mempa + 2, src); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +void REGPARAM2 op_0190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +void REGPARAM2 op_0198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +void REGPARAM2 op_01a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +void REGPARAM2 op_01a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +void REGPARAM2 op_01b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +void REGPARAM2 op_01b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +void REGPARAM2 op_01c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +void REGPARAM2 op_01c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + x_put_byte(mempa, src >> 24); + x_put_byte(mempa + 2, src >> 16); + x_put_byte(mempa + 4, src >> 8); + x_put_byte(mempa + 6, src); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +void REGPARAM2 op_01d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +void REGPARAM2 op_01d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +void REGPARAM2 op_01e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +void REGPARAM2 op_01e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +void REGPARAM2 op_01f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +void REGPARAM2 op_01f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_0200_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +void REGPARAM2 op_0210_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +void REGPARAM2 op_0218_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +void REGPARAM2 op_0220_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +void REGPARAM2 op_0228_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0230_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +void REGPARAM2 op_0238_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +void REGPARAM2 op_0239_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +void REGPARAM2 op_023c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_0240_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +void REGPARAM2 op_0250_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +void REGPARAM2 op_0258_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +void REGPARAM2 op_0260_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +void REGPARAM2 op_0268_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0270_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +void REGPARAM2 op_0278_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +void REGPARAM2 op_0279_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +void REGPARAM2 op_027c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if(regs.t0) check_t0_trace(); + regs.sr &= src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_0280_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +void REGPARAM2 op_0290_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +void REGPARAM2 op_0298_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +void REGPARAM2 op_02a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +void REGPARAM2 op_02a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_02b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +void REGPARAM2 op_02b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +void REGPARAM2 op_02b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +void REGPARAM2 op_0400_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +void REGPARAM2 op_0410_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +void REGPARAM2 op_0418_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +void REGPARAM2 op_0420_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +void REGPARAM2 op_0428_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0430_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +void REGPARAM2 op_0438_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +void REGPARAM2 op_0439_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_0440_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +void REGPARAM2 op_0450_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +void REGPARAM2 op_0458_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +void REGPARAM2 op_0460_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +void REGPARAM2 op_0468_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0470_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +void REGPARAM2 op_0478_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +void REGPARAM2 op_0479_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_0480_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +void REGPARAM2 op_0490_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +void REGPARAM2 op_0498_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +void REGPARAM2 op_04a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +void REGPARAM2 op_04a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_04b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +void REGPARAM2 op_04b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +void REGPARAM2 op_04b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +void REGPARAM2 op_0600_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +void REGPARAM2 op_0610_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +void REGPARAM2 op_0618_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +void REGPARAM2 op_0620_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +void REGPARAM2 op_0628_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0630_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +void REGPARAM2 op_0638_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +void REGPARAM2 op_0639_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_0640_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +void REGPARAM2 op_0650_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +void REGPARAM2 op_0658_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +void REGPARAM2 op_0660_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +void REGPARAM2 op_0668_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0670_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +void REGPARAM2 op_0678_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +void REGPARAM2 op_0679_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_0680_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +void REGPARAM2 op_0690_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +void REGPARAM2 op_0698_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +void REGPARAM2 op_06a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +void REGPARAM2 op_06a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_06b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +void REGPARAM2 op_06b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +void REGPARAM2 op_06b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +void REGPARAM2 op_0800_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +void REGPARAM2 op_0810_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +void REGPARAM2 op_0818_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +void REGPARAM2 op_0820_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +void REGPARAM2 op_0828_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0830_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +void REGPARAM2 op_0838_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +void REGPARAM2 op_0839_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +void REGPARAM2 op_083a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +void REGPARAM2 op_083b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +void REGPARAM2 op_0840_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +void REGPARAM2 op_0850_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +void REGPARAM2 op_0858_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +void REGPARAM2 op_0860_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +void REGPARAM2 op_0868_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0870_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +void REGPARAM2 op_0878_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +void REGPARAM2 op_0879_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +void REGPARAM2 op_0880_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +void REGPARAM2 op_0890_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +void REGPARAM2 op_0898_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +void REGPARAM2 op_08a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +void REGPARAM2 op_08a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +void REGPARAM2 op_08b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +void REGPARAM2 op_08b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +void REGPARAM2 op_08c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +void REGPARAM2 op_08d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +void REGPARAM2 op_08d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +void REGPARAM2 op_08e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +void REGPARAM2 op_08e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +void REGPARAM2 op_08f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +void REGPARAM2 op_08f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +void REGPARAM2 op_0a00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +void REGPARAM2 op_0a10_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +void REGPARAM2 op_0a18_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +void REGPARAM2 op_0a20_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +void REGPARAM2 op_0a28_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0a30_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +void REGPARAM2 op_0a38_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +void REGPARAM2 op_0a39_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +void REGPARAM2 op_0a3c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +void REGPARAM2 op_0a40_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +void REGPARAM2 op_0a50_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +void REGPARAM2 op_0a58_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +void REGPARAM2 op_0a60_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +void REGPARAM2 op_0a68_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0a70_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +void REGPARAM2 op_0a78_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +void REGPARAM2 op_0a79_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +void REGPARAM2 op_0a7c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +void REGPARAM2 op_0a80_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +void REGPARAM2 op_0a90_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +void REGPARAM2 op_0a98_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +void REGPARAM2 op_0aa0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +void REGPARAM2 op_0aa8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0ab0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +void REGPARAM2 op_0ab8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +void REGPARAM2 op_0ab9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(4); + } else { + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(4); + } else { + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(4); + } else { + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(6); + } else { + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(0); + } else { + regs.irc = get_word_ce020_prefetch_opcode(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(6); + } else { + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(8); + } else { + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +void REGPARAM2 op_0c00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +void REGPARAM2 op_0c10_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +void REGPARAM2 op_0c18_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +void REGPARAM2 op_0c20_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +void REGPARAM2 op_0c28_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0c30_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +void REGPARAM2 op_0c38_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +void REGPARAM2 op_0c39_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c3a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c3b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +void REGPARAM2 op_0c40_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +void REGPARAM2 op_0c50_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +void REGPARAM2 op_0c58_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +void REGPARAM2 op_0c60_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +void REGPARAM2 op_0c68_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0c70_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +void REGPARAM2 op_0c78_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +void REGPARAM2 op_0c79_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c7a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c7b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +void REGPARAM2 op_0c80_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +void REGPARAM2 op_0c90_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +void REGPARAM2 op_0c98_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +void REGPARAM2 op_0ca0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +void REGPARAM2 op_0ca8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0cb0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +void REGPARAM2 op_0cb8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +void REGPARAM2 op_0cb9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cbb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(4); + } else { + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(4); + } else { + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(4); + } else { + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(6); + } else { + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(0); + } else { + regs.irc = get_word_ce020_prefetch_opcode(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(6); + } else { + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(8); + } else { + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cfc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_long_ce020_prefetch(2); + /* OP zero */ + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = x_get_word(rn1), dst2 = x_get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e10_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e18_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e20_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e28_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(6); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e30_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e38_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(6); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e39_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(8); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_ce020_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e50_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e58_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e60_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e68_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(6); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e70_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e78_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(6); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e79_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(8); + dfc_nommu_put_word(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_ce020_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e90_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e98_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(6); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(6); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce020_prefetch_opcode(8); + dfc_nommu_put_long(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_ce020_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + regs.irc = get_word_ce020_prefetch_opcode(0); + } + return; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(4); + } else { + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(4); + } else { + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(4); + } else { + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(6); + } else { + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(0); + } else { + regs.irc = get_word_ce020_prefetch_opcode(0); + m68k_dreg(regs, rc) = dst; + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(6); + } else { + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce020_prefetch_opcode(8); + } else { + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0efc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_long_ce020_prefetch(2); + /* OP zero */ + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = x_get_long(rn1), dst2 = x_get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +void REGPARAM2 op_1000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +void REGPARAM2 op_1010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +void REGPARAM2 op_1018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +void REGPARAM2 op_1020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +void REGPARAM2 op_1028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +void REGPARAM2 op_1030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +void REGPARAM2 op_1038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +void REGPARAM2 op_1039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +void REGPARAM2 op_103a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_103b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +void REGPARAM2 op_103c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +void REGPARAM2 op_1080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +void REGPARAM2 op_1090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +void REGPARAM2 op_1098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +void REGPARAM2 op_10a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +void REGPARAM2 op_10a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +void REGPARAM2 op_10b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +void REGPARAM2 op_10b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +void REGPARAM2 op_10b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +void REGPARAM2 op_10ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +void REGPARAM2 op_10bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +void REGPARAM2 op_10bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +void REGPARAM2 op_10c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +void REGPARAM2 op_10d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +void REGPARAM2 op_10d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +void REGPARAM2 op_10e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +void REGPARAM2 op_10e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +void REGPARAM2 op_10f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +void REGPARAM2 op_10f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +void REGPARAM2 op_10f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +void REGPARAM2 op_10fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_10fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +void REGPARAM2 op_10fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +void REGPARAM2 op_1100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +void REGPARAM2 op_1110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +void REGPARAM2 op_1118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +void REGPARAM2 op_1120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +void REGPARAM2 op_1128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +void REGPARAM2 op_1130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +void REGPARAM2 op_1138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +void REGPARAM2 op_1139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +void REGPARAM2 op_113a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +void REGPARAM2 op_113b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +void REGPARAM2 op_113c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +void REGPARAM2 op_1140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +void REGPARAM2 op_1150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +void REGPARAM2 op_1158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +void REGPARAM2 op_1160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +void REGPARAM2 op_1168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_1170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +void REGPARAM2 op_1178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +void REGPARAM2 op_1179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +void REGPARAM2 op_117a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_117b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +void REGPARAM2 op_117c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_1180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +void REGPARAM2 op_1190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +void REGPARAM2 op_1198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +void REGPARAM2 op_11a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_11a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_11b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_11b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_11ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_11bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +void REGPARAM2 op_11c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +void REGPARAM2 op_11d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +void REGPARAM2 op_11d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +void REGPARAM2 op_11e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +void REGPARAM2 op_11e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_11f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +void REGPARAM2 op_11f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +void REGPARAM2 op_11f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +void REGPARAM2 op_11fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_11fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +void REGPARAM2 op_11fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +void REGPARAM2 op_13c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +void REGPARAM2 op_13d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +void REGPARAM2 op_13d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +void REGPARAM2 op_13e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +void REGPARAM2 op_13e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_13f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +void REGPARAM2 op_13f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +void REGPARAM2 op_13f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +void REGPARAM2 op_13fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_13fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +void REGPARAM2 op_13fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +void REGPARAM2 op_2000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +void REGPARAM2 op_2008_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +void REGPARAM2 op_2010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +void REGPARAM2 op_2018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +void REGPARAM2 op_2020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +void REGPARAM2 op_2028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +void REGPARAM2 op_2030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +void REGPARAM2 op_2038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +void REGPARAM2 op_2039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +void REGPARAM2 op_203a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_203b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +void REGPARAM2 op_203c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +void REGPARAM2 op_2040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +void REGPARAM2 op_2048_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +void REGPARAM2 op_2050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +void REGPARAM2 op_2058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +void REGPARAM2 op_2060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +void REGPARAM2 op_2068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +void REGPARAM2 op_2070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +void REGPARAM2 op_2078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +void REGPARAM2 op_2079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +void REGPARAM2 op_207a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_207b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +void REGPARAM2 op_207c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +void REGPARAM2 op_2080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +void REGPARAM2 op_2088_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +void REGPARAM2 op_2090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +void REGPARAM2 op_2098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +void REGPARAM2 op_20a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +void REGPARAM2 op_20a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +void REGPARAM2 op_20b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +void REGPARAM2 op_20b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +void REGPARAM2 op_20b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +void REGPARAM2 op_20ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +void REGPARAM2 op_20bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +void REGPARAM2 op_20bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +void REGPARAM2 op_20c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +void REGPARAM2 op_20c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +void REGPARAM2 op_20d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +void REGPARAM2 op_20d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +void REGPARAM2 op_20e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +void REGPARAM2 op_20e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +void REGPARAM2 op_20f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +void REGPARAM2 op_20f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +void REGPARAM2 op_20f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +void REGPARAM2 op_20fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_20fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +void REGPARAM2 op_20fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +void REGPARAM2 op_2100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +void REGPARAM2 op_2108_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +void REGPARAM2 op_2110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +void REGPARAM2 op_2118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +void REGPARAM2 op_2120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +void REGPARAM2 op_2128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +void REGPARAM2 op_2130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +void REGPARAM2 op_2138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +void REGPARAM2 op_2139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +void REGPARAM2 op_213a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +void REGPARAM2 op_213b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +void REGPARAM2 op_213c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +void REGPARAM2 op_2140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +void REGPARAM2 op_2148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +void REGPARAM2 op_2150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +void REGPARAM2 op_2158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +void REGPARAM2 op_2160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +void REGPARAM2 op_2168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_2170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +void REGPARAM2 op_2178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +void REGPARAM2 op_2179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +void REGPARAM2 op_217a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_217b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +void REGPARAM2 op_217c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_2180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +void REGPARAM2 op_2188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +void REGPARAM2 op_2190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +void REGPARAM2 op_2198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +void REGPARAM2 op_21a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_21a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_21b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_21b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_21ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_21bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +void REGPARAM2 op_21c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +void REGPARAM2 op_21c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +void REGPARAM2 op_21d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +void REGPARAM2 op_21d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +void REGPARAM2 op_21e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +void REGPARAM2 op_21e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_21f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +void REGPARAM2 op_21f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +void REGPARAM2 op_21f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +void REGPARAM2 op_21fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_21fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +void REGPARAM2 op_21fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +void REGPARAM2 op_23c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +void REGPARAM2 op_23c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +void REGPARAM2 op_23d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +void REGPARAM2 op_23d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +void REGPARAM2 op_23e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +void REGPARAM2 op_23e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_23f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +void REGPARAM2 op_23f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +void REGPARAM2 op_23f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +void REGPARAM2 op_23fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_23fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +void REGPARAM2 op_23fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +void REGPARAM2 op_3000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +void REGPARAM2 op_3008_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +void REGPARAM2 op_3010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +void REGPARAM2 op_3018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +void REGPARAM2 op_3020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +void REGPARAM2 op_3028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +void REGPARAM2 op_3030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +void REGPARAM2 op_3038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +void REGPARAM2 op_3039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +void REGPARAM2 op_303a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_303b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +void REGPARAM2 op_303c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +void REGPARAM2 op_3040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +void REGPARAM2 op_3048_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +void REGPARAM2 op_3050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +void REGPARAM2 op_3058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +void REGPARAM2 op_3060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +void REGPARAM2 op_3068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +void REGPARAM2 op_3070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +void REGPARAM2 op_3078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +void REGPARAM2 op_3079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +void REGPARAM2 op_307a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +void REGPARAM2 op_307b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +void REGPARAM2 op_307c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +void REGPARAM2 op_3080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +void REGPARAM2 op_3088_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +void REGPARAM2 op_3090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +void REGPARAM2 op_3098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +void REGPARAM2 op_30a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +void REGPARAM2 op_30a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +void REGPARAM2 op_30b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +void REGPARAM2 op_30b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +void REGPARAM2 op_30b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +void REGPARAM2 op_30ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +void REGPARAM2 op_30bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +void REGPARAM2 op_30bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +void REGPARAM2 op_30c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +void REGPARAM2 op_30c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +void REGPARAM2 op_30d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +void REGPARAM2 op_30d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +void REGPARAM2 op_30e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +void REGPARAM2 op_30e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +void REGPARAM2 op_30f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +void REGPARAM2 op_30f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +void REGPARAM2 op_30f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +void REGPARAM2 op_30fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_30fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +void REGPARAM2 op_30fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +void REGPARAM2 op_3100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +void REGPARAM2 op_3108_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +void REGPARAM2 op_3110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +void REGPARAM2 op_3118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +void REGPARAM2 op_3120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +void REGPARAM2 op_3128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +void REGPARAM2 op_3130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +void REGPARAM2 op_3138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +void REGPARAM2 op_3139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +void REGPARAM2 op_313a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +void REGPARAM2 op_313b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +void REGPARAM2 op_313c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +void REGPARAM2 op_3140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +void REGPARAM2 op_3148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +void REGPARAM2 op_3150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +void REGPARAM2 op_3158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +void REGPARAM2 op_3160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +void REGPARAM2 op_3168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_3170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +void REGPARAM2 op_3178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +void REGPARAM2 op_3179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +void REGPARAM2 op_317a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_317b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +void REGPARAM2 op_317c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_3180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +void REGPARAM2 op_3188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +void REGPARAM2 op_3190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +void REGPARAM2 op_3198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +void REGPARAM2 op_31a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_31a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_31b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_31b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_31ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_31bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +void REGPARAM2 op_31c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +void REGPARAM2 op_31c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +void REGPARAM2 op_31d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +void REGPARAM2 op_31d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +void REGPARAM2 op_31e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +void REGPARAM2 op_31e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_31f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +void REGPARAM2 op_31f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +void REGPARAM2 op_31f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +void REGPARAM2 op_31fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_31fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +void REGPARAM2 op_31fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +void REGPARAM2 op_33c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +void REGPARAM2 op_33c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +void REGPARAM2 op_33d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +void REGPARAM2 op_33d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +void REGPARAM2 op_33e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +void REGPARAM2 op_33e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_33f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +void REGPARAM2 op_33f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +void REGPARAM2 op_33f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(6); + regs.irc = get_word_ce020_prefetch_opcode(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +void REGPARAM2 op_33fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_33fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce020_prefetch(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +void REGPARAM2 op_33fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce020_prefetch(2); + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + regs.irc = get_word_ce020_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +void REGPARAM2 op_4000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +void REGPARAM2 op_4010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +void REGPARAM2 op_4018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +void REGPARAM2 op_4020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +void REGPARAM2 op_4028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +void REGPARAM2 op_4030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +void REGPARAM2 op_4038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +void REGPARAM2 op_4039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +void REGPARAM2 op_4040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +void REGPARAM2 op_4050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +void REGPARAM2 op_4058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +void REGPARAM2 op_4060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +void REGPARAM2 op_4068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +void REGPARAM2 op_4070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +void REGPARAM2 op_4078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +void REGPARAM2 op_4079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +void REGPARAM2 op_4080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +void REGPARAM2 op_4090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +void REGPARAM2 op_4098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +void REGPARAM2 op_40a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +void REGPARAM2 op_40a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +void REGPARAM2 op_40b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +void REGPARAM2 op_40b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +void REGPARAM2 op_40b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +void REGPARAM2 op_40c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* op H:2,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +void REGPARAM2 op_40d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +void REGPARAM2 op_40d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +void REGPARAM2 op_40e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +void REGPARAM2 op_40e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(4); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +void REGPARAM2 op_40f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(0); + x_put_word(srca, regs.sr); + return; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +void REGPARAM2 op_40f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(4); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +void REGPARAM2 op_40f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(6); + x_put_word(srca, regs.sr); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +void REGPARAM2 op_4180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +void REGPARAM2 op_4190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +void REGPARAM2 op_4198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +void REGPARAM2 op_41a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +void REGPARAM2 op_41a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +void REGPARAM2 op_41b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +void REGPARAM2 op_41b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +void REGPARAM2 op_41b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +void REGPARAM2 op_41ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_41bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +void REGPARAM2 op_41bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +void REGPARAM2 op_41d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +void REGPARAM2 op_41e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +void REGPARAM2 op_41f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce020_prefetch_opcode(0); + m68k_areg(regs, dstreg) = (srca); + return; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +void REGPARAM2 op_41f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +void REGPARAM2 op_41f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +void REGPARAM2 op_41fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_41fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce020_prefetch_opcode(0); + m68k_areg(regs, dstreg) = (srca); + return; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +void REGPARAM2 op_4200_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +void REGPARAM2 op_4210_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +void REGPARAM2 op_4218_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +void REGPARAM2 op_4220_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +void REGPARAM2 op_4228_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +void REGPARAM2 op_4230_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +void REGPARAM2 op_4238_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +void REGPARAM2 op_4239_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +void REGPARAM2 op_4240_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +void REGPARAM2 op_4250_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +void REGPARAM2 op_4258_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +void REGPARAM2 op_4260_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +void REGPARAM2 op_4268_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +void REGPARAM2 op_4270_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +void REGPARAM2 op_4278_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +void REGPARAM2 op_4279_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +void REGPARAM2 op_4280_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +void REGPARAM2 op_4290_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +void REGPARAM2 op_4298_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +void REGPARAM2 op_42a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +void REGPARAM2 op_42a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +void REGPARAM2 op_42b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +void REGPARAM2 op_42b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +void REGPARAM2 op_42b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(4); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(0); + x_put_word(srca, regs.sr & 0xff); + return; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(4); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce020_prefetch_opcode(6); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +void REGPARAM2 op_4400_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +void REGPARAM2 op_4410_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +void REGPARAM2 op_4418_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +void REGPARAM2 op_4420_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +void REGPARAM2 op_4428_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +void REGPARAM2 op_4430_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +void REGPARAM2 op_4438_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +void REGPARAM2 op_4439_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +void REGPARAM2 op_4440_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +void REGPARAM2 op_4450_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +void REGPARAM2 op_4458_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +void REGPARAM2 op_4460_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +void REGPARAM2 op_4468_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +void REGPARAM2 op_4470_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +void REGPARAM2 op_4478_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +void REGPARAM2 op_4479_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +void REGPARAM2 op_4480_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +void REGPARAM2 op_4490_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +void REGPARAM2 op_4498_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +void REGPARAM2 op_44a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +void REGPARAM2 op_44a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +void REGPARAM2 op_44b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +void REGPARAM2 op_44b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +void REGPARAM2 op_44b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +void REGPARAM2 op_44c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +void REGPARAM2 op_44d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +void REGPARAM2 op_44d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +void REGPARAM2 op_44e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +void REGPARAM2 op_44e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +void REGPARAM2 op_44f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + return; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +void REGPARAM2 op_44f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +void REGPARAM2 op_44f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +void REGPARAM2 op_44fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +void REGPARAM2 op_44fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + return; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +void REGPARAM2 op_44fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +void REGPARAM2 op_4600_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +void REGPARAM2 op_4610_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +void REGPARAM2 op_4618_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +void REGPARAM2 op_4620_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +void REGPARAM2 op_4628_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +void REGPARAM2 op_4630_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +void REGPARAM2 op_4638_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +void REGPARAM2 op_4639_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +void REGPARAM2 op_4640_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +void REGPARAM2 op_4650_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +void REGPARAM2 op_4658_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +void REGPARAM2 op_4660_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +void REGPARAM2 op_4668_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +void REGPARAM2 op_4670_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +void REGPARAM2 op_4678_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +void REGPARAM2 op_4679_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +void REGPARAM2 op_4680_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +void REGPARAM2 op_4690_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +void REGPARAM2 op_4698_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +void REGPARAM2 op_46a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +void REGPARAM2 op_46a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +void REGPARAM2 op_46b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +void REGPARAM2 op_46b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +void REGPARAM2 op_46b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +void REGPARAM2 op_46c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_020_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +void REGPARAM2 op_46d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_020_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +void REGPARAM2 op_46d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_020_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +void REGPARAM2 op_46e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_020_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +void REGPARAM2 op_46e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +void REGPARAM2 op_46f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + fill_prefetch_020_ntx(); + return; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +void REGPARAM2 op_46f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +void REGPARAM2 op_46f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(6); + fill_prefetch_020_ntx(); + return; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +void REGPARAM2 op_46fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +void REGPARAM2 op_46fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + fill_prefetch_020_ntx(); + return; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +void REGPARAM2 op_46fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_020_ntx(); + return; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +void REGPARAM2 op_4800_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4808_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 offs; + offs = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +void REGPARAM2 op_4810_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +void REGPARAM2 op_4818_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +void REGPARAM2 op_4820_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +void REGPARAM2 op_4828_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +void REGPARAM2 op_4830_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(0); + x_put_byte(srca, newv); + return; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +void REGPARAM2 op_4838_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +void REGPARAM2 op_4839_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(6); + x_put_byte(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +void REGPARAM2 op_4840_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4848_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +void REGPARAM2 op_4850_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +void REGPARAM2 op_4868_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +void REGPARAM2 op_4870_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + return; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +void REGPARAM2 op_4878_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +void REGPARAM2 op_4879_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +void REGPARAM2 op_487a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +void REGPARAM2 op_487b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + return; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +void REGPARAM2 op_4880_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +void REGPARAM2 op_4890_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +void REGPARAM2 op_48a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + x_put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +void REGPARAM2 op_48a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_48b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +void REGPARAM2 op_48b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +void REGPARAM2 op_48b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = get_long_ce020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +void REGPARAM2 op_48c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +void REGPARAM2 op_48d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +void REGPARAM2 op_48e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + x_put_long(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + x_put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + x_put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +void REGPARAM2 op_48e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_48f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +void REGPARAM2 op_48f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +void REGPARAM2 op_48f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce020_prefetch(2); + uaecptr srca; + srca = get_long_ce020_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_49c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +void REGPARAM2 op_4a00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (An) */ +void REGPARAM2 op_4a10_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +void REGPARAM2 op_4a18_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +void REGPARAM2 op_4a20_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +void REGPARAM2 op_4a28_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +void REGPARAM2 op_4a30_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +void REGPARAM2 op_4a38_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +void REGPARAM2 op_4a39_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +void REGPARAM2 op_4a40_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a48_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +void REGPARAM2 op_4a50_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +void REGPARAM2 op_4a58_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +void REGPARAM2 op_4a60_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +void REGPARAM2 op_4a68_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +void REGPARAM2 op_4a70_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +void REGPARAM2 op_4a78_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +void REGPARAM2 op_4a79_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +void REGPARAM2 op_4a80_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a88_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +void REGPARAM2 op_4a90_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +void REGPARAM2 op_4a98_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +void REGPARAM2 op_4aa0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +void REGPARAM2 op_4aa8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +void REGPARAM2 op_4ab0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +void REGPARAM2 op_4ab8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +void REGPARAM2 op_4ab9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4aba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4abb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4abc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +void REGPARAM2 op_4ac0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +void REGPARAM2 op_4ad0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +void REGPARAM2 op_4ad8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +void REGPARAM2 op_4ae0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +void REGPARAM2 op_4ae8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +void REGPARAM2 op_4af0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +void REGPARAM2 op_4af8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +void REGPARAM2 op_4af9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c10_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c18_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c20_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c28_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c30_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c38_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c39_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:28 */ + uae_s32 dst; + dst = get_long_ce020_prefetch(4); + /* op H:2,T:0,C:28 */ + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c40_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c50_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c58_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c60_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c68_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c70_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c78_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c79_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:50 */ + uae_s32 dst; + dst = get_long_ce020_prefetch(4); + /* op H:0,T:0,C:50 */ + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +void REGPARAM2 op_4c90_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +void REGPARAM2 op_4c98_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +void REGPARAM2 op_4ca8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cb0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +void REGPARAM2 op_4cb8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +void REGPARAM2 op_4cb9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_long_ce020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +void REGPARAM2 op_4cba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cbb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +void REGPARAM2 op_4cd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +void REGPARAM2 op_4cd8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +void REGPARAM2 op_4ce8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cf0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +void REGPARAM2 op_4cf8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +void REGPARAM2 op_4cf9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_long_ce020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +void REGPARAM2 op_4cfa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cfb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_ce020_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +void REGPARAM2 op_4e40_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + /* OP zero */ + m68k_incpci(2); + Exception_cpu(src + 32); + return; + return; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +void REGPARAM2 op_4e50_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* UNLK.L An */ +void REGPARAM2 op_4e58_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + /* OP zero */ + uae_u32 olda = src; + uae_s32 old = x_get_long(olda); + m68k_areg(regs, 7) = src + 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, srcreg) = (old); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +void REGPARAM2 op_4e60_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s32 src = m68k_areg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + regs.usp = src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +void REGPARAM2 op_4e68_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* op H:4,T:0,C:-4 */ + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RESET.L */ +void REGPARAM2 op_4e70_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + bool r = cpureset(); + if (r) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOP.L */ +void REGPARAM2 op_4e71_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +void REGPARAM2 op_4e72_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + if (!regs.stopped) { + uae_s16 src = get_word_ce020_prefetch(2); + /* op H:0,T:0,C:8 */ + regs.ir = src; + } + uae_u16 sr = regs.ir; + ipl_fetch_next(); + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return; +} + +/* RTE.L */ +void REGPARAM2 op_4e73_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* op H:1,T:9,C:8 */ + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + Exception_cpu(14); + return; + } + regs.sr = newsr; + oldsr = newsr; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + } + regs.sr = newsr; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_setpci_j(newpc); + branch_stack_pop_rte(oldpc); + fill_prefetch_020_ntx(); + return; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e74_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + /* op H:2,T:0,C:8 */ + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:8 */ + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return; + } + m68k_setpci_j(pc); + fill_prefetch_020(); + return; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +void REGPARAM2 op_4e75_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* op H:1,T:0,C:8 */ + uaecptr oldpc = m68k_getpci(); + m68k_do_rts_ce020(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + fill_prefetch_020(); + return; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +void REGPARAM2 op_4e76_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* RTR.L */ +void REGPARAM2 op_4e77_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + intlev_load(); + m68k_setpci_j(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + fill_prefetch_020(); + return; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce020_prefetch(2); + /* op H:6,T:0,C:-6 */ + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce020_prefetch(2); + /* op H:6,T:0,C:-6 */ + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +void REGPARAM2 op_4e90_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +void REGPARAM2 op_4ea8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +void REGPARAM2 op_4eb0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +void REGPARAM2 op_4eb8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 jea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +void REGPARAM2 op_4eb9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 jea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +void REGPARAM2 op_4eba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +void REGPARAM2 op_4ebb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +void REGPARAM2 op_4ed0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+4=6,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +void REGPARAM2 op_4ee8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4+4=8,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +void REGPARAM2 op_4ef0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + /* op H:4,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +void REGPARAM2 op_4ef8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2+4=6,T:0,C:0 jea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +void REGPARAM2 op_4ef9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2+4=6,T:0,C:0 jea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +void REGPARAM2 op_4efa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4+4=8,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +void REGPARAM2 op_4efb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + /* op H:4,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_020(); + return; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +void REGPARAM2 op_5000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +void REGPARAM2 op_5010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +void REGPARAM2 op_5018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +void REGPARAM2 op_5020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +void REGPARAM2 op_5028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +void REGPARAM2 op_5038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +void REGPARAM2 op_5039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +void REGPARAM2 op_5040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +void REGPARAM2 op_5048_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +void REGPARAM2 op_5050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +void REGPARAM2 op_5058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +void REGPARAM2 op_5060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +void REGPARAM2 op_5068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +void REGPARAM2 op_5078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +void REGPARAM2 op_5079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +void REGPARAM2 op_5080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +void REGPARAM2 op_5088_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +void REGPARAM2 op_5090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +void REGPARAM2 op_5098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +void REGPARAM2 op_50a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +void REGPARAM2 op_50a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_50b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +void REGPARAM2 op_50b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +void REGPARAM2 op_50b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +void REGPARAM2 op_50c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +void REGPARAM2 op_50c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +void REGPARAM2 op_50d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +void REGPARAM2 op_50d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +void REGPARAM2 op_50e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +void REGPARAM2 op_50e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +void REGPARAM2 op_50f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +void REGPARAM2 op_50f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +void REGPARAM2 op_50f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +void REGPARAM2 op_5100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +void REGPARAM2 op_5110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +void REGPARAM2 op_5118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +void REGPARAM2 op_5120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +void REGPARAM2 op_5128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +void REGPARAM2 op_5138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +void REGPARAM2 op_5139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +void REGPARAM2 op_5140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +void REGPARAM2 op_5148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +void REGPARAM2 op_5150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +void REGPARAM2 op_5158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +void REGPARAM2 op_5160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +void REGPARAM2 op_5168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +void REGPARAM2 op_5178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +void REGPARAM2 op_5179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +void REGPARAM2 op_5180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +void REGPARAM2 op_5188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +void REGPARAM2 op_5190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +void REGPARAM2 op_5198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +void REGPARAM2 op_51a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +void REGPARAM2 op_51a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_51b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +void REGPARAM2 op_51b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +void REGPARAM2 op_51b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +void REGPARAM2 op_51c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +void REGPARAM2 op_51c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +void REGPARAM2 op_51d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +void REGPARAM2 op_51d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +void REGPARAM2 op_51e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +void REGPARAM2 op_51e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +void REGPARAM2 op_51f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +void REGPARAM2 op_51f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +void REGPARAM2 op_51f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +void REGPARAM2 op_52c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +void REGPARAM2 op_52c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +void REGPARAM2 op_52d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +void REGPARAM2 op_52d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +void REGPARAM2 op_52e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +void REGPARAM2 op_52e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +void REGPARAM2 op_52f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +void REGPARAM2 op_52f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +void REGPARAM2 op_52f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +void REGPARAM2 op_53c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +void REGPARAM2 op_53c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +void REGPARAM2 op_53d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +void REGPARAM2 op_53d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +void REGPARAM2 op_53e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +void REGPARAM2 op_53e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +void REGPARAM2 op_53f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +void REGPARAM2 op_53f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +void REGPARAM2 op_53f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +void REGPARAM2 op_54c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +void REGPARAM2 op_54c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +void REGPARAM2 op_54d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +void REGPARAM2 op_54d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +void REGPARAM2 op_54e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +void REGPARAM2 op_54e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +void REGPARAM2 op_54f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +void REGPARAM2 op_54f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +void REGPARAM2 op_54f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +void REGPARAM2 op_55c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +void REGPARAM2 op_55c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +void REGPARAM2 op_55d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +void REGPARAM2 op_55d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +void REGPARAM2 op_55e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +void REGPARAM2 op_55e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +void REGPARAM2 op_55f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +void REGPARAM2 op_55f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +void REGPARAM2 op_55f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +void REGPARAM2 op_56c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +void REGPARAM2 op_56c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +void REGPARAM2 op_56d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +void REGPARAM2 op_56d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +void REGPARAM2 op_56e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +void REGPARAM2 op_56e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +void REGPARAM2 op_56f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +void REGPARAM2 op_56f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +void REGPARAM2 op_56f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +void REGPARAM2 op_57c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +void REGPARAM2 op_57c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +void REGPARAM2 op_57d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +void REGPARAM2 op_57d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +void REGPARAM2 op_57e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +void REGPARAM2 op_57e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +void REGPARAM2 op_57f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +void REGPARAM2 op_57f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +void REGPARAM2 op_57f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +void REGPARAM2 op_58c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +void REGPARAM2 op_58c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +void REGPARAM2 op_58d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +void REGPARAM2 op_58d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +void REGPARAM2 op_58e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +void REGPARAM2 op_58e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +void REGPARAM2 op_58f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +void REGPARAM2 op_58f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +void REGPARAM2 op_58f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +void REGPARAM2 op_59c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +void REGPARAM2 op_59c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +void REGPARAM2 op_59d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +void REGPARAM2 op_59d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +void REGPARAM2 op_59e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +void REGPARAM2 op_59e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +void REGPARAM2 op_59f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +void REGPARAM2 op_59f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +void REGPARAM2 op_59f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +void REGPARAM2 op_5ac0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +void REGPARAM2 op_5ac8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +void REGPARAM2 op_5ad0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +void REGPARAM2 op_5ad8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +void REGPARAM2 op_5ae0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +void REGPARAM2 op_5ae8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +void REGPARAM2 op_5af0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +void REGPARAM2 op_5af8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +void REGPARAM2 op_5af9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +void REGPARAM2 op_5bc0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +void REGPARAM2 op_5bc8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +void REGPARAM2 op_5bd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +void REGPARAM2 op_5bd8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +void REGPARAM2 op_5be0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +void REGPARAM2 op_5be8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +void REGPARAM2 op_5bf0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +void REGPARAM2 op_5bf8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +void REGPARAM2 op_5bf9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +void REGPARAM2 op_5cc0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +void REGPARAM2 op_5cc8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +void REGPARAM2 op_5cd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +void REGPARAM2 op_5cd8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +void REGPARAM2 op_5ce0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +void REGPARAM2 op_5ce8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +void REGPARAM2 op_5cf0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +void REGPARAM2 op_5cf8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +void REGPARAM2 op_5cf9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +void REGPARAM2 op_5dc0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +void REGPARAM2 op_5dc8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +void REGPARAM2 op_5dd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +void REGPARAM2 op_5dd8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +void REGPARAM2 op_5de0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +void REGPARAM2 op_5de8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +void REGPARAM2 op_5df0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +void REGPARAM2 op_5df8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +void REGPARAM2 op_5df9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +void REGPARAM2 op_5ec0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +void REGPARAM2 op_5ec8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +void REGPARAM2 op_5ed0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +void REGPARAM2 op_5ed8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +void REGPARAM2 op_5ee0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +void REGPARAM2 op_5ee8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +void REGPARAM2 op_5ef0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +void REGPARAM2 op_5ef8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +void REGPARAM2 op_5ef9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +void REGPARAM2 op_5fc0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +void REGPARAM2 op_5fc8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_020(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +void REGPARAM2 op_5fd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +void REGPARAM2 op_5fd8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +void REGPARAM2 op_5fe0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +void REGPARAM2 op_5fe8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +void REGPARAM2 op_5ff0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +void REGPARAM2 op_5ff8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +void REGPARAM2 op_5ff9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +void REGPARAM2 op_6000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +void REGPARAM2 op_6001_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +void REGPARAM2 op_60ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +void REGPARAM2 op_6100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_word_ce020_prefetch(2); + /* op H:2,T:0,C:-2 */ + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsr_ce020(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +void REGPARAM2 op_6101_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + /* op H:2,T:0,C:-2 */ + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsr_ce020(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +void REGPARAM2 op_61ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* op H:2,T:0,C:-2 */ + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsr_ce020(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_020(); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +void REGPARAM2 op_6200_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +void REGPARAM2 op_6201_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +void REGPARAM2 op_62ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +void REGPARAM2 op_6300_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +void REGPARAM2 op_6301_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +void REGPARAM2 op_63ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +void REGPARAM2 op_6400_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +void REGPARAM2 op_6401_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +void REGPARAM2 op_64ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +void REGPARAM2 op_6500_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +void REGPARAM2 op_6501_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +void REGPARAM2 op_65ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +void REGPARAM2 op_6600_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +void REGPARAM2 op_6601_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +void REGPARAM2 op_66ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +void REGPARAM2 op_6700_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +void REGPARAM2 op_6701_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +void REGPARAM2 op_67ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +void REGPARAM2 op_6800_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +void REGPARAM2 op_6801_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +void REGPARAM2 op_68ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +void REGPARAM2 op_6900_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +void REGPARAM2 op_6901_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +void REGPARAM2 op_69ff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +void REGPARAM2 op_6a00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +void REGPARAM2 op_6a01_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +void REGPARAM2 op_6aff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +void REGPARAM2 op_6b00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +void REGPARAM2 op_6b01_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +void REGPARAM2 op_6bff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +void REGPARAM2 op_6c00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +void REGPARAM2 op_6c01_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +void REGPARAM2 op_6cff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +void REGPARAM2 op_6d00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +void REGPARAM2 op_6d01_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +void REGPARAM2 op_6dff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +void REGPARAM2 op_6e00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +void REGPARAM2 op_6e01_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +void REGPARAM2 op_6eff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +void REGPARAM2 op_6f00_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce020_prefetch(2); + /* OP zero */ + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +void REGPARAM2 op_6f01_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +void REGPARAM2 op_6fff_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce020_prefetch(2); + /* OP zero */ + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_020(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +void REGPARAM2 op_7000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +void REGPARAM2 op_8000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +void REGPARAM2 op_8010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +void REGPARAM2 op_8018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +void REGPARAM2 op_8020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +void REGPARAM2 op_8028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +void REGPARAM2 op_8030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +void REGPARAM2 op_8038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +void REGPARAM2 op_8039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +void REGPARAM2 op_803a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_803b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +void REGPARAM2 op_803c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +void REGPARAM2 op_8040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +void REGPARAM2 op_8050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +void REGPARAM2 op_8058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +void REGPARAM2 op_8060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +void REGPARAM2 op_8068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +void REGPARAM2 op_8070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +void REGPARAM2 op_8078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +void REGPARAM2 op_8079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +void REGPARAM2 op_807a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_807b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_807c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +void REGPARAM2 op_8080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +void REGPARAM2 op_8090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +void REGPARAM2 op_8098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +void REGPARAM2 op_80a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +void REGPARAM2 op_80a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +void REGPARAM2 op_80b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +void REGPARAM2 op_80b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +void REGPARAM2 op_80b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +void REGPARAM2 op_80ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_80bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_80bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +void REGPARAM2 op_80c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:18 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +void REGPARAM2 op_80d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +void REGPARAM2 op_80d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +void REGPARAM2 op_80e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +void REGPARAM2 op_80e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_80f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + do_cycles_020_internal(34); + return; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +void REGPARAM2 op_80f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +void REGPARAM2 op_80f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + do_cycles_020_internal(34); + return; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +void REGPARAM2 op_80fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_80fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + do_cycles_020_internal(34); + return; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +void REGPARAM2 op_80fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +void REGPARAM2 op_8100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +void REGPARAM2 op_8108_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:10 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:10 */ + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +void REGPARAM2 op_8110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +void REGPARAM2 op_8118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +void REGPARAM2 op_8120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +void REGPARAM2 op_8128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_8130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +void REGPARAM2 op_8138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +void REGPARAM2 op_8139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_word_ce020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(x_get_word(m68k_areg(regs, srcreg))); + val += get_word_ce020_prefetch(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + x_put_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +void REGPARAM2 op_8150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +void REGPARAM2 op_8158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +void REGPARAM2 op_8160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +void REGPARAM2 op_8168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_8170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +void REGPARAM2 op_8178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +void REGPARAM2 op_8179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_word_ce020_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(x_get_byte(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_word_ce020_prefetch(2); + m68k_areg(regs, dstreg) -= 2; + x_put_word(m68k_areg(regs, dstreg), val); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +void REGPARAM2 op_8190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +void REGPARAM2 op_8198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +void REGPARAM2 op_81a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +void REGPARAM2 op_81a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_81b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +void REGPARAM2 op_81b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +void REGPARAM2 op_81b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +void REGPARAM2 op_81c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:18 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +void REGPARAM2 op_81d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +void REGPARAM2 op_81d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +void REGPARAM2 op_81e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +void REGPARAM2 op_81e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_81f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + do_cycles_020_internal(48); + return; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +void REGPARAM2 op_81f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +void REGPARAM2 op_81f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + do_cycles_020_internal(48); + return; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +void REGPARAM2 op_81fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_81fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + do_cycles_020_internal(48); + return; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +void REGPARAM2 op_81fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +void REGPARAM2 op_9000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +void REGPARAM2 op_9010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +void REGPARAM2 op_9018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +void REGPARAM2 op_9020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +void REGPARAM2 op_9028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +void REGPARAM2 op_9030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +void REGPARAM2 op_9038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +void REGPARAM2 op_9039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +void REGPARAM2 op_903a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_903b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +void REGPARAM2 op_903c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +void REGPARAM2 op_9040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +void REGPARAM2 op_9048_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +void REGPARAM2 op_9050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +void REGPARAM2 op_9058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +void REGPARAM2 op_9060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +void REGPARAM2 op_9068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +void REGPARAM2 op_9070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +void REGPARAM2 op_9078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +void REGPARAM2 op_9079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +void REGPARAM2 op_907a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_907b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_907c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +void REGPARAM2 op_9080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +void REGPARAM2 op_9088_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +void REGPARAM2 op_9090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +void REGPARAM2 op_9098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +void REGPARAM2 op_90a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +void REGPARAM2 op_90a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +void REGPARAM2 op_90b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +void REGPARAM2 op_90b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +void REGPARAM2 op_90b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +void REGPARAM2 op_90ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_90bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_90bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +void REGPARAM2 op_90c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +void REGPARAM2 op_90c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +void REGPARAM2 op_90d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +void REGPARAM2 op_90d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +void REGPARAM2 op_90e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +void REGPARAM2 op_90e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +void REGPARAM2 op_90f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +void REGPARAM2 op_90f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +void REGPARAM2 op_90f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +void REGPARAM2 op_90fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +void REGPARAM2 op_90fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +void REGPARAM2 op_90fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +void REGPARAM2 op_9100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +void REGPARAM2 op_9108_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +void REGPARAM2 op_9110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +void REGPARAM2 op_9118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +void REGPARAM2 op_9120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +void REGPARAM2 op_9128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_9130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +void REGPARAM2 op_9138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +void REGPARAM2 op_9139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +void REGPARAM2 op_9140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +void REGPARAM2 op_9148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +void REGPARAM2 op_9150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +void REGPARAM2 op_9158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +void REGPARAM2 op_9160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +void REGPARAM2 op_9168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_9170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +void REGPARAM2 op_9178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +void REGPARAM2 op_9179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +void REGPARAM2 op_9180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +void REGPARAM2 op_9188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +void REGPARAM2 op_9190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +void REGPARAM2 op_9198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +void REGPARAM2 op_91a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +void REGPARAM2 op_91a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_91b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +void REGPARAM2 op_91b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +void REGPARAM2 op_91b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +void REGPARAM2 op_91c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +void REGPARAM2 op_91c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +void REGPARAM2 op_91d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +void REGPARAM2 op_91d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +void REGPARAM2 op_91e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +void REGPARAM2 op_91e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +void REGPARAM2 op_91f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +void REGPARAM2 op_91f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +void REGPARAM2 op_91f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +void REGPARAM2 op_91fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +void REGPARAM2 op_91fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +void REGPARAM2 op_91fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +void REGPARAM2 op_b000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +void REGPARAM2 op_b010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +void REGPARAM2 op_b018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +void REGPARAM2 op_b020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +void REGPARAM2 op_b028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +void REGPARAM2 op_b030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +void REGPARAM2 op_b038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +void REGPARAM2 op_b039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +void REGPARAM2 op_b03a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_b03b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +void REGPARAM2 op_b03c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +void REGPARAM2 op_b040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +void REGPARAM2 op_b048_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +void REGPARAM2 op_b050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +void REGPARAM2 op_b058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +void REGPARAM2 op_b060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +void REGPARAM2 op_b068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +void REGPARAM2 op_b070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +void REGPARAM2 op_b078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +void REGPARAM2 op_b079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +void REGPARAM2 op_b07a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_b07b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +void REGPARAM2 op_b07c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +void REGPARAM2 op_b080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +void REGPARAM2 op_b088_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +void REGPARAM2 op_b090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +void REGPARAM2 op_b098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +void REGPARAM2 op_b0a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +void REGPARAM2 op_b0a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +void REGPARAM2 op_b0b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +void REGPARAM2 op_b0b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +void REGPARAM2 op_b0b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +void REGPARAM2 op_b0ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_b0bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +void REGPARAM2 op_b0bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +void REGPARAM2 op_b0c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +void REGPARAM2 op_b0c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +void REGPARAM2 op_b0d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +void REGPARAM2 op_b0d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +void REGPARAM2 op_b0e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +void REGPARAM2 op_b0e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +void REGPARAM2 op_b0f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +void REGPARAM2 op_b0f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +void REGPARAM2 op_b0f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +void REGPARAM2 op_b0fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +void REGPARAM2 op_b0fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +void REGPARAM2 op_b0fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +void REGPARAM2 op_b100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +void REGPARAM2 op_b108_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* op H:0,T:0,C:8 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +void REGPARAM2 op_b110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +void REGPARAM2 op_b118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +void REGPARAM2 op_b120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +void REGPARAM2 op_b128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_b130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +void REGPARAM2 op_b138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +void REGPARAM2 op_b139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +void REGPARAM2 op_b140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +void REGPARAM2 op_b148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + /* op H:0,T:0,C:8 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +void REGPARAM2 op_b150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +void REGPARAM2 op_b158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +void REGPARAM2 op_b160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +void REGPARAM2 op_b168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_b170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +void REGPARAM2 op_b178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +void REGPARAM2 op_b179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +void REGPARAM2 op_b180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +void REGPARAM2 op_b188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:0,C:8 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +void REGPARAM2 op_b190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +void REGPARAM2 op_b198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +void REGPARAM2 op_b1a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +void REGPARAM2 op_b1a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_b1b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +void REGPARAM2 op_b1b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +void REGPARAM2 op_b1b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +void REGPARAM2 op_b1c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +void REGPARAM2 op_b1c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +void REGPARAM2 op_b1d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +void REGPARAM2 op_b1d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +void REGPARAM2 op_b1e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +void REGPARAM2 op_b1e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +void REGPARAM2 op_b1f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +void REGPARAM2 op_b1f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +void REGPARAM2 op_b1f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +void REGPARAM2 op_b1fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +void REGPARAM2 op_b1fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +void REGPARAM2 op_b1fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +void REGPARAM2 op_c000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +void REGPARAM2 op_c010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +void REGPARAM2 op_c018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +void REGPARAM2 op_c020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +void REGPARAM2 op_c028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +void REGPARAM2 op_c030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +void REGPARAM2 op_c038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +void REGPARAM2 op_c039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +void REGPARAM2 op_c03a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_c03b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_c03c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +void REGPARAM2 op_c040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +void REGPARAM2 op_c050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +void REGPARAM2 op_c058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +void REGPARAM2 op_c060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +void REGPARAM2 op_c068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +void REGPARAM2 op_c078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +void REGPARAM2 op_c079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +void REGPARAM2 op_c07a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c07b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_c07c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +void REGPARAM2 op_c080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +void REGPARAM2 op_c090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +void REGPARAM2 op_c098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +void REGPARAM2 op_c0a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +void REGPARAM2 op_c0a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +void REGPARAM2 op_c0b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +void REGPARAM2 op_c0b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +void REGPARAM2 op_c0b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +void REGPARAM2 op_c0ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_c0bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +void REGPARAM2 op_c0c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +void REGPARAM2 op_c0d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +void REGPARAM2 op_c0d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +void REGPARAM2 op_c0e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +void REGPARAM2 op_c0e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c0f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +void REGPARAM2 op_c0f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +void REGPARAM2 op_c0f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +void REGPARAM2 op_c0fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +void REGPARAM2 op_c0fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +void REGPARAM2 op_c100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +void REGPARAM2 op_c108_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:10 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:10 */ + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +void REGPARAM2 op_c110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +void REGPARAM2 op_c118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +void REGPARAM2 op_c120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +void REGPARAM2 op_c128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_c130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +void REGPARAM2 op_c138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +void REGPARAM2 op_c139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +void REGPARAM2 op_c140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +void REGPARAM2 op_c148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +void REGPARAM2 op_c150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +void REGPARAM2 op_c158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +void REGPARAM2 op_c160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +void REGPARAM2 op_c168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_c170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +void REGPARAM2 op_c178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +void REGPARAM2 op_c179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +void REGPARAM2 op_c188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +void REGPARAM2 op_c190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +void REGPARAM2 op_c198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +void REGPARAM2 op_c1a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +void REGPARAM2 op_c1a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_c1b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +void REGPARAM2 op_c1b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +void REGPARAM2 op_c1b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +void REGPARAM2 op_c1c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +void REGPARAM2 op_c1d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +void REGPARAM2 op_c1d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +void REGPARAM2 op_c1e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +void REGPARAM2 op_c1e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c1f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +void REGPARAM2 op_c1f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +void REGPARAM2 op_c1f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +void REGPARAM2 op_c1fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c1fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +void REGPARAM2 op_c1fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +void REGPARAM2 op_d000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +void REGPARAM2 op_d010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +void REGPARAM2 op_d018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +void REGPARAM2 op_d020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +void REGPARAM2 op_d028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +void REGPARAM2 op_d030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +void REGPARAM2 op_d038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +void REGPARAM2 op_d039_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +void REGPARAM2 op_d03a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_d03b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +void REGPARAM2 op_d03c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce020_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +void REGPARAM2 op_d040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +void REGPARAM2 op_d048_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +void REGPARAM2 op_d050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +void REGPARAM2 op_d058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +void REGPARAM2 op_d060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +void REGPARAM2 op_d068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +void REGPARAM2 op_d070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +void REGPARAM2 op_d078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +void REGPARAM2 op_d079_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +void REGPARAM2 op_d07a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_d07b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_d07c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +void REGPARAM2 op_d080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +void REGPARAM2 op_d088_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +void REGPARAM2 op_d090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +void REGPARAM2 op_d098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +void REGPARAM2 op_d0a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +void REGPARAM2 op_d0a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +void REGPARAM2 op_d0b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +void REGPARAM2 op_d0b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +void REGPARAM2 op_d0b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +void REGPARAM2 op_d0ba_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_d0bb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_d0bc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +void REGPARAM2 op_d0c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +void REGPARAM2 op_d0c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +void REGPARAM2 op_d0d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +void REGPARAM2 op_d0d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +void REGPARAM2 op_d0e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +void REGPARAM2 op_d0e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +void REGPARAM2 op_d0f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +void REGPARAM2 op_d0f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +void REGPARAM2 op_d0f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +void REGPARAM2 op_d0fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +void REGPARAM2 op_d0fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +void REGPARAM2 op_d0fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +void REGPARAM2 op_d100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +void REGPARAM2 op_d108_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +void REGPARAM2 op_d110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +void REGPARAM2 op_d118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +void REGPARAM2 op_d120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +void REGPARAM2 op_d128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_d130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +void REGPARAM2 op_d138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +void REGPARAM2 op_d139_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +void REGPARAM2 op_d140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +void REGPARAM2 op_d148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +void REGPARAM2 op_d150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +void REGPARAM2 op_d158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +void REGPARAM2 op_d160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +void REGPARAM2 op_d168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_d170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +void REGPARAM2 op_d178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +void REGPARAM2 op_d179_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +void REGPARAM2 op_d180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +void REGPARAM2 op_d188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +void REGPARAM2 op_d190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +void REGPARAM2 op_d198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +void REGPARAM2 op_d1a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +void REGPARAM2 op_d1a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_d1b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +void REGPARAM2 op_d1b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +void REGPARAM2 op_d1b9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce020_prefetch(2); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +void REGPARAM2 op_d1c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +void REGPARAM2 op_d1c8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +void REGPARAM2 op_d1d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +void REGPARAM2 op_d1d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +void REGPARAM2 op_d1e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +void REGPARAM2 op_d1e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +void REGPARAM2 op_d1f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +void REGPARAM2 op_d1f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +void REGPARAM2 op_d1f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +void REGPARAM2 op_d1fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +void REGPARAM2 op_d1fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +void REGPARAM2 op_d1fc_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce020_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +void REGPARAM2 op_e000_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +void REGPARAM2 op_e008_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +void REGPARAM2 op_e010_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +void REGPARAM2 op_e018_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +void REGPARAM2 op_e020_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +void REGPARAM2 op_e028_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +void REGPARAM2 op_e030_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +void REGPARAM2 op_e038_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +void REGPARAM2 op_e040_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +void REGPARAM2 op_e048_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +void REGPARAM2 op_e050_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +void REGPARAM2 op_e058_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +void REGPARAM2 op_e060_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +void REGPARAM2 op_e068_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +void REGPARAM2 op_e070_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +void REGPARAM2 op_e078_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +void REGPARAM2 op_e080_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +void REGPARAM2 op_e088_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +void REGPARAM2 op_e090_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +void REGPARAM2 op_e098_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +void REGPARAM2 op_e0a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +void REGPARAM2 op_e0a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +void REGPARAM2 op_e0b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +void REGPARAM2 op_e0b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +void REGPARAM2 op_e0d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +void REGPARAM2 op_e0d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +void REGPARAM2 op_e0e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +void REGPARAM2 op_e0e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +void REGPARAM2 op_e0f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +void REGPARAM2 op_e0f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +void REGPARAM2 op_e0f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +void REGPARAM2 op_e100_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +void REGPARAM2 op_e108_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +void REGPARAM2 op_e110_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +void REGPARAM2 op_e118_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +void REGPARAM2 op_e120_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +void REGPARAM2 op_e128_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +void REGPARAM2 op_e130_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +void REGPARAM2 op_e138_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +void REGPARAM2 op_e140_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +void REGPARAM2 op_e148_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +void REGPARAM2 op_e150_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +void REGPARAM2 op_e158_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +void REGPARAM2 op_e160_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +void REGPARAM2 op_e168_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +void REGPARAM2 op_e170_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +void REGPARAM2 op_e178_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +void REGPARAM2 op_e180_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +void REGPARAM2 op_e188_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +void REGPARAM2 op_e190_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +void REGPARAM2 op_e198_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +void REGPARAM2 op_e1a0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +void REGPARAM2 op_e1a8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +void REGPARAM2 op_e1b0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +void REGPARAM2 op_e1b8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce020_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +void REGPARAM2 op_e1d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +void REGPARAM2 op_e1d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +void REGPARAM2 op_e1e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +void REGPARAM2 op_e1e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +void REGPARAM2 op_e1f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +void REGPARAM2 op_e1f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +void REGPARAM2 op_e1f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +void REGPARAM2 op_e2d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +void REGPARAM2 op_e2d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +void REGPARAM2 op_e2e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +void REGPARAM2 op_e2e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +void REGPARAM2 op_e2f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +void REGPARAM2 op_e2f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +void REGPARAM2 op_e2f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +void REGPARAM2 op_e3d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +void REGPARAM2 op_e3d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +void REGPARAM2 op_e3e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +void REGPARAM2 op_e3e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +void REGPARAM2 op_e3f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +void REGPARAM2 op_e3f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +void REGPARAM2 op_e3f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +void REGPARAM2 op_e4d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +void REGPARAM2 op_e4d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +void REGPARAM2 op_e4e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +void REGPARAM2 op_e4e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +void REGPARAM2 op_e4f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +void REGPARAM2 op_e4f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +void REGPARAM2 op_e4f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +void REGPARAM2 op_e5d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +void REGPARAM2 op_e5d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +void REGPARAM2 op_e5e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +void REGPARAM2 op_e5e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +void REGPARAM2 op_e5f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +void REGPARAM2 op_e5f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +void REGPARAM2 op_e5f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +void REGPARAM2 op_e6d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +void REGPARAM2 op_e6d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +void REGPARAM2 op_e6e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +void REGPARAM2 op_e6e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +void REGPARAM2 op_e6f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +void REGPARAM2 op_e6f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +void REGPARAM2 op_e6f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +void REGPARAM2 op_e7d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +void REGPARAM2 op_e7d8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +void REGPARAM2 op_e7e0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce020_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +void REGPARAM2 op_e7e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +void REGPARAM2 op_e7f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +void REGPARAM2 op_e7f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +void REGPARAM2 op_e7f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce020_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce020_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9d0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9e8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9fa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9fb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eac0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ead0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eae8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebc0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebe8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebfa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebfb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecc0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ece8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edc0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ede8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edfa_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edfb_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce020(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eec0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eed0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eee8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efc0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efd0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efe8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce020(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff8_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff9_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce020_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce020_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f200_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f208_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f210_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f218_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f220_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f228_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f230_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f238_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f239_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f240_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f248_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f250_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f258_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f260_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f268_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f270_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f278_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f279_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce020_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_ce020_prefetch(2); + uae_s16 dummy = get_word_ce020_prefetch(4); + /* OP zero */ + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_ce020_prefetch(2); + uae_s32 dummy; + dummy = get_long_ce020_prefetch(4); + /* OP zero */ + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27c_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_ce020_prefetch(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f280_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_word_ce020_prefetch(0); + /* OP zero */ + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f2c0_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_long_ce020_prefetch(0); + /* OP zero */ + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f310_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f320_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f328_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f330_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f338_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f339_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f350_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f358_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f368_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f370_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f378_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f379_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f37a_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f37b_21_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce020_prefetch_opcode(0); + + #endif + return; +} + +#endif diff --git a/cpuemu_22.cpp b/cpuemu_22.cpp new file mode 100644 index 00000000..b8950253 --- /dev/null +++ b/cpuemu_22.cpp @@ -0,0 +1,42003 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_030_prefetch(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_word_030_prefetch(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_u16 val = (x_get_byte(mempa) & 0xff) << 8; + val |= (x_get_byte(mempa + 2) & 0xff); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_word_030_prefetch(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_u32 val = (x_get_byte(mempa) & 0xff) << 24; + val |= (x_get_byte(mempa + 2) & 0xff) << 16; + val |= (x_get_byte(mempa + 4) & 0xff) << 8; + val |= (x_get_byte(mempa + 6) & 0xff); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + x_put_byte(mempa, src >> 8); + x_put_byte(mempa + 2, src); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + x_put_byte(mempa, src >> 24); + x_put_byte(mempa + 2, src >> 16); + x_put_byte(mempa + 4, src >> 8); + x_put_byte(mempa + 6, src); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_030_prefetch(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_word_030_prefetch(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, newv); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(10); + x_put_long(dsta, newv); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, newv); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(10); + x_put_long(dsta, newv); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, dst); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, dst); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, dst); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_030_prefetch(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_word_030_prefetch(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(4); + } else { + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(4); + } else { + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(4); + } else { + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(6); + } else { + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(0); + } else { + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(6); + } else { + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(8); + } else { + regs.irc = get_word_030_prefetch(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(10); + m68k_incpci(10); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cbb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(4); + } else { + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(4); + } else { + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(4); + } else { + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(6); + } else { + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(0); + } else { + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(6); + } else { + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(8); + } else { + regs.irc = get_word_030_prefetch(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_long_030_prefetch(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = x_get_word(rn1), dst2 = x_get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_030_prefetch(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_030_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_030_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + regs.irc = get_word_030_prefetch(6); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_030_prefetch(0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + regs.irc = get_word_030_prefetch(6); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_030_prefetch(4); + regs.irc = get_word_030_prefetch(8); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_030_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_030_prefetch(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_030_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_030_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + regs.irc = get_word_030_prefetch(6); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_030_prefetch(0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + regs.irc = get_word_030_prefetch(6); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_030_prefetch(4); + regs.irc = get_word_030_prefetch(8); + dfc_nommu_put_word(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_030_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_030_prefetch(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_030_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_030_prefetch(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + regs.irc = get_word_030_prefetch(6); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_030_prefetch(0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + regs.irc = get_word_030_prefetch(6); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_word_030_prefetch(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_030_prefetch(4); + regs.irc = get_word_030_prefetch(8); + dfc_nommu_put_long(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_030_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + regs.irc = get_word_030_prefetch(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(4); + } else { + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(4); + } else { + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(4); + } else { + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(6); + } else { + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(0); + } else { + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, rc) = dst; + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(6); + } else { + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_030_prefetch(8); + } else { + regs.irc = get_word_030_prefetch(8); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_long_030_prefetch(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = x_get_long(rn1), dst2 = x_get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(10); + x_put_byte(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_byte(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_long(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(10); + x_put_long(dsta, src); + m68k_incpci(10); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(10); + x_put_word(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_030_prefetch(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(8); + x_put_word(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + MakeSR(); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.irc = get_word_030_prefetch(0); + x_put_word(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + MakeSR(); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_long_030_prefetch(2); + MakeSR(); + regs.irc = get_word_030_prefetch(6); + x_put_word(srca, regs.sr); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(srca, 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(srca, 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + MakeSR(); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.irc = get_word_030_prefetch(0); + x_put_word(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + MakeSR(); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + MakeSR(); + regs.irc = get_word_030_prefetch(6); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(6); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_word_030_prefetch(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 offs; + offs = get_long_030_prefetch(2); + regs.irc = get_word_030_prefetch(6); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, srca); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, srca); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + x_put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = get_long_030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + x_put_long(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + x_put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + x_put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_030_prefetch(2); + uaecptr srca; + srca = get_long_030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_49c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a48_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a88_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4aba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_long_030_prefetch(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_030_prefetch(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c10_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c18_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c20_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c28_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c30_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c38_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c39_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uae_s32 dst; + dst = get_long_030_prefetch(4); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c40_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c50_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c58_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c60_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c68_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c70_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c78_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c79_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(2); + uae_s32 dst; + dst = get_long_030_prefetch(4); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_long_030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_long_030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpci(2); + Exception_cpu(src + 32); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_word_030_prefetch(2); + regs.irc = get_word_030_prefetch(4); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + uae_s32 old = x_get_long(olda); + m68k_areg(regs, 7) = src + 4; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, srcreg) = (old); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_word_030_prefetch(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + regs.t1 = regs.t0 = 0; + Exception_cpu(14); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(newpc); + branch_stack_pop_rte(oldpc); + fill_prefetch_030_ntx(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_word_030_prefetch(2); + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(pc); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + m68k_do_rtsi(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci_j(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + fill_prefetch_030(); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_030_prefetch(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_030_prefetch(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(2); + x_put_byte(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(0); + x_put_byte(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(4); + x_put_byte(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_030_prefetch(2); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_030_prefetch(6); + x_put_byte(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_030_prefetch(2); + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_030_prefetch(2); + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_word_030_prefetch(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsri(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsri(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_long_030_prefetch(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsri(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_030_prefetch(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_030_prefetch(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(x_get_word(m68k_areg(regs, srcreg))); + val += get_word_030_prefetch(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + x_put_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(x_get_byte(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_word_030_prefetch(2); + m68k_areg(regs, dstreg) -= 2; + x_put_word(m68k_areg(regs, dstreg), val); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_word_030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_byte(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_byte(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_byte(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_word(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_word(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_word(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(0); + x_put_long(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(4); + x_put_long(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_030_prefetch(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_030_prefetch(6); + x_put_long(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_word_030_prefetch(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_030_prefetch(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_030_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_word_030_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_word_030_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_030_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_word_030_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_030_prefetch(2); + x_put_word(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_030_prefetch(0); + x_put_word(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_030_prefetch(4); + x_put_word(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_long_030_prefetch(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_word_030_prefetch(6); + x_put_word(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9d0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9e8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eac0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ead0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eae8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebc0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebe8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecc0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ece8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edc0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ede8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfa_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfb_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eec0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eed0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eee8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efc0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efd0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efe8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff8_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff9_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_030_prefetch(2); + uaecptr dsta; + dsta = get_long_030_prefetch(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_030_prefetch(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f000_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + uae_u16 extraa = 0; + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f008_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + uae_u16 extraa = 0; + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f010_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f018_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f020_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = extraa; + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f028_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_030_prefetch(0); + m68k_incpci(2); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f030_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f038_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = (uae_s32)(uae_s16)get_word_030_prefetch(0); + m68k_incpci(2); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f039_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = get_long_030_prefetch(0); + m68k_incpci(4); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f200_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f208_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f210_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f218_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f220_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f228_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f230_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f238_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f239_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f240_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f248_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f250_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f258_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f260_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f268_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f270_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f278_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f279_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + uae_s16 dummy = get_word_030_prefetch(4); + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + uae_s32 dummy; + dummy = get_long_030_prefetch(4); + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27c_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_030_prefetch(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f280_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_word_030_prefetch(0); + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f2c0_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_long_030_prefetch(0); + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f310_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f320_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f328_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f330_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f338_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f339_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f350_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f358_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f368_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f370_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f378_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f379_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37a_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37b_22_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_word_030_prefetch(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif diff --git a/cpuemu_23.cpp b/cpuemu_23.cpp new file mode 100644 index 00000000..3d916ace --- /dev/null +++ b/cpuemu_23.cpp @@ -0,0 +1,45390 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +void REGPARAM2 op_0000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +void REGPARAM2 op_0010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +void REGPARAM2 op_0018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +void REGPARAM2 op_0020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +void REGPARAM2 op_0028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +void REGPARAM2 op_0038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +void REGPARAM2 op_0039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +void REGPARAM2 op_003c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_0040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +void REGPARAM2 op_0050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +void REGPARAM2 op_0058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +void REGPARAM2 op_0060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +void REGPARAM2 op_0068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +void REGPARAM2 op_0078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +void REGPARAM2 op_0079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +void REGPARAM2 op_007c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if(regs.t0) check_t0_trace(); + regs.sr |= src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_0080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +void REGPARAM2 op_0090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +void REGPARAM2 op_0098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +void REGPARAM2 op_00a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +void REGPARAM2 op_00a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_00b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +void REGPARAM2 op_00b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +void REGPARAM2 op_00b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +void REGPARAM2 op_0100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +void REGPARAM2 op_0108_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* OP zero */ + uae_u16 val = (x_get_byte(mempa) & 0xff) << 8; + val |= (x_get_byte(mempa + 2) & 0xff); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +void REGPARAM2 op_0110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +void REGPARAM2 op_0118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +void REGPARAM2 op_0120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +void REGPARAM2 op_0128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +void REGPARAM2 op_0138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +void REGPARAM2 op_0139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +void REGPARAM2 op_013a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +void REGPARAM2 op_013b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +void REGPARAM2 op_013c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +void REGPARAM2 op_0140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +void REGPARAM2 op_0148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* OP zero */ + uae_u32 val = (x_get_byte(mempa) & 0xff) << 24; + val |= (x_get_byte(mempa + 2) & 0xff) << 16; + val |= (x_get_byte(mempa + 4) & 0xff) << 8; + val |= (x_get_byte(mempa + 6) & 0xff); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +void REGPARAM2 op_0150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +void REGPARAM2 op_0158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +void REGPARAM2 op_0160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +void REGPARAM2 op_0168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +void REGPARAM2 op_0178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +void REGPARAM2 op_0179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +void REGPARAM2 op_0180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +void REGPARAM2 op_0188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + x_put_byte(mempa, src >> 8); + x_put_byte(mempa + 2, src); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +void REGPARAM2 op_0190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +void REGPARAM2 op_0198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +void REGPARAM2 op_01a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +void REGPARAM2 op_01a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +void REGPARAM2 op_01b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +void REGPARAM2 op_01b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +void REGPARAM2 op_01c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +void REGPARAM2 op_01c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + x_put_byte(mempa, src >> 24); + x_put_byte(mempa + 2, src >> 16); + x_put_byte(mempa + 4, src >> 8); + x_put_byte(mempa + 6, src); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +void REGPARAM2 op_01d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +void REGPARAM2 op_01d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +void REGPARAM2 op_01e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +void REGPARAM2 op_01e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +void REGPARAM2 op_01f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +void REGPARAM2 op_01f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_0200_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +void REGPARAM2 op_0210_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +void REGPARAM2 op_0218_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +void REGPARAM2 op_0220_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +void REGPARAM2 op_0228_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0230_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +void REGPARAM2 op_0238_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +void REGPARAM2 op_0239_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +void REGPARAM2 op_023c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_0240_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +void REGPARAM2 op_0250_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +void REGPARAM2 op_0258_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +void REGPARAM2 op_0260_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +void REGPARAM2 op_0268_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0270_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +void REGPARAM2 op_0278_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +void REGPARAM2 op_0279_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +void REGPARAM2 op_027c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if(regs.t0) check_t0_trace(); + regs.sr &= src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_0280_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +void REGPARAM2 op_0290_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +void REGPARAM2 op_0298_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +void REGPARAM2 op_02a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +void REGPARAM2 op_02a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_02b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +void REGPARAM2 op_02b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +void REGPARAM2 op_02b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +void REGPARAM2 op_0400_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +void REGPARAM2 op_0410_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +void REGPARAM2 op_0418_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +void REGPARAM2 op_0420_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +void REGPARAM2 op_0428_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0430_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +void REGPARAM2 op_0438_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +void REGPARAM2 op_0439_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_0440_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +void REGPARAM2 op_0450_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +void REGPARAM2 op_0458_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +void REGPARAM2 op_0460_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +void REGPARAM2 op_0468_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0470_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +void REGPARAM2 op_0478_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +void REGPARAM2 op_0479_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_0480_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +void REGPARAM2 op_0490_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +void REGPARAM2 op_0498_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +void REGPARAM2 op_04a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +void REGPARAM2 op_04a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_04b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +void REGPARAM2 op_04b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +void REGPARAM2 op_04b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +void REGPARAM2 op_0600_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +void REGPARAM2 op_0610_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +void REGPARAM2 op_0618_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +void REGPARAM2 op_0620_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +void REGPARAM2 op_0628_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0630_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +void REGPARAM2 op_0638_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +void REGPARAM2 op_0639_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_0640_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +void REGPARAM2 op_0650_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +void REGPARAM2 op_0658_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +void REGPARAM2 op_0660_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +void REGPARAM2 op_0668_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0670_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +void REGPARAM2 op_0678_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +void REGPARAM2 op_0679_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_0680_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +void REGPARAM2 op_0690_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +void REGPARAM2 op_0698_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +void REGPARAM2 op_06a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +void REGPARAM2 op_06a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_06b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +void REGPARAM2 op_06b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +void REGPARAM2 op_06b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +void REGPARAM2 op_0800_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +void REGPARAM2 op_0810_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +void REGPARAM2 op_0818_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +void REGPARAM2 op_0820_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +void REGPARAM2 op_0828_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0830_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +void REGPARAM2 op_0838_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +void REGPARAM2 op_0839_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +void REGPARAM2 op_083a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +void REGPARAM2 op_083b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +void REGPARAM2 op_0840_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +void REGPARAM2 op_0850_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +void REGPARAM2 op_0858_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +void REGPARAM2 op_0860_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +void REGPARAM2 op_0868_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0870_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +void REGPARAM2 op_0878_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +void REGPARAM2 op_0879_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +void REGPARAM2 op_0880_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +void REGPARAM2 op_0890_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +void REGPARAM2 op_0898_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +void REGPARAM2 op_08a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +void REGPARAM2 op_08a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +void REGPARAM2 op_08b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +void REGPARAM2 op_08b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +void REGPARAM2 op_08c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +void REGPARAM2 op_08d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +void REGPARAM2 op_08d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +void REGPARAM2 op_08e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +void REGPARAM2 op_08e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +void REGPARAM2 op_08f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +void REGPARAM2 op_08f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +void REGPARAM2 op_0a00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +void REGPARAM2 op_0a10_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +void REGPARAM2 op_0a18_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +void REGPARAM2 op_0a20_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +void REGPARAM2 op_0a28_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0a30_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +void REGPARAM2 op_0a38_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +void REGPARAM2 op_0a39_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +void REGPARAM2 op_0a3c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +void REGPARAM2 op_0a40_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +void REGPARAM2 op_0a50_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +void REGPARAM2 op_0a58_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +void REGPARAM2 op_0a60_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +void REGPARAM2 op_0a68_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0a70_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +void REGPARAM2 op_0a78_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +void REGPARAM2 op_0a79_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +void REGPARAM2 op_0a7c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +void REGPARAM2 op_0a80_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +void REGPARAM2 op_0a90_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +void REGPARAM2 op_0a98_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +void REGPARAM2 op_0aa0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +void REGPARAM2 op_0aa8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0ab0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +void REGPARAM2 op_0ab8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +void REGPARAM2 op_0ab9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(4); + } else { + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(4); + } else { + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(4); + } else { + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(6); + } else { + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(0); + } else { + regs.irc = get_word_ce030_prefetch_opcode(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(6); + } else { + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(8); + } else { + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +void REGPARAM2 op_0c00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +void REGPARAM2 op_0c10_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +void REGPARAM2 op_0c18_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +void REGPARAM2 op_0c20_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +void REGPARAM2 op_0c28_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0c30_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +void REGPARAM2 op_0c38_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +void REGPARAM2 op_0c39_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c3a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c3b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +void REGPARAM2 op_0c40_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +void REGPARAM2 op_0c50_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +void REGPARAM2 op_0c58_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +void REGPARAM2 op_0c60_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +void REGPARAM2 op_0c68_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0c70_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +void REGPARAM2 op_0c78_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +void REGPARAM2 op_0c79_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c7a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c7b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 dst = x_get_word(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +void REGPARAM2 op_0c80_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +void REGPARAM2 op_0c90_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +void REGPARAM2 op_0c98_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +void REGPARAM2 op_0ca0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +void REGPARAM2 op_0ca8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0cb0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +void REGPARAM2 op_0cb8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +void REGPARAM2 op_0cb9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cbb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(4); + } else { + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(4); + } else { + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(4); + } else { + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(6); + } else { + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(0); + } else { + regs.irc = get_word_ce030_prefetch_opcode(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(6); + } else { + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s16 dst = x_get_word(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(8); + } else { + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cfc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_long_ce030_prefetch(2); + /* OP zero */ + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = x_get_word(rn1), dst2 = x_get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e10_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e18_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e20_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e28_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(6); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e30_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e38_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(6); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e39_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(8); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_ce030_prefetch(4); + uae_s8 src = sfc_nommu_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e50_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e58_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e60_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e68_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(6); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e70_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e78_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(6); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e79_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(8); + dfc_nommu_put_word(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_ce030_prefetch(4); + uae_s16 src = sfc_nommu_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e90_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e98_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(4); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(6); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(6); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + regs.irc = get_word_ce030_prefetch_opcode(8); + dfc_nommu_put_long(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_long_ce030_prefetch(4); + uae_s32 src = sfc_nommu_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + regs.irc = get_word_ce030_prefetch_opcode(0); + } + return; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(4); + } else { + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(4); + } else { + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(4); + } else { + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(6); + } else { + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(0); + } else { + regs.irc = get_word_ce030_prefetch_opcode(0); + m68k_dreg(regs, rc) = dst; + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(6); + } else { + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_word_ce030_prefetch_opcode(8); + } else { + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0efc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_long_ce030_prefetch(2); + /* OP zero */ + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = x_get_long(rn1), dst2 = x_get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +void REGPARAM2 op_1000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +void REGPARAM2 op_1010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +void REGPARAM2 op_1018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +void REGPARAM2 op_1020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +void REGPARAM2 op_1028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +void REGPARAM2 op_1030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +void REGPARAM2 op_1038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +void REGPARAM2 op_1039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +void REGPARAM2 op_103a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_103b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +void REGPARAM2 op_103c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +void REGPARAM2 op_1080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +void REGPARAM2 op_1090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +void REGPARAM2 op_1098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +void REGPARAM2 op_10a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +void REGPARAM2 op_10a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +void REGPARAM2 op_10b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +void REGPARAM2 op_10b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +void REGPARAM2 op_10b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +void REGPARAM2 op_10ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +void REGPARAM2 op_10bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +void REGPARAM2 op_10bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +void REGPARAM2 op_10c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +void REGPARAM2 op_10d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +void REGPARAM2 op_10d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +void REGPARAM2 op_10e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +void REGPARAM2 op_10e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +void REGPARAM2 op_10f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +void REGPARAM2 op_10f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +void REGPARAM2 op_10f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +void REGPARAM2 op_10fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_10fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +void REGPARAM2 op_10fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +void REGPARAM2 op_1100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +void REGPARAM2 op_1110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +void REGPARAM2 op_1118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +void REGPARAM2 op_1120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +void REGPARAM2 op_1128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +void REGPARAM2 op_1130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +void REGPARAM2 op_1138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +void REGPARAM2 op_1139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +void REGPARAM2 op_113a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +void REGPARAM2 op_113b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +void REGPARAM2 op_113c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +void REGPARAM2 op_1140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +void REGPARAM2 op_1150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +void REGPARAM2 op_1158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +void REGPARAM2 op_1160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +void REGPARAM2 op_1168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_1170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +void REGPARAM2 op_1178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +void REGPARAM2 op_1179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +void REGPARAM2 op_117a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_117b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +void REGPARAM2 op_117c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_1180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +void REGPARAM2 op_1190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +void REGPARAM2 op_1198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +void REGPARAM2 op_11a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_11a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_11b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_11b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_11ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_11bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +void REGPARAM2 op_11c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +void REGPARAM2 op_11d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +void REGPARAM2 op_11d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +void REGPARAM2 op_11e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +void REGPARAM2 op_11e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_11f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +void REGPARAM2 op_11f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +void REGPARAM2 op_11f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +void REGPARAM2 op_11fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_11fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +void REGPARAM2 op_11fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +void REGPARAM2 op_13c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +void REGPARAM2 op_13d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +void REGPARAM2 op_13d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +void REGPARAM2 op_13e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +void REGPARAM2 op_13e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_13f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +void REGPARAM2 op_13f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +void REGPARAM2 op_13f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +void REGPARAM2 op_13fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_13fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +void REGPARAM2 op_13fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +void REGPARAM2 op_2000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +void REGPARAM2 op_2008_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +void REGPARAM2 op_2010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +void REGPARAM2 op_2018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +void REGPARAM2 op_2020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +void REGPARAM2 op_2028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +void REGPARAM2 op_2030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +void REGPARAM2 op_2038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +void REGPARAM2 op_2039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +void REGPARAM2 op_203a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_203b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +void REGPARAM2 op_203c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +void REGPARAM2 op_2040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +void REGPARAM2 op_2048_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +void REGPARAM2 op_2050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +void REGPARAM2 op_2058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +void REGPARAM2 op_2060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +void REGPARAM2 op_2068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +void REGPARAM2 op_2070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +void REGPARAM2 op_2078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +void REGPARAM2 op_2079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +void REGPARAM2 op_207a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_207b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +void REGPARAM2 op_207c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +void REGPARAM2 op_2080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +void REGPARAM2 op_2088_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +void REGPARAM2 op_2090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +void REGPARAM2 op_2098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +void REGPARAM2 op_20a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +void REGPARAM2 op_20a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +void REGPARAM2 op_20b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +void REGPARAM2 op_20b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +void REGPARAM2 op_20b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +void REGPARAM2 op_20ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +void REGPARAM2 op_20bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +void REGPARAM2 op_20bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +void REGPARAM2 op_20c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +void REGPARAM2 op_20c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +void REGPARAM2 op_20d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +void REGPARAM2 op_20d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +void REGPARAM2 op_20e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +void REGPARAM2 op_20e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +void REGPARAM2 op_20f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +void REGPARAM2 op_20f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +void REGPARAM2 op_20f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +void REGPARAM2 op_20fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_20fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +void REGPARAM2 op_20fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +void REGPARAM2 op_2100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +void REGPARAM2 op_2108_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +void REGPARAM2 op_2110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +void REGPARAM2 op_2118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +void REGPARAM2 op_2120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +void REGPARAM2 op_2128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +void REGPARAM2 op_2130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +void REGPARAM2 op_2138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +void REGPARAM2 op_2139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +void REGPARAM2 op_213a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +void REGPARAM2 op_213b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +void REGPARAM2 op_213c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +void REGPARAM2 op_2140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +void REGPARAM2 op_2148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +void REGPARAM2 op_2150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +void REGPARAM2 op_2158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +void REGPARAM2 op_2160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +void REGPARAM2 op_2168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_2170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +void REGPARAM2 op_2178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +void REGPARAM2 op_2179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +void REGPARAM2 op_217a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_217b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +void REGPARAM2 op_217c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_2180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +void REGPARAM2 op_2188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +void REGPARAM2 op_2190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +void REGPARAM2 op_2198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +void REGPARAM2 op_21a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_21a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_21b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_21b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_21ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_21bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +void REGPARAM2 op_21c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +void REGPARAM2 op_21c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +void REGPARAM2 op_21d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +void REGPARAM2 op_21d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +void REGPARAM2 op_21e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +void REGPARAM2 op_21e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_21f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +void REGPARAM2 op_21f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +void REGPARAM2 op_21f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +void REGPARAM2 op_21fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_21fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +void REGPARAM2 op_21fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +void REGPARAM2 op_23c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +void REGPARAM2 op_23c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +void REGPARAM2 op_23d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +void REGPARAM2 op_23d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +void REGPARAM2 op_23e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +void REGPARAM2 op_23e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_23f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +void REGPARAM2 op_23f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +void REGPARAM2 op_23f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +void REGPARAM2 op_23fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_23fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +void REGPARAM2 op_23fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +void REGPARAM2 op_3000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +void REGPARAM2 op_3008_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +void REGPARAM2 op_3010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +void REGPARAM2 op_3018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +void REGPARAM2 op_3020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +void REGPARAM2 op_3028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +void REGPARAM2 op_3030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +void REGPARAM2 op_3038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +void REGPARAM2 op_3039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +void REGPARAM2 op_303a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_303b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +void REGPARAM2 op_303c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +void REGPARAM2 op_3040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +void REGPARAM2 op_3048_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + src = (uae_s32)(uae_s16)src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +void REGPARAM2 op_3050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +void REGPARAM2 op_3058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +void REGPARAM2 op_3060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +void REGPARAM2 op_3068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +void REGPARAM2 op_3070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +void REGPARAM2 op_3078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +void REGPARAM2 op_3079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +void REGPARAM2 op_307a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +void REGPARAM2 op_307b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +void REGPARAM2 op_307c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +void REGPARAM2 op_3080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +void REGPARAM2 op_3088_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +void REGPARAM2 op_3090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +void REGPARAM2 op_3098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +void REGPARAM2 op_30a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +void REGPARAM2 op_30a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +void REGPARAM2 op_30b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +void REGPARAM2 op_30b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +void REGPARAM2 op_30b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +void REGPARAM2 op_30ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +void REGPARAM2 op_30bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +void REGPARAM2 op_30bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +void REGPARAM2 op_30c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +void REGPARAM2 op_30c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +void REGPARAM2 op_30d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +void REGPARAM2 op_30d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +void REGPARAM2 op_30e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +void REGPARAM2 op_30e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +void REGPARAM2 op_30f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +void REGPARAM2 op_30f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +void REGPARAM2 op_30f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +void REGPARAM2 op_30fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_30fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +void REGPARAM2 op_30fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +void REGPARAM2 op_3100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +void REGPARAM2 op_3108_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +void REGPARAM2 op_3110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +void REGPARAM2 op_3118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +void REGPARAM2 op_3120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +void REGPARAM2 op_3128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +void REGPARAM2 op_3130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +void REGPARAM2 op_3138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +void REGPARAM2 op_3139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +void REGPARAM2 op_313a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +void REGPARAM2 op_313b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +void REGPARAM2 op_313c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +void REGPARAM2 op_3140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +void REGPARAM2 op_3148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +void REGPARAM2 op_3150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +void REGPARAM2 op_3158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +void REGPARAM2 op_3160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +void REGPARAM2 op_3168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_3170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +void REGPARAM2 op_3178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +void REGPARAM2 op_3179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +void REGPARAM2 op_317a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_317b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +void REGPARAM2 op_317c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_3180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +void REGPARAM2 op_3188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +void REGPARAM2 op_3190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +void REGPARAM2 op_3198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +void REGPARAM2 op_31a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_31a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_31b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_31b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_31ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_31bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +void REGPARAM2 op_31c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +void REGPARAM2 op_31c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +void REGPARAM2 op_31d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +void REGPARAM2 op_31d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +void REGPARAM2 op_31e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +void REGPARAM2 op_31e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_31f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +void REGPARAM2 op_31f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +void REGPARAM2 op_31f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +void REGPARAM2 op_31fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_31fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +void REGPARAM2 op_31fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +void REGPARAM2 op_33c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +void REGPARAM2 op_33c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +void REGPARAM2 op_33d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +void REGPARAM2 op_33d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +void REGPARAM2 op_33e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +void REGPARAM2 op_33e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_33f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +void REGPARAM2 op_33f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +void REGPARAM2 op_33f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(6); + regs.irc = get_word_ce030_prefetch_opcode(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +void REGPARAM2 op_33fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_33fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_long_ce030_prefetch(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +void REGPARAM2 op_33fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_word_ce030_prefetch(2); + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + regs.irc = get_word_ce030_prefetch_opcode(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +void REGPARAM2 op_4000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +void REGPARAM2 op_4010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +void REGPARAM2 op_4018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +void REGPARAM2 op_4020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +void REGPARAM2 op_4028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +void REGPARAM2 op_4030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +void REGPARAM2 op_4038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +void REGPARAM2 op_4039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +void REGPARAM2 op_4040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +void REGPARAM2 op_4050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +void REGPARAM2 op_4058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +void REGPARAM2 op_4060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +void REGPARAM2 op_4068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +void REGPARAM2 op_4070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +void REGPARAM2 op_4078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +void REGPARAM2 op_4079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +void REGPARAM2 op_4080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +void REGPARAM2 op_4090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +void REGPARAM2 op_4098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +void REGPARAM2 op_40a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +void REGPARAM2 op_40a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +void REGPARAM2 op_40b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +void REGPARAM2 op_40b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +void REGPARAM2 op_40b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +void REGPARAM2 op_40c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* op H:2,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +void REGPARAM2 op_40d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +void REGPARAM2 op_40d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +void REGPARAM2 op_40e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +void REGPARAM2 op_40e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(4); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +void REGPARAM2 op_40f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(0); + x_put_word(srca, regs.sr); + return; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +void REGPARAM2 op_40f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(4); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +void REGPARAM2 op_40f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(6); + x_put_word(srca, regs.sr); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +void REGPARAM2 op_4180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +void REGPARAM2 op_4190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +void REGPARAM2 op_4198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +void REGPARAM2 op_41a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +void REGPARAM2 op_41a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +void REGPARAM2 op_41b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +void REGPARAM2 op_41b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +void REGPARAM2 op_41b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +void REGPARAM2 op_41ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_41bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +void REGPARAM2 op_41bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +void REGPARAM2 op_41d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +void REGPARAM2 op_41e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +void REGPARAM2 op_41f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce030_prefetch_opcode(0); + m68k_areg(regs, dstreg) = (srca); + return; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +void REGPARAM2 op_41f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +void REGPARAM2 op_41f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +void REGPARAM2 op_41fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_41fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_word_ce030_prefetch_opcode(0); + m68k_areg(regs, dstreg) = (srca); + return; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +void REGPARAM2 op_4200_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +void REGPARAM2 op_4210_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +void REGPARAM2 op_4218_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +void REGPARAM2 op_4220_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +void REGPARAM2 op_4228_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +void REGPARAM2 op_4230_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +void REGPARAM2 op_4238_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +void REGPARAM2 op_4239_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +void REGPARAM2 op_4240_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +void REGPARAM2 op_4250_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +void REGPARAM2 op_4258_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +void REGPARAM2 op_4260_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +void REGPARAM2 op_4268_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +void REGPARAM2 op_4270_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +void REGPARAM2 op_4278_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +void REGPARAM2 op_4279_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +void REGPARAM2 op_4280_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +void REGPARAM2 op_4290_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +void REGPARAM2 op_4298_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +void REGPARAM2 op_42a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +void REGPARAM2 op_42a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +void REGPARAM2 op_42b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +void REGPARAM2 op_42b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +void REGPARAM2 op_42b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(4); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(0); + x_put_word(srca, regs.sr & 0xff); + return; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(4); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_word_ce030_prefetch_opcode(6); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +void REGPARAM2 op_4400_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +void REGPARAM2 op_4410_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +void REGPARAM2 op_4418_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +void REGPARAM2 op_4420_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +void REGPARAM2 op_4428_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +void REGPARAM2 op_4430_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +void REGPARAM2 op_4438_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +void REGPARAM2 op_4439_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +void REGPARAM2 op_4440_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +void REGPARAM2 op_4450_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +void REGPARAM2 op_4458_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +void REGPARAM2 op_4460_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +void REGPARAM2 op_4468_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +void REGPARAM2 op_4470_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +void REGPARAM2 op_4478_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +void REGPARAM2 op_4479_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +void REGPARAM2 op_4480_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +void REGPARAM2 op_4490_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +void REGPARAM2 op_4498_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +void REGPARAM2 op_44a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +void REGPARAM2 op_44a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +void REGPARAM2 op_44b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +void REGPARAM2 op_44b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +void REGPARAM2 op_44b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +void REGPARAM2 op_44c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +void REGPARAM2 op_44d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +void REGPARAM2 op_44d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +void REGPARAM2 op_44e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +void REGPARAM2 op_44e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +void REGPARAM2 op_44f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + return; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +void REGPARAM2 op_44f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +void REGPARAM2 op_44f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +void REGPARAM2 op_44fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +void REGPARAM2 op_44fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + return; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +void REGPARAM2 op_44fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +void REGPARAM2 op_4600_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +void REGPARAM2 op_4610_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +void REGPARAM2 op_4618_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +void REGPARAM2 op_4620_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +void REGPARAM2 op_4628_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +void REGPARAM2 op_4630_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +void REGPARAM2 op_4638_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +void REGPARAM2 op_4639_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +void REGPARAM2 op_4640_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +void REGPARAM2 op_4650_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +void REGPARAM2 op_4658_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +void REGPARAM2 op_4660_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +void REGPARAM2 op_4668_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +void REGPARAM2 op_4670_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +void REGPARAM2 op_4678_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +void REGPARAM2 op_4679_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +void REGPARAM2 op_4680_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +void REGPARAM2 op_4690_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +void REGPARAM2 op_4698_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +void REGPARAM2 op_46a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +void REGPARAM2 op_46a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +void REGPARAM2 op_46b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +void REGPARAM2 op_46b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +void REGPARAM2 op_46b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +void REGPARAM2 op_46c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +void REGPARAM2 op_46d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +void REGPARAM2 op_46d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +void REGPARAM2 op_46e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +void REGPARAM2 op_46e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +void REGPARAM2 op_46f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + fill_prefetch_030_ntx(); + return; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +void REGPARAM2 op_46f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +void REGPARAM2 op_46f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(6); + fill_prefetch_030_ntx(); + return; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +void REGPARAM2 op_46fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +void REGPARAM2 op_46fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + fill_prefetch_030_ntx(); + return; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +void REGPARAM2 op_46fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +void REGPARAM2 op_4800_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4808_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 offs; + offs = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +void REGPARAM2 op_4810_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +void REGPARAM2 op_4818_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +void REGPARAM2 op_4820_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +void REGPARAM2 op_4828_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +void REGPARAM2 op_4830_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(0); + x_put_byte(srca, newv); + return; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +void REGPARAM2 op_4838_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +void REGPARAM2 op_4839_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(6); + x_put_byte(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +void REGPARAM2 op_4840_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4848_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +void REGPARAM2 op_4850_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +void REGPARAM2 op_4868_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +void REGPARAM2 op_4870_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + return; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +void REGPARAM2 op_4878_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +void REGPARAM2 op_4879_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +void REGPARAM2 op_487a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +void REGPARAM2 op_487b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + return; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +void REGPARAM2 op_4880_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +void REGPARAM2 op_4890_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +void REGPARAM2 op_48a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + x_put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +void REGPARAM2 op_48a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_48b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +void REGPARAM2 op_48b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +void REGPARAM2 op_48b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = get_long_ce030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +void REGPARAM2 op_48c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +void REGPARAM2 op_48d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +void REGPARAM2 op_48e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + x_put_long(srca, m68k_areg(regs, movem_index2[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + } else { + x_put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + count_cycles += 4 * CYCLE_UNIT / 2; + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + x_put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +void REGPARAM2 op_48e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_48f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +void REGPARAM2 op_48f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +void REGPARAM2 op_48f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce030_prefetch(2); + uaecptr srca; + srca = get_long_ce030_prefetch(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_49c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +void REGPARAM2 op_4a00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (An) */ +void REGPARAM2 op_4a10_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +void REGPARAM2 op_4a18_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +void REGPARAM2 op_4a20_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +void REGPARAM2 op_4a28_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +void REGPARAM2 op_4a30_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +void REGPARAM2 op_4a38_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +void REGPARAM2 op_4a39_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +void REGPARAM2 op_4a40_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a48_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +void REGPARAM2 op_4a50_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +void REGPARAM2 op_4a58_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +void REGPARAM2 op_4a60_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +void REGPARAM2 op_4a68_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +void REGPARAM2 op_4a70_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +void REGPARAM2 op_4a78_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +void REGPARAM2 op_4a79_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +void REGPARAM2 op_4a80_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a88_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +void REGPARAM2 op_4a90_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +void REGPARAM2 op_4a98_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +void REGPARAM2 op_4aa0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +void REGPARAM2 op_4aa8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +void REGPARAM2 op_4ab0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +void REGPARAM2 op_4ab8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +void REGPARAM2 op_4ab9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4aba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4abb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4abc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +void REGPARAM2 op_4ac0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +void REGPARAM2 op_4ad0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +void REGPARAM2 op_4ad8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +void REGPARAM2 op_4ae0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +void REGPARAM2 op_4ae8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +void REGPARAM2 op_4af0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +void REGPARAM2 op_4af8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +void REGPARAM2 op_4af9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c10_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c18_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c20_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c28_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c30_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c38_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c39_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + /* op H:2,T:0,C:28 */ + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:28 */ + uae_s32 dst; + dst = get_long_ce030_prefetch(4); + /* op H:2,T:0,C:28 */ + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c40_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c50_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c58_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c60_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c68_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c70_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c78_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c79_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + /* op H:0,T:0,C:50 */ + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:50 */ + uae_s32 dst; + dst = get_long_ce030_prefetch(4); + /* op H:0,T:0,C:50 */ + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +void REGPARAM2 op_4c90_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +void REGPARAM2 op_4c98_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +void REGPARAM2 op_4ca8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cb0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +void REGPARAM2 op_4cb8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +void REGPARAM2 op_4cb9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_long_ce030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +void REGPARAM2 op_4cba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cbb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 2; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +void REGPARAM2 op_4cd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +void REGPARAM2 op_4cd8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +void REGPARAM2 op_4ce8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cf0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +void REGPARAM2 op_4cf8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +void REGPARAM2 op_4cf9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_long_ce030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +void REGPARAM2 op_4cfa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cfb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_word_ce030_prefetch(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + count_cycles += 4 * CYCLE_UNIT / 2; + srca += 4; + amask = movem_next[amask]; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +void REGPARAM2 op_4e40_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + /* OP zero */ + m68k_incpci(2); + Exception_cpu(src + 32); + return; + return; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +void REGPARAM2 op_4e50_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* UNLK.L An */ +void REGPARAM2 op_4e58_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + /* OP zero */ + uae_u32 olda = src; + uae_s32 old = x_get_long(olda); + m68k_areg(regs, 7) = src + 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, srcreg) = (old); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +void REGPARAM2 op_4e60_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s32 src = m68k_areg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + regs.usp = src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +void REGPARAM2 op_4e68_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* op H:4,T:0,C:-4 */ + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RESET.L */ +void REGPARAM2 op_4e70_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + bool r = cpureset(); + if (r) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOP.L */ +void REGPARAM2 op_4e71_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +void REGPARAM2 op_4e72_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + if (!regs.stopped) { + uae_s16 src = get_word_ce030_prefetch(2); + /* op H:0,T:0,C:8 */ + regs.ir = src; + } + uae_u16 sr = regs.ir; + ipl_fetch_next(); + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return; +} + +/* RTE.L */ +void REGPARAM2 op_4e73_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* op H:1,T:9,C:8 */ + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + regs.t1 = regs.t0 = 0; + Exception_cpu(14); + return; + } + regs.sr = newsr; + oldsr = newsr; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + } + regs.sr = newsr; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_setpci_j(newpc); + branch_stack_pop_rte(oldpc); + fill_prefetch_030_ntx(); + return; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e74_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + /* op H:2,T:0,C:8 */ + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:8 */ + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return; + } + m68k_setpci_j(pc); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +void REGPARAM2 op_4e75_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* op H:1,T:0,C:8 */ + uaecptr oldpc = m68k_getpci(); + m68k_do_rts_ce030(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +void REGPARAM2 op_4e76_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* RTR.L */ +void REGPARAM2 op_4e77_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + intlev_load(); + m68k_setpci_j(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce030_prefetch(2); + /* op H:6,T:0,C:-6 */ + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_word_ce030_prefetch(2); + /* op H:6,T:0,C:-6 */ + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +void REGPARAM2 op_4e90_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +void REGPARAM2 op_4ea8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +void REGPARAM2 op_4eb0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +void REGPARAM2 op_4eb8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 jea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +void REGPARAM2 op_4eb9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 jea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +void REGPARAM2 op_4eba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +void REGPARAM2 op_4ebb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +void REGPARAM2 op_4ed0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+4=6,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +void REGPARAM2 op_4ee8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4+4=8,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +void REGPARAM2 op_4ef0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + /* op H:4,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +void REGPARAM2 op_4ef8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2+4=6,T:0,C:0 jea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +void REGPARAM2 op_4ef9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2+4=6,T:0,C:0 jea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +void REGPARAM2 op_4efa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4+4=8,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +void REGPARAM2 op_4efb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + /* op H:4,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + fill_prefetch_030(); + return; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +void REGPARAM2 op_5000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +void REGPARAM2 op_5010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +void REGPARAM2 op_5018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +void REGPARAM2 op_5020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +void REGPARAM2 op_5028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +void REGPARAM2 op_5038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +void REGPARAM2 op_5039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +void REGPARAM2 op_5040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +void REGPARAM2 op_5048_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +void REGPARAM2 op_5050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +void REGPARAM2 op_5058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +void REGPARAM2 op_5060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +void REGPARAM2 op_5068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +void REGPARAM2 op_5078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +void REGPARAM2 op_5079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +void REGPARAM2 op_5080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +void REGPARAM2 op_5088_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +void REGPARAM2 op_5090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +void REGPARAM2 op_5098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +void REGPARAM2 op_50a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +void REGPARAM2 op_50a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_50b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +void REGPARAM2 op_50b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +void REGPARAM2 op_50b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +void REGPARAM2 op_50c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +void REGPARAM2 op_50c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +void REGPARAM2 op_50d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +void REGPARAM2 op_50d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +void REGPARAM2 op_50e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +void REGPARAM2 op_50e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +void REGPARAM2 op_50f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +void REGPARAM2 op_50f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +void REGPARAM2 op_50f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +void REGPARAM2 op_5100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +void REGPARAM2 op_5110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +void REGPARAM2 op_5118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +void REGPARAM2 op_5120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +void REGPARAM2 op_5128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +void REGPARAM2 op_5138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +void REGPARAM2 op_5139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +void REGPARAM2 op_5140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +void REGPARAM2 op_5148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +void REGPARAM2 op_5150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +void REGPARAM2 op_5158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +void REGPARAM2 op_5160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +void REGPARAM2 op_5168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +void REGPARAM2 op_5178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +void REGPARAM2 op_5179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +void REGPARAM2 op_5180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +void REGPARAM2 op_5188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +void REGPARAM2 op_5190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +void REGPARAM2 op_5198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +void REGPARAM2 op_51a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +void REGPARAM2 op_51a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_51b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +void REGPARAM2 op_51b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +void REGPARAM2 op_51b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +void REGPARAM2 op_51c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +void REGPARAM2 op_51c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +void REGPARAM2 op_51d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +void REGPARAM2 op_51d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +void REGPARAM2 op_51e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +void REGPARAM2 op_51e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +void REGPARAM2 op_51f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +void REGPARAM2 op_51f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +void REGPARAM2 op_51f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +void REGPARAM2 op_52c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +void REGPARAM2 op_52c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +void REGPARAM2 op_52d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +void REGPARAM2 op_52d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +void REGPARAM2 op_52e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +void REGPARAM2 op_52e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +void REGPARAM2 op_52f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +void REGPARAM2 op_52f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +void REGPARAM2 op_52f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +void REGPARAM2 op_53c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +void REGPARAM2 op_53c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +void REGPARAM2 op_53d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +void REGPARAM2 op_53d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +void REGPARAM2 op_53e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +void REGPARAM2 op_53e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +void REGPARAM2 op_53f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +void REGPARAM2 op_53f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +void REGPARAM2 op_53f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +void REGPARAM2 op_54c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +void REGPARAM2 op_54c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +void REGPARAM2 op_54d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +void REGPARAM2 op_54d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +void REGPARAM2 op_54e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +void REGPARAM2 op_54e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +void REGPARAM2 op_54f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +void REGPARAM2 op_54f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +void REGPARAM2 op_54f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +void REGPARAM2 op_55c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +void REGPARAM2 op_55c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +void REGPARAM2 op_55d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +void REGPARAM2 op_55d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +void REGPARAM2 op_55e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +void REGPARAM2 op_55e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +void REGPARAM2 op_55f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +void REGPARAM2 op_55f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +void REGPARAM2 op_55f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +void REGPARAM2 op_56c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +void REGPARAM2 op_56c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +void REGPARAM2 op_56d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +void REGPARAM2 op_56d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +void REGPARAM2 op_56e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +void REGPARAM2 op_56e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +void REGPARAM2 op_56f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +void REGPARAM2 op_56f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +void REGPARAM2 op_56f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +void REGPARAM2 op_57c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +void REGPARAM2 op_57c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +void REGPARAM2 op_57d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +void REGPARAM2 op_57d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +void REGPARAM2 op_57e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +void REGPARAM2 op_57e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +void REGPARAM2 op_57f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +void REGPARAM2 op_57f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +void REGPARAM2 op_57f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +void REGPARAM2 op_58c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +void REGPARAM2 op_58c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +void REGPARAM2 op_58d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +void REGPARAM2 op_58d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +void REGPARAM2 op_58e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +void REGPARAM2 op_58e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +void REGPARAM2 op_58f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +void REGPARAM2 op_58f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +void REGPARAM2 op_58f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +void REGPARAM2 op_59c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +void REGPARAM2 op_59c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +void REGPARAM2 op_59d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +void REGPARAM2 op_59d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +void REGPARAM2 op_59e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +void REGPARAM2 op_59e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +void REGPARAM2 op_59f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +void REGPARAM2 op_59f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +void REGPARAM2 op_59f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +void REGPARAM2 op_5ac0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +void REGPARAM2 op_5ac8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +void REGPARAM2 op_5ad0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +void REGPARAM2 op_5ad8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +void REGPARAM2 op_5ae0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +void REGPARAM2 op_5ae8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +void REGPARAM2 op_5af0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +void REGPARAM2 op_5af8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +void REGPARAM2 op_5af9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +void REGPARAM2 op_5bc0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +void REGPARAM2 op_5bc8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +void REGPARAM2 op_5bd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +void REGPARAM2 op_5bd8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +void REGPARAM2 op_5be0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +void REGPARAM2 op_5be8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +void REGPARAM2 op_5bf0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +void REGPARAM2 op_5bf8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +void REGPARAM2 op_5bf9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +void REGPARAM2 op_5cc0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +void REGPARAM2 op_5cc8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +void REGPARAM2 op_5cd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +void REGPARAM2 op_5cd8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +void REGPARAM2 op_5ce0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +void REGPARAM2 op_5ce8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +void REGPARAM2 op_5cf0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +void REGPARAM2 op_5cf8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +void REGPARAM2 op_5cf9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +void REGPARAM2 op_5dc0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +void REGPARAM2 op_5dc8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +void REGPARAM2 op_5dd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +void REGPARAM2 op_5dd8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +void REGPARAM2 op_5de0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +void REGPARAM2 op_5de8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +void REGPARAM2 op_5df0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +void REGPARAM2 op_5df8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +void REGPARAM2 op_5df9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +void REGPARAM2 op_5ec0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +void REGPARAM2 op_5ec8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +void REGPARAM2 op_5ed0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +void REGPARAM2 op_5ed8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +void REGPARAM2 op_5ee0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +void REGPARAM2 op_5ee8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +void REGPARAM2 op_5ef0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +void REGPARAM2 op_5ef8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +void REGPARAM2 op_5ef9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +void REGPARAM2 op_5fc0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +void REGPARAM2 op_5fc8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +void REGPARAM2 op_5fd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +void REGPARAM2 op_5fd8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +void REGPARAM2 op_5fe0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +void REGPARAM2 op_5fe8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +void REGPARAM2 op_5ff0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +void REGPARAM2 op_5ff8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +void REGPARAM2 op_5ff9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_long_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +void REGPARAM2 op_6000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +void REGPARAM2 op_6001_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +void REGPARAM2 op_60ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +void REGPARAM2 op_6100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_word_ce030_prefetch(2); + /* op H:2,T:0,C:-2 */ + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsr_ce030(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +void REGPARAM2 op_6101_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + /* op H:2,T:0,C:-2 */ + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsr_ce030(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +void REGPARAM2 op_61ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* op H:2,T:0,C:-2 */ + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsr_ce030(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +void REGPARAM2 op_6200_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +void REGPARAM2 op_6201_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +void REGPARAM2 op_62ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +void REGPARAM2 op_6300_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +void REGPARAM2 op_6301_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +void REGPARAM2 op_63ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +void REGPARAM2 op_6400_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +void REGPARAM2 op_6401_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +void REGPARAM2 op_64ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +void REGPARAM2 op_6500_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +void REGPARAM2 op_6501_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +void REGPARAM2 op_65ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +void REGPARAM2 op_6600_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +void REGPARAM2 op_6601_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +void REGPARAM2 op_66ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +void REGPARAM2 op_6700_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +void REGPARAM2 op_6701_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +void REGPARAM2 op_67ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +void REGPARAM2 op_6800_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +void REGPARAM2 op_6801_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +void REGPARAM2 op_68ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +void REGPARAM2 op_6900_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +void REGPARAM2 op_6901_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +void REGPARAM2 op_69ff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +void REGPARAM2 op_6a00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +void REGPARAM2 op_6a01_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +void REGPARAM2 op_6aff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +void REGPARAM2 op_6b00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +void REGPARAM2 op_6b01_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +void REGPARAM2 op_6bff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +void REGPARAM2 op_6c00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +void REGPARAM2 op_6c01_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +void REGPARAM2 op_6cff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +void REGPARAM2 op_6d00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +void REGPARAM2 op_6d01_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +void REGPARAM2 op_6dff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +void REGPARAM2 op_6e00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +void REGPARAM2 op_6e01_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +void REGPARAM2 op_6eff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +void REGPARAM2 op_6f00_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_word_ce030_prefetch(2); + /* OP zero */ + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +void REGPARAM2 op_6f01_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +void REGPARAM2 op_6fff_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_long_ce030_prefetch(2); + /* OP zero */ + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +void REGPARAM2 op_7000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +void REGPARAM2 op_8000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +void REGPARAM2 op_8010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +void REGPARAM2 op_8018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +void REGPARAM2 op_8020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +void REGPARAM2 op_8028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +void REGPARAM2 op_8030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +void REGPARAM2 op_8038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +void REGPARAM2 op_8039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +void REGPARAM2 op_803a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_803b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +void REGPARAM2 op_803c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +void REGPARAM2 op_8040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +void REGPARAM2 op_8050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +void REGPARAM2 op_8058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +void REGPARAM2 op_8060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +void REGPARAM2 op_8068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +void REGPARAM2 op_8070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +void REGPARAM2 op_8078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +void REGPARAM2 op_8079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +void REGPARAM2 op_807a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_807b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_807c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +void REGPARAM2 op_8080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +void REGPARAM2 op_8090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +void REGPARAM2 op_8098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +void REGPARAM2 op_80a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +void REGPARAM2 op_80a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +void REGPARAM2 op_80b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +void REGPARAM2 op_80b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +void REGPARAM2 op_80b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +void REGPARAM2 op_80ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_80bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_80bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +void REGPARAM2 op_80c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:18 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +void REGPARAM2 op_80d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +void REGPARAM2 op_80d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +void REGPARAM2 op_80e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +void REGPARAM2 op_80e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_80f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + do_cycles_020_internal(34); + return; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +void REGPARAM2 op_80f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +void REGPARAM2 op_80f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + do_cycles_020_internal(34); + return; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +void REGPARAM2 op_80fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_80fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + do_cycles_020_internal(34); + return; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +void REGPARAM2 op_80fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +void REGPARAM2 op_8100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +void REGPARAM2 op_8108_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:10 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:10 */ + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +void REGPARAM2 op_8110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +void REGPARAM2 op_8118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +void REGPARAM2 op_8120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +void REGPARAM2 op_8128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_8130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +void REGPARAM2 op_8138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +void REGPARAM2 op_8139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_word_ce030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(x_get_word(m68k_areg(regs, srcreg))); + val += get_word_ce030_prefetch(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + x_put_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +void REGPARAM2 op_8150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +void REGPARAM2 op_8158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +void REGPARAM2 op_8160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +void REGPARAM2 op_8168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_8170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +void REGPARAM2 op_8178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +void REGPARAM2 op_8179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_word_ce030_prefetch(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(x_get_byte(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_word_ce030_prefetch(2); + m68k_areg(regs, dstreg) -= 2; + x_put_word(m68k_areg(regs, dstreg), val); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +void REGPARAM2 op_8190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +void REGPARAM2 op_8198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +void REGPARAM2 op_81a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +void REGPARAM2 op_81a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_81b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +void REGPARAM2 op_81b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +void REGPARAM2 op_81b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +void REGPARAM2 op_81c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:18 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +void REGPARAM2 op_81d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +void REGPARAM2 op_81d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +void REGPARAM2 op_81e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +void REGPARAM2 op_81e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_81f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + do_cycles_020_internal(48); + return; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +void REGPARAM2 op_81f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +void REGPARAM2 op_81f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + do_cycles_020_internal(48); + return; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +void REGPARAM2 op_81fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_81fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + do_cycles_020_internal(48); + return; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +void REGPARAM2 op_81fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +void REGPARAM2 op_9000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +void REGPARAM2 op_9010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +void REGPARAM2 op_9018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +void REGPARAM2 op_9020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +void REGPARAM2 op_9028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +void REGPARAM2 op_9030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +void REGPARAM2 op_9038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +void REGPARAM2 op_9039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +void REGPARAM2 op_903a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_903b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +void REGPARAM2 op_903c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +void REGPARAM2 op_9040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +void REGPARAM2 op_9048_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +void REGPARAM2 op_9050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +void REGPARAM2 op_9058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +void REGPARAM2 op_9060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +void REGPARAM2 op_9068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +void REGPARAM2 op_9070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +void REGPARAM2 op_9078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +void REGPARAM2 op_9079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +void REGPARAM2 op_907a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_907b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_907c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +void REGPARAM2 op_9080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +void REGPARAM2 op_9088_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +void REGPARAM2 op_9090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +void REGPARAM2 op_9098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +void REGPARAM2 op_90a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +void REGPARAM2 op_90a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +void REGPARAM2 op_90b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +void REGPARAM2 op_90b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +void REGPARAM2 op_90b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +void REGPARAM2 op_90ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_90bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_90bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +void REGPARAM2 op_90c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +void REGPARAM2 op_90c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +void REGPARAM2 op_90d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +void REGPARAM2 op_90d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +void REGPARAM2 op_90e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +void REGPARAM2 op_90e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +void REGPARAM2 op_90f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +void REGPARAM2 op_90f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +void REGPARAM2 op_90f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +void REGPARAM2 op_90fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +void REGPARAM2 op_90fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +void REGPARAM2 op_90fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +void REGPARAM2 op_9100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +void REGPARAM2 op_9108_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +void REGPARAM2 op_9110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +void REGPARAM2 op_9118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +void REGPARAM2 op_9120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +void REGPARAM2 op_9128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_9130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +void REGPARAM2 op_9138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +void REGPARAM2 op_9139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +void REGPARAM2 op_9140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +void REGPARAM2 op_9148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +void REGPARAM2 op_9150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +void REGPARAM2 op_9158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +void REGPARAM2 op_9160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +void REGPARAM2 op_9168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_9170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +void REGPARAM2 op_9178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +void REGPARAM2 op_9179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +void REGPARAM2 op_9180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +void REGPARAM2 op_9188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +void REGPARAM2 op_9190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +void REGPARAM2 op_9198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +void REGPARAM2 op_91a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +void REGPARAM2 op_91a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_91b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +void REGPARAM2 op_91b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +void REGPARAM2 op_91b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +void REGPARAM2 op_91c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +void REGPARAM2 op_91c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +void REGPARAM2 op_91d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +void REGPARAM2 op_91d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +void REGPARAM2 op_91e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +void REGPARAM2 op_91e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +void REGPARAM2 op_91f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +void REGPARAM2 op_91f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +void REGPARAM2 op_91f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +void REGPARAM2 op_91fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +void REGPARAM2 op_91fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +void REGPARAM2 op_91fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +void REGPARAM2 op_b000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +void REGPARAM2 op_b010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +void REGPARAM2 op_b018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +void REGPARAM2 op_b020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +void REGPARAM2 op_b028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +void REGPARAM2 op_b030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +void REGPARAM2 op_b038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +void REGPARAM2 op_b039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +void REGPARAM2 op_b03a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_b03b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +void REGPARAM2 op_b03c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +void REGPARAM2 op_b040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +void REGPARAM2 op_b048_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +void REGPARAM2 op_b050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +void REGPARAM2 op_b058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +void REGPARAM2 op_b060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +void REGPARAM2 op_b068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +void REGPARAM2 op_b070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +void REGPARAM2 op_b078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +void REGPARAM2 op_b079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +void REGPARAM2 op_b07a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_b07b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +void REGPARAM2 op_b07c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +void REGPARAM2 op_b080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +void REGPARAM2 op_b088_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +void REGPARAM2 op_b090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +void REGPARAM2 op_b098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +void REGPARAM2 op_b0a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +void REGPARAM2 op_b0a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +void REGPARAM2 op_b0b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +void REGPARAM2 op_b0b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +void REGPARAM2 op_b0b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +void REGPARAM2 op_b0ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_b0bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +void REGPARAM2 op_b0bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +void REGPARAM2 op_b0c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +void REGPARAM2 op_b0c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +void REGPARAM2 op_b0d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +void REGPARAM2 op_b0d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +void REGPARAM2 op_b0e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +void REGPARAM2 op_b0e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +void REGPARAM2 op_b0f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +void REGPARAM2 op_b0f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +void REGPARAM2 op_b0f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +void REGPARAM2 op_b0fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +void REGPARAM2 op_b0fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +void REGPARAM2 op_b0fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +void REGPARAM2 op_b100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +void REGPARAM2 op_b108_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* op H:0,T:0,C:8 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +void REGPARAM2 op_b110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +void REGPARAM2 op_b118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +void REGPARAM2 op_b120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +void REGPARAM2 op_b128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_b130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +void REGPARAM2 op_b138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +void REGPARAM2 op_b139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +void REGPARAM2 op_b140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +void REGPARAM2 op_b148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + /* op H:0,T:0,C:8 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +void REGPARAM2 op_b150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +void REGPARAM2 op_b158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +void REGPARAM2 op_b160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +void REGPARAM2 op_b168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_b170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +void REGPARAM2 op_b178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +void REGPARAM2 op_b179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +void REGPARAM2 op_b180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +void REGPARAM2 op_b188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:0,C:8 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +void REGPARAM2 op_b190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +void REGPARAM2 op_b198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +void REGPARAM2 op_b1a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +void REGPARAM2 op_b1a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_b1b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +void REGPARAM2 op_b1b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +void REGPARAM2 op_b1b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +void REGPARAM2 op_b1c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +void REGPARAM2 op_b1c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +void REGPARAM2 op_b1d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +void REGPARAM2 op_b1d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +void REGPARAM2 op_b1e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +void REGPARAM2 op_b1e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +void REGPARAM2 op_b1f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +void REGPARAM2 op_b1f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +void REGPARAM2 op_b1f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +void REGPARAM2 op_b1fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +void REGPARAM2 op_b1fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +void REGPARAM2 op_b1fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +void REGPARAM2 op_c000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +void REGPARAM2 op_c010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +void REGPARAM2 op_c018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +void REGPARAM2 op_c020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +void REGPARAM2 op_c028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +void REGPARAM2 op_c030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +void REGPARAM2 op_c038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +void REGPARAM2 op_c039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +void REGPARAM2 op_c03a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_c03b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_c03c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +void REGPARAM2 op_c040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +void REGPARAM2 op_c050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +void REGPARAM2 op_c058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +void REGPARAM2 op_c060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +void REGPARAM2 op_c068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +void REGPARAM2 op_c078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +void REGPARAM2 op_c079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +void REGPARAM2 op_c07a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c07b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_c07c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +void REGPARAM2 op_c080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +void REGPARAM2 op_c090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +void REGPARAM2 op_c098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +void REGPARAM2 op_c0a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +void REGPARAM2 op_c0a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +void REGPARAM2 op_c0b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +void REGPARAM2 op_c0b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +void REGPARAM2 op_c0b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +void REGPARAM2 op_c0ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_c0bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +void REGPARAM2 op_c0c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +void REGPARAM2 op_c0d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +void REGPARAM2 op_c0d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +void REGPARAM2 op_c0e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +void REGPARAM2 op_c0e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c0f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +void REGPARAM2 op_c0f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +void REGPARAM2 op_c0f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +void REGPARAM2 op_c0fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +void REGPARAM2 op_c0fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +void REGPARAM2 op_c100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +void REGPARAM2 op_c108_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:10 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:10 */ + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +void REGPARAM2 op_c110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +void REGPARAM2 op_c118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +void REGPARAM2 op_c120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +void REGPARAM2 op_c128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_c130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +void REGPARAM2 op_c138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +void REGPARAM2 op_c139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +void REGPARAM2 op_c140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +void REGPARAM2 op_c148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +void REGPARAM2 op_c150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +void REGPARAM2 op_c158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +void REGPARAM2 op_c160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +void REGPARAM2 op_c168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_c170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +void REGPARAM2 op_c178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +void REGPARAM2 op_c179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +void REGPARAM2 op_c188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +void REGPARAM2 op_c190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +void REGPARAM2 op_c198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +void REGPARAM2 op_c1a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +void REGPARAM2 op_c1a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_c1b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +void REGPARAM2 op_c1b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +void REGPARAM2 op_c1b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +void REGPARAM2 op_c1c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +void REGPARAM2 op_c1d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +void REGPARAM2 op_c1d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +void REGPARAM2 op_c1e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +void REGPARAM2 op_c1e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c1f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +void REGPARAM2 op_c1f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +void REGPARAM2 op_c1f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +void REGPARAM2 op_c1fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c1fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +void REGPARAM2 op_c1fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +void REGPARAM2 op_d000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +void REGPARAM2 op_d010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +void REGPARAM2 op_d018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +void REGPARAM2 op_d020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +void REGPARAM2 op_d028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +void REGPARAM2 op_d030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +void REGPARAM2 op_d038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +void REGPARAM2 op_d039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +void REGPARAM2 op_d03a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_d03b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +void REGPARAM2 op_d03c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_word_ce030_prefetch(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +void REGPARAM2 op_d040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +void REGPARAM2 op_d048_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +void REGPARAM2 op_d050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +void REGPARAM2 op_d058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +void REGPARAM2 op_d060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +void REGPARAM2 op_d068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +void REGPARAM2 op_d070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +void REGPARAM2 op_d078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +void REGPARAM2 op_d079_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +void REGPARAM2 op_d07a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_d07b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_d07c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +void REGPARAM2 op_d080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +void REGPARAM2 op_d088_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +void REGPARAM2 op_d090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +void REGPARAM2 op_d098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +void REGPARAM2 op_d0a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +void REGPARAM2 op_d0a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +void REGPARAM2 op_d0b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +void REGPARAM2 op_d0b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +void REGPARAM2 op_d0b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +void REGPARAM2 op_d0ba_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_d0bb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_d0bc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +void REGPARAM2 op_d0c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +void REGPARAM2 op_d0c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +void REGPARAM2 op_d0d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +void REGPARAM2 op_d0d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +void REGPARAM2 op_d0e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +void REGPARAM2 op_d0e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +void REGPARAM2 op_d0f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +void REGPARAM2 op_d0f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +void REGPARAM2 op_d0f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +void REGPARAM2 op_d0fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +void REGPARAM2 op_d0fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +void REGPARAM2 op_d0fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_word_ce030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +void REGPARAM2 op_d100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +void REGPARAM2 op_d108_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +void REGPARAM2 op_d110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +void REGPARAM2 op_d118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +void REGPARAM2 op_d120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +void REGPARAM2 op_d128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_d130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +void REGPARAM2 op_d138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +void REGPARAM2 op_d139_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +void REGPARAM2 op_d140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +void REGPARAM2 op_d148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +void REGPARAM2 op_d150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +void REGPARAM2 op_d158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +void REGPARAM2 op_d160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +void REGPARAM2 op_d168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_d170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +void REGPARAM2 op_d178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +void REGPARAM2 op_d179_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +void REGPARAM2 op_d180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +void REGPARAM2 op_d188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +void REGPARAM2 op_d190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +void REGPARAM2 op_d198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +void REGPARAM2 op_d1a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +void REGPARAM2 op_d1a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_d1b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +void REGPARAM2 op_d1b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +void REGPARAM2 op_d1b9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_long_ce030_prefetch(2); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +void REGPARAM2 op_d1c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +void REGPARAM2 op_d1c8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +void REGPARAM2 op_d1d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +void REGPARAM2 op_d1d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +void REGPARAM2 op_d1e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +void REGPARAM2 op_d1e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +void REGPARAM2 op_d1f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +void REGPARAM2 op_d1f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +void REGPARAM2 op_d1f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_long_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +void REGPARAM2 op_d1fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +void REGPARAM2 op_d1fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_ce030(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +void REGPARAM2 op_d1fc_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_long_ce030_prefetch(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +void REGPARAM2 op_e000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +void REGPARAM2 op_e008_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +void REGPARAM2 op_e010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +void REGPARAM2 op_e018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +void REGPARAM2 op_e020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +void REGPARAM2 op_e028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +void REGPARAM2 op_e030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +void REGPARAM2 op_e038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +void REGPARAM2 op_e040_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +void REGPARAM2 op_e048_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +void REGPARAM2 op_e050_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +void REGPARAM2 op_e058_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +void REGPARAM2 op_e060_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +void REGPARAM2 op_e068_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +void REGPARAM2 op_e070_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +void REGPARAM2 op_e078_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +void REGPARAM2 op_e080_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +void REGPARAM2 op_e088_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +void REGPARAM2 op_e090_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +void REGPARAM2 op_e098_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +void REGPARAM2 op_e0a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +void REGPARAM2 op_e0a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +void REGPARAM2 op_e0b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +void REGPARAM2 op_e0b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +void REGPARAM2 op_e0d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +void REGPARAM2 op_e0d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +void REGPARAM2 op_e0e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +void REGPARAM2 op_e0e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +void REGPARAM2 op_e0f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +void REGPARAM2 op_e0f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +void REGPARAM2 op_e0f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +void REGPARAM2 op_e100_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +void REGPARAM2 op_e108_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +void REGPARAM2 op_e110_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +void REGPARAM2 op_e118_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +void REGPARAM2 op_e120_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +void REGPARAM2 op_e128_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +void REGPARAM2 op_e130_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +void REGPARAM2 op_e138_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +void REGPARAM2 op_e140_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +void REGPARAM2 op_e148_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +void REGPARAM2 op_e150_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +void REGPARAM2 op_e158_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +void REGPARAM2 op_e160_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +void REGPARAM2 op_e168_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +void REGPARAM2 op_e170_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +void REGPARAM2 op_e178_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +void REGPARAM2 op_e180_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +void REGPARAM2 op_e188_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +void REGPARAM2 op_e190_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +void REGPARAM2 op_e198_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +void REGPARAM2 op_e1a0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +void REGPARAM2 op_e1a8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +void REGPARAM2 op_e1b0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +void REGPARAM2 op_e1b8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_word_ce030_prefetch_opcode(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +void REGPARAM2 op_e1d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +void REGPARAM2 op_e1d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +void REGPARAM2 op_e1e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +void REGPARAM2 op_e1e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +void REGPARAM2 op_e1f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +void REGPARAM2 op_e1f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +void REGPARAM2 op_e1f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +void REGPARAM2 op_e2d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +void REGPARAM2 op_e2d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +void REGPARAM2 op_e2e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +void REGPARAM2 op_e2e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +void REGPARAM2 op_e2f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +void REGPARAM2 op_e2f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +void REGPARAM2 op_e2f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +void REGPARAM2 op_e3d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +void REGPARAM2 op_e3d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +void REGPARAM2 op_e3e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +void REGPARAM2 op_e3e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +void REGPARAM2 op_e3f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +void REGPARAM2 op_e3f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +void REGPARAM2 op_e3f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +void REGPARAM2 op_e4d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +void REGPARAM2 op_e4d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +void REGPARAM2 op_e4e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +void REGPARAM2 op_e4e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +void REGPARAM2 op_e4f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +void REGPARAM2 op_e4f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +void REGPARAM2 op_e4f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +void REGPARAM2 op_e5d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +void REGPARAM2 op_e5d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +void REGPARAM2 op_e5e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +void REGPARAM2 op_e5e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +void REGPARAM2 op_e5f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +void REGPARAM2 op_e5f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +void REGPARAM2 op_e5f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +void REGPARAM2 op_e6d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +void REGPARAM2 op_e6d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +void REGPARAM2 op_e6e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +void REGPARAM2 op_e6e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +void REGPARAM2 op_e6f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +void REGPARAM2 op_e6f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +void REGPARAM2 op_e6f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +void REGPARAM2 op_e7d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +void REGPARAM2 op_e7d8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +void REGPARAM2 op_e7e0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_word_ce030_prefetch_opcode(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +void REGPARAM2 op_e7e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +void REGPARAM2 op_e7f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +void REGPARAM2 op_e7f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_word_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +void REGPARAM2 op_e7f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_long_ce030_prefetch(2); + uae_s16 data = x_get_word(dataa); + regs.irc = get_word_ce030_prefetch_opcode(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9d0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9e8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9fa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9fb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eac0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ead0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eae8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebc0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebe8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebfa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebfb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecc0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ece8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edc0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ede8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edfa_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edfb_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_ce030(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eec0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eed0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eee8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efc0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efd0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efe8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_ce030(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff8_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_word_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff9_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + uaecptr dsta; + dsta = get_long_ce030_prefetch(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_word_ce030_prefetch_opcode(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f000_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + uae_u16 extraa = 0; + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f008_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + uae_u16 extraa = 0; + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f010_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + /* OP zero */ + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f018_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + /* OP zero */ + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f020_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = extraa; + /* OP zero */ + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f028_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + /* OP zero */ + m68k_incpci(2); + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f030_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = x_get_disp_ea_ce030(m68k_areg(regs, srcreg), 0); + /* OP zero */ + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f038_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = (uae_s32)(uae_s16)get_word_ce030_prefetch(0); + /* OP zero */ + m68k_incpci(2); + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f039_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + uaecptr extraa; + extraa = get_long_ce030_prefetch(0); + /* OP zero */ + m68k_incpci(4); + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + return; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f200_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f208_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f210_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f218_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f220_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f228_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f230_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f238_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f239_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f240_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f248_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f250_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f258_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f260_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f268_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f270_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f278_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f279_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_word_ce030_prefetch(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + uae_s16 dummy = get_word_ce030_prefetch(4); + /* OP zero */ + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + uae_s32 dummy; + dummy = get_long_ce030_prefetch(4); + /* OP zero */ + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27c_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_word_ce030_prefetch(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f280_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_word_ce030_prefetch(0); + /* OP zero */ + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f2c0_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_long_ce030_prefetch(0); + /* OP zero */ + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f310_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f320_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f328_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f330_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f338_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f339_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f350_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f358_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f368_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f370_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f378_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f379_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f37a_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f37b_23_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_word_ce030_prefetch_opcode(0); + + #endif + return; +} + +#endif diff --git a/cpuemu_24.cpp b/cpuemu_24.cpp new file mode 100644 index 00000000..113c1ce5 --- /dev/null +++ b/cpuemu_24.cpp @@ -0,0 +1,42628 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +void REGPARAM2 op_0000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +void REGPARAM2 op_0010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +void REGPARAM2 op_0018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +void REGPARAM2 op_0020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +void REGPARAM2 op_0028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +void REGPARAM2 op_0038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +void REGPARAM2 op_0039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +void REGPARAM2 op_003c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_0040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +void REGPARAM2 op_0050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +void REGPARAM2 op_0058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +void REGPARAM2 op_0060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +void REGPARAM2 op_0068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +void REGPARAM2 op_0078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +void REGPARAM2 op_0079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +void REGPARAM2 op_007c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_0080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +void REGPARAM2 op_0090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +void REGPARAM2 op_0098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +void REGPARAM2 op_00a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +void REGPARAM2 op_00a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_00b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +void REGPARAM2 op_00b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +void REGPARAM2 op_00b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +void REGPARAM2 op_0100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +void REGPARAM2 op_0108_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_u16 val = (x_get_byte(mempa) & 0xff) << 8; + val |= (x_get_byte(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +void REGPARAM2 op_0110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +void REGPARAM2 op_0118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +void REGPARAM2 op_0120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +void REGPARAM2 op_0128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +void REGPARAM2 op_0138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +void REGPARAM2 op_0139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +void REGPARAM2 op_013a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +void REGPARAM2 op_013b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +void REGPARAM2 op_013c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_iword_cache_040(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +void REGPARAM2 op_0140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +void REGPARAM2 op_0148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_u32 val = (x_get_byte(mempa) & 0xff) << 24; + val |= (x_get_byte(mempa + 2) & 0xff) << 16; + val |= (x_get_byte(mempa + 4) & 0xff) << 8; + val |= (x_get_byte(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +void REGPARAM2 op_0150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +void REGPARAM2 op_0158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +void REGPARAM2 op_0160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +void REGPARAM2 op_0168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +void REGPARAM2 op_0178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +void REGPARAM2 op_0179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +void REGPARAM2 op_0180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +void REGPARAM2 op_0188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + x_put_byte(mempa, src >> 8); + x_put_byte(mempa + 2, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +void REGPARAM2 op_0190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +void REGPARAM2 op_0198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +void REGPARAM2 op_01a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +void REGPARAM2 op_01a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +void REGPARAM2 op_01b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +void REGPARAM2 op_01b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +void REGPARAM2 op_01c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +void REGPARAM2 op_01c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + x_put_byte(mempa, src >> 24); + x_put_byte(mempa + 2, src >> 16); + x_put_byte(mempa + 4, src >> 8); + x_put_byte(mempa + 6, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +void REGPARAM2 op_01d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +void REGPARAM2 op_01d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +void REGPARAM2 op_01e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +void REGPARAM2 op_01e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +void REGPARAM2 op_01f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +void REGPARAM2 op_01f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_0200_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +void REGPARAM2 op_0210_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +void REGPARAM2 op_0218_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +void REGPARAM2 op_0220_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +void REGPARAM2 op_0228_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0230_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +void REGPARAM2 op_0238_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +void REGPARAM2 op_0239_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +void REGPARAM2 op_023c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_0240_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +void REGPARAM2 op_0250_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +void REGPARAM2 op_0258_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +void REGPARAM2 op_0260_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +void REGPARAM2 op_0268_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0270_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +void REGPARAM2 op_0278_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +void REGPARAM2 op_0279_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +void REGPARAM2 op_027c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_0280_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +void REGPARAM2 op_0290_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +void REGPARAM2 op_0298_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +void REGPARAM2 op_02a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +void REGPARAM2 op_02a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_02b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +void REGPARAM2 op_02b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +void REGPARAM2 op_02b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +void REGPARAM2 op_0400_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +void REGPARAM2 op_0410_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +void REGPARAM2 op_0418_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +void REGPARAM2 op_0420_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +void REGPARAM2 op_0428_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0430_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +void REGPARAM2 op_0438_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +void REGPARAM2 op_0439_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_0440_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +void REGPARAM2 op_0450_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +void REGPARAM2 op_0458_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +void REGPARAM2 op_0460_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +void REGPARAM2 op_0468_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0470_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +void REGPARAM2 op_0478_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +void REGPARAM2 op_0479_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_0480_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +void REGPARAM2 op_0490_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +void REGPARAM2 op_0498_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +void REGPARAM2 op_04a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +void REGPARAM2 op_04a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_04b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +void REGPARAM2 op_04b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +void REGPARAM2 op_04b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +void REGPARAM2 op_0600_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +void REGPARAM2 op_0610_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +void REGPARAM2 op_0618_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +void REGPARAM2 op_0620_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +void REGPARAM2 op_0628_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0630_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +void REGPARAM2 op_0638_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +void REGPARAM2 op_0639_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_0640_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +void REGPARAM2 op_0650_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +void REGPARAM2 op_0658_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +void REGPARAM2 op_0660_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +void REGPARAM2 op_0668_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0670_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +void REGPARAM2 op_0678_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +void REGPARAM2 op_0679_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_0680_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +void REGPARAM2 op_0690_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +void REGPARAM2 op_0698_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +void REGPARAM2 op_06a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +void REGPARAM2 op_06a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_06b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +void REGPARAM2 op_06b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +void REGPARAM2 op_06b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +void REGPARAM2 op_0800_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +void REGPARAM2 op_0810_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +void REGPARAM2 op_0818_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +void REGPARAM2 op_0820_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +void REGPARAM2 op_0828_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0830_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +void REGPARAM2 op_0838_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +void REGPARAM2 op_0839_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +void REGPARAM2 op_083a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +void REGPARAM2 op_083b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +void REGPARAM2 op_0840_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +void REGPARAM2 op_0850_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +void REGPARAM2 op_0858_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +void REGPARAM2 op_0860_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +void REGPARAM2 op_0868_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0870_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +void REGPARAM2 op_0878_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +void REGPARAM2 op_0879_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +void REGPARAM2 op_0880_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +void REGPARAM2 op_0890_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +void REGPARAM2 op_0898_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +void REGPARAM2 op_08a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +void REGPARAM2 op_08a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +void REGPARAM2 op_08b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +void REGPARAM2 op_08b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +void REGPARAM2 op_08c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +void REGPARAM2 op_08d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +void REGPARAM2 op_08d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +void REGPARAM2 op_08e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +void REGPARAM2 op_08e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +void REGPARAM2 op_08f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +void REGPARAM2 op_08f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +void REGPARAM2 op_0a00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +void REGPARAM2 op_0a10_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +void REGPARAM2 op_0a18_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +void REGPARAM2 op_0a20_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +void REGPARAM2 op_0a28_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0a30_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +void REGPARAM2 op_0a38_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +void REGPARAM2 op_0a39_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +void REGPARAM2 op_0a3c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +void REGPARAM2 op_0a40_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +void REGPARAM2 op_0a50_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +void REGPARAM2 op_0a58_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +void REGPARAM2 op_0a60_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +void REGPARAM2 op_0a68_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0a70_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +void REGPARAM2 op_0a78_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +void REGPARAM2 op_0a79_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +void REGPARAM2 op_0a7c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +void REGPARAM2 op_0a80_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +void REGPARAM2 op_0a90_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +void REGPARAM2 op_0a98_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +void REGPARAM2 op_0aa0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +void REGPARAM2 op_0aa8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0ab0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +void REGPARAM2 op_0ab8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +void REGPARAM2 op_0ab9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +void REGPARAM2 op_0c00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +void REGPARAM2 op_0c10_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +void REGPARAM2 op_0c18_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +void REGPARAM2 op_0c20_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +void REGPARAM2 op_0c28_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0c30_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +void REGPARAM2 op_0c38_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +void REGPARAM2 op_0c39_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c3a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c3b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +void REGPARAM2 op_0c40_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +void REGPARAM2 op_0c50_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +void REGPARAM2 op_0c58_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +void REGPARAM2 op_0c60_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +void REGPARAM2 op_0c68_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0c70_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +void REGPARAM2 op_0c78_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +void REGPARAM2 op_0c79_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c7a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c7b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +void REGPARAM2 op_0c80_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +void REGPARAM2 op_0c90_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +void REGPARAM2 op_0c98_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +void REGPARAM2 op_0ca0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +void REGPARAM2 op_0ca8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0cb0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +void REGPARAM2 op_0cb8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +void REGPARAM2 op_0cb9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cbb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(4); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(4); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(4); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(6); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return; +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(6); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return; +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(8); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(8); + return; +} +/* 16 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cfc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_cache_040(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = x_get_word(rn1), dst2 = x_get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e10_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e18_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e20_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e28_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e30_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e38_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e39_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_cache_040(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_ilong_cache_040(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + } + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e50_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e58_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e60_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e68_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e70_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e78_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e79_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_cache_040(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_ilong_cache_040(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + } + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e90_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e98_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_cache_040(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_ilong_cache_040(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + } + return; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(4); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(4); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(4); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(6); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return; +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(6); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return; +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(8); + op_unimpl (opcode); + return; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(8); + return; +} +/* 16 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0efc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_cache_040(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = x_get_long(rn1), dst2 = x_get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +void REGPARAM2 op_1000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +void REGPARAM2 op_1010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +void REGPARAM2 op_1018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +void REGPARAM2 op_1020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +void REGPARAM2 op_1028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +void REGPARAM2 op_1030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +void REGPARAM2 op_1038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +void REGPARAM2 op_1039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +void REGPARAM2 op_103a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_103b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +void REGPARAM2 op_103c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +void REGPARAM2 op_1080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +void REGPARAM2 op_1090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +void REGPARAM2 op_1098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +void REGPARAM2 op_10a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +void REGPARAM2 op_10a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +void REGPARAM2 op_10b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +void REGPARAM2 op_10b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +void REGPARAM2 op_10b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +void REGPARAM2 op_10ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +void REGPARAM2 op_10bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +void REGPARAM2 op_10bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +void REGPARAM2 op_10c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +void REGPARAM2 op_10d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +void REGPARAM2 op_10d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +void REGPARAM2 op_10e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +void REGPARAM2 op_10e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +void REGPARAM2 op_10f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +void REGPARAM2 op_10f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +void REGPARAM2 op_10f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +void REGPARAM2 op_10fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_10fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +void REGPARAM2 op_10fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +void REGPARAM2 op_1100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +void REGPARAM2 op_1110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +void REGPARAM2 op_1118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +void REGPARAM2 op_1120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +void REGPARAM2 op_1128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +void REGPARAM2 op_1130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +void REGPARAM2 op_1138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +void REGPARAM2 op_1139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +void REGPARAM2 op_113a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +void REGPARAM2 op_113b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +void REGPARAM2 op_113c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +void REGPARAM2 op_1140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +void REGPARAM2 op_1150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +void REGPARAM2 op_1158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +void REGPARAM2 op_1160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +void REGPARAM2 op_1168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_1170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +void REGPARAM2 op_1178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +void REGPARAM2 op_1179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +void REGPARAM2 op_117a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_117b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +void REGPARAM2 op_117c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_1180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +void REGPARAM2 op_1190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +void REGPARAM2 op_1198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +void REGPARAM2 op_11a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_11a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_11b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_11b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_11ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_11bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +void REGPARAM2 op_11c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +void REGPARAM2 op_11d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +void REGPARAM2 op_11d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +void REGPARAM2 op_11e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +void REGPARAM2 op_11e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_11f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +void REGPARAM2 op_11f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +void REGPARAM2 op_11f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +void REGPARAM2 op_11fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_11fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +void REGPARAM2 op_11fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +void REGPARAM2 op_13c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +void REGPARAM2 op_13d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +void REGPARAM2 op_13d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +void REGPARAM2 op_13e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +void REGPARAM2 op_13e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_13f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +void REGPARAM2 op_13f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +void REGPARAM2 op_13f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +void REGPARAM2 op_13fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_13fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +void REGPARAM2 op_13fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +void REGPARAM2 op_2000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +void REGPARAM2 op_2008_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +void REGPARAM2 op_2010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +void REGPARAM2 op_2018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +void REGPARAM2 op_2020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +void REGPARAM2 op_2028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +void REGPARAM2 op_2030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +void REGPARAM2 op_2038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +void REGPARAM2 op_2039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +void REGPARAM2 op_203a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_203b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +void REGPARAM2 op_203c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +void REGPARAM2 op_2040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +void REGPARAM2 op_2048_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +void REGPARAM2 op_2050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +void REGPARAM2 op_2058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +void REGPARAM2 op_2060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +void REGPARAM2 op_2068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +void REGPARAM2 op_2070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +void REGPARAM2 op_2078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +void REGPARAM2 op_2079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +void REGPARAM2 op_207a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_207b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +void REGPARAM2 op_207c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +void REGPARAM2 op_2080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +void REGPARAM2 op_2088_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +void REGPARAM2 op_2090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +void REGPARAM2 op_2098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +void REGPARAM2 op_20a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +void REGPARAM2 op_20a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +void REGPARAM2 op_20b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +void REGPARAM2 op_20b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +void REGPARAM2 op_20b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +void REGPARAM2 op_20ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +void REGPARAM2 op_20bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +void REGPARAM2 op_20bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +void REGPARAM2 op_20c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +void REGPARAM2 op_20c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +void REGPARAM2 op_20d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +void REGPARAM2 op_20d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +void REGPARAM2 op_20e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +void REGPARAM2 op_20e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +void REGPARAM2 op_20f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +void REGPARAM2 op_20f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +void REGPARAM2 op_20f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +void REGPARAM2 op_20fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_20fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +void REGPARAM2 op_20fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +void REGPARAM2 op_2100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +void REGPARAM2 op_2108_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +void REGPARAM2 op_2110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +void REGPARAM2 op_2118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +void REGPARAM2 op_2120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +void REGPARAM2 op_2128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +void REGPARAM2 op_2130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +void REGPARAM2 op_2138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +void REGPARAM2 op_2139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +void REGPARAM2 op_213a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +void REGPARAM2 op_213b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +void REGPARAM2 op_213c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +void REGPARAM2 op_2140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +void REGPARAM2 op_2148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +void REGPARAM2 op_2150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +void REGPARAM2 op_2158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +void REGPARAM2 op_2160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +void REGPARAM2 op_2168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_2170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +void REGPARAM2 op_2178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +void REGPARAM2 op_2179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +void REGPARAM2 op_217a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_217b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +void REGPARAM2 op_217c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_2180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +void REGPARAM2 op_2188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +void REGPARAM2 op_2190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +void REGPARAM2 op_2198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +void REGPARAM2 op_21a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_21a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_21b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_21b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_21ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_21bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +void REGPARAM2 op_21c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +void REGPARAM2 op_21c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +void REGPARAM2 op_21d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +void REGPARAM2 op_21d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +void REGPARAM2 op_21e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +void REGPARAM2 op_21e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_21f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +void REGPARAM2 op_21f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +void REGPARAM2 op_21f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +void REGPARAM2 op_21fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_21fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +void REGPARAM2 op_21fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +void REGPARAM2 op_23c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +void REGPARAM2 op_23c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +void REGPARAM2 op_23d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +void REGPARAM2 op_23d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +void REGPARAM2 op_23e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +void REGPARAM2 op_23e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_23f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +void REGPARAM2 op_23f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +void REGPARAM2 op_23f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +void REGPARAM2 op_23fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_23fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +void REGPARAM2 op_23fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +void REGPARAM2 op_3000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +void REGPARAM2 op_3008_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +void REGPARAM2 op_3010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +void REGPARAM2 op_3018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +void REGPARAM2 op_3020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +void REGPARAM2 op_3028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +void REGPARAM2 op_3030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +void REGPARAM2 op_3038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +void REGPARAM2 op_3039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +void REGPARAM2 op_303a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_303b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +void REGPARAM2 op_303c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +void REGPARAM2 op_3040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +void REGPARAM2 op_3048_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +void REGPARAM2 op_3050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +void REGPARAM2 op_3058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +void REGPARAM2 op_3060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +void REGPARAM2 op_3068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +void REGPARAM2 op_3070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +void REGPARAM2 op_3078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +void REGPARAM2 op_3079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +void REGPARAM2 op_307a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +void REGPARAM2 op_307b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +void REGPARAM2 op_307c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +void REGPARAM2 op_3080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +void REGPARAM2 op_3088_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +void REGPARAM2 op_3090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +void REGPARAM2 op_3098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +void REGPARAM2 op_30a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +void REGPARAM2 op_30a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +void REGPARAM2 op_30b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +void REGPARAM2 op_30b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +void REGPARAM2 op_30b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +void REGPARAM2 op_30ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +void REGPARAM2 op_30bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +void REGPARAM2 op_30bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +void REGPARAM2 op_30c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +void REGPARAM2 op_30c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +void REGPARAM2 op_30d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +void REGPARAM2 op_30d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +void REGPARAM2 op_30e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +void REGPARAM2 op_30e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +void REGPARAM2 op_30f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +void REGPARAM2 op_30f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +void REGPARAM2 op_30f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +void REGPARAM2 op_30fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_30fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +void REGPARAM2 op_30fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +void REGPARAM2 op_3100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +void REGPARAM2 op_3108_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +void REGPARAM2 op_3110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +void REGPARAM2 op_3118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +void REGPARAM2 op_3120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +void REGPARAM2 op_3128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +void REGPARAM2 op_3130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +void REGPARAM2 op_3138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +void REGPARAM2 op_3139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +void REGPARAM2 op_313a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +void REGPARAM2 op_313b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +void REGPARAM2 op_313c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +void REGPARAM2 op_3140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +void REGPARAM2 op_3148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +void REGPARAM2 op_3150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +void REGPARAM2 op_3158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +void REGPARAM2 op_3160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +void REGPARAM2 op_3168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_3170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +void REGPARAM2 op_3178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +void REGPARAM2 op_3179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +void REGPARAM2 op_317a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_317b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +void REGPARAM2 op_317c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_3180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +void REGPARAM2 op_3188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +void REGPARAM2 op_3190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +void REGPARAM2 op_3198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +void REGPARAM2 op_31a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_31a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_31b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_31b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_31ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_31bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +void REGPARAM2 op_31c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +void REGPARAM2 op_31c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +void REGPARAM2 op_31d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +void REGPARAM2 op_31d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +void REGPARAM2 op_31e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +void REGPARAM2 op_31e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_31f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +void REGPARAM2 op_31f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +void REGPARAM2 op_31f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +void REGPARAM2 op_31fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_31fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +void REGPARAM2 op_31fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +void REGPARAM2 op_33c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +void REGPARAM2 op_33c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +void REGPARAM2 op_33d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +void REGPARAM2 op_33d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +void REGPARAM2 op_33e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +void REGPARAM2 op_33e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_33f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +void REGPARAM2 op_33f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +void REGPARAM2 op_33f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +void REGPARAM2 op_33fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_33fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_ilong_cache_040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +void REGPARAM2 op_33fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +void REGPARAM2 op_4000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +void REGPARAM2 op_4010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +void REGPARAM2 op_4018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +void REGPARAM2 op_4020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +void REGPARAM2 op_4028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +void REGPARAM2 op_4030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +void REGPARAM2 op_4038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +void REGPARAM2 op_4039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +void REGPARAM2 op_4040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +void REGPARAM2 op_4050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +void REGPARAM2 op_4058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +void REGPARAM2 op_4060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +void REGPARAM2 op_4068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +void REGPARAM2 op_4070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +void REGPARAM2 op_4078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +void REGPARAM2 op_4079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +void REGPARAM2 op_4080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +void REGPARAM2 op_4090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +void REGPARAM2 op_4098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +void REGPARAM2 op_40a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +void REGPARAM2 op_40a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +void REGPARAM2 op_40b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +void REGPARAM2 op_40b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +void REGPARAM2 op_40b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +void REGPARAM2 op_40c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +void REGPARAM2 op_40d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +void REGPARAM2 op_40d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +void REGPARAM2 op_40e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +void REGPARAM2 op_40e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +void REGPARAM2 op_40f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + MakeSR(); + x_put_word(srca, regs.sr); + return; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +void REGPARAM2 op_40f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +void REGPARAM2 op_40f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = get_ilong_cache_040(2); + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + return; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +void REGPARAM2 op_4180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +void REGPARAM2 op_4190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +void REGPARAM2 op_4198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +void REGPARAM2 op_41a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +void REGPARAM2 op_41a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +void REGPARAM2 op_41b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +void REGPARAM2 op_41b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +void REGPARAM2 op_41b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +void REGPARAM2 op_41ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_41bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +void REGPARAM2 op_41bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + return; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +void REGPARAM2 op_41d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +void REGPARAM2 op_41e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +void REGPARAM2 op_41f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + m68k_areg(regs, dstreg) = (srca); + return; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +void REGPARAM2 op_41f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +void REGPARAM2 op_41f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +void REGPARAM2 op_41fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_41fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + m68k_areg(regs, dstreg) = (srca); + return; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +void REGPARAM2 op_4200_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +void REGPARAM2 op_4210_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +void REGPARAM2 op_4218_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +void REGPARAM2 op_4220_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +void REGPARAM2 op_4228_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +void REGPARAM2 op_4230_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +void REGPARAM2 op_4238_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +void REGPARAM2 op_4239_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +void REGPARAM2 op_4240_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +void REGPARAM2 op_4250_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +void REGPARAM2 op_4258_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +void REGPARAM2 op_4260_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +void REGPARAM2 op_4268_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +void REGPARAM2 op_4270_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +void REGPARAM2 op_4278_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +void REGPARAM2 op_4279_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +void REGPARAM2 op_4280_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +void REGPARAM2 op_4290_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +void REGPARAM2 op_4298_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +void REGPARAM2 op_42a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +void REGPARAM2 op_42a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +void REGPARAM2 op_42b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +void REGPARAM2 op_42b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +void REGPARAM2 op_42b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + return; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +void REGPARAM2 op_4400_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +void REGPARAM2 op_4410_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +void REGPARAM2 op_4418_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +void REGPARAM2 op_4420_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +void REGPARAM2 op_4428_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +void REGPARAM2 op_4430_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +void REGPARAM2 op_4438_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +void REGPARAM2 op_4439_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +void REGPARAM2 op_4440_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +void REGPARAM2 op_4450_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +void REGPARAM2 op_4458_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +void REGPARAM2 op_4460_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +void REGPARAM2 op_4468_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +void REGPARAM2 op_4470_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +void REGPARAM2 op_4478_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +void REGPARAM2 op_4479_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +void REGPARAM2 op_4480_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +void REGPARAM2 op_4490_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +void REGPARAM2 op_4498_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +void REGPARAM2 op_44a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +void REGPARAM2 op_44a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +void REGPARAM2 op_44b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +void REGPARAM2 op_44b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +void REGPARAM2 op_44b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +void REGPARAM2 op_44c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +void REGPARAM2 op_44d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +void REGPARAM2 op_44d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +void REGPARAM2 op_44e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +void REGPARAM2 op_44e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +void REGPARAM2 op_44f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +void REGPARAM2 op_44f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +void REGPARAM2 op_44f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +void REGPARAM2 op_44fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +void REGPARAM2 op_44fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +void REGPARAM2 op_44fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +void REGPARAM2 op_4600_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +void REGPARAM2 op_4610_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +void REGPARAM2 op_4618_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +void REGPARAM2 op_4620_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +void REGPARAM2 op_4628_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +void REGPARAM2 op_4630_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +void REGPARAM2 op_4638_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +void REGPARAM2 op_4639_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +void REGPARAM2 op_4640_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +void REGPARAM2 op_4650_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +void REGPARAM2 op_4658_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +void REGPARAM2 op_4660_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +void REGPARAM2 op_4668_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +void REGPARAM2 op_4670_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +void REGPARAM2 op_4678_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +void REGPARAM2 op_4679_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +void REGPARAM2 op_4680_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +void REGPARAM2 op_4690_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +void REGPARAM2 op_4698_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +void REGPARAM2 op_46a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +void REGPARAM2 op_46a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +void REGPARAM2 op_46b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +void REGPARAM2 op_46b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +void REGPARAM2 op_46b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +void REGPARAM2 op_46c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +void REGPARAM2 op_46d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +void REGPARAM2 op_46d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +void REGPARAM2 op_46e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +void REGPARAM2 op_46e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +void REGPARAM2 op_46f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +void REGPARAM2 op_46f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +void REGPARAM2 op_46f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +void REGPARAM2 op_46fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +void REGPARAM2 op_46fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +void REGPARAM2 op_46fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 src = get_iword_cache_040(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +void REGPARAM2 op_4800_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4808_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 offs; + offs = get_ilong_cache_040(2); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +void REGPARAM2 op_4810_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +void REGPARAM2 op_4818_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +void REGPARAM2 op_4820_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +void REGPARAM2 op_4828_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +void REGPARAM2 op_4830_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + return; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +void REGPARAM2 op_4838_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +void REGPARAM2 op_4839_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +void REGPARAM2 op_4840_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4848_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +void REGPARAM2 op_4850_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +void REGPARAM2 op_4868_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +void REGPARAM2 op_4870_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + return; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +void REGPARAM2 op_4878_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +void REGPARAM2 op_4879_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +void REGPARAM2 op_487a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +void REGPARAM2 op_487b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + return; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +void REGPARAM2 op_4880_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +void REGPARAM2 op_4890_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +void REGPARAM2 op_48a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + } else { + x_put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +void REGPARAM2 op_48a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_48b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + return; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +void REGPARAM2 op_48b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +void REGPARAM2 op_48b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = get_ilong_cache_040(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +void REGPARAM2 op_48c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +void REGPARAM2 op_48d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +void REGPARAM2 op_48e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + x_put_long(srca, m68k_areg(regs, movem_index2[amask])); + } else { + x_put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + x_put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +void REGPARAM2 op_48e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_48f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + return; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +void REGPARAM2 op_48f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +void REGPARAM2 op_48f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_cache_040(2); + uaecptr srca; + srca = get_ilong_cache_040(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_49c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +void REGPARAM2 op_4a00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (An) */ +void REGPARAM2 op_4a10_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +void REGPARAM2 op_4a18_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +void REGPARAM2 op_4a20_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +void REGPARAM2 op_4a28_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +void REGPARAM2 op_4a30_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +void REGPARAM2 op_4a38_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +void REGPARAM2 op_4a39_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +void REGPARAM2 op_4a40_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a48_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +void REGPARAM2 op_4a50_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +void REGPARAM2 op_4a58_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +void REGPARAM2 op_4a60_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +void REGPARAM2 op_4a68_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +void REGPARAM2 op_4a70_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +void REGPARAM2 op_4a78_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +void REGPARAM2 op_4a79_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +void REGPARAM2 op_4a80_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a88_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +void REGPARAM2 op_4a90_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +void REGPARAM2 op_4a98_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +void REGPARAM2 op_4aa0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +void REGPARAM2 op_4aa8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +void REGPARAM2 op_4ab0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +void REGPARAM2 op_4ab8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +void REGPARAM2 op_4ab9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4aba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4abb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4abc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_cache_040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +void REGPARAM2 op_4ac0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* HALT.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4ac8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + cpu_halt(CPU_HALT_68060_HALT); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* PULSE.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4acc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TAS.B (An) */ +void REGPARAM2 op_4ad0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +void REGPARAM2 op_4ad8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +void REGPARAM2 op_4ae0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +void REGPARAM2 op_4ae8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +void REGPARAM2 op_4af0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + return; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +void REGPARAM2 op_4af8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +void REGPARAM2 op_4af9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c10_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c18_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c20_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c28_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c30_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c38_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c39_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uae_s32 dst; + dst = get_ilong_cache_040(4); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c40_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c50_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c58_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c60_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c68_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c70_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c78_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c79_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(2); + uae_s32 dst; + dst = get_ilong_cache_040(4); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + return; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +void REGPARAM2 op_4c90_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +void REGPARAM2 op_4c98_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +void REGPARAM2 op_4ca8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cb0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + return; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +void REGPARAM2 op_4cb8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +void REGPARAM2 op_4cb9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_cache_040(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +void REGPARAM2 op_4cba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_cache_040(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cbb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + return; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +void REGPARAM2 op_4cd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +void REGPARAM2 op_4cd8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +void REGPARAM2 op_4ce8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cf0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + return; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +void REGPARAM2 op_4cf8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +void REGPARAM2 op_4cf9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_cache_040(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +void REGPARAM2 op_4cfa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_cache_040(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cfb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_cache_040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + return; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +void REGPARAM2 op_4e40_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpci(2); + Exception_cpu(src + 32); + return; + return; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +void REGPARAM2 op_4e50_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_iword_cache_040(2); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* UNLK.L An */ +void REGPARAM2 op_4e58_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + uae_s32 old = x_get_long(olda); + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = (old); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +void REGPARAM2 op_4e60_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +void REGPARAM2 op_4e68_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RESET.L */ +void REGPARAM2 op_4e70_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + bool r = cpureset(); + if (r) { + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOP.L */ +void REGPARAM2 op_4e71_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +void REGPARAM2 op_4e72_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + if (!regs.stopped) { + uae_s16 src = get_iword_cache_040(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + if (!(sr & 0x2000)) { + Exception(8); + return; + } + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return; +} + +/* RTE.L */ +void REGPARAM2 op_4e73_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_areg(regs, 7) += offset + 8; break; } + else { + Exception_cpu(14); + return; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + regs.sr = oldsr & 0xff00; + MakeFromSR(); + SET_ZFLG(newsr == 0); + SET_NFLG(newsr & 0x8000); + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_setpci_j(newpc); + branch_stack_pop_rte(oldpc); + return; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e74_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_iword_cache_040(2); + m68k_areg(regs, 7) += offs; + if (pc & 1) { + m68k_areg(regs, 7) -= 4 + offs; + exception3_read_prefetch_only(opcode, pc); + return; + } + m68k_setpci_j(pc); + return; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +void REGPARAM2 op_4e75_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + m68k_do_rtsi(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci_j(oldpc); + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch_only(opcode, faultpc); + return; + } + return; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +void REGPARAM2 op_4e76_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +/* RTR.L */ +void REGPARAM2 op_4e77_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch(opcode, pc); + return; + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci_j(pc); + return; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +void REGPARAM2 op_4e90_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + m68k_setpci_j(srca); + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +void REGPARAM2 op_4ea8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +void REGPARAM2 op_4eb0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +void REGPARAM2 op_4eb8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +void REGPARAM2 op_4eb9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + m68k_setpci_j(srca); + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +void REGPARAM2 op_4eba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + m68k_setpci_j(srca); + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +void REGPARAM2 op_4ebb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + m68k_setpci_j(srca); + if (m68k_getpci() & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +void REGPARAM2 op_4ed0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + return; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +void REGPARAM2 op_4ee8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + return; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +void REGPARAM2 op_4ef0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + return; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +void REGPARAM2 op_4ef8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + return; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +void REGPARAM2 op_4ef9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + return; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +void REGPARAM2 op_4efa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + return; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +void REGPARAM2 op_4efb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci_j(srca); + return; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +void REGPARAM2 op_5000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +void REGPARAM2 op_5010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +void REGPARAM2 op_5018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +void REGPARAM2 op_5020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +void REGPARAM2 op_5028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +void REGPARAM2 op_5038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +void REGPARAM2 op_5039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +void REGPARAM2 op_5040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +void REGPARAM2 op_5048_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +void REGPARAM2 op_5050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +void REGPARAM2 op_5058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +void REGPARAM2 op_5060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +void REGPARAM2 op_5068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +void REGPARAM2 op_5078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +void REGPARAM2 op_5079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +void REGPARAM2 op_5080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +void REGPARAM2 op_5088_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +void REGPARAM2 op_5090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +void REGPARAM2 op_5098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +void REGPARAM2 op_50a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +void REGPARAM2 op_50a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_50b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +void REGPARAM2 op_50b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +void REGPARAM2 op_50b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +void REGPARAM2 op_50c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +void REGPARAM2 op_50c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +void REGPARAM2 op_50d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +void REGPARAM2 op_50d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +void REGPARAM2 op_50e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +void REGPARAM2 op_50e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +void REGPARAM2 op_50f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +void REGPARAM2 op_50f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +void REGPARAM2 op_50f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +void REGPARAM2 op_5100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +void REGPARAM2 op_5110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +void REGPARAM2 op_5118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +void REGPARAM2 op_5120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +void REGPARAM2 op_5128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +void REGPARAM2 op_5138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +void REGPARAM2 op_5139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +void REGPARAM2 op_5140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +void REGPARAM2 op_5148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +void REGPARAM2 op_5150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +void REGPARAM2 op_5158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +void REGPARAM2 op_5160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +void REGPARAM2 op_5168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +void REGPARAM2 op_5178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +void REGPARAM2 op_5179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +void REGPARAM2 op_5180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +void REGPARAM2 op_5188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +void REGPARAM2 op_5190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +void REGPARAM2 op_5198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +void REGPARAM2 op_51a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +void REGPARAM2 op_51a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_51b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +void REGPARAM2 op_51b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +void REGPARAM2 op_51b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +void REGPARAM2 op_51c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +void REGPARAM2 op_51c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +void REGPARAM2 op_51d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +void REGPARAM2 op_51d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +void REGPARAM2 op_51e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +void REGPARAM2 op_51e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +void REGPARAM2 op_51f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +void REGPARAM2 op_51f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +void REGPARAM2 op_51f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +void REGPARAM2 op_52c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +void REGPARAM2 op_52c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +void REGPARAM2 op_52d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +void REGPARAM2 op_52d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +void REGPARAM2 op_52e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +void REGPARAM2 op_52e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +void REGPARAM2 op_52f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +void REGPARAM2 op_52f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +void REGPARAM2 op_52f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +void REGPARAM2 op_53c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +void REGPARAM2 op_53c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +void REGPARAM2 op_53d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +void REGPARAM2 op_53d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +void REGPARAM2 op_53e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +void REGPARAM2 op_53e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +void REGPARAM2 op_53f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +void REGPARAM2 op_53f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +void REGPARAM2 op_53f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +void REGPARAM2 op_54c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +void REGPARAM2 op_54c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +void REGPARAM2 op_54d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +void REGPARAM2 op_54d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +void REGPARAM2 op_54e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +void REGPARAM2 op_54e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +void REGPARAM2 op_54f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +void REGPARAM2 op_54f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +void REGPARAM2 op_54f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +void REGPARAM2 op_55c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +void REGPARAM2 op_55c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +void REGPARAM2 op_55d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +void REGPARAM2 op_55d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +void REGPARAM2 op_55e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +void REGPARAM2 op_55e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +void REGPARAM2 op_55f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +void REGPARAM2 op_55f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +void REGPARAM2 op_55f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +void REGPARAM2 op_56c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +void REGPARAM2 op_56c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +void REGPARAM2 op_56d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +void REGPARAM2 op_56d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +void REGPARAM2 op_56e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +void REGPARAM2 op_56e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +void REGPARAM2 op_56f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +void REGPARAM2 op_56f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +void REGPARAM2 op_56f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +void REGPARAM2 op_57c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +void REGPARAM2 op_57c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +void REGPARAM2 op_57d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +void REGPARAM2 op_57d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +void REGPARAM2 op_57e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +void REGPARAM2 op_57e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +void REGPARAM2 op_57f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +void REGPARAM2 op_57f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +void REGPARAM2 op_57f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +void REGPARAM2 op_58c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +void REGPARAM2 op_58c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +void REGPARAM2 op_58d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +void REGPARAM2 op_58d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +void REGPARAM2 op_58e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +void REGPARAM2 op_58e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +void REGPARAM2 op_58f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +void REGPARAM2 op_58f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +void REGPARAM2 op_58f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +void REGPARAM2 op_59c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +void REGPARAM2 op_59c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +void REGPARAM2 op_59d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +void REGPARAM2 op_59d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +void REGPARAM2 op_59e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +void REGPARAM2 op_59e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +void REGPARAM2 op_59f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +void REGPARAM2 op_59f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +void REGPARAM2 op_59f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +void REGPARAM2 op_5ac0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +void REGPARAM2 op_5ac8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +void REGPARAM2 op_5ad0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +void REGPARAM2 op_5ad8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +void REGPARAM2 op_5ae0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +void REGPARAM2 op_5ae8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +void REGPARAM2 op_5af0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +void REGPARAM2 op_5af8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +void REGPARAM2 op_5af9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +void REGPARAM2 op_5bc0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +void REGPARAM2 op_5bc8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +void REGPARAM2 op_5bd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +void REGPARAM2 op_5bd8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +void REGPARAM2 op_5be0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +void REGPARAM2 op_5be8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +void REGPARAM2 op_5bf0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +void REGPARAM2 op_5bf8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +void REGPARAM2 op_5bf9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +void REGPARAM2 op_5cc0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +void REGPARAM2 op_5cc8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +void REGPARAM2 op_5cd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +void REGPARAM2 op_5cd8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +void REGPARAM2 op_5ce0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +void REGPARAM2 op_5ce8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +void REGPARAM2 op_5cf0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +void REGPARAM2 op_5cf8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +void REGPARAM2 op_5cf9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +void REGPARAM2 op_5dc0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +void REGPARAM2 op_5dc8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +void REGPARAM2 op_5dd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +void REGPARAM2 op_5dd8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +void REGPARAM2 op_5de0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +void REGPARAM2 op_5de8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +void REGPARAM2 op_5df0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +void REGPARAM2 op_5df8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +void REGPARAM2 op_5df9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +void REGPARAM2 op_5ec0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +void REGPARAM2 op_5ec8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +void REGPARAM2 op_5ed0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +void REGPARAM2 op_5ed8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +void REGPARAM2 op_5ee0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +void REGPARAM2 op_5ee8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +void REGPARAM2 op_5ef0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +void REGPARAM2 op_5ef8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +void REGPARAM2 op_5ef9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +void REGPARAM2 op_5fc0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +void REGPARAM2 op_5fc8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return; + } + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci_j(oldpc + 4); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +void REGPARAM2 op_5fd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +void REGPARAM2 op_5fd8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +void REGPARAM2 op_5fe0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +void REGPARAM2 op_5fe8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +void REGPARAM2 op_5ff0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +void REGPARAM2 op_5ff8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +void REGPARAM2 op_5ff9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_cache_040(2); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_cache_040(2); + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_cache_040(2); + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + return; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +void REGPARAM2 op_6000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(0)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +void REGPARAM2 op_6001_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(0)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +void REGPARAM2 op_60ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(0)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +void REGPARAM2 op_6100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_iword_cache_040(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsri(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +void REGPARAM2 op_6101_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsri(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +void REGPARAM2 op_61ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_ilong_cache_040(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsri(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +void REGPARAM2 op_6200_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(2)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +void REGPARAM2 op_6201_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(2)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +void REGPARAM2 op_62ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(2)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +void REGPARAM2 op_6300_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(3)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +void REGPARAM2 op_6301_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(3)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +void REGPARAM2 op_63ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(3)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +void REGPARAM2 op_6400_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(4)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +void REGPARAM2 op_6401_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(4)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +void REGPARAM2 op_64ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(4)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +void REGPARAM2 op_6500_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(5)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +void REGPARAM2 op_6501_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(5)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +void REGPARAM2 op_65ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(5)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +void REGPARAM2 op_6600_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(6)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +void REGPARAM2 op_6601_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(6)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +void REGPARAM2 op_66ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(6)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +void REGPARAM2 op_6700_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(7)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +void REGPARAM2 op_6701_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(7)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +void REGPARAM2 op_67ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(7)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +void REGPARAM2 op_6800_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(8)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +void REGPARAM2 op_6801_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(8)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +void REGPARAM2 op_68ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(8)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +void REGPARAM2 op_6900_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(9)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +void REGPARAM2 op_6901_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(9)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +void REGPARAM2 op_69ff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(9)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +void REGPARAM2 op_6a00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(10)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +void REGPARAM2 op_6a01_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(10)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +void REGPARAM2 op_6aff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(10)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +void REGPARAM2 op_6b00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(11)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +void REGPARAM2 op_6b01_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(11)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +void REGPARAM2 op_6bff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(11)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +void REGPARAM2 op_6c00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(12)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +void REGPARAM2 op_6c01_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(12)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +void REGPARAM2 op_6cff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(12)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +void REGPARAM2 op_6d00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(13)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +void REGPARAM2 op_6d01_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(13)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +void REGPARAM2 op_6dff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(13)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +void REGPARAM2 op_6e00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(14)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +void REGPARAM2 op_6e01_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(14)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +void REGPARAM2 op_6eff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(14)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +void REGPARAM2 op_6f00_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(15)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(4); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +void REGPARAM2 op_6f01_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(15)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(2); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +void REGPARAM2 op_6fff_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_cache_040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return; + } + if (cctrue(15)) { + m68k_incpci((uae_s32)src + 2); + return; + } + m68k_incpci(6); + return; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +void REGPARAM2 op_7000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +void REGPARAM2 op_8000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +void REGPARAM2 op_8010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +void REGPARAM2 op_8018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +void REGPARAM2 op_8020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +void REGPARAM2 op_8028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +void REGPARAM2 op_8030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +void REGPARAM2 op_8038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +void REGPARAM2 op_8039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +void REGPARAM2 op_803a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_803b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +void REGPARAM2 op_803c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +void REGPARAM2 op_8040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +void REGPARAM2 op_8050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +void REGPARAM2 op_8058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +void REGPARAM2 op_8060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +void REGPARAM2 op_8068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +void REGPARAM2 op_8070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +void REGPARAM2 op_8078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +void REGPARAM2 op_8079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +void REGPARAM2 op_807a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_807b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_807c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +void REGPARAM2 op_8080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +void REGPARAM2 op_8090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +void REGPARAM2 op_8098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +void REGPARAM2 op_80a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +void REGPARAM2 op_80a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +void REGPARAM2 op_80b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +void REGPARAM2 op_80b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +void REGPARAM2 op_80b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +void REGPARAM2 op_80ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_80bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_80bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +void REGPARAM2 op_80c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +void REGPARAM2 op_80d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +void REGPARAM2 op_80d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +void REGPARAM2 op_80e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles_020_internal(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +void REGPARAM2 op_80e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_80f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + do_cycles_020_internal(34); + return; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +void REGPARAM2 op_80f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +void REGPARAM2 op_80f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + do_cycles_020_internal(34); + return; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +void REGPARAM2 op_80fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_80fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + do_cycles_020_internal(34); + return; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +void REGPARAM2 op_80fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles_020_internal(34); + return; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +void REGPARAM2 op_8100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +void REGPARAM2 op_8108_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +void REGPARAM2 op_8110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +void REGPARAM2 op_8118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +void REGPARAM2 op_8120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +void REGPARAM2 op_8128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_8130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +void REGPARAM2 op_8138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +void REGPARAM2 op_8139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_iword_cache_040(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(x_get_word(m68k_areg(regs, srcreg))); + val += get_iword_cache_040(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + x_put_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +void REGPARAM2 op_8150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +void REGPARAM2 op_8158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +void REGPARAM2 op_8160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +void REGPARAM2 op_8168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_8170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +void REGPARAM2 op_8178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +void REGPARAM2 op_8179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_iword_cache_040(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(x_get_byte(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword_cache_040(2); + m68k_areg(regs, dstreg) -= 2; + x_put_word(m68k_areg(regs, dstreg), val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +void REGPARAM2 op_8190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +void REGPARAM2 op_8198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +void REGPARAM2 op_81a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +void REGPARAM2 op_81a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_81b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +void REGPARAM2 op_81b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +void REGPARAM2 op_81b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +void REGPARAM2 op_81c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +void REGPARAM2 op_81d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +void REGPARAM2 op_81d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +void REGPARAM2 op_81e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles_020_internal(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +void REGPARAM2 op_81e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_81f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + do_cycles_020_internal(48); + return; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +void REGPARAM2 op_81f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +void REGPARAM2 op_81f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + do_cycles_020_internal(48); + return; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +void REGPARAM2 op_81fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_81fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + do_cycles_020_internal(48); + return; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +void REGPARAM2 op_81fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles_020_internal(48); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +void REGPARAM2 op_9000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +void REGPARAM2 op_9010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +void REGPARAM2 op_9018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +void REGPARAM2 op_9020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +void REGPARAM2 op_9028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +void REGPARAM2 op_9030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +void REGPARAM2 op_9038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +void REGPARAM2 op_9039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +void REGPARAM2 op_903a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_903b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +void REGPARAM2 op_903c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +void REGPARAM2 op_9040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +void REGPARAM2 op_9048_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +void REGPARAM2 op_9050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +void REGPARAM2 op_9058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +void REGPARAM2 op_9060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +void REGPARAM2 op_9068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +void REGPARAM2 op_9070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +void REGPARAM2 op_9078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +void REGPARAM2 op_9079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +void REGPARAM2 op_907a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_907b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_907c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +void REGPARAM2 op_9080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +void REGPARAM2 op_9088_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +void REGPARAM2 op_9090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +void REGPARAM2 op_9098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +void REGPARAM2 op_90a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +void REGPARAM2 op_90a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +void REGPARAM2 op_90b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +void REGPARAM2 op_90b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +void REGPARAM2 op_90b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +void REGPARAM2 op_90ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_90bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_90bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +void REGPARAM2 op_90c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +void REGPARAM2 op_90c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +void REGPARAM2 op_90d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +void REGPARAM2 op_90d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +void REGPARAM2 op_90e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +void REGPARAM2 op_90e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +void REGPARAM2 op_90f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +void REGPARAM2 op_90f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +void REGPARAM2 op_90f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +void REGPARAM2 op_90fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +void REGPARAM2 op_90fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +void REGPARAM2 op_90fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +void REGPARAM2 op_9100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +void REGPARAM2 op_9108_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +void REGPARAM2 op_9110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +void REGPARAM2 op_9118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +void REGPARAM2 op_9120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +void REGPARAM2 op_9128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_9130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +void REGPARAM2 op_9138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +void REGPARAM2 op_9139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +void REGPARAM2 op_9140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +void REGPARAM2 op_9148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +void REGPARAM2 op_9150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +void REGPARAM2 op_9158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +void REGPARAM2 op_9160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +void REGPARAM2 op_9168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_9170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +void REGPARAM2 op_9178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +void REGPARAM2 op_9179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +void REGPARAM2 op_9180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +void REGPARAM2 op_9188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +void REGPARAM2 op_9190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +void REGPARAM2 op_9198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +void REGPARAM2 op_91a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +void REGPARAM2 op_91a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_91b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +void REGPARAM2 op_91b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +void REGPARAM2 op_91b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +void REGPARAM2 op_91c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +void REGPARAM2 op_91c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +void REGPARAM2 op_91d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +void REGPARAM2 op_91d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +void REGPARAM2 op_91e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +void REGPARAM2 op_91e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +void REGPARAM2 op_91f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +void REGPARAM2 op_91f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +void REGPARAM2 op_91f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +void REGPARAM2 op_91fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +void REGPARAM2 op_91fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +void REGPARAM2 op_91fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +void REGPARAM2 op_b000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +void REGPARAM2 op_b010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +void REGPARAM2 op_b018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +void REGPARAM2 op_b020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +void REGPARAM2 op_b028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +void REGPARAM2 op_b030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +void REGPARAM2 op_b038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +void REGPARAM2 op_b039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +void REGPARAM2 op_b03a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_b03b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +void REGPARAM2 op_b03c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +void REGPARAM2 op_b040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +void REGPARAM2 op_b048_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +void REGPARAM2 op_b050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +void REGPARAM2 op_b058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +void REGPARAM2 op_b060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +void REGPARAM2 op_b068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +void REGPARAM2 op_b070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +void REGPARAM2 op_b078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +void REGPARAM2 op_b079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +void REGPARAM2 op_b07a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_b07b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +void REGPARAM2 op_b07c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +void REGPARAM2 op_b080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +void REGPARAM2 op_b088_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +void REGPARAM2 op_b090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +void REGPARAM2 op_b098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +void REGPARAM2 op_b0a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +void REGPARAM2 op_b0a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +void REGPARAM2 op_b0b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +void REGPARAM2 op_b0b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +void REGPARAM2 op_b0b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +void REGPARAM2 op_b0ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_b0bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +void REGPARAM2 op_b0bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +void REGPARAM2 op_b0c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +void REGPARAM2 op_b0c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +void REGPARAM2 op_b0d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +void REGPARAM2 op_b0d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +void REGPARAM2 op_b0e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +void REGPARAM2 op_b0e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +void REGPARAM2 op_b0f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +void REGPARAM2 op_b0f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +void REGPARAM2 op_b0f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +void REGPARAM2 op_b0fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +void REGPARAM2 op_b0fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +void REGPARAM2 op_b0fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +void REGPARAM2 op_b100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +void REGPARAM2 op_b108_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +void REGPARAM2 op_b110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +void REGPARAM2 op_b118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +void REGPARAM2 op_b120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +void REGPARAM2 op_b128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_b130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +void REGPARAM2 op_b138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +void REGPARAM2 op_b139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +void REGPARAM2 op_b140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +void REGPARAM2 op_b148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +void REGPARAM2 op_b150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +void REGPARAM2 op_b158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +void REGPARAM2 op_b160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +void REGPARAM2 op_b168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_b170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +void REGPARAM2 op_b178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +void REGPARAM2 op_b179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +void REGPARAM2 op_b180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +void REGPARAM2 op_b188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +void REGPARAM2 op_b190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +void REGPARAM2 op_b198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +void REGPARAM2 op_b1a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +void REGPARAM2 op_b1a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_b1b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +void REGPARAM2 op_b1b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +void REGPARAM2 op_b1b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +void REGPARAM2 op_b1c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +void REGPARAM2 op_b1c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +void REGPARAM2 op_b1d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +void REGPARAM2 op_b1d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +void REGPARAM2 op_b1e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +void REGPARAM2 op_b1e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +void REGPARAM2 op_b1f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +void REGPARAM2 op_b1f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +void REGPARAM2 op_b1f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +void REGPARAM2 op_b1fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +void REGPARAM2 op_b1fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +void REGPARAM2 op_b1fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +void REGPARAM2 op_c000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +void REGPARAM2 op_c010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +void REGPARAM2 op_c018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +void REGPARAM2 op_c020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +void REGPARAM2 op_c028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +void REGPARAM2 op_c030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +void REGPARAM2 op_c038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +void REGPARAM2 op_c039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +void REGPARAM2 op_c03a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_c03b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_c03c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +void REGPARAM2 op_c040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +void REGPARAM2 op_c050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +void REGPARAM2 op_c058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +void REGPARAM2 op_c060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +void REGPARAM2 op_c068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +void REGPARAM2 op_c078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +void REGPARAM2 op_c079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +void REGPARAM2 op_c07a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c07b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_c07c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +void REGPARAM2 op_c080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +void REGPARAM2 op_c090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +void REGPARAM2 op_c098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +void REGPARAM2 op_c0a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +void REGPARAM2 op_c0a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +void REGPARAM2 op_c0b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +void REGPARAM2 op_c0b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +void REGPARAM2 op_c0b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +void REGPARAM2 op_c0ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_c0bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +void REGPARAM2 op_c0c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +void REGPARAM2 op_c0d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +void REGPARAM2 op_c0d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +void REGPARAM2 op_c0e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +void REGPARAM2 op_c0e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c0f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +void REGPARAM2 op_c0f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +void REGPARAM2 op_c0f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +void REGPARAM2 op_c0fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +void REGPARAM2 op_c0fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +void REGPARAM2 op_c100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +void REGPARAM2 op_c108_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +void REGPARAM2 op_c110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +void REGPARAM2 op_c118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +void REGPARAM2 op_c120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +void REGPARAM2 op_c128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_c130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +void REGPARAM2 op_c138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +void REGPARAM2 op_c139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +void REGPARAM2 op_c140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +void REGPARAM2 op_c148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +void REGPARAM2 op_c150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +void REGPARAM2 op_c158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +void REGPARAM2 op_c160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +void REGPARAM2 op_c168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_c170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +void REGPARAM2 op_c178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +void REGPARAM2 op_c179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +void REGPARAM2 op_c188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +void REGPARAM2 op_c190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +void REGPARAM2 op_c198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +void REGPARAM2 op_c1a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +void REGPARAM2 op_c1a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_c1b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +void REGPARAM2 op_c1b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +void REGPARAM2 op_c1b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +void REGPARAM2 op_c1c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +void REGPARAM2 op_c1d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +void REGPARAM2 op_c1d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +void REGPARAM2 op_c1e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +void REGPARAM2 op_c1e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c1f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +void REGPARAM2 op_c1f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +void REGPARAM2 op_c1f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +void REGPARAM2 op_c1fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c1fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +void REGPARAM2 op_c1fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles_020_internal(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +void REGPARAM2 op_d000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +void REGPARAM2 op_d010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +void REGPARAM2 op_d018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +void REGPARAM2 op_d020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +void REGPARAM2 op_d028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +void REGPARAM2 op_d030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +void REGPARAM2 op_d038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +void REGPARAM2 op_d039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +void REGPARAM2 op_d03a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_d03b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +void REGPARAM2 op_d03c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_cache_040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +void REGPARAM2 op_d040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +void REGPARAM2 op_d048_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +void REGPARAM2 op_d050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +void REGPARAM2 op_d058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +void REGPARAM2 op_d060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +void REGPARAM2 op_d068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +void REGPARAM2 op_d070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +void REGPARAM2 op_d078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +void REGPARAM2 op_d079_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +void REGPARAM2 op_d07a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_d07b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_d07c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +void REGPARAM2 op_d080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +void REGPARAM2 op_d088_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +void REGPARAM2 op_d090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +void REGPARAM2 op_d098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +void REGPARAM2 op_d0a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +void REGPARAM2 op_d0a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +void REGPARAM2 op_d0b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +void REGPARAM2 op_d0b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +void REGPARAM2 op_d0b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +void REGPARAM2 op_d0ba_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_d0bb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_d0bc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +void REGPARAM2 op_d0c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +void REGPARAM2 op_d0c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +void REGPARAM2 op_d0d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +void REGPARAM2 op_d0d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +void REGPARAM2 op_d0e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +void REGPARAM2 op_d0e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +void REGPARAM2 op_d0f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +void REGPARAM2 op_d0f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +void REGPARAM2 op_d0f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +void REGPARAM2 op_d0fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +void REGPARAM2 op_d0fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +void REGPARAM2 op_d0fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_cache_040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +void REGPARAM2 op_d100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +void REGPARAM2 op_d108_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +void REGPARAM2 op_d110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +void REGPARAM2 op_d118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +void REGPARAM2 op_d120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +void REGPARAM2 op_d128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_d130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +void REGPARAM2 op_d138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +void REGPARAM2 op_d139_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +void REGPARAM2 op_d140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +void REGPARAM2 op_d148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +void REGPARAM2 op_d150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +void REGPARAM2 op_d158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +void REGPARAM2 op_d160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +void REGPARAM2 op_d168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_d170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +void REGPARAM2 op_d178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +void REGPARAM2 op_d179_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +void REGPARAM2 op_d180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +void REGPARAM2 op_d188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +void REGPARAM2 op_d190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +void REGPARAM2 op_d198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +void REGPARAM2 op_d1a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +void REGPARAM2 op_d1a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_d1b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +void REGPARAM2 op_d1b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +void REGPARAM2 op_d1b9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_cache_040(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +void REGPARAM2 op_d1c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +void REGPARAM2 op_d1c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +void REGPARAM2 op_d1d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +void REGPARAM2 op_d1d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +void REGPARAM2 op_d1e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +void REGPARAM2 op_d1e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +void REGPARAM2 op_d1f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +void REGPARAM2 op_d1f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +void REGPARAM2 op_d1f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +void REGPARAM2 op_d1fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +void REGPARAM2 op_d1fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_040(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +void REGPARAM2 op_d1fc_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_cache_040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +void REGPARAM2 op_e000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +void REGPARAM2 op_e008_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +void REGPARAM2 op_e010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +void REGPARAM2 op_e018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +void REGPARAM2 op_e020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +void REGPARAM2 op_e028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +void REGPARAM2 op_e030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +void REGPARAM2 op_e038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +void REGPARAM2 op_e040_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +void REGPARAM2 op_e048_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +void REGPARAM2 op_e050_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +void REGPARAM2 op_e058_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +void REGPARAM2 op_e060_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +void REGPARAM2 op_e068_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +void REGPARAM2 op_e070_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +void REGPARAM2 op_e078_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +void REGPARAM2 op_e080_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +void REGPARAM2 op_e088_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +void REGPARAM2 op_e090_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +void REGPARAM2 op_e098_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +void REGPARAM2 op_e0a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +void REGPARAM2 op_e0a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +void REGPARAM2 op_e0b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +void REGPARAM2 op_e0b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +void REGPARAM2 op_e0d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +void REGPARAM2 op_e0d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +void REGPARAM2 op_e0e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +void REGPARAM2 op_e0e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +void REGPARAM2 op_e0f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +void REGPARAM2 op_e0f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +void REGPARAM2 op_e0f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +void REGPARAM2 op_e100_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +void REGPARAM2 op_e108_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +void REGPARAM2 op_e110_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +void REGPARAM2 op_e118_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +void REGPARAM2 op_e120_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +void REGPARAM2 op_e128_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +void REGPARAM2 op_e130_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +void REGPARAM2 op_e138_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +void REGPARAM2 op_e140_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +void REGPARAM2 op_e148_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +void REGPARAM2 op_e150_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +void REGPARAM2 op_e158_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +void REGPARAM2 op_e160_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +void REGPARAM2 op_e168_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +void REGPARAM2 op_e170_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +void REGPARAM2 op_e178_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +void REGPARAM2 op_e180_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +void REGPARAM2 op_e188_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +void REGPARAM2 op_e190_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +void REGPARAM2 op_e198_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +void REGPARAM2 op_e1a0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +void REGPARAM2 op_e1a8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +void REGPARAM2 op_e1b0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +void REGPARAM2 op_e1b8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +void REGPARAM2 op_e1d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +void REGPARAM2 op_e1d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +void REGPARAM2 op_e1e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +void REGPARAM2 op_e1e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +void REGPARAM2 op_e1f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +void REGPARAM2 op_e1f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +void REGPARAM2 op_e1f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +void REGPARAM2 op_e2d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +void REGPARAM2 op_e2d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +void REGPARAM2 op_e2e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +void REGPARAM2 op_e2e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +void REGPARAM2 op_e2f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +void REGPARAM2 op_e2f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +void REGPARAM2 op_e2f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +void REGPARAM2 op_e3d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +void REGPARAM2 op_e3d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +void REGPARAM2 op_e3e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +void REGPARAM2 op_e3e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +void REGPARAM2 op_e3f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +void REGPARAM2 op_e3f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +void REGPARAM2 op_e3f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +void REGPARAM2 op_e4d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +void REGPARAM2 op_e4d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +void REGPARAM2 op_e4e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +void REGPARAM2 op_e4e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +void REGPARAM2 op_e4f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +void REGPARAM2 op_e4f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +void REGPARAM2 op_e4f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +void REGPARAM2 op_e5d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +void REGPARAM2 op_e5d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +void REGPARAM2 op_e5e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +void REGPARAM2 op_e5e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +void REGPARAM2 op_e5f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +void REGPARAM2 op_e5f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +void REGPARAM2 op_e5f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +void REGPARAM2 op_e6d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +void REGPARAM2 op_e6d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +void REGPARAM2 op_e6e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +void REGPARAM2 op_e6e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +void REGPARAM2 op_e6f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +void REGPARAM2 op_e6f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +void REGPARAM2 op_e6f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +void REGPARAM2 op_e7d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +void REGPARAM2 op_e7d8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +void REGPARAM2 op_e7e0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +void REGPARAM2 op_e7e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +void REGPARAM2 op_e7f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_040(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +void REGPARAM2 op_e7f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +void REGPARAM2 op_e7f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_cache_040(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9d0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9e8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9fa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9fb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eac0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ead0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eae8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebc0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebe8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebfa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebfb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecc0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ece8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + return; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edc0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ede8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edfa_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edfb_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_040(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eec0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eed0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eee8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efc0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efd0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efe8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff9_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f000_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + m68k_incpci(2); + return; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f008_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + m68k_incpci(2); + return; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f010_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + m68k_incpci(2); + return; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f018_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + m68k_incpci(2); + return; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f020_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + m68k_incpci(2); + return; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f028_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + m68k_incpci(2); + return; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f030_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + m68k_incpci(2); + return; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f038_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + op_illg_noret(opcode); + m68k_incpci(2); + return; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f039_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + op_illg_noret(opcode); + m68k_incpci(2); + return; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f200_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f208_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f210_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f218_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f220_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f228_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f230_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f238_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f239_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f240_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f248_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + + #endif + return; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f250_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f258_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f260_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f268_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f270_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f278_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f279_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_cache_040(2); + uae_s16 dummy = get_iword_cache_040(4); + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_cache_040(2); + uae_s32 dummy; + dummy = get_ilong_cache_040(4); + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_cache_040(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f280_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_iword_cache_040(0); + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + + #endif + return; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f2c0_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_ilong_cache_040(0); + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + + #endif + return; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f310_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f320_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f328_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f330_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f338_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f339_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f350_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f358_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f368_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f370_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f378_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f379_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f37a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f37b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + + #endif + return; +} + +#endif +/* CINVLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f408_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CINVPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f410_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f418_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f419_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f41a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f41b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f41c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f41d_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f41e_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f41f_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f428_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f430_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f438_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f439_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f43a_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f43b_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f43c_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f43d_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f43e_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f43f_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return; +} + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f500_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return; +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f508_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return; +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f510_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return; +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f518_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return; +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f548_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return; +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f568_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return; +} + +#endif +/* PLPAW.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f588_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return; +} + +#endif +/* PLPAR.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f5c8_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return; +} + +#endif +/* MOVE16.L (An)+,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f600_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_ilong_cache_040(2); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = x_get_long(memsa); + v[1] = x_get_long(memsa + 4); + v[2] = x_get_long(memsa + 8); + v[3] = x_get_long(memsa + 12); + x_put_long(memda , v[0]); + x_put_long(memda + 4, v[1]); + x_put_long(memda + 8, v[2]); + x_put_long(memda + 12, v[3]); + m68k_areg(regs, srcreg) += 16; + m68k_incpci(6); + return; +} + +#endif +/* MOVE16.L (xxx).L,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f608_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_ilong_cache_040(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = x_get_long(memsa); + v[1] = x_get_long(memsa + 4); + v[2] = x_get_long(memsa + 8); + v[3] = x_get_long(memsa + 12); + x_put_long(memda , v[0]); + x_put_long(memda + 4, v[1]); + x_put_long(memda + 8, v[2]); + x_put_long(memda + 12, v[3]); + m68k_areg(regs, dstreg) += 16; + m68k_incpci(6); + return; +} + +#endif +/* MOVE16.L (An),(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f610_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_ilong_cache_040(2); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = x_get_long(memsa); + v[1] = x_get_long(memsa + 4); + v[2] = x_get_long(memsa + 8); + v[3] = x_get_long(memsa + 12); + x_put_long(memda , v[0]); + x_put_long(memda + 4, v[1]); + x_put_long(memda + 8, v[2]); + x_put_long(memda + 12, v[3]); + m68k_incpci(6); + return; +} + +#endif +/* MOVE16.L (xxx).L,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f618_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_ilong_cache_040(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = x_get_long(memsa); + v[1] = x_get_long(memsa + 4); + v[2] = x_get_long(memsa + 8); + v[3] = x_get_long(memsa + 12); + x_put_long(memda , v[0]); + x_put_long(memda + 4, v[1]); + x_put_long(memda + 8, v[2]); + x_put_long(memda + 12, v[3]); + m68k_incpci(6); + return; +} + +#endif +/* MOVE16.L (An)+,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f620_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = 0; + uaecptr mems = m68k_areg(regs, srcreg) & ~15, memd; + dstreg = (get_iword_cache_040(2) >> 12) & 7; + memd = m68k_areg(regs, dstreg) & ~15; + uae_u32 v[4]; + v[0] = x_get_long(mems); + v[1] = x_get_long(mems + 4); + v[2] = x_get_long(mems + 8); + v[3] = x_get_long(mems + 12); + x_put_long(memd , v[0]); + x_put_long(memd + 4, v[1]); + x_put_long(memd + 8, v[2]); + x_put_long(memd + 12, v[3]); + if (srcreg != dstreg) + m68k_areg(regs, srcreg) += 16; + m68k_areg(regs, dstreg) += 16; + m68k_incpci(4); + return; +} + +#endif +/* LPSTOP.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f800_24_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 sw = get_iword_cache_040(2); + if (sw != 0x01c0) { + Exception(11); + return; + } + if (!(regs.sr & 0x2000)) { + Exception(8); + return; + } + uae_u16 newsr = get_iword_cache_040(4); + if (!(newsr & 0x2000)) { + Exception(8); + return; + } + regs.sr = newsr; + checkint(); + MakeFromSR_STOP(); + m68k_setstopped(2); + return; +} + +#endif +/* ORSR.B #.W */ +void REGPARAM2 op_003c_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +void REGPARAM2 op_007c_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +void REGPARAM2 op_023c_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +void REGPARAM2 op_027c_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +void REGPARAM2 op_0a3c_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +void REGPARAM2 op_0a7c_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_iword_cache_040(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af9_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf9_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cfc_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_cache_040(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = x_get_word(rn1), dst2 = x_get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e10_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e18_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e20_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e28_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e30_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e38_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e39_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_cache_040(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_ilong_cache_040(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e50_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e58_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e60_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e68_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e70_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e78_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e79_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_cache_040(4); + dfc_nommu_put_word(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_ilong_cache_040(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e90_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e98_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_040(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb9_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_cache_040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_cache_040(4); + dfc_nommu_put_long(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_ilong_cache_040(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + } + if(regs.t0) check_t0_trace(); + return; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef0_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_040(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef8_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_cache_040(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef9_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + uaecptr dsta; + dsta = get_ilong_cache_040(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0efc_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_cache_040(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = x_get_long(rn1), dst2 = x_get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4808_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 offs; + offs = get_ilong_cache_040(2); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* LINK.W An,#.W */ +void REGPARAM2 op_4e50_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s16 offs = get_iword_cache_040(2); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVR2USP.L An */ +void REGPARAM2 op_4e60_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + if(regs.t0) check_t0_trace(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOP.L */ +void REGPARAM2 op_4e71_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if(regs.t0) check_t0_trace(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +void REGPARAM2 op_4e72_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + if (!regs.stopped) { + uae_s16 src = get_iword_cache_040(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return; +} + +/* RTE.L */ +void REGPARAM2 op_4e73_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_areg(regs, 7) += offset + 8; break; } + else if (frame == 0x7) { + m68k_areg(regs, 7) += offset + 52; break; } + else { + Exception_cpu(14); + return; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, newpc, oldsr); + return; + } + m68k_setpci_j(newpc); + branch_stack_pop_rte(oldpc); + return; +} +/* 2 0,0 B */ + +/* RTR.L */ +void REGPARAM2 op_4e77_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + uae_u16 oldsr = regs.sr; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, pc, oldsr); + return; + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci_j(pc); + return; +} +/* 2 0,0 B */ + +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7b_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_cache_040(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f500_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return; +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f508_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return; +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f510_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return; +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f518_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return; +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f548_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return; +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f568_25_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return; +} + +#endif diff --git a/cpuemu_31.cpp b/cpuemu_31.cpp new file mode 100644 index 00000000..32ff31da --- /dev/null +++ b/cpuemu_31.cpp @@ -0,0 +1,43568 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#include "cpummu.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu040(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu040(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu040(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu040(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu040(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu040(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu040(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu040(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu040(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu040(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu040(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu040(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu040(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu040(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu040(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu040(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_u16 val = (get_byte_mmu040(mempa) & 0xff) << 8; + val |= (get_byte_mmu040(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = get_ibyte_mmu040(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_u32 val = (get_byte_mmu040(mempa) & 0xff) << 24; + val |= (get_byte_mmu040(mempa + 2) & 0xff) << 16; + val |= (get_byte_mmu040(mempa + 4) & 0xff) << 8; + val |= (get_byte_mmu040(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + put_byte_mmu040(mempa, src >> 8); + put_byte_mmu040(mempa + 2, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + put_byte_mmu040(mempa, src >> 24); + put_byte_mmu040(mempa + 2, src >> 16); + put_byte_mmu040(mempa + 4, src >> 8); + put_byte_mmu040(mempa + 6, src); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu040(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu040(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu040(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu040(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu040(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu040(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu040(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu040(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu040(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu040(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu040(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu040(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu040(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu040(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu040(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu040(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu040(dsta); upper = get_long_mmu040(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu040(dsta); upper = get_long_mmu040(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu040(dsta); upper = get_long_mmu040(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu040(dsta); upper = get_long_mmu040(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu040(dsta); upper = get_long_mmu040(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu040(dsta); upper = get_long_mmu040(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu040(dsta); upper = get_long_mmu040(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu040(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu040(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_byte_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + if (GET_ZFLG()) { + put_lrmw_byte_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + if (GET_ZFLG()) { + put_lrmw_byte_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_lrmw_byte_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_byte_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_lrmw_byte_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_byte_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_lrmw_byte_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_byte_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_lrmw_byte_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_byte_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(10); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(6); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cbb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_word_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + if (GET_ZFLG()) { + put_lrmw_word_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + if (GET_ZFLG()) { + put_lrmw_word_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_lrmw_word_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_word_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_lrmw_word_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_word_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 dst = get_lrmw_word_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_word_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s16 dst = get_lrmw_word_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_word_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu040(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu040(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_lrmw_word_mmu040(rn1), dst2 = get_lrmw_word_mmu040(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu040(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_word_mmu040(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_byte(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc040_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + dfc040_put_byte(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc040_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + dfc040_put_byte(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc040_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_byte(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 src = sfc040_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc040_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_byte(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s8 src = sfc040_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu040(4); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_byte(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu040(4); + uae_s8 src = sfc040_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_word(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc040_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + dfc040_put_word(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc040_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + dfc040_put_word(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc040_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_word(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 src = sfc040_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc040_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_word(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s16 src = sfc040_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu040(4); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_word(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu040(4); + uae_s16 src = sfc040_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_long(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc040_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + dfc040_put_long(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc040_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + dfc040_put_long(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc040_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_long(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 src = sfc040_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc040_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_long(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 src = sfc040_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu040(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu040(4); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + dfc040_put_long(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu040(4); + uae_s32 src = sfc040_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_long_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu040(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + if (GET_ZFLG()) { + put_lrmw_long_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu040(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + if (GET_ZFLG()) { + put_lrmw_long_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu040(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 dst = get_lrmw_long_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_long_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu040(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_lrmw_long_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_long_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu040(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 dst = get_lrmw_long_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_long_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu040(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s32 dst = get_lrmw_long_mmu040(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + if (GET_ZFLG()) { + put_lrmw_long_mmu040(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu040(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu040(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_lrmw_long_mmu040(rn1), dst2 = get_lrmw_long_mmu040(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu040(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_long_mmu040(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + mmufixup[0].reg = -1; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + mmufixup[0].reg = -1; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + mmufixup[0].reg = -1; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + mmufixup[0].reg = -1; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + mmufixup[0].reg = -1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uaecptr dsta; + dsta = get_ilong_mmu040(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + MakeSR(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + MakeSR(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_ilong_mmu040(2); + MakeSR(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + MakeSR(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + MakeSR(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + MakeSR(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_iword_mmu040(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 offs; + offs = get_ilong_mmu040(2); + mmufixup[0].reg = -1; + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(olda, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg) - 0; + } + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (amask) { + srca -= 2; + put_word_mmu040(srca, m68k_areg (regs, movem_index2[amask])); + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word_mmu040(srca, m68k_dreg (regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + mmu040_movem = 0; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + m68k_incpci(4); + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = (uae_s32)(uae_s16)get_iword_mmu040(4); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = get_ilong_mmu040(4); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_word_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg) - 0; + } + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (amask) { + srca -= 4; + put_long_mmu040(srca, m68k_areg (regs, movem_index2[amask])); + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + put_long_mmu040(srca, m68k_dreg (regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + mmu040_movem = 0; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + m68k_incpci(4); + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = (uae_s32)(uae_s16)get_iword_mmu040(4); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu040(2); + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = get_ilong_mmu040(4); + } + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + put_long_mmu040(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu040(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_49c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a48_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a88_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4aba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu040(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_lrmw_byte_mmu040(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_lrmw_byte_mmu040(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_lrmw_byte_mmu040(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_lrmw_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_lrmw_byte_mmu040(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_lrmw_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_lrmw_byte_mmu040(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_lrmw_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_lrmw_byte_mmu040(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_lrmw_byte_mmu040(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_lrmw_byte_mmu040(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c10_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c18_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c20_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c28_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c30_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c38_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c39_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long_mmu040(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uae_s32 dst; + dst = get_ilong_mmu040(4); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c40_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c50_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c58_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c60_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c68_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c70_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c78_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c79_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_s32 dst = get_long_mmu040(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long_mmu040(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(2); + uae_s32 dst; + dst = get_ilong_mmu040(4); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + mmu040_movem = 0; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = (uae_s32)(uae_s16)get_iword_mmu040(4); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = get_ilong_mmu040(4); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu040(4); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_mmu040(srca); + srca += 2; + amask = movem_next[amask]; + } + mmu040_movem = 0; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = get_long_mmu040(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = get_long_mmu040(srca); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = get_long_mmu040(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = get_long_mmu040(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + mmu040_movem = 0; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = get_long_mmu040(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = get_long_mmu040(srca); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = get_long_mmu040(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = get_long_mmu040(srca); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = (uae_s32)(uae_s16)get_iword_mmu040(4); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = get_long_mmu040(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = get_long_mmu040(srca); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = get_ilong_mmu040(4); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = get_long_mmu040(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = get_long_mmu040(srca); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu040(4); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = get_long_mmu040(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = get_long_mmu040(srca); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu040(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + if (mmu040_movem) { + srca = mmu040_movem_ea; + } else { + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + } + mmu040_movem = 1; + mmu040_movem_ea = srca; + while (dmask) { + m68k_dreg (regs, movem_index1[dmask]) = get_long_mmu040(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg (regs, movem_index1[amask]) = get_long_mmu040(srca); + srca += 4; + amask = movem_next[amask]; + } + mmu040_movem = 0; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + Exception_cpu(src + 32); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + mmufixup[0].reg = -1; + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(olda, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 old = get_long_mmu040(src); + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = old; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + if(regs.t0) check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if(regs.t0) check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iword_mmu040(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_mmu040(a); + uae_u32 pc = get_long_mmu040(a + 2); + uae_u16 format = get_word_mmu040(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_areg(regs, 7) += offset + 8; break; } + else if (frame == 0x7) { + m68k_do_rte_mmu040 (a); m68k_areg(regs, 7) += offset + 52; break; } + else { + Exception_cpu(14); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, newpc, oldsr); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(newpc); + branch_stack_pop_rte(oldpc); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 offs = get_iword_mmu040(2); + uaecptr pca; + pca = m68k_areg(regs, 7); + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu040(pca); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, 7) += offs; + if (pc & 1) { + m68k_areg(regs, 7) -= 4 + offs; + exception3_read_prefetch_only(opcode, pc); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(pc); + if(regs.t0) check_t0_trace(); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + m68k_do_rts_mmu040(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci(oldpc); + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch_only(opcode, faultpc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + uae_s16 sr = get_word_mmu040(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu040(pca); + m68k_areg(regs, 7) += 4; + mmufixup[0].reg = -1; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + uae_u16 oldsr = regs.sr; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, pc, oldsr); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci(pc); + if(regs.t0) check_t0_trace(); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu040(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if(regs.t0) check_t0_trace(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + put_long_mmu040(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu040(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu040(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu040(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + put_long_mmu040(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu040(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu040(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu040(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu040(2); + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu040(2); + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu040(2); + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(0)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(0)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(0)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_iword_mmu040(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu040(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu040(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_ilong_mmu040(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu040(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(2)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(2)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(2)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(3)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(3)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(3)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(4)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(4)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(4)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(5)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(5)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(5)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(6)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(6)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(6)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(7)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(7)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(7)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(8)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(8)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(8)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(9)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(9)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(9)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(10)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(10)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(10)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(11)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(11)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(11)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(12)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(12)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(12)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(13)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(13)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(13)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(14)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(14)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(14)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(15)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(15)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu040(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(15)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_iword_mmu040(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(get_word_mmu040(m68k_areg(regs, srcreg))); + val += get_iword_mmu040(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_iword_mmu040(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(get_byte_mmu040(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword_mmu040(2); + m68k_areg(regs, dstreg) -= 2; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(m68k_areg(regs, dstreg), val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu040(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu040(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s8 dst = get_byte_mmu040(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_byte_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s16 dst = get_word_mmu040(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + mmufixup[0].reg = -1; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu040(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu040(2); + uae_s32 dst = get_long_mmu040(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_long_mmu040(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu040(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + mmufixup[0].reg = -1; + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu040(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu040(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu040(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + mmufixup[0].reg = -1; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu040(2); + uae_s16 data = get_word_mmu040(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu_restart = false; + put_word_mmu040(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9d0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9e8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eac0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ead0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eae8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebc0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebe8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecc0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ece8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edc0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ede8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfa_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfb_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eec0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eed0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eee8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efc0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efd0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efe8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff8_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff9_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu040(2); + uaecptr dsta; + dsta = get_ilong_mmu040(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f000_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f008_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f010_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f018_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f020_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f028_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f030_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f038_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f039_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f200_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f208_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f210_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f218_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f220_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f228_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f230_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f238_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f239_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f240_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f248_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f250_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f258_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f260_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f268_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f270_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f278_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f279_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu040(2); + uae_s16 dummy = get_iword_mmu040(4); + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu040(2); + uae_s32 dummy; + dummy = get_ilong_mmu040(4); + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu040(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f280_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_iword_mmu040(0); + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f2c0_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_ilong_mmu040(0); + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f310_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f320_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f328_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f330_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f338_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f339_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f350_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f358_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f368_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f370_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f378_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f379_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f408_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f410_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f418_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f419_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41d_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41e_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41f_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f428_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f430_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f438_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f439_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43a_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43b_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43c_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43d_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43e_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43f_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu040(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f500_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f508_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f510_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f518_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f548_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f568_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (An)+,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f600_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_ilong_mmu040(2); + get_move16_mmu (memsa, mmu040_move16); + put_move16_mmu (memda, mmu040_move16); + m68k_areg(regs, srcreg) += 16; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (xxx).L,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f608_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_ilong_mmu040(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + get_move16_mmu (memsa, mmu040_move16); + put_move16_mmu (memda, mmu040_move16); + m68k_areg(regs, dstreg) += 16; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (An),(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f610_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_ilong_mmu040(2); + get_move16_mmu (memsa, mmu040_move16); + put_move16_mmu (memda, mmu040_move16); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (xxx).L,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f618_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_ilong_mmu040(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + get_move16_mmu (memsa, mmu040_move16); + put_move16_mmu (memda, mmu040_move16); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (An)+,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f620_31_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = 0; + uaecptr mems = m68k_areg(regs, srcreg) & ~15, memd; + dstreg = (get_iword_mmu040(2) >> 12) & 7; + memd = m68k_areg(regs, dstreg) & ~15; + uae_u32 v[4]; + get_move16_mmu (mems, v); + put_move16_mmu (memd, v); + if (srcreg != dstreg) + m68k_areg(regs, srcreg) += 16; + m68k_areg(regs, dstreg) += 16; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif diff --git a/cpuemu_32.cpp b/cpuemu_32.cpp new file mode 100644 index 00000000..bd68013d --- /dev/null +++ b/cpuemu_32.cpp @@ -0,0 +1,43739 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#include "cpummu030.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu030_state(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu030_state(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_u16 val = (get_byte_mmu030_state(mempa) & 0xff) << 8; + val |= (get_byte_mmu030_state(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = get_ibyte_mmu030_state(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_u32 val = (get_byte_mmu030_state(mempa) & 0xff) << 24; + val |= (get_byte_mmu030_state(mempa + 2) & 0xff) << 16; + val |= (get_byte_mmu030_state(mempa + 4) & 0xff) << 8; + val |= (get_byte_mmu030_state(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + put_byte_mmu030_state(mempa, src >> 8); + put_byte_mmu030_state(mempa + 2, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + put_byte_mmu030_state(mempa, src >> 24); + put_byte_mmu030_state(mempa + 2, src >> 16); + put_byte_mmu030_state(mempa + 4, src >> 8); + put_byte_mmu030_state(mempa + 6, src); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu030_state(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu030_state(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030_state(dsta); upper = get_long_mmu030_state(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030_state(dsta); upper = get_long_mmu030_state(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030_state(dsta); upper = get_long_mmu030_state(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030_state(dsta); upper = get_long_mmu030_state(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030_state(dsta); upper = get_long_mmu030_state(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030_state(dsta); upper = get_long_mmu030_state(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030_state(dsta); upper = get_long_mmu030_state(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu030_state(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu030_state(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_lrmw_byte_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_lrmw_byte_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_lrmw_byte_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_lrmw_byte_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(10); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(6); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cbb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_lrmw_word_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_lrmw_word_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 dst = get_lrmw_word_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s16 dst = get_lrmw_word_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu030_state(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_lrmw_word_mmu030_state(rn1), dst2 = get_lrmw_word_mmu030_state(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030_state(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_word_mmu030_state(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc030_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 src = sfc030_get_byte_state(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 src = sfc030_get_byte_state(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 src = sfc030_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_byte_state(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc030_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s8 src = sfc030_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu030_state(4); + uae_s8 src = sfc030_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc030_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 src = sfc030_get_word_state(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 src = sfc030_get_word_state(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 src = sfc030_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_word_state(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc030_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s16 src = sfc030_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu030_state(4); + uae_s16 src = sfc030_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc030_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 src = sfc030_get_long_state(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 src = sfc030_get_long_state(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 src = sfc030_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_long_state(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc030_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 src = sfc030_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu030_state(4); + uae_s32 src = sfc030_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 dst = get_lrmw_long_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_lrmw_long_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 dst = get_lrmw_long_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s32 dst = get_lrmw_long_mmu030_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030_state(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu030_state(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_lrmw_long_mmu030_state(rn1), dst2 = get_lrmw_long_mmu030_state(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030_state(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_long_mmu030_state(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + MakeSR(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + MakeSR(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_ilong_mmu030_state(2); + MakeSR(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr & 0xff); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr & 0xff); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + MakeSR(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + MakeSR(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + MakeSR(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_iword_mmu030_state(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 offs; + offs = get_ilong_mmu030_state(2); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(olda, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (amask) { + uae_u16 nextmask = movem_next[amask]; + srca -= 2; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]); + if(!dmask && !nextmask) { + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + amask = nextmask; + } + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + srca -= 2; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]); + if(!amask && !nextmask) { + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + dmask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + if(prefetch == 0) { + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = get_ilong_mmu030_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (amask) { + uae_u16 nextmask = movem_next[amask]; + srca -= 4; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]); + if(!dmask && !nextmask) { + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + amask = nextmask; + } + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + srca -= 4; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]); + if(!amask && !nextmask) { + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + dmask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + if(prefetch == 0) { + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030_state(2); + uaecptr srca; + srca = get_ilong_mmu030_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_49c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a48_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a88_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4aba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030_state(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030_state(srca, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030_state(srca, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_lrmw_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030_state(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_lrmw_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030_state(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_lrmw_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030_state(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_lrmw_byte_mmu030_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030_state(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c10_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c18_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c20_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c28_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c30_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c38_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c39_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 dst = get_long_mmu030_state(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uae_s32 dst; + dst = get_ilong_mmu030_state(4); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c40_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c50_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c58_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c60_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c68_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c70_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c78_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c79_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 dst = get_long_mmu030_state(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(2); + uae_s32 dst; + dst = get_ilong_mmu030_state(4); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_mmu030_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_mmu030_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu030_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpci(2); + Exception_cpu(src + 32); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 offs = get_iword_mmu030_state(2); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(olda, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 old = get_long_mmu030_state(src); + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = old; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iword_mmu030_state(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_mmu030_state(a); + uae_u32 pc = get_long_mmu030_state(a + 2); + uae_u16 format = get_word_mmu030_state(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_do_rte_mmu030(a); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } else if (frame == 0xb) { + m68k_do_rte_mmu030(a); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + else { + regs.t1 = regs.t0 = 0; + Exception_cpu(14); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(newpc); + branch_stack_pop_rte(oldpc); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu030_state(pca); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(pc); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + m68k_do_rts_mmu030(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word_mmu030_state(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu030_state(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if(regs.t0) check_t0_trace(); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030_state(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + put_long_mmu030_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu030_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu030_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu030_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + put_long_mmu030_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu030_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu030_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030_state(2); + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030_state(2); + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_iword_mmu030_state(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu030(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu030(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_ilong_mmu030_state(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu030(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030_state(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030_state(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_iword_mmu030_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(get_word_mmu030_state(m68k_areg(regs, srcreg))); + val += get_iword_mmu030_state(2); + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_iword_mmu030_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(get_byte_mmu030_state(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword_mmu030_state(2); + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) -= 2; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(m68k_areg(regs, dstreg), val); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s8 src = get_byte_mmu030_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu030_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s16 src = get_word_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s8 dst = get_byte_mmu030_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s16 dst = get_word_mmu030_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030_state(2); + uae_s32 dst = get_long_mmu030_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030(tmppc, 0); + uae_s32 src = get_long_mmu030_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030_state(2); + uae_s16 data = get_word_mmu030_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9d0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9e8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eac0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ead0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eae8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebc0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebe8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecc0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ece8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edc0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ede8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfa_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfb_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eec0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eed0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eee8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efc0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efd0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efe8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff8_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff9_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f000_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + uae_u16 extraa = 0; + mmu_op30(pc, opcode, extra, extraa); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f008_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + uae_u16 extraa = 0; + mmu_op30(pc, opcode, extra, extraa); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f010_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + mmu_op30(pc, opcode, extra, extraa); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f018_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + mmu_op30(pc, opcode, extra, extraa); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f020_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = extraa; + mmu_op30(pc, opcode, extra, extraa); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f028_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030_state(0); + m68k_incpci(2); + mmu_op30(pc, opcode, extra, extraa); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f030_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = get_disp_ea_020_mmu030(m68k_areg(regs, srcreg), 0); + mmu_op30(pc, opcode, extra, extraa); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f038_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = (uae_s32)(uae_s16)get_iword_mmu030_state(0); + m68k_incpci(2); + mmu_op30(pc, opcode, extra, extraa); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f039_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = get_ilong_mmu030_state(0); + m68k_incpci(4); + mmu_op30(pc, opcode, extra, extraa); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f200_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f208_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f210_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f218_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f220_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f228_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f230_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f238_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f239_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f240_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f248_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f250_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f258_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f260_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f268_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f270_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f278_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f279_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + uae_s16 dummy = get_iword_mmu030_state(4); + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + uae_s32 dummy; + dummy = get_ilong_mmu030_state(4); + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27c_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030_state(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f280_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030_state(0); + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f2c0_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_ilong_mmu030_state(0); + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f310_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f320_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f328_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f330_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f338_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f339_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f350_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f358_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f368_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f370_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f378_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f379_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37a_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37b_32_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif diff --git a/cpuemu_33.cpp b/cpuemu_33.cpp new file mode 100644 index 00000000..9d58c779 --- /dev/null +++ b/cpuemu_33.cpp @@ -0,0 +1,41967 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#include "cpummu.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu060(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu060(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu060(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu060(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu060(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu060(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu060(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu060(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu060(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu060(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu060(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu060(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu060(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu060(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu060(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu060(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_u16 val = (get_byte_mmu060(mempa) & 0xff) << 8; + val |= (get_byte_mmu060(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = get_ibyte_mmu060(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_u32 val = (get_byte_mmu060(mempa) & 0xff) << 24; + val |= (get_byte_mmu060(mempa + 2) & 0xff) << 16; + val |= (get_byte_mmu060(mempa + 4) & 0xff) << 8; + val |= (get_byte_mmu060(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + put_byte_mmu060(mempa, src >> 8); + put_byte_mmu060(mempa + 2, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + put_byte_mmu060(mempa, src >> 24); + put_byte_mmu060(mempa + 2, src >> 16); + put_byte_mmu060(mempa + 4, src >> 8); + put_byte_mmu060(mempa + 6, src); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu060(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu060(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu060(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu060(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu060(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu060(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu060(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu060(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu060(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu060(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu060(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu060(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu060(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu060(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu060(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu060(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu060(dsta); upper = get_long_mmu060(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu060(dsta); upper = get_long_mmu060(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu060(dsta); upper = get_long_mmu060(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu060(dsta); upper = get_long_mmu060(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu060(dsta); upper = get_long_mmu060(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu060(dsta); upper = get_long_mmu060(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu060(dsta); upper = get_long_mmu060(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_rmw_byte_mmu060(dsta, dst); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu060(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu060(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu060(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_lrmw_byte_mmu060(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_lrmw_byte_mmu060(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_lrmw_byte_mmu060(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_lrmw_byte_mmu060(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_byte_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s8 dst = get_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 dst = get_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s16 dst = get_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s16 dst = get_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + uae_s32 dst = get_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(10); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(6); + uae_s32 dst = get_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cbb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu060(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(4); + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpci(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpci(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_lrmw_word_mmu060(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(6); + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_lrmw_word_mmu060(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 dst = get_lrmw_word_mmu060(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(6); + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s16 dst = get_lrmw_word_mmu060(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(8); + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_word_mmu060(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 16 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu060(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_lrmw_word_mmu060(rn1), dst2 = get_lrmw_word_mmu060(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu060(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_word_mmu060(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc060_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc060_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + dfc060_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 src = sfc060_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + dfc060_put_byte(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 src = sfc060_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + dfc060_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 src = sfc060_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc060_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc060_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + dfc060_put_byte(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s8 src = sfc060_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu060(4); + dfc060_put_byte(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_ilong_mmu060(4); + uae_s8 src = sfc060_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc060_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc060_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + dfc060_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 src = sfc060_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + dfc060_put_word(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 src = sfc060_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + dfc060_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 src = sfc060_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc060_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc060_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + dfc060_put_word(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s16 src = sfc060_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu060(4); + dfc060_put_word(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_ilong_mmu060(4); + uae_s16 src = sfc060_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc060_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc060_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + dfc060_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 src = sfc060_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + dfc060_put_long(dsta, src); + m68k_incpci(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 src = sfc060_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + dfc060_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 src = sfc060_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc060_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc060_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + dfc060_put_long(dsta, src); + m68k_incpci(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 src = sfc060_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu060(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu060(4); + dfc060_put_long(dsta, src); + m68k_incpci(8); + } else { + uaecptr srca; + srca = get_ilong_mmu060(4); + uae_s32 src = sfc060_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu060(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(4); + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu060(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpci(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu060(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpci(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu060(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 dst = get_lrmw_long_mmu060(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(6); + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu060(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_lrmw_long_mmu060(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu060(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 dst = get_lrmw_long_mmu060(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(6); + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu060(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s32 dst = get_lrmw_long_mmu060(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpci(8); + op_unimpl (opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu060(dsta, (m68k_dreg(regs, ru))); + } else { + put_lrmw_long_mmu060(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(8); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 16 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu060(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_lrmw_long_mmu060(rn1), dst2 = get_lrmw_long_mmu060(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu060(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_long_mmu060(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_mmu060(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_mmu060(dsta, src); + m68k_incpci(10); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(10); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uaecptr dsta; + dsta = get_ilong_mmu060(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_mmu060(dsta, src); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_rmw_byte_mmu060(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_rmw_word_mmu060(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_rmw_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_rmw_word_mmu060(srca, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_rmw_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_rmw_word_mmu060(srca, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_rmw_word_mmu060(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_rmw_word_mmu060(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_rmw_word_mmu060(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_rmw_word_mmu060(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_rmw_long_mmu060(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_rmw_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_rmw_long_mmu060(srca, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_rmw_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_rmw_long_mmu060(srca, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_rmw_long_mmu060(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_rmw_long_mmu060(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_rmw_long_mmu060(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_rmw_long_mmu060(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + put_word_mmu060(srca, regs.sr); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + put_word_mmu060(srca, regs.sr); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + put_word_mmu060(srca, regs.sr); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + MakeSR(); + put_word_mmu060(srca, regs.sr); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + put_word_mmu060(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + MakeSR(); + put_word_mmu060(srca, regs.sr); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_ilong_mmu060(2); + MakeSR(); + put_word_mmu060(srca, regs.sr); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_mmu060(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_mmu060(srca, 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_mmu060(srca, 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_mmu060(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_mmu060(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_mmu060(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_mmu060(srca, 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_mmu060(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_mmu060(srca, 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_mmu060(srca, 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_mmu060(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_mmu060(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_mmu060(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_mmu060(srca, 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_mmu060(srca, 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_mmu060(srca, 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_mmu060(srca, 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_mmu060(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_mmu060(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_mmu060(srca, 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_mmu060(srca, 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + put_word_mmu060(srca, regs.sr & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + put_word_mmu060(srca, regs.sr & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + put_word_mmu060(srca, regs.sr & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + MakeSR(); + put_word_mmu060(srca, regs.sr & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + put_word_mmu060(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + MakeSR(); + put_word_mmu060(srca, regs.sr & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + MakeSR(); + put_word_mmu060(srca, regs.sr & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_rmw_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_rmw_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_rmw_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_rmw_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_rmw_byte_mmu060(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_rmw_byte_mmu060(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_rmw_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_rmw_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_rmw_word_mmu060(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_rmw_word_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_rmw_word_mmu060(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_rmw_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_rmw_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_rmw_long_mmu060(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_rmw_long_mmu060(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_rmw_long_mmu060(srca, dst); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_iword_mmu060(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 offs; + offs = get_ilong_mmu060(2); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + mmufixup[1].reg = 7 | 0x0; + mmufixup[1].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = olda; + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + put_long_mmu060(olda, src); + m68k_incpci(6); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_rmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_rmw_byte_mmu060(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_rmw_byte_mmu060(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_rmw_byte_mmu060(srca, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + put_long_mmu060(dsta, srca); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + put_long_mmu060(dsta, srca); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + put_long_mmu060(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + put_long_mmu060(dsta, srca); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + put_long_mmu060(dsta, srca); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + put_long_mmu060(dsta, srca); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + put_long_mmu060(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + while (amask) { + srca -= 2; + put_word_mmu060(srca, m68k_areg (regs, movem_index2[amask])); + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word_mmu060(srca, m68k_dreg (regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = get_ilong_mmu060(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + while (amask) { + srca -= 4; + put_long_mmu060(srca, m68k_areg (regs, movem_index2[amask])); + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + put_long_mmu060(srca, m68k_dreg (regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu060(2); + uaecptr srca; + srca = get_ilong_mmu060(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_mmu060(srca, m68k_dreg (regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_mmu060(srca, m68k_areg (regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_49c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = get_ibyte_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a48_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a88_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4aba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu060(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* HALT.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4ac8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + cpu_halt(CPU_HALT_68060_HALT); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* PULSE.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4acc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_lrmw_byte_mmu060(srca, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_lrmw_byte_mmu060(srca, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_lrmw_byte_mmu060(srca, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_lrmw_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_lrmw_byte_mmu060(srca, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_lrmw_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_lrmw_byte_mmu060(srca, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_lrmw_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_lrmw_byte_mmu060(srca, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_lrmw_byte_mmu060(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_lrmw_byte_mmu060(srca, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c10_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c18_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c20_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c28_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c30_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu060(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c38_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c39_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long_mmu060(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uae_s32 dst; + dst = get_ilong_mmu060(4); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c40_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c50_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c58_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c60_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c68_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c70_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu060(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c78_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c79_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_s32 dst = get_long_mmu060(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long_mmu060(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(2); + uae_s32 dst; + dst = get_ilong_mmu060(4); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_mmu060(4); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = (uae_s32)(uae_s16)get_word_mmu060(srca); + srca += 2; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_mmu060(4); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu060(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_u32 tmp[16]; + int tmpreg[16]; + int idx = 0; + while (dmask) { + tmpreg[idx] = movem_index1[dmask] + 0; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + tmpreg[idx] = movem_index1[amask] + 8; + tmp[idx++] = get_long_mmu060(srca); + srca += 4; + amask = movem_next[amask]; + } + while (--idx >= 0) { + regs.regs[tmpreg[idx]] = tmp[idx]; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpci(2); + Exception_cpu(src + 32); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + mmufixup[1].reg = 7 | 0x0; + mmufixup[1].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = olda; + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + put_long_mmu060(olda, src); + m68k_incpci(4); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 old = get_long_mmu060(src); + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = old; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iword_mmu060(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + if (!(sr & 0x2000)) { + Exception(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_mmu060(a); + uae_u32 pc = get_long_mmu060(a + 2); + uae_u16 format = get_word_mmu060(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_do_rte_mmu060 (a); m68k_areg(regs, 7) += offset + 8; break; } + else { + Exception_cpu(14); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + regs.sr = oldsr & 0xff00; + MakeFromSR(); + SET_ZFLG(newsr == 0); + SET_NFLG(newsr & 0x8000); + exception3_read_prefetch(opcode, newpc); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(newpc); + branch_stack_pop_rte(oldpc); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 offs = get_iword_mmu060(2); + uaecptr pca; + pca = m68k_areg(regs, 7); + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu060(pca); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, 7) += offs; + if (pc & 1) { + m68k_areg(regs, 7) -= 4 + offs; + exception3_read_prefetch_only(opcode, pc); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(pc); + if(regs.t0) check_t0_trace(); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + m68k_do_rts_mmu060(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci(oldpc); + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch_only(opcode, faultpc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + mmufixup[0].reg = 7 | 0x0; + mmufixup[0].value = m68k_areg(regs, 7); + uae_s16 sr = get_word_mmu060(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + mmufixup[1].reg = 7 | 0x0; + mmufixup[1].value = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu060(pca); + m68k_areg(regs, 7) += 4; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch(opcode, pc); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci(pc); + if(regs.t0) check_t0_trace(); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu060(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + put_long_mmu060(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu060(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu060(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu060(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + put_long_mmu060(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu060(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu060(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu060(2); + uaecptr oldpc = m68k_getpci(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu060(2); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_mmu060(srca, val); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu060(2); + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu060(2); + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(0)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(0)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(0)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_iword_mmu060(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu060(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu060(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_ilong_mmu060(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu060(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(2)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(2)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(2)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(3)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(3)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(3)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(4)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(4)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(4)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(5)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(5)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(5)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(6)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(6)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(6)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(7)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(7)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(7)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(8)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(8)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(8)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(9)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(9)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(9)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(10)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(10)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(10)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(11)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(11)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(11)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(12)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(12)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(12)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(13)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(13)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(13)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(14)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(14)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(14)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(15)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(15)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu060(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpci() + (uae_s32)src + 2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (cctrue(15)) { + m68k_incpci((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_iword_mmu060(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(get_word_mmu060(m68k_areg(regs, srcreg))); + val += get_iword_mmu060(2); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + put_byte_mmu060(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + m68k_incpci(4); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_iword_mmu060(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(get_byte_mmu060(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword_mmu060(2); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) -= 2; + put_word_mmu060(m68k_areg(regs, dstreg), val); + m68k_incpci(4); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_rmw_byte_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_rmw_word_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_rmw_long_mmu060(dsta, src); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_mmu060(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_ibyte_mmu060(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu060(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s8 dst = get_rmw_byte_mmu060(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_byte_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_rmw_word_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s16 dst = get_rmw_word_mmu060(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_word_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0x0; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_rmw_long_mmu060(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu060(2); + uae_s32 dst = get_rmw_long_mmu060(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_rmw_long_mmu060(dsta, newv); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu060(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_mmu060(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu060(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_rmw_word_mmu060(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_rmw_word_mmu060(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x0; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_rmw_word_mmu060(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_rmw_word_mmu060(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu060(2); + uae_s16 data = get_rmw_word_mmu060(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_rmw_word_mmu060(dataa, val); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9d0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9e8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eac0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ead0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eae8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebc0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebe8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecc0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ece8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edc0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ede8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfa_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfb_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eec0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eed0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eee8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efc0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efd0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efe8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + m68k_incpci(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff9_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu060(2); + uaecptr dsta; + dsta = get_ilong_mmu060(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = mmu060_get_rmw_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + mmu060_put_rmw_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f000_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f008_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f010_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f018_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f020_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f028_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f030_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f038_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f039_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + op_illg(opcode); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f200_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f208_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f210_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f218_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f220_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f228_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f230_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f238_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f239_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f240_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f248_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f250_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f258_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f260_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f268_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f270_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f278_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f279_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu060(2); + uae_s16 dummy = get_iword_mmu060(4); + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu060(2); + uae_s32 dummy; + dummy = get_ilong_mmu060(4); + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu060(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f280_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_iword_mmu060(0); + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f2c0_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_ilong_mmu060(0); + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f310_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f320_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f328_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f330_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f338_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f339_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f350_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f358_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f368_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f370_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f378_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f379_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f408_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f410_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f418_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f419_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41d_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41e_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41f_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f428_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f430_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f438_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f439_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43a_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43b_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43c_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43d_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43e_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43f_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + flush_mmu060(m68k_areg(regs, opcode & 3), (opcode >> 6) & 3); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f500_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f508_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f510_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f518_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f548_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f568_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PLPAW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f588_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* PLPAR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f5c8_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpci(2); + mmu_op(opcode, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (An)+,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f600_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_ilong_mmu060(2); + uae_u32 v[4]; + get_move16_mmu (memsa, v); + put_move16_mmu (memda, v); + m68k_areg(regs, srcreg) += 16; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (xxx).L,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f608_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_ilong_mmu060(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + uae_u32 v[4]; + get_move16_mmu (memsa, v); + put_move16_mmu (memda, v); + m68k_areg(regs, dstreg) += 16; + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (An),(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f610_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_ilong_mmu060(2); + uae_u32 v[4]; + get_move16_mmu (memsa, v); + put_move16_mmu (memda, v); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (xxx).L,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f618_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_ilong_mmu060(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + uae_u32 v[4]; + get_move16_mmu (memsa, v); + put_move16_mmu (memda, v); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MOVE16.L (An)+,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f620_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = 0; + uaecptr mems = m68k_areg(regs, srcreg) & ~15, memd; + dstreg = (get_iword_mmu060(2) >> 12) & 7; + memd = m68k_areg(regs, dstreg) & ~15; + uae_u32 v[4]; + get_move16_mmu (mems, v); + put_move16_mmu (memd, v); + if (srcreg != dstreg) + m68k_areg(regs, srcreg) += 16; + m68k_areg(regs, dstreg) += 16; + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* LPSTOP.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f800_33_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 sw = get_iword_mmu060(2); + if (sw != 0x01c0) { + Exception(11); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (!(regs.sr & 0x2000)) { + Exception(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u16 newsr = get_iword_mmu060(4); + if (!(newsr & 0x2000)) { + Exception(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr = newsr; + checkint(); + MakeFromSR_STOP(); + m68k_setstopped(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif diff --git a/cpuemu_34.cpp b/cpuemu_34.cpp new file mode 100644 index 00000000..32a3b718 --- /dev/null +++ b/cpuemu_34.cpp @@ -0,0 +1,45796 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#include "cpummu030.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_u16 val = (get_byte_mmu030c_state(mempa) & 0xff) << 8; + val |= (get_byte_mmu030c_state(mempa + 2) & 0xff); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_iword_mmu030c_state(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_u32 val = (get_byte_mmu030c_state(mempa) & 0xff) << 24; + val |= (get_byte_mmu030c_state(mempa + 2) & 0xff) << 16; + val |= (get_byte_mmu030c_state(mempa + 4) & 0xff) << 8; + val |= (get_byte_mmu030c_state(mempa + 6) & 0xff); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + put_byte_mmu030c_state(mempa, src >> 8); + put_byte_mmu030c_state(mempa + 2, src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + put_byte_mmu030c_state(mempa, src >> 24); + put_byte_mmu030c_state(mempa + 2, src >> 16); + put_byte_mmu030c_state(mempa + 4, src >> 8); + put_byte_mmu030c_state(mempa + 6, src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (4 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(0); + } else { + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(8); + } else { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cbb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(0); + } else { + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(8); + } else { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu030c_state(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_lrmw_word_mmu030c_state(rn1), dst2 = get_lrmw_word_mmu030c_state(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_word_mmu030c_state(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc030c_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 src = sfc030c_get_byte_state(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 src = sfc030c_get_byte_state(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 src = sfc030c_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte_state(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc030c_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 src = sfc030c_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte_state(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_s8 src = sfc030c_get_byte_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc030c_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 src = sfc030c_get_word_state(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 src = sfc030c_get_word_state(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 src = sfc030c_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word_state(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc030c_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 src = sfc030c_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word_state(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_s16 src = sfc030c_get_word_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc030c_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 src = sfc030c_get_long_state(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 src = sfc030c_get_long_state(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 src = sfc030c_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long_state(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc030c_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 src = sfc030c_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iword_mmu030c_state(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long_state(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_s32 src = sfc030c_get_long_state(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(0); + } else { + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, rc) = dst; + } + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(8); + } else { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(8); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu030c_state(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_lrmw_long_mmu030c_state(rn1), dst2 = get_lrmw_long_mmu030c_state(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_long_mmu030c_state(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(10); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(6); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_iword_mmu030c_state(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 offs; + offs = get_ilong_mmu030c_state(2); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(olda, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (amask) { + uae_u16 nextmask = movem_next[amask]; + srca -= 2; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + amask = nextmask; + } + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + srca -= 2; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + dmask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (amask) { + uae_u16 nextmask = movem_next[amask]; + srca -= 4; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + amask = nextmask; + } + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + srca -= 4; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + dmask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_49c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a48_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a88_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4aba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c10_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c18_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c20_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c28_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c30_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c38_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c39_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_s32 dst; + dst = get_ilong_mmu030c_state(4); + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c40_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c50_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c58_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c60_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c68_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c70_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c78_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c79_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + uae_s32 dst; + dst = get_ilong_mmu030c_state(4); + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + m68k_incpci(2); + Exception_cpu(src + 32); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 offs = get_iword_mmu030c_state(2); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(olda, src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 old = get_long_mmu030c_state(src); + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = old; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iword_mmu030c_state(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_mmu030c_state(a); + uae_u32 pc = get_long_mmu030c_state(a + 2); + uae_u16 format = get_word_mmu030c_state(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_do_rte_mmu030c(a); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } else if (frame == 0xb) { + m68k_do_rte_mmu030c(a); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + else { + regs.t1 = regs.t0 = 0; + Exception_cpu(14); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(newpc); + branch_stack_pop_rte(oldpc); + fill_prefetch_030_ntx(); + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu030c_state(pca); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(pc); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + m68k_do_rts_mmu030c(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word_mmu030c_state(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu030c_state(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpci(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + fill_prefetch_030(); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_setpci(srca); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + uaecptr oldpc = m68k_getpci(); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (src) { + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_iword_mmu030c_state(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu030c(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu030c(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_do_bsr_mmu030c(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + count_cycles += 34; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_iword_mmu030c_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(get_word_mmu030c_state(m68k_areg(regs, srcreg))); + val += get_iword_mmu030c_state(2); + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_iword_mmu030c_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(get_byte_mmu030c_state(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword_mmu030c_state(2); + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) -= 2; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(m68k_areg(regs, dstreg), val); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + count_cycles += 48; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (src); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + count_cycles += 20; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (newv); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return (2 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9d0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9e8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eac0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ead0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eae8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebc0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebe8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecc0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ece8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edc0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ede8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfa_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfb_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eec0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eed0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eee8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efc0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efd0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efe8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff8_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff9_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f000_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uae_u16 extraa = 0; + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f008_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uae_u16 extraa = 0; + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f010_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f018_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + if (mmu_op30(pc, opcode, extra, extraa)) { + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f020_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = extraa; + if (mmu_op30(pc, opcode, extra, extraa)) { + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f028_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + m68k_incpci(2); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f030_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f038_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + m68k_incpci(2); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f039_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = get_ilong_mmu030c_state(0); + m68k_incpci(4); + if (mmu_op30(pc, opcode, extra, extraa)) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f200_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f208_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f210_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f218_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f220_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f228_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f230_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f238_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f239_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f240_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f248_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f250_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f258_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f260_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f268_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f270_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f278_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f279_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + uae_s16 dummy = get_iword_mmu030c_state(4); + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(4); + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27c_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f280_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(0); + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f2c0_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_ilong_mmu030c_state(0); + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f310_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f320_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f328_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f330_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f338_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f339_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f350_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f358_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f368_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f370_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f378_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f379_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37a_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37b_34_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4; +} + +#endif diff --git a/cpuemu_35.cpp b/cpuemu_35.cpp new file mode 100644 index 00000000..32204a47 --- /dev/null +++ b/cpuemu_35.cpp @@ -0,0 +1,49181 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#include "cpummu030.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +void REGPARAM2 op_0000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +void REGPARAM2 op_0010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +void REGPARAM2 op_0018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +void REGPARAM2 op_0020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +void REGPARAM2 op_0028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +void REGPARAM2 op_0038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +void REGPARAM2 op_0039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +void REGPARAM2 op_003c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_0040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +void REGPARAM2 op_0050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +void REGPARAM2 op_0058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +void REGPARAM2 op_0060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +void REGPARAM2 op_0068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +void REGPARAM2 op_0078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +void REGPARAM2 op_0079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +void REGPARAM2 op_007c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if(regs.t0) check_t0_trace(); + regs.sr |= src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_0080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +void REGPARAM2 op_0090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +void REGPARAM2 op_0098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +void REGPARAM2 op_00a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +void REGPARAM2 op_00a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_00b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +void REGPARAM2 op_00b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +void REGPARAM2 op_00b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* op H:0,T:1,C:-1 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_00fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta); + upper = (uae_s32)(uae_s8)get_byte_mmu030c_state(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +void REGPARAM2 op_0100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +void REGPARAM2 op_0108_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* OP zero */ + uae_u16 val = (get_byte_mmu030c_state(mempa) & 0xff) << 8; + val |= (get_byte_mmu030c_state(mempa + 2) & 0xff); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +void REGPARAM2 op_0110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +void REGPARAM2 op_0118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +void REGPARAM2 op_0120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +void REGPARAM2 op_0128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +void REGPARAM2 op_0138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +void REGPARAM2 op_0139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +void REGPARAM2 op_013a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpci() + 2; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +void REGPARAM2 op_013b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +void REGPARAM2 op_013c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = (uae_u8)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +void REGPARAM2 op_0140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +void REGPARAM2 op_0148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* OP zero */ + uae_u32 val = (get_byte_mmu030c_state(mempa) & 0xff) << 24; + val |= (get_byte_mmu030c_state(mempa + 2) & 0xff) << 16; + val |= (get_byte_mmu030c_state(mempa + 4) & 0xff) << 8; + val |= (get_byte_mmu030c_state(mempa + 6) & 0xff); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +void REGPARAM2 op_0150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +void REGPARAM2 op_0158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +void REGPARAM2 op_0160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +void REGPARAM2 op_0168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_0170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +void REGPARAM2 op_0178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +void REGPARAM2 op_0179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +void REGPARAM2 op_0180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +void REGPARAM2 op_0188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + put_byte_mmu030c_state(mempa, src >> 8); + put_byte_mmu030c_state(mempa + 2, src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +void REGPARAM2 op_0190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +void REGPARAM2 op_0198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +void REGPARAM2 op_01a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +void REGPARAM2 op_01a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +void REGPARAM2 op_01b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +void REGPARAM2 op_01b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +void REGPARAM2 op_01c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +void REGPARAM2 op_01c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + put_byte_mmu030c_state(mempa, src >> 24); + put_byte_mmu030c_state(mempa + 2, src >> 16); + put_byte_mmu030c_state(mempa + 4, src >> 8); + put_byte_mmu030c_state(mempa + 6, src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +void REGPARAM2 op_01d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +void REGPARAM2 op_01d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +void REGPARAM2 op_01e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +void REGPARAM2 op_01e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_01f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +void REGPARAM2 op_01f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +void REGPARAM2 op_01f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_0200_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +void REGPARAM2 op_0210_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +void REGPARAM2 op_0218_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +void REGPARAM2 op_0220_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +void REGPARAM2 op_0228_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0230_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +void REGPARAM2 op_0238_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +void REGPARAM2 op_0239_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +void REGPARAM2 op_023c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_0240_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +void REGPARAM2 op_0250_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +void REGPARAM2 op_0258_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +void REGPARAM2 op_0260_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +void REGPARAM2 op_0268_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0270_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +void REGPARAM2 op_0278_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +void REGPARAM2 op_0279_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +void REGPARAM2 op_027c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if(regs.t0) check_t0_trace(); + regs.sr &= src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_0280_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +void REGPARAM2 op_0290_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +void REGPARAM2 op_0298_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +void REGPARAM2 op_02a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +void REGPARAM2 op_02a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_02b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +void REGPARAM2 op_02b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +void REGPARAM2 op_02b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_02fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta); + upper = (uae_s32)(uae_s16)get_word_mmu030c_state(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +void REGPARAM2 op_0400_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +void REGPARAM2 op_0410_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +void REGPARAM2 op_0418_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +void REGPARAM2 op_0420_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +void REGPARAM2 op_0428_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0430_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +void REGPARAM2 op_0438_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +void REGPARAM2 op_0439_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_0440_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +void REGPARAM2 op_0450_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +void REGPARAM2 op_0458_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +void REGPARAM2 op_0460_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +void REGPARAM2 op_0468_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0470_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +void REGPARAM2 op_0478_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +void REGPARAM2 op_0479_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_0480_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +void REGPARAM2 op_0490_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +void REGPARAM2 op_0498_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +void REGPARAM2 op_04a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +void REGPARAM2 op_04a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_04b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +void REGPARAM2 op_04b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +void REGPARAM2 op_04b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + m68k_incpci(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_04fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + /* OP zero */ + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_mmu030c_state(dsta); upper = get_long_mmu030c_state(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu(6); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +void REGPARAM2 op_0600_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +void REGPARAM2 op_0610_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +void REGPARAM2 op_0618_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +void REGPARAM2 op_0620_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +void REGPARAM2 op_0628_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0630_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +void REGPARAM2 op_0638_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +void REGPARAM2 op_0639_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_0640_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +void REGPARAM2 op_0650_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +void REGPARAM2 op_0658_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +void REGPARAM2 op_0660_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +void REGPARAM2 op_0668_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0670_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +void REGPARAM2 op_0678_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +void REGPARAM2 op_0679_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_0680_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +void REGPARAM2 op_0690_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +void REGPARAM2 op_0698_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +void REGPARAM2 op_06a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +void REGPARAM2 op_06a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_06b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +void REGPARAM2 op_06b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +void REGPARAM2 op_06b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_06fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +void REGPARAM2 op_0800_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +void REGPARAM2 op_0810_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +void REGPARAM2 op_0818_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +void REGPARAM2 op_0820_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +void REGPARAM2 op_0828_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0830_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +void REGPARAM2 op_0838_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +void REGPARAM2 op_0839_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +void REGPARAM2 op_083a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +void REGPARAM2 op_083b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +void REGPARAM2 op_0840_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +void REGPARAM2 op_0850_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +void REGPARAM2 op_0858_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +void REGPARAM2 op_0860_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +void REGPARAM2 op_0868_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_0870_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +void REGPARAM2 op_0878_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +void REGPARAM2 op_0879_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +void REGPARAM2 op_0880_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +void REGPARAM2 op_0890_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +void REGPARAM2 op_0898_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +void REGPARAM2 op_08a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +void REGPARAM2 op_08a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +void REGPARAM2 op_08b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +void REGPARAM2 op_08b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +void REGPARAM2 op_08c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +void REGPARAM2 op_08d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +void REGPARAM2 op_08d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +void REGPARAM2 op_08e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +void REGPARAM2 op_08e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +void REGPARAM2 op_08f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +void REGPARAM2 op_08f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +void REGPARAM2 op_08f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, dst); + return; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +void REGPARAM2 op_0a00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +void REGPARAM2 op_0a10_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +void REGPARAM2 op_0a18_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +void REGPARAM2 op_0a20_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +void REGPARAM2 op_0a28_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0a30_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +void REGPARAM2 op_0a38_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +void REGPARAM2 op_0a39_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +void REGPARAM2 op_0a3c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +void REGPARAM2 op_0a40_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +void REGPARAM2 op_0a50_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +void REGPARAM2 op_0a58_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +void REGPARAM2 op_0a60_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +void REGPARAM2 op_0a68_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0a70_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +void REGPARAM2 op_0a78_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +void REGPARAM2 op_0a79_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +void REGPARAM2 op_0a7c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + MakeSR(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +void REGPARAM2 op_0a80_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +void REGPARAM2 op_0a90_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +void REGPARAM2 op_0a98_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +void REGPARAM2 op_0aa0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +void REGPARAM2 op_0aa8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0ab0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +void REGPARAM2 op_0ab8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +void REGPARAM2 op_0ab9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* op H:0,T:1,C:-1 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ad8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ae8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(0); + } else { + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0af9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_lrmw_byte_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_byte_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(8); + } else { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +void REGPARAM2 op_0c00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +void REGPARAM2 op_0c10_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +void REGPARAM2 op_0c18_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +void REGPARAM2 op_0c20_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +void REGPARAM2 op_0c28_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_0c30_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +void REGPARAM2 op_0c38_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +void REGPARAM2 op_0c39_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c3a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c3b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:6,T:2,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 dst = get_byte_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +void REGPARAM2 op_0c40_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2+2=4,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +void REGPARAM2 op_0c50_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +void REGPARAM2 op_0c58_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:1,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +void REGPARAM2 op_0c60_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +void REGPARAM2 op_0c68_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_0c70_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +void REGPARAM2 op_0c78_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +void REGPARAM2 op_0c79_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:3,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c7a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0c7b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:6,T:2,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 dst = get_word_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +void REGPARAM2 op_0c80_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4+2=6,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2-,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +void REGPARAM2 op_0c90_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +void REGPARAM2 op_0c98_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:1,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +void REGPARAM2 op_0ca0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +void REGPARAM2 op_0ca8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_0cb0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +void REGPARAM2 op_0cb8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:6,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +void REGPARAM2 op_0cb9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:5,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(10); + return; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_getpci() + 6; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cbb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + /* ea H:8,T:2,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cd8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ce8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(0); + } else { + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cf9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s16 dst = get_lrmw_word_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(8); + } else { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0cfc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu030c_state(2); + /* OP zero */ + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_lrmw_word_mmu030c_state(rn1), dst2 = get_lrmw_word_mmu030c_state(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_word_mmu030c_state(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_word_mmu030c_state(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e10_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc030c_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e18_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 src = sfc030c_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e20_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 src = sfc030c_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e28_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 src = sfc030c_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e30_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc030c_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e38_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s8 src = sfc030c_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e39_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_byte(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_s8 src = sfc030c_get_byte(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpci(8); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e50_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc030c_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e58_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 src = sfc030c_get_word(srca); + m68k_areg(regs, dstreg) += 2; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e60_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 src = sfc030c_get_word(srca); + m68k_areg(regs, dstreg) = srca; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e68_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 src = sfc030c_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e70_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc030c_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e78_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s16 src = sfc030c_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e79_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_word(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_s16 src = sfc030c_get_word(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpci(8); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e90_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc030c_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0e98_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 src = sfc030c_get_long(srca); + m68k_areg(regs, dstreg) += 4; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(4); + src = regs.regs[(extra >> 12) & 15]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 src = sfc030c_get_long(srca); + m68k_areg(regs, dstreg) = srca; + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ea8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long(dsta, src); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 src = sfc030c_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc030c_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long(dsta, src); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 src = sfc030c_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0eb9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + dfc030c_put_long(dsta, src); + } else { + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_s32 src = sfc030c_get_long(srca); + /* OP zero */ + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpci(8); + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ed8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(4); + } else { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(4); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ee8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(0); + } else { + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_dreg(regs, rc) = dst; + } + return; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(6); + } else { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0ef9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s32 dst = get_lrmw_long_mmu030c_state(dsta); + /* OP zero */ + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(dsta, (m68k_dreg(regs, ru))); + regs.irc = get_iword_mmu030c_opcode_state(8); + } else { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_dreg(regs, rc) = dst; + } + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_0efc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 extra; + extra = get_ilong_mmu030c_state(2); + /* OP zero */ + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_lrmw_long_mmu030c_state(rn1), dst2 = get_lrmw_long_mmu030c_state(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_lrmw_long_mmu030c_state(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_lrmw_long_mmu030c_state(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +void REGPARAM2 op_1000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +void REGPARAM2 op_1010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +void REGPARAM2 op_1018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +void REGPARAM2 op_1020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +void REGPARAM2 op_1028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +void REGPARAM2 op_1030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +void REGPARAM2 op_1038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +void REGPARAM2 op_1039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +void REGPARAM2 op_103a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_103b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +void REGPARAM2 op_103c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +void REGPARAM2 op_1080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +void REGPARAM2 op_1090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +void REGPARAM2 op_1098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +void REGPARAM2 op_10a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +void REGPARAM2 op_10a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +void REGPARAM2 op_10b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +void REGPARAM2 op_10b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +void REGPARAM2 op_10b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +void REGPARAM2 op_10ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +void REGPARAM2 op_10bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +void REGPARAM2 op_10bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +void REGPARAM2 op_10c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +void REGPARAM2 op_10d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +void REGPARAM2 op_10d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +void REGPARAM2 op_10e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +void REGPARAM2 op_10e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +void REGPARAM2 op_10f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +void REGPARAM2 op_10f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +void REGPARAM2 op_10f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +void REGPARAM2 op_10fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_10fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +void REGPARAM2 op_10fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +void REGPARAM2 op_1100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +void REGPARAM2 op_1110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +void REGPARAM2 op_1118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +void REGPARAM2 op_1120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +void REGPARAM2 op_1128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +void REGPARAM2 op_1130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +void REGPARAM2 op_1138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +void REGPARAM2 op_1139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +void REGPARAM2 op_113a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +void REGPARAM2 op_113b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +void REGPARAM2 op_113c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +void REGPARAM2 op_1140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +void REGPARAM2 op_1150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +void REGPARAM2 op_1158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +void REGPARAM2 op_1160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +void REGPARAM2 op_1168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_1170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +void REGPARAM2 op_1178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +void REGPARAM2 op_1179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +void REGPARAM2 op_117a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_117b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +void REGPARAM2 op_117c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_1180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +void REGPARAM2 op_1190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +void REGPARAM2 op_1198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +void REGPARAM2 op_11a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_11a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_11b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_11b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_11ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_11bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +void REGPARAM2 op_11bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +void REGPARAM2 op_11c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +void REGPARAM2 op_11d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +void REGPARAM2 op_11d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +void REGPARAM2 op_11e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +void REGPARAM2 op_11e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_11f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +void REGPARAM2 op_11f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +void REGPARAM2 op_11f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +void REGPARAM2 op_11fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_11fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +void REGPARAM2 op_11fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +void REGPARAM2 op_13c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +void REGPARAM2 op_13d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +void REGPARAM2 op_13d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +void REGPARAM2 op_13e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +void REGPARAM2 op_13e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_13f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +void REGPARAM2 op_13f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +void REGPARAM2 op_13f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +void REGPARAM2 op_13fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_13fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +void REGPARAM2 op_13fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +void REGPARAM2 op_2000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +void REGPARAM2 op_2008_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +void REGPARAM2 op_2010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +void REGPARAM2 op_2018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +void REGPARAM2 op_2020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +void REGPARAM2 op_2028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +void REGPARAM2 op_2030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +void REGPARAM2 op_2038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +void REGPARAM2 op_2039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +void REGPARAM2 op_203a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_203b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +void REGPARAM2 op_203c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +void REGPARAM2 op_2040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +void REGPARAM2 op_2048_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +void REGPARAM2 op_2050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +void REGPARAM2 op_2058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +void REGPARAM2 op_2060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +void REGPARAM2 op_2068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +void REGPARAM2 op_2070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +void REGPARAM2 op_2078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +void REGPARAM2 op_2079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +void REGPARAM2 op_207a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_207b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +void REGPARAM2 op_207c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + m68k_areg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +void REGPARAM2 op_2080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +void REGPARAM2 op_2088_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +void REGPARAM2 op_2090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +void REGPARAM2 op_2098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +void REGPARAM2 op_20a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +void REGPARAM2 op_20a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +void REGPARAM2 op_20b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +void REGPARAM2 op_20b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +void REGPARAM2 op_20b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +void REGPARAM2 op_20ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +void REGPARAM2 op_20bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +void REGPARAM2 op_20bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +void REGPARAM2 op_20c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +void REGPARAM2 op_20c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +void REGPARAM2 op_20d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +void REGPARAM2 op_20d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +void REGPARAM2 op_20e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +void REGPARAM2 op_20e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +void REGPARAM2 op_20f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +void REGPARAM2 op_20f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +void REGPARAM2 op_20f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +void REGPARAM2 op_20fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_20fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +void REGPARAM2 op_20fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +void REGPARAM2 op_2100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +void REGPARAM2 op_2108_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +void REGPARAM2 op_2110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +void REGPARAM2 op_2118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +void REGPARAM2 op_2120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +void REGPARAM2 op_2128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +void REGPARAM2 op_2130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +void REGPARAM2 op_2138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +void REGPARAM2 op_2139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +void REGPARAM2 op_213a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +void REGPARAM2 op_213b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +void REGPARAM2 op_213c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +void REGPARAM2 op_2140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +void REGPARAM2 op_2148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +void REGPARAM2 op_2150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +void REGPARAM2 op_2158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +void REGPARAM2 op_2160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +void REGPARAM2 op_2168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_2170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +void REGPARAM2 op_2178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +void REGPARAM2 op_2179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +void REGPARAM2 op_217a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_217b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +void REGPARAM2 op_217c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_2180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +void REGPARAM2 op_2188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +void REGPARAM2 op_2190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +void REGPARAM2 op_2198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +void REGPARAM2 op_21a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_21a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_21b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_21b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_21ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_21bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +void REGPARAM2 op_21bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +void REGPARAM2 op_21c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +void REGPARAM2 op_21c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +void REGPARAM2 op_21d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +void REGPARAM2 op_21d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +void REGPARAM2 op_21e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +void REGPARAM2 op_21e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_21f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +void REGPARAM2 op_21f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +void REGPARAM2 op_21f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +void REGPARAM2 op_21fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_21fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +void REGPARAM2 op_21fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +void REGPARAM2 op_23c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +void REGPARAM2 op_23c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +void REGPARAM2 op_23d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +void REGPARAM2 op_23d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +void REGPARAM2 op_23e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +void REGPARAM2 op_23e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_23f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +void REGPARAM2 op_23f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +void REGPARAM2 op_23f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +void REGPARAM2 op_23fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_23fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +void REGPARAM2 op_23fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 fiea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +void REGPARAM2 op_3000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +void REGPARAM2 op_3008_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +void REGPARAM2 op_3010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +void REGPARAM2 op_3018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +void REGPARAM2 op_3020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +void REGPARAM2 op_3028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +void REGPARAM2 op_3030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +void REGPARAM2 op_3038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +void REGPARAM2 op_3039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +void REGPARAM2 op_303a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_303b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +void REGPARAM2 op_303c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +void REGPARAM2 op_3040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +void REGPARAM2 op_3048_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + src = (uae_s32)(uae_s16)src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +void REGPARAM2 op_3050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +void REGPARAM2 op_3058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +void REGPARAM2 op_3060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +void REGPARAM2 op_3068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +void REGPARAM2 op_3070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +void REGPARAM2 op_3078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +void REGPARAM2 op_3079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +void REGPARAM2 op_307a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +void REGPARAM2 op_307b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +void REGPARAM2 op_307c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +void REGPARAM2 op_3080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +void REGPARAM2 op_3088_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +void REGPARAM2 op_3090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +void REGPARAM2 op_3098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +void REGPARAM2 op_30a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +void REGPARAM2 op_30a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +void REGPARAM2 op_30b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +void REGPARAM2 op_30b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +void REGPARAM2 op_30b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +void REGPARAM2 op_30ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +void REGPARAM2 op_30bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +void REGPARAM2 op_30bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +void REGPARAM2 op_30c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +void REGPARAM2 op_30c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +void REGPARAM2 op_30d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +void REGPARAM2 op_30d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +void REGPARAM2 op_30e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +void REGPARAM2 op_30e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +void REGPARAM2 op_30f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +void REGPARAM2 op_30f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +void REGPARAM2 op_30f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +void REGPARAM2 op_30fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +void REGPARAM2 op_30fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +void REGPARAM2 op_30fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +void REGPARAM2 op_3100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +void REGPARAM2 op_3108_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:2,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +void REGPARAM2 op_3110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +void REGPARAM2 op_3118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +void REGPARAM2 op_3120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +void REGPARAM2 op_3128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +void REGPARAM2 op_3130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +void REGPARAM2 op_3138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +void REGPARAM2 op_3139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +void REGPARAM2 op_313a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +void REGPARAM2 op_313b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +void REGPARAM2 op_313c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) = dsta; + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +void REGPARAM2 op_3140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +void REGPARAM2 op_3148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +void REGPARAM2 op_3150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +void REGPARAM2 op_3158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +void REGPARAM2 op_3160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +void REGPARAM2 op_3168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +void REGPARAM2 op_3170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +void REGPARAM2 op_3178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +void REGPARAM2 op_3179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +void REGPARAM2 op_317a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +void REGPARAM2 op_317b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +void REGPARAM2 op_317c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_3180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +void REGPARAM2 op_3188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +void REGPARAM2 op_3190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +void REGPARAM2 op_3198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +void REGPARAM2 op_31a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +void REGPARAM2 op_31a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +void REGPARAM2 op_31b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +void REGPARAM2 op_31b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(6); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +void REGPARAM2 op_31ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +void REGPARAM2 op_31bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_31bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +void REGPARAM2 op_31c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +void REGPARAM2 op_31c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +void REGPARAM2 op_31d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +void REGPARAM2 op_31d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +void REGPARAM2 op_31e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +void REGPARAM2 op_31e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +void REGPARAM2 op_31f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +void REGPARAM2 op_31f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +void REGPARAM2 op_31f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +void REGPARAM2 op_31fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +void REGPARAM2 op_31fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +void REGPARAM2 op_31fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +void REGPARAM2 op_33c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +void REGPARAM2 op_33c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +void REGPARAM2 op_33d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +void REGPARAM2 op_33d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +void REGPARAM2 op_33e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +void REGPARAM2 op_33e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +void REGPARAM2 op_33f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +void REGPARAM2 op_33f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +void REGPARAM2 op_33f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(6); + regs.irc = get_iword_mmu030c_opcode_state(10); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(10); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +void REGPARAM2 op_33fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +void REGPARAM2 op_33fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +void REGPARAM2 op_33fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 fiea */ + uae_s16 src = get_iword_mmu030c_state(2); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + regs.irc = get_iword_mmu030c_opcode_state(8); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +void REGPARAM2 op_4000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +void REGPARAM2 op_4010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +void REGPARAM2 op_4018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +void REGPARAM2 op_4020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +void REGPARAM2 op_4028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +void REGPARAM2 op_4030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +void REGPARAM2 op_4038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +void REGPARAM2 op_4039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +void REGPARAM2 op_4040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +void REGPARAM2 op_4050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +void REGPARAM2 op_4058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +void REGPARAM2 op_4060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +void REGPARAM2 op_4068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +void REGPARAM2 op_4070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +void REGPARAM2 op_4078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +void REGPARAM2 op_4079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, newv); + return; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +void REGPARAM2 op_4080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +void REGPARAM2 op_4090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +void REGPARAM2 op_4098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +void REGPARAM2 op_40a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +void REGPARAM2 op_40a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +void REGPARAM2 op_40b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +void REGPARAM2 op_40b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +void REGPARAM2 op_40b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, newv); + return; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +void REGPARAM2 op_40c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* op H:2,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +void REGPARAM2 op_40d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +void REGPARAM2 op_40d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +void REGPARAM2 op_40e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +void REGPARAM2 op_40e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +void REGPARAM2 op_40f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +void REGPARAM2 op_40f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +void REGPARAM2 op_40f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr); + return; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + mmufixup[0].reg = -1; + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_413c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +void REGPARAM2 op_4180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +void REGPARAM2 op_4190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +void REGPARAM2 op_4198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +void REGPARAM2 op_41a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + mmufixup[0].reg = -1; + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +void REGPARAM2 op_41a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +void REGPARAM2 op_41b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +void REGPARAM2 op_41b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +void REGPARAM2 op_41b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +void REGPARAM2 op_41ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_41bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +void REGPARAM2 op_41bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + m68k_incpci(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu(6); + return; + } + setchkundefinedflags(src, dst, 1); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +void REGPARAM2 op_41d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +void REGPARAM2 op_41e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +void REGPARAM2 op_41f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (srca); + return; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +void REGPARAM2 op_41f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +void REGPARAM2 op_41f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +void REGPARAM2 op_41fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, dstreg) = (srca); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +void REGPARAM2 op_41fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + /* op H:2-,T:0,C:-2 */ + regs.irc = get_iword_mmu030c_opcode_state(0); + m68k_areg(regs, dstreg) = (srca); + return; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +void REGPARAM2 op_4200_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +void REGPARAM2 op_4210_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +void REGPARAM2 op_4218_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +void REGPARAM2 op_4220_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +void REGPARAM2 op_4228_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +void REGPARAM2 op_4230_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +void REGPARAM2 op_4238_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +void REGPARAM2 op_4239_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, 0); + return; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +void REGPARAM2 op_4240_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +void REGPARAM2 op_4250_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +void REGPARAM2 op_4258_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +void REGPARAM2 op_4260_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +void REGPARAM2 op_4268_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +void REGPARAM2 op_4270_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +void REGPARAM2 op_4278_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +void REGPARAM2 op_4279_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, 0); + return; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +void REGPARAM2 op_4280_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +void REGPARAM2 op_4290_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +void REGPARAM2 op_4298_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +void REGPARAM2 op_42a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +void REGPARAM2 op_42a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +void REGPARAM2 op_42b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +void REGPARAM2 op_42b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +void REGPARAM2 op_42b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, 0); + return; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* op H:2,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + MakeSR(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2+2=4,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_42f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4+2=6,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + /* op H:2-,T:0,C:-2 */ + MakeSR(); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, regs.sr & 0xff); + return; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +void REGPARAM2 op_4400_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +void REGPARAM2 op_4410_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +void REGPARAM2 op_4418_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +void REGPARAM2 op_4420_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +void REGPARAM2 op_4428_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +void REGPARAM2 op_4430_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +void REGPARAM2 op_4438_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +void REGPARAM2 op_4439_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +void REGPARAM2 op_4440_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +void REGPARAM2 op_4450_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +void REGPARAM2 op_4458_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +void REGPARAM2 op_4460_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +void REGPARAM2 op_4468_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +void REGPARAM2 op_4470_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +void REGPARAM2 op_4478_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +void REGPARAM2 op_4479_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +void REGPARAM2 op_4480_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +void REGPARAM2 op_4490_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +void REGPARAM2 op_4498_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +void REGPARAM2 op_44a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +void REGPARAM2 op_44a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +void REGPARAM2 op_44b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +void REGPARAM2 op_44b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +void REGPARAM2 op_44b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +void REGPARAM2 op_44c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +void REGPARAM2 op_44d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +void REGPARAM2 op_44d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +void REGPARAM2 op_44e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +void REGPARAM2 op_44e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +void REGPARAM2 op_44f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + return; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +void REGPARAM2 op_44f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +void REGPARAM2 op_44f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +void REGPARAM2 op_44fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +void REGPARAM2 op_44fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + return; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +void REGPARAM2 op_44fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + intlev_load(); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +void REGPARAM2 op_4600_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +void REGPARAM2 op_4610_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +void REGPARAM2 op_4618_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +void REGPARAM2 op_4620_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +void REGPARAM2 op_4628_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +void REGPARAM2 op_4630_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +void REGPARAM2 op_4638_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +void REGPARAM2 op_4639_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, dst); + return; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +void REGPARAM2 op_4640_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +void REGPARAM2 op_4650_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +void REGPARAM2 op_4658_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +void REGPARAM2 op_4660_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +void REGPARAM2 op_4668_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +void REGPARAM2 op_4670_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +void REGPARAM2 op_4678_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +void REGPARAM2 op_4679_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(srca, dst); + return; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +void REGPARAM2 op_4680_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +void REGPARAM2 op_4690_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +void REGPARAM2 op_4698_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +void REGPARAM2 op_46a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +void REGPARAM2 op_46a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +void REGPARAM2 op_46b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +void REGPARAM2 op_46b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +void REGPARAM2 op_46b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(srca, dst); + return; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +void REGPARAM2 op_46c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +void REGPARAM2 op_46d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + return; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +void REGPARAM2 op_46d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +void REGPARAM2 op_46e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(2); + fill_prefetch_030_ntx(); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +void REGPARAM2 op_46e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +void REGPARAM2 op_46f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + fill_prefetch_030_ntx(); + return; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +void REGPARAM2 op_46f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +void REGPARAM2 op_46f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(6); + fill_prefetch_030_ntx(); + return; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +void REGPARAM2 op_46fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +void REGPARAM2 op_46fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + fill_prefetch_030_ntx(); + return; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +void REGPARAM2 op_46fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:8 */ + if(regs.t0) check_t0_trace(); + regs.sr = src; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + m68k_incpci(4); + fill_prefetch_030_ntx(); + return; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +void REGPARAM2 op_4800_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4808_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 offs; + offs = get_ilong_mmu030c_state(2); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(olda, src); + return; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +void REGPARAM2 op_4810_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +void REGPARAM2 op_4818_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +void REGPARAM2 op_4820_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +void REGPARAM2 op_4828_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +void REGPARAM2 op_4830_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +void REGPARAM2 op_4838_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +void REGPARAM2 op_4839_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + /* OP zero */ + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, newv); + return; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +void REGPARAM2 op_4840_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4848_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg_noret(opcode); + return; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +void REGPARAM2 op_4850_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +void REGPARAM2 op_4868_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +void REGPARAM2 op_4870_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +void REGPARAM2 op_4878_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +void REGPARAM2 op_4879_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +void REGPARAM2 op_487a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +void REGPARAM2 op_487b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:2,C:-2 */ + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + mmufixup[0].reg = 7 | 0xa00; + mmufixup[0].value = m68k_areg(regs, 7); + m68k_areg(regs, 7) = dsta; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, srca); + mmufixup[0].reg = -1; + return; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +void REGPARAM2 op_4880_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +void REGPARAM2 op_4890_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +void REGPARAM2 op_48a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (amask) { + uae_u16 nextmask = movem_next[amask]; + srca -= 2; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + amask = nextmask; + } + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + srca -= 2; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + dmask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +void REGPARAM2 op_48a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_48b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +void REGPARAM2 op_48b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +void REGPARAM2 op_48b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_word_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + } + return; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +void REGPARAM2 op_48c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +void REGPARAM2 op_48d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +void REGPARAM2 op_48e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (amask) { + uae_u16 nextmask = movem_next[amask]; + srca -= 4; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index2[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + amask = nextmask; + } + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + srca -= 4; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index2[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + m68k_areg(regs, dstreg) = srca; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + movem_cnt++; + dmask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + } + return; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +void REGPARAM2 op_48e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_48f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(0); + } + return; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +void REGPARAM2 op_48f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + } + return; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +void REGPARAM2 op_48f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + int prefetch = 0; + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_dreg(regs, movem_index1[dmask]); + if(!amask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + } else { + mmu030_data_buffer_out = m68k_areg(regs, movem_index1[amask]); + if(!dmask && !nextmask) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM1; + prefetch = 1; + } + put_long_mmu030c(srca, mmu030_data_buffer_out); + } + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + if(prefetch == 0) { + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + } + return; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_49c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +void REGPARAM2 op_4a00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (An) */ +void REGPARAM2 op_4a10_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +void REGPARAM2 op_4a18_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +void REGPARAM2 op_4a20_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +void REGPARAM2 op_4a28_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +void REGPARAM2 op_4a30_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +void REGPARAM2 op_4a38_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +void REGPARAM2 op_4a39_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a3c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +void REGPARAM2 op_4a40_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a48_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +void REGPARAM2 op_4a50_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +void REGPARAM2 op_4a58_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +void REGPARAM2 op_4a60_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +void REGPARAM2 op_4a68_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +void REGPARAM2 op_4a70_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +void REGPARAM2 op_4a78_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +void REGPARAM2 op_4a79_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a7c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +void REGPARAM2 op_4a80_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4a88_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +void REGPARAM2 op_4a90_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +void REGPARAM2 op_4a98_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +void REGPARAM2 op_4aa0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +void REGPARAM2 op_4aa8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +void REGPARAM2 op_4ab0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +void REGPARAM2 op_4ab8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +void REGPARAM2 op_4ab9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4aba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4abb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4abc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +void REGPARAM2 op_4ac0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +void REGPARAM2 op_4ad0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +void REGPARAM2 op_4ad8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +void REGPARAM2 op_4ae0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +void REGPARAM2 op_4ae8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +void REGPARAM2 op_4af0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +void REGPARAM2 op_4af8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +void REGPARAM2 op_4af9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_lrmw_byte_mmu030c_state(srca); + /* OP zero */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_lrmw_byte_mmu030c_state(srca, src); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c10_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c18_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c20_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:0,C:28 */ + m68k_incpci(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c28_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c30_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:2,T:0,C:28 */ + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c38_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c39_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:2,T:0,C:28 */ + m68k_incpci(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:2,T:0,C:28 */ + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c3c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:28 */ + uae_s32 dst; + dst = get_ilong_mmu030c_state(4); + /* op H:2,T:0,C:28 */ + m68k_incpci(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c40_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c50_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c58_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c60_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:0,T:0,C:50 */ + m68k_incpci(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c68_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c70_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:0,T:0,C:50 */ + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c78_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c79_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:0,T:0,C:50 */ + m68k_incpci(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 dst = get_long_mmu030c_state(dsta); + /* op H:0,T:0,C:50 */ + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4c7c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:50 */ + uae_s32 dst; + dst = get_ilong_mmu030c_state(4); + /* op H:0,T:0,C:50 */ + m68k_incpci(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +void REGPARAM2 op_4c90_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +void REGPARAM2 op_4c98_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +void REGPARAM2 op_4ca8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cb0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +void REGPARAM2 op_4cb8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +void REGPARAM2 op_4cb9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +void REGPARAM2 op_4cba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cbb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = (uae_s32)(uae_s16)mmu030_data_buffer_out; + } else { + val = (uae_s32)(uae_s16)get_word_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 2; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +void REGPARAM2 op_4cd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +void REGPARAM2 op_4cd8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + m68k_areg(regs, dstreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +void REGPARAM2 op_4ce8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +void REGPARAM2 op_4cf0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +void REGPARAM2 op_4cf8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +void REGPARAM2 op_4cf9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_ilong_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +void REGPARAM2 op_4cfa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpci() + 4; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +void REGPARAM2 op_4cfb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_u16 mask = get_iword_mmu030c_state(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + mmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1; + int movem_cnt = 0; + uae_u32 val; + srca = state_store_mmu030(srca); + while (dmask) { + uae_u16 nextmask = movem_next[dmask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_dreg (regs, movem_index1[dmask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + dmask = nextmask; + } + while (amask) { + uae_u16 nextmask = movem_next[amask]; + if (mmu030_state[0] == movem_cnt) { + if (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) { + mmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2; + val = mmu030_data_buffer_out; + } else { + val = get_long_mmu030c(srca); + } + m68k_areg (regs, movem_index1[amask]) = val; + mmu030_state[0]++; + } + srca += 4; + movem_cnt++; + amask = nextmask; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +void REGPARAM2 op_4e40_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uae_u32 src = srcreg; + /* OP zero */ + m68k_incpci(2); + Exception_cpu(src + 32); + return; + return; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +void REGPARAM2 op_4e50_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 offs = get_iword_mmu030c_state(2); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(olda, src); + return; +} +/* 4 0,0 */ + +/* UNLK.L An */ +void REGPARAM2 op_4e58_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + /* OP zero */ + uae_s32 old = get_long_mmu030c_state(src); + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = old; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +void REGPARAM2 op_4e60_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uae_s32 src = m68k_areg(regs, srcreg); + /* op H:4,T:0,C:-4 */ + regs.usp = src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +void REGPARAM2 op_4e68_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + /* op H:4,T:0,C:-4 */ + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RESET.L */ +void REGPARAM2 op_4e70_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + bool r = cpureset(); + if (r) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* NOP.L */ +void REGPARAM2 op_4e71_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +void REGPARAM2 op_4e72_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + if (!regs.stopped) { + uae_s16 src = get_iword_mmu030c_state(2); + /* op H:0,T:0,C:8 */ + regs.ir = src; + } + uae_u16 sr = regs.ir; + ipl_fetch_next(); + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return; +} + +/* RTE.L */ +void REGPARAM2 op_4e73_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + /* op H:1,T:9,C:8 */ + uaecptr oldpc = m68k_getpci(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_mmu030c_state(a); + uae_u32 pc = get_long_mmu030c_state(a + 2); + uae_u16 format = get_word_mmu030c_state(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_do_rte_mmu030c(a); + return; + } else if (frame == 0xb) { + m68k_do_rte_mmu030c(a); + return; + } + else { + regs.t1 = regs.t0 = 0; + Exception_cpu(14); + return; + } + regs.sr = newsr; + oldsr = newsr; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + } + regs.sr = newsr; + intlev_load(); + ipl_fetch_now(); + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return; + } + m68k_setpci(newpc); + branch_stack_pop_rte(oldpc); + fill_prefetch_030_ntx(); + return; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e74_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + /* op H:2,T:0,C:8 */ + uae_s16 offs = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:8 */ + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu030c_state(pca); + m68k_areg(regs, 7) += 4; + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return; + } + m68k_setpci(pc); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +void REGPARAM2 op_4e75_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* op H:1,T:0,C:8 */ + uaecptr oldpc = m68k_getpci(); + m68k_do_rts_mmu030c(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +void REGPARAM2 op_4e76_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (GET_VFLG()) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +/* RTR.L */ +void REGPARAM2 op_4e77_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word_mmu030c_state(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_mmu030c_state(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + intlev_load(); + m68k_setpci(pc); + if (m68k_getpci() & 1) { + uaecptr faultpc = m68k_getpci(); + m68k_setpci(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return; + } + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + /* op H:6,T:0,C:-6 */ + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_4e7b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 src = get_iword_mmu030c_state(2); + /* op H:6,T:0,C:-6 */ + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +void REGPARAM2 op_4e90_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +void REGPARAM2 op_4ea8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +void REGPARAM2 op_4eb0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +void REGPARAM2 op_4eb8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 jea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +void REGPARAM2 op_4eb9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 jea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +void REGPARAM2 op_4eba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +void REGPARAM2 op_4ebb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 0; + put_long_mmu030c_state(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +void REGPARAM2 op_4ed0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2+4=6,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +void REGPARAM2 op_4ee8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4+4=8,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +void REGPARAM2 op_4ef0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + /* op H:4,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +void REGPARAM2 op_4ef8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2+4=6,T:0,C:0 jea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +void REGPARAM2 op_4ef9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2+4=6,T:0,C:0 jea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +void REGPARAM2 op_4efa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4+4=8,T:0,C:0 jea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + /* op H:4-,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 2 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +void REGPARAM2 op_4efb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:0,T:0,C:0 jea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + /* op H:4,T:0,C:-4 */ + if (srca & 1) { + count_cycles += 6 * CYCLE_UNIT / 2; + m68k_incpci(2); + exception3_read_prefetch_only(opcode, srca); + return; + } + m68k_setpci(srca); + fill_prefetch_030(); + return; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +void REGPARAM2 op_5000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +void REGPARAM2 op_5010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +void REGPARAM2 op_5018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +void REGPARAM2 op_5020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +void REGPARAM2 op_5028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +void REGPARAM2 op_5038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +void REGPARAM2 op_5039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +void REGPARAM2 op_5040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +void REGPARAM2 op_5048_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +void REGPARAM2 op_5050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +void REGPARAM2 op_5058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +void REGPARAM2 op_5060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +void REGPARAM2 op_5068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +void REGPARAM2 op_5078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +void REGPARAM2 op_5079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +void REGPARAM2 op_5080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +void REGPARAM2 op_5088_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +void REGPARAM2 op_5090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +void REGPARAM2 op_5098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +void REGPARAM2 op_50a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +void REGPARAM2 op_50a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_50b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +void REGPARAM2 op_50b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +void REGPARAM2 op_50b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +void REGPARAM2 op_50c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +void REGPARAM2 op_50c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(0)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +void REGPARAM2 op_50d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +void REGPARAM2 op_50d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +void REGPARAM2 op_50e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +void REGPARAM2 op_50e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +void REGPARAM2 op_50f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +void REGPARAM2 op_50f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +void REGPARAM2 op_50f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(0) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_50fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(0)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +void REGPARAM2 op_5100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +void REGPARAM2 op_5110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +void REGPARAM2 op_5118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +void REGPARAM2 op_5120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +void REGPARAM2 op_5128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +void REGPARAM2 op_5130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +void REGPARAM2 op_5138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +void REGPARAM2 op_5139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +void REGPARAM2 op_5140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +void REGPARAM2 op_5148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +void REGPARAM2 op_5150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +void REGPARAM2 op_5158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +void REGPARAM2 op_5160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +void REGPARAM2 op_5168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +void REGPARAM2 op_5170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +void REGPARAM2 op_5178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +void REGPARAM2 op_5179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +void REGPARAM2 op_5180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +void REGPARAM2 op_5188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +void REGPARAM2 op_5190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +void REGPARAM2 op_5198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +void REGPARAM2 op_51a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +void REGPARAM2 op_51a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +void REGPARAM2 op_51b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +void REGPARAM2 op_51b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:2,T:2,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +void REGPARAM2 op_51b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + /* ea H:1,T:0,C:0 fea */ + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +void REGPARAM2 op_51c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +void REGPARAM2 op_51c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(1)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +void REGPARAM2 op_51d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +void REGPARAM2 op_51d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +void REGPARAM2 op_51e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +void REGPARAM2 op_51e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +void REGPARAM2 op_51f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +void REGPARAM2 op_51f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +void REGPARAM2 op_51f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(1) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_51fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(1)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +void REGPARAM2 op_52c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +void REGPARAM2 op_52c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(2)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +void REGPARAM2 op_52d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +void REGPARAM2 op_52d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +void REGPARAM2 op_52e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +void REGPARAM2 op_52e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +void REGPARAM2 op_52f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +void REGPARAM2 op_52f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +void REGPARAM2 op_52f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(2) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_52fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(2)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +void REGPARAM2 op_53c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +void REGPARAM2 op_53c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(3)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +void REGPARAM2 op_53d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +void REGPARAM2 op_53d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +void REGPARAM2 op_53e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +void REGPARAM2 op_53e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +void REGPARAM2 op_53f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +void REGPARAM2 op_53f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +void REGPARAM2 op_53f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(3) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_53fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(3)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +void REGPARAM2 op_54c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +void REGPARAM2 op_54c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(4)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +void REGPARAM2 op_54d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +void REGPARAM2 op_54d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +void REGPARAM2 op_54e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +void REGPARAM2 op_54e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +void REGPARAM2 op_54f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +void REGPARAM2 op_54f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +void REGPARAM2 op_54f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(4) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_54fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(4)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +void REGPARAM2 op_55c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +void REGPARAM2 op_55c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(5)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +void REGPARAM2 op_55d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +void REGPARAM2 op_55d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +void REGPARAM2 op_55e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +void REGPARAM2 op_55e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +void REGPARAM2 op_55f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +void REGPARAM2 op_55f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +void REGPARAM2 op_55f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(5) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_55fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(5)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +void REGPARAM2 op_56c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +void REGPARAM2 op_56c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(6)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +void REGPARAM2 op_56d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +void REGPARAM2 op_56d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +void REGPARAM2 op_56e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +void REGPARAM2 op_56e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +void REGPARAM2 op_56f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +void REGPARAM2 op_56f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +void REGPARAM2 op_56f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(6) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_56fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(6)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +void REGPARAM2 op_57c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +void REGPARAM2 op_57c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(7)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +void REGPARAM2 op_57d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +void REGPARAM2 op_57d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +void REGPARAM2 op_57e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +void REGPARAM2 op_57e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +void REGPARAM2 op_57f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +void REGPARAM2 op_57f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +void REGPARAM2 op_57f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(7) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_57fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(7)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +void REGPARAM2 op_58c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +void REGPARAM2 op_58c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(8)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +void REGPARAM2 op_58d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +void REGPARAM2 op_58d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +void REGPARAM2 op_58e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +void REGPARAM2 op_58e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +void REGPARAM2 op_58f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +void REGPARAM2 op_58f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +void REGPARAM2 op_58f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(8) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_58fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(8)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +void REGPARAM2 op_59c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +void REGPARAM2 op_59c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(9)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +void REGPARAM2 op_59d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +void REGPARAM2 op_59d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +void REGPARAM2 op_59e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +void REGPARAM2 op_59e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +void REGPARAM2 op_59f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +void REGPARAM2 op_59f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +void REGPARAM2 op_59f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(9) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_59fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(9)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +void REGPARAM2 op_5ac0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +void REGPARAM2 op_5ac8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(10)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +void REGPARAM2 op_5ad0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +void REGPARAM2 op_5ad8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +void REGPARAM2 op_5ae0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +void REGPARAM2 op_5ae8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +void REGPARAM2 op_5af0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +void REGPARAM2 op_5af8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +void REGPARAM2 op_5af9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(10) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5afc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(10)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +void REGPARAM2 op_5bc0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +void REGPARAM2 op_5bc8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(11)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +void REGPARAM2 op_5bd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +void REGPARAM2 op_5bd8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +void REGPARAM2 op_5be0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +void REGPARAM2 op_5be8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +void REGPARAM2 op_5bf0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +void REGPARAM2 op_5bf8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +void REGPARAM2 op_5bf9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(11) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5bfc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(11)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +void REGPARAM2 op_5cc0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +void REGPARAM2 op_5cc8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(12)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +void REGPARAM2 op_5cd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +void REGPARAM2 op_5cd8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +void REGPARAM2 op_5ce0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +void REGPARAM2 op_5ce8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +void REGPARAM2 op_5cf0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +void REGPARAM2 op_5cf8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +void REGPARAM2 op_5cf9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(12) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5cfc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(12)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +void REGPARAM2 op_5dc0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +void REGPARAM2 op_5dc8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(13)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +void REGPARAM2 op_5dd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +void REGPARAM2 op_5dd8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +void REGPARAM2 op_5de0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +void REGPARAM2 op_5de8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +void REGPARAM2 op_5df0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +void REGPARAM2 op_5df8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +void REGPARAM2 op_5df9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(13) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5dfc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(13)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +void REGPARAM2 op_5ec0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +void REGPARAM2 op_5ec8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(14)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +void REGPARAM2 op_5ed0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +void REGPARAM2 op_5ed8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +void REGPARAM2 op_5ee0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +void REGPARAM2 op_5ee8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +void REGPARAM2 op_5ef0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +void REGPARAM2 op_5ef8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +void REGPARAM2 op_5ef9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(14) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5efc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(14)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +void REGPARAM2 op_5fc0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + count_cycles += ((val ? 2 : 0)) * CYCLE_UNIT / 2; + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +void REGPARAM2 op_5fc8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr oldpc = m68k_getpci(); + if (!cctrue(15)) { + m68k_incpci((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpci()); + return; + } + if (src) { + fill_prefetch_030(); + return; + } + count_cycles += 6 * CYCLE_UNIT / 2; + } + m68k_setpci(oldpc + 4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +void REGPARAM2 op_5fd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +void REGPARAM2 op_5fd8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +void REGPARAM2 op_5fe0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = srca; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +void REGPARAM2 op_5fe8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +void REGPARAM2 op_5ff0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +void REGPARAM2 op_5ff8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:0,C:0 cea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +void REGPARAM2 op_5ff9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:4,T:0,C:0 cea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + int val = cctrue(15) ? 0xff : 0x00; + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(srca, val); + return; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 dummy = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(2); + /* OP zero */ + m68k_incpci(6); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_5ffc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + m68k_incpci(2); + if (cctrue(15)) { + Exception_cpu(7); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +void REGPARAM2 op_6000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +void REGPARAM2 op_6001_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +void REGPARAM2 op_60ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +void REGPARAM2 op_6100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s16 src = get_iword_mmu030c_state(2); + /* op H:2,T:0,C:-2 */ + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsr_mmu030c(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +void REGPARAM2 op_6101_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + /* op H:2,T:0,C:-2 */ + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsr_mmu030c(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +void REGPARAM2 op_61ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s32 s; + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* op H:2,T:0,C:-2 */ + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpci(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return; + } + m68k_do_bsr_mmu030c(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + fill_prefetch_030(); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +void REGPARAM2 op_6200_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +void REGPARAM2 op_6201_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +void REGPARAM2 op_62ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +void REGPARAM2 op_6300_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +void REGPARAM2 op_6301_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +void REGPARAM2 op_63ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +void REGPARAM2 op_6400_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +void REGPARAM2 op_6401_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +void REGPARAM2 op_64ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +void REGPARAM2 op_6500_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +void REGPARAM2 op_6501_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +void REGPARAM2 op_65ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +void REGPARAM2 op_6600_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +void REGPARAM2 op_6601_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +void REGPARAM2 op_66ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +void REGPARAM2 op_6700_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +void REGPARAM2 op_6701_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +void REGPARAM2 op_67ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +void REGPARAM2 op_6800_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +void REGPARAM2 op_6801_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +void REGPARAM2 op_68ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +void REGPARAM2 op_6900_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +void REGPARAM2 op_6901_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +void REGPARAM2 op_69ff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +void REGPARAM2 op_6a00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +void REGPARAM2 op_6a01_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +void REGPARAM2 op_6aff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +void REGPARAM2 op_6b00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +void REGPARAM2 op_6b01_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +void REGPARAM2 op_6bff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +void REGPARAM2 op_6c00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +void REGPARAM2 op_6c01_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +void REGPARAM2 op_6cff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +void REGPARAM2 op_6d00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +void REGPARAM2 op_6d01_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +void REGPARAM2 op_6dff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +void REGPARAM2 op_6e00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +void REGPARAM2 op_6e01_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +void REGPARAM2 op_6eff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +void REGPARAM2 op_6f00_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s16 src = get_iword_mmu030c_state(2); + /* OP zero */ + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(4); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +void REGPARAM2 op_6f01_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpci(); + uae_u32 src = srcreg; + /* OP zero */ + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(2); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +void REGPARAM2 op_6fff_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uaecptr oldpc = m68k_getpci(); + uae_s32 src; + src = get_ilong_mmu030c_state(2); + /* OP zero */ + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpci() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return; + } + m68k_incpci((uae_s32)src + 2); + fill_prefetch_030(); + return; + } + m68k_incpci(6); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +void REGPARAM2 op_7000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + /* op H:2,T:0,C:-2 */ + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +void REGPARAM2 op_8000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +void REGPARAM2 op_8010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +void REGPARAM2 op_8018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +void REGPARAM2 op_8020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +void REGPARAM2 op_8028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +void REGPARAM2 op_8030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +void REGPARAM2 op_8038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +void REGPARAM2 op_8039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +void REGPARAM2 op_803a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_803b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +void REGPARAM2 op_803c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +void REGPARAM2 op_8040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +void REGPARAM2 op_8050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +void REGPARAM2 op_8058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +void REGPARAM2 op_8060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +void REGPARAM2 op_8068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +void REGPARAM2 op_8070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +void REGPARAM2 op_8078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +void REGPARAM2 op_8079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +void REGPARAM2 op_807a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_807b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +void REGPARAM2 op_807c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +void REGPARAM2 op_8080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +void REGPARAM2 op_8090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +void REGPARAM2 op_8098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +void REGPARAM2 op_80a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +void REGPARAM2 op_80a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +void REGPARAM2 op_80b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +void REGPARAM2 op_80b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +void REGPARAM2 op_80b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +void REGPARAM2 op_80ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_80bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +void REGPARAM2 op_80bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +void REGPARAM2 op_80c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:18 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles(34); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +void REGPARAM2 op_80d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles(34); + return; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +void REGPARAM2 op_80d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles(34); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +void REGPARAM2 op_80e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(2); + do_cycles(34); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +void REGPARAM2 op_80e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_80f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + do_cycles(34); + return; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +void REGPARAM2 op_80f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +void REGPARAM2 op_80f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(6); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(6); + do_cycles(34); + return; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +void REGPARAM2 op_80fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles(34); + return; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_80fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + do_cycles(34); + return; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +void REGPARAM2 op_80fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpci(4); + do_cycles(34); + return; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +void REGPARAM2 op_8100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +void REGPARAM2 op_8108_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:10 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:10 */ + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +void REGPARAM2 op_8110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +void REGPARAM2 op_8118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +void REGPARAM2 op_8120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +void REGPARAM2 op_8128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_8130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +void REGPARAM2 op_8138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +void REGPARAM2 op_8139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_iword_mmu030c_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(get_word_mmu030c_state(m68k_areg(regs, srcreg))); + val += get_iword_mmu030c_state(2); + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +void REGPARAM2 op_8150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +void REGPARAM2 op_8158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +void REGPARAM2 op_8160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +void REGPARAM2 op_8168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_8170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +void REGPARAM2 op_8178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +void REGPARAM2 op_8179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_iword_mmu030c_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_8188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(get_byte_mmu030c_state(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword_mmu030c_state(2); + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) -= 2; + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(m68k_areg(regs, dstreg), val); + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +void REGPARAM2 op_8190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +void REGPARAM2 op_8198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +void REGPARAM2 op_81a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +void REGPARAM2 op_81a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_81b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +void REGPARAM2 op_81b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +void REGPARAM2 op_81b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +void REGPARAM2 op_81c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:18 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles(48); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +void REGPARAM2 op_81d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles(48); + return; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +void REGPARAM2 op_81d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles(48); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +void REGPARAM2 op_81e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(2); + Exception_cpu(5); + mmufixup[0].reg = -1; + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(2); + do_cycles(48); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +void REGPARAM2 op_81e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_81f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + do_cycles(48); + return; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +void REGPARAM2 op_81f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +void REGPARAM2 op_81f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(6); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(6); + do_cycles(48); + return; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +void REGPARAM2 op_81fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles(48); + return; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_81fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(0); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + do_cycles(48); + return; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +void REGPARAM2 op_81fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:0,C:20 */ + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpci(4); + Exception_cpu(5); + return; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpci(4); + do_cycles(48); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +void REGPARAM2 op_9000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +void REGPARAM2 op_9010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +void REGPARAM2 op_9018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +void REGPARAM2 op_9020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +void REGPARAM2 op_9028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +void REGPARAM2 op_9030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +void REGPARAM2 op_9038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +void REGPARAM2 op_9039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +void REGPARAM2 op_903a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_903b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +void REGPARAM2 op_903c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +void REGPARAM2 op_9040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +void REGPARAM2 op_9048_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +void REGPARAM2 op_9050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +void REGPARAM2 op_9058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +void REGPARAM2 op_9060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +void REGPARAM2 op_9068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +void REGPARAM2 op_9070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +void REGPARAM2 op_9078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +void REGPARAM2 op_9079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +void REGPARAM2 op_907a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_907b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +void REGPARAM2 op_907c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +void REGPARAM2 op_9080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +void REGPARAM2 op_9088_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +void REGPARAM2 op_9090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +void REGPARAM2 op_9098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +void REGPARAM2 op_90a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +void REGPARAM2 op_90a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +void REGPARAM2 op_90b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +void REGPARAM2 op_90b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +void REGPARAM2 op_90b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +void REGPARAM2 op_90ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_90bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +void REGPARAM2 op_90bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +void REGPARAM2 op_90c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +void REGPARAM2 op_90c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +void REGPARAM2 op_90d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +void REGPARAM2 op_90d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +void REGPARAM2 op_90e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +void REGPARAM2 op_90e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +void REGPARAM2 op_90f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +void REGPARAM2 op_90f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +void REGPARAM2 op_90f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +void REGPARAM2 op_90fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +void REGPARAM2 op_90fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +void REGPARAM2 op_90fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +void REGPARAM2 op_9100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +void REGPARAM2 op_9108_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +void REGPARAM2 op_9110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +void REGPARAM2 op_9118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +void REGPARAM2 op_9120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +void REGPARAM2 op_9128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_9130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +void REGPARAM2 op_9138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +void REGPARAM2 op_9139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +void REGPARAM2 op_9140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +void REGPARAM2 op_9148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +void REGPARAM2 op_9150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +void REGPARAM2 op_9158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +void REGPARAM2 op_9160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +void REGPARAM2 op_9168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_9170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +void REGPARAM2 op_9178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +void REGPARAM2 op_9179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +void REGPARAM2 op_9180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +void REGPARAM2 op_9188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +void REGPARAM2 op_9190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +void REGPARAM2 op_9198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +void REGPARAM2 op_91a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +void REGPARAM2 op_91a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_91b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +void REGPARAM2 op_91b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +void REGPARAM2 op_91b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +void REGPARAM2 op_91c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +void REGPARAM2 op_91c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst - src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +void REGPARAM2 op_91d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +void REGPARAM2 op_91d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +void REGPARAM2 op_91e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +void REGPARAM2 op_91e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +void REGPARAM2 op_91f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +void REGPARAM2 op_91f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +void REGPARAM2 op_91f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +void REGPARAM2 op_91fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +void REGPARAM2 op_91fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +void REGPARAM2 op_91fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +void REGPARAM2 op_b000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +void REGPARAM2 op_b010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +void REGPARAM2 op_b018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +void REGPARAM2 op_b020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +void REGPARAM2 op_b028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +void REGPARAM2 op_b030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +void REGPARAM2 op_b038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +void REGPARAM2 op_b039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +void REGPARAM2 op_b03a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_b03b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +void REGPARAM2 op_b03c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +void REGPARAM2 op_b040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +void REGPARAM2 op_b048_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +void REGPARAM2 op_b050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +void REGPARAM2 op_b058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +void REGPARAM2 op_b060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +void REGPARAM2 op_b068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +void REGPARAM2 op_b070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +void REGPARAM2 op_b078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +void REGPARAM2 op_b079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +void REGPARAM2 op_b07a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_b07b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +void REGPARAM2 op_b07c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +void REGPARAM2 op_b080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +void REGPARAM2 op_b088_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +void REGPARAM2 op_b090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +void REGPARAM2 op_b098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +void REGPARAM2 op_b0a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +void REGPARAM2 op_b0a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +void REGPARAM2 op_b0b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +void REGPARAM2 op_b0b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +void REGPARAM2 op_b0b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +void REGPARAM2 op_b0ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_b0bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +void REGPARAM2 op_b0bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +void REGPARAM2 op_b0c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +void REGPARAM2 op_b0c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +void REGPARAM2 op_b0d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +void REGPARAM2 op_b0d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +void REGPARAM2 op_b0e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +void REGPARAM2 op_b0e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +void REGPARAM2 op_b0f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +void REGPARAM2 op_b0f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +void REGPARAM2 op_b0f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +void REGPARAM2 op_b0fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +void REGPARAM2 op_b0fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +void REGPARAM2 op_b0fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +void REGPARAM2 op_b100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +void REGPARAM2 op_b108_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x100; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + /* op H:0,T:0,C:8 */ + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +void REGPARAM2 op_b110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +void REGPARAM2 op_b118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +void REGPARAM2 op_b120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +void REGPARAM2 op_b128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_b130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +void REGPARAM2 op_b138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +void REGPARAM2 op_b139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +void REGPARAM2 op_b140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +void REGPARAM2 op_b148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x500; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + /* op H:0,T:0,C:8 */ + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +void REGPARAM2 op_b150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +void REGPARAM2 op_b158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +void REGPARAM2 op_b160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +void REGPARAM2 op_b168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_b170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +void REGPARAM2 op_b178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +void REGPARAM2 op_b179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +void REGPARAM2 op_b180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +void REGPARAM2 op_b188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[1].reg = dstreg | 0x900; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + /* op H:0,T:0,C:8 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +void REGPARAM2 op_b190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +void REGPARAM2 op_b198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +void REGPARAM2 op_b1a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +void REGPARAM2 op_b1a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_b1b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +void REGPARAM2 op_b1b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +void REGPARAM2 op_b1b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +void REGPARAM2 op_b1c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +void REGPARAM2 op_b1c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +void REGPARAM2 op_b1d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +void REGPARAM2 op_b1d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +void REGPARAM2 op_b1e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +void REGPARAM2 op_b1e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +void REGPARAM2 op_b1f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +void REGPARAM2 op_b1f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +void REGPARAM2 op_b1f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +void REGPARAM2 op_b1fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +void REGPARAM2 op_b1fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +void REGPARAM2 op_b1fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +void REGPARAM2 op_c000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +void REGPARAM2 op_c010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +void REGPARAM2 op_c018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +void REGPARAM2 op_c020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +void REGPARAM2 op_c028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +void REGPARAM2 op_c030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +void REGPARAM2 op_c038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +void REGPARAM2 op_c039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +void REGPARAM2 op_c03a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_c03b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +void REGPARAM2 op_c03c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +void REGPARAM2 op_c040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +void REGPARAM2 op_c050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +void REGPARAM2 op_c058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +void REGPARAM2 op_c060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +void REGPARAM2 op_c068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +void REGPARAM2 op_c078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +void REGPARAM2 op_c079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +void REGPARAM2 op_c07a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c07b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +void REGPARAM2 op_c07c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +void REGPARAM2 op_c080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:-2 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +void REGPARAM2 op_c090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +void REGPARAM2 op_c098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +void REGPARAM2 op_c0a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +void REGPARAM2 op_c0a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +void REGPARAM2 op_c0b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +void REGPARAM2 op_c0b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +void REGPARAM2 op_c0b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +void REGPARAM2 op_c0ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +void REGPARAM2 op_c0bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +void REGPARAM2 op_c0c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +void REGPARAM2 op_c0d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +void REGPARAM2 op_c0d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +void REGPARAM2 op_c0e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +void REGPARAM2 op_c0e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c0f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +void REGPARAM2 op_c0f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +void REGPARAM2 op_c0f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +void REGPARAM2 op_c0fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c0fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +void REGPARAM2 op_c0fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +void REGPARAM2 op_c100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* OP zero */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* OP zero */ + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +void REGPARAM2 op_c108_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:10 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:10 */ + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +void REGPARAM2 op_c110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +void REGPARAM2 op_c118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +void REGPARAM2 op_c120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +void REGPARAM2 op_c128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_c130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +void REGPARAM2 op_c138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +void REGPARAM2 op_c139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +void REGPARAM2 op_c140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +void REGPARAM2 op_c148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +void REGPARAM2 op_c150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +void REGPARAM2 op_c158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +void REGPARAM2 op_c160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +void REGPARAM2 op_c168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_c170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +void REGPARAM2 op_c178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +void REGPARAM2 op_c179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +void REGPARAM2 op_c188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +void REGPARAM2 op_c190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +void REGPARAM2 op_c198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +void REGPARAM2 op_c1a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +void REGPARAM2 op_c1a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_c1b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +void REGPARAM2 op_c1b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +void REGPARAM2 op_c1b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, src); + return; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +void REGPARAM2 op_c1c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +void REGPARAM2 op_c1d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +void REGPARAM2 op_c1d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +void REGPARAM2 op_c1e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +void REGPARAM2 op_c1e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +void REGPARAM2 op_c1f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +void REGPARAM2 op_c1f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +void REGPARAM2 op_c1f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +void REGPARAM2 op_c1fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_c1fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +void REGPARAM2 op_c1fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:2,T:0,C:10 */ + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + do_cycles(20); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +void REGPARAM2 op_d000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +void REGPARAM2 op_d010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +void REGPARAM2 op_d018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x100; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +void REGPARAM2 op_d020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +void REGPARAM2 op_d028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +void REGPARAM2 op_d030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +void REGPARAM2 op_d038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +void REGPARAM2 op_d039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +void REGPARAM2 op_d03a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +void REGPARAM2 op_d03b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s8 src = get_byte_mmu030c_state(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +void REGPARAM2 op_d03c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s8 src = (uae_u8)get_iword_mmu030c_state(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +void REGPARAM2 op_d040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +void REGPARAM2 op_d048_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +void REGPARAM2 op_d050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +void REGPARAM2 op_d058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +void REGPARAM2 op_d060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +void REGPARAM2 op_d068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +void REGPARAM2 op_d070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +void REGPARAM2 op_d078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +void REGPARAM2 op_d079_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +void REGPARAM2 op_d07a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +void REGPARAM2 op_d07b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +void REGPARAM2 op_d07c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +void REGPARAM2 op_d080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +void REGPARAM2 op_d088_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +void REGPARAM2 op_d090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +void REGPARAM2 op_d098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +void REGPARAM2 op_d0a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +void REGPARAM2 op_d0a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +void REGPARAM2 op_d0b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +void REGPARAM2 op_d0b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +void REGPARAM2 op_d0b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +void REGPARAM2 op_d0ba_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +void REGPARAM2 op_d0bb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +void REGPARAM2 op_d0bc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +void REGPARAM2 op_d0c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +void REGPARAM2 op_d0c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +void REGPARAM2 op_d0d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +void REGPARAM2 op_d0d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +void REGPARAM2 op_d0e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +void REGPARAM2 op_d0e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +void REGPARAM2 op_d0f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +void REGPARAM2 op_d0f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +void REGPARAM2 op_d0f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +void REGPARAM2 op_d0fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +void REGPARAM2 op_d0fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s16 src = get_word_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +void REGPARAM2 op_d0fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s16 src = get_iword_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:4,T:0,C:-4 */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +void REGPARAM2 op_d100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s8 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +void REGPARAM2 op_d108_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + mmufixup[0].reg = srcreg | 0x200; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[1].reg = dstreg | 0x200; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +void REGPARAM2 op_d110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +void REGPARAM2 op_d118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +void REGPARAM2 op_d120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +void REGPARAM2 op_d128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +void REGPARAM2 op_d130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +void REGPARAM2 op_d138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +void REGPARAM2 op_d139_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s8 dst = get_byte_mmu030c_state(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_byte_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +void REGPARAM2 op_d140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s16 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +void REGPARAM2 op_d148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 src = get_word_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[1].reg = dstreg | 0x600; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +void REGPARAM2 op_d150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +void REGPARAM2 op_d158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +void REGPARAM2 op_d160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +void REGPARAM2 op_d168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +void REGPARAM2 op_d170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +void REGPARAM2 op_d178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +void REGPARAM2 op_d179_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s16 dst = get_word_mmu030c_state(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +void REGPARAM2 op_d180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + /* op H:2,T:0,C:-2 */ + uae_s32 dst = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +void REGPARAM2 op_d188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + /* op H:2,T:1,C:6 */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[1].reg = dstreg | 0xa00; + mmufixup[1].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + /* op H:2,T:1,C:6 */ + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + mmufixup[1].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +void REGPARAM2 op_d190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:1,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +void REGPARAM2 op_d198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:0,T:1,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +void REGPARAM2 op_d1a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* op H:0,T:1,C:-1 */ + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_mmu030c_state(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +void REGPARAM2 op_d1a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +void REGPARAM2 op_d1b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* ea H:4,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpci(2); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +void REGPARAM2 op_d1b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:2,T:2,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +void REGPARAM2 op_d1b9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + /* ea H:1,T:0,C:0 fea */ + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_ilong_mmu030c_state(2); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* op H:0,T:1,C:-1 */ + uae_s32 dst = get_long_mmu030c_state(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_long_mmu030c_state(dsta, newv); + return; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +void REGPARAM2 op_d1c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +void REGPARAM2 op_d1c8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* No EA */ + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 newv = dst + src; + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +void REGPARAM2 op_d1d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +void REGPARAM2 op_d1d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:1,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +void REGPARAM2 op_d1e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s32 src = get_long_mmu030c_state(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(2); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +void REGPARAM2 op_d1e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +void REGPARAM2 op_d1f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + srca = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +void REGPARAM2 op_d1f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +void REGPARAM2 op_d1f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:1,T:0,C:0 fea */ + uaecptr srca; + srca = get_ilong_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +void REGPARAM2 op_d1fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:2,T:2,C:0 fea */ + uaecptr srca; + srca = m68k_getpci() + 2; + srca += (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +void REGPARAM2 op_d1fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:4,T:2,C:0 fea */ + uaecptr srca; + m68k_incpci(2); + uaecptr tmppc = m68k_getpci(); + srca = get_disp_ea_020_mmu030c(tmppc, 0); + uae_s32 src = get_long_mmu030c_state(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +void REGPARAM2 op_d1fc_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + /* ea H:0,T:0,C:0 fea */ + uae_s32 src; + src = get_ilong_mmu030c_state(2); + uae_s32 dst = m68k_areg(regs, dstreg); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +void REGPARAM2 op_e000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +void REGPARAM2 op_e008_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +void REGPARAM2 op_e010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +void REGPARAM2 op_e018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +void REGPARAM2 op_e020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +void REGPARAM2 op_e028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +void REGPARAM2 op_e030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +void REGPARAM2 op_e038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +void REGPARAM2 op_e040_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +void REGPARAM2 op_e048_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +void REGPARAM2 op_e050_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +void REGPARAM2 op_e058_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +void REGPARAM2 op_e060_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +void REGPARAM2 op_e068_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +void REGPARAM2 op_e070_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +void REGPARAM2 op_e078_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +void REGPARAM2 op_e080_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +void REGPARAM2 op_e088_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +void REGPARAM2 op_e090_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +void REGPARAM2 op_e098_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +void REGPARAM2 op_e0a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +void REGPARAM2 op_e0a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +void REGPARAM2 op_e0b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +void REGPARAM2 op_e0b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +void REGPARAM2 op_e0d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +void REGPARAM2 op_e0d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +void REGPARAM2 op_e0e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +void REGPARAM2 op_e0e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +void REGPARAM2 op_e0f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +void REGPARAM2 op_e0f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +void REGPARAM2 op_e0f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +void REGPARAM2 op_e100_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +void REGPARAM2 op_e108_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +void REGPARAM2 op_e110_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +void REGPARAM2 op_e118_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +void REGPARAM2 op_e120_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +void REGPARAM2 op_e128_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +void REGPARAM2 op_e130_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +void REGPARAM2 op_e138_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +void REGPARAM2 op_e140_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +void REGPARAM2 op_e148_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +void REGPARAM2 op_e150_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +void REGPARAM2 op_e158_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +void REGPARAM2 op_e160_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +void REGPARAM2 op_e168_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +void REGPARAM2 op_e170_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +void REGPARAM2 op_e178_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +void REGPARAM2 op_e180_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:2,T:0,C:-2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +void REGPARAM2 op_e188_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +void REGPARAM2 op_e190_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +void REGPARAM2 op_e198_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +void REGPARAM2 op_e1a0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:4,T:0,C:-4 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +void REGPARAM2 op_e1a8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:-6 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +void REGPARAM2 op_e1b0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:10,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +void REGPARAM2 op_e1b8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + /* No EA */ + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + /* op H:6,T:0,C:2 */ + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + regs.irc = get_iword_mmu030c_opcode_state(2); + m68k_dreg(regs, dstreg) = (val); + m68k_incpci(2); + return; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +void REGPARAM2 op_e1d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +void REGPARAM2 op_e1d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +void REGPARAM2 op_e1e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +void REGPARAM2 op_e1e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +void REGPARAM2 op_e1f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +void REGPARAM2 op_e1f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +void REGPARAM2 op_e1f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +void REGPARAM2 op_e2d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +void REGPARAM2 op_e2d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +void REGPARAM2 op_e2e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +void REGPARAM2 op_e2e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +void REGPARAM2 op_e2f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +void REGPARAM2 op_e2f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +void REGPARAM2 op_e2f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +void REGPARAM2 op_e3d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +void REGPARAM2 op_e3d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +void REGPARAM2 op_e3e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +void REGPARAM2 op_e3e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +void REGPARAM2 op_e3f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +void REGPARAM2 op_e3f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +void REGPARAM2 op_e3f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +void REGPARAM2 op_e4d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +void REGPARAM2 op_e4d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +void REGPARAM2 op_e4e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +void REGPARAM2 op_e4e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +void REGPARAM2 op_e4f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +void REGPARAM2 op_e4f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +void REGPARAM2 op_e4f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +void REGPARAM2 op_e5d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +void REGPARAM2 op_e5d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +void REGPARAM2 op_e5e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +void REGPARAM2 op_e5e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +void REGPARAM2 op_e5f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +void REGPARAM2 op_e5f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +void REGPARAM2 op_e5f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +void REGPARAM2 op_e6d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +void REGPARAM2 op_e6d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +void REGPARAM2 op_e6e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +void REGPARAM2 op_e6e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +void REGPARAM2 op_e6f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +void REGPARAM2 op_e6f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +void REGPARAM2 op_e6f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +void REGPARAM2 op_e7d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:1,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +void REGPARAM2 op_e7d8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:0,T:1,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x500; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) += 2; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +void REGPARAM2 op_e7e0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + mmufixup[0].reg = srcreg | 0x600; + mmufixup[0].value = m68k_areg(regs, srcreg); + uae_s16 data = get_word_mmu030c_state(dataa); + m68k_areg(regs, srcreg) = dataa; + regs.irc = get_iword_mmu030c_opcode_state(2); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(2); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + mmufixup[0].reg = -1; + return; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +void REGPARAM2 op_e7e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +void REGPARAM2 op_e7f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + /* ea H:4,T:2,C:0 fea */ + uaecptr dataa; + m68k_incpci(2); + dataa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(0); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +void REGPARAM2 op_e7f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:2,T:2,C:0 fea */ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iword_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(4); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(4); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +void REGPARAM2 op_e7f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + /* ea H:1,T:0,C:0 fea */ + uaecptr dataa; + dataa = get_ilong_mmu030c_state(2); + uae_s16 data = get_word_mmu030c_state(dataa); + regs.irc = get_iword_mmu030c_opcode_state(6); + /* OP zero */ + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + m68k_incpci(6); + regs.instruction_pc = m68k_getpci(); + mmu030_state[1] |= MMU030_STATEFLAG1_LASTWRITE; + put_word_mmu030c_state(dataa, val); + return; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e8fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9d0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9e8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9f9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9fa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_e9fb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eac0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ead0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eae8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eaf9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebc0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebe8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebf9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebfa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ebfb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecc0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ece8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ecf9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edc0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_ede8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edf9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edfa_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_getpci() + 4; + dsta += (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_edfb_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + uaecptr tmppc = m68k_getpci(); + dsta = get_disp_ea_020_mmu030c(tmppc, 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eec0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eed0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eee8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eef9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efc0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efd0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(4); + m68k_incpci(4); + return; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_efe8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + m68k_incpci(4); + dsta = get_disp_ea_020_mmu030c(m68k_areg(regs, dstreg), 0); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff8_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iword_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(6); + m68k_incpci(6); + return; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_eff9_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + uaecptr dsta; + dsta = get_ilong_mmu030c_state(4); + /* OP zero */ + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + regs.irc = get_iword_mmu030c_opcode_state(8); + m68k_incpci(8); + return; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f000_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uae_u16 extraa = 0; + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f008_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uae_u16 extraa = 0; + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f010_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + /* OP zero */ + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f018_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + mmufixup[0].reg = srcreg | 0x900; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + /* OP zero */ + if (mmu_op30(pc, opcode, extra, extraa)) { + mmufixup[0].reg = -1; + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f020_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + mmufixup[0].reg = srcreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) = extraa; + /* OP zero */ + if (mmu_op30(pc, opcode, extra, extraa)) { + mmufixup[0].reg = -1; + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + mmufixup[0].reg = -1; + return; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f028_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + /* OP zero */ + m68k_incpci(2); + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f030_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = get_disp_ea_020_mmu030c(m68k_areg(regs, srcreg), 0); + /* OP zero */ + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f038_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = (uae_s32)(uae_s16)get_iword_mmu030c_state(0); + /* OP zero */ + m68k_incpci(2); + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f039_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + uaecptr pc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + uaecptr extraa; + extraa = get_ilong_mmu030c_state(0); + /* OP zero */ + m68k_incpci(4); + if (mmu_op30(pc, opcode, extra, extraa)) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + return; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f200_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f208_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f210_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f218_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f220_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f228_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f230_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f238_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f239_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f23c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_arithmetic(opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f240_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f248_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f250_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f258_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f260_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f268_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f270_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f278_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f279_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uae_s16 extra = get_iword_mmu030c_state(2); + /* OP zero */ + m68k_incpci(4); + fpuop_scc (opcode, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + uae_s16 dummy = get_iword_mmu030c_state(4); + /* OP zero */ + m68k_incpci(6); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + uae_s32 dummy; + dummy = get_ilong_mmu030c_state(4); + /* OP zero */ + m68k_incpci(8); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f27c_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpci(); + uae_u16 extra = get_iword_mmu030c_state(2); + m68k_incpci(4); + fpuop_trapcc (opcode, oldpc, extra); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f280_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s16 extra = get_iword_mmu030c_state(0); + /* OP zero */ + m68k_incpci(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f2c0_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpci(2); + uaecptr pc = m68k_getpci(); + uae_s32 extra; + extra = get_ilong_mmu030c_state(0); + /* OP zero */ + m68k_incpci(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_exception) { + return; + } + if (regs.fp_branch) { + regs.fp_branch = false; + fill_prefetch(); + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f310_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f320_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f328_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f330_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f338_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f339_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_save (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f350_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f358_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f368_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f370_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f378_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f379_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f37a_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +void REGPARAM2 op_f37b_35_ff(uae_u32 opcode) +{ + int count_cycles = 0; + if (!regs.s) { + Exception(8); + return; + } + + #ifdef FPUEMU + m68k_incpci(2); + fpuop_restore (opcode); + if (regs.fp_exception) { + return; + } + regs.irc = get_iword_mmu030c_opcode_state(0); + + #endif + return; +} + +#endif diff --git a/cpuemu_40.cpp b/cpuemu_40.cpp new file mode 100644 index 00000000..88cc46ba --- /dev/null +++ b/cpuemu_40.cpp @@ -0,0 +1,84624 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_40_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_jit(dsta); + upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_jit(dsta); + upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_jit(dsta); + upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f8_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_jit(dsta); + upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f9_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_jit(dsta); + upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fa_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_jit(dsta); + upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)get_byte_jit(dsta); + upper = (uae_s32)(uae_s8)get_byte_jit(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u16 val = (get_byte_jit(mempa) & 0xff) << 8; + val |= (get_byte_jit(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return 0; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpc() + 2; + dsta += (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return 0; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = get_dibyte(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u32 val = (get_byte_jit(mempa) & 0xff) << 24; + val |= (get_byte_jit(mempa + 2) & 0xff) << 16; + val |= (get_byte_jit(mempa + 4) & 0xff) << 8; + val |= (get_byte_jit(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + return 0; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte_jit(mempa, src >> 8); + put_byte_jit(mempa + 2, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + return 0; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte_jit(mempa, src >> 24); + put_byte_jit(mempa + 2, src >> 16); + put_byte_jit(mempa + 4, src >> 8); + put_byte_jit(mempa + 6, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + return 0; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_40_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_jit(dsta); + upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_jit(dsta); + upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_jit(dsta); + upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f8_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_jit(dsta); + upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f9_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_jit(dsta); + upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fa_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_jit(dsta); + upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)get_word_jit(dsta); + upper = (uae_s32)(uae_s16)get_word_jit(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + return 0; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + return 0; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + return 0; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4); + m68k_incpc(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4); + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f8_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4); + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f9_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4); + m68k_incpc(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fa_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4); + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = get_long_jit(dsta); upper = get_long_jit(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + return 0; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + return 0; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + return 0; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f8_40_ff(uae_u32 opcode) +{ + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f9_40_ff(uae_u32 opcode) +{ + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fa_40_ff(uae_u32 opcode) +{ + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fb_40_ff(uae_u32 opcode) +{ + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return 0; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return 0; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + return 0; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + return 0; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + return 0; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_40_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3a_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3b_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7a_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7b_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cba_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_getpc() + 6; + dsta += (uae_s32)(uae_s16)get_diword(6); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cbb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word_jit(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(8); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(8); + return 0; +} +/* 16 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_40_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_word_jit(rn1), dst2 = get_word_jit(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_word_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return 0; +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return 0; +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long_jit(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(8); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(8); + return 0; +} +/* 16 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_40_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_long_jit(rn1), dst2 = get_long_jit(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_long_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_dilong(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_dilong(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_dilong(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return 0; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return 0; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + m68k_incpc(6); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_dilong(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_dilong(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + put_word_jit(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + put_word_jit(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + put_word_jit(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + put_word_jit(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + put_word_jit(srca, regs.sr); + return 0; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + put_word_jit(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + put_word_jit(srca, regs.sr); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + m68k_areg(regs, dstreg) = (srca); + return 0; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + m68k_areg(regs, dstreg) = (srca); + return 0; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + return 0; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + return 0; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + return 0; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + put_word_jit(srca, regs.sr & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + put_word_jit(srca, regs.sr & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + put_word_jit(srca, regs.sr & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + put_word_jit(srca, regs.sr & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + put_word_jit(srca, regs.sr & 0xff); + return 0; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + put_word_jit(srca, regs.sr & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + put_word_jit(srca, regs.sr & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return 0; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return 0; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte_jit(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte_jit(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word_jit(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word_jit(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long_jit(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long_jit(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long_jit(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return 0; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return 0; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 offs; + offs = get_dilong(2); + put_long_jit(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte_jit(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte_jit(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long_jit(dsta, srca); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long_jit(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long_jit(dsta, srca); + return 0; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long_jit(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long_jit(dsta, srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long_jit(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + put_long_jit(dsta, srca); + return 0; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + put_word_jit(srca, m68k_areg(regs, movem_index2[amask])); + } else { + put_word_jit(srca, m68k_areg(regs, movem_index2[amask]) - 2); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word_jit(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_40_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_40_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + put_long_jit(srca, m68k_areg(regs, movem_index2[amask])); + } else { + put_long_jit(srca, m68k_areg(regs, movem_index2[amask]) - 4); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + put_long_jit(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_40_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_40_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_49c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3a_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3b_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3c_40_ff(uae_u32 opcode) +{ + uae_s8 src = get_dibyte(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a48_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7a_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7b_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7c_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a88_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4aba_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abc_40_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_dilong(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* HALT.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4ac8_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + cpu_halt(CPU_HALT_68060_HALT); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* PULSE.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4acc_40_ff(uae_u32 opcode) +{ + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + return 0; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c00_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c10_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c18_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c20_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c28_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c30_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c38_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c39_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3a_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3b_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long_jit(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3c_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uae_s32 dst; + dst = get_dilong(4); + m68k_incpc(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c40_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c50_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c58_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c60_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c68_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c70_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c78_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c79_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7a_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + m68k_incpc(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7b_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_s32 dst = get_long_jit(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7c_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_diword(2); + uae_s32 dst; + dst = get_dilong(4); + m68k_incpc(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_40_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_40_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_40_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_40_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + m68k_incpc(2); + Exception_cpu_oldpc(src + 32,oldpc); + return 0; + return 0; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_diword(2); + put_long_jit(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + uae_s32 old = get_long_jit(olda); + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = (old); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_40_ff(uae_u32 opcode) +{ + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + if (!(sr & 0x2000)) { + Exception(8); + return 0; + } + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_jit(a); + uae_u32 pc = get_long_jit(a + 2); + uae_u16 format = get_word_jit(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_areg(regs, 7) += offset + 8; break; } + else { + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + regs.sr = oldsr & 0xff00; + MakeFromSR(); + SET_ZFLG(newsr == 0); + SET_NFLG(newsr & 0x8000); + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_jit(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_diword(2); + m68k_areg(regs, 7) += offs; + if (pc & 1) { + m68k_areg(regs, 7) -= 4 + offs; + exception3_read_prefetch_only(opcode, pc); + return 0; + } + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word_jit(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_jit(pca); + m68k_areg(regs, 7) += 4; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch(opcode, pc); + return 0; + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_40_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_40_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(0)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(0)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(0)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(1)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(1)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(1)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(2)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(2)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(2)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(3)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(3)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(3)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(4)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(4)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(4)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(5)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(5)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(5)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(6)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(6)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(6)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(7)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(7)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(7)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(8)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(8)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(8)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(9)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(9)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(9)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(10)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(10)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(10)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(11)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(11)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(11)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(12)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(12)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(12)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(13)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(13)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(13)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(14)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(14)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(14)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_40_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffa_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_diword(2); + m68k_incpc(4); + if (cctrue(15)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffb_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_dilong(2); + m68k_incpc(6); + if (cctrue(15)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffc_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(15)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(0)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(0)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(0)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_40_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_40_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s32 src; + src = get_dilong(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(2)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(2)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(2)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(3)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(3)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(3)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(4)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(4)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(4)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(5)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(5)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(5)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(6)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(6)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(6)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(7)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(7)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(7)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(8)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(8)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(8)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(9)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(9)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(9)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(10)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(10)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(10)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(11)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(11)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(11)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(12)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(12)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(12)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(13)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(13)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(13)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(14)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(14)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(14)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(15)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(15)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_40_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(15)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(0); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return 0; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(6); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(0); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return 0; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_diword(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(get_word_jit(m68k_areg(regs, srcreg))); + val += get_diword(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + put_byte_jit(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_diword(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(get_byte_jit(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_diword(2); + m68k_areg(regs, dstreg) -= 2; + put_word_jit(m68k_areg(regs, dstreg), val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(0); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return 0; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(6); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(0); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return 0; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_jit(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_jit(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_jit(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_jit(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_jit(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = get_word_jit(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_jit(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_jit(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_diword(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_40_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_dilong(2); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_jit(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f8_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f9_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fa_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9d0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9e8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f8_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f9_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fa_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eac0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ead0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eae8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf8_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf9_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebc0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebe8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf8_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf9_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfa_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecc0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ece8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf8_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf9_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edc0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ede8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf8_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf9_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfa_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfb_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eec0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eed0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eee8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef8_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef9_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efc0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efd0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efe8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff8_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff9_40_ff(uae_u32 opcode) +{ + uae_s16 extra = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f000_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uae_u16 extraa = 0; + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f008_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uae_u16 extraa = 0; + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f010_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f018_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f020_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = extraa; + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f028_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(0); + m68k_incpc(2); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f030_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f038_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = (uae_s32)(uae_s16)get_diword(0); + m68k_incpc(2); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f039_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + uaecptr extraa; + extraa = get_dilong(0); + m68k_incpc(4); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f200_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f208_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f210_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f218_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f220_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f228_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f230_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f238_40_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f239_40_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23a_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23b_40_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23c_40_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f240_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f248_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f250_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f258_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f260_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f268_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f270_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f278_40_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f279_40_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_diword(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27a_40_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpc(); + uae_u16 extra = get_diword(2); + uae_s16 dummy = get_diword(4); + m68k_incpc(6); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return 0; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27b_40_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpc(); + uae_u16 extra = get_diword(2); + uae_s32 dummy; + dummy = get_dilong(4); + m68k_incpc(8); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return 0; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27c_40_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpc(); + uae_u16 extra = get_diword(2); + m68k_incpc(4); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return 0; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f280_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpc(2); + uaecptr pc = m68k_getpc(); + uae_s16 extra = get_diword(0); + m68k_incpc(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return 0; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f2c0_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpc(2); + uaecptr pc = m68k_getpc(); + uae_s32 extra; + extra = get_dilong(0); + m68k_incpc(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return 0; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f310_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f320_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f328_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f330_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f338_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f339_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f350_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f358_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f368_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f370_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f378_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f379_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37a_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37b_40_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* CINVLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f408_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f410_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f418_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f419_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41d_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41e_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41f_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f428_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f430_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f438_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f439_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43a_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43b_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43c_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43d_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43e_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43f_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f500_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f508_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f510_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f518_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f548_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f568_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PLPAW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f588_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PLPAR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f5c8_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* MOVE16.L (An)+,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f600_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_dilong(2); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = get_long_jit(memsa); + v[1] = get_long_jit(memsa + 4); + v[2] = get_long_jit(memsa + 8); + v[3] = get_long_jit(memsa + 12); + put_long_jit(memda , v[0]); + put_long_jit(memda + 4, v[1]); + put_long_jit(memda + 8, v[2]); + put_long_jit(memda + 12, v[3]); + m68k_areg(regs, srcreg) += 16; + m68k_incpc(6); + return 0; +} + +#endif +/* MOVE16.L (xxx).L,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f608_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_dilong(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = get_long_jit(memsa); + v[1] = get_long_jit(memsa + 4); + v[2] = get_long_jit(memsa + 8); + v[3] = get_long_jit(memsa + 12); + put_long_jit(memda , v[0]); + put_long_jit(memda + 4, v[1]); + put_long_jit(memda + 8, v[2]); + put_long_jit(memda + 12, v[3]); + m68k_areg(regs, dstreg) += 16; + m68k_incpc(6); + return 0; +} + +#endif +/* MOVE16.L (An),(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f610_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_dilong(2); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = get_long_jit(memsa); + v[1] = get_long_jit(memsa + 4); + v[2] = get_long_jit(memsa + 8); + v[3] = get_long_jit(memsa + 12); + put_long_jit(memda , v[0]); + put_long_jit(memda + 4, v[1]); + put_long_jit(memda + 8, v[2]); + put_long_jit(memda + 12, v[3]); + m68k_incpc(6); + return 0; +} + +#endif +/* MOVE16.L (xxx).L,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f618_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_dilong(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = get_long_jit(memsa); + v[1] = get_long_jit(memsa + 4); + v[2] = get_long_jit(memsa + 8); + v[3] = get_long_jit(memsa + 12); + put_long_jit(memda , v[0]); + put_long_jit(memda + 4, v[1]); + put_long_jit(memda + 8, v[2]); + put_long_jit(memda + 12, v[3]); + m68k_incpc(6); + return 0; +} + +#endif +/* MOVE16.L (An)+,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f620_40_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = 0; + uaecptr mems = m68k_areg(regs, srcreg) & ~15, memd; + dstreg = (get_diword(2) >> 12) & 7; + memd = m68k_areg(regs, dstreg) & ~15; + uae_u32 v[4]; + v[0] = get_long_jit(mems); + v[1] = get_long_jit(mems + 4); + v[2] = get_long_jit(mems + 8); + v[3] = get_long_jit(mems + 12); + put_long_jit(memd , v[0]); + put_long_jit(memd + 4, v[1]); + put_long_jit(memd + 8, v[2]); + put_long_jit(memd + 12, v[3]); + if (srcreg != dstreg) + m68k_areg(regs, srcreg) += 16; + m68k_areg(regs, dstreg) += 16; + m68k_incpc(4); + return 0; +} + +#endif +/* LPSTOP.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f800_40_ff(uae_u32 opcode) +{ + uae_u16 sw = get_diword(2); + if (sw != 0x01c0) { + Exception(11); + return 0; + } + if (!(regs.sr & 0x2000)) { + Exception(8); + return 0; + } + uae_u16 newsr = get_diword(4); + if (!(newsr & 0x2000)) { + Exception(8); + return 0; + } + regs.sr = newsr; + checkint(); + MakeFromSR_STOP(); + m68k_setstopped(2); + return 0; +} + +#endif +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_41_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_41_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_41_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_41_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_41_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_byte_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_41_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_41_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_word_jit(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_41_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_word_jit(rn1), dst2 = get_word_jit(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_word_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(8); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(8); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(8); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_41_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_41_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + put_long_jit(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_41_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_long_jit(rn1), dst2 = get_long_jit(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_long_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 offs; + offs = get_dilong(2); + put_long_jit(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s16 offs = get_diword(2); + put_long_jit(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + if(regs.t0) check_t0_trace(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_41_ff(uae_u32 opcode) +{ + if(regs.t0) check_t0_trace(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_41_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_jit(a); + uae_u32 pc = get_long_jit(a + 2); + uae_u16 format = get_word_jit(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_areg(regs, 7) += offset + 8; break; } + else if (frame == 0x7) { + m68k_areg(regs, 7) += offset + 52; break; } + else { + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, newpc, oldsr); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_41_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word_jit(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_jit(pca); + m68k_areg(regs, 7) += 4; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + uae_u16 oldsr = regs.sr; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, pc, oldsr); + return 0; + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_41_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return 0; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f500_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f508_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f510_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f518_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f548_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f568_41_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_42_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_42_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_42_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_42_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_42_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_byte_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_42_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_42_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s16 dst = get_word_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_42_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = get_word_jit(rn1), dst2 = get_word_jit(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_word_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_word_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_dilong(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_dilong(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + m68k_incpc(4); + dsta = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_42_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_42_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s32 dst = get_long_jit(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_42_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_dilong(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = get_long_jit(rn1), dst2 = get_long_jit(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + put_long_jit(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + put_long_jit(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte_jit(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_42_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_42_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte_jit(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + put_word_jit(srca, m68k_areg(regs, movem_index2[amask])); + } else { + put_word_jit(srca, m68k_areg(regs, movem_index2[amask]) - 2); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word_jit(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_42_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_42_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + put_long_jit(srca, m68k_areg(regs, movem_index2[amask])); + } else { + put_long_jit(srca, m68k_areg(regs, movem_index2[amask]) - 4); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + put_long_jit(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_42_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_42_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_42_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_42_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_42_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_42_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_42_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_42_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_42_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_42_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_42_ff(uae_u32 opcode) +{ + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_42_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_jit(a); + uae_u32 pc = get_long_jit(a + 2); + uae_u16 format = get_word_jit(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + regs.t1 = regs.t0 = 0; + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_jit(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_diword(2); + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return 0; + } + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word_jit(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_jit(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_42_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_42_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_42_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_42_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_42_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_42_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_42_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s32 src; + src = get_dilong(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_42_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_dilong(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_42_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_43_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_43_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_43_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_43_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_43_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_43_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_43_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_43_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_jit(a); + uae_u32 pc = get_long_jit(a + 2); + uae_u16 format = get_word_jit(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_43_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word_jit(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_jit(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_44_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_44_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + uaecptr tmppc = m68k_getpc() + 2; + dsta = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_44_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_44_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_44_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 src = get_diword(2); + uaecptr dsta; + uaecptr tmppc = m68k_getpc() + 4; + dsta = get_disp_ea_000(tmppc, get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_44_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_44_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_diword(2); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 4,4 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 4,4 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_diword(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 4,4 */ + +#endif +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_dibyte(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_44_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_44_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_44_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_44_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(6)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_44_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_44_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uaecptr dsta; + dsta = get_dilong(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + put_word_jit(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 4,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 4,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + put_word_jit(srca, regs.sr & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +#endif +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_44_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + put_byte_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + put_word_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + put_long_jit(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_44_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte_jit(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_44_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte_jit(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_44_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte_jit(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpc(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 0; + } + put_long_jit(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_44_ff(uae_u32 opcode) +{ + uae_u16 old_opcode = opcode; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpc(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 0; + } + put_long_jit(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 0; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + put_word_jit(srca, m68k_areg(regs, movem_index2[amask])); + } else { + put_word_jit(srca, m68k_areg(regs, movem_index2[amask]) - 2); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + put_word_jit(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_44_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_44_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_word_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + put_word_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 0; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + put_long_jit(srca, m68k_areg(regs, movem_index2[amask])); + } else { + put_long_jit(srca, m68k_areg(regs, movem_index2[amask]) - 4); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + put_long_jit(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_44_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_44_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uaecptr srca; + srca = get_dilong(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + put_long_jit(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + put_long_jit(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_u8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + uae_u8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_u8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_44_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_u8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_44_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_u8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + get_word_jit(srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_44_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_44_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_44_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_44_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 4; + srca = get_disp_ea_000(tmppc, get_diword(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_jit(srca); + srca += 2; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + get_word_jit(srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_44_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_44_ff(uae_u32 opcode) +{ + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_dilong(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_44_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_diword(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_44_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_diword(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 4; + srca = get_disp_ea_000(tmppc, get_diword(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = get_long_jit(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = get_long_jit(srca); + srca += 4; + amask = movem_next[amask]; + } + get_word_jit(srca); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_diword(2); + if (olda & 1) { + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + m68k_incpc(6); + exception3_write_access(opcode, olda, sz_word, src >> 16, 1); + return 0; + } + put_long_jit(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_44_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_44_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_jit(a); + uae_u32 pc = get_long_jit(a + 2); + uae_u16 format = get_word_jit(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x8) { + m68k_areg(regs, 7) += offset + 50; break; } + else { + SET_NFLG(((uae_s16)format) < 0); + SET_ZFLG(format == 0); + SET_VFLG(0); + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_44_ff(uae_u32 opcode) +{ + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word_jit(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_jit(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_44_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_44_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(0)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_44_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return 0; + } + if (s & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return 0; + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return 0; + } + if (s & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return 0; + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_44_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return 0; + } + if (s & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return 0; + } + m68k_do_bsr(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(2)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(3)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(4)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(5)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(6)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(7)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(8)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(9)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(10)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(11)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(12)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(13)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(14)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_44_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(15)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(6); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long_jit(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(6); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_diword(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long_jit(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + put_byte_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + put_word_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long_jit(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + put_long_jit(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_diword(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s8 src = get_byte_jit(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_byte_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s16 dst = get_word_jit(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_word_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s32 dst = get_long_jit(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + put_long_jit(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word_jit(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_44_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 data = get_word_jit(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + put_word_jit(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_45_ff(uae_u32 opcode) +{ + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u16 val = (get_byte_jit(mempa) & 0xff) << 8; + val |= (get_byte_jit(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u32 val = (get_byte_jit(mempa) & 0xff) << 24; + val |= (get_byte_jit(mempa + 2) & 0xff) << 16; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (get_byte_jit(mempa + 4) & 0xff) << 8; + val |= (get_byte_jit(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte_jit(mempa, src >> 8); + put_byte_jit(mempa + 2, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte_jit(mempa, src >> 24); + put_byte_jit(mempa + 2, src >> 16); + put_byte_jit(mempa + 4, src >> 8); + put_byte_jit(mempa + 6, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_45_ff(uae_u32 opcode) +{ + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_45_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_45_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte_jit(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte_jit(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_45_ff(uae_u32 opcode) +{ + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_diword(2); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + get_word_jit(srca); + put_word_jit(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + get_word_jit(srca); + put_word_jit(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + get_word_jit(srca); + put_word_jit(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word_jit(srca); + put_word_jit(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + get_word_jit(srca); + put_word_jit(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word_jit(srca); + put_word_jit(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + get_word_jit(srca); + put_word_jit(srca, regs.sr); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte_jit(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word_jit(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long_jit(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_45_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_45_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word_jit(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_diword(2); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte_jit(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_45_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = get_word_jit(a); + m68k_areg(regs, 7) += 6; + uae_u32 pc = get_word_jit(a + 2) << 16; + pc |= get_word_jit(a + 2 + 2); + uae_u16 oldt1 = regs.t1; + regs.sr = sr; + MakeFromSR(); + if (pc & 1) { + m68k_incpc(2); + exception3_read_access(opcode | 0x20000, pc, 1, 2); + return 0; + } + m68k_setpc_j(pc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_45_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_45_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_45_ff(uae_u32 opcode) +{ + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = get_word_jit(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = get_long_jit(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(4); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpc(6); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_45_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long_jit(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_45_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_45_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte_jit(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte_jit(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_45_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_45_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long_jit(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_45_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long_jit(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long_jit(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long_jit(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u16 val = (get_byte(mempa) & 0xff) << 8; + val |= (get_byte(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u32 val = (get_byte(mempa) & 0xff) << 24; + val |= (get_byte(mempa + 2) & 0xff) << 16; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (get_byte(mempa + 4) & 0xff) << 8; + val |= (get_byte(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 8); + put_byte(mempa + 2, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 24); + put_byte(mempa + 2, src >> 16); + put_byte(mempa + 4, src >> 8); + put_byte(mempa + 6, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_46_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_46_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_46_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_46_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_46_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_46_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_46_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_46_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_46_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_diword(2); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_46_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_46_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_46_ff(uae_u32 opcode) +{ + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu(7); + return 0; + } + return 0; +} +/* 2 0,0 */ + +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(4); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpc(6); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_46_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_46_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_46_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_46_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_46_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_46_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u16 val = (get_byte(mempa) & 0xff) << 8; + val |= (get_byte(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u32 val = (get_byte(mempa) & 0xff) << 24; + val |= (get_byte(mempa + 2) & 0xff) << 16; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (get_byte(mempa + 4) & 0xff) << 8; + val |= (get_byte(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 8); + put_byte(mempa + 2, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 24); + put_byte(mempa + 2, src >> 16); + put_byte(mempa + 4, src >> 8); + put_byte(mempa + 6, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_47_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_47_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_47_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_47_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_47_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_47_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_47_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_47_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_47_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_diword(2); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_47_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_47_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_47_ff(uae_u32 opcode) +{ + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu(7); + return 0; + } + return 0; +} +/* 2 0,0 */ + +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(4); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpc(6); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_47_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_47_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_47_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_47_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_47_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_47_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u16 val = (get_byte(mempa) & 0xff) << 8; + val |= (get_byte(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u32 val = (get_byte(mempa) & 0xff) << 24; + val |= (get_byte(mempa + 2) & 0xff) << 16; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (get_byte(mempa + 4) & 0xff) << 8; + val |= (get_byte(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 8); + put_byte(mempa + 2, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 24); + put_byte(mempa + 2, src >> 16); + put_byte(mempa + 4, src >> 8); + put_byte(mempa + 6, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_48_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_48_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_48_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_48_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_48_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_48_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_48_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_48_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_48_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_diword(2); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_48_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_48_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_48_ff(uae_u32 opcode) +{ + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu(7); + return 0; + } + return 0; +} +/* 2 0,0 */ + +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(4); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpc(6); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_48_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_48_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_48_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_48_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_48_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_48_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u16 val = (get_byte(mempa) & 0xff) << 8; + val |= (get_byte(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_u32 val = (get_byte(mempa) & 0xff) << 24; + val |= (get_byte(mempa + 2) & 0xff) << 16; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (get_byte(mempa + 4) & 0xff) << 8; + val |= (get_byte(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 8); + put_byte(mempa + 2, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(2)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_dilong(2); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(2); + put_byte(mempa, src >> 24); + put_byte(mempa + 2, src >> 16); + put_byte(mempa + 4, src >> 8); + put_byte(mempa + 6, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_diword(4)); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_49_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_diword(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_49_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + uaecptr dsta; + dsta = get_dilong(4); + uae_s8 dst = get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + put_byte(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + MakeSR(); + get_word(srca); + put_word(srca, regs.sr); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + put_byte(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + put_word(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + put_long(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_49_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_49_ff(uae_u32 opcode) +{ + uae_s16 src = get_diword(2); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_49_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_49_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_dilong(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_49_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_49_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s16 src = get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_49_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_diword(2); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + put_byte(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_49_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_diword(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_49_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + m68k_do_rts(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_49_ff(uae_u32 opcode) +{ + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu(7); + return 0; + } + return 0; +} +/* 2 0,0 */ + +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(4); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpc(6); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_49_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_49_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_diword(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_49_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_dilong(2); + uae_s8 src = get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_49_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_diword(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_49_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsr(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_dilong(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_diword(2); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_diword(2)); + uae_s32 src = get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_dilong(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_49_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + diff --git a/cpuemu_50.cpp b/cpuemu_50.cpp new file mode 100644 index 00000000..1bd9816e --- /dev/null +++ b/cpuemu_50.cpp @@ -0,0 +1,61634 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0038_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0039_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_50_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0078_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0079_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_00a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_00a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_00b8_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_00b9_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(6); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CHK2.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK2.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CHK2.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f8_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00f9_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CHK2.B #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fa_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.B #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_00fb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s8)x_get_byte(dsta); + upper = (uae_s32)(uae_s8)x_get_byte(dsta + 1); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 0); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_0100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_u16 val = (x_get_byte(mempa) & 0xff) << 8; + val |= (x_get_byte(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_0110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return 0; +} +/* 2 2,0 */ + +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_013a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 2; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_getpc() + 2; + dsta += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return 0; +} +/* 2 2,0 */ + +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_013c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = get_iibyte_jit(2); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_u32 val = (x_get_byte(mempa) & 0xff) << 24; + val |= (x_get_byte(mempa + 2) & 0xff) << 16; + val |= (x_get_byte(mempa + 4) & 0xff) << 8; + val |= (x_get_byte(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_0150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_0160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + return 0; +} +/* 2 2,0 */ + +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_0178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_0179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + x_put_byte(mempa, src >> 8); + x_put_byte(mempa + 2, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + return 0; +} +/* 2 2,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + x_put_byte(mempa, src >> 24); + x_put_byte(mempa + 2, src >> 16); + x_put_byte(mempa + 4, src >> 8); + x_put_byte(mempa + 6, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_01d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_01d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + return 0; +} +/* 2 2,0 */ + +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_0200_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_0210_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0218_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0220_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0228_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0238_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0239_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_50_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_0240_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_0250_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0258_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0260_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0268_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0278_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0279_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_0290_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0298_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_02a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_02a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_02b8_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_02b9_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(6); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CHK2.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK2.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CHK2.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f8_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02f9_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CHK2.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fa_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_02fb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = (uae_s32)(uae_s16)x_get_word(dsta); + upper = (uae_s32)(uae_s16)x_get_word(dsta + 2); + if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 1); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_0400_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_0410_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0418_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0420_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0428_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return 0; +} +/* 4 2,0 */ + +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0438_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0439_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_0440_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_0450_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0458_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0460_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0468_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return 0; +} +/* 4 2,0 */ + +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0478_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0479_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_0490_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0498_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_04a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_04a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return 0; +} +/* 6 2,0 */ + +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_04b8_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_04b9_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CHK2.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpc(4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK2.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CHK2.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f8_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04f9_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpc(8); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CHK2.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fa_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + m68k_incpc(6); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK2.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_04fb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; + lower = x_get_long(dsta); upper = x_get_long(dsta + 4); + SET_CFLG(0); + SET_ZFLG(0); + setchk2undefinedflags(lower, upper, reg, (extra & 0x8000) ? 2 : 2); + if(upper == reg || lower == reg) { + SET_ZFLG(1); + }else{ + if (lower <= upper && (reg < lower || reg > upper)) SET_ALWAYS_CFLG(1); + if (lower > upper && reg > upper && reg < lower) SET_ALWAYS_CFLG(1); + } + if ((extra & 0x800) && GET_CFLG()) { + Exception_cpu_oldpc(6,oldpc); + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_0600_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_0610_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0618_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0620_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0628_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return 0; +} +/* 4 2,0 */ + +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0638_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0639_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_0640_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_0650_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0658_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0660_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0668_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return 0; +} +/* 4 2,0 */ + +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0678_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0679_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_0690_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0698_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_06a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_06a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return 0; +} +/* 6 2,0 */ + +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_06b8_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_06b9_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* RTM.L Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* RTM.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f8_50_ff(uae_u32 opcode) +{ + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06f9_50_ff(uae_u32 opcode) +{ + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fa_50_ff(uae_u32 opcode) +{ + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* CALLM.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_06fb_50_ff(uae_u32 opcode) +{ + m68k_incpc(2); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_0800_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_0810_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0818_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0820_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0828_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return 0; +} +/* 4 2,0 */ + +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0838_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0839_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_083a_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + return 0; +} +/* 4 2,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_0850_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0858_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_0860_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0868_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + return 0; +} +/* 4 2,0 */ + +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0878_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0879_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + return 0; +} +/* 4 2,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_08d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_08d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + return 0; +} +/* 4 2,0 */ + +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08f8_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08f9_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0a00_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_0a10_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0a18_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0a20_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0a28_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0a38_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0a39_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_50_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_0a40_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_0a50_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0a58_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0a60_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0a68_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0a78_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0a79_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_0a90_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0a98_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0aa0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0aa8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0ab8_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0ab9_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(6); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_0c00_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_0c10_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_0c18_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_0c20_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_0c28_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 4 2,0 */ + +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_0c38_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_0c39_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* CMP.B #.B,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3a_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CMP.B #.B,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c3b_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 4 2,0 */ + +#endif +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_0c40_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_0c50_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_0c58_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_0c60_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_0c68_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 4 2,0 */ + +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_0c78_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_0c79_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* CMP.W #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7a_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CMP.W #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0c7b_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 4 2,0 */ + +#endif +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_0c80_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_0c90_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_0c98_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_0ca0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_0ca8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 6 2,0 */ + +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_0cb8_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_0cb9_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* CMP.L #.L,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cba_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 6; + dsta += (uae_s32)(uae_s16)get_iiword_jit(6); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CMP.L #.L,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cbb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + m68k_incpc(6); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 6 2,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpc(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpc(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 12 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s16 dst = x_get_word(dsta); + if ((dsta & 1) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(8); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(8); + return 0; +} +/* 16 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_50_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_iilong_jit(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = x_get_word(rn1), dst2 = x_get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_iilong_jit(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_iilong_jit(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_iilong_jit(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_iilong_jit(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_iilong_jit(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_iilong_jit(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(4); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpc(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + cpu_restore_fixup(); + m68k_incpc(4); + op_unimpl (opcode); + mmufixup[0].reg = -1; + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return 0; +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(6); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return 0; +} +/* 12 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s32 dst = x_get_long(dsta); + if ((dsta & 3) && currprefs.int_no_unimplemented && get_cpu_model() == 68060) { + m68k_incpc(8); + op_unimpl (opcode); + return 0; + } + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(8); + return 0; +} +/* 16 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_50_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_iilong_jit(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = x_get_long(rn1), dst2 = x_get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_iilong_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_iilong_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_iilong_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_iilong_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_iilong_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_iilong_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return 0; +} +/* 2 2,0 */ + +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + return 0; +} +/* 2 2,0 */ + +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpc(6); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 6 2,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,2 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 4 2,0 */ + +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_iilong_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_iilong_jit(6); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(10); + return 0; +} +/* 10 0,0 */ + +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_iilong_jit(0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, srcreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + x_put_word(srca, regs.sr); + return 0; +} +/* 2 2,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_iilong_jit(2); + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CHK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 0,0 */ + +#endif +/* CHK.L (An)+,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 0,0 */ + +#endif +/* CHK.L -(An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 0,0 */ + +#endif +/* CHK.L (d16,An),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,An,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 2,0 */ + +#endif +/* CHK.L (xxx).W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK.L (xxx).L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK.L (d16,PC),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 4 0,0 */ + +#endif +/* CHK.L (d8,PC,Xn),Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 2 2,0 */ + +#endif +/* CHK.L #.L,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_413c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(6); + if (dst > src) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 2); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 2); + return 0; +} +/* 6 0,0 */ + +#endif +/* CHK.W Dn,Dn */ +uae_u32 REGPARAM2 op_4180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 0,0 */ + +/* CHK.W (An),Dn */ +uae_u32 REGPARAM2 op_4190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 0,0 */ + +/* CHK.W (An)+,Dn */ +uae_u32 REGPARAM2 op_4198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 0,0 */ + +/* CHK.W -(An),Dn */ +uae_u32 REGPARAM2 op_41a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(2); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 0,0 */ + +/* CHK.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_41a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 0,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 2,0 */ + +/* CHK.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_41b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 0,0 */ + +/* CHK.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_41b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(6); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 6 0,0 */ + +/* CHK.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_41ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 0,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 2 2,0 */ + +/* CHK.W #.W,Dn */ +uae_u32 REGPARAM2 op_41bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 0,0 */ + +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + m68k_areg(regs, dstreg) = (srca); + return 0; +} +/* 2 2,0 */ + +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + m68k_areg(regs, dstreg) = (srca); + return 0; +} +/* 2 2,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + return 0; +} +/* 2 2,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + return 0; +} +/* 2 2,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + return 0; +} +/* 2 2,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* MVSR2.B (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + return 0; +} +/* 2 2,0 */ + +#endif +/* MVSR2.B (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* MVSR2.B (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return 0; +} +/* 2 2,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + return 0; +} +/* 2 2,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + return 0; +} +/* 2 2,0 */ + +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return 0; +} +/* 2 2,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + return 0; +} +/* 2 2,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 offs; + offs = get_iilong_jit(2); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BKPTQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4848_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + op_illg(opcode); + return 0; +} +/* 2 0,0 */ + +#endif +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + return 0; +} +/* 2 2,0 */ + +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + x_put_long(dsta, srca); + return 0; +} +/* 2 2,0 */ + +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u16 dst = (uae_s16)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + } else { + x_put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_50_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_50_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = get_iilong_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + x_put_long(srca, m68k_areg(regs, movem_index2[amask])); + } else { + x_put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + x_put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_50_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_50_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = get_iilong_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EXT.B Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_49c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uae_u32 dst = (uae_s32)(uae_s8)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + m68k_dreg(regs, srcreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TST.B (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3a_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.B (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3b_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +#endif +/* TST.B #.B */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a3c_50_ff(uae_u32 opcode) +{ + uae_s8 src = get_iibyte_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.W An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a48_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TST.W (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7a_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.W (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7b_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +#endif +/* TST.W #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a7c_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.L An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4a88_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TST.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4aba_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* TST.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + return 0; +} +/* 2 2,0 */ + +#endif +/* TST.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4abc_50_ff(uae_u32 opcode) +{ + uae_s32 src; + src = get_iilong_jit(2); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* HALT.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4ac8_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + cpu_halt(CPU_HALT_68060_HALT); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* PULSE.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4acc_50_ff(uae_u32 opcode) +{ + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +#endif +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + return 0; +} +/* 2 2,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c00_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c10_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c18_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return 0; + } + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c20_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpc(4); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return 0; + } + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* MULL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c28_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c30_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c38_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c39_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MULL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3a_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(6); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MULL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3b_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* MULL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c3c_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uae_s32 dst; + dst = get_iilong_jit(4); + m68k_incpc(8); + int e = m68k_mull(opcode, dst, extra); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c40_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c50_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c58_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return 0; + } + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c60_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + m68k_incpc(4); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + cpu_restore_fixup(); + } + if (e < 0) { + op_unimpl(opcode); + } + mmufixup[0].reg = -1; + return 0; + } + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* DIVL.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c68_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c70_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c78_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c79_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* DIVL.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7a_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + m68k_incpc(6); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* DIVL.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7b_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_s32 dst = x_get_long(dsta); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* DIVL.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4c7c_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(2); + uae_s32 dst; + dst = get_iilong_jit(4); + m68k_incpc(8); + int e = m68k_divl(opcode, dst, extra, oldpc); + if (e <= 0) { + if (e < 0) { + op_unimpl(opcode); + } + return 0; + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_50_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_50_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_iilong_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_50_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_50_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_iilong_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* TRAPQ.L # */ +uae_u32 REGPARAM2 op_4e40_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 15); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + m68k_incpc(2); + Exception_cpu_oldpc(src + 32,oldpc); + return 0; + return 0; +} +/* 2 0,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_iiword_jit(2); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uae_u32 olda = src; + uae_s32 old = x_get_long(olda); + m68k_areg(regs, 7) = src + 4; + m68k_areg(regs, srcreg) = (old); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RESET.L */ +uae_u32 REGPARAM2 op_4e70_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + bool r = cpureset(); + if (r) { + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_50_ff(uae_u32 opcode) +{ + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iiword_jit(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + if (!(sr & 0x2000)) { + Exception(8); + return 0; + } + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_areg(regs, 7) += offset + 8; break; } + else { + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + regs.sr = oldsr & 0xff00; + MakeFromSR(); + SET_ZFLG(newsr == 0); + SET_NFLG(newsr & 0x8000); + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_iiword_jit(2); + m68k_areg(regs, 7) += offs; + if (pc & 1) { + m68k_areg(regs, 7) -= 4 + offs; + exception3_read_prefetch_only(opcode, pc); + return 0; + } + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_do_rtsi_jit(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch(opcode, pc); + return 0; + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* MOVEC2.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7a_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_movec2(src & 0xFFF, regp)) { + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_50_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7) - 4, nextpc); + m68k_areg(regs, 7) -= 4; + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_50_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(0) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(0)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(0)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (T) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_50fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(0)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(1) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(1)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(1)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (F) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_51fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(1)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(2) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(2)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(2)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (HI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_52fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(2)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(3) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(3)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(3)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_53fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(3)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(4) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(4)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(4)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_54fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(4)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(5) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(5)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(5)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (CS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_55fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(5)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(6) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(6)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(6)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (NE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_56fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(6)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(7) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(7)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(7)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (EQ) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_57fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(7)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(8) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(8)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(8)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_58fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(8)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(9) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(9)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(9)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (VS) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_59fc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(9)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(10) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(10)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(10)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (PL) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5afc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(10)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(11) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(11)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(11)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (MI) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5bfc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(11)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(12) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(12)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(12)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5cfc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(12)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(13) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(13)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(13)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5dfc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(13)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(14) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(14)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(14)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (GT) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5efc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(14)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int val = cctrue(15) ? 0xff : 0x00; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (offs & 1) { + exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2); + return 0; + } + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + return 0; +} +/* 2 2,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_50_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* TRAPcc.L #.W (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffa_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 dummy = get_iiword_jit(2); + m68k_incpc(4); + if (cctrue(15)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 4 0,0 */ + +#endif +/* TRAPcc.L #.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffb_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 dummy; + dummy = get_iilong_jit(2); + m68k_incpc(6); + if (cctrue(15)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 6 0,0 */ + +#endif +/* TRAPcc.L (LE) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_5ffc_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (cctrue(15)) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +#endif +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(0)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(0)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(0)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_50_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_iiword_jit(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_50_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s32 src; + src = get_iilong_jit(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(2)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(2)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(2)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(3)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(3)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(3)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(4)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(4)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(4)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(5)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(5)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(5)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(6)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(6)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(6)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(7)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(7)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(7)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(8)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(8)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(8)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(9)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(9)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(9)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(10)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(10)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(10)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(11)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(11)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(11)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(12)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(12)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(12)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(13)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(13)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(13)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(14)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(14)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(14)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(15)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(15)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_50_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (src & 1) { + exception3_read_prefetch(opcode, m68k_getpc() + (uae_s32)src + 2); + return 0; + } + if (cctrue(15)) { + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u32 src = srcreg; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(0); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return 0; +} +/* 2 2,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(6); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(0); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + return 0; +} +/* 2 2,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* PACK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg) + get_iiword_jit(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* PACK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= 2; + val = (uae_u16)(x_get_word(m68k_areg(regs, srcreg))); + val += get_iiword_jit(2); + m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; + x_put_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* UNPK.L Dn,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val = m68k_dreg(regs, srcreg); + val = ((val << 4) & 0xf00) | (val & 0xf); + val += get_iiword_jit(2); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* UNPK.L -(An),-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_8188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_u16 val; + m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; + val = (uae_u16)(x_get_byte(m68k_areg(regs, srcreg)) & 0xff); + val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iiword_jit(2); + m68k_areg(regs, dstreg) -= 2; + x_put_word(m68k_areg(regs, dstreg), val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(0); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return 0; +} +/* 2 2,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(6); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(0); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + return 0; +} +/* 2 2,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + return 0; +} +/* 2 2,0 */ + +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + return 0; +} +/* 2 2,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_areg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + m68k_dreg(regs, srcreg) = (dst); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + return 0; +} +/* 2 2,0 */ + +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + return 0; +} +/* 2 2,0 */ + +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + return 0; +} +/* 2 2,0 */ + +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + m68k_incpc(2); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + return 0; +} +/* 2 2,0 */ + +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + return 0; +} +/* 2 2,0 */ + +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W (An) */ +uae_u32 REGPARAM2 op_e0d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W (An)+ */ +uae_u32 REGPARAM2 op_e0d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W -(An) */ +uae_u32 REGPARAM2 op_e0e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e0e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ASRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e0f8_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ASRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e0f9_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_iilong_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W (An) */ +uae_u32 REGPARAM2 op_e1d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W (An)+ */ +uae_u32 REGPARAM2 op_e1d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W -(An) */ +uae_u32 REGPARAM2 op_e1e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e1e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ASLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e1f8_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ASLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e1f9_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_iilong_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LSRW.W (An) */ +uae_u32 REGPARAM2 op_e2d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRW.W (An)+ */ +uae_u32 REGPARAM2 op_e2d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRW.W -(An) */ +uae_u32 REGPARAM2 op_e2e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e2e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* LSRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e2f8_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LSRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e2f9_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_iilong_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LSLW.W (An) */ +uae_u32 REGPARAM2 op_e3d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLW.W (An)+ */ +uae_u32 REGPARAM2 op_e3d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLW.W -(An) */ +uae_u32 REGPARAM2 op_e3e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e3e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* LSLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e3f8_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* LSLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e3f9_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_iilong_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ROXRW.W (An) */ +uae_u32 REGPARAM2 op_e4d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRW.W (An)+ */ +uae_u32 REGPARAM2 op_e4d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRW.W -(An) */ +uae_u32 REGPARAM2 op_e4e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRW.W (d16,An) */ +uae_u32 REGPARAM2 op_e4e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ROXRW.W (xxx).W */ +uae_u32 REGPARAM2 op_e4f8_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROXRW.W (xxx).L */ +uae_u32 REGPARAM2 op_e4f9_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_iilong_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ROXLW.W (An) */ +uae_u32 REGPARAM2 op_e5d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLW.W (An)+ */ +uae_u32 REGPARAM2 op_e5d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLW.W -(An) */ +uae_u32 REGPARAM2 op_e5e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e5e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ROXLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e5f8_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROXLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e5f9_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_iilong_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* RORW.W (An) */ +uae_u32 REGPARAM2 op_e6d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORW.W (An)+ */ +uae_u32 REGPARAM2 op_e6d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORW.W -(An) */ +uae_u32 REGPARAM2 op_e6e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORW.W (d16,An) */ +uae_u32 REGPARAM2 op_e6e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* RORW.W (xxx).W */ +uae_u32 REGPARAM2 op_e6f8_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* RORW.W (xxx).L */ +uae_u32 REGPARAM2 op_e6f9_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_iilong_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ROLW.W (An) */ +uae_u32 REGPARAM2 op_e7d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLW.W (An)+ */ +uae_u32 REGPARAM2 op_e7d8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg); + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) += 2; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLW.W -(An) */ +uae_u32 REGPARAM2 op_e7e0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + uae_s16 data = x_get_word(dataa); + m68k_areg(regs, srcreg) = dataa; + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLW.W (d16,An) */ +uae_u32 REGPARAM2 op_e7e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + m68k_incpc(2); + dataa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + return 0; +} +/* 2 2,0 */ + +/* ROLW.W (xxx).W */ +uae_u32 REGPARAM2 op_e7f8_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ROLW.W (xxx).L */ +uae_u32 REGPARAM2 op_e7f9_50_ff(uae_u32 opcode) +{ + uaecptr dataa; + dataa = get_iilong_jit(2); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BFTST.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFTST.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFTST.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f8_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8f9_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFTST.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fa_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFTST.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e8fb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9d0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9e8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f8_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9f9_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFEXTU.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fa_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTU.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_e9fb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eac0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ead0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFCHG.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eae8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFCHG.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf8_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFCHG.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eaf9_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = tmp ^ (0xffffffffu >> (32 - width)); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebc0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebe8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf8_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebf9_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFEXTS.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfa_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFEXTS.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ebfb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp = (uae_s32)tmp >> (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + m68k_dreg(regs, (extra >> 12) & 7) = tmp; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecc0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFCLR.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ece8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFCLR.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf8_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFCLR.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ecf9_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0; + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edc0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_ede8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFFFO.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf8_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edf9_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFFFO.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfa_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_getpc() + 4; + dsta += (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFFFO.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_edfb_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + dsta = x_get_disp_ea_020(tmppc, 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 offset2 = offset; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + { uae_u32 mask = 1 << (width - 1); +while (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }} + m68k_dreg(regs, (extra >> 12) & 7) = offset2; + return 0; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eec0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eed0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFSET.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eee8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFSET.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef8_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFSET.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eef9_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = 0xffffffffu >> (32 - width); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* BFINS.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efc0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp = m68k_dreg(regs, dstreg); + offset &= 0x1f; + tmp = (tmp << offset) | (tmp >> (32 - offset)); + bdata[0] = tmp & ((1 << (32 - width)) - 1); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + tmp = bdata[0] | (tmp << (32 - width)); + m68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset)); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efd0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* BFINS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_efe8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + return 0; +} +/* 4 2,0 */ + +#endif +/* BFINS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff8_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* BFINS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_eff9_50_ff(uae_u32 opcode) +{ + uae_s16 extra = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_u32 bdata[2]; + uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; + int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) - 1) & 0x1f) + 1; + uae_u32 tmp; + dsta += offset >> 3; + tmp = x_get_bitfield(dsta, bdata, offset, width); + SET_ALWAYS_NFLG(((uae_s32)tmp) < 0 ? 1 : 0); + tmp >>= (32 - width); + SET_ZFLG(tmp == 0); SET_VFLG(0); SET_CFLG(0); + tmp = m68k_dreg(regs, (extra >> 12) & 7); + tmp = tmp & (0xffffffffu >> (32 - width)); + SET_ALWAYS_NFLG(tmp & (1 << (width - 1)) ? 1 : 0); + SET_ZFLG(tmp == 0); + x_put_bitfield(dsta, bdata, tmp, offset, width); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* MMUOP030.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f000_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + uae_u16 extraa = 0; + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f008_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + uae_u16 extraa = 0; + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f010_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f018_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f020_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + m68k_areg(regs, srcreg) = extraa; + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f028_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + uaecptr extraa; + extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(0); + m68k_incpc(2); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f030_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + uaecptr extraa; + extraa = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f038_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + uaecptr extraa; + extraa = (uae_s32)(uae_s16)get_iiword_jit(0); + m68k_incpc(2); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* MMUOP030.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f039_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr pc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + uaecptr extraa; + extraa = get_iilong_jit(0); + m68k_incpc(4); + mmu_op30(pc, opcode, extra, extraa); + return 0; +} + +#endif +/* FPP.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f200_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f208_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f210_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f218_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f220_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f228_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f230_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f238_50_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f239_50_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23a_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,(d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23b_50_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FPP.L #.W,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f23c_50_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_arithmetic(opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f240_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FDBcc.L #.W,Dn */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f248_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_dbcc (opcode, extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f250_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f258_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f260_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f268_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f270_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f278_50_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FScc.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f279_50_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uae_s16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_scc (opcode, extra); + + #endif + return 0; +} + +#endif +/* FTRAPcc.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27a_50_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + uae_s16 dummy = get_iiword_jit(4); + m68k_incpc(6); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return 0; +} + +#endif +/* FTRAPcc.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27b_50_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + uae_s32 dummy; + dummy = get_iilong_jit(4); + m68k_incpc(8); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return 0; +} + +#endif +/* FTRAPcc.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f27c_50_ff(uae_u32 opcode) +{ + + #ifdef FPUEMU + uaecptr oldpc = m68k_getpc(); + uae_u16 extra = get_iiword_jit(2); + m68k_incpc(4); + fpuop_trapcc (opcode, oldpc, extra); + + #endif + return 0; +} + +#endif +/* FBccQ.L #,#.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f280_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpc(2); + uaecptr pc = m68k_getpc(); + uae_s16 extra = get_iiword_jit(0); + m68k_incpc(2); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return 0; +} + +#endif +/* FBccQ.L #,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f2c0_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 63); + + #ifdef FPUEMU + m68k_incpc(2); + uaecptr pc = m68k_getpc(); + uae_s32 extra; + extra = get_iilong_jit(0); + m68k_incpc(4); + fpuop_bcc (opcode, pc,extra); + if (regs.fp_branch) { + regs.fp_branch = false; + if(regs.t0) check_t0_trace(); + } + + #endif + return 0; +} + +#endif +/* FSAVE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f310_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L -(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f320_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f328_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f330_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f338_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FSAVE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f339_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_save (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f350_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f358_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f368_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f370_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f378_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f379_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37a_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* FRESTORE.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f37b_50_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + + #ifdef FPUEMU + m68k_incpc(2); + fpuop_restore (opcode); + + #endif + return 0; +} + +#endif +/* CINVLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f408_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f410_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f418_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f419_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41d_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41e_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CINVAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f41f_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHLQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f428_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHPQ.L #,An */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f430_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f438_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f439_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43a_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43b_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43c_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43d_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43e_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* CPUSHAQ.L # */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f43f_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 6) & 3); + if (!regs.s) { + Exception(8); + return 0; + } + flush_cpu_caches_040(opcode); + if (opcode & 0x80) { + flush_icache((opcode >> 6) & 3); + } + check_t0_trace(); + m68k_incpc(2); + return 0; +} + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f500_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f508_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f510_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f518_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f548_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f568_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PLPAW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f588_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* PLPAR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f5c8_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + return 0; +} + +#endif +/* MOVE16.L (An)+,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f600_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_iilong_jit(2); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = x_get_long(memsa); + v[1] = x_get_long(memsa + 4); + v[2] = x_get_long(memsa + 8); + v[3] = x_get_long(memsa + 12); + x_put_long(memda , v[0]); + x_put_long(memda + 4, v[1]); + x_put_long(memda + 8, v[2]); + x_put_long(memda + 12, v[3]); + m68k_areg(regs, srcreg) += 16; + m68k_incpc(6); + return 0; +} + +#endif +/* MOVE16.L (xxx).L,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f608_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_iilong_jit(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = x_get_long(memsa); + v[1] = x_get_long(memsa + 4); + v[2] = x_get_long(memsa + 8); + v[3] = x_get_long(memsa + 12); + x_put_long(memda , v[0]); + x_put_long(memda + 4, v[1]); + x_put_long(memda + 8, v[2]); + x_put_long(memda + 12, v[3]); + m68k_areg(regs, dstreg) += 16; + m68k_incpc(6); + return 0; +} + +#endif +/* MOVE16.L (An),(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f610_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr memsa; + memsa = m68k_areg(regs, srcreg); + uaecptr memda; + memda = get_iilong_jit(2); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = x_get_long(memsa); + v[1] = x_get_long(memsa + 4); + v[2] = x_get_long(memsa + 8); + v[3] = x_get_long(memsa + 12); + x_put_long(memda , v[0]); + x_put_long(memda + 4, v[1]); + x_put_long(memda + 8, v[2]); + x_put_long(memda + 12, v[3]); + m68k_incpc(6); + return 0; +} + +#endif +/* MOVE16.L (xxx).L,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f618_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uaecptr memsa; + memsa = get_iilong_jit(2); + uaecptr memda; + memda = m68k_areg(regs, dstreg); + memsa &= ~15; + memda &= ~15; + uae_u32 v[4]; + v[0] = x_get_long(memsa); + v[1] = x_get_long(memsa + 4); + v[2] = x_get_long(memsa + 8); + v[3] = x_get_long(memsa + 12); + x_put_long(memda , v[0]); + x_put_long(memda + 4, v[1]); + x_put_long(memda + 8, v[2]); + x_put_long(memda + 12, v[3]); + m68k_incpc(6); + return 0; +} + +#endif +/* MOVE16.L (An)+,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f620_50_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = 0; + uaecptr mems = m68k_areg(regs, srcreg) & ~15, memd; + dstreg = (get_iiword_jit(2) >> 12) & 7; + memd = m68k_areg(regs, dstreg) & ~15; + uae_u32 v[4]; + v[0] = x_get_long(mems); + v[1] = x_get_long(mems + 4); + v[2] = x_get_long(mems + 8); + v[3] = x_get_long(mems + 12); + x_put_long(memd , v[0]); + x_put_long(memd + 4, v[1]); + x_put_long(memd + 8, v[2]); + x_put_long(memd + 12, v[3]); + if (srcreg != dstreg) + m68k_areg(regs, srcreg) += 16; + m68k_areg(regs, dstreg) += 16; + m68k_incpc(4); + return 0; +} + +#endif +/* LPSTOP.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f800_50_ff(uae_u32 opcode) +{ + uae_u16 sw = get_iiword_jit(2); + if (sw != 0x01c0) { + Exception(11); + return 0; + } + if (!(regs.sr & 0x2000)) { + Exception(8); + return 0; + } + uae_u16 newsr = get_iiword_jit(4); + if (!(newsr & 0x2000)) { + Exception(8); + return 0; + } + regs.sr = newsr; + checkint(); + MakeFromSR_STOP(); + m68k_setstopped(2); + return 0; +} + +#endif +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_51_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_51_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_51_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_51_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_51_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_byte(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_51_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_51_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_word(dsta, dst); + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_51_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_iilong_jit(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = x_get_word(rn1), dst2 = x_get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_iilong_jit(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_iilong_jit(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(8); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_iilong_jit(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_iilong_jit(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(8); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_iilong_jit(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_iilong_jit(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(8); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0x0; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_51_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_51_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + x_put_long(dsta, dst); + m68k_dreg(regs, rc) = dst; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_51_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_iilong_jit(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = x_get_long(rn1), dst2 = x_get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* LINK.L An,#.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4808_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 offs; + offs = get_iilong_jit(2); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + if(regs.t0) check_t0_trace(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_51_ff(uae_u32 opcode) +{ + if(regs.t0) check_t0_trace(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iiword_jit(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_51_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x3) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x4) { + m68k_areg(regs, 7) += offset + 8; break; } + else if (frame == 0x7) { + m68k_areg(regs, 7) += offset + 52; break; } + else { + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, newpc, oldsr); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_51_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + if (pc & 1) { + m68k_areg(regs, 7) -= 6; + uae_u16 oldsr = regs.sr; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + exception3_read_prefetch_68040bug(opcode, pc, oldsr); + return 0; + } + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_51_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return 0; + } + if(regs.t0) check_t0_trace(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* PFLUSHN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f500_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PFLUSH.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f508_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PFLUSHAN.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f510_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PFLUSHA.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f518_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PTESTW.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f548_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* PTESTR.L (An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_f568_51_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_incpc(2); + mmu_op(opcode, 0); + if(regs.t0) check_t0_trace(); + return 0; +} + +#endif +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_52_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_52_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_52_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CAS.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ad8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x100; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + mmufixup[0].reg = dstreg | 0x200; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ae8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af8_52_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0af9_52_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(m68k_dreg(regs, rc))); + int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_byte(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cd8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x500; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) += 2; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + mmufixup[0].reg = dstreg | 0x600; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ce8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf8_52_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cf9_52_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s16 dst = x_get_word(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(m68k_dreg(regs, rc))); + int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS2.W #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0cfc_52_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_iilong_jit(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u16 dst1 = x_get_word(rn1), dst2 = x_get_word(rn2); + uae_u32 newv = ((uae_u16)(dst1)) - ((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s16)(dst1)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u16)(dst2)) - ((uae_u16)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s16)(dst2)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_word(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = (m68k_dreg(regs, (extra >> 0) & 7) & ~0xffff) | (dst2 & 0xffff); + m68k_dreg(regs, (extra >> 16) & 7) = (m68k_dreg(regs, (extra >> 16) & 7) & ~0xffff) | (dst1 & 0xffff); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e10_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e18_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e20_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_byte(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 src = sfc_nommu_get_byte(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.B #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e28_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_byte(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.B #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e38_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.B #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e39_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_iilong_jit(4); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_iilong_jit(4); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.W #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e50_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e58_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) += 2; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e60_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_word(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 2; + uae_s16 src = sfc_nommu_get_word(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.W #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e68_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_word(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.W #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e78_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.W #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e79_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_iilong_jit(4); + dfc_nommu_put_word(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_iilong_jit(4); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* MOVES.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e90_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e98_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) += 4; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(4); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 4; + uae_s32 src = sfc_nommu_get_long(srca); + m68k_areg(regs, dstreg) = srca; + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(4); + } + return 0; +} +/* 4 0,0 */ + +#endif +/* MOVES.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ea8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + dfc_nommu_put_long(dsta, src); + } else { + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 1); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + } + return 0; +} +/* 4 2,2 */ + +#endif +/* MOVES.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb8_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 0,0 */ + +#endif +/* MOVES.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb9_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_iilong_jit(4); + dfc_nommu_put_long(dsta, src); + m68k_incpc(8); + } else { + uaecptr srca; + srca = get_iilong_jit(4); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(8); + } + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS.L #.W,(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(An)+ */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ed8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + mmufixup[0].reg = dstreg | 0x900; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) += 4; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,-(An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + mmufixup[0].reg = dstreg | 0xa00; + mmufixup[0].value = m68k_areg(regs, dstreg); + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(4); + mmufixup[0].reg = -1; + return 0; +} +/* 4 0,0 */ + +#endif +/* CAS.L #.W,(d16,An) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ee8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + m68k_incpc(4); + dsta = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + return 0; +} +/* 4 2,0 */ + +#endif +/* CAS.L #.W,(xxx).W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef8_52_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* CAS.L #.W,(xxx).L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0ef9_52_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s32 dst = x_get_long(dsta); + int ru = (src >> 6) & 7; + int rc = src & 7; + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(m68k_dreg(regs, rc))); + int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(dsta, (m68k_dreg(regs, ru))); + } else { + m68k_dreg(regs, rc) = dst; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +#endif +/* CAS2.L #.L */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0efc_52_ff(uae_u32 opcode) +{ + uae_s32 extra; + extra = get_iilong_jit(2); + uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; + uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; + uae_u32 dst1 = x_get_long(rn1), dst2 = x_get_long(rn2); + uae_u32 newv = ((uae_u32)(dst1)) - ((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; + int flgo = ((uae_s32)(dst1)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + uae_u32 newv = ((uae_u32)(dst2)) - ((uae_u32)(m68k_dreg(regs, extra & 7))); + int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; + int flgo = ((uae_s32)(dst2)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); + SET_NFLG(flgn != 0); + if (GET_ZFLG()) { + x_put_long(rn2, m68k_dreg(regs, (extra >> 6) & 7)); + x_put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); + } + } + if (!GET_ZFLG()) { + m68k_dreg(regs, (extra >> 0) & 7) = dst2; + m68k_dreg(regs, (extra >> 16) & 7) = dst1; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +#endif +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + x_put_byte(srca, newv); + return 0; +} +/* 2 2,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_52_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_52_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + x_put_byte(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + } else { + x_put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_52_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_52_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = get_iilong_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 1; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + x_put_long(srca, m68k_areg(regs, movem_index2[amask])); + } else { + x_put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + x_put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_52_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_52_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = get_iilong_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_52_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_52_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_iilong_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_52_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_52_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + srca = x_get_disp_ea_020(m68k_areg(regs, dstreg), 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_52_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_52_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_iilong_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_52_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_52_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + m68k_incpc(4); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + return 0; +} +/* 4 2,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_52_ff(uae_u32 opcode) +{ + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iiword_jit(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_52_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + regs.t1 = regs.t0 = 0; + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTD.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e74_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + uae_s16 offs = get_iiword_jit(2); + m68k_areg(regs, 7) += offs; + if (pc & 1) { + exception3_read_prefetch_only(opcode, pc); + return 0; + } + m68k_setpc_j(pc); + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +#endif +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_do_rtsi_jit(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* MOVE2C.L #.W */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_4e7b_52_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + int regno = (src >> 12) & 15; + uae_u32 *regp = regs.regs + regno; + if (!m68k_move2c(src & 0xFFF, regp)) { + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +#endif +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + m68k_incpc(2); + srca = x_get_disp_ea_020(m68k_areg(regs, srcreg), 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_52_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_52_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_52_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_52_ff(uae_u32 opcode) +{ + uaecptr srca; + m68k_incpc(2); + uaecptr tmppc = m68k_getpc(); + srca = x_get_disp_ea_020(tmppc, 0); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 0; + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_getpc() & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 2,0 B */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + if(regs.t0) check_t0_trace(); + return 0; + } + } + m68k_setpc_j(oldpc + 4); + return 0; +} +/* 4 0,0 B */ + +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_52_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_iiword_jit(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_52_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s32 src; + src = get_iilong_jit(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (s & 1) { + m68k_areg(regs, 7) -= 4; + exception3_read_prefetch(opcode, oldpc + s); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_52_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s32 src; + src = get_iilong_jit(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr addr = m68k_getpc() + (uae_s32)src + 2; + exception3_read_prefetch(opcode, addr); + return 0; + } + m68k_incpc((uae_s32)src + 2); + if(regs.t0) check_t0_trace(); + return 0; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 B */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_52_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG(0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_53_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_53_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_53_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_53_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_53_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_53_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + if(regs.t0) check_t0_trace(); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_53_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iiword_jit(2); + regs.ir = src; + } + uae_u16 sr = regs.ir; + regs.sr = sr; + checkint(); + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_53_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x1) { + m68k_areg(regs, 7) += offset; } + else if (frame == 0x2) { + m68k_areg(regs, 7) += offset + 4; break; } + else if (frame == 0x9) { + m68k_areg(regs, 7) += offset + 12; break; } + else if (frame == 0xa) { + m68k_areg(regs, 7) += offset + 24; break; } + else if (frame == 0xb) { + m68k_areg(regs, 7) += offset + 84; break; } + else { + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_53_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + if(regs.t0) check_t0_trace(); + return 0; +} +/* 2 0,0 B */ + +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_54_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_54_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_00b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_013b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = 3; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + uaecptr tmppc = m68k_getpc() + 2; + dsta = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_0140_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_0180_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_01c0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0230_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_54_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0270_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_54_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_02b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0430_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0470_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_04b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0630_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0670_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_06b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0830_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_083b_54_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + uaecptr tmppc = m68k_getpc() + 4; + dsta = get_disp_ea_000(tmppc, get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_0840_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0870_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + dst ^= (1 << src); + SET_ZFLG(((uae_u32)dst & (1 << src)) >> src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_0880_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_08c0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= 31; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + m68k_dreg(regs, dstreg) = (dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst |= (1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a30_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_54_ff(uae_u32 opcode) +{ + MakeSR(); + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0a70_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_54_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + uae_s16 src = get_iiword_jit(2); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0ab0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c30_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0c70_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_0cb0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVES.B #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e30_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + dfc_nommu_put_byte(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 src = sfc_nommu_get_byte(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 4,4 */ + +#endif +/* MOVES.W #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0e70_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + dfc_nommu_put_word(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s16 src = sfc_nommu_get_word(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); + } + m68k_incpc(6); + } + return 0; +} +/* 6 4,4 */ + +#endif +/* MOVES.L #.W,(d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_0eb0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 extra = get_iiword_jit(2); + if (extra & 0x800) { + uae_u32 src = regs.regs[(extra >> 12) & 15]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + src = regs.regs[(extra >> 12) & 15]; + dfc_nommu_put_long(dsta, src); + m68k_incpc(6); + } else { + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s32 src = sfc_nommu_get_long(srca); + if (extra & 0x8000) { + m68k_areg(regs, (extra >> 12) & 7) = src; + } else { + m68k_dreg(regs, (extra >> 12) & 7) = (src); + } + m68k_incpc(6); + } + return 0; +} +/* 6 4,4 */ + +#endif +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = get_iibyte_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_54_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_54_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_54_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_54_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + m68k_areg(regs, dstreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + m68k_areg(regs, dstreg) = dsta; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_areg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(6)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 4,0 */ + +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,4 */ + +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_54_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(6); + return 0; +} +/* 6 6,0 */ + +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_54_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uaecptr dsta; + dsta = get_iilong_jit(4); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(8); + return 0; +} +/* 8 8,0 */ + +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_u32 newv = 0 - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + MakeSR(); + x_put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CHK.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_41b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 4,0 */ + +/* CHK.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_41bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + m68k_incpc(4); + if (dst > src) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + if ((uae_s32)dst < 0) { + setchkundefinedflags(src, dst, 1); + Exception_cpu_oldpc(6,oldpc); + return 0; + } + setchkundefinedflags(src, dst, 1); + return 0; +} +/* 4 4,0 */ + +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + struct flag_struct oldflags; + oldflags.cznv = regflags.cznv; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.B (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +uae_u32 REGPARAM2 op_42f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + MakeSR(); + x_put_word(srca, regs.sr & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +#endif +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(0)) < 0; + int flgn = ((uae_s8)(dst)) < 0; + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(0)) < 0; + int flgn = ((uae_s16)(dst)) < 0; + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(0)) < 0; + int flgn = ((uae_s32)(dst)) < 0; + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(0))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_54_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(dst)) == 0); + SET_NFLG(((uae_s8)(dst)) < 0); + x_put_byte(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(dst)) == 0); + SET_NFLG(((uae_s16)(dst)) < 0); + x_put_word(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_u32 dst = ~src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(dst)) == 0); + SET_NFLG(((uae_s32)(dst)) < 0); + x_put_long(srca, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_54_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NBCD.B Dn */ +uae_u32 REGPARAM2 op_4800_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An) */ +uae_u32 REGPARAM2 op_4810_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (An)+ */ +uae_u32 REGPARAM2 op_4818_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B -(An) */ +uae_u32 REGPARAM2 op_4820_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + x_put_byte(srca, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* NBCD.B (d16,An) */ +uae_u32 REGPARAM2 op_4828_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4830_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* NBCD.B (xxx).W */ +uae_u32 REGPARAM2 op_4838_54_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + x_put_byte(srca, newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* NBCD.B (xxx).L */ +uae_u32 REGPARAM2 op_4839_54_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg, tmp_newv; + tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) newv_lo -= 6; + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + x_put_byte(srca, newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u16 old_opcode = opcode; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpc(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 0; + } + x_put_long(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_54_ff(uae_u32 opcode) +{ + uae_u16 old_opcode = opcode; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uaecptr dsta; + dsta = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = dsta; + if (dsta & 1) { + regs.ir = old_opcode; + m68k_incpc(2); + exception3_write_access(old_opcode, dsta, sz_word, srca >> 16, 1); + return 0; + } + x_put_long(dsta, srca); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 0; + while (amask) { + srca -= 2; + if (!type || movem_index2[amask] != dstreg) { + x_put_word(srca, m68k_areg(regs, movem_index2[amask])); + } else { + x_put_word(srca, m68k_areg(regs, movem_index2[amask]) - 2); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 2; + x_put_word(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_54_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_54_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = get_iilong_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_word(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_word(srca, m68k_areg(regs, movem_index1[amask])); + srca += 2; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) - 0; + uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; + int type = 0; + while (amask) { + srca -= 4; + if (!type || movem_index2[amask] != dstreg) { + x_put_long(srca, m68k_areg(regs, movem_index2[amask])); + } else { + x_put_long(srca, m68k_areg(regs, movem_index2[amask]) - 4); + } + amask = movem_next[amask]; + } + while (dmask) { + srca -= 4; + x_put_long(srca, m68k_dreg(regs, movem_index2[dmask])); + dmask = movem_next[dmask]; + } + m68k_areg(regs, dstreg) = srca; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_54_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_54_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uaecptr srca; + srca = get_iilong_jit(4); + uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + while (dmask) { + x_put_long(srca, m68k_dreg(regs, movem_index1[dmask])); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + x_put_long(srca, m68k_areg(regs, movem_index1[amask])); + srca += 4; + amask = movem_next[amask]; + } + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_u8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + uae_u8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + m68k_areg(regs, srcreg) = srca; + uae_u8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_u8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_u8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_54_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_u8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_54_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_u8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + x_get_word(srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_54_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_54_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_iilong_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_54_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_54_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 4; + srca = get_disp_ea_000(tmppc, get_iiword_jit(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)x_get_word(srca); + srca += 2; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + m68k_areg(regs, dstreg) = srca; + x_get_word(srca); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_54_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_54_ff(uae_u32 opcode) +{ + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = get_iilong_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_54_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 2; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + srca = m68k_getpc() + 4; + srca += (uae_s32)(uae_s16)get_iiword_jit(4); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_54_ff(uae_u32 opcode) +{ + uae_u32 dstreg = 3; + uae_u16 mask = get_iiword_jit(2); + uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 4; + srca = get_disp_ea_000(tmppc, get_iiword_jit(4)); + while (dmask) { + m68k_dreg(regs, movem_index1[dmask]) = x_get_long(srca); + srca += 4; + dmask = movem_next[dmask]; + } + while (amask) { + m68k_areg(regs, movem_index1[amask]) = x_get_long(srca); + srca += 4; + amask = movem_next[amask]; + } + x_get_word(srca); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_areg(regs, srcreg); + uaecptr olda; + olda = m68k_areg(regs, 7) - 4; + m68k_areg(regs, 7) = olda; + uae_s16 offs = get_iiword_jit(2); + if (olda & 1) { + m68k_areg(regs, 7) += 4; + m68k_areg(regs, srcreg) = olda; + m68k_incpc(6); + exception3_write_access(opcode, olda, sz_word, src >> 16, 1); + return 0; + } + x_put_long(olda, src); + m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); + m68k_areg(regs, 7) += offs; + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_54_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iiword_jit(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_54_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uae_u16 oldsr = regs.sr, newsr; + uae_u32 newpc; + for (;;) { + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + uae_u32 pc = x_get_long(a + 2); + uae_u16 format = x_get_word(a + 2 + 4); + int frame = format >> 12; + int offset = 8; + newsr = sr; newpc = pc; + if (frame == 0x0) { + m68k_areg(regs, 7) += offset; break; } + else if (frame == 0x8) { + m68k_areg(regs, 7) += offset + 50; break; } + else { + SET_NFLG(((uae_s16)format) < 0); + SET_ZFLG(format == 0); + SET_VFLG(0); + Exception_cpu_oldpc(14,oldpc); + return 0; + } + regs.sr = newsr; + oldsr = newsr; + MakeFromSR_T0(); + } + regs.sr = newsr; + MakeFromSR_T0(); + if (newpc & 1) { + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_setpc_j(newpc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + m68k_do_rtsi_jit(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_54_ff(uae_u32 opcode) +{ + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_54_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, oldpc >> 16, 1); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_54_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Bcc.W #.W (T) */ +uae_u32 REGPARAM2 op_6000_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (T) */ +uae_u32 REGPARAM2 op_6001_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(0)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (T) */ +uae_u32 REGPARAM2 op_60ff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(0)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_54_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_iiword_jit(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return 0; + } + if (s & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return 0; + } + if (s & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_54_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_write_access(opcode, oldpc + s, sz_word, oldpc, 1); + return 0; + } + if (s & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, oldpc + s); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* Bcc.W #.W (HI) */ +uae_u32 REGPARAM2 op_6200_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (HI) */ +uae_u32 REGPARAM2 op_6201_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(2)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (HI) */ +uae_u32 REGPARAM2 op_62ff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(2)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (LS) */ +uae_u32 REGPARAM2 op_6300_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LS) */ +uae_u32 REGPARAM2 op_6301_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(3)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LS) */ +uae_u32 REGPARAM2 op_63ff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(3)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (CC) */ +uae_u32 REGPARAM2 op_6400_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CC) */ +uae_u32 REGPARAM2 op_6401_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(4)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CC) */ +uae_u32 REGPARAM2 op_64ff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(4)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (CS) */ +uae_u32 REGPARAM2 op_6500_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (CS) */ +uae_u32 REGPARAM2 op_6501_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(5)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (CS) */ +uae_u32 REGPARAM2 op_65ff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(5)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (NE) */ +uae_u32 REGPARAM2 op_6600_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (NE) */ +uae_u32 REGPARAM2 op_6601_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(6)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (NE) */ +uae_u32 REGPARAM2 op_66ff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(6)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (EQ) */ +uae_u32 REGPARAM2 op_6700_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (EQ) */ +uae_u32 REGPARAM2 op_6701_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(7)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (EQ) */ +uae_u32 REGPARAM2 op_67ff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(7)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (VC) */ +uae_u32 REGPARAM2 op_6800_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VC) */ +uae_u32 REGPARAM2 op_6801_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(8)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VC) */ +uae_u32 REGPARAM2 op_68ff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(8)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (VS) */ +uae_u32 REGPARAM2 op_6900_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (VS) */ +uae_u32 REGPARAM2 op_6901_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(9)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (VS) */ +uae_u32 REGPARAM2 op_69ff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(9)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (PL) */ +uae_u32 REGPARAM2 op_6a00_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (PL) */ +uae_u32 REGPARAM2 op_6a01_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(10)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (PL) */ +uae_u32 REGPARAM2 op_6aff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(10)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (MI) */ +uae_u32 REGPARAM2 op_6b00_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (MI) */ +uae_u32 REGPARAM2 op_6b01_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(11)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (MI) */ +uae_u32 REGPARAM2 op_6bff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(11)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (GE) */ +uae_u32 REGPARAM2 op_6c00_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GE) */ +uae_u32 REGPARAM2 op_6c01_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(12)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GE) */ +uae_u32 REGPARAM2 op_6cff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(12)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (LT) */ +uae_u32 REGPARAM2 op_6d00_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LT) */ +uae_u32 REGPARAM2 op_6d01_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(13)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LT) */ +uae_u32 REGPARAM2 op_6dff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(13)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (GT) */ +uae_u32 REGPARAM2 op_6e00_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (GT) */ +uae_u32 REGPARAM2 op_6e01_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(14)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (GT) */ +uae_u32 REGPARAM2 op_6eff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(14)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Bcc.W #.W (LE) */ +uae_u32 REGPARAM2 op_6f00_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 B */ + +/* BccQ.B # (LE) */ +uae_u32 REGPARAM2 op_6f01_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uaecptr oldpc = m68k_getpc(); + uae_u32 src = srcreg; + if (cctrue(15)) { + if (src & 1) { + uaecptr oldpc = m68k_getpc(); + uae_u16 rb = regs.irc; + m68k_incpc(((uae_s32)src + 2) & ~1); + uaecptr newpc = m68k_getpc() + (uae_s32)src + 2; + m68k_incpc(2); + regs.read_buffer = rb; + exception3_read_prefetch(opcode, newpc); + return 0; + } + m68k_incpc((uae_s32)src + 2); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 B */ + +/* Bcc.L #.L (LE) */ +uae_u32 REGPARAM2 op_6fff_54_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (cctrue(15)) { + exception3_read_prefetch(opcode, m68k_getpc() + 1); + return 0; + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVU.W Dn,Dn */ +uae_u32 REGPARAM2 op_80c0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (An),Dn */ +uae_u32 REGPARAM2 op_80d0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_80d8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W -(An),Dn */ +uae_u32 REGPARAM2 op_80e0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_80e8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80f8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80f9_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(6); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80fa_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVU.W #.W,Dn */ +uae_u32 REGPARAM2 op_80fc_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(0, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + setdivuflags((uae_u32)dst, (uae_u16)src); + } else { + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SBCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_8100_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SBCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_8108_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; +if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; +if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG() ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG() ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s16 dst = x_get_word(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s32 dst = x_get_long(dsta); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVS.W Dn,Dn */ +uae_u32 REGPARAM2 op_81c0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (An),Dn */ +uae_u32 REGPARAM2 op_81d0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_81d8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W -(An),Dn */ +uae_u32 REGPARAM2 op_81e0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(2); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DIVS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_81e8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_81f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_81f8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_81f9_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(6); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* DIVS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_81fa_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* DIVS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_81fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* DIVS.W #.W,Dn */ +uae_u32 REGPARAM2 op_81fc_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr oldpc = m68k_getpc(); + uae_s16 src = get_iiword_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + if (src == 0) { + divbyzero_special(1, dst); + m68k_incpc(4); + Exception_cpu_oldpc(5,oldpc); + return 0; + } + int extra = 0; + if (dst == 0x80000000 && src == -1) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + setdivsflags((uae_s32)dst, (uae_s16)src); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_NFLG(((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + } + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s16 dst = x_get_word(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s32 dst = x_get_long(dsta); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs != flgo) && (flgn != flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG(flgn != 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ABCD.B Dn,Dn */ +uae_u32 REGPARAM2 op_c100_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ABCD.B -(An),-(An) */ +uae_u32 REGPARAM2 op_c108_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG() ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo;if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG(cflg); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + SET_VFLG((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + x_put_byte(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s16 dst = x_get_word(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(src)) == 0); + SET_NFLG(((uae_s16)(src)) < 0); + x_put_word(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s32 dst = x_get_long(dsta); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + x_put_long(dsta, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = get_iiword_jit(2); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG(((uae_s8)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u8)(~dst)) < ((uae_u8)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_byte(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s16 dst = x_get_word(dsta); + uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG(((uae_s16)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u16)(~dst)) < ((uae_u16)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_word(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s32 dst = x_get_long(dsta); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + x_put_long(dsta, newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_areg(regs, dstreg); + uae_u32 newv = dst + src; + m68k_areg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e010_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + uae_u32 sign = (0x80 & val) >> 7; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + val = 0xff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xff << (8 - cnt)) & (uae_u32)(0 - sign); + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG((cnt == 8) & (val >> 7)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e030_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (7 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 7; + hival = val << (8 - cnt); + val >>= cnt; + val |= hival; + val &= 0xff; + SET_CFLG((val & 0x80) >> 7); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e050_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + uae_u32 sign = (0x8000 & val) >> 15; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + val = 0xffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffff << (16 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG((cnt == 16) & (val >> 15)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e070_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (15 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 15; + hival = val << (16 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffff; + SET_CFLG((val & 0x8000) >> 15); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e090_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + uae_u32 sign = (0x80000000 & val) >> 31; + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + val = 0xffffffff & (uae_u32)(0 - sign); + SET_CFLG(sign); + COPY_CARRY(); + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + val |= (0xffffffff << (32 - cnt)) & (uae_u32)(0 - sign); + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG((cnt == 32) & (val >> 31)); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val >>= cnt - 1; + SET_CFLG(val & 1); + COPY_CARRY(); + val >>= 1; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 hival = (val << 1) | GET_XFLG(); + hival <<= (31 - cnt); + val >>= cnt; + carry = val & 1; + val >>= 1; + val |= hival; + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 hival; + cnt &= 31; + hival = val << (32 - cnt); + val >>= cnt; + val |= hival; + val &= 0xffffffff; + SET_CFLG((val & 0x80000000) >> 31); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e0f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(cflg); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e110_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 8) { + SET_CFLG(cnt == 8 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80) >> 7); + COPY_CARRY(); + val <<= 1; + val &= 0xff; + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e130_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 cnt = m68k_dreg(regs, srcreg); + uae_s8 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u8)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s8)(val)) == 0); + SET_NFLG(((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e150_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 16) { + SET_CFLG(cnt == 16 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x8000) >> 15); + COPY_CARRY(); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e170_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 cnt = m68k_dreg(regs, srcreg); + uae_s16 data = m68k_dreg(regs, dstreg); + uae_u32 val = (uae_u16)data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e190_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 cnt = srcreg; + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_VFLG(val != 0); + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG((val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 32) { + SET_CFLG(cnt == 32 ? val & 1 : 0); + COPY_CARRY(); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG((val & 0x80000000) >> 31); + COPY_CARRY(); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROXL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG()) << cnt) | (loval >> 1); + SET_XFLG(carry); + val &= 0xffffffff; + } + } + SET_CFLG(GET_XFLG()); + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 cnt = m68k_dreg(regs, srcreg); + uae_s32 data = m68k_dreg(regs, dstreg); + uae_u32 val = data; + CLEAR_CZNV(); + int ccnt = cnt & 63; + cnt &= 63; + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG(val & 1); + } + SET_ZFLG(((uae_s32)(val)) == 0); + SET_NFLG(((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ASLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e1f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG(sign != 0); + COPY_CARRY(); + SET_VFLG(GET_VFLG() | (sign2 != sign)); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* LSRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e2f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 data = x_get_word(dataa); + uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* LSLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e3f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ROXRW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e4f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG()) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ROXLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e5f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG()) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + COPY_CARRY(); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* RORW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e6f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ROLW.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_e7f0_54_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr dataa; + dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 data = x_get_word(dataa); + uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (carry) val |= 1; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(val)) == 0); + SET_NFLG(((uae_s16)(val)) < 0); + SET_CFLG(carry >> 15); + x_put_word(dataa, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ORSR.B #.W */ +uae_u32 REGPARAM2 op_003c_55_ff(uae_u32 opcode) +{ + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr |= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ORSR.W #.W */ +uae_u32 REGPARAM2 op_007c_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_iiword_jit(2); + regs.sr |= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0080_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPMR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_0108_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_u16 val = (x_get_byte(mempa) & 0xff) << 8; + val |= (x_get_byte(mempa + 2) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPMR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_0148_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr mempa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_u32 val = (x_get_byte(mempa) & 0xff) << 24; + val |= (x_get_byte(mempa + 2) & 0xff) << 16; + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0x0000ffff) | val; + val |= (x_get_byte(mempa + 4) & 0xff) << 8; + val |= (x_get_byte(mempa + 6) & 0xff); + m68k_dreg(regs, dstreg) = (val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVPRM.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_0188_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + x_put_byte(mempa, src >> 8); + x_put_byte(mempa + 2, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_0190_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_0198_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_01a0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01a8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_01b0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(2)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_01b8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_01b9_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + uaecptr dsta; + dsta = get_iilong_jit(2); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVPRM.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_01c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uaecptr mempa = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + x_put_byte(mempa, src >> 24); + x_put_byte(mempa + 2, src >> 16); + x_put_byte(mempa + 4, src >> 8); + x_put_byte(mempa + 6, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.B #.W */ +uae_u32 REGPARAM2 op_023c_55_ff(uae_u32 opcode) +{ + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + src |= 0xff00; + regs.sr &= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ANDSR.W #.W */ +uae_u32 REGPARAM2 op_027c_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_iiword_jit(2); + regs.sr &= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_0280_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_0480_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_0680_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_0890_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_0898_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg); + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_08a0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_08a8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_08b0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iiword_jit(4)); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 4,0 */ + +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_08b8_55_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = (uae_s32)(uae_s16)get_iiword_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_08b9_55_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + uaecptr dsta; + dsta = get_iilong_jit(4); + uae_s8 dst = x_get_byte(dsta); + src &= 7; + SET_ZFLG(1 ^ ((dst >> src) & 1)); + dst &= ~(1 << src); + x_put_byte(dsta, dst); + m68k_incpc(8); + return 0; +} +/* 8 0,0 */ + +/* EORSR.B #.W */ +uae_u32 REGPARAM2 op_0a3c_55_ff(uae_u32 opcode) +{ + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_iiword_jit(2); + src &= 0xFF; + regs.sr ^= src; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EORSR.W #.W */ +uae_u32 REGPARAM2 op_0a7c_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + MakeSR(); + int t1 = regs.t1; + uae_s16 src = get_iiword_jit(2); + regs.sr ^= src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_0a80_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = real_opcode & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVSR2.W Dn */ +uae_u32 REGPARAM2 op_40c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + MakeSR(); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An) */ +uae_u32 REGPARAM2 op_40d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + MakeSR(); + x_get_word(srca); + x_put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (An)+ */ +uae_u32 REGPARAM2 op_40d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 2; + MakeSR(); + x_get_word(srca); + x_put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W -(An) */ +uae_u32 REGPARAM2 op_40e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + m68k_areg(regs, srcreg) = srca; + MakeSR(); + x_get_word(srca); + x_put_word(srca, regs.sr); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVSR2.W (d16,An) */ +uae_u32 REGPARAM2 op_40e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + MakeSR(); + x_get_word(srca); + x_put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + MakeSR(); + x_get_word(srca); + x_put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MVSR2.W (xxx).W */ +uae_u32 REGPARAM2 op_40f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + MakeSR(); + x_get_word(srca); + x_put_word(srca, regs.sr); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MVSR2.W (xxx).L */ +uae_u32 REGPARAM2 op_40f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + MakeSR(); + x_get_word(srca); + x_put_word(srca, regs.sr); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + m68k_areg(regs, dstreg) = (srca); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(0)) == 0); + SET_NFLG(((uae_s8)(0)) < 0); + x_put_byte(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s16)(0)) == 0); + SET_NFLG(((uae_s16)(0)) < 0); + x_put_word(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s32 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + m68k_dreg(regs, srcreg) = (0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(0)) == 0); + SET_NFLG(((uae_s32)(0)) < 0); + x_put_long(srca, 0); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B Dn */ +uae_u32 REGPARAM2 op_44c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An) */ +uae_u32 REGPARAM2 op_44d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (An)+ */ +uae_u32 REGPARAM2 op_44d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B -(An) */ +uae_u32 REGPARAM2 op_44e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.B (d16,An) */ +uae_u32 REGPARAM2 op_44e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B (xxx).W */ +uae_u32 REGPARAM2 op_44f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (xxx).L */ +uae_u32 REGPARAM2 op_44f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.B (d16,PC) */ +uae_u32 REGPARAM2 op_44fa_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_44fb_55_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.B #.B */ +uae_u32 REGPARAM2 op_44fc_55_ff(uae_u32 opcode) +{ + uae_s16 src = get_iiword_jit(2); + int t1 = regs.t1; + MakeSR(); + regs.sr &= 0xFF00; + regs.sr |= src & 0xFF; + MakeFromSR(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W Dn */ +uae_u32 REGPARAM2 op_46c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = m68k_dreg(regs, srcreg); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An) */ +uae_u32 REGPARAM2 op_46d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (An)+ */ +uae_u32 REGPARAM2 op_46d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) += 2; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W -(An) */ +uae_u32 REGPARAM2 op_46e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MV2SR.W (d16,An) */ +uae_u32 REGPARAM2 op_46e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W (xxx).W */ +uae_u32 REGPARAM2 op_46f8_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (xxx).L */ +uae_u32 REGPARAM2 op_46f9_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = get_iilong_jit(2); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MV2SR.W (d16,PC) */ +uae_u32 REGPARAM2 op_46fa_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* MV2SR.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_46fb_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s16 src = x_get_word(srca); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* MV2SR.W #.W */ +uae_u32 REGPARAM2 op_46fc_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + uae_s16 src = get_iiword_jit(2); + int t1 = regs.t1; + regs.sr = src; + MakeFromSR_T0(); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B Dn */ +uae_u32 REGPARAM2 op_4ac0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An) */ +uae_u32 REGPARAM2 op_4ad0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (An)+ */ +uae_u32 REGPARAM2 op_4ad8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B -(An) */ +uae_u32 REGPARAM2 op_4ae0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* TAS.B (d16,An) */ +uae_u32 REGPARAM2 op_4ae8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4af0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* TAS.B (xxx).W */ +uae_u32 REGPARAM2 op_4af8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* TAS.B (xxx).L */ +uae_u32 REGPARAM2 op_4af9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + CLEAR_CZNV(); + SET_ZFLG(((uae_s8)(src)) == 0); + SET_NFLG(((uae_s8)(src)) < 0); + uae_u8 old_src = src; + src |= 0x80; + x_put_byte(srca, src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* MVR2USP.L An */ +uae_u32 REGPARAM2 op_4e60_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + uae_s32 src = m68k_areg(regs, srcreg); + regs.usp = src; + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* MVUSP2R.L An */ +uae_u32 REGPARAM2 op_4e68_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + if (!regs.s) { + Exception(8); + return 0; + } + m68k_areg(regs, srcreg) = (regs.usp); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* STOP.L #.W */ +uae_u32 REGPARAM2 op_4e72_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (!regs.stopped) { + uae_s16 src = get_iiword_jit(2); + regs.irc = src; + } + uae_u16 sr = regs.irc; + checkint(); + regs.sr = sr; + MakeFromSR_STOP(); + do_cycles_stop(4); + m68k_setstopped(1); + return 0; +} + +/* RTE.L */ +uae_u32 REGPARAM2 op_4e73_55_ff(uae_u32 opcode) +{ + if (!regs.s) { + Exception(8); + return 0; + } + if (m68k_areg(regs, 7) & 1) { + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + uaecptr oldpc = m68k_getpc(); + uaecptr a = m68k_areg(regs, 7); + uae_u16 sr = x_get_word(a); + m68k_areg(regs, 7) += 6; + uae_u32 pc = x_get_word(a + 2) << 16; + pc |= x_get_word(a + 2 + 2); + uae_u16 oldt1 = regs.t1; + regs.sr = sr; + MakeFromSR(); + if (pc & 1) { + m68k_incpc(2); + exception3_read_access(opcode | 0x20000, pc, 1, 2); + return 0; + } + m68k_setpc_j(pc); + branch_stack_pop_rte(oldpc); + return 0; +} +/* 2 0,0 B */ + +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_55_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + m68k_do_rtsi_jit(); + if (debugmem_trace) { + branch_stack_pop_rts(oldpc); + } + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* TRAPV.L */ +uae_u32 REGPARAM2 op_4e76_55_ff(uae_u32 opcode) +{ + uaecptr oldpc = m68k_getpc(); + m68k_incpc(2); + if (GET_VFLG()) { + Exception_cpu_oldpc(7,oldpc); + return 0; + } + return 0; +} +/* 2 0,0 */ + +/* RTR.L */ +uae_u32 REGPARAM2 op_4e77_55_ff(uae_u32 opcode) +{ + if (m68k_areg(regs, 7) & 1) { + m68k_incpc(2); + exception3_read_access(opcode, m68k_areg(regs, 7), 1, 1); + return 0; + } + uaecptr oldpc = m68k_getpc(); + MakeSR(); + uaecptr sra; + sra = m68k_areg(regs, 7); + uae_s16 sr = x_get_word(sra); + m68k_areg(regs, 7) += 2; + uaecptr pca; + pca = m68k_areg(regs, 7); + uae_s32 pc = x_get_long(pca); + m68k_areg(regs, 7) += 4; + regs.sr &= 0xFF00; sr &= 0xFF; + regs.sr |= sr; + MakeFromSR(); + m68k_setpc_j(pc); + if (m68k_getpc() & 1) { + uaecptr faultpc = m68k_getpc(); + m68k_setpc_j(oldpc + 2); + exception3_read_prefetch_only(opcode, faultpc); + return 0; + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(4); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 6; + if (srca & 1) { + m68k_incpc(6); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(6); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 6 0,0 B */ + +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_55_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + m68k_areg(regs, 7) -= 4; + if (m68k_areg(regs, 7) & 1) { + m68k_setpc_j(oldpc); + m68k_incpc(4); + exception3_write_access(opcode, m68k_areg(regs, 7), 1, m68k_areg(regs, 7) >> 16, 1); + return 0; + } + x_put_long(m68k_areg(regs, 7), nextpc); + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 2 0,0 B */ + +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 6 0,0 B */ + +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 0,0 B */ + +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_55_ff(uae_u32 opcode) +{ + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + if (srca & 1) { + m68k_incpc(2); + exception3_read_prefetch_only(opcode, srca); + return 0; + } + m68k_setpc_j(srca); + return 0; +} +/* 4 4,0 B */ + +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (T) */ +uae_u32 REGPARAM2 op_50c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(0) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (T) */ +uae_u32 REGPARAM2 op_50c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(0)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(0)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (T) */ +uae_u32 REGPARAM2 op_50d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (T) */ +uae_u32 REGPARAM2 op_50d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (T) */ +uae_u32 REGPARAM2 op_50e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (T) */ +uae_u32 REGPARAM2 op_50e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (T) */ +uae_u32 REGPARAM2 op_50f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (T) */ +uae_u32 REGPARAM2 op_50f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (T) */ +uae_u32 REGPARAM2 op_50f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(0) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = imm8_table[((real_opcode >> 9) & 7)]; + uae_u32 dstreg = real_opcode & 7; + uae_u32 src = srcreg; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B Dn (F) */ +uae_u32 REGPARAM2 op_51c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(1) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (F) */ +uae_u32 REGPARAM2 op_51c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(1)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(1)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (F) */ +uae_u32 REGPARAM2 op_51d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (F) */ +uae_u32 REGPARAM2 op_51d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (F) */ +uae_u32 REGPARAM2 op_51e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (F) */ +uae_u32 REGPARAM2 op_51e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (F) */ +uae_u32 REGPARAM2 op_51f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (F) */ +uae_u32 REGPARAM2 op_51f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (F) */ +uae_u32 REGPARAM2 op_51f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(1) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (HI) */ +uae_u32 REGPARAM2 op_52c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(2) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (HI) */ +uae_u32 REGPARAM2 op_52c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(2)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(2)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (HI) */ +uae_u32 REGPARAM2 op_52d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (HI) */ +uae_u32 REGPARAM2 op_52d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (HI) */ +uae_u32 REGPARAM2 op_52e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (HI) */ +uae_u32 REGPARAM2 op_52e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (HI) */ +uae_u32 REGPARAM2 op_52f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (HI) */ +uae_u32 REGPARAM2 op_52f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (HI) */ +uae_u32 REGPARAM2 op_52f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(2) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LS) */ +uae_u32 REGPARAM2 op_53c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(3) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LS) */ +uae_u32 REGPARAM2 op_53c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(3)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(3)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LS) */ +uae_u32 REGPARAM2 op_53d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LS) */ +uae_u32 REGPARAM2 op_53d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LS) */ +uae_u32 REGPARAM2 op_53e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LS) */ +uae_u32 REGPARAM2 op_53e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LS) */ +uae_u32 REGPARAM2 op_53f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LS) */ +uae_u32 REGPARAM2 op_53f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LS) */ +uae_u32 REGPARAM2 op_53f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(3) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CC) */ +uae_u32 REGPARAM2 op_54c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(4) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CC) */ +uae_u32 REGPARAM2 op_54c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(4)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(4)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CC) */ +uae_u32 REGPARAM2 op_54d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CC) */ +uae_u32 REGPARAM2 op_54d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CC) */ +uae_u32 REGPARAM2 op_54e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CC) */ +uae_u32 REGPARAM2 op_54e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CC) */ +uae_u32 REGPARAM2 op_54f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CC) */ +uae_u32 REGPARAM2 op_54f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CC) */ +uae_u32 REGPARAM2 op_54f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(4) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (CS) */ +uae_u32 REGPARAM2 op_55c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(5) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (CS) */ +uae_u32 REGPARAM2 op_55c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(5)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(5)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (CS) */ +uae_u32 REGPARAM2 op_55d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (CS) */ +uae_u32 REGPARAM2 op_55d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (CS) */ +uae_u32 REGPARAM2 op_55e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (CS) */ +uae_u32 REGPARAM2 op_55e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (CS) */ +uae_u32 REGPARAM2 op_55f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (CS) */ +uae_u32 REGPARAM2 op_55f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (CS) */ +uae_u32 REGPARAM2 op_55f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(5) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (NE) */ +uae_u32 REGPARAM2 op_56c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(6) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (NE) */ +uae_u32 REGPARAM2 op_56c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(6)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(6)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (NE) */ +uae_u32 REGPARAM2 op_56d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (NE) */ +uae_u32 REGPARAM2 op_56d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (NE) */ +uae_u32 REGPARAM2 op_56e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (NE) */ +uae_u32 REGPARAM2 op_56e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (NE) */ +uae_u32 REGPARAM2 op_56f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (NE) */ +uae_u32 REGPARAM2 op_56f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (NE) */ +uae_u32 REGPARAM2 op_56f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(6) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (EQ) */ +uae_u32 REGPARAM2 op_57c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(7) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (EQ) */ +uae_u32 REGPARAM2 op_57c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(7)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(7)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (EQ) */ +uae_u32 REGPARAM2 op_57d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (EQ) */ +uae_u32 REGPARAM2 op_57d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (EQ) */ +uae_u32 REGPARAM2 op_57e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (EQ) */ +uae_u32 REGPARAM2 op_57e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (EQ) */ +uae_u32 REGPARAM2 op_57f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (EQ) */ +uae_u32 REGPARAM2 op_57f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (EQ) */ +uae_u32 REGPARAM2 op_57f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(7) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VC) */ +uae_u32 REGPARAM2 op_58c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(8) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VC) */ +uae_u32 REGPARAM2 op_58c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(8)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(8)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VC) */ +uae_u32 REGPARAM2 op_58d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VC) */ +uae_u32 REGPARAM2 op_58d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VC) */ +uae_u32 REGPARAM2 op_58e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VC) */ +uae_u32 REGPARAM2 op_58e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VC) */ +uae_u32 REGPARAM2 op_58f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VC) */ +uae_u32 REGPARAM2 op_58f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VC) */ +uae_u32 REGPARAM2 op_58f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(8) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (VS) */ +uae_u32 REGPARAM2 op_59c0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(9) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (VS) */ +uae_u32 REGPARAM2 op_59c8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(9)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(9)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (VS) */ +uae_u32 REGPARAM2 op_59d0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (VS) */ +uae_u32 REGPARAM2 op_59d8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (VS) */ +uae_u32 REGPARAM2 op_59e0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (VS) */ +uae_u32 REGPARAM2 op_59e8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (VS) */ +uae_u32 REGPARAM2 op_59f0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (VS) */ +uae_u32 REGPARAM2 op_59f8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (VS) */ +uae_u32 REGPARAM2 op_59f9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(9) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (PL) */ +uae_u32 REGPARAM2 op_5ac0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(10) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (PL) */ +uae_u32 REGPARAM2 op_5ac8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(10)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(10)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (PL) */ +uae_u32 REGPARAM2 op_5ad0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (PL) */ +uae_u32 REGPARAM2 op_5ad8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (PL) */ +uae_u32 REGPARAM2 op_5ae0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (PL) */ +uae_u32 REGPARAM2 op_5ae8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (PL) */ +uae_u32 REGPARAM2 op_5af0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (PL) */ +uae_u32 REGPARAM2 op_5af8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (PL) */ +uae_u32 REGPARAM2 op_5af9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(10) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (MI) */ +uae_u32 REGPARAM2 op_5bc0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(11) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (MI) */ +uae_u32 REGPARAM2 op_5bc8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(11)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(11)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (MI) */ +uae_u32 REGPARAM2 op_5bd0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (MI) */ +uae_u32 REGPARAM2 op_5bd8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (MI) */ +uae_u32 REGPARAM2 op_5be0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (MI) */ +uae_u32 REGPARAM2 op_5be8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (MI) */ +uae_u32 REGPARAM2 op_5bf0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (MI) */ +uae_u32 REGPARAM2 op_5bf8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (MI) */ +uae_u32 REGPARAM2 op_5bf9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(11) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GE) */ +uae_u32 REGPARAM2 op_5cc0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(12) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GE) */ +uae_u32 REGPARAM2 op_5cc8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(12)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(12)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GE) */ +uae_u32 REGPARAM2 op_5cd0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GE) */ +uae_u32 REGPARAM2 op_5cd8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GE) */ +uae_u32 REGPARAM2 op_5ce0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GE) */ +uae_u32 REGPARAM2 op_5ce8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GE) */ +uae_u32 REGPARAM2 op_5cf0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GE) */ +uae_u32 REGPARAM2 op_5cf8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GE) */ +uae_u32 REGPARAM2 op_5cf9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(12) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LT) */ +uae_u32 REGPARAM2 op_5dc0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(13) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LT) */ +uae_u32 REGPARAM2 op_5dc8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(13)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(13)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LT) */ +uae_u32 REGPARAM2 op_5dd0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LT) */ +uae_u32 REGPARAM2 op_5dd8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LT) */ +uae_u32 REGPARAM2 op_5de0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LT) */ +uae_u32 REGPARAM2 op_5de8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LT) */ +uae_u32 REGPARAM2 op_5df0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LT) */ +uae_u32 REGPARAM2 op_5df8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LT) */ +uae_u32 REGPARAM2 op_5df9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(13) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (GT) */ +uae_u32 REGPARAM2 op_5ec0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(14) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (GT) */ +uae_u32 REGPARAM2 op_5ec8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(14)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(14)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (GT) */ +uae_u32 REGPARAM2 op_5ed0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (GT) */ +uae_u32 REGPARAM2 op_5ed8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (GT) */ +uae_u32 REGPARAM2 op_5ee0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (GT) */ +uae_u32 REGPARAM2 op_5ee8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (GT) */ +uae_u32 REGPARAM2 op_5ef0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (GT) */ +uae_u32 REGPARAM2 op_5ef8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (GT) */ +uae_u32 REGPARAM2 op_5ef9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(14) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* Scc.B Dn (LE) */ +uae_u32 REGPARAM2 op_5fc0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_s8 src = m68k_dreg(regs, srcreg); + int val = cctrue(15) ? 0xff : 0x00; + if (!val) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + } + opcode |= 0x20000; + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* DBcc.W Dn,#.W (LE) */ +uae_u32 REGPARAM2 op_5fc8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + int pcadjust = -2; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 offs = get_iiword_jit(2); + uaecptr oldpc = m68k_getpc(); + if (!cctrue(15)) { + m68k_incpc((uae_s32)offs + 2); + if (offs & 1) { + exception3_read_prefetch(opcode, m68k_getpc()); + return 0; + } + if (src) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + return 0; + } + pcadjust = 0; + } + m68k_setpc_j(oldpc + 4); + if (!cctrue(15)) { + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); + } + return 0; +} +/* 4 0,0 B */ + +/* Scc.B (An) (LE) */ +uae_u32 REGPARAM2 op_5fd0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (An)+ (LE) */ +uae_u32 REGPARAM2 op_5fd8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B -(An) (LE) */ +uae_u32 REGPARAM2 op_5fe0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* Scc.B (d16,An) (LE) */ +uae_u32 REGPARAM2 op_5fe8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (d8,An,Xn) (LE) */ +uae_u32 REGPARAM2 op_5ff0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s8 src = x_get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* Scc.B (xxx).W (LE) */ +uae_u32 REGPARAM2 op_5ff8_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* Scc.B (xxx).L (LE) */ +uae_u32 REGPARAM2 op_5ff9_55_ff(uae_u32 opcode) +{ + uaecptr srca; + srca = get_iilong_jit(2); + uae_s8 src = x_get_byte(srca); + int val = cctrue(15) ? 0xff : 0x00; + x_put_byte(srca, val); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_55_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_s16 src = get_iiword_jit(2); + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 4; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 4 0,0 B */ + +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (uae_s32)(uae_s8)(real_opcode & 255); + uae_s32 s; + uae_u32 src = srcreg; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_55_ff(uae_u32 opcode) +{ + uae_s32 s; + uae_u32 src = 0xffffffff; + s = (uae_s32)src + 2; + uaecptr oldpc = m68k_getpc(); + uaecptr nextpc = oldpc + 2; + if (m68k_areg(regs, 7) & 1) { + m68k_areg(regs, 7) -= 4; + m68k_incpc(2); + exception3_write_access(opcode, m68k_areg(regs, 7), sz_word, oldpc, 1); + return 0; + } + m68k_do_bsri_jit(nextpc, s); + if (m68k_getpc() & 1) { + uaecptr addr = m68k_getpc(); + m68k_incpc(-2); + exception3_read_prefetch(opcode, addr); + return 0; + } + if (debugmem_trace) { + branch_stack_push(oldpc, nextpc); + } + return 0; +} +/* 2 0,0 B */ + +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src |= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgo) & (flgn ^ flgo)); + SET_CFLG(((uae_u32)(src)) > ((uae_u32)(dst))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst - src - (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgo) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = ((real_opcode >> 9) & 7); + uae_u32 dstreg = real_opcode & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + src &= dst; + CLEAR_CZNV(); + SET_ZFLG(((uae_s32)(src)) == 0); + SET_NFLG(((uae_s32)(src)) < 0); + m68k_dreg(regs, dstreg) = (src); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_areg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg); + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) += 4; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = get_iilong_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_getpc() + 2; + srca += (uae_s32)(uae_s16)get_iiword_jit(2); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 0,0 */ + +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + uaecptr tmppc = m68k_getpc() + 2; + srca = get_disp_ea_000(tmppc, get_iiword_jit(2)); + uae_s32 src = x_get_long(srca); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(4); + return 0; +} +/* 4 4,0 */ + +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src; + src = get_iilong_jit(2); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG(((uae_s32)(newv)) == 0); + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(((uae_u32)(~dst)) < ((uae_u32)(src))); + COPY_CARRY(); + SET_NFLG(flgn != 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(6); + return 0; +} +/* 6 0,0 */ + +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s8 src = m68k_dreg(regs, srcreg); + uae_s8 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; + uae_s8 src = x_get_byte(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; + uae_s8 dst = x_get_byte(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s8)(newv)) == 0)); + SET_NFLG(((uae_s8)(newv)) < 0); + x_put_byte(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s16 src = m68k_dreg(regs, srcreg); + uae_s16 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + uae_s16 src = x_get_word(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + uae_s16 dst = x_get_word(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s16)(newv)) == 0)); + SET_NFLG(((uae_s16)(newv)) < 0); + x_put_word(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uae_s32 src = m68k_dreg(regs, srcreg); + uae_s32 dst = m68k_dreg(regs, dstreg); + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + m68k_dreg(regs, dstreg) = (newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_55_ff(uae_u32 opcode) +{ + uae_u32 real_opcode = opcode; + uae_u32 srcreg = (real_opcode & 7); + uae_u32 dstreg = (real_opcode >> 9) & 7; + uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + uae_s32 src = x_get_long(srca); + m68k_areg(regs, srcreg) = srca; + uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + uae_s32 dst = x_get_long(dsta); + m68k_areg(regs, dstreg) = dsta; + uae_u32 newv = dst + src + (GET_XFLG() ? 1 : 0); + int oldz = GET_ZFLG(); + int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_VFLG((flgs ^ flgn) & (flgo ^ flgn)); + SET_CFLG(flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); + COPY_CARRY(); + SET_ZFLG(GET_ZFLG() & (((uae_s32)(newv)) == 0)); + SET_NFLG(((uae_s32)(newv)) < 0); + x_put_long(dsta, newv); + m68k_incpc(2); + return 0; +} +/* 2 0,0 */ + diff --git a/cpustbl.cpp b/cpustbl.cpp new file mode 100644 index 00000000..fbe23d5f --- /dev/null +++ b/cpustbl.cpp @@ -0,0 +1,73328 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "options.h" +#include "memory.h" +#include "custom.h" +#include "events.h" +#include "newcpu.h" +#include "cpu_prefetch.h" +#include "cputbl.h" +#define SET_ALWAYS_CFLG(x) SET_CFLG(x) +#define SET_ALWAYS_NFLG(x) SET_NFLG(x) +#ifdef CPUEMU_0 +const struct cputbl op_smalltbl_0[] = { +{ op_0000_0_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_0_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_0_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_0_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_0_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_0_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_0_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_0_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_0_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_0_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_0_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_0_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_0_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_0_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_0_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_0_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_0_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_0_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_0_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_0_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_0_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_0_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_0_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_0_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_0_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_0_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_00d0_0_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00e8_0_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f0_0_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f8_0_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f9_0_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fa_0_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fb_0_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0100_0_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_0_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_0_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_0_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_0_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_0_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_0_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_0_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_0_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_0_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_0_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_0_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_0_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_0_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_0_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_0_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_0_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_0_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_0_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_0_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_0_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_0_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_0_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_0_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_0_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_0_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_0_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_0_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_0_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_0_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_0_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_0_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_0_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_0_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_0_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_0_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_0_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_0_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_0_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_0_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_0_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_0_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_0_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_0_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_0_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_0_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_0_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_0_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_0_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_0_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_0_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_0_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_0_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_0_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_0_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_0_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_0_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_0_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_0_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_0_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_0_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_0_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_0_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_0_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_0_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ op_02d0_0_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02e8_0_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f0_0_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f8_0_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f9_0_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fa_0_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fb_0_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0400_0_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_0_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_0_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_0_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_0_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_0_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_0_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_0_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_0_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_0_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_0_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_0_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_0_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_0_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_0_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_0_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_0_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_0_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_0_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_0_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_0_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_0_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_0_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_0_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ op_04d0_0_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04e8_0_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f0_0_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f8_0_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f9_0_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fa_0_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fb_0_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0600_0_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_0_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_0_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_0_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_0_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_0_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_0_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_0_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_0_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_0_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_0_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_0_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_0_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_0_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_0_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_0_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_0_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_0_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_0_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_0_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_0_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_0_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_0_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_0_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ op_06c0_0_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06c8_0_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06d0_0_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06e8_0_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f0_0_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f8_0_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f9_0_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fa_0_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fb_0_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ op_0800_0_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_0_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_0_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_0_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_0_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_0_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_0_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_0_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_0_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_0_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_0_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_0_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_0_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_0_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_0_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_0_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_0_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_0_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_0_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_0_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_0_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_0_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_0_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_0_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_0_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_0_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_0_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_0_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_0_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_0_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_0_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_0_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_0_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_0_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_0_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_0_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_0_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_0_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_0_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_0_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_0_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_0_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_0_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_0_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_0_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_0_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_0_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_0_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_0_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_0_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_0_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_0_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_0_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_0_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_0_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_0_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_0_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_0_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_0_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_0_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_0_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_0_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_0_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_0_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_0_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_0_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_0_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_0_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_0_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_0_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_0_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_0_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_0_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_0_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_0_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c3a_0_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c3b_0_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c40_0_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_0_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_0_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_0_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_0_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_0_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_0_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_0_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c7a_0_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c7b_0_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c80_0_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_0_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_0_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_0_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_0_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_0_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_0_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_0_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cba_0_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cbb_0_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_0_ff, NULL, 0x0cd0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_0_ff, NULL, 0x0cd8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_0_ff, NULL, 0x0ce0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_0_ff, NULL, 0x0ce8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_0_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_0_ff, NULL, 0x0cf8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_0_ff, NULL, 0x0cf9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_0_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_0_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_0_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_0_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_0_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_0_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_0_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_0_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_0_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_0_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_0_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_0_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_0_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_0_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_0_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_0_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_0_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_0_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_0_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_0_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_0_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_0_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_0_ff, NULL, 0x0ed0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_0_ff, NULL, 0x0ed8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_0_ff, NULL, 0x0ee0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_0_ff, NULL, 0x0ee8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_0_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_0_ff, NULL, 0x0ef8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_0_ff, NULL, 0x0ef9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_0_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_0_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_0_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_0_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_0_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_0_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_0_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_0_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_0_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_0_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_0_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_0_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_0_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_0_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_0_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_0_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_0_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_0_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_0_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_0_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_0_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_0_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_0_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_0_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_0_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_0_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_0_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_0_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_0_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_0_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_0_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_0_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_0_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_0_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_0_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_0_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_0_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_0_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_0_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_0_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_0_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_0_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_0_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_0_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_0_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_0_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_0_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_0_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_0_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_0_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_0_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_0_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_0_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_0_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_0_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_0_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_0_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_0_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_0_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_0_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_0_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_0_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_0_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_0_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_0_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_0_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_0_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_0_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_0_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_0_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_0_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_0_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_0_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_0_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_0_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_0_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_0_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_0_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_0_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_0_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_0_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_0_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_0_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_0_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_0_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_0_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_0_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_0_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_0_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_0_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_0_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_0_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_0_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_0_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_0_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_0_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_0_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_0_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_0_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_0_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_0_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_0_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_0_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_0_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_0_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_0_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_0_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_0_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_0_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_0_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_0_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_0_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_0_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_0_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_0_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_0_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_0_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_0_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_0_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_0_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_0_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_0_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_0_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_0_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_0_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_0_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_0_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_0_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_0_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_0_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_0_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_0_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_0_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_0_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_0_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_0_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_0_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_0_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_0_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_0_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_0_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_0_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_0_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_0_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_0_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_0_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_0_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_0_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_0_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_0_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_0_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_0_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_0_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_0_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_0_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_0_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_0_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_0_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_0_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_0_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_0_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_0_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_0_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_0_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_0_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_0_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_0_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_0_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_0_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_0_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_0_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_0_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_0_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_0_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_0_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_0_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_0_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_0_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_0_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_0_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_0_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_0_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_0_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_0_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_0_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_0_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_0_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_0_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_0_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_0_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_0_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_0_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_0_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_0_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_0_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_0_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_0_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_0_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_0_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_0_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_0_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_0_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_0_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_0_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_0_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_0_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_0_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_0_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_0_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_0_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_0_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_0_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_0_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_0_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_0_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_0_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_0_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_0_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_0_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_0_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_0_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_0_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_0_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_0_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_0_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_0_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_0_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_0_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_0_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_0_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_0_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_0_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_0_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_0_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_0_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_0_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_0_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_0_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_0_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_0_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_0_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_0_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_0_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_0_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_0_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_0_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_0_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_0_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_0_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_0_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_0_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_0_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_0_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_0_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_0_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_0_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_0_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_0_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_0_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_0_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_0_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_0_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_0_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_0_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_0_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_0_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_0_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_0_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_0_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_0_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_0_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_0_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_0_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_0_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_0_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_0_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_0_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_0_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_0_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_0_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_0_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_0_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_0_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_0_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_0_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_0_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_0_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_0_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_0_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_0_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_0_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_0_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_0_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_0_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_0_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_0_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_0_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_0_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_0_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_0_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_0_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_0_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_0_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_0_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_0_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_0_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_0_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_0_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_0_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_0_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_0_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_0_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_0_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_0_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_0_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_0_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_0_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_0_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_0_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_0_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_0_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_0_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_0_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_0_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_0_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_0_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_0_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_0_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_0_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_0_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_0_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_0_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_0_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_0_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_0_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_0_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_0_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4100_0_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4110_0_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4118_0_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4120_0_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4128_0_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4130_0_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4138_0_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4139_0_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413a_0_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413b_0_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413c_0_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ op_4180_0_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_0_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_0_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_0_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_0_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_0_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_0_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_0_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_0_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_0_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_0_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_0_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_0_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_0_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_0_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_0_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_0_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_0_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_0_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_0_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_0_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_0_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_0_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_0_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_0_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_0_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_0_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_0_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_0_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_0_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_0_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_0_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_0_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_0_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_0_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_0_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_0_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_0_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_0_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_0_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_0_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_0_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_0_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_0_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_0_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_0_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_0_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_0_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_0_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_0_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_0_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_0_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_0_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_0_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_0_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_0_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_0_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_0_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_0_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_0_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_0_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_0_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_0_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_0_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_0_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_0_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_0_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_0_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_0_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_0_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_0_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_0_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_0_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_0_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_0_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_0_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_0_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_0_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_0_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_0_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_0_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_0_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_0_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_0_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_0_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_0_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_0_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_0_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_0_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_0_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_0_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_0_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_0_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_0_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_0_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_0_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_0_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_0_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_0_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_0_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_0_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_0_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_0_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_0_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_0_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_0_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_0_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_0_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_0_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_0_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_0_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_0_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_0_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_0_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_0_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_0_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_0_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_0_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_0_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_0_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_0_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_0_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_0_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_0_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_0_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_0_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_0_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_0_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_0_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_0_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_0_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_0_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_0_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_0_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_0_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_0_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_0_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_0_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_0_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_0_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_0_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_0_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_0_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_0_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_0_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_0_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_0_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_0_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_0_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_0_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_0_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_0_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ op_49c0_0_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ op_4a00_0_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_0_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_0_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_0_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_0_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_0_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_0_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_0_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a3a_0_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3b_0_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3c_0_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a40_0_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a48_0_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a50_0_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_0_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_0_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_0_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_0_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_0_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_0_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a7a_0_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7b_0_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7c_0_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a80_0_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a88_0_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a90_0_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_0_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_0_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_0_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_0_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_0_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_0_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4aba_0_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abb_0_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abc_0_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4ac0_0_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4ac8_0_ff, NULL, 0x4ac8, 2, { 0, 0 }, 0 }, /* HALT */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4acc_0_ff, NULL, 0x4acc, 2, { 0, 0 }, 0 }, /* PULSE */ +#endif +{ op_4ad0_0_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_0_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_0_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_0_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_0_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_0_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_0_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4c00_0_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c10_0_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c18_0_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c20_0_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c28_0_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c30_0_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c38_0_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c39_0_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3a_0_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3b_0_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3c_0_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c40_0_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c50_0_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c58_0_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c60_0_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c68_0_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c70_0_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c78_0_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c79_0_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7a_0_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7b_0_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7c_0_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ op_4c90_0_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_0_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_0_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_0_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_0_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_0_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_0_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_0_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_0_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_0_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_0_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_0_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_0_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_0_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_0_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_0_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_0_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_0_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_0_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_0_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_0_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_0_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_0_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_0_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_0_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_0_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_0_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_0_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_0_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_0_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_0_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_0_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_0_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_0_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_0_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_0_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_0_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_0_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_0_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_0_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_0_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_0_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_0_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_0_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_0_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_0_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_0_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_0_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_0_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_0_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_0_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_0_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_0_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_0_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_0_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_0_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_0_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_0_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_0_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_0_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_0_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_0_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_0_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_0_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_0_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_0_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_0_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_0_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_0_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_0_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_0_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_0_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_0_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_0_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_0_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_0_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_0_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_0_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_0_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_0_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_50fa_0_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fb_0_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fc_0_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5100_0_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_0_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_0_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_0_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_0_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_0_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_0_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_0_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_0_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_0_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_0_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_0_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_0_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_0_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_0_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_0_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_0_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_0_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_0_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_0_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_0_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_0_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_0_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_0_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_0_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_0_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_0_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_0_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_0_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_0_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_0_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_0_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_0_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_0_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_0_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_51fa_0_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fb_0_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fc_0_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_52c0_0_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_0_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_0_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_0_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_0_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_0_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_0_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_0_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_0_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_52fa_0_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fb_0_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fc_0_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_53c0_0_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_0_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_0_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_0_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_0_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_0_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_0_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_0_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_0_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_53fa_0_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fb_0_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fc_0_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_54c0_0_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_0_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_0_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_0_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_0_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_0_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_0_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_0_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_0_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_54fa_0_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fb_0_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fc_0_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_55c0_0_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_0_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_0_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_0_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_0_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_0_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_0_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_0_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_0_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_55fa_0_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fb_0_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fc_0_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_56c0_0_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_0_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_0_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_0_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_0_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_0_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_0_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_0_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_0_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_56fa_0_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fb_0_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fc_0_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_57c0_0_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_0_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_0_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_0_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_0_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_0_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_0_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_0_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_0_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_57fa_0_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fb_0_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fc_0_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_58c0_0_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_0_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_0_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_0_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_0_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_0_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_0_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_0_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_0_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_58fa_0_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fb_0_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fc_0_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_59c0_0_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_0_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_0_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_0_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_0_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_0_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_0_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_0_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_0_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_59fa_0_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fb_0_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fc_0_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ac0_0_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_0_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_0_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_0_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_0_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_0_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_0_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_0_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_0_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5afa_0_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afb_0_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afc_0_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5bc0_0_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_0_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_0_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_0_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_0_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_0_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_0_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_0_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_0_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5bfa_0_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfb_0_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfc_0_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5cc0_0_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_0_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_0_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_0_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_0_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_0_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_0_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_0_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_0_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5cfa_0_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfb_0_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfc_0_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5dc0_0_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_0_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_0_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_0_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_0_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_0_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_0_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_0_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_0_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5dfa_0_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfb_0_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfc_0_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ec0_0_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_0_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_0_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_0_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_0_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_0_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_0_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_0_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_0_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5efa_0_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efb_0_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efc_0_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5fc0_0_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_0_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_0_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_0_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_0_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_0_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_0_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_0_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_0_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5ffa_0_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffb_0_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffc_0_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_6000_0_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_0_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_0_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_0_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_0_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_0_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_0_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_0_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_0_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_0_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_0_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_0_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_0_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_0_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_0_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_0_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_0_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_0_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_0_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_0_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_0_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_0_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_0_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_0_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_0_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_0_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_0_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_0_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_0_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_0_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_0_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_0_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_0_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_0_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_0_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_0_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_0_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_0_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_0_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_0_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_0_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_0_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_0_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_0_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_0_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_0_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_0_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_0_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_0_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_0_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_0_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_0_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_0_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_0_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_0_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_0_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_0_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_0_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_0_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_0_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_0_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_0_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_0_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_0_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_0_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_0_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_0_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_0_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_0_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_0_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_0_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_0_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_0_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_0_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_0_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_0_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_0_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_0_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_0_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_0_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_0_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_0_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_0_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_0_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_0_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_0_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_0_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_0_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_0_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_0_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_0_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_0_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_0_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_0_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_0_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_0_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_0_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_0_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_0_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_0_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_0_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_0_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8140_0_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8148_0_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ op_8150_0_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_0_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_0_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_0_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_0_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_0_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_0_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8180_0_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8188_0_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ op_8190_0_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_0_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_0_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_0_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_0_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_0_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_0_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_0_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_0_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_0_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_0_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_0_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_0_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_0_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_0_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_0_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_0_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_0_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_0_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_0_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_0_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_0_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_0_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_0_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_0_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_0_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_0_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_0_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_0_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_0_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_0_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_0_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_0_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_0_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_0_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_0_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_0_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_0_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_0_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_0_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_0_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_0_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_0_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_0_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_0_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_0_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_0_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_0_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_0_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_0_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_0_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_0_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_0_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_0_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_0_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_0_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_0_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_0_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_0_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_0_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_0_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_0_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_0_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_0_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_0_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_0_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_0_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_0_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_0_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_0_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_0_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_0_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_0_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_0_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_0_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_0_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_0_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_0_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_0_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_0_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_0_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_0_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_0_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_0_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_0_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_0_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_0_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_0_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_0_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_0_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_0_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_0_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_0_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_0_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_0_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_0_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_0_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_0_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_0_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_0_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_0_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_0_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_0_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_0_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_0_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_0_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_0_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_0_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_0_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_0_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_0_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_0_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_0_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_0_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_0_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_0_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_0_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_0_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_0_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_0_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_0_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_0_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_0_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_0_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_0_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_0_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_0_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_0_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_0_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_0_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_0_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_0_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_0_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_0_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_0_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_0_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_0_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_0_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_0_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_0_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_0_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_0_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_0_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_0_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_0_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_0_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_0_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_0_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_0_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_0_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_0_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_0_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_0_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_0_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_0_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_0_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_0_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_0_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_0_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_0_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_0_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_0_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_0_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_0_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_0_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_0_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_0_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_0_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_0_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_0_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_0_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_0_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_0_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_0_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_0_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_0_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_0_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_0_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_0_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_0_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_0_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_0_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_0_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_0_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_0_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_0_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_0_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_0_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_0_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_0_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_0_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_0_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_0_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_0_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_0_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_0_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_0_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_0_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_0_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_0_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_0_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_0_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_0_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_0_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_0_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_0_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_0_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_0_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_0_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_0_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_0_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_0_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_0_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_0_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_0_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_0_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_0_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_0_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_0_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_0_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_0_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_0_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_0_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_0_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_0_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_0_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_0_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_0_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_0_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_0_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_0_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_0_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_0_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_0_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_0_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_0_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_0_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_0_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_0_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_0_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_0_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_0_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_0_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_0_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_0_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_0_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_0_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_0_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_0_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_0_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_0_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_0_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_0_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_0_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_0_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_0_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_0_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_0_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_0_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_0_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_0_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_0_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_0_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_0_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_0_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_0_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_0_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_0_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_0_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_0_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_0_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_0_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_0_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_0_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_0_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_0_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_0_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_0_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_0_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_0_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_0_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_0_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_0_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_0_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_0_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_0_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_0_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_0_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_0_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_0_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_0_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_0_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_0_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_0_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_0_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_0_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_0_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_0_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_0_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_0_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_0_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_0_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_0_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_0_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_0_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_0_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_0_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_0_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_0_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_0_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_0_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_0_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_0_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_0_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_0_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_0_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_0_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_0_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_0_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_0_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_0_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_0_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_0_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_0_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_0_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_0_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_0_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_0_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_0_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_0_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_0_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_0_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_0_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_0_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_0_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_0_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_0_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_0_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_0_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_0_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_0_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_0_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_0_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_0_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_0_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_0_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_0_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_0_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_0_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_0_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_0_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_0_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_0_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_0_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_0_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_0_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_0_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_0_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_0_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_0_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_0_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_0_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_0_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_0_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_0_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_0_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_0_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_0_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_0_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_0_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_0_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_0_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_0_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_0_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_0_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_0_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_0_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_0_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_0_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_0_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_0_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_0_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_0_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_0_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_0_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_0_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_0_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_0_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_0_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_0_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_0_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_0_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_0_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_0_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_0_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_0_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_0_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_0_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_0_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_0_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_0_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_0_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_0_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_0_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_0_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_0_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_0_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_0_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_0_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_0_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_0_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_0_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_0_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_0_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_0_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_0_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_0_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_0_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_0_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_0_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_0_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_0_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_0_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_0_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_0_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_0_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_0_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_0_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_0_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_0_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_0_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_0_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_0_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_0_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_0_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_0_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_0_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_0_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_0_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_0_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_0_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_0_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_0_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_0_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_0_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_0_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_0_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_0_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_0_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_0_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_0_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_0_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_0_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_0_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_0_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_0_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_0_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_0_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_0_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_0_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_0_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ op_e8c0_0_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8d0_0_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8e8_0_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f0_0_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f8_0_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f9_0_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fa_0_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fb_0_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9c0_0_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9d0_0_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9e8_0_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f0_0_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f8_0_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f9_0_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fa_0_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fb_0_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eac0_0_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ead0_0_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eae8_0_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf0_0_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf8_0_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf9_0_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebc0_0_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebd0_0_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebe8_0_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf0_0_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf8_0_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf9_0_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfa_0_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfb_0_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecc0_0_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecd0_0_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ece8_0_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf0_0_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf8_0_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf9_0_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edc0_0_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edd0_0_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ede8_0_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf0_0_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf8_0_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf9_0_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfa_0_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfb_0_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eec0_0_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eed0_0_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eee8_0_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef0_0_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef8_0_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef9_0_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efc0_0_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efd0_0_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efe8_0_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff0_0_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff8_0_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff9_0_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f000_0_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f008_0_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f010_0_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f018_0_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f020_0_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f028_0_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f030_0_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f038_0_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f039_0_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f200_0_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f208_0_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f210_0_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f218_0_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f220_0_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f228_0_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f230_0_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f238_0_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f239_0_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23a_0_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23b_0_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23c_0_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f240_0_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f248_0_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f250_0_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f258_0_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f260_0_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f268_0_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f270_0_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f278_0_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f279_0_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27a_0_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27b_0_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27c_0_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f280_0_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f2c0_0_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f310_0_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f320_0_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f328_0_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f330_0_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f338_0_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f339_0_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f350_0_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f358_0_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f368_0_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f370_0_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f378_0_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f379_0_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37a_0_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37b_0_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f408_0_ff, NULL, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f410_0_ff, NULL, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f418_0_ff, NULL, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f419_0_ff, NULL, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41a_0_ff, NULL, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41b_0_ff, NULL, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41c_0_ff, NULL, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41d_0_ff, NULL, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41e_0_ff, NULL, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41f_0_ff, NULL, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f428_0_ff, NULL, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f430_0_ff, NULL, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f438_0_ff, NULL, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f439_0_ff, NULL, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43a_0_ff, NULL, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43b_0_ff, NULL, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43c_0_ff, NULL, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43d_0_ff, NULL, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43e_0_ff, NULL, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43f_0_ff, NULL, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f500_0_ff, NULL, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f508_0_ff, NULL, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f510_0_ff, NULL, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f518_0_ff, NULL, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f548_0_ff, NULL, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f568_0_ff, NULL, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f588_0_ff, NULL, 0xf588, -1, { 0, 0 }, 0 }, /* PLPAW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f5c8_0_ff, NULL, 0xf5c8, -1, { 0, 0 }, 0 }, /* PLPAR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f600_0_ff, NULL, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f608_0_ff, NULL, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f610_0_ff, NULL, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f618_0_ff, NULL, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f620_0_ff, NULL, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f800_0_ff, NULL, 0xf800, -1, { 0, 0 }, 0 }, /* LPSTOP */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_0 */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_1[] = { +{ op_0000_0_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_0_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_0_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_0_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_0_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_0_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_0_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_0_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_1_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_0_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_0_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_0_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_0_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_0_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_0_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_0_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_0_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_1_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_0_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_0_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_0_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_0_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_0_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_0_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_0_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_0_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_00d0_0_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00e8_0_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f0_0_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_00f8_0_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f9_0_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fa_0_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fb_0_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0100_0_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_0_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_0_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_0_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_0_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_0_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_0_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_0_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_0_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_0_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_0_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_0_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_0_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_0_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_0_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_0_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_0_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_0_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_0_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_0_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_0_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_0_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_0_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_0_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_0_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_0_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_0_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_0_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_0_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_0_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_0_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_0_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_0_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_0_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_0_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_0_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_0_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_0_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_0_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_0_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_0_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_0_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_0_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_0_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_0_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_0_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_0_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_1_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_0_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_0_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_0_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_0_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_0_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_0_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_0_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_0_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_1_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_0_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_0_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_0_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_0_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_0_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_0_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_0_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_0_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_02d0_0_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02e8_0_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f0_0_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_02f8_0_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f9_0_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fa_0_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fb_0_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0400_0_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_0_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_0_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_0_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_0_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_0_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_0_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_0_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_0_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_0_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_0_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_0_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_0_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_0_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_0_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_0_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_0_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_0_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_0_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_0_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_0_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_0_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_0_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_0_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_04d0_0_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04e8_0_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f0_0_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_04f8_0_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f9_0_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fa_0_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fb_0_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0600_0_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_0_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_0_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_0_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_0_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_0_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_0_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_0_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_0_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_0_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_0_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_0_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_0_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_0_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_0_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_0_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_0_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_0_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_0_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_0_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_0_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_0_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_0_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_0_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_06c0_0_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06c8_0_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06d0_0_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06e8_0_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f0_0_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f8_0_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f9_0_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fa_0_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fb_0_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_0800_0_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_0_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_0_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_0_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_0_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_0_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_0_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_0_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_0_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_0_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_0_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_0_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_0_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_0_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_0_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_0_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_0_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_0_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_0_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_0_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_0_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_0_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_0_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_0_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_0_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_0_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_0_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_0_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_0_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_0_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_0_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_0_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_0_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_0_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_0_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_0_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_0_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_0_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_0_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_0_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_0_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_0_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_1_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_0_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_0_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_0_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_0_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_0_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_0_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_0_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_0_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_1_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_0_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_0_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_0_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_0_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_0_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_0_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_0_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_0_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_1_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_1_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_1_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_1_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_1_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_1_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_1_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_0_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_0_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_0_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_0_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_0_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_0_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_0_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_0_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3a_0_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3b_0_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c40_0_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_0_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_0_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_0_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_0_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_0_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_0_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_0_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7a_0_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7b_0_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c80_0_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_0_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_0_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_0_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_0_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_0_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_0_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_0_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0cba_0_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cbb_0_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_1_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_1_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_1_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_1_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_1_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_1_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_1_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_1_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_1_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_1_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_1_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_1_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_1_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_1_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_1_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_1_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_1_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_1_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_1_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_1_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_1_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_1_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_1_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_1_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_1_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_1_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_1_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_1_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_1_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_1_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_1_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_1_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_1_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_1_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_1_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_1_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_1_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_0_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_0_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_0_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_0_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_0_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_0_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_0_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_0_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_0_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_0_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_0_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_0_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_0_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_0_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_0_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_0_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_0_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_0_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_0_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_0_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_0_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_0_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_0_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_0_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_0_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_0_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_0_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_0_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_0_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_0_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_0_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_0_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_0_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_0_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_0_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_0_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_0_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_0_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_0_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_0_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_0_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_0_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_0_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_0_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_0_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_0_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_0_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_0_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_0_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_0_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_0_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_0_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_0_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_0_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_0_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_0_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_0_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_0_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_0_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_0_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_0_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_0_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_0_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_0_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_0_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_0_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_0_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_0_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_0_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_0_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_0_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_0_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_0_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_0_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_0_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_0_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_0_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_0_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_0_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_0_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_0_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_0_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_0_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_0_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_0_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_0_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_0_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_0_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_0_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_0_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_0_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_0_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_0_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_0_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_0_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_0_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_0_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_0_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_0_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_0_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_0_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_0_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_0_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_0_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_0_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_0_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_0_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_0_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_0_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_0_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_0_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_0_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_0_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_0_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_0_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_0_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_0_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_0_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_0_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_0_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_0_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_0_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_0_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_0_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_0_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_0_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_0_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_0_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_0_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_0_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_0_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_0_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_0_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_0_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_0_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_0_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_0_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_0_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_0_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_0_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_0_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_0_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_0_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_0_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_0_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_0_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_0_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_0_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_0_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_0_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_0_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_0_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_0_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_0_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_0_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_0_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_0_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_0_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_0_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_0_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_0_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_0_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_0_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_0_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_0_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_0_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_0_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_0_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_0_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_0_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_0_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_0_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_0_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_0_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_0_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_0_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_0_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_0_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_0_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_0_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_0_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_0_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_0_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_0_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_0_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_0_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_0_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_0_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_0_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_0_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_0_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_0_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_0_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_0_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_0_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_0_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_0_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_0_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_0_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_0_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_0_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_0_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_0_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_0_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_0_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_0_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_0_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_0_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_0_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_0_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_0_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_0_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_0_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_0_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_0_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_0_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_0_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_0_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_0_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_0_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_0_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_0_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_0_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_0_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_0_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_0_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_0_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_0_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_0_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_0_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_0_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_0_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_0_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_0_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_0_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_0_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_0_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_0_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_0_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_0_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_0_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_0_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_0_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_0_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_0_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_0_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_0_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_0_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_0_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_0_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_0_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_0_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_0_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_0_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_0_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_0_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_0_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_0_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_0_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_0_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_0_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_0_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_0_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_0_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_0_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_0_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_0_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_0_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_0_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_0_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_0_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_0_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_0_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_0_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_0_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_0_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_0_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_0_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_0_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_0_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_0_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_0_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_0_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_0_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_0_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_0_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_0_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_0_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_0_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_0_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_0_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_0_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_0_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_0_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_0_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_0_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_0_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_0_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_0_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_0_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_0_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_0_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_0_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_0_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_0_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_0_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_0_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_0_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_0_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_0_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_0_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_0_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_0_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_0_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_0_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_0_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_0_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_0_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_0_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_0_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_0_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_0_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_0_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_0_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_0_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_0_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_0_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_0_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_0_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_0_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_0_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_0_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_0_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_0_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_0_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_0_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4100_0_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4110_0_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4118_0_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4120_0_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4128_0_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4130_0_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_4138_0_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4139_0_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_413a_0_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_413b_0_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_413c_0_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_4180_0_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_0_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_0_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_0_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_0_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_0_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_0_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_0_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_0_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_0_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_0_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_0_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_0_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_0_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_0_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_0_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_0_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_0_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_0_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_0_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_0_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_0_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_0_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_0_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_0_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_0_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_0_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_0_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_0_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_0_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_0_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_0_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_0_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_0_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_0_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_0_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_0_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_0_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_0_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_0_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_0_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_0_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_0_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_0_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_0_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_0_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_0_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f0_0_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_42f8_0_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_0_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_0_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_0_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_0_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_0_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_0_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_0_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_0_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_0_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_0_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_0_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_0_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_0_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_0_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_0_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_0_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_0_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_0_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_0_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_0_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_0_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_0_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_0_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_0_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_0_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_0_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_0_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_0_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_0_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_0_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_0_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_0_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_0_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_0_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_0_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_0_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_0_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_0_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_0_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_0_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_0_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_0_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_0_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_0_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_0_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_0_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_0_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_0_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_0_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_0_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_0_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_0_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_0_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_0_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_0_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_0_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_0_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_0_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_0_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_0_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_0_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_0_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_0_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_0_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_0_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_0_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_0_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_0_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_0_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_0_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_0_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_0_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_1_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_0_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_0_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_0_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_0_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_0_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_0_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_0_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_0_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_0_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_0_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_0_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_0_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_0_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_0_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_0_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_0_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_0_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_0_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_0_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_0_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_0_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_0_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_0_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_0_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_0_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_0_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_0_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_0_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_0_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_0_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_49c0_0_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4a00_0_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_0_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_0_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_0_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_0_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_0_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_0_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_0_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a3a_0_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a3b_0_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a3c_0_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_0_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a48_0_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_0_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_0_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_0_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_0_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_0_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_0_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_0_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a7a_0_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a7b_0_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a7c_0_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_0_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a88_0_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_0_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_0_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_0_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_0_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_0_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_0_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_0_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4aba_0_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4abb_0_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4abc_0_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_0_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_0_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_0_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_0_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_0_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_0_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_0_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_0_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c00_0_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c10_0_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c18_0_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c20_0_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c28_0_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c30_0_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c38_0_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c39_0_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3a_0_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3b_0_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c3c_0_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c40_0_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c50_0_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c58_0_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c60_0_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c68_0_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c70_0_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c78_0_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c79_0_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7a_0_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7b_0_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c7c_0_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c90_0_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_0_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_0_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_0_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_0_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_0_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_0_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_0_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_0_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_0_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_0_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_0_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_0_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_0_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_0_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_0_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_0_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_1_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_0_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_1_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_0_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_0_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_1_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_1_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_1_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e74_0_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ op_4e75_0_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_0_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_1_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_0_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_1_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_0_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_0_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_0_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_0_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_0_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_0_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_0_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_0_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_0_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_0_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_0_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_0_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_0_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_0_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_0_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_0_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_0_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_0_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_0_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_0_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_0_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_0_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_0_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_0_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_0_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_0_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_0_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_0_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_0_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_0_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_0_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_0_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_0_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_0_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_0_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_0_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_0_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_0_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_0_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_0_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_0_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_0_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_0_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_0_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_0_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_0_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_0_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_0_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_0_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_50fa_0_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fb_0_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fc_0_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5100_0_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_0_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_0_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_0_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_0_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_0_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_0_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_0_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_0_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_0_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_0_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_0_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_0_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_0_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_0_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_0_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_0_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_0_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_0_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_0_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_0_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_0_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_0_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_0_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_0_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_0_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_0_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_0_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_0_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_0_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_0_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_0_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_0_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_0_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_0_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_51fa_0_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fb_0_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fc_0_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52c0_0_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_0_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_0_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_0_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_0_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_0_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_0_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_0_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_0_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52fa_0_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fb_0_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fc_0_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53c0_0_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_0_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_0_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_0_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_0_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_0_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_0_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_0_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_0_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53fa_0_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fb_0_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fc_0_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54c0_0_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_0_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_0_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_0_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_0_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_0_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_0_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_0_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_0_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54fa_0_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fb_0_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fc_0_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55c0_0_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_0_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_0_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_0_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_0_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_0_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_0_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_0_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_0_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55fa_0_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fb_0_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fc_0_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56c0_0_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_0_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_0_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_0_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_0_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_0_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_0_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_0_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_0_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56fa_0_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fb_0_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fc_0_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57c0_0_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_0_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_0_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_0_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_0_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_0_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_0_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_0_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_0_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57fa_0_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fb_0_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fc_0_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58c0_0_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_0_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_0_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_0_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_0_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_0_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_0_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_0_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_0_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58fa_0_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fb_0_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fc_0_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59c0_0_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_0_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_0_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_0_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_0_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_0_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_0_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_0_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_0_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59fa_0_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fb_0_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fc_0_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ac0_0_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_0_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_0_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_0_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_0_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_0_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_0_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_0_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_0_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5afa_0_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afb_0_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afc_0_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bc0_0_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_0_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_0_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_0_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_0_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_0_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_0_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_0_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_0_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bfa_0_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfb_0_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfc_0_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cc0_0_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_0_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_0_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_0_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_0_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_0_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_0_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_0_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_0_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cfa_0_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfb_0_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfc_0_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dc0_0_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_0_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_0_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_0_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_0_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_0_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_0_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_0_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_0_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dfa_0_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfb_0_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfc_0_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ec0_0_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_0_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_0_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_0_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_0_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_0_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_0_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_0_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_0_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5efa_0_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efb_0_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efc_0_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5fc0_0_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_0_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_0_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_0_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_0_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_0_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_0_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_0_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_0_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ffa_0_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffb_0_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffc_0_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_6000_0_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_0_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_0_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_0_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_0_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_0_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_0_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_0_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_0_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_0_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_0_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_0_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_0_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_0_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_0_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_0_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_0_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_0_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_0_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_0_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_0_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_0_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_0_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_0_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_0_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_0_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_0_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_0_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_0_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_0_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_0_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_0_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_0_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_0_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_0_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_0_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_0_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_0_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_0_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_0_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_0_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_0_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_0_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_0_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_0_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_0_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_0_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_0_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_0_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_0_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_0_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_0_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_0_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_0_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_0_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_0_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_0_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_0_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_0_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_0_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_0_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_0_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_0_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_0_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_0_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_0_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_0_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_0_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_0_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_0_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_0_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_0_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_0_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_0_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_0_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_0_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_0_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_0_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_0_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_0_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_0_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_0_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_0_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_0_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_0_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_0_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_0_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_0_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_0_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_0_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_0_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_0_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_0_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_0_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_0_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_0_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_0_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_0_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_0_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_0_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_0_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_0_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8140_0_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8148_0_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8150_0_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_0_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_0_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_0_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_0_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_0_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_0_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8180_0_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8188_0_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8190_0_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_0_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_0_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_0_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_0_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_0_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_0_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_0_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_0_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_0_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_0_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_0_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_0_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_0_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_0_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_0_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_0_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_0_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_0_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_0_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_0_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_0_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_0_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_0_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_0_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_0_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_0_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_0_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_0_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_0_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_0_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_0_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_0_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_0_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_0_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_0_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_0_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_0_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_0_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_0_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_0_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_0_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_0_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_0_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_0_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_0_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_0_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_0_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_0_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_0_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_0_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_0_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_0_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_0_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_0_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_0_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_0_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_0_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_0_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_0_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_0_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_0_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_0_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_0_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_0_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_0_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_0_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_0_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_0_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_0_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_0_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_0_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_0_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_0_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_0_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_0_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_0_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_0_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_0_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_0_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_0_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_0_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_0_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_0_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_0_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_0_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_0_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_0_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_0_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_0_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_0_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_0_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_0_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_0_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_0_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_0_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_0_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_0_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_0_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_0_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_0_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_0_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_0_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_0_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_0_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_0_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_0_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_0_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_0_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_0_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_0_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_0_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_0_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_0_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_0_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_0_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_0_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_0_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_0_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_0_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_0_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_0_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_0_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_0_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_0_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_0_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_0_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_0_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_0_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_0_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_0_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_0_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_0_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_0_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_0_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_0_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_0_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_0_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_0_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_0_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_0_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_0_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_0_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_0_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_0_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_0_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_0_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_0_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_0_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_0_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_0_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_0_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_0_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_0_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_0_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_0_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_0_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_0_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_0_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_0_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_0_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_0_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_0_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_0_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_0_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_0_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_0_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_0_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_0_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_0_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_0_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_0_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_0_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_0_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_0_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_0_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_0_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_0_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_0_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_0_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_0_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_0_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_0_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_0_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_0_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_0_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_0_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_0_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_0_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_0_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_0_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_0_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_0_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_0_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_0_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_0_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_0_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_0_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_0_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_0_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_0_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_0_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_0_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_0_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_0_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_0_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_0_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_0_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_0_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_0_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_0_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_0_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_0_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_0_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_0_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_0_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_0_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_0_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_0_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_0_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_0_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_0_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_0_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_0_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_0_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_0_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_0_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_0_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_0_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_0_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_0_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_0_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_0_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_0_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_0_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_0_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_0_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_0_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_0_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_0_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_0_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_0_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_0_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_0_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_0_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_0_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_0_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_0_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_0_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_0_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_0_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_0_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_0_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_0_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_0_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_0_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_0_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_0_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_0_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_0_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_0_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_0_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_0_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_0_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_0_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_0_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_0_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_0_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_0_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_0_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_0_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_0_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_0_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_0_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_0_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_0_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_0_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_0_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_0_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_0_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_0_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_0_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_0_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_0_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_0_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_0_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_0_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_0_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_0_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_0_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_0_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_0_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_0_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_0_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_0_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_0_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_0_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_0_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_0_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_0_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_0_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_0_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_0_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_0_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_0_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_0_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_0_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_0_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_0_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_0_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_0_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_0_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_0_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_0_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_0_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_0_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_0_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_0_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_0_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_0_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_0_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_0_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_0_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_0_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_0_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_0_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_0_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_0_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_0_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_0_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_0_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_0_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_0_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_0_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_0_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_0_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_0_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_0_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_0_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_0_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_0_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_0_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_0_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_0_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_0_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_0_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_0_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_0_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_0_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_0_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_0_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_0_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_0_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_0_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_0_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_0_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_0_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_0_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_0_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_0_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_0_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_0_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_0_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_0_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_0_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_0_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_0_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_0_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_0_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_0_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_0_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_0_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_0_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_0_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_0_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_0_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_0_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_0_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_0_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_0_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_0_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_0_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_0_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_0_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_0_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_0_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_0_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_0_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_0_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_0_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_0_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_0_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_0_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_0_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_0_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_0_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_0_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_0_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_0_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_0_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_0_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_0_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_0_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_0_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_0_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_0_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_0_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_0_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_0_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_0_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_0_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_0_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_0_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_0_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_0_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_0_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_0_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_0_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_0_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_0_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_0_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_0_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_0_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_0_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_0_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_0_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_0_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_0_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_0_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_0_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_0_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_0_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_0_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_0_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_0_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_0_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_0_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_0_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_0_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_0_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_0_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_0_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_0_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_0_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_0_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_0_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_0_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_0_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_0_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_0_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_0_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_0_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_0_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_0_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_0_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_0_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_0_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_0_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_0_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_0_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_0_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ op_e8c0_0_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8d0_0_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8e8_0_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f0_0_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e8f8_0_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f9_0_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fa_0_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fb_0_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e9c0_0_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9d0_0_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9e8_0_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f0_0_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_e9f8_0_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f9_0_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fa_0_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fb_0_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_eac0_0_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ead0_0_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eae8_0_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf0_0_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ op_eaf8_0_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf9_0_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ebc0_0_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebd0_0_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebe8_0_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf0_0_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ebf8_0_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf9_0_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfa_0_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfb_0_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ecc0_0_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecd0_0_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ece8_0_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf0_0_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ op_ecf8_0_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf9_0_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ op_edc0_0_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edd0_0_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_ede8_0_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf0_0_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_edf8_0_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf9_0_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfa_0_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfb_0_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_eec0_0_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eed0_0_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eee8_0_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef0_0_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ op_eef8_0_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef9_0_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ op_efc0_0_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efd0_0_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efe8_0_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff0_0_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ op_eff8_0_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff9_0_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ op_f000_0_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f008_0_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f010_0_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f018_0_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f020_0_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f028_0_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f030_0_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +{ op_f038_0_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f039_0_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f200_0_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f208_0_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f210_0_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f218_0_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f220_0_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f228_0_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f230_0_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f238_0_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f239_0_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23a_0_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23b_0_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23c_0_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f240_0_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f248_0_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ op_f250_0_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f258_0_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f260_0_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f268_0_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f270_0_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f278_0_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f279_0_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f27a_0_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27b_0_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27c_0_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f280_0_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f2c0_0_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f310_0_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f320_0_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f328_0_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f330_0_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f338_0_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f339_0_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f350_0_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f358_0_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f368_0_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f370_0_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f378_0_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f379_0_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37a_0_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37b_0_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f408_0_ff, NULL, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +{ op_f410_0_ff, NULL, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +{ op_f418_0_ff, NULL, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f419_0_ff, NULL, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41a_0_ff, NULL, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41b_0_ff, NULL, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41c_0_ff, NULL, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41d_0_ff, NULL, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41e_0_ff, NULL, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41f_0_ff, NULL, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f428_0_ff, NULL, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +{ op_f430_0_ff, NULL, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +{ op_f438_0_ff, NULL, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f439_0_ff, NULL, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43a_0_ff, NULL, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43b_0_ff, NULL, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43c_0_ff, NULL, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43d_0_ff, NULL, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43e_0_ff, NULL, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43f_0_ff, NULL, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#ifndef CPUEMU_68000_ONLY +{ op_f500_1_ff, NULL, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f508_1_ff, NULL, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f510_1_ff, NULL, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f518_1_ff, NULL, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f548_1_ff, NULL, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f568_1_ff, NULL, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +{ op_f600_0_ff, NULL, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f608_0_ff, NULL, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f610_0_ff, NULL, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f618_0_ff, NULL, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f620_0_ff, NULL, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_2[] = { +{ op_0000_0_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_0_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_0_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_0_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_0_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_0_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_0_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_0_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_2_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_0_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_0_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_0_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_0_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_0_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_0_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_0_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_0_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_2_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_0_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_0_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_0_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_0_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_0_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_0_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_0_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_0_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_00d0_0_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00e8_0_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f0_0_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_00f8_0_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f9_0_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fa_0_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fb_0_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0100_0_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_0_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_0_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_0_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_0_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_0_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_0_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_0_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_0_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_0_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_0_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_0_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_0_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_0_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_0_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_0_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_0_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_0_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_0_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_0_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_0_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_0_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_0_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_0_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_0_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_0_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_0_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_0_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_0_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_0_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_0_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_0_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_0_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_0_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_0_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_0_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_0_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_0_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_0_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_0_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_0_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_0_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_0_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_0_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_0_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_0_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_0_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_2_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_0_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_0_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_0_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_0_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_0_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_0_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_0_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_0_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_2_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_0_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_0_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_0_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_0_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_0_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_0_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_0_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_0_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_02d0_0_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02e8_0_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f0_0_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_02f8_0_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f9_0_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fa_0_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fb_0_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0400_0_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_0_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_0_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_0_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_0_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_0_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_0_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_0_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_0_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_0_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_0_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_0_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_0_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_0_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_0_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_0_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_0_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_0_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_0_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_0_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_0_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_0_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_0_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_0_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_04d0_0_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04e8_0_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f0_0_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_04f8_0_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f9_0_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fa_0_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fb_0_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0600_0_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_0_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_0_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_0_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_0_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_0_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_0_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_0_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_0_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_0_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_0_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_0_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_0_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_0_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_0_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_0_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_0_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_0_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_0_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_0_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_0_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_0_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_0_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_0_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_06c0_0_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06c8_0_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06d0_0_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06e8_0_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f0_0_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f8_0_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f9_0_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fa_0_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fb_0_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_0800_0_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_0_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_0_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_0_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_0_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_0_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_0_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_0_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_0_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_0_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_0_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_0_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_0_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_0_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_0_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_0_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_0_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_0_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_0_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_0_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_0_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_0_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_0_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_0_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_0_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_0_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_0_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_0_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_0_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_0_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_0_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_0_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_0_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_0_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_0_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_0_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_0_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_0_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_0_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_0_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_0_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_0_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_2_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_0_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_0_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_0_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_0_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_0_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_0_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_0_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_0_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_2_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_0_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_0_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_0_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_0_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_0_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_0_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_0_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_0_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_2_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_2_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_2_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_2_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_2_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_2_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_2_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_0_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_0_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_0_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_0_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_0_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_0_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_0_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_0_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3a_0_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3b_0_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c40_0_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_0_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_0_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_0_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_0_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_0_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_0_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_0_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7a_0_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7b_0_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c80_0_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_0_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_0_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_0_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_0_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_0_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_0_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_0_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0cba_0_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cbb_0_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_2_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_2_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_2_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_2_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_2_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_2_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_2_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_2_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_2_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_2_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_2_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_2_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_2_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_2_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_2_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_2_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_2_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_2_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_2_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_2_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_2_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_2_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_2_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_2_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_2_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_2_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_2_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_2_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_2_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_2_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_2_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_2_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_2_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_2_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_2_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_2_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_2_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_0_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_0_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_0_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_0_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_0_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_0_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_0_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_0_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_0_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_0_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_0_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_0_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_0_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_0_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_0_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_0_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_0_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_0_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_0_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_0_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_0_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_0_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_0_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_0_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_0_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_0_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_0_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_0_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_0_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_0_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_0_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_0_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_0_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_0_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_0_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_0_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_0_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_0_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_0_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_0_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_0_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_0_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_0_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_0_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_0_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_0_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_0_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_0_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_0_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_0_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_0_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_0_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_0_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_0_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_0_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_0_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_0_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_0_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_0_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_0_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_0_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_0_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_0_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_0_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_0_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_0_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_0_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_0_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_0_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_0_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_0_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_0_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_0_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_0_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_0_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_0_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_0_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_0_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_0_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_0_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_0_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_0_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_0_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_0_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_0_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_0_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_0_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_0_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_0_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_0_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_0_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_0_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_0_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_0_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_0_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_0_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_0_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_0_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_0_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_0_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_0_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_0_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_0_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_0_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_0_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_0_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_0_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_0_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_0_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_0_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_0_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_0_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_0_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_0_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_0_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_0_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_0_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_0_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_0_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_0_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_0_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_0_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_0_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_0_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_0_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_0_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_0_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_0_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_0_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_0_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_0_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_0_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_0_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_0_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_0_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_0_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_0_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_0_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_0_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_0_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_0_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_0_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_0_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_0_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_0_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_0_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_0_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_0_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_0_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_0_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_0_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_0_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_0_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_0_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_0_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_0_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_0_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_0_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_0_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_0_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_0_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_0_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_0_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_0_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_0_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_0_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_0_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_0_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_0_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_0_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_0_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_0_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_0_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_0_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_0_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_0_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_0_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_0_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_0_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_0_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_0_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_0_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_0_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_0_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_0_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_0_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_0_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_0_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_0_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_0_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_0_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_0_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_0_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_0_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_0_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_0_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_0_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_0_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_0_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_0_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_0_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_0_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_0_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_0_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_0_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_0_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_0_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_0_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_0_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_0_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_0_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_0_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_0_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_0_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_0_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_0_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_0_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_0_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_0_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_0_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_0_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_0_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_0_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_0_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_0_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_0_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_0_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_0_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_0_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_0_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_0_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_0_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_0_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_0_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_0_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_0_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_0_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_0_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_0_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_0_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_0_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_0_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_0_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_0_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_0_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_0_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_0_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_0_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_0_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_0_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_0_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_0_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_0_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_0_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_0_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_0_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_0_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_0_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_0_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_0_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_0_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_0_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_0_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_0_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_0_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_0_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_0_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_0_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_0_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_0_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_0_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_0_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_0_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_0_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_0_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_0_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_0_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_0_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_0_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_0_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_0_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_0_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_0_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_0_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_0_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_0_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_0_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_0_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_0_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_0_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_0_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_0_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_0_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_0_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_0_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_0_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_0_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_0_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_0_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_0_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_0_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_0_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_0_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_0_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_0_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_0_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_0_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_0_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_0_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_0_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_0_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_0_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_0_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_0_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_0_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_0_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_0_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_0_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_0_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_0_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_0_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_0_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_0_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_0_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_0_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_0_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_0_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_0_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_0_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_0_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_0_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_0_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_0_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_0_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_0_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_0_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4100_0_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4110_0_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4118_0_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4120_0_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4128_0_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4130_0_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_4138_0_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4139_0_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_413a_0_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_413b_0_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_413c_0_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_4180_0_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_0_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_0_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_0_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_0_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_0_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_0_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_0_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_0_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_0_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_0_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_0_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_0_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_0_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_0_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_0_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_0_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_0_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_0_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_0_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_0_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_0_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_0_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_0_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_0_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_0_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_0_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_0_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_0_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_0_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_0_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_0_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_0_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_0_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_0_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_0_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_0_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_0_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_0_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_0_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_0_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_0_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_0_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_0_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_0_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_0_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_0_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f0_0_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_42f8_0_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_0_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_0_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_0_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_0_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_0_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_0_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_0_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_0_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_0_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_0_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_0_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_0_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_0_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_0_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_0_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_0_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_0_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_0_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_0_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_0_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_0_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_0_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_0_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_0_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_0_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_0_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_0_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_0_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_0_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_0_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_0_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_0_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_0_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_0_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_0_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_0_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_0_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_0_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_0_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_0_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_0_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_0_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_0_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_0_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_0_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_0_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_0_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_0_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_0_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_0_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_0_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_0_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_0_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_0_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_0_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_0_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_0_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_0_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_0_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_0_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_0_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_0_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_0_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_0_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_0_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_0_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_0_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_0_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_0_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_0_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_0_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_2_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4808_1_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +{ op_4810_2_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_2_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_2_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_2_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_2_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_2_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_2_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_0_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_0_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_0_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_0_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_0_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_0_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_0_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_0_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_0_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_0_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_2_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_2_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_2_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_2_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_2_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_2_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_0_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_2_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_2_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_2_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_2_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_2_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_2_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_49c0_0_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4a00_0_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_0_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_0_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_0_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_0_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_0_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_0_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_0_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a3a_0_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a3b_0_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a3c_0_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_0_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a48_0_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_0_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_0_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_0_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_0_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_0_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_0_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_0_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a7a_0_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a7b_0_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a7c_0_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_0_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a88_0_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_0_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_0_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_0_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_0_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_0_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_0_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_0_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4aba_0_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4abb_0_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4abc_0_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_0_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_0_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_0_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_0_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_0_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_0_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_0_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_0_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c00_0_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c10_0_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c18_0_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c20_0_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c28_0_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c30_0_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c38_0_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c39_0_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3a_0_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3b_0_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c3c_0_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c40_0_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c50_0_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c58_0_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c60_0_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c68_0_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c70_0_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c78_0_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c79_0_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7a_0_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7b_0_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c7c_0_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c90_2_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_2_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_2_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_2_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_2_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_2_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_2_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_2_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_2_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_2_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_2_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_2_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_2_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_2_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_2_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_2_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_0_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_1_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_0_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_2_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_0_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_0_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_2_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_2_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_2_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_2_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_2_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_0_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_2_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_0_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_2_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_2_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_2_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_2_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_2_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_2_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_2_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_2_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_0_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_0_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_0_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_0_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_0_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_0_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_0_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_0_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_0_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_0_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_0_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_0_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_0_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_0_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_0_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_0_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_0_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_0_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_0_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_0_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_0_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_0_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_0_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_0_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_0_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_0_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_0_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_0_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_0_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_0_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_0_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_0_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_0_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_0_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_2_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_0_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_0_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_0_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_0_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_0_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_0_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_0_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_50fa_0_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fb_0_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fc_0_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5100_0_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_0_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_0_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_0_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_0_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_0_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_0_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_0_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_0_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_0_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_0_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_0_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_0_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_0_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_0_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_0_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_0_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_0_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_0_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_0_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_0_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_0_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_0_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_0_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_0_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_0_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_0_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_2_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_0_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_0_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_0_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_0_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_0_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_0_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_0_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_51fa_0_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fb_0_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fc_0_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52c0_0_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_2_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_0_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_0_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_0_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_0_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_0_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_0_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_0_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52fa_0_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fb_0_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fc_0_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53c0_0_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_2_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_0_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_0_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_0_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_0_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_0_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_0_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_0_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53fa_0_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fb_0_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fc_0_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54c0_0_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_2_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_0_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_0_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_0_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_0_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_0_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_0_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_0_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54fa_0_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fb_0_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fc_0_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55c0_0_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_2_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_0_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_0_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_0_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_0_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_0_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_0_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_0_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55fa_0_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fb_0_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fc_0_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56c0_0_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_2_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_0_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_0_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_0_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_0_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_0_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_0_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_0_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56fa_0_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fb_0_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fc_0_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57c0_0_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_2_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_0_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_0_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_0_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_0_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_0_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_0_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_0_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57fa_0_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fb_0_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fc_0_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58c0_0_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_2_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_0_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_0_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_0_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_0_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_0_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_0_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_0_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58fa_0_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fb_0_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fc_0_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59c0_0_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_2_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_0_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_0_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_0_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_0_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_0_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_0_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_0_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59fa_0_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fb_0_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fc_0_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ac0_0_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_2_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_0_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_0_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_0_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_0_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_0_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_0_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_0_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5afa_0_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afb_0_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afc_0_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bc0_0_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_2_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_0_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_0_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_0_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_0_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_0_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_0_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_0_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bfa_0_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfb_0_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfc_0_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cc0_0_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_2_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_0_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_0_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_0_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_0_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_0_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_0_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_0_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cfa_0_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfb_0_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfc_0_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dc0_0_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_2_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_0_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_0_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_0_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_0_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_0_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_0_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_0_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dfa_0_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfb_0_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfc_0_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ec0_0_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_2_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_0_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_0_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_0_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_0_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_0_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_0_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_0_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5efa_0_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efb_0_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efc_0_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5fc0_0_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_2_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_0_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_0_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_0_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_0_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_0_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_0_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_0_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ffa_0_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffb_0_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffc_0_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_6000_2_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_2_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_2_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_2_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_2_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_2_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_2_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_2_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_2_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_2_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_2_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_2_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_2_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_2_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_2_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_2_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_2_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_2_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_2_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_2_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_2_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_2_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_2_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_2_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_2_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_2_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_2_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_2_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_2_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_2_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_2_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_2_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_2_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_2_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_2_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_2_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_2_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_2_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_2_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_2_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_2_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_2_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_2_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_2_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_2_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_2_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_2_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_2_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_0_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_0_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_0_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_0_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_0_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_0_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_0_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_0_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_0_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_0_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_0_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_0_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_0_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_0_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_0_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_0_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_0_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_0_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_0_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_0_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_0_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_0_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_0_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_0_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_0_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_0_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_0_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_0_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_0_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_0_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_0_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_0_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_0_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_0_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_0_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_0_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_0_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_0_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_0_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_0_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_0_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_0_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_0_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_0_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_0_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_2_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_2_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_0_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_0_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_0_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_0_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_0_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_0_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_0_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8140_0_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8148_0_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8150_0_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_0_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_0_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_0_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_0_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_0_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_0_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8180_0_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8188_0_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8190_0_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_0_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_0_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_0_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_0_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_0_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_0_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_0_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_0_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_0_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_0_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_0_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_0_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_0_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_0_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_0_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_0_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_0_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_0_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_0_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_0_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_0_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_0_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_0_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_0_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_0_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_0_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_0_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_0_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_0_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_0_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_0_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_0_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_0_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_0_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_0_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_0_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_0_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_0_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_0_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_0_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_0_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_0_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_0_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_0_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_0_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_0_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_0_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_0_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_0_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_0_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_0_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_0_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_0_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_0_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_0_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_0_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_0_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_0_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_0_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_0_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_0_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_0_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_0_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_0_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_0_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_0_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_0_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_0_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_0_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_0_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_0_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_0_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_0_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_0_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_0_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_0_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_0_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_0_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_0_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_0_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_0_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_0_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_0_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_0_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_0_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_0_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_0_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_0_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_0_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_0_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_0_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_0_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_0_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_0_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_0_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_0_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_0_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_0_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_0_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_0_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_0_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_0_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_0_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_0_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_0_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_0_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_0_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_0_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_0_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_0_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_0_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_0_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_0_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_0_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_0_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_0_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_0_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_0_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_0_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_0_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_0_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_0_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_0_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_0_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_0_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_0_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_0_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_0_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_0_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_0_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_0_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_0_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_0_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_0_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_0_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_0_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_0_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_0_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_0_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_0_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_0_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_0_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_0_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_0_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_0_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_0_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_0_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_0_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_0_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_0_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_0_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_0_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_0_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_0_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_0_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_0_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_0_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_0_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_0_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_0_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_0_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_0_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_0_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_0_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_0_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_0_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_0_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_0_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_0_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_0_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_0_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_0_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_0_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_0_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_0_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_0_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_0_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_0_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_0_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_0_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_0_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_0_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_0_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_0_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_0_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_0_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_0_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_0_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_0_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_0_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_0_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_0_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_0_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_0_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_0_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_0_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_0_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_0_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_0_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_0_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_0_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_0_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_0_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_0_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_0_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_0_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_0_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_0_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_0_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_0_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_0_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_0_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_0_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_0_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_0_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_0_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_0_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_0_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_0_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_0_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_0_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_0_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_0_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_0_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_0_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_0_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_0_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_0_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_0_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_0_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_0_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_0_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_0_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_2_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_2_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_0_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_0_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_0_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_0_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_0_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_0_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_0_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_0_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_0_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_0_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_0_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_0_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_0_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_0_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_0_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_0_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_0_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_0_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_0_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_0_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_0_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_0_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_0_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_0_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_0_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_0_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_0_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_0_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_0_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_0_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_0_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_0_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_0_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_0_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_0_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_0_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_0_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_0_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_0_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_0_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_0_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_0_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_0_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_0_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_0_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_0_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_0_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_0_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_0_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_0_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_0_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_0_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_0_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_0_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_0_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_0_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_0_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_0_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_0_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_0_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_0_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_0_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_0_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_0_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_0_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_0_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_0_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_0_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_0_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_0_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_0_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_0_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_0_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_0_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_0_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_0_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_0_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_0_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_0_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_0_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_0_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_0_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_0_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_0_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_0_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_0_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_0_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_0_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_0_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_0_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_0_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_0_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_0_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_0_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_0_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_0_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_0_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_0_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_0_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_0_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_0_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_0_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_0_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_0_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_0_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_0_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_0_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_0_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_0_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_0_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_0_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_0_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_0_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_0_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_0_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_0_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_0_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_0_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_0_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_0_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_0_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_0_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_0_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_0_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_0_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_0_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_0_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_0_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_0_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_0_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_0_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_0_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_0_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_0_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_0_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_0_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_0_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_0_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_0_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_0_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_0_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_0_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_0_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_0_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_0_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_0_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_0_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_0_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_0_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_0_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_0_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_0_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_0_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_0_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_0_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_0_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_0_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_0_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_0_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_0_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_0_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_0_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_0_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_0_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_0_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_0_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_0_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_0_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_0_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_0_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_0_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_0_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_0_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_0_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_0_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_0_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_0_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_0_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_0_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_0_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_0_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_0_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_0_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_0_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_0_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_0_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_0_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_0_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_0_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_0_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_0_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_0_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_0_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_0_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_0_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_0_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_0_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_0_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_0_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_0_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_0_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_0_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_0_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_0_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_0_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_0_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_0_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_0_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_0_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_0_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_0_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_0_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_0_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_0_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_0_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_0_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_0_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_0_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_0_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_0_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_0_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_0_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_0_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_0_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_0_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ op_e8c0_0_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8d0_0_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8e8_0_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f0_0_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e8f8_0_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f9_0_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fa_0_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fb_0_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e9c0_0_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9d0_0_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9e8_0_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f0_0_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_e9f8_0_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f9_0_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fa_0_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fb_0_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_eac0_0_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ead0_0_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eae8_0_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf0_0_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ op_eaf8_0_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf9_0_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ebc0_0_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebd0_0_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebe8_0_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf0_0_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ebf8_0_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf9_0_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfa_0_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfb_0_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ecc0_0_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecd0_0_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ece8_0_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf0_0_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ op_ecf8_0_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf9_0_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ op_edc0_0_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edd0_0_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_ede8_0_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf0_0_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_edf8_0_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf9_0_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfa_0_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfb_0_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_eec0_0_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eed0_0_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eee8_0_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef0_0_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ op_eef8_0_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef9_0_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ op_efc0_0_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efd0_0_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efe8_0_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff0_0_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ op_eff8_0_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff9_0_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ op_f000_0_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f008_0_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f010_0_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f018_0_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f020_0_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f028_0_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f030_0_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +{ op_f038_0_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f039_0_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f200_0_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f208_0_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f210_0_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f218_0_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f220_0_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f228_0_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f230_0_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f238_0_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f239_0_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23a_0_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23b_0_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23c_0_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f240_0_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f248_0_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ op_f250_0_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f258_0_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f260_0_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f268_0_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f270_0_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f278_0_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f279_0_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f27a_0_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27b_0_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27c_0_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f280_0_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f2c0_0_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f310_0_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f320_0_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f328_0_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f330_0_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f338_0_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f339_0_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f350_0_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f358_0_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f368_0_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f370_0_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f378_0_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f379_0_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37a_0_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37b_0_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_3[] = { +{ op_0000_0_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_0_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_0_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_0_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_0_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_0_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_0_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_0_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_3_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_0_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_0_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_0_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_0_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_0_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_0_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_0_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_0_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_3_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_0_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_0_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_0_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_0_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_0_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_0_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_0_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_0_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_00d0_0_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00e8_0_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f0_0_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_00f8_0_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f9_0_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fa_0_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fb_0_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0100_0_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_0_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_0_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_0_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_0_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_0_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_0_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_0_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_0_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_0_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_0_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_0_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_0_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_0_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_0_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_0_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_0_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_0_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_0_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_0_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_0_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_0_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_0_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_0_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_0_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_0_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_0_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_0_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_0_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_0_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_0_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_0_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_0_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_0_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_0_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_0_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_0_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_0_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_0_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_0_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_0_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_0_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_0_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_0_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_0_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_0_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_0_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_3_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_0_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_0_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_0_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_0_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_0_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_0_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_0_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_0_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_3_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_0_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_0_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_0_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_0_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_0_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_0_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_0_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_0_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_02d0_0_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02e8_0_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f0_0_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_02f8_0_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f9_0_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fa_0_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fb_0_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0400_0_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_0_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_0_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_0_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_0_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_0_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_0_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_0_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_0_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_0_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_0_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_0_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_0_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_0_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_0_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_0_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_0_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_0_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_0_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_0_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_0_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_0_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_0_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_0_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_04d0_0_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04e8_0_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f0_0_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_04f8_0_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f9_0_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fa_0_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fb_0_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0600_0_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_0_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_0_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_0_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_0_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_0_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_0_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_0_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_0_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_0_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_0_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_0_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_0_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_0_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_0_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_0_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_0_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_0_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_0_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_0_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_0_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_0_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_0_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_0_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_06c0_0_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06c8_0_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06d0_0_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06e8_0_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f0_0_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f8_0_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f9_0_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fa_0_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fb_0_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_0800_0_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_0_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_0_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_0_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_0_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_0_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_0_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_0_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_0_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_0_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_0_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_0_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_0_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_0_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_0_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_0_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_0_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_0_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_0_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_0_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_0_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_0_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_0_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_0_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_0_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_0_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_0_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_0_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_0_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_0_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_0_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_0_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_0_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_0_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_0_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_0_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_0_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_0_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_0_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_0_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_0_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_0_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_3_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_0_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_0_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_0_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_0_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_0_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_0_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_0_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_0_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_3_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_0_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_0_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_0_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_0_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_0_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_0_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_0_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_0_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0ad0_2_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ad8_2_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ae0_2_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ae8_2_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0af0_2_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +{ op_0af8_2_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0af9_2_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +{ op_0c00_0_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_0_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_0_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_0_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_0_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_0_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_0_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_0_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3a_0_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3b_0_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c40_0_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_0_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_0_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_0_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_0_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_0_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_0_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_0_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7a_0_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7b_0_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c80_0_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_0_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_0_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_0_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_0_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_0_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_0_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_0_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0cba_0_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cbb_0_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cd0_2_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0cd8_2_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ce0_2_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ce8_2_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0cf0_2_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +{ op_0cf8_2_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0cf9_2_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +{ op_0cfc_2_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +{ op_0e10_2_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e18_2_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e20_2_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e28_2_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e30_2_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +{ op_0e38_2_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e39_2_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e50_2_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e58_2_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e60_2_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e68_2_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e70_2_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +{ op_0e78_2_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e79_2_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e90_2_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e98_2_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea0_2_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea8_2_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0eb0_2_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +{ op_0eb8_2_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0eb9_2_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ed0_2_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ed8_2_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ee0_2_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ee8_2_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0ef0_2_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +{ op_0ef8_2_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0ef9_2_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +{ op_0efc_2_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +{ op_1000_0_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_0_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_0_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_0_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_0_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_0_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_0_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_0_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_0_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_0_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_0_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_0_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_0_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_0_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_0_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_0_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_0_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_0_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_0_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_0_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_0_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_0_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_0_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_0_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_0_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_0_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_0_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_0_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_0_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_0_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_0_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_0_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_0_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_0_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_0_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_0_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_0_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_0_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_0_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_0_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_0_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_0_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_0_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_0_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_0_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_0_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_0_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_0_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_0_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_0_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_0_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_0_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_0_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_0_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_0_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_0_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_0_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_0_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_0_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_0_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_0_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_0_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_0_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_0_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_0_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_0_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_0_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_0_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_0_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_0_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_0_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_0_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_0_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_0_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_0_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_0_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_0_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_0_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_0_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_0_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_0_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_0_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_0_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_0_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_0_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_0_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_0_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_0_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_0_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_0_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_0_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_0_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_0_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_0_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_0_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_0_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_0_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_0_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_0_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_0_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_0_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_0_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_0_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_0_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_0_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_0_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_0_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_0_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_0_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_0_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_0_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_0_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_0_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_0_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_0_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_0_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_0_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_0_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_0_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_0_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_0_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_0_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_0_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_0_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_0_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_0_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_0_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_0_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_0_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_0_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_0_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_0_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_0_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_0_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_0_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_0_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_0_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_0_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_0_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_0_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_0_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_0_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_0_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_0_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_0_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_0_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_0_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_0_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_0_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_0_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_0_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_0_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_0_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_0_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_0_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_0_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_0_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_0_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_0_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_0_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_0_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_0_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_0_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_0_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_0_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_0_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_0_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_0_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_0_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_0_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_0_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_0_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_0_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_0_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_0_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_0_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_0_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_0_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_0_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_0_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_0_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_0_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_0_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_0_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_0_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_0_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_0_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_0_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_0_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_0_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_0_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_0_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_0_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_0_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_0_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_0_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_0_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_0_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_0_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_0_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_0_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_0_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_0_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_0_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_0_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_0_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_0_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_0_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_0_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_0_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_0_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_0_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_0_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_0_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_0_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_0_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_0_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_0_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_0_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_0_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_0_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_0_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_0_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_0_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_0_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_0_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_0_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_0_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_0_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_0_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_0_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_0_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_0_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_0_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_0_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_0_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_0_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_0_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_0_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_0_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_0_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_0_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_0_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_0_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_0_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_0_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_0_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_0_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_0_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_0_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_0_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_0_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_0_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_0_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_0_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_0_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_0_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_0_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_0_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_0_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_0_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_0_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_0_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_0_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_0_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_0_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_0_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_0_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_0_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_0_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_0_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_0_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_0_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_0_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_0_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_0_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_0_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_0_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_0_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_0_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_0_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_0_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_0_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_0_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_0_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_0_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_0_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_0_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_0_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_0_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_0_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_0_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_0_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_0_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_0_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_0_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_0_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_0_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_0_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_0_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_0_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_0_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_0_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_0_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_0_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_0_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_0_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_0_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_0_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_0_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_0_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_0_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_0_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_0_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_0_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_0_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_0_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_0_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_0_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_0_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_0_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_0_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_0_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_0_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_0_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_0_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_0_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_0_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_0_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_0_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_0_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_0_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_0_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_0_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_0_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_0_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4100_0_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4110_0_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4118_0_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4120_0_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4128_0_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4130_0_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_4138_0_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4139_0_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_413a_0_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_413b_0_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_413c_0_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_4180_0_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_0_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_0_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_0_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_0_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_0_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_0_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_0_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_0_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_0_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_0_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_0_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_0_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_0_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_0_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_0_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_0_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_0_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_0_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_0_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_0_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_0_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_0_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_0_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_0_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_0_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_0_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_0_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_0_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_0_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_0_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_0_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_0_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_0_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_0_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_0_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_0_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_0_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_0_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_0_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_0_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_0_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_0_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_0_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_0_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_0_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_0_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f0_0_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_42f8_0_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_0_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_0_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_0_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_0_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_0_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_0_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_0_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_0_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_0_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_0_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_0_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_0_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_0_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_0_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_0_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_0_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_0_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_0_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_0_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_0_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_0_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_0_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_0_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_0_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_0_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_0_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_0_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_0_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_0_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_0_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_0_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_0_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_0_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_0_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_0_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_0_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_0_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_0_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_0_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_0_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_0_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_0_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_0_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_0_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_0_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_0_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_0_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_0_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_0_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_0_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_0_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_0_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_0_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_0_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_0_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_0_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_0_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_0_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_0_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_0_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_0_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_0_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_0_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_0_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_0_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_0_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_0_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_0_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_0_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_0_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_0_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_2_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4808_1_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +{ op_4810_2_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_2_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_2_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_2_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_2_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_2_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_2_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_0_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_0_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_0_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_0_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_0_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_0_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_0_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_0_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_0_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_0_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_2_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_2_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_2_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_2_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_2_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_2_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_0_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_2_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_2_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_2_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_2_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_2_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_2_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_49c0_0_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4a00_0_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_0_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_0_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_0_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_0_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_0_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_0_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_0_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a3a_0_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a3b_0_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a3c_0_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_0_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a48_0_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_0_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_0_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_0_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_0_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_0_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_0_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_0_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a7a_0_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a7b_0_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a7c_0_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_0_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a88_0_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_0_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_0_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_0_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_0_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_0_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_0_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_0_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4aba_0_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4abb_0_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4abc_0_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_0_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_0_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_0_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_0_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_0_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_0_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_0_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_0_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c00_0_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c10_0_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c18_0_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c20_0_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c28_0_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c30_0_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c38_0_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c39_0_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3a_0_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3b_0_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c3c_0_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c40_0_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c50_0_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c58_0_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c60_0_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c68_0_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c70_0_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c78_0_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c79_0_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7a_0_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7b_0_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c7c_0_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c90_2_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_2_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_2_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_2_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_2_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_2_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_2_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_2_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_2_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_2_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_2_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_2_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_2_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_2_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_2_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_2_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_0_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_1_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_0_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_2_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_0_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_0_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_2_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_3_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_3_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e74_2_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ op_4e75_2_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_0_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_3_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_0_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +{ op_4e7b_2_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +{ op_4e90_2_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_2_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_2_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_2_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_2_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_2_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_2_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_0_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_0_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_0_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_0_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_0_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_0_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_0_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_0_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_0_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_0_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_0_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_0_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_0_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_0_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_0_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_0_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_0_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_0_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_0_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_0_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_0_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_0_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_0_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_0_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_0_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_0_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_0_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_0_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_0_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_0_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_0_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_0_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_0_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_0_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_2_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_0_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_0_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_0_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_0_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_0_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_0_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_0_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_50fa_0_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fb_0_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fc_0_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5100_0_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_0_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_0_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_0_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_0_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_0_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_0_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_0_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_0_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_0_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_0_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_0_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_0_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_0_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_0_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_0_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_0_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_0_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_0_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_0_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_0_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_0_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_0_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_0_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_0_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_0_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_0_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_2_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_0_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_0_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_0_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_0_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_0_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_0_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_0_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_51fa_0_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fb_0_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fc_0_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52c0_0_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_2_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_0_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_0_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_0_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_0_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_0_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_0_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_0_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52fa_0_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fb_0_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fc_0_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53c0_0_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_2_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_0_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_0_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_0_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_0_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_0_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_0_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_0_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53fa_0_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fb_0_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fc_0_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54c0_0_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_2_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_0_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_0_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_0_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_0_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_0_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_0_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_0_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54fa_0_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fb_0_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fc_0_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55c0_0_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_2_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_0_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_0_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_0_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_0_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_0_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_0_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_0_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55fa_0_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fb_0_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fc_0_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56c0_0_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_2_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_0_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_0_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_0_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_0_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_0_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_0_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_0_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56fa_0_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fb_0_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fc_0_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57c0_0_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_2_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_0_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_0_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_0_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_0_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_0_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_0_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_0_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57fa_0_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fb_0_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fc_0_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58c0_0_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_2_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_0_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_0_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_0_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_0_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_0_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_0_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_0_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58fa_0_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fb_0_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fc_0_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59c0_0_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_2_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_0_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_0_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_0_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_0_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_0_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_0_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_0_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59fa_0_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fb_0_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fc_0_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ac0_0_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_2_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_0_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_0_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_0_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_0_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_0_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_0_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_0_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5afa_0_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afb_0_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afc_0_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bc0_0_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_2_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_0_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_0_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_0_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_0_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_0_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_0_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_0_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bfa_0_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfb_0_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfc_0_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cc0_0_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_2_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_0_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_0_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_0_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_0_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_0_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_0_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_0_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cfa_0_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfb_0_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfc_0_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dc0_0_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_2_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_0_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_0_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_0_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_0_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_0_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_0_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_0_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dfa_0_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfb_0_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfc_0_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ec0_0_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_2_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_0_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_0_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_0_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_0_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_0_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_0_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_0_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5efa_0_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efb_0_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efc_0_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5fc0_0_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_2_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_0_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_0_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_0_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_0_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_0_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_0_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_0_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ffa_0_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffb_0_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffc_0_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_6000_2_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_2_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_2_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_2_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_2_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_2_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_2_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_2_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_2_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_2_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_2_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_2_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_2_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_2_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_2_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_2_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_2_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_2_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_2_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_2_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_2_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_2_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_2_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_2_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_2_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_2_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_2_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_2_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_2_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_2_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_2_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_2_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_2_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_2_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_2_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_2_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_2_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_2_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_2_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_2_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_2_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_2_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_2_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_2_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_2_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_2_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_2_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_2_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_0_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_0_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_0_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_0_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_0_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_0_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_0_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_0_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_0_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_0_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_0_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_0_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_0_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_0_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_0_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_0_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_0_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_0_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_0_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_0_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_0_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_0_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_0_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_0_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_0_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_0_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_0_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_0_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_0_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_0_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_0_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_0_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_0_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_0_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_0_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_0_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_0_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_0_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_0_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_0_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_0_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_0_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_0_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_0_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_0_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_2_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_2_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_0_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_0_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_0_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_0_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_0_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_0_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_0_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8140_0_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8148_0_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8150_0_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_0_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_0_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_0_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_0_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_0_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_0_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8180_0_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8188_0_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8190_0_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_0_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_0_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_0_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_0_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_0_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_0_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_0_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_0_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_0_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_0_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_0_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_0_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_0_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_0_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_0_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_0_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_0_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_0_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_0_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_0_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_0_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_0_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_0_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_0_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_0_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_0_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_0_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_0_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_0_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_0_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_0_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_0_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_0_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_0_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_0_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_0_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_0_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_0_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_0_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_0_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_0_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_0_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_0_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_0_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_0_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_0_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_0_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_0_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_0_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_0_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_0_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_0_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_0_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_0_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_0_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_0_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_0_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_0_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_0_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_0_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_0_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_0_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_0_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_0_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_0_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_0_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_0_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_0_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_0_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_0_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_0_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_0_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_0_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_0_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_0_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_0_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_0_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_0_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_0_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_0_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_0_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_0_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_0_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_0_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_0_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_0_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_0_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_0_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_0_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_0_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_0_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_0_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_0_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_0_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_0_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_0_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_0_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_0_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_0_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_0_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_0_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_0_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_0_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_0_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_0_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_0_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_0_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_0_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_0_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_0_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_0_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_0_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_0_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_0_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_0_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_0_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_0_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_0_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_0_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_0_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_0_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_0_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_0_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_0_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_0_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_0_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_0_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_0_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_0_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_0_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_0_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_0_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_0_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_0_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_0_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_0_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_0_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_0_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_0_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_0_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_0_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_0_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_0_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_0_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_0_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_0_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_0_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_0_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_0_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_0_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_0_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_0_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_0_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_0_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_0_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_0_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_0_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_0_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_0_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_0_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_0_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_0_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_0_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_0_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_0_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_0_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_0_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_0_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_0_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_0_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_0_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_0_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_0_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_0_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_0_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_0_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_0_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_0_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_0_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_0_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_0_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_0_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_0_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_0_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_0_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_0_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_0_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_0_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_0_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_0_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_0_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_0_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_0_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_0_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_0_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_0_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_0_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_0_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_0_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_0_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_0_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_0_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_0_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_0_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_0_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_0_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_0_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_0_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_0_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_0_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_0_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_0_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_0_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_0_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_0_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_0_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_0_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_0_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_0_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_0_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_0_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_0_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_0_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_0_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_0_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_0_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_0_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_0_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_0_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_0_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_0_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_0_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_0_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_2_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_2_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_0_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_0_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_0_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_0_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_0_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_0_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_0_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_0_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_0_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_0_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_0_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_0_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_0_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_0_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_0_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_0_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_0_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_0_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_0_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_0_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_0_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_0_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_0_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_0_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_0_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_0_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_0_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_0_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_0_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_0_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_0_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_0_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_0_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_0_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_0_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_0_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_0_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_0_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_0_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_0_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_0_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_0_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_0_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_0_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_0_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_0_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_0_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_0_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_0_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_0_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_0_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_0_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_0_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_0_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_0_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_0_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_0_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_0_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_0_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_0_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_0_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_0_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_0_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_0_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_0_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_0_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_0_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_0_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_0_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_0_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_0_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_0_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_0_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_0_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_0_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_0_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_0_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_0_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_0_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_0_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_0_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_0_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_0_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_0_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_0_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_0_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_0_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_0_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_0_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_0_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_0_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_0_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_0_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_0_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_0_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_0_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_0_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_0_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_0_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_0_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_0_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_0_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_0_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_0_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_0_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_0_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_0_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_0_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_0_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_0_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_0_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_0_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_0_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_0_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_0_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_0_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_0_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_0_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_0_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_0_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_0_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_0_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_0_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_0_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_0_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_0_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_0_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_0_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_0_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_0_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_0_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_0_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_0_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_0_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_0_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_0_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_0_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_0_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_0_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_0_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_0_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_0_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_0_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_0_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_0_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_0_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_0_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_0_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_0_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_0_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_0_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_0_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_0_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_0_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_0_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_0_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_0_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_0_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_0_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_0_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_0_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_0_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_0_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_0_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_0_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_0_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_0_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_0_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_0_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_0_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_0_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_0_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_0_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_0_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_0_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_0_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_0_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_0_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_0_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_0_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_0_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_0_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_0_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_0_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_0_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_0_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_0_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_0_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_0_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_0_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_0_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_0_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_0_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_0_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_0_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_0_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_0_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_0_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_0_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_0_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_0_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_0_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_0_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_0_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_0_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_0_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_0_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_0_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_0_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_0_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_0_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_0_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_0_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_0_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_0_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_0_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_0_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_0_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_0_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_0_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_0_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_0_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_0_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_0_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_0_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ op_e8c0_0_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8d0_0_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8e8_0_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f0_0_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e8f8_0_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f9_0_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fa_0_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fb_0_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e9c0_0_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9d0_0_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9e8_0_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f0_0_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_e9f8_0_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f9_0_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fa_0_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fb_0_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_eac0_0_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ead0_0_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eae8_0_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf0_0_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ op_eaf8_0_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf9_0_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ebc0_0_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebd0_0_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebe8_0_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf0_0_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ebf8_0_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf9_0_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfa_0_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfb_0_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ecc0_0_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecd0_0_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ece8_0_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf0_0_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ op_ecf8_0_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf9_0_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ op_edc0_0_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edd0_0_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_ede8_0_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf0_0_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_edf8_0_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf9_0_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfa_0_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfb_0_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_eec0_0_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eed0_0_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eee8_0_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef0_0_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ op_eef8_0_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef9_0_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ op_efc0_0_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efd0_0_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efe8_0_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff0_0_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ op_eff8_0_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff9_0_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ op_f200_0_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f208_0_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f210_0_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f218_0_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f220_0_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f228_0_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f230_0_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f238_0_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f239_0_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23a_0_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23b_0_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23c_0_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f240_0_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f248_0_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ op_f250_0_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f258_0_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f260_0_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f268_0_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f270_0_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f278_0_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f279_0_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f27a_0_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27b_0_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27c_0_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f280_0_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f2c0_0_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f310_0_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f320_0_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f328_0_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f330_0_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f338_0_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f339_0_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f350_0_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f358_0_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f368_0_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f370_0_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f378_0_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f379_0_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37a_0_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37b_0_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_4[] = { +{ op_0000_0_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_0_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_0_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_0_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_0_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_4_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_0_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_0_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_4_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_0_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_0_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_0_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_0_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_0_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_4_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_0_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_0_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_4_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_0_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_0_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_0_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_0_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_0_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_4_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_0_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_0_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_0_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_0_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_0_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_0_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_0_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_0_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_4_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_0_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_0_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_0_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_4_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_0_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_4_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_0_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_0_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_0_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_0_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_0_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_4_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_0_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_0_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_4_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_0_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_0_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_0_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_0_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_0_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_4_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_0_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_0_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_4_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_0_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_0_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_0_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_0_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_0_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_4_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_0_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_0_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_0_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_0_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_0_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_0_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_0_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_4_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_0_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_0_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_4_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_0_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_0_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_0_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_0_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_0_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_4_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_0_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_0_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_4_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_0_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_0_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_0_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_0_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_0_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_4_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_0_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_0_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_0_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_0_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_0_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_0_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_0_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_4_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_0_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_0_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_0_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_0_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_0_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_0_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_0_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_4_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_0_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_0_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_0_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_0_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_0_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_0_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_0_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_4_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_0_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_0_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_0_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_0_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_0_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_0_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_0_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_4_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_0_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_0_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_0_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_0_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_0_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_0_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_0_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_4_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_0_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_0_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_0_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_0_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_0_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_0_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_0_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_4_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_0_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_0_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_0_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_0_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_0_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_0_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_0_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_4_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_0_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_0_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_0_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_4_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_4_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_0_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_0_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_0_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_0_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_4_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_0_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_0_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_4_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_0_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_0_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_0_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_0_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_4_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_0_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_0_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_4_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_0_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_0_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_0_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_0_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_4_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_0_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_0_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_0_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_0_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_0_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_0_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_0_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_4_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_0_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_0_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_4_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_0_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_0_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_0_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_0_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_0_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_4_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_0_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_0_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_4_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_0_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_0_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_0_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_0_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_0_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_4_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_0_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_0_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_0_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_0_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_0_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_0_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_0_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_4_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_0_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_0_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_0_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_0_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_0_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_0_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_0_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_4_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_0_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_0_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_0_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_0_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_0_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_0_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_0_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_4_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_0_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_0_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0e10_2_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e18_2_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e20_2_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e28_2_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#ifndef CPUEMU_68000_ONLY +{ op_0e30_4_ff, NULL, 0x0e30, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +{ op_0e38_2_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e39_2_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e50_2_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e58_2_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e60_2_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e68_2_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#ifndef CPUEMU_68000_ONLY +{ op_0e70_4_ff, NULL, 0x0e70, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +{ op_0e78_2_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e79_2_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e90_2_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e98_2_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea0_2_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea8_2_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_4_ff, NULL, 0x0eb0, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +{ op_0eb8_2_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0eb9_2_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_1000_0_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_0_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_0_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_0_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_0_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_4_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_0_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_0_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_0_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_4_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_0_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_0_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_0_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_0_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_0_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_0_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_4_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_0_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_0_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_0_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_4_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_0_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_0_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_0_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_0_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_0_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_0_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_4_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_0_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_0_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_0_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_4_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_0_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_0_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_0_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_0_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_0_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_0_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_4_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_0_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_0_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_0_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_4_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_0_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_0_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_0_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_0_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_0_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_0_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_4_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_0_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_0_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_0_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_4_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_0_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_4_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_4_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_4_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_4_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_4_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_4_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_4_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_4_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_4_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_4_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_4_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_0_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_0_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_0_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_0_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_0_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_4_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_0_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_0_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_0_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_4_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_0_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_0_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_0_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_0_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_0_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_0_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_4_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_0_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_0_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_0_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_4_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_0_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_0_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_0_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_0_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_0_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_0_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_0_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_4_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_0_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_0_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_0_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_4_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_0_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_0_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_0_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_0_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_0_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_0_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_0_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_4_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_0_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_0_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_0_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_4_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_0_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_0_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_0_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_0_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_0_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_0_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_0_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_4_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_0_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_0_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_0_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_4_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_0_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_0_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_0_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_0_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_0_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_0_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_0_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_4_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_0_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_0_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_0_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_4_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_0_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_0_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_0_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_0_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_0_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_0_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_0_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_4_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_0_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_0_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_0_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_4_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_0_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_0_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_0_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_0_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_0_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_0_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_0_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_4_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_0_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_0_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_0_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_4_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_0_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_4_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_4_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_4_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_4_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_4_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_4_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_4_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_4_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_4_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_4_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_4_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_4_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_0_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_0_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_0_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_0_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_0_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_0_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_4_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_0_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_0_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_0_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_4_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_0_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_0_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_0_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_0_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_0_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_0_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_0_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_4_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_0_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_0_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_0_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_4_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_0_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_0_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_0_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_0_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_0_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_0_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_0_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_4_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_0_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_0_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_0_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_4_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_0_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_0_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_0_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_0_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_0_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_0_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_0_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_4_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_0_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_0_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_0_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_4_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_0_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_0_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_0_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_0_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_0_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_0_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_0_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_4_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_0_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_0_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_0_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_4_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_0_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_0_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_0_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_0_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_0_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_0_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_0_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_4_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_0_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_0_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_0_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_4_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_0_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_0_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_0_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_0_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_0_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_0_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_0_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_4_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_0_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_0_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_0_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_4_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_0_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_0_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_0_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_0_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_0_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_0_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_0_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_4_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_0_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_0_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_0_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_4_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_0_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_4_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_4_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_4_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_4_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_4_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_4_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_4_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_4_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_4_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_4_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_4_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_4_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_0_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_0_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_0_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_0_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_0_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_0_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_4_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_0_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_0_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_0_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_4_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_0_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_0_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_0_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_0_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_0_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_0_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_0_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_4_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_0_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_0_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_0_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_4_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_0_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_0_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_0_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_0_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_0_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_0_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_4_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_0_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_0_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_0_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_0_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_0_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_0_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_0_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_4_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_0_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_0_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_0_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_0_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_0_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_0_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_0_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_4_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_0_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_0_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_0_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_0_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_0_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_0_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_0_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_4_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_0_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_0_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_0_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_0_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_0_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_0_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_0_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_4_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_0_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_0_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_0_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_4_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_0_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_0_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_0_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_4_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_0_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_0_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_0_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_4_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_0_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_0_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_0_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_0_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_0_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_4_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_0_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_0_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_0_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_0_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_0_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_0_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_0_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_4_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_0_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_0_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_0_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_0_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_0_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_0_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_0_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_4_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_0_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_0_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_0_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_0_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_0_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_0_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_0_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_42f0_4_ff, NULL, 0x42f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_42f8_0_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_0_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_0_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_0_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_0_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_0_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_0_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_4_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_0_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_0_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_0_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_0_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_0_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_0_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_0_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_4_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_0_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_0_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_0_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_0_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_0_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_0_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_0_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_4_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_0_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_0_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_0_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_0_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_0_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_0_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_0_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_4_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_0_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_0_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_0_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_4_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_0_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_0_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_0_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_0_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_0_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_0_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_4_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_0_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_0_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_0_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_0_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_0_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_0_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_0_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_4_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_0_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_0_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_0_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_0_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_0_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_0_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_0_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_4_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_0_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_0_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_0_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_0_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_0_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_0_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_0_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_4_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_0_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_0_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_0_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_4_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_0_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_4_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_4_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_4_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_4_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_4_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_4_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_4_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_4_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_0_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_0_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_0_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_0_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_4_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_0_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_0_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_0_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_4_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_0_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_4_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_4_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_4_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_4_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_4_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_4_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_0_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_4_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_4_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_4_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_4_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_4_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_4_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_0_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_0_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_0_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_0_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_0_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_4_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_0_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_0_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_0_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_0_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_0_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_0_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_0_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_4_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_0_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_0_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_0_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_0_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_0_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_0_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_0_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_4_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_0_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_0_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_4_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_4_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_4_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_4_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_4_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_4_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_4_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_4_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_4_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_4_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_4_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_4_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_4_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_4_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_4_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_4_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_4_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_4_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_4_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_4_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_4_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_4_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_4_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_4_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_0_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_4_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_0_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_2_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_0_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_0_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_2_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_4_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_4_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e74_2_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ op_4e75_4_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_0_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_4_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_0_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +{ op_4e7b_2_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +{ op_4e90_2_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_2_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_4_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_2_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_2_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_2_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_4_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_0_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_0_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_4_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_0_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_0_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_0_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_4_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_0_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_0_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_0_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_0_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_0_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_4_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_0_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_0_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_0_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_0_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_0_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_0_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_0_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_0_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_4_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_0_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_0_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_0_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_0_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_0_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_0_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_0_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_0_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_4_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_0_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_0_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_0_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_4_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_0_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_0_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_0_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_0_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_4_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_0_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_0_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_0_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_0_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_0_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_0_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_0_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_4_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_0_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_0_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_0_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_0_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_0_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_0_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_0_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_0_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_4_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_0_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_0_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_0_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_0_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_0_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_0_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_0_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_0_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_4_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_0_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_0_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_0_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_4_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_0_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_0_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_0_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_0_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_4_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_0_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_0_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_0_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_4_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_0_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_0_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_0_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_0_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_4_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_0_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_0_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_0_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_4_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_0_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_0_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_0_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_0_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_4_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_0_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_0_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_0_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_4_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_0_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_0_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_0_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_0_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_4_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_0_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_0_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_0_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_4_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_0_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_0_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_0_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_0_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_4_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_0_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_0_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_0_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_4_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_0_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_0_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_0_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_0_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_4_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_0_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_0_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_0_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_4_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_0_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_0_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_0_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_0_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_4_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_0_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_0_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_0_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_4_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_0_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_0_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_0_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_0_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_4_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_0_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_0_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_0_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_4_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_0_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_0_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_0_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_0_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_4_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_0_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_0_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_0_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_4_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_0_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_0_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_0_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_0_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_4_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_0_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_0_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_0_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_4_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_0_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_0_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_0_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_0_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_4_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_0_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_0_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_0_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_4_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_0_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_0_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_0_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_0_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_4_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_0_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_0_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_0_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_4_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_0_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_0_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_0_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_0_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_4_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_0_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_0_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_0_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_4_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_0_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_0_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_0_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_0_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_4_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_0_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_0_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_0_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_4_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_0_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_0_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_0_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_0_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_4_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_0_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_0_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_4_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_4_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_4_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_4_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_4_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_4_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_4_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_4_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_4_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_4_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_4_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_4_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_4_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_4_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_4_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_4_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_4_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_4_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_4_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_4_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_4_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_4_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_4_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_4_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_4_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_4_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_4_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_4_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_4_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_4_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_4_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_4_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_4_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_4_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_4_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_4_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_4_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_4_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_4_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_4_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_4_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_4_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_4_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_4_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_4_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_4_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_4_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_4_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_0_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_0_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_0_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_0_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_0_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_0_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_4_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_0_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_0_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_0_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_4_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_0_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_0_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_0_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_0_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_0_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_0_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_4_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_0_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_0_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_0_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_4_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_0_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_0_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_0_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_0_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_0_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_0_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_4_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_0_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_0_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_0_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_4_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_0_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_4_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_4_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_4_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_4_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_4_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_4_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_4_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_4_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_4_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_4_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_4_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_4_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_4_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_0_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_0_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_0_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_0_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_4_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_0_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_0_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_0_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_0_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_0_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_0_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_4_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_0_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_0_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_0_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_0_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_0_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_0_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_4_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_0_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_0_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_4_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_4_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_4_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_4_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_4_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_4_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_4_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_4_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_4_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_4_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_4_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_0_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_0_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_0_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_0_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_0_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_4_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_0_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_0_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_0_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_4_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_0_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_0_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_0_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_0_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_0_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_0_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_0_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_4_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_0_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_0_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_0_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_4_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_0_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_0_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_0_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_0_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_0_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_0_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_0_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_4_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_0_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_0_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_0_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_4_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_0_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_0_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_0_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_0_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_0_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_0_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_0_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_4_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_0_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_0_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_0_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_4_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_0_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_0_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_0_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_0_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_0_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_0_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_0_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_4_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_0_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_0_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_0_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_0_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_0_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_0_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_0_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_0_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_4_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_0_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_0_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_0_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_0_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_0_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_0_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_0_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_0_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_4_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_0_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_0_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_0_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_0_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_0_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_0_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_0_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_0_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_4_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_0_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_0_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_0_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_4_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_0_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_0_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_0_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_0_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_0_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_0_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_4_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_0_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_0_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_0_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_4_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_0_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_0_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_0_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_0_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_0_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_0_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_0_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_4_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_0_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_0_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_0_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_4_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_0_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_0_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_0_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_0_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_0_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_0_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_0_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_4_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_0_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_0_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_0_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_4_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_0_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_0_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_0_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_0_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_0_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_0_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_0_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_4_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_0_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_0_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_0_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_4_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_0_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_0_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_0_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_0_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_0_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_0_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_0_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_4_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_0_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_0_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_0_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_0_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_0_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_0_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_0_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_0_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_4_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_0_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_0_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_0_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_0_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_0_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_0_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_0_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_0_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_4_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_0_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_0_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_0_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_0_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_0_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_0_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_0_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_0_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_4_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_0_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_0_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_0_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_4_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_0_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_0_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_0_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_0_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_0_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_0_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_4_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_0_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_0_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_0_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_4_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_0_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_0_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_0_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_0_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_0_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_0_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_4_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_0_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_0_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_0_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_4_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_0_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_0_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_0_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_0_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_0_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_0_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_4_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_0_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_0_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_0_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_4_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_0_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_4_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_4_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_4_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_4_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_4_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_4_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_4_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_4_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_4_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_4_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_4_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_4_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_4_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_0_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_0_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_0_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_0_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_4_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_0_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_0_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_0_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_0_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_0_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_0_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_0_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_0_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_4_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_0_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_0_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_0_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_0_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_0_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_0_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_0_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_4_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_0_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_0_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_4_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_4_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_4_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_4_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_4_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_4_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_4_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_4_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_4_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_4_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_4_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_0_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_0_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_0_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_0_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_0_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_4_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_0_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_0_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_0_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_4_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_0_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_0_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_0_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_0_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_0_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_0_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_0_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_4_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_0_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_0_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_0_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_4_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_0_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_0_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_0_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_0_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_0_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_0_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_0_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_4_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_0_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_0_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_0_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_4_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_0_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_0_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_0_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_0_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_0_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_0_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_0_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_4_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_0_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_0_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_0_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_4_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_0_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_0_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_0_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_0_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_0_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_0_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_0_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_4_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_0_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_0_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_0_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_0_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_0_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_0_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_0_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_0_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_4_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_0_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_0_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_0_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_0_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_0_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_0_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_0_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_0_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_4_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_0_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_0_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_0_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_0_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_0_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_0_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_0_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_0_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_4_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_0_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_0_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_0_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_4_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_0_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_4_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_4_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_4_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_4_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_4_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_4_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_4_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_4_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_4_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_4_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_4_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_4_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_4_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_4_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_4_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_4_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_4_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_4_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_4_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_4_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_4_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_4_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_4_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_4_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_0_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_0_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_0_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_0_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_4_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_0_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_0_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_4_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_4_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_4_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_4_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_4_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_4_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_4_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_4_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_4_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_4_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_4_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_4_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_4_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_4_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_4_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_4_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_4_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_4_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_4_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_4_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_4_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_4_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_4_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_4_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_0_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_0_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_0_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_0_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_4_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_0_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_0_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_0_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_0_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_0_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_0_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_4_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_0_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_0_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_0_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_0_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_0_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_0_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_4_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_0_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_0_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_0_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_0_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_0_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_0_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_4_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_0_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_0_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_0_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_0_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_0_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_0_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_4_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_0_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_0_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_0_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_0_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_0_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_0_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_4_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_0_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_0_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_0_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_0_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_0_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_0_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_4_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_0_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_0_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_5[] = { +{ op_0000_0_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_0_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_0_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_0_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_0_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_4_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_0_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_0_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_5_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_0_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_0_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_0_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_0_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_0_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_4_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_0_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_0_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_5_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_5_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_0_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_0_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_0_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_0_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_4_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_0_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_0_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_0_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_5_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_0_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_0_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_0_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_0_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_4_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_0_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_0_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_0_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_4_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_0_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_4_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_5_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_0_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_0_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_0_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_0_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_4_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_0_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_0_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_4_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_5_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_5_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_5_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_5_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_5_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_5_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_5_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_5_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_4_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_5_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_0_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_0_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_0_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_0_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_4_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_0_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_0_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_0_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_0_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_0_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_0_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_0_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_4_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_0_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_0_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_5_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_0_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_0_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_0_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_0_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_0_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_4_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_0_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_0_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_5_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_5_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_0_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_0_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_0_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_0_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_4_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_0_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_0_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_0_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_0_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_0_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_0_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_0_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_4_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_0_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_0_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_0_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_0_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_0_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_0_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_0_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_4_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_0_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_0_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_5_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_0_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_0_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_0_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_0_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_4_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_0_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_0_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_0_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_0_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_0_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_0_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_0_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_4_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_0_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_0_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_0_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_0_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_0_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_0_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_0_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_4_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_0_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_0_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_5_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_0_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_0_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_0_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_0_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_4_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_0_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_0_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_0_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_0_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_0_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_0_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_0_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_4_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_0_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_0_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_0_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_4_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_4_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_0_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_0_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_0_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_0_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_4_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_0_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_0_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_4_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_5_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_5_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_5_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_5_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_5_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_5_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_5_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_4_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_0_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_0_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_0_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_0_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_4_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_0_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_0_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_0_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_0_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_0_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_0_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_0_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_4_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_0_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_0_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_5_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_0_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_0_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_0_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_0_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_0_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_4_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_0_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_0_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_5_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_5_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_0_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_0_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_0_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_0_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_4_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_0_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_0_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_0_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_0_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_0_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_0_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_0_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_4_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_0_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_0_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_0_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_0_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_0_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_0_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_0_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_4_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_0_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_0_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_0_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_0_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_0_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_0_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_0_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_4_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_0_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_0_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_1000_0_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_0_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_0_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_0_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_0_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_4_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_0_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_0_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_0_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_4_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_0_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_0_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_0_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_0_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_0_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_0_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_4_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_0_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_0_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_0_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_4_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_0_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_0_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_0_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_0_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_0_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_0_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_4_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_0_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_0_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_0_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_4_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_0_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_0_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_0_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_0_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_0_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_0_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_4_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_0_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_0_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_0_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_4_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_0_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_0_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_0_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_0_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_0_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_0_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_4_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_0_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_0_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_0_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_4_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_0_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_4_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_4_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_4_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_4_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_4_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_4_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_4_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_4_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_4_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_4_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_4_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_0_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_0_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_0_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_0_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_0_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_4_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_0_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_0_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_0_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_4_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_0_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_0_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_0_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_0_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_0_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_0_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_4_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_0_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_0_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_0_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_4_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_0_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_0_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_0_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_0_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_0_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_0_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_0_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_4_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_0_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_0_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_0_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_4_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_0_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_0_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_0_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_0_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_0_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_0_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_0_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_4_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_0_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_0_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_0_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_4_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_0_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_0_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_0_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_0_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_0_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_0_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_0_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_4_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_0_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_0_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_0_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_4_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_0_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_0_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_0_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_0_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_0_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_0_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_0_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_4_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_0_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_0_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_0_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_4_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_0_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_0_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_0_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_0_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_0_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_0_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_0_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_4_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_0_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_0_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_0_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_4_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_0_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_0_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_0_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_0_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_0_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_0_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_0_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_4_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_0_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_0_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_0_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_4_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_0_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_4_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_4_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_4_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_4_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_4_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_4_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_4_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_4_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_4_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_4_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_4_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_4_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_0_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_0_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_0_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_0_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_0_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_0_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_4_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_0_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_0_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_0_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_4_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_0_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_0_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_0_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_0_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_0_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_0_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_0_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_4_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_0_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_0_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_0_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_4_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_0_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_0_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_0_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_0_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_0_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_0_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_0_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_4_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_0_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_0_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_0_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_4_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_0_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_0_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_0_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_0_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_0_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_0_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_0_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_4_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_0_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_0_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_0_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_4_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_0_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_0_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_0_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_0_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_0_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_0_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_0_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_4_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_0_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_0_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_0_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_4_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_0_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_0_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_0_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_0_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_0_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_0_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_0_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_4_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_0_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_0_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_0_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_4_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_0_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_0_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_0_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_0_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_0_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_0_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_0_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_4_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_0_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_0_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_0_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_4_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_0_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_0_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_0_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_0_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_0_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_0_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_0_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_4_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_0_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_0_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_0_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_4_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_0_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_4_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_4_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_4_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_4_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_4_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_4_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_4_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_4_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_4_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_4_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_4_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_4_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_0_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_0_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_0_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_0_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_0_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_0_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_4_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_0_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_0_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_0_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_4_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_0_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_0_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_0_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_0_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_0_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_0_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_0_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_4_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_0_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_0_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_0_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_4_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_0_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_0_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_0_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_0_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_0_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_0_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_4_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_0_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_0_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_0_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_0_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_0_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_0_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_0_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_4_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_0_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_0_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_0_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_0_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_0_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_0_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_0_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_4_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_0_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_0_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_5_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_5_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_5_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_5_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_5_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_5_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_5_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_5_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_0_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_0_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_0_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_0_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_0_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_4_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_0_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_0_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_0_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_4_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_0_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_0_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_0_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_4_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_0_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_5_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_0_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_4_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_5_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_5_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_5_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_5_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_5_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_5_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_5_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_5_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_5_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_5_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_5_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_5_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_5_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_5_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_5_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_5_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_5_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_5_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_5_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_5_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_5_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_5_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_5_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_5_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4400_0_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_0_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_0_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_0_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_0_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_4_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_0_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_0_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_0_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_0_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_0_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_0_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_0_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_4_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_0_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_0_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_0_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_0_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_0_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_0_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_0_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_4_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_0_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_0_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_5_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_5_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_5_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_5_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_5_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_5_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_5_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_5_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_5_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_5_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_5_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_0_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_0_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_0_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_0_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_0_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_4_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_0_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_0_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_0_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_0_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_0_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_0_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_0_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_4_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_0_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_0_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_0_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_0_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_0_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_0_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_0_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_4_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_0_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_0_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_5_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_5_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_5_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_5_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_5_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_5_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_5_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_5_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_5_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_5_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_5_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_4_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_4_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_4_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_4_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_4_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_4_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_4_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_4_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_0_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4850_0_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_0_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_4_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_0_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_0_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_0_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_4_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_0_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_4_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_4_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_4_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_4_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_4_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_4_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_0_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_4_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_4_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_4_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_4_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_4_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_4_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_0_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_0_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_0_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_0_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_0_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_4_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_0_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_0_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_0_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_0_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_0_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_0_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_0_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_4_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_0_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_0_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_0_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_0_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_0_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_0_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_0_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_4_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_0_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_0_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_5_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_5_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_5_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_5_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_5_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_5_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_5_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_5_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_4_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_4_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_4_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_4_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_4_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_4_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_4_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_4_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_4_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_4_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_4_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_4_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_4_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_4_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_4_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_4_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_0_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_4_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_0_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_5_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_5_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_0_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_2_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_5_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_5_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e75_5_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_5_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_5_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e90_5_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_5_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_5_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_5_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_5_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_5_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_5_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_5_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_5_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_5_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_5_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_5_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_5_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_5_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_0_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_0_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_0_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_0_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_0_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_4_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_0_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_0_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_0_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_0_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_0_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_0_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_0_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_0_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_4_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_0_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_0_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_5_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_0_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_0_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_0_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_0_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_0_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_4_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_0_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_0_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_5_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_5_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_5_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_5_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_5_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_5_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_5_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_5_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_5_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_0_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_0_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_0_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_0_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_0_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_4_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_0_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_0_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_0_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_0_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_0_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_0_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_0_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_0_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_4_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_0_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_0_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_5_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_0_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_0_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_0_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_0_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_0_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_4_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_0_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_0_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_5_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_5_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_5_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_5_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_5_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_5_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_5_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_5_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_5_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_5_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_5_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_5_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_5_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_5_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_5_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_5_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_5_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_5_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_5_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_5_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_5_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_5_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_5_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_5_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_5_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_5_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_5_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_5_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_5_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_5_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_5_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_5_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_5_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_5_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_5_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_5_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_5_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_5_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_5_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_5_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_5_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_5_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_5_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_5_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_5_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_5_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_5_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_5_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_5_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_5_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_5_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_5_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_5_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_5_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_5_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_5_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_5_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_5_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_5_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_5_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_5_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_5_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_5_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_5_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_5_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_5_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_5_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_5_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_5_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_5_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_5_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_5_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_5_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_5_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_5_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_5_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_5_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_5_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_5_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_5_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_5_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_5_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_5_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_5_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_5_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_5_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_5_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_5_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_5_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_5_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_5_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_5_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_5_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_5_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_5_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_5_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_5_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_5_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_5_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_5_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_5_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_5_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_5_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_5_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_5_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_5_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_5_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_5_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_5_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_5_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_5_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_5_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_5_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_5_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_5_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_5_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_5_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_5_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_5_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_5_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_5_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_5_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_5_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_5_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_5_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_5_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_5_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_5_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_5_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_5_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_5_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_5_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_5_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_5_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_5_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_4_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_4_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_4_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_5_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_5_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_5_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_4_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_4_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_4_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_4_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_4_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_4_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_4_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_4_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_4_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_4_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_4_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_4_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_4_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_4_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_4_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_4_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_4_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_4_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_4_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_4_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_4_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_4_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_4_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_4_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_4_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_4_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_4_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_4_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_4_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_4_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_4_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_4_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_4_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_4_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_4_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_4_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_4_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_4_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_4_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_4_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_4_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_4_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_0_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_0_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_0_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_0_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_0_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_0_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_4_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_0_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_0_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_0_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_4_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_0_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_0_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_0_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_0_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_0_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_0_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_4_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_0_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_0_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_0_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_4_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_0_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_5_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_5_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_5_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_5_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_5_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_5_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_5_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_5_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_5_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_5_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_5_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_4_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_4_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_4_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_4_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_4_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_4_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_4_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_4_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_4_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_4_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_4_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_4_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_4_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_0_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_0_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_0_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_0_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_4_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_0_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_0_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_0_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_0_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_0_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_0_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_4_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_0_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_0_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_0_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_0_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_0_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_0_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_4_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_0_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_0_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_4_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_4_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_4_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_4_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_4_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_4_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_4_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_4_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_4_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_4_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_4_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_0_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_0_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_0_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_0_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_0_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_4_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_0_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_0_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_0_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_4_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_0_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_0_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_0_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_0_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_0_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_0_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_0_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_4_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_0_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_0_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_0_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_4_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_0_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_5_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_5_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_5_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_5_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_5_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_5_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_5_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_5_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_5_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_5_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_5_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_5_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_0_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_0_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_0_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_0_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_0_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_0_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_4_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_0_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_0_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_0_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_4_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_0_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_5_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_5_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_0_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_0_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_0_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_0_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_4_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_0_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_0_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_5_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_5_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_0_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_0_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_0_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_0_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_4_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_0_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_0_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_5_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_5_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_0_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_0_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_0_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_0_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_4_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_0_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_0_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_0_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_0_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_0_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_0_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_0_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_0_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_4_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_0_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_0_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_0_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_4_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_0_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_0_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_0_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_0_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_0_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_0_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_4_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_0_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_0_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_0_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_4_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_0_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_0_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_0_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_0_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_0_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_0_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_0_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_4_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_0_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_0_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_0_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_4_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_0_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_0_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_0_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_0_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_0_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_0_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_0_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_4_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_0_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_0_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_0_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_4_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_0_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_0_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_0_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_0_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_0_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_0_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_0_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_4_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_0_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_0_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_0_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_4_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_0_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_0_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_0_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_0_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_0_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_0_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_0_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_4_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_0_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_0_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_0_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_0_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_0_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_0_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_0_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_0_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_4_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_0_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_0_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_5_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_0_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_0_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_0_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_0_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_0_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_4_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_0_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_0_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_0_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_0_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_0_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_0_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_0_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_0_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_4_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_0_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_0_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_0_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_4_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_0_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_0_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_0_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_0_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_0_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_0_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_4_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_0_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_0_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_0_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_4_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_0_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_0_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_0_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_0_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_0_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_0_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_4_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_0_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_0_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_0_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_4_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_0_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_5_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_5_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_5_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_5_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_5_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_5_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_5_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_5_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_5_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_5_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_5_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_4_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_4_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_4_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_4_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_4_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_4_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_4_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_4_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_4_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_4_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_4_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_4_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_4_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_0_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_0_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_0_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_0_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_4_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_0_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_0_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_0_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_0_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_0_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_0_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_0_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_0_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_4_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_0_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_0_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_0_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_0_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_0_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_0_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_0_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_4_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_0_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_0_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_4_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_4_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_4_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_4_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_4_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_4_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_4_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_4_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_4_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_4_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_4_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_0_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_0_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_0_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_0_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_0_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_4_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_0_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_0_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_0_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_4_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_0_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_0_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_0_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_0_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_0_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_0_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_0_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_4_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_0_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_0_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_0_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_4_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_0_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_5_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_5_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_5_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_5_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_5_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_5_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_5_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_5_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_5_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_5_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_5_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_5_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_0_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_0_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_0_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_0_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_0_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_0_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_4_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_0_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_0_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_0_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_4_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_0_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_5_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_5_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_0_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_0_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_0_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_0_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_4_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_0_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_0_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_5_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_5_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_0_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_0_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_0_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_0_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_4_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_0_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_0_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_5_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_5_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_0_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_0_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_0_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_0_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_4_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_0_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_0_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_0_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_0_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_0_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_0_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_0_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_0_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_4_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_0_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_0_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_0_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_4_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_0_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_4_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_4_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_4_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_4_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_4_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_4_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_4_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_4_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_4_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_4_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_4_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_4_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_4_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_4_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_4_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_4_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_4_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_4_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_4_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_4_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_4_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_4_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_4_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_4_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_0_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_0_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_0_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_0_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_4_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_0_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_0_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_4_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_4_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_4_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_4_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_4_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_4_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_4_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_4_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_4_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_4_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_4_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_4_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_4_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_4_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_4_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_4_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_4_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_4_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_4_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_4_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_4_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_4_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_4_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_4_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_0_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_0_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_0_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_0_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_4_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_0_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_0_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_0_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_0_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_0_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_0_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_4_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_0_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_0_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_0_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_0_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_0_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_0_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_4_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_0_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_0_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_0_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_0_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_0_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_0_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_4_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_0_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_0_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_0_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_0_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_0_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_0_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_4_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_0_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_0_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_0_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_0_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_0_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_0_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_4_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_0_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_0_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_0_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_0_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_0_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_0_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_4_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_0_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_0_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifdef CPUEMU_11 +const struct cputbl op_smalltbl_11[] = { +{ op_0000_11_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_11_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_11_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_11_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_11_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_11_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_11_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_11_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_11_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_11_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_11_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_11_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_11_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_11_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_11_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_11_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_11_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_11_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_11_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_11_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_11_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_11_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_11_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_11_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_11_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_11_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_11_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_11_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_11_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_11_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_11_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_11_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_11_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_11_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_11_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_11_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_11_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_11_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_11_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_11_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_11_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_11_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_11_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_11_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_11_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_11_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_11_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_11_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_11_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_11_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_11_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_11_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_11_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_11_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_11_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_11_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_11_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_11_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_11_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_11_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_11_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_11_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_11_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_11_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_11_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_11_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_11_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_11_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_11_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_11_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_11_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_11_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_11_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_11_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_11_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_11_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_11_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_11_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_11_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_11_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_11_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_11_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_11_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_11_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_11_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_11_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_11_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_11_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_11_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_11_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_11_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_11_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_11_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_11_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_11_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_11_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_11_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_11_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_11_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_11_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_11_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_11_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_11_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_11_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_11_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_11_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_11_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_11_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_11_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_11_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_11_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_11_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_11_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_11_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_11_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_11_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_11_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_11_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_11_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_11_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_11_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_11_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_11_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_11_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_11_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_11_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_11_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_11_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_11_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_11_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_11_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_11_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_11_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_11_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_11_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_11_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_11_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_11_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_11_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_11_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_11_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_11_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_11_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_11_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_11_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_11_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_11_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_11_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_11_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_11_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_11_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_11_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_11_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_11_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_11_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_11_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_11_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_11_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_11_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_11_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_11_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_11_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_11_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_11_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_11_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_11_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_11_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_11_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_11_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_11_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_11_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_11_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_11_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_11_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_11_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_11_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_11_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_11_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_11_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_11_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_11_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_11_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_11_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_11_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_11_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_11_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_11_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_11_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_11_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_11_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_11_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_11_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_11_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_11_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_11_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_11_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_11_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_11_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_11_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_11_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_11_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_11_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_11_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_11_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_11_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_11_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_11_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_11_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_11_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_11_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_11_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_11_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_11_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_11_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_11_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_11_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_11_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_11_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_11_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_11_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_11_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_11_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_11_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0e10_11_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_11_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_11_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_11_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_11_ff, NULL, 0x0e30, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_11_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_11_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_11_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_11_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_11_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_11_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_11_ff, NULL, 0x0e70, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_11_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_11_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_11_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_11_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_11_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_11_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_11_ff, NULL, 0x0eb0, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_11_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_11_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +{ op_1000_11_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_11_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_11_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_11_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_11_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_11_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_11_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_11_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_11_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_11_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_11_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_11_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_11_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_11_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_11_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_11_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_11_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_11_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_11_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_11_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_11_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_11_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_11_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_11_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_11_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_11_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_11_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_11_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_11_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_11_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_11_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_11_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_11_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_11_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_11_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_11_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_11_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_11_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_11_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_11_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_11_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_11_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_11_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_11_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_11_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_11_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_11_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_11_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_11_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_11_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_11_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_11_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_11_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_11_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_11_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_11_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_11_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_11_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_11_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_11_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_11_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_11_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_11_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_11_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_11_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_11_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_11_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_11_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_11_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_11_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_11_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_11_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_11_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_11_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_11_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_11_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_11_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_11_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_11_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_11_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_11_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_11_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_11_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_11_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_11_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_11_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_11_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_11_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_11_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_11_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_11_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_11_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_11_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_11_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_11_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_11_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_11_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_11_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_11_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_11_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_11_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_11_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_11_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_11_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_11_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_11_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_11_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_11_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_11_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_11_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_11_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_11_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_11_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_11_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_11_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_11_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_11_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_11_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_11_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_11_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_11_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_11_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_11_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_11_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_11_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_11_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_11_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_11_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_11_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_11_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_11_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_11_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_11_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_11_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_11_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_11_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_11_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_11_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_11_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_11_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_11_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_11_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_11_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_11_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_11_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_11_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_11_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_11_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_11_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_11_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_11_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_11_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_11_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_11_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_11_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_11_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_11_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_11_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_11_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_11_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_11_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_11_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_11_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_11_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_11_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_11_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_11_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_11_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_11_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_11_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_11_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_11_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_11_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_11_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_11_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_11_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_11_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_11_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_11_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_11_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_11_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_11_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_11_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_11_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_11_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_11_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_11_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_11_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_11_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_11_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_11_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_11_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_11_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_11_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_11_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_11_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_11_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_11_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_11_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_11_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_11_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_11_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_11_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_11_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_11_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_11_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_11_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_11_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_11_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_11_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_11_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_11_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_11_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_11_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_11_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_11_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_11_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_11_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_11_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_11_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_11_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_11_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_11_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_11_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_11_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_11_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_11_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_11_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_11_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_11_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_11_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_11_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_11_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_11_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_11_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_11_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_11_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_11_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_11_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_11_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_11_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_11_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_11_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_11_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_11_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_11_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_11_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_11_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_11_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_11_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_11_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_11_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_11_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_11_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_11_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_11_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_11_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_11_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_11_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_11_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_11_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_11_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_11_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_11_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_11_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_11_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_11_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_11_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_11_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_11_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_11_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_11_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_11_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_11_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_11_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_11_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_11_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_11_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_11_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_11_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_11_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_11_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_11_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_11_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_11_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_11_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_11_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_11_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_11_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_11_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_11_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_11_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_11_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_11_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_11_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_11_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_11_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_11_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_11_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_11_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_11_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_11_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_11_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_11_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_11_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_11_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_11_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_11_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_11_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_11_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_11_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_11_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_11_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_11_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_11_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_11_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_11_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_11_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_11_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_11_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_11_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_11_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_11_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_11_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_11_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_11_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_11_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_11_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_11_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_11_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_11_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_11_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_11_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_11_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_11_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_11_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_11_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_11_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_11_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_11_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_11_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_11_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_11_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_11_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_11_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_11_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_11_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_11_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_11_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_11_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_11_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_11_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_11_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_11_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_11_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_11_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_11_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_11_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_11_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_11_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_11_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_11_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_11_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_11_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_11_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_11_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_11_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_11_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_11_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_11_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_11_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_11_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_11_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_11_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_11_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_11_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_11_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_11_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_11_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_11_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_11_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_11_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_11_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_11_ff, NULL, 0x42f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_11_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_11_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_11_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_11_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_11_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_11_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_11_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_11_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_11_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_11_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_11_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_11_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_11_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_11_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_11_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_11_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_11_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_11_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_11_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_11_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_11_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_11_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_11_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_11_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_11_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_11_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_11_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_11_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_11_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_11_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_11_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_11_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_11_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_11_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_11_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_11_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_11_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_11_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_11_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_11_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_11_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_11_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_11_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_11_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_11_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_11_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_11_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_11_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_11_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_11_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_11_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_11_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_11_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_11_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_11_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_11_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_11_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_11_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_11_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_11_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_11_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_11_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_11_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_11_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_11_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_11_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_11_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_11_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_11_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_11_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_11_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_11_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_11_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_11_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_11_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_11_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_11_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_11_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_11_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_11_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_11_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_11_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_11_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_11_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_11_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_11_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_11_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_11_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_11_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_11_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_11_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_11_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_11_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_11_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_11_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_11_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_11_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_11_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_11_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_11_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_11_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_11_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_11_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_11_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_11_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_11_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_11_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_11_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_11_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_11_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_11_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_11_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_11_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_11_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_11_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_11_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_11_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_11_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_11_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_11_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_11_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_11_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_11_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_11_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_11_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_11_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_11_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_11_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_11_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_11_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_11_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_11_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_11_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_11_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_11_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_11_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_11_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_11_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_11_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_11_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_11_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_11_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_11_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_11_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_11_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_11_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_11_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_11_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_11_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_11_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_11_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_11_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_11_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_11_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_11_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_11_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_11_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_11_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_11_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_11_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_11_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_11_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_11_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_11_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_11_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_11_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_11_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_11_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_11_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_11_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_11_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_11_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_11_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_11_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_11_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_11_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_11_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_11_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_11_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_11_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_11_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_11_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_11_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_11_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_11_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_11_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_11_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_11_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_11_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_11_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_11_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_11_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_11_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_11_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_11_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_11_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_11_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_11_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_11_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_11_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_11_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_11_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_11_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_11_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_11_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_11_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_11_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_11_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_11_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_11_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_11_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_11_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_11_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_11_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_11_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_11_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_11_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_11_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_11_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_11_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_11_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_11_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_11_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_11_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_11_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_11_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_11_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_11_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_11_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_11_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_11_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_11_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_11_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_11_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_11_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_11_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_11_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_11_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_11_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_11_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_11_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_11_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_11_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_11_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_11_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_11_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_11_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_11_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_11_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_11_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_11_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_11_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_11_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_11_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_11_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_11_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_11_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_11_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_11_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_11_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_11_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_11_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_11_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_11_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_11_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_11_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_11_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_11_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_11_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_11_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_11_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_11_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_11_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_11_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_11_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_11_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_11_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_11_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_11_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_11_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_11_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_11_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_11_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_11_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_11_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_11_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_11_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_11_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_11_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_11_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_11_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_11_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_11_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_11_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_11_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_11_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_11_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_11_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_11_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_11_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_11_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_11_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_11_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_11_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_11_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_11_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_11_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_11_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_11_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_11_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_11_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_11_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_11_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_11_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_11_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_11_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_11_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_11_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_11_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_11_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_11_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_11_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_11_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_11_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_11_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_11_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_11_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_11_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_11_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_11_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_11_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_11_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_11_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_11_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_11_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_11_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_11_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_11_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_11_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_11_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_11_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_11_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_11_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_11_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_11_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_11_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_11_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_11_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_11_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_11_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_11_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_11_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_11_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_11_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_11_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_11_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_11_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_11_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_11_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_11_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_11_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_11_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_11_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_11_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_11_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_11_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_11_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_11_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_11_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_11_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_11_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_11_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_11_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_11_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_11_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_11_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_11_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_11_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_11_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_11_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_11_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_11_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_11_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_11_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_11_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_11_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_11_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_11_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_11_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_11_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_11_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_11_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_11_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_11_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_11_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_11_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_11_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_11_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_11_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_11_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_11_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_11_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_11_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_11_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_11_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_11_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_11_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_11_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_11_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_11_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_11_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_11_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_11_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_11_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_11_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_11_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_11_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_11_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_11_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_11_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_11_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_11_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_11_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_11_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_11_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_11_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_11_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_11_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_11_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_11_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_11_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_11_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_11_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_11_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_11_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_11_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_11_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_11_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_11_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_11_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_11_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_11_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_11_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_11_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_11_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_11_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_11_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_11_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_11_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_11_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_11_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_11_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_11_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_11_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_11_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_11_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_11_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_11_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_11_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_11_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_11_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_11_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_11_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_11_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_11_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_11_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_11_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_11_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_11_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_11_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_11_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_11_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_11_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_11_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_11_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_11_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_11_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_11_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_11_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_11_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_11_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_11_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_11_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_11_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_11_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_11_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_11_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_11_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_11_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_11_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_11_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_11_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_11_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_11_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_11_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_11_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_11_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_11_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_11_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_11_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_11_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_11_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_11_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_11_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_11_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_11_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_11_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_11_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_11_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_11_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_11_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_11_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_11_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_11_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_11_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_11_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_11_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_11_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_11_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_11_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_11_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_11_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_11_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_11_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_11_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_11_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_11_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_11_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_11_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_11_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_11_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_11_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_11_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_11_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_11_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_11_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_11_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_11_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_11_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_11_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_11_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_11_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_11_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_11_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_11_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_11_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_11_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_11_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_11_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_11_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_11_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_11_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_11_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_11_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_11_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_11_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_11_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_11_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_11_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_11_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_11_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_11_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_11_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_11_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_11_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_11_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_11_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_11_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_11_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_11_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_11_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_11_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_11_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_11_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_11_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_11_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_11_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_11_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_11_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_11_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_11_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_11_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_11_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_11_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_11_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_11_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_11_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_11_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_11_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_11_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_11_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_11_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_11_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_11_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_11_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_11_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_11_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_11_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_11_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_11_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_11_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_11_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_11_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_11_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_11_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_11_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_11_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_11_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_11_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_11_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_11_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_11_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_11_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_11_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_11_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_11_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_11_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_11_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_11_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_11_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_11_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_11_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_11_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_11_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_11_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_11_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_11_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_11_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_11_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_11_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_11_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_11_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_11_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_11_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_11_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_11_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_11_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_11_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_11_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_11_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_11_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_11_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_11_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_11_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_11_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_11_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_11_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_11_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_11_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_11_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_11_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_11_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_11_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_11_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_11_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_11_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_11_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_11_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_11_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_11_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_11_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_11_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_11_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_11_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_11_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_11_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_11_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_11_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_11_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_11_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_11_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_11_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_11_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_11_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_11_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_11_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_11_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_11_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_11_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_11_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_11_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_11_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_11_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_11_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_11_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_11_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_11_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_11_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_11_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_11_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_11_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_11_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_11_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_11_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_11_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_11_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_11_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_11_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_11_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_11_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_11_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_11_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_11_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_11_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_11_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_11_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_11_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_11_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_11_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_11_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_11_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_11_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_11_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_11_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_11_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_11_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_11_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_11_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_11_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_11_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_11_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_11_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_11_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_11_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_11_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_11_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_11_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_11_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_11_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_11_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_11_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_11_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_11_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_11_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_11_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_11_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_11_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_11_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_11_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_11_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_11_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_11_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_11_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_11_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_11_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_11_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_11_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_11_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_11_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_11_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_11_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_11_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_11_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_11_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_11_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_11_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_11_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_11_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_11_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_11_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_11_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_11_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_11_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_11_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_11_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_11_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_11_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_11_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_11_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_11_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_11_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_11_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_11_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_11_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_11_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_11_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_11_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_11_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_11_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_11_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_11_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_11_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_11_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_11_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_11_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_11_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_11_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_11_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_11_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_11_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_11_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_11_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_11_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_11_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_11_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_11_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_11_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_11_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_11_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_11_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_11_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_11_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_11_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_11_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_11_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_11_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_11_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_11_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_11_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_11_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_11_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_11_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_11_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_11_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_11_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_11_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_11_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_11_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_11_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_11_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_11_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_11_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_11_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_11_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_11_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_11_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_11_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_11_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_11_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_11_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_11_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_11_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_11_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_11_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_11_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_11_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_11_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_11_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_11_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_11_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_11_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_11_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_11_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_11_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_11_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_11_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_11_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_11_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_11_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_11_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_11_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_11_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_11_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_11_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_11_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_11_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_11_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_11_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_11_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_11_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_11_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_11_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_11_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_11_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_11_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_11_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_11_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_11_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_11_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_11_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_11_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_11_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_11_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_11_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_11_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_11_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_11_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_11_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_11_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_11_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_11_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_11_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_11_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_11_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_11_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_11_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_11_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_11_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_11_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_11_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_11_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_11_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_11_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_11_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_11_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_11_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_11_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_11_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_11_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_11_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_11_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_11_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_11_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_11_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_11_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_11_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_11_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_11_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_11_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_11_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_11_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_11_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_11_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_11_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_11_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_11_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_11_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_11_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_11_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_11_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_11_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_11_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_11_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_11_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_11_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_11_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_11_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_11_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_11_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_11_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_11_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_11_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_11_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_11_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_11_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_11_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_11_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_11_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_11_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_11_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_11_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_11_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_11_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_11_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_11_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_11_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_11 */ +const struct cputbl op_smalltbl_12[] = { +{ op_0000_12_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_12_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_12_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_12_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_12_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_12_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_12_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_12_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_12_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_12_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_12_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_12_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_12_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_12_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_12_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_12_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_12_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_12_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_12_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_12_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_12_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_12_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_12_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_12_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_12_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_12_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_12_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_12_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_12_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_12_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_12_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_12_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_12_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_12_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_12_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_12_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_12_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_12_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_12_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_12_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_12_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_12_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_12_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_12_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_12_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_12_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_12_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_12_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_12_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_12_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_12_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_12_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_12_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_12_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_12_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_12_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_12_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_12_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_12_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_12_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_12_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_12_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_12_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_12_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_12_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_12_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_12_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_12_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_12_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_12_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_12_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_12_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_12_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_12_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_12_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_12_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_12_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_12_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_12_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_12_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_12_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_12_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_12_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_12_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_12_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_12_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_12_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_12_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_12_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_12_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_12_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_12_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_12_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_12_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_12_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_12_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_12_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_12_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_12_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_12_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_12_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_12_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_12_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_12_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_12_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_12_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_12_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_12_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_12_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_12_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_12_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_12_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_12_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_12_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_12_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_12_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_12_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_12_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_12_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_12_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_12_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_12_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_12_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_12_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_12_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_12_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_12_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_12_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_12_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_12_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_12_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_12_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_12_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_12_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_12_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_12_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_12_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_12_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_12_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_12_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_12_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_12_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_12_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_12_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_12_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_12_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_12_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_12_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_12_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_12_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_12_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_12_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_12_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_12_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_12_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_12_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_12_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_12_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_12_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_12_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_12_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_12_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_12_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_12_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_12_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_12_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_12_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_12_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_12_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_12_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_12_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_12_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_12_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_12_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_12_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_12_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_12_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_12_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_12_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_12_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_12_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_12_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_12_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_12_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_12_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_12_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_12_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_12_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_12_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_12_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_12_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_12_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_12_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_12_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_12_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_12_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_12_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_12_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_12_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_12_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_12_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_12_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_12_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_12_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_12_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_12_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_12_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_12_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_12_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_12_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_12_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_12_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_12_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_12_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_12_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_12_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_12_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_12_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_12_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_12_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_12_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_12_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_12_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_1000_12_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_12_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_12_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_12_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_12_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_12_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_12_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_12_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_12_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_12_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_12_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_12_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_12_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_12_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_12_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_12_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_12_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_12_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_12_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_12_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_12_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_12_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_12_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_12_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_12_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_12_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_12_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_12_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_12_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_12_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_12_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_12_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_12_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_12_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_12_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_12_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_12_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_12_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_12_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_12_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_12_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_12_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_12_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_12_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_12_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_12_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_12_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_12_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_12_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_12_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_12_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_12_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_12_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_12_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_12_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_12_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_12_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_12_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_12_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_12_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_12_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_12_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_12_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_12_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_12_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_12_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_12_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_12_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_12_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_12_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_12_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_12_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_12_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_12_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_12_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_12_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_12_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_12_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_12_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_12_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_12_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_12_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_12_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_12_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_12_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_12_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_12_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_12_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_12_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_12_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_12_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_12_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_12_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_12_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_12_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_12_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_12_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_12_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_12_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_12_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_12_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_12_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_12_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_12_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_12_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_12_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_12_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_12_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_12_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_12_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_12_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_12_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_12_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_12_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_12_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_12_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_12_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_12_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_12_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_12_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_12_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_12_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_12_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_12_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_12_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_12_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_12_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_12_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_12_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_12_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_12_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_12_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_12_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_12_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_12_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_12_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_12_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_12_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_12_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_12_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_12_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_12_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_12_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_12_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_12_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_12_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_12_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_12_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_12_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_12_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_12_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_12_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_12_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_12_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_12_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_12_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_12_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_12_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_12_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_12_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_12_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_12_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_12_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_12_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_12_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_12_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_12_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_12_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_12_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_12_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_12_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_12_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_12_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_12_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_12_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_12_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_12_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_12_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_12_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_12_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_12_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_12_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_12_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_12_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_12_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_12_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_12_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_12_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_12_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_12_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_12_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_12_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_12_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_12_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_12_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_12_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_12_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_12_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_12_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_12_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_12_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_12_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_12_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_12_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_12_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_12_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_12_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_12_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_12_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_12_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_12_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_12_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_12_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_12_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_12_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_12_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_12_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_12_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_12_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_12_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_12_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_12_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_12_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_12_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_12_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_12_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_12_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_12_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_12_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_12_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_12_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_12_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_12_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_12_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_12_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_12_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_12_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_12_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_12_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_12_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_12_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_12_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_12_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_12_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_12_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_12_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_12_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_12_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_12_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_12_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_12_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_12_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_12_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_12_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_12_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_12_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_12_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_12_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_12_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_12_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_12_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_12_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_12_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_12_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_12_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_12_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_12_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_12_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_12_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_12_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_12_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_12_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_12_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_12_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_12_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_12_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_12_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_12_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_12_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_12_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_12_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_12_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_12_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_12_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_12_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_12_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_12_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_12_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_12_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_12_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_12_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_12_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_12_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_12_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_12_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_12_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_12_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_12_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_12_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_12_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_12_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_12_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_12_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_12_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_12_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_12_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_12_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_12_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_12_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_12_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_12_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_12_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_12_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_12_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_12_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_12_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_12_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_12_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_12_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_12_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_12_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_12_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_12_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_12_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_12_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_12_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_12_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_12_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_12_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_12_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_12_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_12_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_12_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_12_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_12_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_12_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_12_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_12_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_12_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_12_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_12_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_12_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_12_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_12_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_12_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_12_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_12_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_12_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_12_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_12_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_12_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_12_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_12_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_12_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_12_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_12_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_12_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_12_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_12_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_12_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_12_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_12_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_12_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_12_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_12_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_12_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_12_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_12_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_12_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_12_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_12_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_12_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_12_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_12_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_12_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_12_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_12_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_12_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4400_12_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_12_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_12_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_12_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_12_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_12_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_12_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_12_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_12_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_12_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_12_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_12_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_12_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_12_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_12_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_12_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_12_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_12_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_12_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_12_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_12_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_12_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_12_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_12_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_12_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_12_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_12_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_12_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_12_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_12_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_12_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_12_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_12_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_12_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_12_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_12_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_12_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_12_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_12_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_12_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_12_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_12_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_12_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_12_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_12_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_12_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_12_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_12_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_12_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_12_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_12_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_12_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_12_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_12_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_12_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_12_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_12_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_12_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_12_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_12_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_12_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_12_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_12_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_12_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_12_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_12_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_12_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_12_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_12_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_12_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_12_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_12_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_12_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_12_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_12_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_12_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_12_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_12_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_12_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4850_12_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_12_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_12_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_12_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_12_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_12_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_12_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_12_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_12_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_12_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_12_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_12_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_12_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_12_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_12_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_12_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_12_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_12_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_12_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_12_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_12_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_12_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_12_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_12_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_12_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_12_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_12_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_12_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_12_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_12_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_12_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_12_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_12_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_12_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_12_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_12_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_12_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_12_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_12_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_12_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_12_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_12_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_12_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_12_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_12_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_12_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_12_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_12_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_12_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_12_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_12_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_12_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_12_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_12_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_12_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_12_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_12_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_12_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_12_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_12_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_12_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_12_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_12_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_12_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_12_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_12_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_12_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_12_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_12_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_11_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_12_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_12_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_12_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_12_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_12_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_12_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_12_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_12_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e75_12_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_12_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_12_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e90_12_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_12_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_12_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_12_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_12_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_12_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_12_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_12_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_12_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_12_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_12_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_12_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_12_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_12_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_12_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_12_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_12_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_12_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_12_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_12_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_12_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_12_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_12_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_12_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_12_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_12_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_12_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_12_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_12_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_12_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_12_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_12_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_12_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_12_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_12_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_12_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_12_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_12_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_12_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_12_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_12_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_12_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_12_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_12_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_12_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_12_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_12_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_12_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_12_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_12_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_12_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_12_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_12_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_12_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_12_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_12_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_12_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_12_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_12_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_12_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_12_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_12_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_12_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_12_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_12_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_12_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_12_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_12_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_12_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_12_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_12_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_12_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_12_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_12_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_12_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_12_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_12_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_12_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_12_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_12_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_12_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_12_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_12_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_12_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_12_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_12_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_12_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_12_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_12_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_12_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_12_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_12_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_12_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_12_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_12_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_12_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_12_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_12_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_12_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_12_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_12_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_12_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_12_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_12_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_12_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_12_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_12_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_12_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_12_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_12_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_12_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_12_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_12_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_12_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_12_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_12_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_12_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_12_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_12_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_12_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_12_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_12_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_12_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_12_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_12_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_12_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_12_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_12_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_12_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_12_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_12_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_12_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_12_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_12_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_12_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_12_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_12_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_12_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_12_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_12_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_12_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_12_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_12_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_12_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_12_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_12_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_12_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_12_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_12_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_12_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_12_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_12_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_12_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_12_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_12_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_12_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_12_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_12_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_12_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_12_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_12_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_12_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_12_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_12_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_12_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_12_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_12_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_12_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_12_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_12_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_12_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_12_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_12_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_12_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_12_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_12_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_12_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_12_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_12_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_12_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_12_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_12_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_12_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_12_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_12_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_12_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_12_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_12_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_12_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_12_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_12_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_12_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_12_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_12_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_12_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_12_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_12_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_12_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_12_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_12_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_12_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_12_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_12_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_12_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_12_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_12_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_12_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_12_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_12_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_12_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_12_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_12_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_12_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_12_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_12_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_12_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_12_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_12_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_12_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_12_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_12_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_12_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_12_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_12_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_12_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_12_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_12_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_12_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_12_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_12_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_12_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_12_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_12_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_12_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_12_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_12_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_12_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_12_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_12_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_12_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_12_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_12_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_12_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_12_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_12_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_12_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_12_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_12_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_12_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_12_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_12_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_12_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_12_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_12_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_12_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_12_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_12_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_12_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_12_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_12_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_12_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_12_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_12_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_12_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_12_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_12_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_12_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_12_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_12_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_12_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_12_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_12_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_12_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_12_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_12_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_12_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_12_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_12_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_12_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_12_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_12_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_12_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_12_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_12_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_12_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_12_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_12_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_12_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_12_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_12_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_12_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_12_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_12_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_12_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_12_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_12_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_12_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_12_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_12_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_12_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_12_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_12_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_12_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_12_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_12_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_12_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_12_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_12_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_12_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_12_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_12_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_12_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_12_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_12_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_12_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_12_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_12_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_12_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_12_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_12_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_12_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_12_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_12_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_12_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_12_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_12_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_12_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_12_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_12_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_12_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_12_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_12_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_12_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_12_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_12_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_12_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_12_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_12_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_12_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_12_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_12_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_12_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_12_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_12_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_12_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_12_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_12_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_12_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_12_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_12_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_12_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_12_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_12_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_12_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_12_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_12_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_12_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_12_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_12_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_12_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_12_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_12_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_12_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_12_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_12_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_12_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_12_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_12_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_12_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_12_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_12_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_12_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_12_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_12_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_12_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_12_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_12_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_12_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_12_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_12_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_12_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_12_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_12_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_12_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_12_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_12_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_12_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_12_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_12_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_12_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_12_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_12_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_12_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_12_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_12_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_12_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_12_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_12_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_12_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_12_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_12_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_12_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_12_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_12_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_12_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_12_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_12_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_12_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_12_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_12_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_12_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_12_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_12_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_12_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_12_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_12_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_12_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_12_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_12_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_12_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_12_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_12_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_12_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_12_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_12_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_12_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_12_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_12_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_12_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_12_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_12_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_12_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_12_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_12_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_12_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_12_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_12_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_12_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_12_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_12_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_12_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_12_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_12_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_12_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_12_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_12_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_12_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_12_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_12_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_12_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_12_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_12_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_12_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_12_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_12_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_12_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_12_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_12_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_12_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_12_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_12_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_12_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_12_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_12_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_12_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_12_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_12_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_12_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_12_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_12_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_12_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_12_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_12_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_12_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_12_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_12_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_12_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_12_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_12_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_12_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_12_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_12_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_12_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_12_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_12_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_12_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_12_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_12_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_12_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_12_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_12_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_12_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_12_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_12_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_12_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_12_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_12_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_12_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_12_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_12_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_12_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_12_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_12_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_12_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_12_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_12_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_12_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_12_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_12_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_12_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_12_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_12_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_12_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_12_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_12_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_12_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_12_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_12_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_12_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_12_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_12_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_12_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_12_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_12_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_12_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_12_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_12_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_12_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_12_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_12_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_12_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_12_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_12_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_12_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_12_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_12_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_12_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_12_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_12_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_12_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_12_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_12_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_12_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_12_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_12_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_12_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_12_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_12_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_12_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_12_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_12_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_12_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_12_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_12_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_12_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_12_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_12_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_12_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_12_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_12_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_12_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_12_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_12_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_12_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_12_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_12_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_12_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_12_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_12_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_12_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_12_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_12_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_12_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_12_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_12_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_12_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_12_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_12_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_12_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_12_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_12_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_12_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_12_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_12_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_12_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_12_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_12_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_12_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_12_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_12_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_12_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_12_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_12_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_12_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_12_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_12_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_12_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_12_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_12_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_12_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_12_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_12_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_12_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_12_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_12_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_12_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_12_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_12_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_12_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_12_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_12_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_12_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_12_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_12_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_12_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_12_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_12_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_12_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_12_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_12_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_12_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_12_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_12_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_12_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_12_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_12_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_12_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_12_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_12_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_12_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_12_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_12_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_12_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_12_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_12_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_12_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_12_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_12_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_12_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_12_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_12_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_12_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_12_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_12_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_12_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_12_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_12_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_12_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_12_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_12_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_12_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_12_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_12_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_12_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_12_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_12_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_12_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_12_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_12_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_12_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_12_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_12_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_12_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_12_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_12_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_12_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_12_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_12_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_12_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_12_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_12_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_12_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_12_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_12_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_12_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_12_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_12_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_12_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_12_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_12_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_12_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_12_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_12_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_12_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_12_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_12_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_12_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_12_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_12_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_12_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_12_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_12_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_12_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_12_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_12_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_12_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_12_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_12_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_12_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_12_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_12_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_12_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_12_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_12_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_12_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_12_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_12_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_12_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_12_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_12_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_12_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_12_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_12_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_12_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_12_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_12_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_12_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_12_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_12_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_12_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_12_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_12_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_12_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_12_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_12_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_12_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_12_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_12_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_12_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_12_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_12_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_12_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_12_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_12_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_12_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_12_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_12_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_12_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_12_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_12_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_12_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_12_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_12_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_12_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_12_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_12_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_12_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_12_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_12_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_12_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_12_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_12_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_12_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_12_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_12_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_12_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_12_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_12_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_12_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_12_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_12_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_12_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_12_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_12_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_12_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_12_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_12_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_12_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_12_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_12_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_12_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_12_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_12_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_12_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_12_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_12_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_12_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_12_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_12_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_12_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#ifdef CPUEMU_13 +const struct cputbl op_smalltbl_13[] = { +{ NULL, op_0000_13_ff, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0010_13_ff, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0018_13_ff, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0020_13_ff, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0028_13_ff, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0030_13_ff, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_0038_13_ff, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0039_13_ff, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_003c_13_ff, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0040_13_ff, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0050_13_ff, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0058_13_ff, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0060_13_ff, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0068_13_ff, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0070_13_ff, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_0078_13_ff, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0079_13_ff, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_007c_13_ff, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0080_13_ff, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0090_13_ff, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0098_13_ff, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a0_13_ff, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a8_13_ff, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b0_13_ff, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_00b8_13_ff, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b9_13_ff, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0100_13_ff, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0108_13_ff, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0110_13_ff, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0118_13_ff, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0120_13_ff, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0128_13_ff, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0130_13_ff, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ NULL, op_0138_13_ff, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0139_13_ff, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013a_13_ff, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013b_13_ff, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ NULL, op_013c_13_ff, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0140_13_ff, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0148_13_ff, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0150_13_ff, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0158_13_ff, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0160_13_ff, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0168_13_ff, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0170_13_ff, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ NULL, op_0178_13_ff, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0179_13_ff, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0180_13_ff, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0188_13_ff, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_0190_13_ff, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0198_13_ff, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a0_13_ff, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a8_13_ff, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b0_13_ff, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b8_13_ff, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b9_13_ff, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01c0_13_ff, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01c8_13_ff, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_01d0_13_ff, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01d8_13_ff, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e0_13_ff, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e8_13_ff, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f0_13_ff, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ NULL, op_01f8_13_ff, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f9_13_ff, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0200_13_ff, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0210_13_ff, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0218_13_ff, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0220_13_ff, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0228_13_ff, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0230_13_ff, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_0238_13_ff, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0239_13_ff, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_023c_13_ff, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0240_13_ff, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0250_13_ff, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0258_13_ff, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0260_13_ff, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0268_13_ff, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0270_13_ff, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_0278_13_ff, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0279_13_ff, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_027c_13_ff, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0280_13_ff, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0290_13_ff, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0298_13_ff, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a0_13_ff, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a8_13_ff, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b0_13_ff, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_02b8_13_ff, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b9_13_ff, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0400_13_ff, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0410_13_ff, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0418_13_ff, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0420_13_ff, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0428_13_ff, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0430_13_ff, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_0438_13_ff, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0439_13_ff, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0440_13_ff, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0450_13_ff, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0458_13_ff, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0460_13_ff, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0468_13_ff, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0470_13_ff, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_0478_13_ff, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0479_13_ff, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0480_13_ff, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0490_13_ff, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0498_13_ff, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a0_13_ff, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a8_13_ff, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b0_13_ff, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_04b8_13_ff, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b9_13_ff, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0600_13_ff, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0610_13_ff, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0618_13_ff, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0620_13_ff, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0628_13_ff, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0630_13_ff, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_0638_13_ff, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0639_13_ff, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0640_13_ff, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0650_13_ff, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0658_13_ff, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0660_13_ff, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0668_13_ff, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0670_13_ff, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_0678_13_ff, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0679_13_ff, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0680_13_ff, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0690_13_ff, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0698_13_ff, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a0_13_ff, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a8_13_ff, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b0_13_ff, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_06b8_13_ff, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b9_13_ff, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0800_13_ff, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0810_13_ff, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0818_13_ff, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0820_13_ff, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0828_13_ff, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0830_13_ff, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ NULL, op_0838_13_ff, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0839_13_ff, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083a_13_ff, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083b_13_ff, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ NULL, op_0840_13_ff, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0850_13_ff, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0858_13_ff, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0860_13_ff, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0868_13_ff, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0870_13_ff, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ NULL, op_0878_13_ff, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0879_13_ff, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0880_13_ff, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0890_13_ff, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0898_13_ff, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a0_13_ff, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a8_13_ff, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b0_13_ff, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b8_13_ff, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b9_13_ff, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08c0_13_ff, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d0_13_ff, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d8_13_ff, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e0_13_ff, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e8_13_ff, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f0_13_ff, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ NULL, op_08f8_13_ff, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f9_13_ff, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0a00_13_ff, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a10_13_ff, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a18_13_ff, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a20_13_ff, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a28_13_ff, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a30_13_ff, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_0a38_13_ff, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a39_13_ff, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a3c_13_ff, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a40_13_ff, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a50_13_ff, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a58_13_ff, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a60_13_ff, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a68_13_ff, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a70_13_ff, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_0a78_13_ff, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a79_13_ff, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a7c_13_ff, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a80_13_ff, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a90_13_ff, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a98_13_ff, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa0_13_ff, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa8_13_ff, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab0_13_ff, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab8_13_ff, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab9_13_ff, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0c00_13_ff, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c10_13_ff, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c18_13_ff, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c20_13_ff, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c28_13_ff, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c30_13_ff, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_0c38_13_ff, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c39_13_ff, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c40_13_ff, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c50_13_ff, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c58_13_ff, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c60_13_ff, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c68_13_ff, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c70_13_ff, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_0c78_13_ff, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c79_13_ff, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c80_13_ff, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c90_13_ff, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c98_13_ff, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca0_13_ff, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca8_13_ff, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb0_13_ff, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb8_13_ff, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb9_13_ff, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e10_13_ff, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e18_13_ff, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e20_13_ff, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e28_13_ff, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e30_13_ff, 0x0e30, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e38_13_ff, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e39_13_ff, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e50_13_ff, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e58_13_ff, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e60_13_ff, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e68_13_ff, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e70_13_ff, 0x0e70, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e78_13_ff, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e79_13_ff, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e90_13_ff, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e98_13_ff, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea0_13_ff, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea8_13_ff, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb0_13_ff, 0x0eb0, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb8_13_ff, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb9_13_ff, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +{ NULL, op_1000_13_ff, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1010_13_ff, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1018_13_ff, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1020_13_ff, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1028_13_ff, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1030_13_ff, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1038_13_ff, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1039_13_ff, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103a_13_ff, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103b_13_ff, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_103c_13_ff, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1080_13_ff, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1090_13_ff, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1098_13_ff, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a0_13_ff, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a8_13_ff, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b0_13_ff, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b8_13_ff, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b9_13_ff, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10ba_13_ff, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bb_13_ff, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bc_13_ff, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10c0_13_ff, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d0_13_ff, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d8_13_ff, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e0_13_ff, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e8_13_ff, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f0_13_ff, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f8_13_ff, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f9_13_ff, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fa_13_ff, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fb_13_ff, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fc_13_ff, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1100_13_ff, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1110_13_ff, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1118_13_ff, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1120_13_ff, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1128_13_ff, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1130_13_ff, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1138_13_ff, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1139_13_ff, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113a_13_ff, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113b_13_ff, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_113c_13_ff, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1140_13_ff, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1150_13_ff, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1158_13_ff, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1160_13_ff, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1168_13_ff, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1170_13_ff, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_1178_13_ff, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1179_13_ff, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117a_13_ff, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117b_13_ff, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_117c_13_ff, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1180_13_ff, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1190_13_ff, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1198_13_ff, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a0_13_ff, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a8_13_ff, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b0_13_ff, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_11b8_13_ff, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b9_13_ff, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11ba_13_ff, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11bb_13_ff, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_11bc_13_ff, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11c0_13_ff, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d0_13_ff, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d8_13_ff, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e0_13_ff, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e8_13_ff, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f0_13_ff, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f8_13_ff, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f9_13_ff, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fa_13_ff, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fb_13_ff, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fc_13_ff, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13c0_13_ff, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d0_13_ff, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d8_13_ff, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e0_13_ff, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e8_13_ff, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f0_13_ff, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f8_13_ff, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f9_13_ff, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fa_13_ff, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fb_13_ff, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fc_13_ff, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2000_13_ff, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2008_13_ff, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2010_13_ff, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2018_13_ff, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2020_13_ff, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2028_13_ff, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2030_13_ff, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2038_13_ff, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2039_13_ff, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203a_13_ff, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203b_13_ff, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_203c_13_ff, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2040_13_ff, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2048_13_ff, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2050_13_ff, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2058_13_ff, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2060_13_ff, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2068_13_ff, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2070_13_ff, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2078_13_ff, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2079_13_ff, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207a_13_ff, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207b_13_ff, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207c_13_ff, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2080_13_ff, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2088_13_ff, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2090_13_ff, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2098_13_ff, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a0_13_ff, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a8_13_ff, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b0_13_ff, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b8_13_ff, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b9_13_ff, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20ba_13_ff, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bb_13_ff, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bc_13_ff, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c0_13_ff, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c8_13_ff, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d0_13_ff, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d8_13_ff, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e0_13_ff, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e8_13_ff, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f0_13_ff, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f8_13_ff, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f9_13_ff, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fa_13_ff, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fb_13_ff, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fc_13_ff, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2100_13_ff, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2108_13_ff, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2110_13_ff, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2118_13_ff, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2120_13_ff, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2128_13_ff, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2130_13_ff, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2138_13_ff, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2139_13_ff, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213a_13_ff, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213b_13_ff, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_213c_13_ff, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2140_13_ff, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2148_13_ff, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2150_13_ff, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2158_13_ff, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2160_13_ff, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2168_13_ff, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2170_13_ff, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_2178_13_ff, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2179_13_ff, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217a_13_ff, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217b_13_ff, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_217c_13_ff, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2180_13_ff, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2188_13_ff, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2190_13_ff, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2198_13_ff, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a0_13_ff, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a8_13_ff, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b0_13_ff, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_21b8_13_ff, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b9_13_ff, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21ba_13_ff, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21bb_13_ff, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_21bc_13_ff, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c0_13_ff, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c8_13_ff, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d0_13_ff, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d8_13_ff, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e0_13_ff, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e8_13_ff, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f0_13_ff, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f8_13_ff, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f9_13_ff, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fa_13_ff, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fb_13_ff, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fc_13_ff, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c0_13_ff, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c8_13_ff, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d0_13_ff, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d8_13_ff, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e0_13_ff, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e8_13_ff, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f0_13_ff, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f8_13_ff, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f9_13_ff, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fa_13_ff, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fb_13_ff, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fc_13_ff, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3000_13_ff, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3008_13_ff, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3010_13_ff, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3018_13_ff, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3020_13_ff, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3028_13_ff, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3030_13_ff, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3038_13_ff, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3039_13_ff, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303a_13_ff, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303b_13_ff, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_303c_13_ff, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3040_13_ff, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3048_13_ff, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3050_13_ff, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3058_13_ff, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3060_13_ff, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3068_13_ff, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3070_13_ff, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3078_13_ff, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3079_13_ff, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307a_13_ff, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307b_13_ff, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307c_13_ff, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3080_13_ff, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3088_13_ff, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3090_13_ff, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3098_13_ff, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a0_13_ff, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a8_13_ff, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b0_13_ff, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b8_13_ff, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b9_13_ff, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30ba_13_ff, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bb_13_ff, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bc_13_ff, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c0_13_ff, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c8_13_ff, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d0_13_ff, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d8_13_ff, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e0_13_ff, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e8_13_ff, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f0_13_ff, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f8_13_ff, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f9_13_ff, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fa_13_ff, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fb_13_ff, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fc_13_ff, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3100_13_ff, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3108_13_ff, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3110_13_ff, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3118_13_ff, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3120_13_ff, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3128_13_ff, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3130_13_ff, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3138_13_ff, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3139_13_ff, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313a_13_ff, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313b_13_ff, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_313c_13_ff, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3140_13_ff, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3148_13_ff, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3150_13_ff, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3158_13_ff, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3160_13_ff, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3168_13_ff, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3170_13_ff, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_3178_13_ff, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3179_13_ff, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317a_13_ff, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317b_13_ff, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_317c_13_ff, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3180_13_ff, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3188_13_ff, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3190_13_ff, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3198_13_ff, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a0_13_ff, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a8_13_ff, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b0_13_ff, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_31b8_13_ff, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b9_13_ff, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31ba_13_ff, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31bb_13_ff, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_31bc_13_ff, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c0_13_ff, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c8_13_ff, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d0_13_ff, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d8_13_ff, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e0_13_ff, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e8_13_ff, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f0_13_ff, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f8_13_ff, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f9_13_ff, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fa_13_ff, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fb_13_ff, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fc_13_ff, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c0_13_ff, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c8_13_ff, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d0_13_ff, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d8_13_ff, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e0_13_ff, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e8_13_ff, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f0_13_ff, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f8_13_ff, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f9_13_ff, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fa_13_ff, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fb_13_ff, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fc_13_ff, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_4000_13_ff, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4010_13_ff, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4018_13_ff, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4020_13_ff, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4028_13_ff, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4030_13_ff, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ NULL, op_4038_13_ff, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4039_13_ff, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4040_13_ff, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4050_13_ff, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4058_13_ff, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4060_13_ff, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4068_13_ff, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4070_13_ff, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ NULL, op_4078_13_ff, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4079_13_ff, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4080_13_ff, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4090_13_ff, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4098_13_ff, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a0_13_ff, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a8_13_ff, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b0_13_ff, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b8_13_ff, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b9_13_ff, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40c0_13_ff, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d0_13_ff, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d8_13_ff, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e0_13_ff, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e8_13_ff, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f0_13_ff, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f8_13_ff, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f9_13_ff, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_4180_13_ff, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4190_13_ff, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4198_13_ff, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a0_13_ff, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a8_13_ff, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b0_13_ff, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ NULL, op_41b8_13_ff, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b9_13_ff, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41ba_13_ff, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41bb_13_ff, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ NULL, op_41bc_13_ff, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41d0_13_ff, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41e8_13_ff, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f0_13_ff, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ NULL, op_41f8_13_ff, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f9_13_ff, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fa_13_ff, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fb_13_ff, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ NULL, op_4200_13_ff, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4210_13_ff, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4218_13_ff, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4220_13_ff, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4228_13_ff, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4230_13_ff, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ NULL, op_4238_13_ff, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4239_13_ff, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4240_13_ff, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4250_13_ff, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4258_13_ff, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4260_13_ff, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4268_13_ff, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4270_13_ff, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ NULL, op_4278_13_ff, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4279_13_ff, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4280_13_ff, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4290_13_ff, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4298_13_ff, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a0_13_ff, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a8_13_ff, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b0_13_ff, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ NULL, op_42b8_13_ff, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b9_13_ff, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42c0_13_ff, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d0_13_ff, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d8_13_ff, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e0_13_ff, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e8_13_ff, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f0_13_ff, 0x42f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f8_13_ff, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f9_13_ff, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ NULL, op_4400_13_ff, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4410_13_ff, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4418_13_ff, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4420_13_ff, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4428_13_ff, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4430_13_ff, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ NULL, op_4438_13_ff, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4439_13_ff, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4440_13_ff, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4450_13_ff, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4458_13_ff, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4460_13_ff, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4468_13_ff, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4470_13_ff, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ NULL, op_4478_13_ff, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4479_13_ff, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4480_13_ff, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4490_13_ff, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4498_13_ff, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a0_13_ff, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a8_13_ff, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b0_13_ff, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ NULL, op_44b8_13_ff, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b9_13_ff, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44c0_13_ff, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d0_13_ff, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d8_13_ff, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e0_13_ff, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e8_13_ff, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f0_13_ff, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f8_13_ff, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f9_13_ff, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fa_13_ff, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fb_13_ff, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fc_13_ff, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4600_13_ff, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4610_13_ff, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4618_13_ff, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4620_13_ff, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4628_13_ff, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4630_13_ff, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ NULL, op_4638_13_ff, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4639_13_ff, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4640_13_ff, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4650_13_ff, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4658_13_ff, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4660_13_ff, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4668_13_ff, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4670_13_ff, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ NULL, op_4678_13_ff, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4679_13_ff, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4680_13_ff, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4690_13_ff, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4698_13_ff, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a0_13_ff, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a8_13_ff, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b0_13_ff, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ NULL, op_46b8_13_ff, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b9_13_ff, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46c0_13_ff, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d0_13_ff, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d8_13_ff, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e0_13_ff, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e8_13_ff, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f0_13_ff, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f8_13_ff, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f9_13_ff, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fa_13_ff, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fb_13_ff, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fc_13_ff, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4800_13_ff, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4810_13_ff, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4818_13_ff, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4820_13_ff, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4828_13_ff, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4830_13_ff, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ NULL, op_4838_13_ff, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4839_13_ff, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4840_13_ff, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4848_13_ff, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ NULL, op_4850_13_ff, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4868_13_ff, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4870_13_ff, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ NULL, op_4878_13_ff, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4879_13_ff, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487a_13_ff, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487b_13_ff, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ NULL, op_4880_13_ff, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_4890_13_ff, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a0_13_ff, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a8_13_ff, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b0_13_ff, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b8_13_ff, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b9_13_ff, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48c0_13_ff, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_48d0_13_ff, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e0_13_ff, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e8_13_ff, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f0_13_ff, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f8_13_ff, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f9_13_ff, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_4a00_13_ff, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a10_13_ff, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a18_13_ff, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a20_13_ff, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a28_13_ff, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a30_13_ff, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ NULL, op_4a38_13_ff, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a39_13_ff, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a40_13_ff, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a50_13_ff, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a58_13_ff, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a60_13_ff, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a68_13_ff, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a70_13_ff, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ NULL, op_4a78_13_ff, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a79_13_ff, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a80_13_ff, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a90_13_ff, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a98_13_ff, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa0_13_ff, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa8_13_ff, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab0_13_ff, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ NULL, op_4ab8_13_ff, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab9_13_ff, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ac0_13_ff, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad0_13_ff, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad8_13_ff, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae0_13_ff, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae8_13_ff, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af0_13_ff, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ NULL, op_4af8_13_ff, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af9_13_ff, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4c90_13_ff, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4c98_13_ff, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ca8_13_ff, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb0_13_ff, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb8_13_ff, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb9_13_ff, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cba_13_ff, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cbb_13_ff, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd0_13_ff, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd8_13_ff, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ce8_13_ff, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf0_13_ff, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf8_13_ff, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf9_13_ff, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfa_13_ff, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfb_13_ff, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4e40_13_ff, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ NULL, op_4e50_13_ff, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ NULL, op_4e58_13_ff, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ NULL, op_4e60_13_ff, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ NULL, op_4e68_13_ff, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ NULL, op_4e70_13_ff, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ NULL, op_4e71_13_ff, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ NULL, op_4e72_13_ff, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ NULL, op_4e73_13_ff, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e74_13_ff, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ NULL, op_4e75_13_ff, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ NULL, op_4e76_13_ff, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ NULL, op_4e77_13_ff, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7a_13_ff, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7b_13_ff, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ NULL, op_4e90_13_ff, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ NULL, op_4ea8_13_ff, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb0_13_ff, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4eb8_13_ff, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb9_13_ff, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ NULL, op_4eba_13_ff, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4ebb_13_ff, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4ed0_13_ff, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ NULL, op_4ee8_13_ff, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef0_13_ff, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_4ef8_13_ff, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef9_13_ff, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ NULL, op_4efa_13_ff, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4efb_13_ff, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_5000_13_ff, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5010_13_ff, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5018_13_ff, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5020_13_ff, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5028_13_ff, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5030_13_ff, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_5038_13_ff, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5039_13_ff, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5040_13_ff, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5048_13_ff, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5050_13_ff, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5058_13_ff, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5060_13_ff, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5068_13_ff, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5070_13_ff, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_5078_13_ff, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5079_13_ff, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5080_13_ff, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5088_13_ff, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5090_13_ff, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5098_13_ff, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a0_13_ff, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a8_13_ff, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b0_13_ff, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_50b8_13_ff, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b9_13_ff, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50c0_13_ff, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50c8_13_ff, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_50d0_13_ff, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50d8_13_ff, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e0_13_ff, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e8_13_ff, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f0_13_ff, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_50f8_13_ff, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f9_13_ff, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5100_13_ff, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5110_13_ff, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5118_13_ff, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5120_13_ff, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5128_13_ff, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5130_13_ff, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_5138_13_ff, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5139_13_ff, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5140_13_ff, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5148_13_ff, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5150_13_ff, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5158_13_ff, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5160_13_ff, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5168_13_ff, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5170_13_ff, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_5178_13_ff, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5179_13_ff, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5180_13_ff, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5188_13_ff, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5190_13_ff, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5198_13_ff, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a0_13_ff, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a8_13_ff, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b0_13_ff, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_51b8_13_ff, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b9_13_ff, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51c0_13_ff, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51c8_13_ff, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_51d0_13_ff, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51d8_13_ff, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e0_13_ff, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e8_13_ff, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f0_13_ff, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_51f8_13_ff, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f9_13_ff, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52c0_13_ff, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52c8_13_ff, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_52d0_13_ff, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52d8_13_ff, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e0_13_ff, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e8_13_ff, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f0_13_ff, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_52f8_13_ff, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f9_13_ff, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53c0_13_ff, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53c8_13_ff, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_53d0_13_ff, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53d8_13_ff, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e0_13_ff, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e8_13_ff, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f0_13_ff, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_53f8_13_ff, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f9_13_ff, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54c0_13_ff, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54c8_13_ff, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_54d0_13_ff, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54d8_13_ff, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e0_13_ff, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e8_13_ff, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f0_13_ff, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_54f8_13_ff, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f9_13_ff, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55c0_13_ff, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55c8_13_ff, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_55d0_13_ff, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55d8_13_ff, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e0_13_ff, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e8_13_ff, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f0_13_ff, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_55f8_13_ff, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f9_13_ff, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56c0_13_ff, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56c8_13_ff, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_56d0_13_ff, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56d8_13_ff, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e0_13_ff, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e8_13_ff, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f0_13_ff, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_56f8_13_ff, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f9_13_ff, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57c0_13_ff, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57c8_13_ff, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_57d0_13_ff, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57d8_13_ff, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e0_13_ff, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e8_13_ff, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f0_13_ff, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_57f8_13_ff, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f9_13_ff, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58c0_13_ff, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58c8_13_ff, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_58d0_13_ff, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58d8_13_ff, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e0_13_ff, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e8_13_ff, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f0_13_ff, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_58f8_13_ff, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f9_13_ff, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59c0_13_ff, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59c8_13_ff, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_59d0_13_ff, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59d8_13_ff, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e0_13_ff, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e8_13_ff, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f0_13_ff, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_59f8_13_ff, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f9_13_ff, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ac0_13_ff, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ac8_13_ff, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ad0_13_ff, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ad8_13_ff, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae0_13_ff, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae8_13_ff, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af0_13_ff, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5af8_13_ff, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af9_13_ff, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bc0_13_ff, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bc8_13_ff, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5bd0_13_ff, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bd8_13_ff, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be0_13_ff, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be8_13_ff, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf0_13_ff, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf8_13_ff, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf9_13_ff, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cc0_13_ff, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cc8_13_ff, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5cd0_13_ff, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cd8_13_ff, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce0_13_ff, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce8_13_ff, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf0_13_ff, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf8_13_ff, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf9_13_ff, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dc0_13_ff, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dc8_13_ff, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5dd0_13_ff, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dd8_13_ff, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de0_13_ff, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de8_13_ff, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df0_13_ff, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5df8_13_ff, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df9_13_ff, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ec0_13_ff, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ec8_13_ff, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ed0_13_ff, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ed8_13_ff, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee0_13_ff, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee8_13_ff, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef0_13_ff, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef8_13_ff, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef9_13_ff, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fc0_13_ff, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fc8_13_ff, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5fd0_13_ff, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fd8_13_ff, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe0_13_ff, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe8_13_ff, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff0_13_ff, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff8_13_ff, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff9_13_ff, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_6000_13_ff, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6001_13_ff, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_60ff_13_ff, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6100_13_ff, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ NULL, op_6101_13_ff, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ NULL, op_61ff_13_ff, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ NULL, op_6200_13_ff, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6201_13_ff, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_62ff_13_ff, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6300_13_ff, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6301_13_ff, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_63ff_13_ff, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6400_13_ff, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6401_13_ff, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_64ff_13_ff, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6500_13_ff, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6501_13_ff, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_65ff_13_ff, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6600_13_ff, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6601_13_ff, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_66ff_13_ff, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6700_13_ff, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6701_13_ff, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_67ff_13_ff, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6800_13_ff, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6801_13_ff, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_68ff_13_ff, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6900_13_ff, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6901_13_ff, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_69ff_13_ff, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6a00_13_ff, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6a01_13_ff, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6aff_13_ff, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6b00_13_ff, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6b01_13_ff, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6bff_13_ff, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6c00_13_ff, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6c01_13_ff, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6cff_13_ff, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6d00_13_ff, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6d01_13_ff, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6dff_13_ff, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6e00_13_ff, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6e01_13_ff, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6eff_13_ff, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6f00_13_ff, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6f01_13_ff, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6fff_13_ff, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_7000_13_ff, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_8000_13_ff, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8010_13_ff, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8018_13_ff, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8020_13_ff, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8028_13_ff, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8030_13_ff, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_8038_13_ff, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8039_13_ff, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803a_13_ff, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803b_13_ff, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_803c_13_ff, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8040_13_ff, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8050_13_ff, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8058_13_ff, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8060_13_ff, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8068_13_ff, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8070_13_ff, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_8078_13_ff, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8079_13_ff, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807a_13_ff, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807b_13_ff, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_807c_13_ff, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8080_13_ff, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8090_13_ff, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8098_13_ff, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a0_13_ff, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a8_13_ff, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b0_13_ff, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_80b8_13_ff, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b9_13_ff, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80ba_13_ff, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80bb_13_ff, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_80bc_13_ff, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80c0_13_ff, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d0_13_ff, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d8_13_ff, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e0_13_ff, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e8_13_ff, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f0_13_ff, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f8_13_ff, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f9_13_ff, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fa_13_ff, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fb_13_ff, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fc_13_ff, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_8100_13_ff, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8108_13_ff, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8110_13_ff, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8118_13_ff, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8120_13_ff, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8128_13_ff, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8130_13_ff, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_8138_13_ff, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8139_13_ff, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8150_13_ff, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8158_13_ff, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8160_13_ff, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8168_13_ff, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8170_13_ff, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_8178_13_ff, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8179_13_ff, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8190_13_ff, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8198_13_ff, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a0_13_ff, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a8_13_ff, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b0_13_ff, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_81b8_13_ff, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b9_13_ff, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81c0_13_ff, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d0_13_ff, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d8_13_ff, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e0_13_ff, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e8_13_ff, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f0_13_ff, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f8_13_ff, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f9_13_ff, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fa_13_ff, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fb_13_ff, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fc_13_ff, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_9000_13_ff, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9010_13_ff, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9018_13_ff, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9020_13_ff, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9028_13_ff, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9030_13_ff, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_9038_13_ff, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9039_13_ff, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903a_13_ff, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903b_13_ff, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_903c_13_ff, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9040_13_ff, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9048_13_ff, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9050_13_ff, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9058_13_ff, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9060_13_ff, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9068_13_ff, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9070_13_ff, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_9078_13_ff, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9079_13_ff, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907a_13_ff, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907b_13_ff, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_907c_13_ff, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9080_13_ff, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9088_13_ff, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9090_13_ff, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9098_13_ff, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a0_13_ff, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a8_13_ff, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b0_13_ff, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_90b8_13_ff, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b9_13_ff, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90ba_13_ff, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90bb_13_ff, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_90bc_13_ff, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90c0_13_ff, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90c8_13_ff, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d0_13_ff, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d8_13_ff, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e0_13_ff, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e8_13_ff, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f0_13_ff, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f8_13_ff, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f9_13_ff, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fa_13_ff, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fb_13_ff, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fc_13_ff, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_9100_13_ff, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9108_13_ff, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9110_13_ff, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9118_13_ff, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9120_13_ff, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9128_13_ff, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9130_13_ff, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_9138_13_ff, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9139_13_ff, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9140_13_ff, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9148_13_ff, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9150_13_ff, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9158_13_ff, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9160_13_ff, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9168_13_ff, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9170_13_ff, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_9178_13_ff, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9179_13_ff, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9180_13_ff, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9188_13_ff, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9190_13_ff, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9198_13_ff, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a0_13_ff, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a8_13_ff, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b0_13_ff, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_91b8_13_ff, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b9_13_ff, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91c0_13_ff, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91c8_13_ff, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d0_13_ff, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d8_13_ff, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e0_13_ff, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e8_13_ff, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f0_13_ff, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f8_13_ff, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f9_13_ff, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fa_13_ff, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fb_13_ff, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fc_13_ff, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_b000_13_ff, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b010_13_ff, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b018_13_ff, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b020_13_ff, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b028_13_ff, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b030_13_ff, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b038_13_ff, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b039_13_ff, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03a_13_ff, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03b_13_ff, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b03c_13_ff, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b040_13_ff, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b048_13_ff, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b050_13_ff, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b058_13_ff, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b060_13_ff, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b068_13_ff, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b070_13_ff, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b078_13_ff, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b079_13_ff, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07a_13_ff, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07b_13_ff, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b07c_13_ff, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b080_13_ff, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b088_13_ff, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b090_13_ff, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b098_13_ff, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a0_13_ff, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a8_13_ff, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b0_13_ff, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b8_13_ff, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b9_13_ff, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0ba_13_ff, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bb_13_ff, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bc_13_ff, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0c0_13_ff, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0c8_13_ff, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d0_13_ff, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d8_13_ff, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e0_13_ff, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e8_13_ff, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f0_13_ff, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f8_13_ff, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f9_13_ff, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fa_13_ff, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fb_13_ff, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fc_13_ff, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b100_13_ff, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b108_13_ff, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b110_13_ff, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b118_13_ff, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b120_13_ff, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b128_13_ff, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b130_13_ff, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_b138_13_ff, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b139_13_ff, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b140_13_ff, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b148_13_ff, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b150_13_ff, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b158_13_ff, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b160_13_ff, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b168_13_ff, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b170_13_ff, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_b178_13_ff, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b179_13_ff, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b180_13_ff, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b188_13_ff, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b190_13_ff, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b198_13_ff, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a0_13_ff, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a8_13_ff, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b0_13_ff, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b8_13_ff, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b9_13_ff, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1c0_13_ff, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1c8_13_ff, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d0_13_ff, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d8_13_ff, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e0_13_ff, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e8_13_ff, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f0_13_ff, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f8_13_ff, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f9_13_ff, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fa_13_ff, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fb_13_ff, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fc_13_ff, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_c000_13_ff, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c010_13_ff, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c018_13_ff, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c020_13_ff, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c028_13_ff, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c030_13_ff, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c038_13_ff, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c039_13_ff, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03a_13_ff, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03b_13_ff, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c03c_13_ff, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c040_13_ff, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c050_13_ff, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c058_13_ff, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c060_13_ff, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c068_13_ff, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c070_13_ff, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c078_13_ff, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c079_13_ff, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07a_13_ff, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07b_13_ff, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c07c_13_ff, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c080_13_ff, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c090_13_ff, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c098_13_ff, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a0_13_ff, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a8_13_ff, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b0_13_ff, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c0b8_13_ff, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b9_13_ff, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0ba_13_ff, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0bb_13_ff, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c0bc_13_ff, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0c0_13_ff, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d0_13_ff, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d8_13_ff, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e0_13_ff, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e8_13_ff, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f0_13_ff, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f8_13_ff, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f9_13_ff, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fa_13_ff, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fb_13_ff, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fc_13_ff, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c100_13_ff, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c108_13_ff, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c110_13_ff, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c118_13_ff, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c120_13_ff, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c128_13_ff, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c130_13_ff, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c138_13_ff, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c139_13_ff, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c140_13_ff, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c148_13_ff, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c150_13_ff, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c158_13_ff, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c160_13_ff, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c168_13_ff, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c170_13_ff, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c178_13_ff, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c179_13_ff, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c188_13_ff, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c190_13_ff, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c198_13_ff, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a0_13_ff, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a8_13_ff, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b0_13_ff, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c1b8_13_ff, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b9_13_ff, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1c0_13_ff, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d0_13_ff, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d8_13_ff, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e0_13_ff, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e8_13_ff, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f0_13_ff, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f8_13_ff, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f9_13_ff, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fa_13_ff, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fb_13_ff, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fc_13_ff, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_d000_13_ff, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d010_13_ff, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d018_13_ff, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d020_13_ff, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d028_13_ff, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d030_13_ff, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d038_13_ff, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d039_13_ff, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03a_13_ff, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03b_13_ff, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d03c_13_ff, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d040_13_ff, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d048_13_ff, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d050_13_ff, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d058_13_ff, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d060_13_ff, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d068_13_ff, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d070_13_ff, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d078_13_ff, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d079_13_ff, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07a_13_ff, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07b_13_ff, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d07c_13_ff, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d080_13_ff, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d088_13_ff, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d090_13_ff, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d098_13_ff, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a0_13_ff, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a8_13_ff, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b0_13_ff, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b8_13_ff, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b9_13_ff, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0ba_13_ff, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bb_13_ff, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bc_13_ff, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0c0_13_ff, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0c8_13_ff, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d0_13_ff, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d8_13_ff, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e0_13_ff, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e8_13_ff, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f0_13_ff, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f8_13_ff, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f9_13_ff, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fa_13_ff, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fb_13_ff, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fc_13_ff, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d100_13_ff, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d108_13_ff, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d110_13_ff, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d118_13_ff, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d120_13_ff, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d128_13_ff, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d130_13_ff, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d138_13_ff, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d139_13_ff, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d140_13_ff, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d148_13_ff, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d150_13_ff, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d158_13_ff, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d160_13_ff, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d168_13_ff, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d170_13_ff, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d178_13_ff, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d179_13_ff, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d180_13_ff, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d188_13_ff, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d190_13_ff, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d198_13_ff, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a0_13_ff, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a8_13_ff, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b0_13_ff, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b8_13_ff, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b9_13_ff, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1c0_13_ff, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1c8_13_ff, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d0_13_ff, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d8_13_ff, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e0_13_ff, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e8_13_ff, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f0_13_ff, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f8_13_ff, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f9_13_ff, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fa_13_ff, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fb_13_ff, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fc_13_ff, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_e000_13_ff, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e008_13_ff, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e010_13_ff, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e018_13_ff, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e020_13_ff, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e028_13_ff, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e030_13_ff, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e038_13_ff, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e040_13_ff, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e048_13_ff, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e050_13_ff, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e058_13_ff, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e060_13_ff, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e068_13_ff, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e070_13_ff, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e078_13_ff, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e080_13_ff, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e088_13_ff, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e090_13_ff, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e098_13_ff, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0a0_13_ff, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e0a8_13_ff, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e0b0_13_ff, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e0b8_13_ff, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0d0_13_ff, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0d8_13_ff, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e0_13_ff, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e8_13_ff, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f0_13_ff, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f8_13_ff, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f9_13_ff, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e100_13_ff, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e108_13_ff, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e110_13_ff, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e118_13_ff, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e120_13_ff, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e128_13_ff, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e130_13_ff, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e138_13_ff, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e140_13_ff, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e148_13_ff, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e150_13_ff, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e158_13_ff, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e160_13_ff, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e168_13_ff, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e170_13_ff, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e178_13_ff, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e180_13_ff, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e188_13_ff, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e190_13_ff, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e198_13_ff, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1a0_13_ff, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e1a8_13_ff, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e1b0_13_ff, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e1b8_13_ff, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1d0_13_ff, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1d8_13_ff, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e0_13_ff, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e8_13_ff, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f0_13_ff, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f8_13_ff, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f9_13_ff, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e2d0_13_ff, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2d8_13_ff, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e0_13_ff, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e8_13_ff, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f0_13_ff, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f8_13_ff, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f9_13_ff, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e3d0_13_ff, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3d8_13_ff, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e0_13_ff, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e8_13_ff, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f0_13_ff, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f8_13_ff, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f9_13_ff, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e4d0_13_ff, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4d8_13_ff, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e0_13_ff, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e8_13_ff, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f0_13_ff, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f8_13_ff, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f9_13_ff, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e5d0_13_ff, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5d8_13_ff, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e0_13_ff, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e8_13_ff, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f0_13_ff, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f8_13_ff, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f9_13_ff, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e6d0_13_ff, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6d8_13_ff, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e0_13_ff, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e8_13_ff, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f0_13_ff, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f8_13_ff, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f9_13_ff, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e7d0_13_ff, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7d8_13_ff, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e0_13_ff, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e8_13_ff, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f0_13_ff, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f8_13_ff, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f9_13_ff, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_13 */ +const struct cputbl op_smalltbl_14[] = { +{ NULL, op_0000_14_ff, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0010_14_ff, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0018_14_ff, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0020_14_ff, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0028_14_ff, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0030_14_ff, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_0038_14_ff, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0039_14_ff, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_003c_14_ff, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0040_14_ff, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0050_14_ff, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0058_14_ff, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0060_14_ff, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0068_14_ff, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0070_14_ff, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_0078_14_ff, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0079_14_ff, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_007c_14_ff, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0080_14_ff, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0090_14_ff, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0098_14_ff, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a0_14_ff, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a8_14_ff, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b0_14_ff, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_00b8_14_ff, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b9_14_ff, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0100_14_ff, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0108_14_ff, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0110_14_ff, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0118_14_ff, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0120_14_ff, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0128_14_ff, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0130_14_ff, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ NULL, op_0138_14_ff, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0139_14_ff, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013a_14_ff, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013b_14_ff, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ NULL, op_013c_14_ff, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0140_14_ff, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0148_14_ff, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0150_14_ff, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0158_14_ff, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0160_14_ff, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0168_14_ff, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0170_14_ff, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ NULL, op_0178_14_ff, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0179_14_ff, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0180_14_ff, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0188_14_ff, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_0190_14_ff, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0198_14_ff, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a0_14_ff, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a8_14_ff, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b0_14_ff, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b8_14_ff, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b9_14_ff, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01c0_14_ff, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01c8_14_ff, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_01d0_14_ff, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01d8_14_ff, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e0_14_ff, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e8_14_ff, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f0_14_ff, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ NULL, op_01f8_14_ff, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f9_14_ff, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0200_14_ff, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0210_14_ff, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0218_14_ff, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0220_14_ff, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0228_14_ff, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0230_14_ff, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_0238_14_ff, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0239_14_ff, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_023c_14_ff, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0240_14_ff, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0250_14_ff, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0258_14_ff, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0260_14_ff, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0268_14_ff, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0270_14_ff, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_0278_14_ff, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0279_14_ff, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_027c_14_ff, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0280_14_ff, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0290_14_ff, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0298_14_ff, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a0_14_ff, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a8_14_ff, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b0_14_ff, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_02b8_14_ff, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b9_14_ff, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0400_14_ff, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0410_14_ff, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0418_14_ff, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0420_14_ff, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0428_14_ff, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0430_14_ff, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_0438_14_ff, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0439_14_ff, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0440_14_ff, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0450_14_ff, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0458_14_ff, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0460_14_ff, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0468_14_ff, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0470_14_ff, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_0478_14_ff, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0479_14_ff, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0480_14_ff, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0490_14_ff, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0498_14_ff, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a0_14_ff, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a8_14_ff, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b0_14_ff, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_04b8_14_ff, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b9_14_ff, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0600_14_ff, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0610_14_ff, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0618_14_ff, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0620_14_ff, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0628_14_ff, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0630_14_ff, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_0638_14_ff, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0639_14_ff, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0640_14_ff, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0650_14_ff, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0658_14_ff, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0660_14_ff, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0668_14_ff, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0670_14_ff, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_0678_14_ff, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0679_14_ff, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0680_14_ff, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0690_14_ff, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0698_14_ff, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a0_14_ff, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a8_14_ff, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b0_14_ff, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_06b8_14_ff, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b9_14_ff, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0800_14_ff, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0810_14_ff, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0818_14_ff, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0820_14_ff, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0828_14_ff, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0830_14_ff, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ NULL, op_0838_14_ff, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0839_14_ff, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083a_14_ff, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083b_14_ff, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ NULL, op_0840_14_ff, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0850_14_ff, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0858_14_ff, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0860_14_ff, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0868_14_ff, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0870_14_ff, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ NULL, op_0878_14_ff, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0879_14_ff, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0880_14_ff, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0890_14_ff, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0898_14_ff, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a0_14_ff, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a8_14_ff, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b0_14_ff, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b8_14_ff, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b9_14_ff, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08c0_14_ff, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d0_14_ff, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d8_14_ff, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e0_14_ff, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e8_14_ff, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f0_14_ff, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ NULL, op_08f8_14_ff, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f9_14_ff, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0a00_14_ff, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a10_14_ff, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a18_14_ff, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a20_14_ff, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a28_14_ff, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a30_14_ff, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_0a38_14_ff, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a39_14_ff, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a3c_14_ff, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a40_14_ff, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a50_14_ff, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a58_14_ff, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a60_14_ff, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a68_14_ff, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a70_14_ff, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_0a78_14_ff, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a79_14_ff, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a7c_14_ff, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a80_14_ff, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a90_14_ff, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a98_14_ff, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa0_14_ff, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa8_14_ff, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab0_14_ff, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab8_14_ff, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab9_14_ff, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0c00_14_ff, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c10_14_ff, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c18_14_ff, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c20_14_ff, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c28_14_ff, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c30_14_ff, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_0c38_14_ff, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c39_14_ff, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c40_14_ff, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c50_14_ff, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c58_14_ff, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c60_14_ff, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c68_14_ff, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c70_14_ff, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_0c78_14_ff, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c79_14_ff, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c80_14_ff, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c90_14_ff, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c98_14_ff, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca0_14_ff, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca8_14_ff, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb0_14_ff, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb8_14_ff, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb9_14_ff, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_1000_14_ff, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1010_14_ff, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1018_14_ff, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1020_14_ff, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1028_14_ff, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1030_14_ff, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1038_14_ff, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1039_14_ff, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103a_14_ff, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103b_14_ff, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_103c_14_ff, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1080_14_ff, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1090_14_ff, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1098_14_ff, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a0_14_ff, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a8_14_ff, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b0_14_ff, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b8_14_ff, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b9_14_ff, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10ba_14_ff, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bb_14_ff, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bc_14_ff, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10c0_14_ff, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d0_14_ff, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d8_14_ff, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e0_14_ff, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e8_14_ff, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f0_14_ff, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f8_14_ff, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f9_14_ff, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fa_14_ff, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fb_14_ff, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fc_14_ff, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1100_14_ff, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1110_14_ff, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1118_14_ff, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1120_14_ff, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1128_14_ff, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1130_14_ff, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1138_14_ff, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1139_14_ff, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113a_14_ff, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113b_14_ff, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_113c_14_ff, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1140_14_ff, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1150_14_ff, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1158_14_ff, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1160_14_ff, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1168_14_ff, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1170_14_ff, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_1178_14_ff, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1179_14_ff, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117a_14_ff, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117b_14_ff, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_117c_14_ff, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1180_14_ff, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1190_14_ff, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1198_14_ff, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a0_14_ff, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a8_14_ff, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b0_14_ff, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_11b8_14_ff, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b9_14_ff, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11ba_14_ff, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11bb_14_ff, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_11bc_14_ff, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11c0_14_ff, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d0_14_ff, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d8_14_ff, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e0_14_ff, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e8_14_ff, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f0_14_ff, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f8_14_ff, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f9_14_ff, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fa_14_ff, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fb_14_ff, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fc_14_ff, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13c0_14_ff, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d0_14_ff, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d8_14_ff, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e0_14_ff, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e8_14_ff, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f0_14_ff, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f8_14_ff, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f9_14_ff, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fa_14_ff, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fb_14_ff, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fc_14_ff, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2000_14_ff, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2008_14_ff, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2010_14_ff, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2018_14_ff, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2020_14_ff, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2028_14_ff, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2030_14_ff, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2038_14_ff, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2039_14_ff, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203a_14_ff, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203b_14_ff, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_203c_14_ff, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2040_14_ff, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2048_14_ff, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2050_14_ff, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2058_14_ff, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2060_14_ff, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2068_14_ff, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2070_14_ff, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2078_14_ff, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2079_14_ff, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207a_14_ff, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207b_14_ff, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207c_14_ff, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2080_14_ff, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2088_14_ff, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2090_14_ff, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2098_14_ff, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a0_14_ff, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a8_14_ff, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b0_14_ff, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b8_14_ff, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b9_14_ff, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20ba_14_ff, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bb_14_ff, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bc_14_ff, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c0_14_ff, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c8_14_ff, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d0_14_ff, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d8_14_ff, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e0_14_ff, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e8_14_ff, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f0_14_ff, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f8_14_ff, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f9_14_ff, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fa_14_ff, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fb_14_ff, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fc_14_ff, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2100_14_ff, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2108_14_ff, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2110_14_ff, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2118_14_ff, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2120_14_ff, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2128_14_ff, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2130_14_ff, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2138_14_ff, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2139_14_ff, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213a_14_ff, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213b_14_ff, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_213c_14_ff, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2140_14_ff, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2148_14_ff, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2150_14_ff, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2158_14_ff, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2160_14_ff, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2168_14_ff, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2170_14_ff, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_2178_14_ff, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2179_14_ff, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217a_14_ff, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217b_14_ff, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_217c_14_ff, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2180_14_ff, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2188_14_ff, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2190_14_ff, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2198_14_ff, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a0_14_ff, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a8_14_ff, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b0_14_ff, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_21b8_14_ff, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b9_14_ff, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21ba_14_ff, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21bb_14_ff, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_21bc_14_ff, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c0_14_ff, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c8_14_ff, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d0_14_ff, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d8_14_ff, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e0_14_ff, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e8_14_ff, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f0_14_ff, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f8_14_ff, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f9_14_ff, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fa_14_ff, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fb_14_ff, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fc_14_ff, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c0_14_ff, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c8_14_ff, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d0_14_ff, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d8_14_ff, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e0_14_ff, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e8_14_ff, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f0_14_ff, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f8_14_ff, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f9_14_ff, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fa_14_ff, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fb_14_ff, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fc_14_ff, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3000_14_ff, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3008_14_ff, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3010_14_ff, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3018_14_ff, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3020_14_ff, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3028_14_ff, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3030_14_ff, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3038_14_ff, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3039_14_ff, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303a_14_ff, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303b_14_ff, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_303c_14_ff, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3040_14_ff, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3048_14_ff, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3050_14_ff, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3058_14_ff, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3060_14_ff, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3068_14_ff, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3070_14_ff, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3078_14_ff, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3079_14_ff, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307a_14_ff, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307b_14_ff, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307c_14_ff, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3080_14_ff, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3088_14_ff, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3090_14_ff, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3098_14_ff, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a0_14_ff, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a8_14_ff, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b0_14_ff, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b8_14_ff, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b9_14_ff, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30ba_14_ff, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bb_14_ff, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bc_14_ff, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c0_14_ff, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c8_14_ff, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d0_14_ff, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d8_14_ff, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e0_14_ff, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e8_14_ff, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f0_14_ff, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f8_14_ff, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f9_14_ff, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fa_14_ff, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fb_14_ff, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fc_14_ff, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3100_14_ff, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3108_14_ff, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3110_14_ff, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3118_14_ff, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3120_14_ff, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3128_14_ff, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3130_14_ff, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3138_14_ff, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3139_14_ff, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313a_14_ff, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313b_14_ff, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_313c_14_ff, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3140_14_ff, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3148_14_ff, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3150_14_ff, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3158_14_ff, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3160_14_ff, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3168_14_ff, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3170_14_ff, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_3178_14_ff, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3179_14_ff, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317a_14_ff, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317b_14_ff, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_317c_14_ff, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3180_14_ff, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3188_14_ff, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3190_14_ff, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3198_14_ff, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a0_14_ff, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a8_14_ff, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b0_14_ff, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_31b8_14_ff, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b9_14_ff, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31ba_14_ff, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31bb_14_ff, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ NULL, op_31bc_14_ff, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c0_14_ff, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c8_14_ff, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d0_14_ff, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d8_14_ff, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e0_14_ff, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e8_14_ff, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f0_14_ff, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f8_14_ff, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f9_14_ff, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fa_14_ff, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fb_14_ff, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fc_14_ff, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c0_14_ff, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c8_14_ff, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d0_14_ff, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d8_14_ff, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e0_14_ff, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e8_14_ff, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f0_14_ff, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f8_14_ff, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f9_14_ff, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fa_14_ff, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fb_14_ff, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fc_14_ff, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_4000_14_ff, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4010_14_ff, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4018_14_ff, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4020_14_ff, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4028_14_ff, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4030_14_ff, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ NULL, op_4038_14_ff, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4039_14_ff, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4040_14_ff, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4050_14_ff, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4058_14_ff, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4060_14_ff, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4068_14_ff, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4070_14_ff, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ NULL, op_4078_14_ff, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4079_14_ff, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4080_14_ff, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4090_14_ff, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4098_14_ff, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a0_14_ff, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a8_14_ff, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b0_14_ff, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b8_14_ff, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b9_14_ff, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40c0_14_ff, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d0_14_ff, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d8_14_ff, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e0_14_ff, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e8_14_ff, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f0_14_ff, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f8_14_ff, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f9_14_ff, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_4180_14_ff, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4190_14_ff, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4198_14_ff, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a0_14_ff, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a8_14_ff, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b0_14_ff, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ NULL, op_41b8_14_ff, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b9_14_ff, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41ba_14_ff, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41bb_14_ff, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ NULL, op_41bc_14_ff, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41d0_14_ff, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41e8_14_ff, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f0_14_ff, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ NULL, op_41f8_14_ff, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f9_14_ff, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fa_14_ff, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fb_14_ff, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ NULL, op_4200_14_ff, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4210_14_ff, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4218_14_ff, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4220_14_ff, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4228_14_ff, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4230_14_ff, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ NULL, op_4238_14_ff, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4239_14_ff, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4240_14_ff, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4250_14_ff, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4258_14_ff, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4260_14_ff, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4268_14_ff, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4270_14_ff, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ NULL, op_4278_14_ff, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4279_14_ff, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4280_14_ff, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4290_14_ff, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4298_14_ff, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a0_14_ff, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a8_14_ff, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b0_14_ff, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ NULL, op_42b8_14_ff, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b9_14_ff, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4400_14_ff, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4410_14_ff, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4418_14_ff, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4420_14_ff, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4428_14_ff, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4430_14_ff, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ NULL, op_4438_14_ff, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4439_14_ff, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4440_14_ff, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4450_14_ff, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4458_14_ff, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4460_14_ff, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4468_14_ff, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4470_14_ff, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ NULL, op_4478_14_ff, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4479_14_ff, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4480_14_ff, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4490_14_ff, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4498_14_ff, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a0_14_ff, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a8_14_ff, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b0_14_ff, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ NULL, op_44b8_14_ff, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b9_14_ff, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44c0_14_ff, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d0_14_ff, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d8_14_ff, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e0_14_ff, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e8_14_ff, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f0_14_ff, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f8_14_ff, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f9_14_ff, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fa_14_ff, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fb_14_ff, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fc_14_ff, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4600_14_ff, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4610_14_ff, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4618_14_ff, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4620_14_ff, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4628_14_ff, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4630_14_ff, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ NULL, op_4638_14_ff, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4639_14_ff, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4640_14_ff, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4650_14_ff, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4658_14_ff, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4660_14_ff, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4668_14_ff, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4670_14_ff, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ NULL, op_4678_14_ff, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4679_14_ff, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4680_14_ff, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4690_14_ff, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4698_14_ff, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a0_14_ff, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a8_14_ff, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b0_14_ff, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ NULL, op_46b8_14_ff, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b9_14_ff, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46c0_14_ff, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d0_14_ff, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d8_14_ff, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e0_14_ff, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e8_14_ff, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f0_14_ff, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f8_14_ff, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f9_14_ff, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fa_14_ff, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fb_14_ff, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fc_14_ff, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4800_14_ff, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4810_14_ff, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4818_14_ff, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4820_14_ff, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4828_14_ff, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4830_14_ff, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ NULL, op_4838_14_ff, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4839_14_ff, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4840_14_ff, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ NULL, op_4850_14_ff, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4868_14_ff, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4870_14_ff, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ NULL, op_4878_14_ff, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4879_14_ff, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487a_14_ff, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487b_14_ff, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ NULL, op_4880_14_ff, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_4890_14_ff, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a0_14_ff, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a8_14_ff, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b0_14_ff, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b8_14_ff, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b9_14_ff, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48c0_14_ff, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_48d0_14_ff, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e0_14_ff, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e8_14_ff, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f0_14_ff, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f8_14_ff, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f9_14_ff, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_4a00_14_ff, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a10_14_ff, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a18_14_ff, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a20_14_ff, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a28_14_ff, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a30_14_ff, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ NULL, op_4a38_14_ff, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a39_14_ff, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a40_14_ff, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a50_14_ff, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a58_14_ff, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a60_14_ff, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a68_14_ff, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a70_14_ff, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ NULL, op_4a78_14_ff, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a79_14_ff, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a80_14_ff, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a90_14_ff, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a98_14_ff, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa0_14_ff, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa8_14_ff, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab0_14_ff, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ NULL, op_4ab8_14_ff, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab9_14_ff, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ac0_14_ff, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad0_14_ff, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad8_14_ff, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae0_14_ff, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae8_14_ff, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af0_14_ff, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ NULL, op_4af8_14_ff, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af9_14_ff, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4c90_14_ff, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4c98_14_ff, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ca8_14_ff, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb0_14_ff, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb8_14_ff, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb9_14_ff, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cba_14_ff, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cbb_14_ff, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd0_14_ff, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd8_14_ff, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ce8_14_ff, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf0_14_ff, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf8_14_ff, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf9_14_ff, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfa_14_ff, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfb_14_ff, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4e40_13_ff, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ NULL, op_4e50_14_ff, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ NULL, op_4e58_14_ff, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ NULL, op_4e60_14_ff, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ NULL, op_4e68_14_ff, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ NULL, op_4e70_14_ff, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ NULL, op_4e71_14_ff, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ NULL, op_4e72_14_ff, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ NULL, op_4e73_14_ff, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ NULL, op_4e75_14_ff, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ NULL, op_4e76_14_ff, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ NULL, op_4e77_14_ff, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ NULL, op_4e90_14_ff, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ NULL, op_4ea8_14_ff, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb0_14_ff, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4eb8_14_ff, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb9_14_ff, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ NULL, op_4eba_14_ff, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4ebb_14_ff, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4ed0_14_ff, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ NULL, op_4ee8_14_ff, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef0_14_ff, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_4ef8_14_ff, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef9_14_ff, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ NULL, op_4efa_14_ff, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4efb_14_ff, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_5000_14_ff, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5010_14_ff, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5018_14_ff, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5020_14_ff, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5028_14_ff, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5030_14_ff, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_5038_14_ff, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5039_14_ff, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5040_14_ff, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5048_14_ff, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5050_14_ff, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5058_14_ff, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5060_14_ff, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5068_14_ff, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5070_14_ff, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_5078_14_ff, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5079_14_ff, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5080_14_ff, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5088_14_ff, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5090_14_ff, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5098_14_ff, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a0_14_ff, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a8_14_ff, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b0_14_ff, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_50b8_14_ff, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b9_14_ff, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50c0_14_ff, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50c8_14_ff, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_50d0_14_ff, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50d8_14_ff, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e0_14_ff, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e8_14_ff, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f0_14_ff, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_50f8_14_ff, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f9_14_ff, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5100_14_ff, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5110_14_ff, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5118_14_ff, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5120_14_ff, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5128_14_ff, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5130_14_ff, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_5138_14_ff, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5139_14_ff, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5140_14_ff, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5148_14_ff, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5150_14_ff, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5158_14_ff, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5160_14_ff, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5168_14_ff, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5170_14_ff, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_5178_14_ff, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5179_14_ff, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5180_14_ff, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5188_14_ff, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5190_14_ff, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5198_14_ff, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a0_14_ff, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a8_14_ff, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b0_14_ff, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_51b8_14_ff, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b9_14_ff, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51c0_14_ff, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51c8_14_ff, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_51d0_14_ff, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51d8_14_ff, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e0_14_ff, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e8_14_ff, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f0_14_ff, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_51f8_14_ff, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f9_14_ff, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52c0_14_ff, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52c8_14_ff, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_52d0_14_ff, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52d8_14_ff, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e0_14_ff, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e8_14_ff, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f0_14_ff, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_52f8_14_ff, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f9_14_ff, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53c0_14_ff, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53c8_14_ff, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_53d0_14_ff, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53d8_14_ff, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e0_14_ff, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e8_14_ff, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f0_14_ff, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_53f8_14_ff, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f9_14_ff, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54c0_14_ff, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54c8_14_ff, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_54d0_14_ff, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54d8_14_ff, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e0_14_ff, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e8_14_ff, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f0_14_ff, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_54f8_14_ff, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f9_14_ff, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55c0_14_ff, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55c8_14_ff, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_55d0_14_ff, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55d8_14_ff, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e0_14_ff, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e8_14_ff, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f0_14_ff, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_55f8_14_ff, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f9_14_ff, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56c0_14_ff, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56c8_14_ff, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_56d0_14_ff, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56d8_14_ff, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e0_14_ff, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e8_14_ff, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f0_14_ff, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_56f8_14_ff, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f9_14_ff, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57c0_14_ff, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57c8_14_ff, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_57d0_14_ff, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57d8_14_ff, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e0_14_ff, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e8_14_ff, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f0_14_ff, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_57f8_14_ff, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f9_14_ff, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58c0_14_ff, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58c8_14_ff, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_58d0_14_ff, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58d8_14_ff, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e0_14_ff, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e8_14_ff, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f0_14_ff, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_58f8_14_ff, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f9_14_ff, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59c0_14_ff, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59c8_14_ff, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_59d0_14_ff, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59d8_14_ff, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e0_14_ff, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e8_14_ff, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f0_14_ff, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_59f8_14_ff, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f9_14_ff, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ac0_14_ff, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ac8_14_ff, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ad0_14_ff, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ad8_14_ff, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae0_14_ff, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae8_14_ff, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af0_14_ff, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5af8_14_ff, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af9_14_ff, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bc0_14_ff, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bc8_14_ff, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5bd0_14_ff, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bd8_14_ff, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be0_14_ff, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be8_14_ff, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf0_14_ff, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf8_14_ff, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf9_14_ff, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cc0_14_ff, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cc8_14_ff, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5cd0_14_ff, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cd8_14_ff, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce0_14_ff, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce8_14_ff, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf0_14_ff, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf8_14_ff, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf9_14_ff, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dc0_14_ff, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dc8_14_ff, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5dd0_14_ff, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dd8_14_ff, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de0_14_ff, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de8_14_ff, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df0_14_ff, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5df8_14_ff, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df9_14_ff, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ec0_14_ff, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ec8_14_ff, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ed0_14_ff, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ed8_14_ff, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee0_14_ff, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee8_14_ff, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef0_14_ff, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef8_14_ff, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef9_14_ff, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fc0_14_ff, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fc8_14_ff, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5fd0_14_ff, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fd8_14_ff, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe0_14_ff, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe8_14_ff, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff0_14_ff, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff8_14_ff, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff9_14_ff, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_6000_14_ff, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6001_14_ff, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_60ff_14_ff, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6100_14_ff, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ NULL, op_6101_14_ff, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ NULL, op_61ff_14_ff, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ NULL, op_6200_14_ff, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6201_14_ff, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_62ff_14_ff, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6300_14_ff, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6301_14_ff, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_63ff_14_ff, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6400_14_ff, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6401_14_ff, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_64ff_14_ff, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6500_14_ff, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6501_14_ff, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_65ff_14_ff, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6600_14_ff, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6601_14_ff, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_66ff_14_ff, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6700_14_ff, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6701_14_ff, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_67ff_14_ff, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6800_14_ff, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6801_14_ff, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_68ff_14_ff, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6900_14_ff, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6901_14_ff, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_69ff_14_ff, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6a00_14_ff, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6a01_14_ff, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6aff_14_ff, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6b00_14_ff, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6b01_14_ff, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6bff_14_ff, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6c00_14_ff, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6c01_14_ff, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6cff_14_ff, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6d00_14_ff, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6d01_14_ff, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6dff_14_ff, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6e00_14_ff, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6e01_14_ff, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6eff_14_ff, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_6f00_14_ff, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6f01_14_ff, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6fff_14_ff, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ NULL, op_7000_14_ff, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_8000_14_ff, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8010_14_ff, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8018_14_ff, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8020_14_ff, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8028_14_ff, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8030_14_ff, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_8038_14_ff, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8039_14_ff, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803a_14_ff, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803b_14_ff, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_803c_14_ff, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8040_14_ff, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8050_14_ff, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8058_14_ff, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8060_14_ff, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8068_14_ff, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8070_14_ff, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_8078_14_ff, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8079_14_ff, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807a_14_ff, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807b_14_ff, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_807c_14_ff, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8080_14_ff, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8090_14_ff, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8098_14_ff, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a0_14_ff, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a8_14_ff, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b0_14_ff, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_80b8_14_ff, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b9_14_ff, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80ba_14_ff, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80bb_14_ff, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_80bc_14_ff, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80c0_14_ff, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d0_14_ff, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d8_14_ff, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e0_14_ff, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e8_14_ff, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f0_14_ff, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f8_14_ff, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f9_14_ff, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fa_14_ff, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fb_14_ff, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fc_14_ff, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_8100_14_ff, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8108_14_ff, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8110_14_ff, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8118_14_ff, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8120_14_ff, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8128_14_ff, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8130_14_ff, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_8138_14_ff, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8139_14_ff, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8150_14_ff, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8158_14_ff, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8160_14_ff, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8168_14_ff, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8170_14_ff, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_8178_14_ff, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8179_14_ff, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8190_14_ff, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8198_14_ff, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a0_14_ff, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a8_14_ff, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b0_14_ff, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ NULL, op_81b8_14_ff, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b9_14_ff, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81c0_14_ff, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d0_14_ff, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d8_14_ff, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e0_14_ff, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e8_14_ff, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f0_14_ff, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f8_14_ff, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f9_14_ff, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fa_14_ff, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fb_14_ff, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fc_14_ff, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_9000_14_ff, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9010_14_ff, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9018_14_ff, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9020_14_ff, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9028_14_ff, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9030_14_ff, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_9038_14_ff, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9039_14_ff, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903a_14_ff, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903b_14_ff, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_903c_14_ff, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9040_14_ff, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9048_14_ff, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9050_14_ff, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9058_14_ff, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9060_14_ff, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9068_14_ff, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9070_14_ff, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_9078_14_ff, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9079_14_ff, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907a_14_ff, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907b_14_ff, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_907c_14_ff, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9080_14_ff, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9088_14_ff, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9090_14_ff, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9098_14_ff, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a0_14_ff, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a8_14_ff, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b0_14_ff, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_90b8_14_ff, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b9_14_ff, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90ba_14_ff, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90bb_14_ff, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_90bc_14_ff, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90c0_14_ff, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90c8_14_ff, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d0_14_ff, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d8_14_ff, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e0_14_ff, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e8_14_ff, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f0_14_ff, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f8_14_ff, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f9_14_ff, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fa_14_ff, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fb_14_ff, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fc_14_ff, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_9100_14_ff, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9108_14_ff, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9110_14_ff, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9118_14_ff, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9120_14_ff, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9128_14_ff, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9130_14_ff, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_9138_14_ff, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9139_14_ff, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9140_14_ff, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9148_14_ff, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9150_14_ff, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9158_14_ff, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9160_14_ff, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9168_14_ff, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9170_14_ff, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_9178_14_ff, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9179_14_ff, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9180_14_ff, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9188_14_ff, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9190_14_ff, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9198_14_ff, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a0_14_ff, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a8_14_ff, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b0_14_ff, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ NULL, op_91b8_14_ff, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b9_14_ff, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91c0_14_ff, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91c8_14_ff, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d0_14_ff, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d8_14_ff, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e0_14_ff, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e8_14_ff, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f0_14_ff, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f8_14_ff, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f9_14_ff, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fa_14_ff, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fb_14_ff, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fc_14_ff, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_b000_14_ff, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b010_14_ff, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b018_14_ff, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b020_14_ff, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b028_14_ff, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b030_14_ff, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b038_14_ff, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b039_14_ff, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03a_14_ff, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03b_14_ff, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b03c_14_ff, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b040_14_ff, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b048_14_ff, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b050_14_ff, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b058_14_ff, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b060_14_ff, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b068_14_ff, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b070_14_ff, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b078_14_ff, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b079_14_ff, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07a_14_ff, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07b_14_ff, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b07c_14_ff, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b080_14_ff, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b088_14_ff, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b090_14_ff, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b098_14_ff, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a0_14_ff, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a8_14_ff, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b0_14_ff, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b8_14_ff, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b9_14_ff, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0ba_14_ff, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bb_14_ff, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bc_14_ff, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0c0_14_ff, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0c8_14_ff, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d0_14_ff, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d8_14_ff, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e0_14_ff, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e8_14_ff, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f0_14_ff, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f8_14_ff, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f9_14_ff, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fa_14_ff, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fb_14_ff, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fc_14_ff, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b100_14_ff, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b108_14_ff, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b110_14_ff, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b118_14_ff, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b120_14_ff, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b128_14_ff, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b130_14_ff, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_b138_14_ff, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b139_14_ff, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b140_14_ff, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b148_14_ff, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b150_14_ff, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b158_14_ff, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b160_14_ff, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b168_14_ff, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b170_14_ff, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_b178_14_ff, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b179_14_ff, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b180_14_ff, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b188_14_ff, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b190_14_ff, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b198_14_ff, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a0_14_ff, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a8_14_ff, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b0_14_ff, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b8_14_ff, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b9_14_ff, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1c0_14_ff, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1c8_14_ff, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d0_14_ff, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d8_14_ff, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e0_14_ff, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e8_14_ff, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f0_14_ff, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f8_14_ff, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f9_14_ff, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fa_14_ff, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fb_14_ff, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fc_14_ff, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_c000_14_ff, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c010_14_ff, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c018_14_ff, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c020_14_ff, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c028_14_ff, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c030_14_ff, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c038_14_ff, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c039_14_ff, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03a_14_ff, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03b_14_ff, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c03c_14_ff, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c040_14_ff, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c050_14_ff, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c058_14_ff, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c060_14_ff, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c068_14_ff, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c070_14_ff, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c078_14_ff, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c079_14_ff, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07a_14_ff, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07b_14_ff, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c07c_14_ff, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c080_14_ff, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c090_14_ff, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c098_14_ff, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a0_14_ff, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a8_14_ff, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b0_14_ff, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c0b8_14_ff, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b9_14_ff, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0ba_14_ff, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0bb_14_ff, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c0bc_14_ff, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0c0_14_ff, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d0_14_ff, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d8_14_ff, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e0_14_ff, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e8_14_ff, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f0_14_ff, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f8_14_ff, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f9_14_ff, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fa_14_ff, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fb_14_ff, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fc_14_ff, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c100_14_ff, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c108_14_ff, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c110_14_ff, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c118_14_ff, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c120_14_ff, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c128_14_ff, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c130_14_ff, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c138_14_ff, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c139_14_ff, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c140_14_ff, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c148_14_ff, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c150_14_ff, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c158_14_ff, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c160_14_ff, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c168_14_ff, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c170_14_ff, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c178_14_ff, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c179_14_ff, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c188_14_ff, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c190_14_ff, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c198_14_ff, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a0_14_ff, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a8_14_ff, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b0_14_ff, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ NULL, op_c1b8_14_ff, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b9_14_ff, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1c0_14_ff, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d0_14_ff, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d8_14_ff, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e0_14_ff, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e8_14_ff, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f0_14_ff, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f8_14_ff, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f9_14_ff, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fa_14_ff, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fb_14_ff, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fc_14_ff, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_d000_14_ff, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d010_14_ff, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d018_14_ff, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d020_14_ff, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d028_14_ff, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d030_14_ff, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d038_14_ff, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d039_14_ff, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03a_14_ff, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03b_14_ff, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d03c_14_ff, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d040_14_ff, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d048_14_ff, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d050_14_ff, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d058_14_ff, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d060_14_ff, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d068_14_ff, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d070_14_ff, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d078_14_ff, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d079_14_ff, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07a_14_ff, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07b_14_ff, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d07c_14_ff, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d080_14_ff, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d088_14_ff, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d090_14_ff, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d098_14_ff, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a0_14_ff, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a8_14_ff, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b0_14_ff, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b8_14_ff, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b9_14_ff, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0ba_14_ff, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bb_14_ff, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bc_14_ff, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0c0_14_ff, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0c8_14_ff, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d0_14_ff, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d8_14_ff, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e0_14_ff, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e8_14_ff, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f0_14_ff, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f8_14_ff, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f9_14_ff, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fa_14_ff, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fb_14_ff, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fc_14_ff, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d100_14_ff, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d108_14_ff, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d110_14_ff, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d118_14_ff, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d120_14_ff, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d128_14_ff, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d130_14_ff, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d138_14_ff, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d139_14_ff, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d140_14_ff, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d148_14_ff, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d150_14_ff, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d158_14_ff, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d160_14_ff, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d168_14_ff, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d170_14_ff, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d178_14_ff, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d179_14_ff, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d180_14_ff, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d188_14_ff, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d190_14_ff, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d198_14_ff, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a0_14_ff, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a8_14_ff, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b0_14_ff, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b8_14_ff, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b9_14_ff, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1c0_14_ff, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1c8_14_ff, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d0_14_ff, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d8_14_ff, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e0_14_ff, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e8_14_ff, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f0_14_ff, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f8_14_ff, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f9_14_ff, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fa_14_ff, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fb_14_ff, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fc_14_ff, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_e000_14_ff, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e008_14_ff, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e010_14_ff, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e018_14_ff, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e020_14_ff, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e028_14_ff, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e030_14_ff, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e038_14_ff, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e040_14_ff, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e048_14_ff, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e050_14_ff, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e058_14_ff, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e060_14_ff, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e068_14_ff, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e070_14_ff, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e078_14_ff, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e080_14_ff, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e088_14_ff, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e090_14_ff, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e098_14_ff, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0a0_14_ff, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e0a8_14_ff, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e0b0_14_ff, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e0b8_14_ff, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0d0_14_ff, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0d8_14_ff, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e0_14_ff, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e8_14_ff, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f0_14_ff, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f8_14_ff, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f9_14_ff, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e100_14_ff, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e108_14_ff, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e110_14_ff, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e118_14_ff, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e120_14_ff, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e128_14_ff, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e130_14_ff, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e138_14_ff, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e140_14_ff, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e148_14_ff, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e150_14_ff, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e158_14_ff, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e160_14_ff, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e168_14_ff, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e170_14_ff, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e178_14_ff, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e180_14_ff, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e188_14_ff, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e190_14_ff, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e198_14_ff, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1a0_14_ff, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e1a8_14_ff, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e1b0_14_ff, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e1b8_14_ff, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1d0_14_ff, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1d8_14_ff, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e0_14_ff, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e8_14_ff, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f0_14_ff, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f8_14_ff, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f9_14_ff, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e2d0_14_ff, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2d8_14_ff, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e0_14_ff, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e8_14_ff, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f0_14_ff, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f8_14_ff, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f9_14_ff, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e3d0_14_ff, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3d8_14_ff, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e0_14_ff, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e8_14_ff, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f0_14_ff, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f8_14_ff, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f9_14_ff, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e4d0_14_ff, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4d8_14_ff, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e0_14_ff, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e8_14_ff, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f0_14_ff, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f8_14_ff, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f9_14_ff, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e5d0_14_ff, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5d8_14_ff, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e0_14_ff, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e8_14_ff, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f0_14_ff, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f8_14_ff, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f9_14_ff, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e6d0_14_ff, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6d8_14_ff, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e0_14_ff, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e8_14_ff, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f0_14_ff, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f8_14_ff, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f9_14_ff, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e7d0_14_ff, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7d8_14_ff, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e0_14_ff, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e8_14_ff, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f0_14_ff, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f8_14_ff, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f9_14_ff, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#ifdef CPUEMU_20 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_20[] = { +{ op_0000_20_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_20_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_20_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_20_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_20_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_20_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_20_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_20_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_20_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_20_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_20_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_20_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_20_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_20_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_20_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_20_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_20_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_20_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_20_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_20_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_20_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_20_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_20_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_20_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_20_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_20_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_00d0_20_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00e8_20_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f0_20_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f8_20_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f9_20_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fa_20_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fb_20_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0100_20_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_20_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_20_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_20_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_20_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_20_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_20_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_20_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_20_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_20_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_20_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_20_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_20_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_20_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_20_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_20_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_20_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_20_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_20_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_20_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_20_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_20_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_20_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_20_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_20_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_20_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_20_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_20_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_20_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_20_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_20_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_20_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_20_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_20_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_20_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_20_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_20_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_20_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_20_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_20_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_20_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_20_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_20_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_20_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_20_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_20_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_20_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_20_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_20_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_20_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_20_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_20_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_20_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_20_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_20_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_20_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_20_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_20_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_20_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_20_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_20_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_20_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_20_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_20_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_20_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ op_02d0_20_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02e8_20_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f0_20_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f8_20_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f9_20_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fa_20_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fb_20_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0400_20_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_20_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_20_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_20_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_20_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_20_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_20_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_20_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_20_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_20_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_20_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_20_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_20_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_20_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_20_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_20_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_20_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_20_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_20_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_20_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_20_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_20_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_20_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_20_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ op_04d0_20_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04e8_20_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f0_20_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f8_20_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f9_20_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fa_20_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fb_20_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0600_20_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_20_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_20_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_20_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_20_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_20_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_20_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_20_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_20_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_20_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_20_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_20_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_20_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_20_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_20_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_20_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_20_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_20_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_20_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_20_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_20_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_20_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_20_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_20_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ op_06c0_20_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06c8_20_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06d0_20_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06e8_20_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f0_20_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f8_20_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f9_20_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fa_20_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fb_20_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ op_0800_20_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_20_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_20_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_20_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_20_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_20_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_20_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_20_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_20_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_20_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_20_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_20_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_20_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_20_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_20_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_20_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_20_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_20_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_20_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_20_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_20_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_20_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_20_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_20_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_20_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_20_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_20_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_20_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_20_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_20_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_20_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_20_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_20_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_20_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_20_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_20_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_20_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_20_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_20_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_20_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_20_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_20_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_20_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_20_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_20_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_20_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_20_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_20_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_20_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_20_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_20_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_20_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_20_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_20_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_20_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_20_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_20_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_20_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_20_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_20_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_20_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_20_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_20_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_20_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_20_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_20_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_20_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_20_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_20_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_20_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_20_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_20_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_20_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_20_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_20_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c3a_20_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c3b_20_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c40_20_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_20_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_20_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_20_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_20_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_20_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_20_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_20_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c7a_20_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c7b_20_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c80_20_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_20_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_20_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_20_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_20_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_20_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_20_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_20_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cba_20_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cbb_20_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_20_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_20_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_20_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_20_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_20_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_20_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_20_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_20_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_20_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_20_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_20_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_20_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_20_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_20_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_20_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_20_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_20_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_20_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_20_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_20_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_20_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_20_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_20_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_20_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_20_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_20_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_20_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_20_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_20_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_20_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_20_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_20_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_20_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_20_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_20_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_20_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_20_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_20_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_20_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_20_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_20_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_20_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_20_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_20_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_20_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_20_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_20_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_20_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_20_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_20_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_20_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_20_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_20_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_20_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_20_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_20_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_20_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_20_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_20_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_20_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_20_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_20_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_20_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_20_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_20_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_20_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_20_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_20_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_20_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_20_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_20_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_20_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_20_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_20_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_20_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_20_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_20_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_20_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_20_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_20_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_20_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_20_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_20_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_20_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_20_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_20_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_20_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_20_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_20_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_20_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_20_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_20_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_20_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_20_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_20_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_20_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_20_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_20_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_20_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_20_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_20_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_20_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_20_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_20_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_20_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_20_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_20_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_20_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_20_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_20_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_20_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_20_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_20_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_20_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_20_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_20_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_20_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_20_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_20_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_20_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_20_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_20_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_20_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_20_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_20_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_20_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_20_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_20_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_20_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_20_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_20_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_20_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_20_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_20_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_20_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_20_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_20_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_20_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_20_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_20_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_20_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_20_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_20_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_20_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_20_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_20_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_20_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_20_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_20_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_20_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_20_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_20_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_20_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_20_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_20_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_20_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_20_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_20_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_20_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_20_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_20_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_20_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_20_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_20_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_20_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_20_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_20_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_20_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_20_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_20_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_20_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_20_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_20_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_20_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_20_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_20_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_20_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_20_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_20_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_20_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_20_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_20_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_20_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_20_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_20_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_20_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_20_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_20_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_20_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_20_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_20_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_20_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_20_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_20_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_20_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_20_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_20_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_20_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_20_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_20_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_20_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_20_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_20_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_20_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_20_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_20_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_20_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_20_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_20_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_20_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_20_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_20_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_20_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_20_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_20_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_20_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_20_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_20_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_20_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_20_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_20_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_20_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_20_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_20_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_20_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_20_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_20_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_20_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_20_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_20_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_20_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_20_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_20_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_20_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_20_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_20_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_20_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_20_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_20_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_20_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_20_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_20_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_20_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_20_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_20_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_20_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_20_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_20_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_20_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_20_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_20_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_20_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_20_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_20_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_20_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_20_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_20_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_20_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_20_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_20_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_20_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_20_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_20_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_20_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_20_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_20_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_20_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_20_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_20_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_20_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_20_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_20_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_20_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_20_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_20_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_20_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_20_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_20_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_20_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_20_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_20_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_20_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_20_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_20_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_20_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_20_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_20_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_20_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_20_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_20_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_20_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_20_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_20_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_20_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_20_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_20_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_20_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_20_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_20_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_20_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_20_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_20_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_20_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_20_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_20_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_20_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_20_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_20_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_20_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_20_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_20_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_20_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_20_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_20_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_20_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_20_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_20_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_20_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_20_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_20_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_20_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_20_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_20_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_20_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_20_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_20_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_20_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_20_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_20_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_20_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_20_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_20_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_20_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_20_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_20_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_20_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_20_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_20_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_20_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_20_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_20_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_20_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_20_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_20_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_20_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_20_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_20_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_20_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_20_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_20_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_20_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_20_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_20_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_20_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_20_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_20_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_20_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_20_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_20_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_20_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_20_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_20_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_20_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_20_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_20_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_20_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_20_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_20_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_20_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_20_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_20_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_20_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_20_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4100_20_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4110_20_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4118_20_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4120_20_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4128_20_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4130_20_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4138_20_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4139_20_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413a_20_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413b_20_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413c_20_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ op_4180_20_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_20_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_20_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_20_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_20_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_20_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_20_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_20_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_20_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_20_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_20_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_20_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_20_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_20_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_20_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_20_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_20_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_20_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_20_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_20_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_20_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_20_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_20_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_20_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_20_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_20_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_20_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_20_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_20_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_20_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_20_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_20_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_20_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_20_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_20_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_20_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_20_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_20_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_20_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_20_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_20_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_20_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_20_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_20_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_20_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_20_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_20_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_20_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_20_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_20_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_20_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_20_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_20_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_20_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_20_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_20_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_20_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_20_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_20_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_20_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_20_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_20_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_20_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_20_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_20_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_20_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_20_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_20_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_20_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_20_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_20_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_20_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_20_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_20_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_20_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_20_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_20_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_20_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_20_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_20_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_20_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_20_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_20_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_20_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_20_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_20_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_20_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_20_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_20_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_20_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_20_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_20_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_20_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_20_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_20_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_20_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_20_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_20_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_20_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_20_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_20_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_20_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_20_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_20_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_20_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_20_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_20_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_20_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_20_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_20_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_20_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_20_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_20_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_20_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_20_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_20_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_20_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_20_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_20_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_20_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_20_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_20_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_20_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_20_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_20_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_20_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_20_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_20_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_20_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_20_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_20_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_20_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_20_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_20_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_20_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_20_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_20_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_20_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_20_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_20_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_20_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_20_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_20_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_20_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_20_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_20_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_20_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_20_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_20_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_20_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_20_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_20_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ op_49c0_20_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ op_4a00_20_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_20_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_20_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_20_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_20_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_20_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_20_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_20_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a3a_20_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3b_20_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3c_20_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a40_20_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a48_20_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a50_20_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_20_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_20_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_20_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_20_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_20_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_20_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a7a_20_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7b_20_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7c_20_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a80_20_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a88_20_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a90_20_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_20_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_20_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_20_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_20_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_20_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_20_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4aba_20_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abb_20_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abc_20_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4ac0_20_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_20_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_20_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_20_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_20_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_20_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_20_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_20_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4c00_20_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c10_20_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c18_20_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c20_20_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c28_20_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c30_20_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c38_20_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c39_20_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3a_20_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3b_20_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3c_20_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c40_20_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c50_20_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c58_20_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c60_20_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c68_20_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c70_20_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c78_20_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c79_20_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7a_20_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7b_20_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7c_20_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ op_4c90_20_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_20_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_20_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_20_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_20_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_20_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_20_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_20_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_20_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_20_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_20_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_20_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_20_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_20_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_20_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_20_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_20_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_20_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_20_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_20_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_20_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_20_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_20_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_20_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_20_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_20_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_20_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_20_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_20_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_20_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_20_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_20_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_20_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_20_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_20_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_20_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_20_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_20_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_20_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_20_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_20_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_20_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_20_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_20_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_20_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_20_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_20_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_20_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_20_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_20_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_20_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_20_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_20_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_20_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_20_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_20_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_20_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_20_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_20_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_20_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_20_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_20_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_20_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_20_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_20_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_20_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_20_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_20_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_20_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_20_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_20_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_20_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_20_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_20_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_20_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_20_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_20_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_20_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_20_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_20_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_50fa_20_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fb_20_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fc_20_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5100_20_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_20_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_20_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_20_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_20_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_20_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_20_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_20_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_20_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_20_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_20_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_20_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_20_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_20_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_20_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_20_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_20_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_20_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_20_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_20_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_20_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_20_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_20_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_20_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_20_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_20_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_20_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_20_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_20_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_20_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_20_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_20_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_20_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_20_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_20_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_51fa_20_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fb_20_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fc_20_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_52c0_20_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_20_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_20_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_20_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_20_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_20_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_20_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_20_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_20_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_52fa_20_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fb_20_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fc_20_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_53c0_20_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_20_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_20_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_20_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_20_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_20_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_20_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_20_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_20_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_53fa_20_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fb_20_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fc_20_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_54c0_20_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_20_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_20_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_20_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_20_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_20_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_20_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_20_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_20_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_54fa_20_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fb_20_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fc_20_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_55c0_20_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_20_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_20_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_20_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_20_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_20_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_20_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_20_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_20_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_55fa_20_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fb_20_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fc_20_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_56c0_20_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_20_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_20_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_20_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_20_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_20_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_20_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_20_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_20_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_56fa_20_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fb_20_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fc_20_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_57c0_20_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_20_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_20_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_20_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_20_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_20_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_20_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_20_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_20_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_57fa_20_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fb_20_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fc_20_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_58c0_20_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_20_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_20_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_20_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_20_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_20_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_20_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_20_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_20_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_58fa_20_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fb_20_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fc_20_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_59c0_20_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_20_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_20_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_20_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_20_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_20_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_20_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_20_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_20_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_59fa_20_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fb_20_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fc_20_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ac0_20_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_20_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_20_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_20_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_20_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_20_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_20_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_20_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_20_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5afa_20_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afb_20_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afc_20_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5bc0_20_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_20_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_20_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_20_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_20_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_20_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_20_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_20_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_20_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5bfa_20_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfb_20_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfc_20_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5cc0_20_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_20_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_20_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_20_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_20_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_20_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_20_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_20_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_20_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5cfa_20_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfb_20_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfc_20_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5dc0_20_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_20_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_20_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_20_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_20_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_20_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_20_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_20_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_20_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5dfa_20_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfb_20_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfc_20_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ec0_20_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_20_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_20_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_20_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_20_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_20_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_20_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_20_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_20_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5efa_20_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efb_20_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efc_20_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5fc0_20_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_20_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_20_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_20_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_20_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_20_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_20_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_20_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_20_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5ffa_20_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffb_20_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffc_20_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_6000_20_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_20_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_20_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_20_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_20_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_20_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_20_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_20_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_20_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_20_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_20_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_20_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_20_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_20_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_20_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_20_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_20_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_20_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_20_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_20_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_20_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_20_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_20_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_20_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_20_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_20_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_20_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_20_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_20_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_20_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_20_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_20_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_20_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_20_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_20_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_20_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_20_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_20_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_20_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_20_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_20_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_20_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_20_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_20_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_20_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_20_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_20_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_20_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_20_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_20_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_20_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_20_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_20_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_20_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_20_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_20_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_20_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_20_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_20_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_20_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_20_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_20_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_20_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_20_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_20_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_20_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_20_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_20_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_20_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_20_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_20_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_20_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_20_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_20_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_20_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_20_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_20_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_20_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_20_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_20_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_20_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_20_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_20_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_20_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_20_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_20_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_20_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_20_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_20_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_20_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_20_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_20_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_20_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_20_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_20_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_20_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_20_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_20_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_20_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_20_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_20_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_20_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8140_20_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8148_20_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ op_8150_20_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_20_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_20_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_20_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_20_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_20_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_20_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8180_20_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8188_20_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ op_8190_20_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_20_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_20_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_20_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_20_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_20_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_20_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_20_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_20_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_20_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_20_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_20_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_20_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_20_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_20_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_20_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_20_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_20_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_20_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_20_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_20_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_20_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_20_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_20_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_20_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_20_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_20_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_20_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_20_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_20_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_20_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_20_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_20_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_20_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_20_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_20_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_20_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_20_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_20_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_20_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_20_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_20_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_20_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_20_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_20_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_20_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_20_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_20_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_20_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_20_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_20_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_20_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_20_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_20_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_20_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_20_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_20_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_20_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_20_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_20_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_20_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_20_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_20_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_20_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_20_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_20_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_20_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_20_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_20_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_20_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_20_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_20_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_20_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_20_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_20_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_20_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_20_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_20_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_20_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_20_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_20_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_20_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_20_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_20_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_20_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_20_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_20_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_20_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_20_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_20_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_20_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_20_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_20_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_20_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_20_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_20_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_20_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_20_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_20_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_20_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_20_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_20_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_20_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_20_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_20_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_20_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_20_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_20_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_20_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_20_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_20_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_20_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_20_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_20_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_20_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_20_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_20_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_20_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_20_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_20_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_20_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_20_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_20_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_20_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_20_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_20_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_20_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_20_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_20_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_20_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_20_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_20_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_20_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_20_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_20_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_20_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_20_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_20_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_20_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_20_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_20_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_20_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_20_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_20_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_20_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_20_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_20_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_20_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_20_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_20_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_20_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_20_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_20_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_20_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_20_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_20_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_20_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_20_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_20_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_20_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_20_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_20_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_20_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_20_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_20_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_20_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_20_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_20_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_20_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_20_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_20_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_20_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_20_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_20_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_20_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_20_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_20_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_20_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_20_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_20_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_20_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_20_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_20_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_20_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_20_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_20_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_20_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_20_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_20_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_20_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_20_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_20_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_20_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_20_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_20_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_20_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_20_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_20_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_20_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_20_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_20_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_20_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_20_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_20_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_20_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_20_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_20_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_20_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_20_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_20_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_20_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_20_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_20_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_20_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_20_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_20_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_20_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_20_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_20_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_20_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_20_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_20_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_20_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_20_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_20_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_20_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_20_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_20_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_20_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_20_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_20_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_20_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_20_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_20_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_20_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_20_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_20_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_20_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_20_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_20_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_20_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_20_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_20_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_20_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_20_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_20_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_20_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_20_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_20_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_20_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_20_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_20_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_20_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_20_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_20_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_20_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_20_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_20_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_20_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_20_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_20_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_20_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_20_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_20_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_20_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_20_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_20_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_20_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_20_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_20_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_20_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_20_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_20_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_20_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_20_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_20_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_20_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_20_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_20_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_20_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_20_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_20_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_20_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_20_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_20_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_20_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_20_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_20_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_20_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_20_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_20_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_20_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_20_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_20_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_20_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_20_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_20_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_20_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_20_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_20_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_20_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_20_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_20_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_20_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_20_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_20_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_20_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_20_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_20_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_20_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_20_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_20_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_20_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_20_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_20_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_20_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_20_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_20_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_20_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_20_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_20_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_20_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_20_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_20_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_20_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_20_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_20_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_20_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_20_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_20_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_20_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_20_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_20_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_20_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_20_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_20_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_20_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_20_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_20_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_20_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_20_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_20_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_20_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_20_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_20_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_20_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_20_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_20_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_20_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_20_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_20_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_20_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_20_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_20_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_20_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_20_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_20_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_20_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_20_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_20_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_20_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_20_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_20_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_20_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_20_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_20_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_20_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_20_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_20_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_20_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_20_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_20_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_20_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_20_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_20_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_20_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_20_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_20_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_20_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_20_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_20_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_20_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_20_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_20_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_20_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_20_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_20_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_20_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_20_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_20_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_20_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_20_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_20_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_20_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_20_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_20_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_20_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_20_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_20_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_20_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_20_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_20_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_20_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_20_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_20_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_20_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_20_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_20_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_20_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_20_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_20_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_20_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_20_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_20_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_20_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_20_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_20_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_20_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_20_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_20_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_20_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_20_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_20_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_20_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_20_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_20_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_20_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_20_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_20_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_20_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_20_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_20_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_20_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_20_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_20_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_20_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_20_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_20_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_20_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_20_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_20_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_20_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_20_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_20_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_20_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_20_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_20_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_20_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_20_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_20_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_20_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_20_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_20_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_20_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_20_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_20_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_20_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_20_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_20_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_20_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_20_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ op_e8c0_20_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8d0_20_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8e8_20_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f0_20_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f8_20_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f9_20_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fa_20_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fb_20_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9c0_20_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9d0_20_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9e8_20_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f0_20_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f8_20_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f9_20_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fa_20_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fb_20_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eac0_20_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ead0_20_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eae8_20_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf0_20_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf8_20_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf9_20_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebc0_20_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebd0_20_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebe8_20_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf0_20_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf8_20_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf9_20_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfa_20_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfb_20_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecc0_20_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecd0_20_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ece8_20_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf0_20_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf8_20_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf9_20_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edc0_20_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edd0_20_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ede8_20_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf0_20_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf8_20_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf9_20_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfa_20_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfb_20_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eec0_20_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eed0_20_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eee8_20_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef0_20_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef8_20_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef9_20_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efc0_20_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efd0_20_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efe8_20_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff0_20_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff8_20_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff9_20_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f200_20_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f208_20_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f210_20_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f218_20_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f220_20_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f228_20_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f230_20_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f238_20_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f239_20_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23a_20_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23b_20_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23c_20_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f240_20_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f248_20_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f250_20_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f258_20_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f260_20_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f268_20_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f270_20_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f278_20_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f279_20_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27a_20_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27b_20_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27c_20_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f280_20_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f2c0_20_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f310_20_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f320_20_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f328_20_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f330_20_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f338_20_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f339_20_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f350_20_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f358_20_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f368_20_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f370_20_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f378_20_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f379_20_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37a_20_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37b_20_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_20 */ +#ifdef CPUEMU_21 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_21[] = { +{ NULL, op_0000_21_ff, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0010_21_ff, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0018_21_ff, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0020_21_ff, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0028_21_ff, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0030_21_ff, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0038_21_ff, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0039_21_ff, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_003c_21_ff, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0040_21_ff, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0050_21_ff, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0058_21_ff, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0060_21_ff, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0068_21_ff, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0070_21_ff, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0078_21_ff, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0079_21_ff, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_007c_21_ff, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0080_21_ff, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0090_21_ff, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0098_21_ff, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a0_21_ff, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a8_21_ff, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b0_21_ff, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_00b8_21_ff, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b9_21_ff, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00d0_21_ff, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00e8_21_ff, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f0_21_ff, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f8_21_ff, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f9_21_ff, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00fa_21_ff, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00fb_21_ff, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0100_21_ff, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0108_21_ff, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0110_21_ff, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0118_21_ff, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0120_21_ff, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0128_21_ff, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0130_21_ff, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0138_21_ff, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0139_21_ff, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013a_21_ff, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013b_21_ff, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_013c_21_ff, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0140_21_ff, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0148_21_ff, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0150_21_ff, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0158_21_ff, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0160_21_ff, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0168_21_ff, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0170_21_ff, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0178_21_ff, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0179_21_ff, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0180_21_ff, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0188_21_ff, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_0190_21_ff, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0198_21_ff, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a0_21_ff, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a8_21_ff, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b0_21_ff, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b8_21_ff, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b9_21_ff, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01c0_21_ff, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01c8_21_ff, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_01d0_21_ff, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01d8_21_ff, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e0_21_ff, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e8_21_ff, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f0_21_ff, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_01f8_21_ff, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f9_21_ff, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0200_21_ff, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0210_21_ff, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0218_21_ff, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0220_21_ff, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0228_21_ff, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0230_21_ff, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0238_21_ff, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0239_21_ff, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_023c_21_ff, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0240_21_ff, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0250_21_ff, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0258_21_ff, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0260_21_ff, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0268_21_ff, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0270_21_ff, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0278_21_ff, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0279_21_ff, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_027c_21_ff, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0280_21_ff, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0290_21_ff, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0298_21_ff, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a0_21_ff, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a8_21_ff, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b0_21_ff, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_02b8_21_ff, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b9_21_ff, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02d0_21_ff, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02e8_21_ff, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f0_21_ff, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f8_21_ff, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f9_21_ff, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02fa_21_ff, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02fb_21_ff, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0400_21_ff, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0410_21_ff, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0418_21_ff, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0420_21_ff, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0428_21_ff, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0430_21_ff, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0438_21_ff, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0439_21_ff, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0440_21_ff, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0450_21_ff, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0458_21_ff, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0460_21_ff, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0468_21_ff, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0470_21_ff, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0478_21_ff, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0479_21_ff, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0480_21_ff, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0490_21_ff, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0498_21_ff, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a0_21_ff, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a8_21_ff, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b0_21_ff, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_04b8_21_ff, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b9_21_ff, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04d0_21_ff, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04e8_21_ff, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f0_21_ff, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f8_21_ff, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f9_21_ff, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04fa_21_ff, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04fb_21_ff, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0600_21_ff, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0610_21_ff, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0618_21_ff, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0620_21_ff, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0628_21_ff, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0630_21_ff, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0638_21_ff, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0639_21_ff, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0640_21_ff, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0650_21_ff, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0658_21_ff, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0660_21_ff, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0668_21_ff, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0670_21_ff, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0678_21_ff, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0679_21_ff, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0680_21_ff, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0690_21_ff, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0698_21_ff, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a0_21_ff, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a8_21_ff, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b0_21_ff, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_06b8_21_ff, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b9_21_ff, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06c0_21_ff, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06c8_21_ff, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06d0_21_ff, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06e8_21_ff, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f0_21_ff, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f8_21_ff, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f9_21_ff, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06fa_21_ff, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06fb_21_ff, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ NULL, op_0800_21_ff, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0810_21_ff, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0818_21_ff, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0820_21_ff, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0828_21_ff, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0830_21_ff, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0838_21_ff, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0839_21_ff, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083a_21_ff, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083b_21_ff, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0840_21_ff, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0850_21_ff, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0858_21_ff, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0860_21_ff, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0868_21_ff, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0870_21_ff, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0878_21_ff, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0879_21_ff, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0880_21_ff, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0890_21_ff, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0898_21_ff, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a0_21_ff, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a8_21_ff, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b0_21_ff, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b8_21_ff, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b9_21_ff, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08c0_21_ff, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d0_21_ff, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d8_21_ff, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e0_21_ff, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e8_21_ff, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f0_21_ff, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_08f8_21_ff, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f9_21_ff, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0a00_21_ff, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a10_21_ff, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a18_21_ff, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a20_21_ff, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a28_21_ff, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a30_21_ff, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a38_21_ff, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a39_21_ff, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a3c_21_ff, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a40_21_ff, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a50_21_ff, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a58_21_ff, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a60_21_ff, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a68_21_ff, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a70_21_ff, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a78_21_ff, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a79_21_ff, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a7c_21_ff, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a80_21_ff, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a90_21_ff, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a98_21_ff, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa0_21_ff, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa8_21_ff, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab0_21_ff, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab8_21_ff, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab9_21_ff, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad0_21_ff, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad8_21_ff, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae0_21_ff, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae8_21_ff, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af0_21_ff, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af8_21_ff, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af9_21_ff, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ NULL, op_0c00_21_ff, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c10_21_ff, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c18_21_ff, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c20_21_ff, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c28_21_ff, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c30_21_ff, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c38_21_ff, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c39_21_ff, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c3a_21_ff, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c3b_21_ff, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ NULL, op_0c40_21_ff, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c50_21_ff, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c58_21_ff, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c60_21_ff, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c68_21_ff, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c70_21_ff, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c78_21_ff, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c79_21_ff, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c7a_21_ff, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c7b_21_ff, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ NULL, op_0c80_21_ff, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c90_21_ff, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c98_21_ff, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca0_21_ff, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca8_21_ff, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb0_21_ff, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb8_21_ff, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb9_21_ff, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cba_21_ff, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cbb_21_ff, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd0_21_ff, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd8_21_ff, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce0_21_ff, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce8_21_ff, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf0_21_ff, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf8_21_ff, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf9_21_ff, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cfc_21_ff, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e10_21_ff, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e18_21_ff, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e20_21_ff, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e28_21_ff, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e30_21_ff, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e38_21_ff, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e39_21_ff, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e50_21_ff, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e58_21_ff, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e60_21_ff, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e68_21_ff, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e70_21_ff, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e78_21_ff, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e79_21_ff, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e90_21_ff, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e98_21_ff, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea0_21_ff, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea8_21_ff, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb0_21_ff, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb8_21_ff, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb9_21_ff, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed0_21_ff, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed8_21_ff, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee0_21_ff, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee8_21_ff, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef0_21_ff, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef8_21_ff, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef9_21_ff, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0efc_21_ff, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ NULL, op_1000_21_ff, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1010_21_ff, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1018_21_ff, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1020_21_ff, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1028_21_ff, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1030_21_ff, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1038_21_ff, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1039_21_ff, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103a_21_ff, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103b_21_ff, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_103c_21_ff, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1080_21_ff, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1090_21_ff, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1098_21_ff, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a0_21_ff, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a8_21_ff, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b0_21_ff, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b8_21_ff, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b9_21_ff, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10ba_21_ff, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bb_21_ff, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bc_21_ff, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10c0_21_ff, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d0_21_ff, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d8_21_ff, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e0_21_ff, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e8_21_ff, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f0_21_ff, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f8_21_ff, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f9_21_ff, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fa_21_ff, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fb_21_ff, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fc_21_ff, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1100_21_ff, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1110_21_ff, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1118_21_ff, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1120_21_ff, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1128_21_ff, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1130_21_ff, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1138_21_ff, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1139_21_ff, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113a_21_ff, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113b_21_ff, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_113c_21_ff, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1140_21_ff, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1150_21_ff, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1158_21_ff, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1160_21_ff, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1168_21_ff, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1170_21_ff, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1178_21_ff, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1179_21_ff, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117a_21_ff, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117b_21_ff, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_117c_21_ff, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1180_21_ff, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1190_21_ff, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1198_21_ff, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a0_21_ff, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a8_21_ff, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b0_21_ff, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11b8_21_ff, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b9_21_ff, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11ba_21_ff, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11bb_21_ff, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11bc_21_ff, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11c0_21_ff, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d0_21_ff, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d8_21_ff, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e0_21_ff, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e8_21_ff, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f0_21_ff, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f8_21_ff, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f9_21_ff, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fa_21_ff, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fb_21_ff, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fc_21_ff, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13c0_21_ff, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d0_21_ff, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d8_21_ff, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e0_21_ff, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e8_21_ff, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f0_21_ff, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f8_21_ff, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f9_21_ff, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fa_21_ff, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fb_21_ff, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fc_21_ff, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2000_21_ff, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2008_21_ff, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2010_21_ff, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2018_21_ff, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2020_21_ff, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2028_21_ff, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2030_21_ff, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2038_21_ff, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2039_21_ff, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203a_21_ff, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203b_21_ff, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_203c_21_ff, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2040_21_ff, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2048_21_ff, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2050_21_ff, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2058_21_ff, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2060_21_ff, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2068_21_ff, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2070_21_ff, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2078_21_ff, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2079_21_ff, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207a_21_ff, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207b_21_ff, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207c_21_ff, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2080_21_ff, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2088_21_ff, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2090_21_ff, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2098_21_ff, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a0_21_ff, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a8_21_ff, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b0_21_ff, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b8_21_ff, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b9_21_ff, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20ba_21_ff, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bb_21_ff, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bc_21_ff, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c0_21_ff, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c8_21_ff, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d0_21_ff, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d8_21_ff, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e0_21_ff, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e8_21_ff, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f0_21_ff, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f8_21_ff, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f9_21_ff, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fa_21_ff, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fb_21_ff, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fc_21_ff, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2100_21_ff, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2108_21_ff, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2110_21_ff, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2118_21_ff, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2120_21_ff, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2128_21_ff, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2130_21_ff, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2138_21_ff, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2139_21_ff, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213a_21_ff, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213b_21_ff, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_213c_21_ff, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2140_21_ff, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2148_21_ff, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2150_21_ff, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2158_21_ff, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2160_21_ff, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2168_21_ff, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2170_21_ff, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2178_21_ff, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2179_21_ff, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217a_21_ff, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217b_21_ff, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_217c_21_ff, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2180_21_ff, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2188_21_ff, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2190_21_ff, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2198_21_ff, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a0_21_ff, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a8_21_ff, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b0_21_ff, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21b8_21_ff, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b9_21_ff, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21ba_21_ff, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21bb_21_ff, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21bc_21_ff, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c0_21_ff, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c8_21_ff, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d0_21_ff, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d8_21_ff, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e0_21_ff, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e8_21_ff, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f0_21_ff, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f8_21_ff, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f9_21_ff, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fa_21_ff, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fb_21_ff, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fc_21_ff, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c0_21_ff, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c8_21_ff, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d0_21_ff, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d8_21_ff, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e0_21_ff, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e8_21_ff, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f0_21_ff, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f8_21_ff, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f9_21_ff, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fa_21_ff, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fb_21_ff, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fc_21_ff, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3000_21_ff, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3008_21_ff, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3010_21_ff, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3018_21_ff, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3020_21_ff, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3028_21_ff, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3030_21_ff, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3038_21_ff, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3039_21_ff, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303a_21_ff, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303b_21_ff, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_303c_21_ff, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3040_21_ff, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3048_21_ff, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3050_21_ff, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3058_21_ff, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3060_21_ff, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3068_21_ff, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3070_21_ff, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3078_21_ff, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3079_21_ff, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307a_21_ff, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307b_21_ff, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307c_21_ff, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3080_21_ff, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3088_21_ff, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3090_21_ff, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3098_21_ff, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a0_21_ff, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a8_21_ff, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b0_21_ff, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b8_21_ff, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b9_21_ff, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30ba_21_ff, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bb_21_ff, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bc_21_ff, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c0_21_ff, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c8_21_ff, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d0_21_ff, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d8_21_ff, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e0_21_ff, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e8_21_ff, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f0_21_ff, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f8_21_ff, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f9_21_ff, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fa_21_ff, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fb_21_ff, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fc_21_ff, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3100_21_ff, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3108_21_ff, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3110_21_ff, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3118_21_ff, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3120_21_ff, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3128_21_ff, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3130_21_ff, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3138_21_ff, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3139_21_ff, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313a_21_ff, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313b_21_ff, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_313c_21_ff, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3140_21_ff, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3148_21_ff, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3150_21_ff, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3158_21_ff, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3160_21_ff, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3168_21_ff, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3170_21_ff, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3178_21_ff, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3179_21_ff, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317a_21_ff, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317b_21_ff, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_317c_21_ff, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3180_21_ff, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3188_21_ff, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3190_21_ff, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3198_21_ff, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a0_21_ff, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a8_21_ff, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b0_21_ff, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31b8_21_ff, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b9_21_ff, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31ba_21_ff, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31bb_21_ff, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31bc_21_ff, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c0_21_ff, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c8_21_ff, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d0_21_ff, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d8_21_ff, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e0_21_ff, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e8_21_ff, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f0_21_ff, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f8_21_ff, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f9_21_ff, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fa_21_ff, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fb_21_ff, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fc_21_ff, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c0_21_ff, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c8_21_ff, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d0_21_ff, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d8_21_ff, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e0_21_ff, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e8_21_ff, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f0_21_ff, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f8_21_ff, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f9_21_ff, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fa_21_ff, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fb_21_ff, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fc_21_ff, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_4000_21_ff, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4010_21_ff, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4018_21_ff, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4020_21_ff, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4028_21_ff, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4030_21_ff, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4038_21_ff, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4039_21_ff, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4040_21_ff, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4050_21_ff, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4058_21_ff, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4060_21_ff, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4068_21_ff, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4070_21_ff, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4078_21_ff, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4079_21_ff, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4080_21_ff, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4090_21_ff, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4098_21_ff, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a0_21_ff, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a8_21_ff, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b0_21_ff, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b8_21_ff, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b9_21_ff, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40c0_21_ff, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d0_21_ff, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d8_21_ff, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e0_21_ff, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e8_21_ff, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f0_21_ff, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f8_21_ff, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f9_21_ff, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4100_21_ff, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4110_21_ff, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4118_21_ff, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4120_21_ff, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4128_21_ff, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4130_21_ff, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4138_21_ff, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4139_21_ff, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413a_21_ff, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413b_21_ff, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413c_21_ff, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ NULL, op_4180_21_ff, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4190_21_ff, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4198_21_ff, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a0_21_ff, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a8_21_ff, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b0_21_ff, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41b8_21_ff, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b9_21_ff, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41ba_21_ff, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41bb_21_ff, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41bc_21_ff, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41d0_21_ff, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41e8_21_ff, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f0_21_ff, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_41f8_21_ff, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f9_21_ff, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fa_21_ff, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fb_21_ff, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_4200_21_ff, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4210_21_ff, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4218_21_ff, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4220_21_ff, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4228_21_ff, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4230_21_ff, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4238_21_ff, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4239_21_ff, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4240_21_ff, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4250_21_ff, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4258_21_ff, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4260_21_ff, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4268_21_ff, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4270_21_ff, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4278_21_ff, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4279_21_ff, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4280_21_ff, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4290_21_ff, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4298_21_ff, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a0_21_ff, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a8_21_ff, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b0_21_ff, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_42b8_21_ff, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b9_21_ff, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42c0_21_ff, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d0_21_ff, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d8_21_ff, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e0_21_ff, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e8_21_ff, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f0_21_ff, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f8_21_ff, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f9_21_ff, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ NULL, op_4400_21_ff, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4410_21_ff, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4418_21_ff, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4420_21_ff, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4428_21_ff, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4430_21_ff, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4438_21_ff, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4439_21_ff, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4440_21_ff, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4450_21_ff, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4458_21_ff, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4460_21_ff, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4468_21_ff, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4470_21_ff, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4478_21_ff, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4479_21_ff, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4480_21_ff, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4490_21_ff, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4498_21_ff, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a0_21_ff, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a8_21_ff, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b0_21_ff, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_44b8_21_ff, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b9_21_ff, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44c0_21_ff, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d0_21_ff, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d8_21_ff, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e0_21_ff, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e8_21_ff, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f0_21_ff, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f8_21_ff, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f9_21_ff, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fa_21_ff, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fb_21_ff, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fc_21_ff, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4600_21_ff, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4610_21_ff, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4618_21_ff, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4620_21_ff, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4628_21_ff, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4630_21_ff, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4638_21_ff, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4639_21_ff, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4640_21_ff, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4650_21_ff, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4658_21_ff, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4660_21_ff, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4668_21_ff, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4670_21_ff, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4678_21_ff, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4679_21_ff, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4680_21_ff, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4690_21_ff, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4698_21_ff, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a0_21_ff, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a8_21_ff, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b0_21_ff, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_46b8_21_ff, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b9_21_ff, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46c0_21_ff, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d0_21_ff, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d8_21_ff, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e0_21_ff, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e8_21_ff, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f0_21_ff, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f8_21_ff, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f9_21_ff, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fa_21_ff, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fb_21_ff, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fc_21_ff, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4800_21_ff, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4808_21_ff, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ NULL, op_4810_21_ff, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4818_21_ff, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4820_21_ff, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4828_21_ff, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4830_21_ff, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ NULL, op_4838_21_ff, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4839_21_ff, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4840_21_ff, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4848_21_ff, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ NULL, op_4850_21_ff, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4868_21_ff, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4870_21_ff, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4878_21_ff, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4879_21_ff, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487a_21_ff, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487b_21_ff, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4880_21_ff, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_4890_21_ff, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a0_21_ff, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a8_21_ff, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b0_21_ff, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b8_21_ff, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b9_21_ff, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48c0_21_ff, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_48d0_21_ff, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e0_21_ff, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e8_21_ff, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f0_21_ff, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f8_21_ff, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f9_21_ff, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_49c0_21_ff, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ NULL, op_4a00_21_ff, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a10_21_ff, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a18_21_ff, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a20_21_ff, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a28_21_ff, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a30_21_ff, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a38_21_ff, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a39_21_ff, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3a_21_ff, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3b_21_ff, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3c_21_ff, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a40_21_ff, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a48_21_ff, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a50_21_ff, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a58_21_ff, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a60_21_ff, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a68_21_ff, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a70_21_ff, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a78_21_ff, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a79_21_ff, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7a_21_ff, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7b_21_ff, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7c_21_ff, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a80_21_ff, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a88_21_ff, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a90_21_ff, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a98_21_ff, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa0_21_ff, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa8_21_ff, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab0_21_ff, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4ab8_21_ff, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab9_21_ff, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4aba_21_ff, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4abb_21_ff, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4abc_21_ff, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4ac0_21_ff, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad0_21_ff, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad8_21_ff, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae0_21_ff, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae8_21_ff, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af0_21_ff, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ NULL, op_4af8_21_ff, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af9_21_ff, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c00_21_ff, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c10_21_ff, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c18_21_ff, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c20_21_ff, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c28_21_ff, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c30_21_ff, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c38_21_ff, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c39_21_ff, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3a_21_ff, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3b_21_ff, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3c_21_ff, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c40_21_ff, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c50_21_ff, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c58_21_ff, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c60_21_ff, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c68_21_ff, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c70_21_ff, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c78_21_ff, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c79_21_ff, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7a_21_ff, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7b_21_ff, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7c_21_ff, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ NULL, op_4c90_21_ff, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4c98_21_ff, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ca8_21_ff, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb0_21_ff, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb8_21_ff, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb9_21_ff, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cba_21_ff, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cbb_21_ff, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd0_21_ff, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd8_21_ff, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ce8_21_ff, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf0_21_ff, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf8_21_ff, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf9_21_ff, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfa_21_ff, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfb_21_ff, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4e40_21_ff, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ NULL, op_4e50_21_ff, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ NULL, op_4e58_21_ff, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ NULL, op_4e60_21_ff, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ NULL, op_4e68_21_ff, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ NULL, op_4e70_21_ff, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ NULL, op_4e71_21_ff, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ NULL, op_4e72_21_ff, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ NULL, op_4e73_21_ff, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e74_21_ff, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ NULL, op_4e75_21_ff, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ NULL, op_4e76_21_ff, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ NULL, op_4e77_21_ff, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7a_21_ff, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7b_21_ff, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ NULL, op_4e90_21_ff, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ NULL, op_4ea8_21_ff, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb0_21_ff, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4eb8_21_ff, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb9_21_ff, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ NULL, op_4eba_21_ff, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4ebb_21_ff, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4ed0_21_ff, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ NULL, op_4ee8_21_ff, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef0_21_ff, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_4ef8_21_ff, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef9_21_ff, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ NULL, op_4efa_21_ff, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4efb_21_ff, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_5000_21_ff, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5010_21_ff, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5018_21_ff, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5020_21_ff, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5028_21_ff, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5030_21_ff, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5038_21_ff, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5039_21_ff, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5040_21_ff, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5048_21_ff, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5050_21_ff, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5058_21_ff, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5060_21_ff, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5068_21_ff, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5070_21_ff, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5078_21_ff, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5079_21_ff, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5080_21_ff, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5088_21_ff, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5090_21_ff, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5098_21_ff, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a0_21_ff, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a8_21_ff, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b0_21_ff, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_50b8_21_ff, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b9_21_ff, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50c0_21_ff, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50c8_21_ff, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_50d0_21_ff, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50d8_21_ff, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e0_21_ff, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e8_21_ff, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f0_21_ff, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_50f8_21_ff, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f9_21_ff, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fa_21_ff, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fb_21_ff, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fc_21_ff, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5100_21_ff, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5110_21_ff, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5118_21_ff, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5120_21_ff, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5128_21_ff, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5130_21_ff, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5138_21_ff, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5139_21_ff, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5140_21_ff, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5148_21_ff, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5150_21_ff, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5158_21_ff, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5160_21_ff, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5168_21_ff, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5170_21_ff, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5178_21_ff, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5179_21_ff, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5180_21_ff, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5188_21_ff, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5190_21_ff, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5198_21_ff, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a0_21_ff, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a8_21_ff, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b0_21_ff, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_51b8_21_ff, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b9_21_ff, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51c0_21_ff, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51c8_21_ff, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_51d0_21_ff, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51d8_21_ff, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e0_21_ff, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e8_21_ff, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f0_21_ff, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_51f8_21_ff, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f9_21_ff, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fa_21_ff, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fb_21_ff, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fc_21_ff, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_52c0_21_ff, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52c8_21_ff, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_52d0_21_ff, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52d8_21_ff, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e0_21_ff, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e8_21_ff, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f0_21_ff, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_52f8_21_ff, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f9_21_ff, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fa_21_ff, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fb_21_ff, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fc_21_ff, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_53c0_21_ff, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53c8_21_ff, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_53d0_21_ff, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53d8_21_ff, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e0_21_ff, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e8_21_ff, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f0_21_ff, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_53f8_21_ff, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f9_21_ff, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fa_21_ff, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fb_21_ff, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fc_21_ff, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_54c0_21_ff, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54c8_21_ff, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_54d0_21_ff, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54d8_21_ff, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e0_21_ff, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e8_21_ff, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f0_21_ff, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_54f8_21_ff, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f9_21_ff, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fa_21_ff, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fb_21_ff, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fc_21_ff, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_55c0_21_ff, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55c8_21_ff, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_55d0_21_ff, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55d8_21_ff, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e0_21_ff, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e8_21_ff, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f0_21_ff, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_55f8_21_ff, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f9_21_ff, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fa_21_ff, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fb_21_ff, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fc_21_ff, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_56c0_21_ff, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56c8_21_ff, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_56d0_21_ff, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56d8_21_ff, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e0_21_ff, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e8_21_ff, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f0_21_ff, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_56f8_21_ff, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f9_21_ff, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fa_21_ff, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fb_21_ff, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fc_21_ff, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_57c0_21_ff, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57c8_21_ff, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_57d0_21_ff, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57d8_21_ff, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e0_21_ff, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e8_21_ff, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f0_21_ff, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_57f8_21_ff, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f9_21_ff, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fa_21_ff, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fb_21_ff, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fc_21_ff, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_58c0_21_ff, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58c8_21_ff, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_58d0_21_ff, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58d8_21_ff, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e0_21_ff, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e8_21_ff, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f0_21_ff, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_58f8_21_ff, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f9_21_ff, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fa_21_ff, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fb_21_ff, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fc_21_ff, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_59c0_21_ff, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59c8_21_ff, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_59d0_21_ff, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59d8_21_ff, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e0_21_ff, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e8_21_ff, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f0_21_ff, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_59f8_21_ff, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f9_21_ff, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fa_21_ff, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fb_21_ff, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fc_21_ff, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5ac0_21_ff, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ac8_21_ff, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ad0_21_ff, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ad8_21_ff, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae0_21_ff, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae8_21_ff, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af0_21_ff, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5af8_21_ff, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af9_21_ff, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afa_21_ff, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afb_21_ff, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afc_21_ff, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5bc0_21_ff, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bc8_21_ff, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5bd0_21_ff, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bd8_21_ff, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be0_21_ff, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be8_21_ff, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf0_21_ff, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf8_21_ff, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf9_21_ff, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfa_21_ff, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfb_21_ff, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfc_21_ff, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5cc0_21_ff, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cc8_21_ff, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5cd0_21_ff, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cd8_21_ff, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce0_21_ff, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce8_21_ff, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf0_21_ff, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf8_21_ff, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf9_21_ff, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfa_21_ff, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfb_21_ff, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfc_21_ff, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5dc0_21_ff, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dc8_21_ff, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5dd0_21_ff, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dd8_21_ff, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de0_21_ff, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de8_21_ff, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df0_21_ff, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5df8_21_ff, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df9_21_ff, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfa_21_ff, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfb_21_ff, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfc_21_ff, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5ec0_21_ff, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ec8_21_ff, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ed0_21_ff, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ed8_21_ff, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee0_21_ff, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee8_21_ff, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef0_21_ff, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef8_21_ff, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef9_21_ff, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efa_21_ff, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efb_21_ff, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efc_21_ff, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5fc0_21_ff, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fc8_21_ff, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5fd0_21_ff, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fd8_21_ff, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe0_21_ff, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe8_21_ff, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff0_21_ff, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff8_21_ff, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff9_21_ff, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffa_21_ff, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffb_21_ff, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffc_21_ff, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_6000_21_ff, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6001_21_ff, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_60ff_21_ff, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6100_21_ff, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ NULL, op_6101_21_ff, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ NULL, op_61ff_21_ff, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ NULL, op_6200_21_ff, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6201_21_ff, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_62ff_21_ff, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6300_21_ff, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6301_21_ff, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_63ff_21_ff, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6400_21_ff, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6401_21_ff, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_64ff_21_ff, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6500_21_ff, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6501_21_ff, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_65ff_21_ff, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6600_21_ff, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6601_21_ff, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_66ff_21_ff, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6700_21_ff, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6701_21_ff, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_67ff_21_ff, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6800_21_ff, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6801_21_ff, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_68ff_21_ff, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6900_21_ff, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6901_21_ff, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_69ff_21_ff, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6a00_21_ff, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6a01_21_ff, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6aff_21_ff, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6b00_21_ff, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6b01_21_ff, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6bff_21_ff, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6c00_21_ff, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6c01_21_ff, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6cff_21_ff, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6d00_21_ff, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6d01_21_ff, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6dff_21_ff, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6e00_21_ff, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6e01_21_ff, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6eff_21_ff, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6f00_21_ff, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6f01_21_ff, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6fff_21_ff, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_7000_21_ff, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_8000_21_ff, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8010_21_ff, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8018_21_ff, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8020_21_ff, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8028_21_ff, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8030_21_ff, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8038_21_ff, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8039_21_ff, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803a_21_ff, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803b_21_ff, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_803c_21_ff, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8040_21_ff, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8050_21_ff, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8058_21_ff, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8060_21_ff, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8068_21_ff, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8070_21_ff, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8078_21_ff, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8079_21_ff, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807a_21_ff, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807b_21_ff, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_807c_21_ff, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8080_21_ff, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8090_21_ff, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8098_21_ff, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a0_21_ff, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a8_21_ff, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b0_21_ff, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80b8_21_ff, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b9_21_ff, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80ba_21_ff, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80bb_21_ff, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80bc_21_ff, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80c0_21_ff, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d0_21_ff, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d8_21_ff, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e0_21_ff, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e8_21_ff, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f0_21_ff, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f8_21_ff, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f9_21_ff, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fa_21_ff, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fb_21_ff, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fc_21_ff, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_8100_21_ff, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8108_21_ff, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8110_21_ff, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8118_21_ff, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8120_21_ff, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8128_21_ff, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8130_21_ff, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8138_21_ff, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8139_21_ff, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8140_21_ff, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8148_21_ff, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ NULL, op_8150_21_ff, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8158_21_ff, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8160_21_ff, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8168_21_ff, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8170_21_ff, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8178_21_ff, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8179_21_ff, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8180_21_ff, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8188_21_ff, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ NULL, op_8190_21_ff, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8198_21_ff, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a0_21_ff, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a8_21_ff, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b0_21_ff, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_81b8_21_ff, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b9_21_ff, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81c0_21_ff, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d0_21_ff, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d8_21_ff, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e0_21_ff, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e8_21_ff, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f0_21_ff, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f8_21_ff, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f9_21_ff, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fa_21_ff, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fb_21_ff, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fc_21_ff, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_9000_21_ff, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9010_21_ff, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9018_21_ff, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9020_21_ff, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9028_21_ff, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9030_21_ff, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9038_21_ff, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9039_21_ff, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903a_21_ff, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903b_21_ff, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_903c_21_ff, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9040_21_ff, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9048_21_ff, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9050_21_ff, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9058_21_ff, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9060_21_ff, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9068_21_ff, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9070_21_ff, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9078_21_ff, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9079_21_ff, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907a_21_ff, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907b_21_ff, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_907c_21_ff, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9080_21_ff, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9088_21_ff, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9090_21_ff, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9098_21_ff, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a0_21_ff, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a8_21_ff, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b0_21_ff, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90b8_21_ff, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b9_21_ff, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90ba_21_ff, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90bb_21_ff, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90bc_21_ff, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90c0_21_ff, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90c8_21_ff, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d0_21_ff, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d8_21_ff, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e0_21_ff, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e8_21_ff, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f0_21_ff, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f8_21_ff, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f9_21_ff, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fa_21_ff, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fb_21_ff, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fc_21_ff, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_9100_21_ff, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9108_21_ff, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9110_21_ff, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9118_21_ff, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9120_21_ff, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9128_21_ff, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9130_21_ff, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9138_21_ff, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9139_21_ff, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9140_21_ff, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9148_21_ff, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9150_21_ff, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9158_21_ff, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9160_21_ff, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9168_21_ff, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9170_21_ff, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9178_21_ff, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9179_21_ff, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9180_21_ff, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9188_21_ff, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9190_21_ff, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9198_21_ff, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a0_21_ff, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a8_21_ff, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b0_21_ff, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_91b8_21_ff, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b9_21_ff, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91c0_21_ff, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91c8_21_ff, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d0_21_ff, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d8_21_ff, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e0_21_ff, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e8_21_ff, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f0_21_ff, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f8_21_ff, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f9_21_ff, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fa_21_ff, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fb_21_ff, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fc_21_ff, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_b000_21_ff, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b010_21_ff, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b018_21_ff, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b020_21_ff, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b028_21_ff, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b030_21_ff, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b038_21_ff, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b039_21_ff, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03a_21_ff, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03b_21_ff, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b03c_21_ff, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b040_21_ff, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b048_21_ff, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b050_21_ff, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b058_21_ff, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b060_21_ff, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b068_21_ff, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b070_21_ff, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b078_21_ff, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b079_21_ff, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07a_21_ff, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07b_21_ff, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b07c_21_ff, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b080_21_ff, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b088_21_ff, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b090_21_ff, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b098_21_ff, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a0_21_ff, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a8_21_ff, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b0_21_ff, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b8_21_ff, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b9_21_ff, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0ba_21_ff, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bb_21_ff, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bc_21_ff, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0c0_21_ff, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0c8_21_ff, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d0_21_ff, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d8_21_ff, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e0_21_ff, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e8_21_ff, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f0_21_ff, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f8_21_ff, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f9_21_ff, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fa_21_ff, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fb_21_ff, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fc_21_ff, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b100_21_ff, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b108_21_ff, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b110_21_ff, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b118_21_ff, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b120_21_ff, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b128_21_ff, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b130_21_ff, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b138_21_ff, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b139_21_ff, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b140_21_ff, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b148_21_ff, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b150_21_ff, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b158_21_ff, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b160_21_ff, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b168_21_ff, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b170_21_ff, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b178_21_ff, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b179_21_ff, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b180_21_ff, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b188_21_ff, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b190_21_ff, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b198_21_ff, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a0_21_ff, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a8_21_ff, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b0_21_ff, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b8_21_ff, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b9_21_ff, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1c0_21_ff, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1c8_21_ff, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d0_21_ff, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d8_21_ff, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e0_21_ff, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e8_21_ff, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f0_21_ff, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f8_21_ff, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f9_21_ff, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fa_21_ff, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fb_21_ff, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fc_21_ff, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_c000_21_ff, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c010_21_ff, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c018_21_ff, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c020_21_ff, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c028_21_ff, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c030_21_ff, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c038_21_ff, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c039_21_ff, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03a_21_ff, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03b_21_ff, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c03c_21_ff, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c040_21_ff, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c050_21_ff, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c058_21_ff, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c060_21_ff, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c068_21_ff, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c070_21_ff, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c078_21_ff, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c079_21_ff, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07a_21_ff, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07b_21_ff, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c07c_21_ff, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c080_21_ff, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c090_21_ff, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c098_21_ff, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a0_21_ff, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a8_21_ff, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b0_21_ff, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0b8_21_ff, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b9_21_ff, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0ba_21_ff, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0bb_21_ff, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0bc_21_ff, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0c0_21_ff, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d0_21_ff, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d8_21_ff, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e0_21_ff, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e8_21_ff, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f0_21_ff, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f8_21_ff, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f9_21_ff, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fa_21_ff, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fb_21_ff, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fc_21_ff, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c100_21_ff, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c108_21_ff, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c110_21_ff, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c118_21_ff, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c120_21_ff, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c128_21_ff, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c130_21_ff, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c138_21_ff, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c139_21_ff, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c140_21_ff, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c148_21_ff, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c150_21_ff, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c158_21_ff, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c160_21_ff, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c168_21_ff, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c170_21_ff, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c178_21_ff, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c179_21_ff, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c188_21_ff, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c190_21_ff, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c198_21_ff, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a0_21_ff, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a8_21_ff, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b0_21_ff, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c1b8_21_ff, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b9_21_ff, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1c0_21_ff, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d0_21_ff, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d8_21_ff, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e0_21_ff, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e8_21_ff, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f0_21_ff, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f8_21_ff, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f9_21_ff, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fa_21_ff, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fb_21_ff, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fc_21_ff, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_d000_21_ff, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d010_21_ff, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d018_21_ff, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d020_21_ff, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d028_21_ff, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d030_21_ff, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d038_21_ff, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d039_21_ff, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03a_21_ff, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03b_21_ff, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d03c_21_ff, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d040_21_ff, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d048_21_ff, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d050_21_ff, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d058_21_ff, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d060_21_ff, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d068_21_ff, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d070_21_ff, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d078_21_ff, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d079_21_ff, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07a_21_ff, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07b_21_ff, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d07c_21_ff, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d080_21_ff, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d088_21_ff, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d090_21_ff, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d098_21_ff, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a0_21_ff, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a8_21_ff, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b0_21_ff, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b8_21_ff, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b9_21_ff, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0ba_21_ff, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bb_21_ff, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bc_21_ff, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0c0_21_ff, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0c8_21_ff, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d0_21_ff, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d8_21_ff, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e0_21_ff, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e8_21_ff, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f0_21_ff, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f8_21_ff, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f9_21_ff, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fa_21_ff, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fb_21_ff, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fc_21_ff, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d100_21_ff, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d108_21_ff, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d110_21_ff, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d118_21_ff, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d120_21_ff, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d128_21_ff, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d130_21_ff, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d138_21_ff, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d139_21_ff, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d140_21_ff, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d148_21_ff, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d150_21_ff, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d158_21_ff, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d160_21_ff, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d168_21_ff, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d170_21_ff, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d178_21_ff, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d179_21_ff, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d180_21_ff, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d188_21_ff, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d190_21_ff, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d198_21_ff, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a0_21_ff, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a8_21_ff, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b0_21_ff, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b8_21_ff, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b9_21_ff, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1c0_21_ff, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1c8_21_ff, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d0_21_ff, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d8_21_ff, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e0_21_ff, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e8_21_ff, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f0_21_ff, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f8_21_ff, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f9_21_ff, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fa_21_ff, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fb_21_ff, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fc_21_ff, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_e000_21_ff, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e008_21_ff, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e010_21_ff, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e018_21_ff, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e020_21_ff, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e028_21_ff, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e030_21_ff, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e038_21_ff, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e040_21_ff, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e048_21_ff, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e050_21_ff, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e058_21_ff, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e060_21_ff, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e068_21_ff, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e070_21_ff, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e078_21_ff, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e080_21_ff, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e088_21_ff, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e090_21_ff, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e098_21_ff, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0a0_21_ff, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e0a8_21_ff, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e0b0_21_ff, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e0b8_21_ff, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0d0_21_ff, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0d8_21_ff, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e0_21_ff, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e8_21_ff, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f0_21_ff, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f8_21_ff, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f9_21_ff, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e100_21_ff, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e108_21_ff, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e110_21_ff, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e118_21_ff, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e120_21_ff, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e128_21_ff, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e130_21_ff, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e138_21_ff, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e140_21_ff, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e148_21_ff, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e150_21_ff, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e158_21_ff, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e160_21_ff, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e168_21_ff, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e170_21_ff, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e178_21_ff, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e180_21_ff, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e188_21_ff, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e190_21_ff, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e198_21_ff, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1a0_21_ff, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e1a8_21_ff, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e1b0_21_ff, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e1b8_21_ff, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1d0_21_ff, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1d8_21_ff, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e0_21_ff, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e8_21_ff, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f0_21_ff, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f8_21_ff, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f9_21_ff, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e2d0_21_ff, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2d8_21_ff, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e0_21_ff, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e8_21_ff, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f0_21_ff, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f8_21_ff, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f9_21_ff, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e3d0_21_ff, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3d8_21_ff, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e0_21_ff, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e8_21_ff, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f0_21_ff, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f8_21_ff, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f9_21_ff, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e4d0_21_ff, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4d8_21_ff, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e0_21_ff, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e8_21_ff, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f0_21_ff, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f8_21_ff, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f9_21_ff, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e5d0_21_ff, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5d8_21_ff, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e0_21_ff, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e8_21_ff, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f0_21_ff, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f8_21_ff, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f9_21_ff, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e6d0_21_ff, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6d8_21_ff, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e0_21_ff, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e8_21_ff, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f0_21_ff, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f8_21_ff, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f9_21_ff, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e7d0_21_ff, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7d8_21_ff, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e0_21_ff, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e8_21_ff, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f0_21_ff, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f8_21_ff, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f9_21_ff, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8c0_21_ff, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8d0_21_ff, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8e8_21_ff, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f0_21_ff, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f8_21_ff, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f9_21_ff, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8fa_21_ff, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8fb_21_ff, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9c0_21_ff, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9d0_21_ff, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9e8_21_ff, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f0_21_ff, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f8_21_ff, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f9_21_ff, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9fa_21_ff, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9fb_21_ff, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eac0_21_ff, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ead0_21_ff, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eae8_21_ff, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf0_21_ff, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf8_21_ff, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf9_21_ff, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebc0_21_ff, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebd0_21_ff, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebe8_21_ff, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf0_21_ff, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf8_21_ff, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf9_21_ff, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebfa_21_ff, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebfb_21_ff, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecc0_21_ff, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecd0_21_ff, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ece8_21_ff, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf0_21_ff, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf8_21_ff, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf9_21_ff, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edc0_21_ff, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edd0_21_ff, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ede8_21_ff, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf0_21_ff, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf8_21_ff, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf9_21_ff, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edfa_21_ff, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edfb_21_ff, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eec0_21_ff, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eed0_21_ff, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eee8_21_ff, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef0_21_ff, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef8_21_ff, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef9_21_ff, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efc0_21_ff, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efd0_21_ff, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efe8_21_ff, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff0_21_ff, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff8_21_ff, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff9_21_ff, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f200_21_ff, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f208_21_ff, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f210_21_ff, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f218_21_ff, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f220_21_ff, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f228_21_ff, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f230_21_ff, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f238_21_ff, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f239_21_ff, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23a_21_ff, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23b_21_ff, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23c_21_ff, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f240_21_ff, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f248_21_ff, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f250_21_ff, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f258_21_ff, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f260_21_ff, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f268_21_ff, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f270_21_ff, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f278_21_ff, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f279_21_ff, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27a_21_ff, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27b_21_ff, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27c_21_ff, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f280_21_ff, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f2c0_21_ff, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f310_21_ff, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f320_21_ff, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f328_21_ff, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f330_21_ff, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f338_21_ff, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f339_21_ff, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f350_21_ff, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f358_21_ff, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f368_21_ff, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f370_21_ff, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f378_21_ff, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f379_21_ff, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f37a_21_ff, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f37b_21_ff, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_21 */ +#ifdef CPUEMU_22 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_22[] = { +{ op_0000_22_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_22_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_22_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_22_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_22_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_22_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_22_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_22_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_22_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_22_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_22_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_22_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_22_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_22_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_22_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_22_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_22_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_22_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_22_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_22_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_22_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_22_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_22_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_22_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_22_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_22_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_00d0_22_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00e8_22_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f0_22_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f8_22_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f9_22_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fa_22_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fb_22_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0100_22_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_22_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_22_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_22_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_22_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_22_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_22_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_22_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_22_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_22_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_22_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_22_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_22_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_22_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_22_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_22_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_22_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_22_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_22_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_22_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_22_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_22_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_22_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_22_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_22_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_22_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_22_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_22_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_22_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_22_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_22_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_22_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_22_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_22_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_22_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_22_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_22_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_22_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_22_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_22_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_22_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_22_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_22_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_22_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_22_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_22_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_22_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_22_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_22_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_22_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_22_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_22_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_22_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_22_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_22_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_22_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_22_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_22_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_22_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_22_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_22_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_22_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_22_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_22_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_22_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ op_02d0_22_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02e8_22_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f0_22_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f8_22_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f9_22_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fa_22_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fb_22_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0400_22_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_22_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_22_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_22_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_22_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_22_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_22_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_22_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_22_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_22_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_22_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_22_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_22_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_22_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_22_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_22_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_22_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_22_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_22_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_22_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_22_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_22_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_22_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_22_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ op_04d0_22_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04e8_22_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f0_22_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f8_22_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f9_22_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fa_22_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fb_22_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0600_22_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_22_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_22_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_22_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_22_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_22_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_22_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_22_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_22_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_22_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_22_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_22_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_22_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_22_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_22_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_22_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_22_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_22_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_22_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_22_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_22_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_22_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_22_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_22_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ op_06c0_22_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06c8_22_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06d0_22_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06e8_22_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f0_22_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f8_22_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f9_22_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fa_22_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fb_22_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ op_0800_22_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_22_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_22_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_22_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_22_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_22_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_22_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_22_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_22_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_22_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_22_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_22_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_22_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_22_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_22_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_22_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_22_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_22_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_22_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_22_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_22_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_22_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_22_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_22_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_22_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_22_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_22_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_22_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_22_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_22_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_22_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_22_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_22_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_22_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_22_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_22_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_22_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_22_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_22_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_22_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_22_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_22_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_22_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_22_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_22_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_22_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_22_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_22_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_22_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_22_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_22_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_22_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_22_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_22_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_22_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_22_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_22_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_22_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_22_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_22_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_22_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_22_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_22_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_22_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_22_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_22_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_22_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_22_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_22_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_22_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_22_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_22_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_22_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_22_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_22_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c3a_22_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c3b_22_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c40_22_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_22_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_22_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_22_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_22_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_22_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_22_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_22_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c7a_22_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c7b_22_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c80_22_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_22_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_22_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_22_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_22_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_22_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_22_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_22_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cba_22_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cbb_22_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_22_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_22_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_22_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_22_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_22_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_22_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_22_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_22_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_22_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_22_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_22_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_22_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_22_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_22_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_22_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_22_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_22_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_22_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_22_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_22_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_22_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_22_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_22_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_22_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_22_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_22_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_22_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_22_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_22_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_22_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_22_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_22_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_22_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_22_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_22_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_22_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_22_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_22_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_22_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_22_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_22_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_22_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_22_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_22_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_22_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_22_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_22_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_22_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_22_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_22_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_22_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_22_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_22_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_22_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_22_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_22_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_22_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_22_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_22_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_22_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_22_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_22_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_22_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_22_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_22_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_22_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_22_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_22_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_22_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_22_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_22_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_22_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_22_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_22_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_22_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_22_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_22_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_22_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_22_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_22_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_22_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_22_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_22_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_22_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_22_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_22_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_22_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_22_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_22_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_22_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_22_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_22_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_22_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_22_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_22_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_22_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_22_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_22_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_22_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_22_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_22_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_22_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_22_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_22_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_22_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_22_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_22_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_22_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_22_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_22_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_22_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_22_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_22_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_22_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_22_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_22_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_22_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_22_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_22_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_22_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_22_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_22_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_22_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_22_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_22_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_22_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_22_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_22_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_22_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_22_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_22_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_22_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_22_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_22_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_22_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_22_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_22_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_22_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_22_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_22_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_22_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_22_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_22_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_22_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_22_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_22_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_22_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_22_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_22_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_22_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_22_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_22_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_22_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_22_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_22_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_22_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_22_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_22_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_22_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_22_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_22_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_22_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_22_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_22_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_22_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_22_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_22_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_22_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_22_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_22_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_22_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_22_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_22_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_22_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_22_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_22_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_22_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_22_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_22_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_22_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_22_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_22_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_22_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_22_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_22_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_22_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_22_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_22_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_22_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_22_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_22_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_22_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_22_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_22_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_22_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_22_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_22_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_22_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_22_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_22_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_22_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_22_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_22_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_22_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_22_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_22_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_22_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_22_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_22_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_22_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_22_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_22_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_22_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_22_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_22_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_22_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_22_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_22_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_22_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_22_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_22_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_22_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_22_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_22_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_22_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_22_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_22_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_22_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_22_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_22_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_22_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_22_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_22_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_22_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_22_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_22_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_22_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_22_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_22_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_22_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_22_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_22_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_22_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_22_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_22_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_22_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_22_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_22_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_22_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_22_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_22_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_22_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_22_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_22_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_22_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_22_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_22_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_22_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_22_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_22_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_22_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_22_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_22_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_22_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_22_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_22_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_22_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_22_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_22_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_22_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_22_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_22_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_22_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_22_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_22_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_22_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_22_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_22_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_22_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_22_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_22_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_22_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_22_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_22_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_22_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_22_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_22_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_22_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_22_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_22_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_22_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_22_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_22_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_22_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_22_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_22_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_22_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_22_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_22_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_22_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_22_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_22_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_22_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_22_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_22_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_22_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_22_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_22_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_22_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_22_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_22_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_22_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_22_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_22_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_22_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_22_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_22_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_22_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_22_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_22_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_22_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_22_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_22_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_22_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_22_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_22_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_22_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_22_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_22_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_22_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_22_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_22_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_22_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_22_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_22_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_22_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_22_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_22_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_22_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_22_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_22_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_22_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_22_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_22_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_22_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_22_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_22_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_22_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_22_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_22_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_22_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_22_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_22_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_22_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_22_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_22_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_22_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_22_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_22_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_22_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_22_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_22_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_22_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_22_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_22_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_22_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_22_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_22_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_22_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_22_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_22_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_22_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_22_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4100_22_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4110_22_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4118_22_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4120_22_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4128_22_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4130_22_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4138_22_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4139_22_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413a_22_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413b_22_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413c_22_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ op_4180_22_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_22_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_22_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_22_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_22_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_22_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_22_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_22_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_22_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_22_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_22_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_22_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_22_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_22_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_22_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_22_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_22_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_22_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_22_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_22_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_22_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_22_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_22_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_22_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_22_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_22_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_22_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_22_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_22_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_22_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_22_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_22_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_22_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_22_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_22_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_22_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_22_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_22_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_22_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_22_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_22_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_22_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_22_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_22_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_22_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_22_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_22_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_22_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_22_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_22_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_22_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_22_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_22_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_22_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_22_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_22_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_22_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_22_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_22_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_22_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_22_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_22_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_22_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_22_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_22_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_22_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_22_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_22_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_22_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_22_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_22_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_22_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_22_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_22_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_22_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_22_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_22_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_22_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_22_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_22_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_22_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_22_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_22_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_22_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_22_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_22_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_22_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_22_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_22_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_22_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_22_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_22_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_22_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_22_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_22_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_22_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_22_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_22_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_22_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_22_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_22_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_22_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_22_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_22_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_22_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_22_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_22_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_22_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_22_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_22_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_22_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_22_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_22_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_22_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_22_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_22_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_22_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_22_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_22_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_22_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_22_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_22_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_22_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_22_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_22_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_22_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_22_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_22_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_22_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_22_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_22_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_22_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_22_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_22_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_22_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_22_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_22_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_22_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_22_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_22_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_22_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_22_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_22_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_22_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_22_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_22_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_22_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_22_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_22_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_22_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_22_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_22_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ op_49c0_22_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ op_4a00_22_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_22_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_22_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_22_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_22_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_22_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_22_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_22_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a3a_22_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3b_22_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3c_22_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a40_22_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a48_22_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a50_22_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_22_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_22_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_22_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_22_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_22_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_22_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a7a_22_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7b_22_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7c_22_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a80_22_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a88_22_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a90_22_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_22_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_22_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_22_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_22_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_22_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_22_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4aba_22_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abb_22_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abc_22_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4ac0_22_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_22_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_22_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_22_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_22_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_22_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_22_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_22_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4c00_22_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c10_22_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c18_22_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c20_22_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c28_22_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c30_22_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c38_22_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c39_22_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3a_22_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3b_22_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3c_22_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c40_22_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c50_22_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c58_22_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c60_22_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c68_22_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c70_22_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c78_22_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c79_22_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7a_22_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7b_22_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7c_22_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ op_4c90_22_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_22_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_22_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_22_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_22_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_22_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_22_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_22_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_22_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_22_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_22_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_22_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_22_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_22_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_22_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_22_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_22_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_22_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_22_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_22_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_22_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_22_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_22_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_22_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_22_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_22_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_22_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_22_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_22_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_22_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_22_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_22_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_22_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_22_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_22_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_22_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_22_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_22_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_22_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_22_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_22_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_22_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_22_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_22_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_22_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_22_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_22_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_22_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_22_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_22_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_22_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_22_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_22_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_22_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_22_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_22_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_22_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_22_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_22_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_22_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_22_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_22_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_22_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_22_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_22_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_22_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_22_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_22_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_22_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_22_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_22_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_22_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_22_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_22_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_22_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_22_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_22_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_22_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_22_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_22_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_50fa_22_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fb_22_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fc_22_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5100_22_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_22_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_22_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_22_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_22_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_22_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_22_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_22_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_22_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_22_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_22_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_22_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_22_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_22_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_22_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_22_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_22_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_22_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_22_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_22_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_22_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_22_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_22_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_22_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_22_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_22_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_22_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_22_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_22_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_22_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_22_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_22_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_22_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_22_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_22_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_51fa_22_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fb_22_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fc_22_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_52c0_22_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_22_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_22_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_22_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_22_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_22_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_22_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_22_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_22_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_52fa_22_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fb_22_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fc_22_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_53c0_22_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_22_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_22_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_22_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_22_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_22_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_22_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_22_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_22_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_53fa_22_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fb_22_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fc_22_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_54c0_22_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_22_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_22_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_22_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_22_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_22_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_22_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_22_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_22_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_54fa_22_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fb_22_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fc_22_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_55c0_22_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_22_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_22_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_22_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_22_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_22_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_22_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_22_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_22_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_55fa_22_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fb_22_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fc_22_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_56c0_22_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_22_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_22_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_22_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_22_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_22_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_22_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_22_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_22_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_56fa_22_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fb_22_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fc_22_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_57c0_22_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_22_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_22_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_22_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_22_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_22_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_22_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_22_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_22_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_57fa_22_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fb_22_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fc_22_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_58c0_22_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_22_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_22_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_22_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_22_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_22_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_22_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_22_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_22_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_58fa_22_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fb_22_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fc_22_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_59c0_22_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_22_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_22_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_22_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_22_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_22_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_22_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_22_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_22_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_59fa_22_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fb_22_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fc_22_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ac0_22_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_22_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_22_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_22_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_22_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_22_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_22_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_22_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_22_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5afa_22_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afb_22_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afc_22_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5bc0_22_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_22_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_22_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_22_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_22_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_22_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_22_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_22_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_22_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5bfa_22_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfb_22_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfc_22_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5cc0_22_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_22_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_22_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_22_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_22_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_22_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_22_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_22_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_22_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5cfa_22_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfb_22_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfc_22_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5dc0_22_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_22_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_22_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_22_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_22_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_22_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_22_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_22_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_22_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5dfa_22_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfb_22_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfc_22_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ec0_22_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_22_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_22_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_22_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_22_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_22_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_22_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_22_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_22_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5efa_22_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efb_22_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efc_22_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5fc0_22_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_22_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_22_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_22_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_22_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_22_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_22_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_22_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_22_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5ffa_22_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffb_22_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffc_22_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_6000_22_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_22_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_22_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_22_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_22_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_22_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_22_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_22_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_22_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_22_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_22_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_22_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_22_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_22_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_22_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_22_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_22_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_22_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_22_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_22_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_22_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_22_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_22_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_22_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_22_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_22_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_22_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_22_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_22_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_22_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_22_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_22_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_22_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_22_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_22_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_22_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_22_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_22_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_22_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_22_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_22_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_22_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_22_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_22_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_22_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_22_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_22_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_22_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_22_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_22_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_22_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_22_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_22_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_22_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_22_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_22_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_22_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_22_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_22_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_22_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_22_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_22_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_22_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_22_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_22_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_22_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_22_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_22_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_22_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_22_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_22_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_22_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_22_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_22_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_22_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_22_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_22_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_22_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_22_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_22_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_22_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_22_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_22_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_22_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_22_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_22_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_22_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_22_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_22_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_22_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_22_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_22_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_22_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_22_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_22_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_22_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_22_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_22_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_22_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_22_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_22_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_22_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8140_22_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8148_22_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ op_8150_22_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_22_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_22_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_22_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_22_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_22_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_22_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8180_22_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8188_22_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ op_8190_22_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_22_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_22_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_22_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_22_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_22_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_22_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_22_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_22_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_22_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_22_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_22_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_22_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_22_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_22_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_22_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_22_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_22_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_22_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_22_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_22_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_22_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_22_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_22_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_22_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_22_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_22_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_22_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_22_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_22_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_22_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_22_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_22_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_22_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_22_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_22_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_22_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_22_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_22_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_22_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_22_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_22_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_22_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_22_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_22_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_22_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_22_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_22_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_22_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_22_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_22_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_22_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_22_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_22_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_22_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_22_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_22_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_22_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_22_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_22_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_22_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_22_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_22_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_22_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_22_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_22_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_22_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_22_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_22_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_22_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_22_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_22_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_22_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_22_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_22_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_22_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_22_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_22_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_22_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_22_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_22_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_22_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_22_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_22_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_22_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_22_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_22_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_22_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_22_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_22_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_22_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_22_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_22_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_22_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_22_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_22_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_22_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_22_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_22_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_22_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_22_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_22_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_22_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_22_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_22_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_22_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_22_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_22_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_22_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_22_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_22_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_22_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_22_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_22_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_22_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_22_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_22_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_22_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_22_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_22_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_22_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_22_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_22_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_22_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_22_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_22_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_22_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_22_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_22_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_22_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_22_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_22_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_22_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_22_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_22_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_22_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_22_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_22_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_22_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_22_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_22_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_22_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_22_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_22_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_22_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_22_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_22_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_22_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_22_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_22_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_22_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_22_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_22_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_22_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_22_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_22_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_22_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_22_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_22_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_22_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_22_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_22_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_22_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_22_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_22_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_22_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_22_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_22_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_22_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_22_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_22_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_22_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_22_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_22_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_22_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_22_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_22_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_22_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_22_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_22_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_22_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_22_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_22_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_22_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_22_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_22_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_22_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_22_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_22_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_22_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_22_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_22_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_22_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_22_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_22_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_22_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_22_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_22_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_22_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_22_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_22_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_22_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_22_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_22_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_22_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_22_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_22_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_22_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_22_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_22_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_22_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_22_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_22_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_22_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_22_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_22_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_22_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_22_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_22_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_22_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_22_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_22_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_22_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_22_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_22_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_22_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_22_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_22_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_22_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_22_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_22_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_22_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_22_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_22_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_22_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_22_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_22_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_22_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_22_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_22_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_22_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_22_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_22_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_22_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_22_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_22_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_22_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_22_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_22_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_22_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_22_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_22_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_22_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_22_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_22_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_22_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_22_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_22_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_22_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_22_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_22_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_22_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_22_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_22_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_22_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_22_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_22_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_22_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_22_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_22_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_22_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_22_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_22_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_22_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_22_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_22_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_22_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_22_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_22_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_22_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_22_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_22_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_22_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_22_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_22_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_22_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_22_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_22_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_22_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_22_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_22_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_22_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_22_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_22_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_22_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_22_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_22_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_22_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_22_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_22_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_22_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_22_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_22_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_22_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_22_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_22_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_22_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_22_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_22_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_22_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_22_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_22_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_22_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_22_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_22_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_22_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_22_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_22_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_22_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_22_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_22_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_22_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_22_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_22_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_22_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_22_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_22_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_22_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_22_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_22_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_22_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_22_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_22_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_22_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_22_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_22_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_22_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_22_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_22_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_22_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_22_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_22_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_22_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_22_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_22_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_22_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_22_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_22_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_22_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_22_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_22_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_22_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_22_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_22_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_22_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_22_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_22_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_22_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_22_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_22_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_22_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_22_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_22_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_22_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_22_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_22_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_22_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_22_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_22_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_22_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_22_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_22_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_22_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_22_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_22_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_22_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_22_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_22_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_22_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_22_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_22_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_22_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_22_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_22_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_22_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_22_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_22_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_22_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_22_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_22_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_22_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_22_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_22_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_22_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_22_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_22_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_22_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_22_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_22_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_22_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_22_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_22_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_22_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_22_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_22_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_22_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_22_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_22_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_22_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_22_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_22_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_22_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_22_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_22_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_22_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_22_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_22_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_22_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_22_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_22_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_22_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_22_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_22_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_22_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_22_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_22_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_22_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_22_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_22_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_22_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_22_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_22_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_22_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_22_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_22_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_22_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_22_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_22_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_22_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_22_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_22_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_22_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_22_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_22_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_22_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_22_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_22_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_22_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_22_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_22_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_22_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_22_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_22_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_22_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_22_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_22_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_22_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_22_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_22_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_22_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_22_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ op_e8c0_22_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8d0_22_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8e8_22_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f0_22_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f8_22_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f9_22_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fa_22_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fb_22_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9c0_22_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9d0_22_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9e8_22_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f0_22_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f8_22_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f9_22_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fa_22_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fb_22_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eac0_22_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ead0_22_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eae8_22_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf0_22_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf8_22_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf9_22_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebc0_22_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebd0_22_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebe8_22_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf0_22_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf8_22_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf9_22_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfa_22_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfb_22_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecc0_22_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecd0_22_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ece8_22_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf0_22_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf8_22_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf9_22_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edc0_22_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edd0_22_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ede8_22_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf0_22_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf8_22_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf9_22_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfa_22_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfb_22_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eec0_22_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eed0_22_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eee8_22_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef0_22_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef8_22_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef9_22_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efc0_22_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efd0_22_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efe8_22_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff0_22_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff8_22_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff9_22_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f000_22_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f008_22_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f010_22_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f018_22_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f020_22_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f028_22_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f030_22_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f038_22_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f039_22_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f200_22_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f208_22_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f210_22_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f218_22_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f220_22_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f228_22_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f230_22_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f238_22_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f239_22_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23a_22_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23b_22_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23c_22_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f240_22_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f248_22_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f250_22_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f258_22_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f260_22_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f268_22_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f270_22_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f278_22_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f279_22_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27a_22_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27b_22_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27c_22_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f280_22_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f2c0_22_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f310_22_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f320_22_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f328_22_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f330_22_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f338_22_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f339_22_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f350_22_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f358_22_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f368_22_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f370_22_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f378_22_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f379_22_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37a_22_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37b_22_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_22 */ +#ifdef CPUEMU_23 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_23[] = { +{ NULL, op_0000_23_ff, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0010_23_ff, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0018_23_ff, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0020_23_ff, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0028_23_ff, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0030_23_ff, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0038_23_ff, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0039_23_ff, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_003c_23_ff, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0040_23_ff, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0050_23_ff, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0058_23_ff, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0060_23_ff, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0068_23_ff, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0070_23_ff, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0078_23_ff, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0079_23_ff, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_007c_23_ff, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0080_23_ff, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0090_23_ff, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0098_23_ff, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a0_23_ff, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a8_23_ff, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b0_23_ff, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_00b8_23_ff, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b9_23_ff, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00d0_23_ff, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00e8_23_ff, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f0_23_ff, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f8_23_ff, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f9_23_ff, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00fa_23_ff, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00fb_23_ff, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0100_23_ff, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0108_23_ff, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0110_23_ff, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0118_23_ff, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0120_23_ff, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0128_23_ff, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0130_23_ff, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0138_23_ff, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0139_23_ff, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013a_23_ff, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013b_23_ff, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_013c_23_ff, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0140_23_ff, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0148_23_ff, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0150_23_ff, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0158_23_ff, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0160_23_ff, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0168_23_ff, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0170_23_ff, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0178_23_ff, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0179_23_ff, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0180_23_ff, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0188_23_ff, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_0190_23_ff, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0198_23_ff, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a0_23_ff, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a8_23_ff, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b0_23_ff, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b8_23_ff, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b9_23_ff, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01c0_23_ff, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01c8_23_ff, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_01d0_23_ff, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01d8_23_ff, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e0_23_ff, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e8_23_ff, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f0_23_ff, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_01f8_23_ff, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f9_23_ff, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0200_23_ff, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0210_23_ff, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0218_23_ff, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0220_23_ff, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0228_23_ff, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0230_23_ff, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0238_23_ff, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0239_23_ff, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_023c_23_ff, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0240_23_ff, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0250_23_ff, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0258_23_ff, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0260_23_ff, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0268_23_ff, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0270_23_ff, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0278_23_ff, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0279_23_ff, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_027c_23_ff, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0280_23_ff, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0290_23_ff, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0298_23_ff, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a0_23_ff, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a8_23_ff, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b0_23_ff, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_02b8_23_ff, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b9_23_ff, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02d0_23_ff, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02e8_23_ff, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f0_23_ff, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f8_23_ff, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f9_23_ff, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02fa_23_ff, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02fb_23_ff, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0400_23_ff, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0410_23_ff, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0418_23_ff, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0420_23_ff, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0428_23_ff, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0430_23_ff, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0438_23_ff, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0439_23_ff, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0440_23_ff, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0450_23_ff, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0458_23_ff, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0460_23_ff, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0468_23_ff, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0470_23_ff, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0478_23_ff, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0479_23_ff, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0480_23_ff, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0490_23_ff, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0498_23_ff, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a0_23_ff, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a8_23_ff, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b0_23_ff, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_04b8_23_ff, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b9_23_ff, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04d0_23_ff, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04e8_23_ff, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f0_23_ff, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f8_23_ff, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f9_23_ff, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04fa_23_ff, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04fb_23_ff, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0600_23_ff, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0610_23_ff, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0618_23_ff, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0620_23_ff, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0628_23_ff, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0630_23_ff, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0638_23_ff, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0639_23_ff, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0640_23_ff, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0650_23_ff, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0658_23_ff, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0660_23_ff, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0668_23_ff, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0670_23_ff, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0678_23_ff, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0679_23_ff, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0680_23_ff, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0690_23_ff, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0698_23_ff, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a0_23_ff, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a8_23_ff, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b0_23_ff, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_06b8_23_ff, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b9_23_ff, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06c0_23_ff, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06c8_23_ff, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06d0_23_ff, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06e8_23_ff, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f0_23_ff, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f8_23_ff, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f9_23_ff, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06fa_23_ff, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06fb_23_ff, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ NULL, op_0800_23_ff, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0810_23_ff, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0818_23_ff, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0820_23_ff, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0828_23_ff, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0830_23_ff, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0838_23_ff, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0839_23_ff, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083a_23_ff, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083b_23_ff, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0840_23_ff, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0850_23_ff, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0858_23_ff, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0860_23_ff, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0868_23_ff, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0870_23_ff, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0878_23_ff, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0879_23_ff, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0880_23_ff, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0890_23_ff, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0898_23_ff, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a0_23_ff, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a8_23_ff, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b0_23_ff, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b8_23_ff, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b9_23_ff, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08c0_23_ff, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d0_23_ff, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d8_23_ff, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e0_23_ff, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e8_23_ff, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f0_23_ff, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_08f8_23_ff, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f9_23_ff, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0a00_23_ff, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a10_23_ff, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a18_23_ff, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a20_23_ff, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a28_23_ff, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a30_23_ff, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a38_23_ff, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a39_23_ff, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a3c_23_ff, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a40_23_ff, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a50_23_ff, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a58_23_ff, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a60_23_ff, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a68_23_ff, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a70_23_ff, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a78_23_ff, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a79_23_ff, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a7c_23_ff, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a80_23_ff, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a90_23_ff, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a98_23_ff, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa0_23_ff, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa8_23_ff, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab0_23_ff, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab8_23_ff, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab9_23_ff, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad0_23_ff, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad8_23_ff, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae0_23_ff, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae8_23_ff, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af0_23_ff, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af8_23_ff, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af9_23_ff, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ NULL, op_0c00_23_ff, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c10_23_ff, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c18_23_ff, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c20_23_ff, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c28_23_ff, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c30_23_ff, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c38_23_ff, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c39_23_ff, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c3a_23_ff, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c3b_23_ff, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ NULL, op_0c40_23_ff, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c50_23_ff, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c58_23_ff, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c60_23_ff, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c68_23_ff, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c70_23_ff, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c78_23_ff, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c79_23_ff, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c7a_23_ff, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c7b_23_ff, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ NULL, op_0c80_23_ff, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c90_23_ff, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c98_23_ff, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca0_23_ff, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca8_23_ff, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb0_23_ff, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb8_23_ff, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb9_23_ff, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cba_23_ff, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cbb_23_ff, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd0_23_ff, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd8_23_ff, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce0_23_ff, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce8_23_ff, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf0_23_ff, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf8_23_ff, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf9_23_ff, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cfc_23_ff, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e10_23_ff, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e18_23_ff, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e20_23_ff, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e28_23_ff, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e30_23_ff, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e38_23_ff, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e39_23_ff, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e50_23_ff, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e58_23_ff, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e60_23_ff, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e68_23_ff, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e70_23_ff, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e78_23_ff, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e79_23_ff, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e90_23_ff, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e98_23_ff, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea0_23_ff, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea8_23_ff, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb0_23_ff, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb8_23_ff, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb9_23_ff, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed0_23_ff, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed8_23_ff, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee0_23_ff, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee8_23_ff, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef0_23_ff, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef8_23_ff, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef9_23_ff, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0efc_23_ff, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ NULL, op_1000_23_ff, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1010_23_ff, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1018_23_ff, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1020_23_ff, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1028_23_ff, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1030_23_ff, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1038_23_ff, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1039_23_ff, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103a_23_ff, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103b_23_ff, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_103c_23_ff, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1080_23_ff, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1090_23_ff, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1098_23_ff, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a0_23_ff, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a8_23_ff, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b0_23_ff, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b8_23_ff, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b9_23_ff, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10ba_23_ff, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bb_23_ff, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bc_23_ff, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10c0_23_ff, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d0_23_ff, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d8_23_ff, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e0_23_ff, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e8_23_ff, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f0_23_ff, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f8_23_ff, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f9_23_ff, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fa_23_ff, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fb_23_ff, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fc_23_ff, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1100_23_ff, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1110_23_ff, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1118_23_ff, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1120_23_ff, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1128_23_ff, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1130_23_ff, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1138_23_ff, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1139_23_ff, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113a_23_ff, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113b_23_ff, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_113c_23_ff, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1140_23_ff, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1150_23_ff, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1158_23_ff, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1160_23_ff, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1168_23_ff, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1170_23_ff, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1178_23_ff, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1179_23_ff, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117a_23_ff, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117b_23_ff, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_117c_23_ff, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1180_23_ff, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1190_23_ff, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1198_23_ff, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a0_23_ff, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a8_23_ff, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b0_23_ff, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11b8_23_ff, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b9_23_ff, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11ba_23_ff, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11bb_23_ff, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11bc_23_ff, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11c0_23_ff, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d0_23_ff, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d8_23_ff, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e0_23_ff, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e8_23_ff, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f0_23_ff, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f8_23_ff, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f9_23_ff, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fa_23_ff, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fb_23_ff, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fc_23_ff, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13c0_23_ff, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d0_23_ff, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d8_23_ff, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e0_23_ff, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e8_23_ff, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f0_23_ff, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f8_23_ff, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f9_23_ff, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fa_23_ff, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fb_23_ff, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fc_23_ff, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2000_23_ff, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2008_23_ff, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2010_23_ff, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2018_23_ff, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2020_23_ff, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2028_23_ff, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2030_23_ff, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2038_23_ff, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2039_23_ff, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203a_23_ff, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203b_23_ff, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_203c_23_ff, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2040_23_ff, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2048_23_ff, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2050_23_ff, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2058_23_ff, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2060_23_ff, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2068_23_ff, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2070_23_ff, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2078_23_ff, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2079_23_ff, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207a_23_ff, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207b_23_ff, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207c_23_ff, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2080_23_ff, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2088_23_ff, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2090_23_ff, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2098_23_ff, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a0_23_ff, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a8_23_ff, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b0_23_ff, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b8_23_ff, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b9_23_ff, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20ba_23_ff, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bb_23_ff, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bc_23_ff, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c0_23_ff, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c8_23_ff, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d0_23_ff, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d8_23_ff, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e0_23_ff, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e8_23_ff, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f0_23_ff, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f8_23_ff, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f9_23_ff, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fa_23_ff, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fb_23_ff, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fc_23_ff, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2100_23_ff, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2108_23_ff, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2110_23_ff, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2118_23_ff, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2120_23_ff, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2128_23_ff, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2130_23_ff, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2138_23_ff, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2139_23_ff, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213a_23_ff, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213b_23_ff, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_213c_23_ff, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2140_23_ff, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2148_23_ff, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2150_23_ff, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2158_23_ff, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2160_23_ff, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2168_23_ff, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2170_23_ff, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2178_23_ff, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2179_23_ff, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217a_23_ff, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217b_23_ff, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_217c_23_ff, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2180_23_ff, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2188_23_ff, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2190_23_ff, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2198_23_ff, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a0_23_ff, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a8_23_ff, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b0_23_ff, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21b8_23_ff, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b9_23_ff, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21ba_23_ff, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21bb_23_ff, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21bc_23_ff, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c0_23_ff, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c8_23_ff, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d0_23_ff, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d8_23_ff, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e0_23_ff, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e8_23_ff, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f0_23_ff, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f8_23_ff, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f9_23_ff, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fa_23_ff, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fb_23_ff, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fc_23_ff, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c0_23_ff, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c8_23_ff, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d0_23_ff, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d8_23_ff, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e0_23_ff, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e8_23_ff, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f0_23_ff, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f8_23_ff, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f9_23_ff, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fa_23_ff, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fb_23_ff, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fc_23_ff, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3000_23_ff, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3008_23_ff, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3010_23_ff, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3018_23_ff, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3020_23_ff, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3028_23_ff, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3030_23_ff, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3038_23_ff, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3039_23_ff, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303a_23_ff, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303b_23_ff, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_303c_23_ff, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3040_23_ff, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3048_23_ff, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3050_23_ff, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3058_23_ff, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3060_23_ff, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3068_23_ff, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3070_23_ff, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3078_23_ff, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3079_23_ff, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307a_23_ff, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307b_23_ff, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307c_23_ff, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3080_23_ff, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3088_23_ff, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3090_23_ff, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3098_23_ff, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a0_23_ff, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a8_23_ff, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b0_23_ff, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b8_23_ff, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b9_23_ff, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30ba_23_ff, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bb_23_ff, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bc_23_ff, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c0_23_ff, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c8_23_ff, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d0_23_ff, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d8_23_ff, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e0_23_ff, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e8_23_ff, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f0_23_ff, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f8_23_ff, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f9_23_ff, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fa_23_ff, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fb_23_ff, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fc_23_ff, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3100_23_ff, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3108_23_ff, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3110_23_ff, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3118_23_ff, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3120_23_ff, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3128_23_ff, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3130_23_ff, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3138_23_ff, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3139_23_ff, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313a_23_ff, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313b_23_ff, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_313c_23_ff, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3140_23_ff, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3148_23_ff, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3150_23_ff, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3158_23_ff, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3160_23_ff, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3168_23_ff, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3170_23_ff, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3178_23_ff, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3179_23_ff, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317a_23_ff, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317b_23_ff, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_317c_23_ff, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3180_23_ff, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3188_23_ff, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3190_23_ff, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3198_23_ff, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a0_23_ff, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a8_23_ff, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b0_23_ff, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31b8_23_ff, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b9_23_ff, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31ba_23_ff, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31bb_23_ff, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31bc_23_ff, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c0_23_ff, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c8_23_ff, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d0_23_ff, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d8_23_ff, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e0_23_ff, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e8_23_ff, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f0_23_ff, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f8_23_ff, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f9_23_ff, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fa_23_ff, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fb_23_ff, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fc_23_ff, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c0_23_ff, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c8_23_ff, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d0_23_ff, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d8_23_ff, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e0_23_ff, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e8_23_ff, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f0_23_ff, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f8_23_ff, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f9_23_ff, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fa_23_ff, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fb_23_ff, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fc_23_ff, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_4000_23_ff, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4010_23_ff, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4018_23_ff, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4020_23_ff, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4028_23_ff, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4030_23_ff, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4038_23_ff, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4039_23_ff, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4040_23_ff, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4050_23_ff, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4058_23_ff, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4060_23_ff, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4068_23_ff, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4070_23_ff, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4078_23_ff, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4079_23_ff, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4080_23_ff, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4090_23_ff, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4098_23_ff, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a0_23_ff, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a8_23_ff, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b0_23_ff, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b8_23_ff, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b9_23_ff, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40c0_23_ff, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d0_23_ff, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d8_23_ff, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e0_23_ff, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e8_23_ff, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f0_23_ff, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f8_23_ff, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f9_23_ff, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4100_23_ff, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4110_23_ff, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4118_23_ff, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4120_23_ff, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4128_23_ff, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4130_23_ff, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4138_23_ff, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4139_23_ff, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413a_23_ff, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413b_23_ff, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413c_23_ff, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ NULL, op_4180_23_ff, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4190_23_ff, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4198_23_ff, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a0_23_ff, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a8_23_ff, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b0_23_ff, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41b8_23_ff, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b9_23_ff, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41ba_23_ff, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41bb_23_ff, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41bc_23_ff, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41d0_23_ff, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41e8_23_ff, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f0_23_ff, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_41f8_23_ff, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f9_23_ff, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fa_23_ff, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fb_23_ff, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_4200_23_ff, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4210_23_ff, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4218_23_ff, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4220_23_ff, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4228_23_ff, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4230_23_ff, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4238_23_ff, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4239_23_ff, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4240_23_ff, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4250_23_ff, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4258_23_ff, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4260_23_ff, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4268_23_ff, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4270_23_ff, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4278_23_ff, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4279_23_ff, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4280_23_ff, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4290_23_ff, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4298_23_ff, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a0_23_ff, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a8_23_ff, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b0_23_ff, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_42b8_23_ff, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b9_23_ff, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42c0_23_ff, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d0_23_ff, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d8_23_ff, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e0_23_ff, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e8_23_ff, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f0_23_ff, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f8_23_ff, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f9_23_ff, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ NULL, op_4400_23_ff, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4410_23_ff, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4418_23_ff, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4420_23_ff, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4428_23_ff, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4430_23_ff, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4438_23_ff, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4439_23_ff, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4440_23_ff, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4450_23_ff, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4458_23_ff, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4460_23_ff, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4468_23_ff, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4470_23_ff, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4478_23_ff, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4479_23_ff, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4480_23_ff, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4490_23_ff, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4498_23_ff, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a0_23_ff, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a8_23_ff, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b0_23_ff, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_44b8_23_ff, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b9_23_ff, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44c0_23_ff, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d0_23_ff, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d8_23_ff, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e0_23_ff, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e8_23_ff, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f0_23_ff, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f8_23_ff, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f9_23_ff, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fa_23_ff, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fb_23_ff, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fc_23_ff, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4600_23_ff, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4610_23_ff, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4618_23_ff, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4620_23_ff, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4628_23_ff, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4630_23_ff, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4638_23_ff, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4639_23_ff, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4640_23_ff, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4650_23_ff, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4658_23_ff, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4660_23_ff, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4668_23_ff, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4670_23_ff, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4678_23_ff, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4679_23_ff, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4680_23_ff, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4690_23_ff, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4698_23_ff, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a0_23_ff, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a8_23_ff, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b0_23_ff, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_46b8_23_ff, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b9_23_ff, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46c0_23_ff, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d0_23_ff, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d8_23_ff, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e0_23_ff, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e8_23_ff, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f0_23_ff, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f8_23_ff, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f9_23_ff, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fa_23_ff, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fb_23_ff, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fc_23_ff, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4800_23_ff, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4808_23_ff, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ NULL, op_4810_23_ff, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4818_23_ff, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4820_23_ff, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4828_23_ff, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4830_23_ff, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ NULL, op_4838_23_ff, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4839_23_ff, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4840_23_ff, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4848_23_ff, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ NULL, op_4850_23_ff, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4868_23_ff, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4870_23_ff, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4878_23_ff, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4879_23_ff, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487a_23_ff, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487b_23_ff, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4880_23_ff, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_4890_23_ff, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a0_23_ff, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a8_23_ff, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b0_23_ff, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b8_23_ff, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b9_23_ff, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48c0_23_ff, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_48d0_23_ff, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e0_23_ff, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e8_23_ff, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f0_23_ff, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f8_23_ff, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f9_23_ff, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_49c0_23_ff, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ NULL, op_4a00_23_ff, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a10_23_ff, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a18_23_ff, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a20_23_ff, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a28_23_ff, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a30_23_ff, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a38_23_ff, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a39_23_ff, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3a_23_ff, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3b_23_ff, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3c_23_ff, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a40_23_ff, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a48_23_ff, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a50_23_ff, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a58_23_ff, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a60_23_ff, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a68_23_ff, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a70_23_ff, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a78_23_ff, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a79_23_ff, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7a_23_ff, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7b_23_ff, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7c_23_ff, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a80_23_ff, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a88_23_ff, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a90_23_ff, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a98_23_ff, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa0_23_ff, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa8_23_ff, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab0_23_ff, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4ab8_23_ff, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab9_23_ff, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4aba_23_ff, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4abb_23_ff, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4abc_23_ff, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4ac0_23_ff, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad0_23_ff, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad8_23_ff, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae0_23_ff, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae8_23_ff, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af0_23_ff, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ NULL, op_4af8_23_ff, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af9_23_ff, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c00_23_ff, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c10_23_ff, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c18_23_ff, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c20_23_ff, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c28_23_ff, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c30_23_ff, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c38_23_ff, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c39_23_ff, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3a_23_ff, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3b_23_ff, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3c_23_ff, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c40_23_ff, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c50_23_ff, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c58_23_ff, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c60_23_ff, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c68_23_ff, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c70_23_ff, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c78_23_ff, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c79_23_ff, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7a_23_ff, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7b_23_ff, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7c_23_ff, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ NULL, op_4c90_23_ff, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4c98_23_ff, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ca8_23_ff, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb0_23_ff, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb8_23_ff, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb9_23_ff, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cba_23_ff, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cbb_23_ff, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd0_23_ff, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd8_23_ff, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ce8_23_ff, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf0_23_ff, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf8_23_ff, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf9_23_ff, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfa_23_ff, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfb_23_ff, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4e40_23_ff, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ NULL, op_4e50_23_ff, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ NULL, op_4e58_23_ff, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ NULL, op_4e60_23_ff, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ NULL, op_4e68_23_ff, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ NULL, op_4e70_23_ff, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ NULL, op_4e71_23_ff, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ NULL, op_4e72_23_ff, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ NULL, op_4e73_23_ff, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e74_23_ff, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ NULL, op_4e75_23_ff, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ NULL, op_4e76_23_ff, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ NULL, op_4e77_23_ff, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7a_23_ff, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7b_23_ff, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ NULL, op_4e90_23_ff, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ NULL, op_4ea8_23_ff, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb0_23_ff, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4eb8_23_ff, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb9_23_ff, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ NULL, op_4eba_23_ff, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4ebb_23_ff, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4ed0_23_ff, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ NULL, op_4ee8_23_ff, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef0_23_ff, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_4ef8_23_ff, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef9_23_ff, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ NULL, op_4efa_23_ff, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4efb_23_ff, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_5000_23_ff, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5010_23_ff, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5018_23_ff, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5020_23_ff, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5028_23_ff, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5030_23_ff, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5038_23_ff, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5039_23_ff, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5040_23_ff, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5048_23_ff, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5050_23_ff, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5058_23_ff, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5060_23_ff, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5068_23_ff, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5070_23_ff, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5078_23_ff, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5079_23_ff, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5080_23_ff, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5088_23_ff, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5090_23_ff, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5098_23_ff, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a0_23_ff, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a8_23_ff, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b0_23_ff, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_50b8_23_ff, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b9_23_ff, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50c0_23_ff, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50c8_23_ff, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_50d0_23_ff, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50d8_23_ff, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e0_23_ff, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e8_23_ff, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f0_23_ff, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_50f8_23_ff, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f9_23_ff, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fa_23_ff, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fb_23_ff, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fc_23_ff, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5100_23_ff, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5110_23_ff, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5118_23_ff, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5120_23_ff, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5128_23_ff, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5130_23_ff, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5138_23_ff, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5139_23_ff, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5140_23_ff, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5148_23_ff, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5150_23_ff, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5158_23_ff, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5160_23_ff, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5168_23_ff, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5170_23_ff, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5178_23_ff, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5179_23_ff, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5180_23_ff, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5188_23_ff, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5190_23_ff, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5198_23_ff, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a0_23_ff, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a8_23_ff, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b0_23_ff, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_51b8_23_ff, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b9_23_ff, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51c0_23_ff, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51c8_23_ff, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_51d0_23_ff, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51d8_23_ff, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e0_23_ff, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e8_23_ff, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f0_23_ff, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_51f8_23_ff, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f9_23_ff, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fa_23_ff, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fb_23_ff, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fc_23_ff, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_52c0_23_ff, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52c8_23_ff, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_52d0_23_ff, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52d8_23_ff, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e0_23_ff, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e8_23_ff, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f0_23_ff, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_52f8_23_ff, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f9_23_ff, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fa_23_ff, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fb_23_ff, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fc_23_ff, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_53c0_23_ff, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53c8_23_ff, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_53d0_23_ff, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53d8_23_ff, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e0_23_ff, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e8_23_ff, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f0_23_ff, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_53f8_23_ff, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f9_23_ff, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fa_23_ff, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fb_23_ff, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fc_23_ff, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_54c0_23_ff, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54c8_23_ff, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_54d0_23_ff, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54d8_23_ff, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e0_23_ff, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e8_23_ff, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f0_23_ff, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_54f8_23_ff, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f9_23_ff, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fa_23_ff, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fb_23_ff, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fc_23_ff, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_55c0_23_ff, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55c8_23_ff, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_55d0_23_ff, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55d8_23_ff, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e0_23_ff, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e8_23_ff, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f0_23_ff, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_55f8_23_ff, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f9_23_ff, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fa_23_ff, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fb_23_ff, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fc_23_ff, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_56c0_23_ff, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56c8_23_ff, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_56d0_23_ff, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56d8_23_ff, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e0_23_ff, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e8_23_ff, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f0_23_ff, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_56f8_23_ff, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f9_23_ff, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fa_23_ff, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fb_23_ff, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fc_23_ff, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_57c0_23_ff, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57c8_23_ff, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_57d0_23_ff, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57d8_23_ff, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e0_23_ff, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e8_23_ff, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f0_23_ff, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_57f8_23_ff, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f9_23_ff, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fa_23_ff, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fb_23_ff, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fc_23_ff, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_58c0_23_ff, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58c8_23_ff, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_58d0_23_ff, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58d8_23_ff, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e0_23_ff, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e8_23_ff, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f0_23_ff, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_58f8_23_ff, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f9_23_ff, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fa_23_ff, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fb_23_ff, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fc_23_ff, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_59c0_23_ff, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59c8_23_ff, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_59d0_23_ff, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59d8_23_ff, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e0_23_ff, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e8_23_ff, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f0_23_ff, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_59f8_23_ff, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f9_23_ff, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fa_23_ff, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fb_23_ff, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fc_23_ff, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5ac0_23_ff, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ac8_23_ff, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ad0_23_ff, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ad8_23_ff, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae0_23_ff, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae8_23_ff, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af0_23_ff, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5af8_23_ff, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af9_23_ff, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afa_23_ff, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afb_23_ff, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afc_23_ff, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5bc0_23_ff, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bc8_23_ff, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5bd0_23_ff, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bd8_23_ff, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be0_23_ff, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be8_23_ff, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf0_23_ff, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf8_23_ff, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf9_23_ff, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfa_23_ff, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfb_23_ff, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfc_23_ff, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5cc0_23_ff, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cc8_23_ff, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5cd0_23_ff, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cd8_23_ff, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce0_23_ff, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce8_23_ff, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf0_23_ff, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf8_23_ff, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf9_23_ff, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfa_23_ff, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfb_23_ff, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfc_23_ff, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5dc0_23_ff, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dc8_23_ff, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5dd0_23_ff, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dd8_23_ff, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de0_23_ff, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de8_23_ff, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df0_23_ff, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5df8_23_ff, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df9_23_ff, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfa_23_ff, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfb_23_ff, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfc_23_ff, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5ec0_23_ff, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ec8_23_ff, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ed0_23_ff, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ed8_23_ff, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee0_23_ff, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee8_23_ff, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef0_23_ff, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef8_23_ff, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef9_23_ff, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efa_23_ff, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efb_23_ff, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efc_23_ff, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5fc0_23_ff, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fc8_23_ff, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5fd0_23_ff, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fd8_23_ff, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe0_23_ff, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe8_23_ff, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff0_23_ff, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff8_23_ff, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff9_23_ff, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffa_23_ff, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffb_23_ff, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffc_23_ff, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_6000_23_ff, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6001_23_ff, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_60ff_23_ff, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6100_23_ff, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ NULL, op_6101_23_ff, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ NULL, op_61ff_23_ff, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ NULL, op_6200_23_ff, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6201_23_ff, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_62ff_23_ff, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6300_23_ff, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6301_23_ff, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_63ff_23_ff, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6400_23_ff, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6401_23_ff, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_64ff_23_ff, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6500_23_ff, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6501_23_ff, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_65ff_23_ff, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6600_23_ff, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6601_23_ff, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_66ff_23_ff, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6700_23_ff, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6701_23_ff, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_67ff_23_ff, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6800_23_ff, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6801_23_ff, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_68ff_23_ff, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6900_23_ff, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6901_23_ff, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_69ff_23_ff, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6a00_23_ff, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6a01_23_ff, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6aff_23_ff, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6b00_23_ff, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6b01_23_ff, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6bff_23_ff, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6c00_23_ff, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6c01_23_ff, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6cff_23_ff, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6d00_23_ff, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6d01_23_ff, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6dff_23_ff, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6e00_23_ff, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6e01_23_ff, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6eff_23_ff, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6f00_23_ff, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6f01_23_ff, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6fff_23_ff, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_7000_23_ff, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_8000_23_ff, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8010_23_ff, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8018_23_ff, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8020_23_ff, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8028_23_ff, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8030_23_ff, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8038_23_ff, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8039_23_ff, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803a_23_ff, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803b_23_ff, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_803c_23_ff, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8040_23_ff, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8050_23_ff, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8058_23_ff, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8060_23_ff, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8068_23_ff, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8070_23_ff, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8078_23_ff, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8079_23_ff, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807a_23_ff, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807b_23_ff, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_807c_23_ff, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8080_23_ff, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8090_23_ff, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8098_23_ff, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a0_23_ff, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a8_23_ff, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b0_23_ff, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80b8_23_ff, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b9_23_ff, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80ba_23_ff, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80bb_23_ff, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80bc_23_ff, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80c0_23_ff, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d0_23_ff, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d8_23_ff, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e0_23_ff, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e8_23_ff, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f0_23_ff, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f8_23_ff, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f9_23_ff, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fa_23_ff, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fb_23_ff, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fc_23_ff, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_8100_23_ff, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8108_23_ff, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8110_23_ff, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8118_23_ff, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8120_23_ff, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8128_23_ff, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8130_23_ff, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8138_23_ff, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8139_23_ff, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8140_23_ff, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8148_23_ff, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ NULL, op_8150_23_ff, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8158_23_ff, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8160_23_ff, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8168_23_ff, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8170_23_ff, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8178_23_ff, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8179_23_ff, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8180_23_ff, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8188_23_ff, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ NULL, op_8190_23_ff, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8198_23_ff, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a0_23_ff, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a8_23_ff, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b0_23_ff, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_81b8_23_ff, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b9_23_ff, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81c0_23_ff, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d0_23_ff, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d8_23_ff, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e0_23_ff, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e8_23_ff, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f0_23_ff, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f8_23_ff, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f9_23_ff, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fa_23_ff, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fb_23_ff, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fc_23_ff, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_9000_23_ff, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9010_23_ff, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9018_23_ff, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9020_23_ff, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9028_23_ff, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9030_23_ff, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9038_23_ff, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9039_23_ff, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903a_23_ff, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903b_23_ff, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_903c_23_ff, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9040_23_ff, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9048_23_ff, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9050_23_ff, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9058_23_ff, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9060_23_ff, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9068_23_ff, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9070_23_ff, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9078_23_ff, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9079_23_ff, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907a_23_ff, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907b_23_ff, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_907c_23_ff, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9080_23_ff, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9088_23_ff, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9090_23_ff, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9098_23_ff, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a0_23_ff, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a8_23_ff, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b0_23_ff, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90b8_23_ff, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b9_23_ff, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90ba_23_ff, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90bb_23_ff, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90bc_23_ff, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90c0_23_ff, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90c8_23_ff, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d0_23_ff, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d8_23_ff, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e0_23_ff, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e8_23_ff, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f0_23_ff, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f8_23_ff, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f9_23_ff, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fa_23_ff, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fb_23_ff, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fc_23_ff, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_9100_23_ff, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9108_23_ff, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9110_23_ff, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9118_23_ff, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9120_23_ff, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9128_23_ff, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9130_23_ff, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9138_23_ff, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9139_23_ff, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9140_23_ff, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9148_23_ff, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9150_23_ff, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9158_23_ff, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9160_23_ff, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9168_23_ff, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9170_23_ff, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9178_23_ff, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9179_23_ff, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9180_23_ff, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9188_23_ff, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9190_23_ff, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9198_23_ff, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a0_23_ff, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a8_23_ff, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b0_23_ff, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_91b8_23_ff, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b9_23_ff, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91c0_23_ff, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91c8_23_ff, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d0_23_ff, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d8_23_ff, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e0_23_ff, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e8_23_ff, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f0_23_ff, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f8_23_ff, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f9_23_ff, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fa_23_ff, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fb_23_ff, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fc_23_ff, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_b000_23_ff, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b010_23_ff, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b018_23_ff, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b020_23_ff, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b028_23_ff, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b030_23_ff, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b038_23_ff, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b039_23_ff, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03a_23_ff, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03b_23_ff, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b03c_23_ff, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b040_23_ff, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b048_23_ff, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b050_23_ff, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b058_23_ff, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b060_23_ff, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b068_23_ff, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b070_23_ff, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b078_23_ff, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b079_23_ff, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07a_23_ff, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07b_23_ff, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b07c_23_ff, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b080_23_ff, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b088_23_ff, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b090_23_ff, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b098_23_ff, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a0_23_ff, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a8_23_ff, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b0_23_ff, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b8_23_ff, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b9_23_ff, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0ba_23_ff, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bb_23_ff, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bc_23_ff, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0c0_23_ff, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0c8_23_ff, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d0_23_ff, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d8_23_ff, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e0_23_ff, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e8_23_ff, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f0_23_ff, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f8_23_ff, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f9_23_ff, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fa_23_ff, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fb_23_ff, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fc_23_ff, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b100_23_ff, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b108_23_ff, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b110_23_ff, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b118_23_ff, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b120_23_ff, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b128_23_ff, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b130_23_ff, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b138_23_ff, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b139_23_ff, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b140_23_ff, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b148_23_ff, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b150_23_ff, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b158_23_ff, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b160_23_ff, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b168_23_ff, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b170_23_ff, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b178_23_ff, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b179_23_ff, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b180_23_ff, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b188_23_ff, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b190_23_ff, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b198_23_ff, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a0_23_ff, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a8_23_ff, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b0_23_ff, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b8_23_ff, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b9_23_ff, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1c0_23_ff, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1c8_23_ff, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d0_23_ff, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d8_23_ff, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e0_23_ff, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e8_23_ff, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f0_23_ff, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f8_23_ff, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f9_23_ff, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fa_23_ff, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fb_23_ff, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fc_23_ff, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_c000_23_ff, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c010_23_ff, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c018_23_ff, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c020_23_ff, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c028_23_ff, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c030_23_ff, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c038_23_ff, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c039_23_ff, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03a_23_ff, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03b_23_ff, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c03c_23_ff, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c040_23_ff, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c050_23_ff, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c058_23_ff, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c060_23_ff, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c068_23_ff, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c070_23_ff, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c078_23_ff, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c079_23_ff, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07a_23_ff, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07b_23_ff, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c07c_23_ff, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c080_23_ff, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c090_23_ff, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c098_23_ff, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a0_23_ff, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a8_23_ff, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b0_23_ff, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0b8_23_ff, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b9_23_ff, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0ba_23_ff, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0bb_23_ff, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0bc_23_ff, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0c0_23_ff, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d0_23_ff, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d8_23_ff, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e0_23_ff, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e8_23_ff, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f0_23_ff, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f8_23_ff, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f9_23_ff, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fa_23_ff, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fb_23_ff, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fc_23_ff, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c100_23_ff, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c108_23_ff, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c110_23_ff, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c118_23_ff, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c120_23_ff, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c128_23_ff, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c130_23_ff, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c138_23_ff, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c139_23_ff, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c140_23_ff, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c148_23_ff, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c150_23_ff, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c158_23_ff, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c160_23_ff, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c168_23_ff, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c170_23_ff, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c178_23_ff, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c179_23_ff, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c188_23_ff, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c190_23_ff, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c198_23_ff, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a0_23_ff, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a8_23_ff, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b0_23_ff, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c1b8_23_ff, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b9_23_ff, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1c0_23_ff, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d0_23_ff, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d8_23_ff, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e0_23_ff, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e8_23_ff, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f0_23_ff, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f8_23_ff, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f9_23_ff, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fa_23_ff, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fb_23_ff, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fc_23_ff, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_d000_23_ff, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d010_23_ff, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d018_23_ff, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d020_23_ff, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d028_23_ff, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d030_23_ff, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d038_23_ff, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d039_23_ff, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03a_23_ff, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03b_23_ff, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d03c_23_ff, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d040_23_ff, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d048_23_ff, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d050_23_ff, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d058_23_ff, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d060_23_ff, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d068_23_ff, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d070_23_ff, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d078_23_ff, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d079_23_ff, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07a_23_ff, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07b_23_ff, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d07c_23_ff, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d080_23_ff, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d088_23_ff, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d090_23_ff, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d098_23_ff, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a0_23_ff, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a8_23_ff, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b0_23_ff, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b8_23_ff, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b9_23_ff, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0ba_23_ff, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bb_23_ff, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bc_23_ff, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0c0_23_ff, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0c8_23_ff, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d0_23_ff, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d8_23_ff, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e0_23_ff, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e8_23_ff, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f0_23_ff, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f8_23_ff, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f9_23_ff, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fa_23_ff, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fb_23_ff, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fc_23_ff, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d100_23_ff, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d108_23_ff, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d110_23_ff, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d118_23_ff, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d120_23_ff, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d128_23_ff, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d130_23_ff, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d138_23_ff, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d139_23_ff, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d140_23_ff, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d148_23_ff, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d150_23_ff, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d158_23_ff, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d160_23_ff, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d168_23_ff, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d170_23_ff, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d178_23_ff, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d179_23_ff, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d180_23_ff, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d188_23_ff, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d190_23_ff, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d198_23_ff, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a0_23_ff, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a8_23_ff, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b0_23_ff, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b8_23_ff, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b9_23_ff, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1c0_23_ff, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1c8_23_ff, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d0_23_ff, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d8_23_ff, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e0_23_ff, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e8_23_ff, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f0_23_ff, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f8_23_ff, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f9_23_ff, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fa_23_ff, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fb_23_ff, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fc_23_ff, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_e000_23_ff, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e008_23_ff, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e010_23_ff, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e018_23_ff, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e020_23_ff, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e028_23_ff, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e030_23_ff, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e038_23_ff, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e040_23_ff, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e048_23_ff, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e050_23_ff, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e058_23_ff, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e060_23_ff, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e068_23_ff, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e070_23_ff, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e078_23_ff, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e080_23_ff, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e088_23_ff, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e090_23_ff, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e098_23_ff, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0a0_23_ff, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e0a8_23_ff, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e0b0_23_ff, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e0b8_23_ff, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0d0_23_ff, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0d8_23_ff, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e0_23_ff, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e8_23_ff, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f0_23_ff, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f8_23_ff, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f9_23_ff, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e100_23_ff, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e108_23_ff, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e110_23_ff, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e118_23_ff, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e120_23_ff, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e128_23_ff, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e130_23_ff, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e138_23_ff, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e140_23_ff, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e148_23_ff, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e150_23_ff, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e158_23_ff, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e160_23_ff, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e168_23_ff, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e170_23_ff, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e178_23_ff, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e180_23_ff, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e188_23_ff, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e190_23_ff, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e198_23_ff, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1a0_23_ff, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e1a8_23_ff, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e1b0_23_ff, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e1b8_23_ff, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1d0_23_ff, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1d8_23_ff, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e0_23_ff, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e8_23_ff, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f0_23_ff, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f8_23_ff, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f9_23_ff, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e2d0_23_ff, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2d8_23_ff, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e0_23_ff, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e8_23_ff, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f0_23_ff, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f8_23_ff, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f9_23_ff, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e3d0_23_ff, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3d8_23_ff, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e0_23_ff, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e8_23_ff, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f0_23_ff, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f8_23_ff, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f9_23_ff, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e4d0_23_ff, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4d8_23_ff, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e0_23_ff, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e8_23_ff, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f0_23_ff, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f8_23_ff, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f9_23_ff, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e5d0_23_ff, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5d8_23_ff, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e0_23_ff, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e8_23_ff, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f0_23_ff, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f8_23_ff, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f9_23_ff, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e6d0_23_ff, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6d8_23_ff, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e0_23_ff, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e8_23_ff, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f0_23_ff, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f8_23_ff, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f9_23_ff, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e7d0_23_ff, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7d8_23_ff, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e0_23_ff, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e8_23_ff, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f0_23_ff, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f8_23_ff, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f9_23_ff, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8c0_23_ff, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8d0_23_ff, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8e8_23_ff, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f0_23_ff, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f8_23_ff, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f9_23_ff, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8fa_23_ff, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8fb_23_ff, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9c0_23_ff, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9d0_23_ff, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9e8_23_ff, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f0_23_ff, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f8_23_ff, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f9_23_ff, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9fa_23_ff, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9fb_23_ff, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eac0_23_ff, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ead0_23_ff, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eae8_23_ff, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf0_23_ff, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf8_23_ff, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf9_23_ff, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebc0_23_ff, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebd0_23_ff, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebe8_23_ff, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf0_23_ff, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf8_23_ff, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf9_23_ff, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebfa_23_ff, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebfb_23_ff, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecc0_23_ff, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecd0_23_ff, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ece8_23_ff, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf0_23_ff, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf8_23_ff, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf9_23_ff, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edc0_23_ff, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edd0_23_ff, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ede8_23_ff, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf0_23_ff, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf8_23_ff, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf9_23_ff, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edfa_23_ff, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edfb_23_ff, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eec0_23_ff, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eed0_23_ff, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eee8_23_ff, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef0_23_ff, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef8_23_ff, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef9_23_ff, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efc0_23_ff, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efd0_23_ff, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efe8_23_ff, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff0_23_ff, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff8_23_ff, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff9_23_ff, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f000_23_ff, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f008_23_ff, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f010_23_ff, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f018_23_ff, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f020_23_ff, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f028_23_ff, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f030_23_ff, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f038_23_ff, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f039_23_ff, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f200_23_ff, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f208_23_ff, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f210_23_ff, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f218_23_ff, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f220_23_ff, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f228_23_ff, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f230_23_ff, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f238_23_ff, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f239_23_ff, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23a_23_ff, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23b_23_ff, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23c_23_ff, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f240_23_ff, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f248_23_ff, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f250_23_ff, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f258_23_ff, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f260_23_ff, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f268_23_ff, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f270_23_ff, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f278_23_ff, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f279_23_ff, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27a_23_ff, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27b_23_ff, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27c_23_ff, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f280_23_ff, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f2c0_23_ff, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f310_23_ff, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f320_23_ff, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f328_23_ff, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f330_23_ff, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f338_23_ff, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f339_23_ff, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f350_23_ff, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f358_23_ff, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f368_23_ff, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f370_23_ff, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f378_23_ff, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f379_23_ff, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f37a_23_ff, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f37b_23_ff, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_23 */ +#ifdef CPUEMU_24 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_24[] = { +{ NULL, op_0000_24_ff, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0010_24_ff, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0018_24_ff, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0020_24_ff, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0028_24_ff, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0030_24_ff, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0038_24_ff, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0039_24_ff, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_003c_24_ff, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0040_24_ff, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0050_24_ff, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0058_24_ff, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0060_24_ff, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0068_24_ff, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0070_24_ff, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0078_24_ff, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0079_24_ff, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_007c_24_ff, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0080_24_ff, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0090_24_ff, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0098_24_ff, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a0_24_ff, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a8_24_ff, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b0_24_ff, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_00b8_24_ff, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b9_24_ff, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00d0_24_ff, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00e8_24_ff, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f0_24_ff, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f8_24_ff, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f9_24_ff, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00fa_24_ff, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00fb_24_ff, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0100_24_ff, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0108_24_ff, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0110_24_ff, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0118_24_ff, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0120_24_ff, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0128_24_ff, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0130_24_ff, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0138_24_ff, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0139_24_ff, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013a_24_ff, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013b_24_ff, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_013c_24_ff, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0140_24_ff, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0148_24_ff, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0150_24_ff, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0158_24_ff, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0160_24_ff, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0168_24_ff, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0170_24_ff, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0178_24_ff, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0179_24_ff, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0180_24_ff, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0188_24_ff, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_0190_24_ff, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0198_24_ff, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a0_24_ff, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a8_24_ff, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b0_24_ff, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b8_24_ff, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b9_24_ff, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01c0_24_ff, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01c8_24_ff, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_01d0_24_ff, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01d8_24_ff, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e0_24_ff, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e8_24_ff, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f0_24_ff, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_01f8_24_ff, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f9_24_ff, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0200_24_ff, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0210_24_ff, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0218_24_ff, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0220_24_ff, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0228_24_ff, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0230_24_ff, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0238_24_ff, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0239_24_ff, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_023c_24_ff, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0240_24_ff, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0250_24_ff, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0258_24_ff, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0260_24_ff, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0268_24_ff, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0270_24_ff, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0278_24_ff, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0279_24_ff, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_027c_24_ff, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0280_24_ff, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0290_24_ff, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0298_24_ff, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a0_24_ff, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a8_24_ff, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b0_24_ff, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_02b8_24_ff, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b9_24_ff, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02d0_24_ff, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02e8_24_ff, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f0_24_ff, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f8_24_ff, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f9_24_ff, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02fa_24_ff, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02fb_24_ff, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0400_24_ff, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0410_24_ff, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0418_24_ff, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0420_24_ff, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0428_24_ff, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0430_24_ff, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0438_24_ff, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0439_24_ff, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0440_24_ff, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0450_24_ff, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0458_24_ff, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0460_24_ff, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0468_24_ff, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0470_24_ff, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0478_24_ff, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0479_24_ff, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0480_24_ff, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0490_24_ff, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0498_24_ff, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a0_24_ff, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a8_24_ff, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b0_24_ff, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_04b8_24_ff, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b9_24_ff, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04d0_24_ff, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04e8_24_ff, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f0_24_ff, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f8_24_ff, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f9_24_ff, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04fa_24_ff, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04fb_24_ff, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0600_24_ff, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0610_24_ff, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0618_24_ff, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0620_24_ff, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0628_24_ff, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0630_24_ff, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0638_24_ff, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0639_24_ff, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0640_24_ff, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0650_24_ff, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0658_24_ff, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0660_24_ff, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0668_24_ff, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0670_24_ff, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0678_24_ff, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0679_24_ff, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0680_24_ff, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0690_24_ff, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0698_24_ff, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a0_24_ff, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a8_24_ff, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b0_24_ff, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_06b8_24_ff, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b9_24_ff, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06c0_24_ff, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06c8_24_ff, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06d0_24_ff, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06e8_24_ff, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f0_24_ff, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f8_24_ff, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f9_24_ff, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06fa_24_ff, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06fb_24_ff, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ NULL, op_0800_24_ff, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0810_24_ff, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0818_24_ff, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0820_24_ff, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0828_24_ff, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0830_24_ff, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0838_24_ff, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0839_24_ff, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083a_24_ff, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083b_24_ff, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0840_24_ff, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0850_24_ff, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0858_24_ff, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0860_24_ff, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0868_24_ff, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0870_24_ff, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0878_24_ff, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0879_24_ff, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0880_24_ff, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0890_24_ff, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0898_24_ff, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a0_24_ff, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a8_24_ff, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b0_24_ff, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b8_24_ff, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b9_24_ff, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08c0_24_ff, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d0_24_ff, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d8_24_ff, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e0_24_ff, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e8_24_ff, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f0_24_ff, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_08f8_24_ff, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f9_24_ff, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0a00_24_ff, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a10_24_ff, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a18_24_ff, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a20_24_ff, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a28_24_ff, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a30_24_ff, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a38_24_ff, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a39_24_ff, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a3c_24_ff, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a40_24_ff, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a50_24_ff, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a58_24_ff, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a60_24_ff, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a68_24_ff, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a70_24_ff, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a78_24_ff, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a79_24_ff, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a7c_24_ff, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a80_24_ff, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a90_24_ff, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a98_24_ff, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa0_24_ff, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa8_24_ff, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab0_24_ff, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab8_24_ff, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab9_24_ff, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad0_24_ff, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad8_24_ff, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae0_24_ff, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae8_24_ff, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af0_24_ff, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af8_24_ff, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af9_24_ff, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ NULL, op_0c00_24_ff, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c10_24_ff, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c18_24_ff, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c20_24_ff, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c28_24_ff, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c30_24_ff, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c38_24_ff, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c39_24_ff, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c3a_24_ff, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c3b_24_ff, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ NULL, op_0c40_24_ff, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c50_24_ff, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c58_24_ff, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c60_24_ff, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c68_24_ff, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c70_24_ff, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c78_24_ff, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c79_24_ff, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c7a_24_ff, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c7b_24_ff, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ NULL, op_0c80_24_ff, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c90_24_ff, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c98_24_ff, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca0_24_ff, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca8_24_ff, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb0_24_ff, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb8_24_ff, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb9_24_ff, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cba_24_ff, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cbb_24_ff, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd0_24_ff, 0x0cd0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd8_24_ff, 0x0cd8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce0_24_ff, 0x0ce0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce8_24_ff, 0x0ce8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf0_24_ff, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf8_24_ff, 0x0cf8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf9_24_ff, 0x0cf9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cfc_24_ff, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e10_24_ff, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e18_24_ff, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e20_24_ff, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e28_24_ff, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e30_24_ff, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e38_24_ff, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e39_24_ff, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e50_24_ff, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e58_24_ff, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e60_24_ff, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e68_24_ff, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e70_24_ff, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e78_24_ff, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e79_24_ff, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e90_24_ff, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e98_24_ff, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea0_24_ff, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea8_24_ff, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb0_24_ff, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb8_24_ff, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb9_24_ff, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed0_24_ff, 0x0ed0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed8_24_ff, 0x0ed8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee0_24_ff, 0x0ee0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee8_24_ff, 0x0ee8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef0_24_ff, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef8_24_ff, 0x0ef8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef9_24_ff, 0x0ef9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0efc_24_ff, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ NULL, op_1000_24_ff, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1010_24_ff, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1018_24_ff, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1020_24_ff, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1028_24_ff, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1030_24_ff, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1038_24_ff, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1039_24_ff, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103a_24_ff, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103b_24_ff, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_103c_24_ff, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1080_24_ff, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1090_24_ff, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1098_24_ff, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a0_24_ff, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a8_24_ff, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b0_24_ff, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b8_24_ff, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b9_24_ff, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10ba_24_ff, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bb_24_ff, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bc_24_ff, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10c0_24_ff, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d0_24_ff, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d8_24_ff, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e0_24_ff, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e8_24_ff, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f0_24_ff, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f8_24_ff, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f9_24_ff, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fa_24_ff, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fb_24_ff, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fc_24_ff, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1100_24_ff, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1110_24_ff, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1118_24_ff, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1120_24_ff, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1128_24_ff, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1130_24_ff, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1138_24_ff, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1139_24_ff, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113a_24_ff, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113b_24_ff, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_113c_24_ff, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1140_24_ff, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1150_24_ff, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1158_24_ff, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1160_24_ff, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1168_24_ff, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1170_24_ff, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1178_24_ff, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1179_24_ff, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117a_24_ff, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117b_24_ff, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_117c_24_ff, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1180_24_ff, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1190_24_ff, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1198_24_ff, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a0_24_ff, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a8_24_ff, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b0_24_ff, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11b8_24_ff, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b9_24_ff, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11ba_24_ff, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11bb_24_ff, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11bc_24_ff, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11c0_24_ff, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d0_24_ff, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d8_24_ff, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e0_24_ff, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e8_24_ff, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f0_24_ff, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f8_24_ff, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f9_24_ff, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fa_24_ff, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fb_24_ff, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fc_24_ff, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13c0_24_ff, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d0_24_ff, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d8_24_ff, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e0_24_ff, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e8_24_ff, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f0_24_ff, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f8_24_ff, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f9_24_ff, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fa_24_ff, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fb_24_ff, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fc_24_ff, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2000_24_ff, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2008_24_ff, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2010_24_ff, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2018_24_ff, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2020_24_ff, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2028_24_ff, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2030_24_ff, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2038_24_ff, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2039_24_ff, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203a_24_ff, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203b_24_ff, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_203c_24_ff, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2040_24_ff, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2048_24_ff, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2050_24_ff, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2058_24_ff, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2060_24_ff, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2068_24_ff, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2070_24_ff, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2078_24_ff, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2079_24_ff, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207a_24_ff, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207b_24_ff, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207c_24_ff, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2080_24_ff, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2088_24_ff, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2090_24_ff, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2098_24_ff, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a0_24_ff, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a8_24_ff, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b0_24_ff, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b8_24_ff, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b9_24_ff, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20ba_24_ff, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bb_24_ff, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bc_24_ff, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c0_24_ff, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c8_24_ff, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d0_24_ff, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d8_24_ff, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e0_24_ff, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e8_24_ff, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f0_24_ff, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f8_24_ff, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f9_24_ff, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fa_24_ff, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fb_24_ff, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fc_24_ff, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2100_24_ff, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2108_24_ff, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2110_24_ff, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2118_24_ff, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2120_24_ff, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2128_24_ff, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2130_24_ff, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2138_24_ff, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2139_24_ff, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213a_24_ff, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213b_24_ff, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_213c_24_ff, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2140_24_ff, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2148_24_ff, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2150_24_ff, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2158_24_ff, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2160_24_ff, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2168_24_ff, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2170_24_ff, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2178_24_ff, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2179_24_ff, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217a_24_ff, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217b_24_ff, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_217c_24_ff, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2180_24_ff, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2188_24_ff, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2190_24_ff, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2198_24_ff, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a0_24_ff, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a8_24_ff, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b0_24_ff, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21b8_24_ff, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b9_24_ff, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21ba_24_ff, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21bb_24_ff, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21bc_24_ff, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c0_24_ff, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c8_24_ff, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d0_24_ff, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d8_24_ff, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e0_24_ff, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e8_24_ff, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f0_24_ff, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f8_24_ff, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f9_24_ff, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fa_24_ff, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fb_24_ff, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fc_24_ff, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c0_24_ff, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c8_24_ff, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d0_24_ff, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d8_24_ff, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e0_24_ff, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e8_24_ff, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f0_24_ff, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f8_24_ff, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f9_24_ff, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fa_24_ff, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fb_24_ff, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fc_24_ff, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3000_24_ff, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3008_24_ff, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3010_24_ff, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3018_24_ff, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3020_24_ff, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3028_24_ff, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3030_24_ff, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3038_24_ff, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3039_24_ff, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303a_24_ff, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303b_24_ff, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_303c_24_ff, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3040_24_ff, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3048_24_ff, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3050_24_ff, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3058_24_ff, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3060_24_ff, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3068_24_ff, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3070_24_ff, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3078_24_ff, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3079_24_ff, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307a_24_ff, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307b_24_ff, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307c_24_ff, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3080_24_ff, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3088_24_ff, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3090_24_ff, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3098_24_ff, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a0_24_ff, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a8_24_ff, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b0_24_ff, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b8_24_ff, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b9_24_ff, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30ba_24_ff, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bb_24_ff, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bc_24_ff, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c0_24_ff, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c8_24_ff, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d0_24_ff, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d8_24_ff, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e0_24_ff, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e8_24_ff, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f0_24_ff, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f8_24_ff, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f9_24_ff, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fa_24_ff, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fb_24_ff, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fc_24_ff, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3100_24_ff, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3108_24_ff, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3110_24_ff, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3118_24_ff, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3120_24_ff, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3128_24_ff, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3130_24_ff, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3138_24_ff, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3139_24_ff, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313a_24_ff, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313b_24_ff, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_313c_24_ff, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3140_24_ff, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3148_24_ff, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3150_24_ff, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3158_24_ff, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3160_24_ff, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3168_24_ff, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3170_24_ff, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3178_24_ff, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3179_24_ff, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317a_24_ff, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317b_24_ff, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_317c_24_ff, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3180_24_ff, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3188_24_ff, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3190_24_ff, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3198_24_ff, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a0_24_ff, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a8_24_ff, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b0_24_ff, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31b8_24_ff, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b9_24_ff, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31ba_24_ff, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31bb_24_ff, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31bc_24_ff, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c0_24_ff, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c8_24_ff, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d0_24_ff, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d8_24_ff, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e0_24_ff, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e8_24_ff, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f0_24_ff, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f8_24_ff, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f9_24_ff, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fa_24_ff, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fb_24_ff, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fc_24_ff, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c0_24_ff, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c8_24_ff, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d0_24_ff, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d8_24_ff, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e0_24_ff, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e8_24_ff, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f0_24_ff, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f8_24_ff, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f9_24_ff, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fa_24_ff, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fb_24_ff, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fc_24_ff, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_4000_24_ff, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4010_24_ff, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4018_24_ff, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4020_24_ff, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4028_24_ff, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4030_24_ff, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4038_24_ff, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4039_24_ff, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4040_24_ff, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4050_24_ff, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4058_24_ff, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4060_24_ff, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4068_24_ff, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4070_24_ff, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4078_24_ff, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4079_24_ff, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4080_24_ff, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4090_24_ff, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4098_24_ff, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a0_24_ff, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a8_24_ff, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b0_24_ff, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b8_24_ff, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b9_24_ff, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40c0_24_ff, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d0_24_ff, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d8_24_ff, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e0_24_ff, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e8_24_ff, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f0_24_ff, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f8_24_ff, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f9_24_ff, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4100_24_ff, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4110_24_ff, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4118_24_ff, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4120_24_ff, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4128_24_ff, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4130_24_ff, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4138_24_ff, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4139_24_ff, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413a_24_ff, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413b_24_ff, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413c_24_ff, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ NULL, op_4180_24_ff, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4190_24_ff, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4198_24_ff, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a0_24_ff, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a8_24_ff, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b0_24_ff, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41b8_24_ff, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b9_24_ff, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41ba_24_ff, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41bb_24_ff, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41bc_24_ff, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41d0_24_ff, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41e8_24_ff, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f0_24_ff, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_41f8_24_ff, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f9_24_ff, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fa_24_ff, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fb_24_ff, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_4200_24_ff, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4210_24_ff, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4218_24_ff, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4220_24_ff, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4228_24_ff, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4230_24_ff, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4238_24_ff, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4239_24_ff, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4240_24_ff, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4250_24_ff, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4258_24_ff, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4260_24_ff, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4268_24_ff, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4270_24_ff, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4278_24_ff, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4279_24_ff, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4280_24_ff, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4290_24_ff, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4298_24_ff, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a0_24_ff, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a8_24_ff, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b0_24_ff, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_42b8_24_ff, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b9_24_ff, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42c0_24_ff, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d0_24_ff, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d8_24_ff, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e0_24_ff, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e8_24_ff, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f0_24_ff, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f8_24_ff, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f9_24_ff, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ NULL, op_4400_24_ff, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4410_24_ff, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4418_24_ff, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4420_24_ff, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4428_24_ff, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4430_24_ff, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4438_24_ff, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4439_24_ff, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4440_24_ff, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4450_24_ff, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4458_24_ff, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4460_24_ff, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4468_24_ff, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4470_24_ff, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4478_24_ff, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4479_24_ff, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4480_24_ff, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4490_24_ff, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4498_24_ff, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a0_24_ff, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a8_24_ff, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b0_24_ff, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_44b8_24_ff, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b9_24_ff, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44c0_24_ff, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d0_24_ff, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d8_24_ff, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e0_24_ff, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e8_24_ff, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f0_24_ff, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f8_24_ff, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f9_24_ff, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fa_24_ff, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fb_24_ff, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fc_24_ff, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4600_24_ff, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4610_24_ff, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4618_24_ff, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4620_24_ff, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4628_24_ff, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4630_24_ff, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4638_24_ff, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4639_24_ff, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4640_24_ff, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4650_24_ff, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4658_24_ff, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4660_24_ff, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4668_24_ff, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4670_24_ff, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4678_24_ff, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4679_24_ff, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4680_24_ff, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4690_24_ff, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4698_24_ff, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a0_24_ff, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a8_24_ff, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b0_24_ff, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_46b8_24_ff, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b9_24_ff, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46c0_24_ff, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d0_24_ff, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d8_24_ff, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e0_24_ff, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e8_24_ff, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f0_24_ff, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f8_24_ff, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f9_24_ff, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fa_24_ff, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fb_24_ff, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fc_24_ff, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4800_24_ff, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4808_24_ff, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ NULL, op_4810_24_ff, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4818_24_ff, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4820_24_ff, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4828_24_ff, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4830_24_ff, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ NULL, op_4838_24_ff, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4839_24_ff, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4840_24_ff, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4848_24_ff, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ NULL, op_4850_24_ff, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4868_24_ff, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4870_24_ff, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4878_24_ff, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4879_24_ff, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487a_24_ff, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487b_24_ff, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4880_24_ff, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_4890_24_ff, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a0_24_ff, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a8_24_ff, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b0_24_ff, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b8_24_ff, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b9_24_ff, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48c0_24_ff, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_48d0_24_ff, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e0_24_ff, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e8_24_ff, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f0_24_ff, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f8_24_ff, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f9_24_ff, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_49c0_24_ff, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ NULL, op_4a00_24_ff, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a10_24_ff, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a18_24_ff, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a20_24_ff, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a28_24_ff, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a30_24_ff, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a38_24_ff, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a39_24_ff, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3a_24_ff, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3b_24_ff, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3c_24_ff, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a40_24_ff, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a48_24_ff, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a50_24_ff, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a58_24_ff, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a60_24_ff, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a68_24_ff, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a70_24_ff, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a78_24_ff, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a79_24_ff, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7a_24_ff, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7b_24_ff, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7c_24_ff, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a80_24_ff, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a88_24_ff, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a90_24_ff, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a98_24_ff, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa0_24_ff, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa8_24_ff, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab0_24_ff, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4ab8_24_ff, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab9_24_ff, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4aba_24_ff, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4abb_24_ff, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4abc_24_ff, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4ac0_24_ff, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4ac8_24_ff, 0x4ac8, 2, { 0, 0 }, 0 }, /* HALT */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4acc_24_ff, 0x4acc, 2, { 0, 0 }, 0 }, /* PULSE */ +#endif +{ NULL, op_4ad0_24_ff, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad8_24_ff, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae0_24_ff, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae8_24_ff, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af0_24_ff, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ NULL, op_4af8_24_ff, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af9_24_ff, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c00_24_ff, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c10_24_ff, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c18_24_ff, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c20_24_ff, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c28_24_ff, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c30_24_ff, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c38_24_ff, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c39_24_ff, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3a_24_ff, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3b_24_ff, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3c_24_ff, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c40_24_ff, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c50_24_ff, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c58_24_ff, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c60_24_ff, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c68_24_ff, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c70_24_ff, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c78_24_ff, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c79_24_ff, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7a_24_ff, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7b_24_ff, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7c_24_ff, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ NULL, op_4c90_24_ff, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4c98_24_ff, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ca8_24_ff, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb0_24_ff, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb8_24_ff, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb9_24_ff, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cba_24_ff, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cbb_24_ff, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd0_24_ff, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd8_24_ff, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ce8_24_ff, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf0_24_ff, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf8_24_ff, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf9_24_ff, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfa_24_ff, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfb_24_ff, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4e40_24_ff, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ NULL, op_4e50_24_ff, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ NULL, op_4e58_24_ff, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ NULL, op_4e60_24_ff, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ NULL, op_4e68_24_ff, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ NULL, op_4e70_24_ff, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ NULL, op_4e71_24_ff, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ NULL, op_4e72_24_ff, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ NULL, op_4e73_24_ff, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e74_24_ff, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ NULL, op_4e75_24_ff, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ NULL, op_4e76_24_ff, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ NULL, op_4e77_24_ff, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7a_24_ff, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7b_24_ff, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ NULL, op_4e90_24_ff, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ NULL, op_4ea8_24_ff, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb0_24_ff, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4eb8_24_ff, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb9_24_ff, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ NULL, op_4eba_24_ff, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4ebb_24_ff, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4ed0_24_ff, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ NULL, op_4ee8_24_ff, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef0_24_ff, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_4ef8_24_ff, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef9_24_ff, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ NULL, op_4efa_24_ff, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4efb_24_ff, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_5000_24_ff, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5010_24_ff, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5018_24_ff, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5020_24_ff, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5028_24_ff, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5030_24_ff, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5038_24_ff, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5039_24_ff, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5040_24_ff, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5048_24_ff, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5050_24_ff, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5058_24_ff, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5060_24_ff, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5068_24_ff, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5070_24_ff, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5078_24_ff, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5079_24_ff, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5080_24_ff, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5088_24_ff, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5090_24_ff, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5098_24_ff, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a0_24_ff, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a8_24_ff, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b0_24_ff, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_50b8_24_ff, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b9_24_ff, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50c0_24_ff, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50c8_24_ff, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_50d0_24_ff, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50d8_24_ff, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e0_24_ff, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e8_24_ff, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f0_24_ff, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_50f8_24_ff, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f9_24_ff, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fa_24_ff, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fb_24_ff, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fc_24_ff, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5100_24_ff, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5110_24_ff, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5118_24_ff, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5120_24_ff, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5128_24_ff, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5130_24_ff, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5138_24_ff, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5139_24_ff, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5140_24_ff, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5148_24_ff, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5150_24_ff, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5158_24_ff, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5160_24_ff, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5168_24_ff, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5170_24_ff, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5178_24_ff, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5179_24_ff, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5180_24_ff, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5188_24_ff, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5190_24_ff, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5198_24_ff, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a0_24_ff, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a8_24_ff, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b0_24_ff, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_51b8_24_ff, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b9_24_ff, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51c0_24_ff, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51c8_24_ff, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_51d0_24_ff, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51d8_24_ff, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e0_24_ff, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e8_24_ff, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f0_24_ff, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_51f8_24_ff, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f9_24_ff, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fa_24_ff, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fb_24_ff, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fc_24_ff, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_52c0_24_ff, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52c8_24_ff, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_52d0_24_ff, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52d8_24_ff, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e0_24_ff, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e8_24_ff, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f0_24_ff, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_52f8_24_ff, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f9_24_ff, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fa_24_ff, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fb_24_ff, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fc_24_ff, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_53c0_24_ff, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53c8_24_ff, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_53d0_24_ff, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53d8_24_ff, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e0_24_ff, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e8_24_ff, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f0_24_ff, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_53f8_24_ff, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f9_24_ff, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fa_24_ff, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fb_24_ff, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fc_24_ff, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_54c0_24_ff, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54c8_24_ff, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_54d0_24_ff, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54d8_24_ff, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e0_24_ff, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e8_24_ff, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f0_24_ff, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_54f8_24_ff, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f9_24_ff, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fa_24_ff, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fb_24_ff, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fc_24_ff, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_55c0_24_ff, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55c8_24_ff, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_55d0_24_ff, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55d8_24_ff, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e0_24_ff, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e8_24_ff, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f0_24_ff, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_55f8_24_ff, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f9_24_ff, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fa_24_ff, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fb_24_ff, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fc_24_ff, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_56c0_24_ff, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56c8_24_ff, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_56d0_24_ff, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56d8_24_ff, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e0_24_ff, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e8_24_ff, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f0_24_ff, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_56f8_24_ff, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f9_24_ff, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fa_24_ff, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fb_24_ff, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fc_24_ff, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_57c0_24_ff, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57c8_24_ff, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_57d0_24_ff, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57d8_24_ff, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e0_24_ff, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e8_24_ff, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f0_24_ff, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_57f8_24_ff, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f9_24_ff, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fa_24_ff, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fb_24_ff, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fc_24_ff, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_58c0_24_ff, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58c8_24_ff, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_58d0_24_ff, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58d8_24_ff, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e0_24_ff, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e8_24_ff, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f0_24_ff, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_58f8_24_ff, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f9_24_ff, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fa_24_ff, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fb_24_ff, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fc_24_ff, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_59c0_24_ff, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59c8_24_ff, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_59d0_24_ff, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59d8_24_ff, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e0_24_ff, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e8_24_ff, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f0_24_ff, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_59f8_24_ff, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f9_24_ff, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fa_24_ff, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fb_24_ff, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fc_24_ff, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5ac0_24_ff, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ac8_24_ff, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ad0_24_ff, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ad8_24_ff, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae0_24_ff, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae8_24_ff, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af0_24_ff, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5af8_24_ff, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af9_24_ff, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afa_24_ff, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afb_24_ff, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afc_24_ff, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5bc0_24_ff, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bc8_24_ff, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5bd0_24_ff, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bd8_24_ff, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be0_24_ff, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be8_24_ff, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf0_24_ff, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf8_24_ff, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf9_24_ff, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfa_24_ff, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfb_24_ff, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfc_24_ff, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5cc0_24_ff, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cc8_24_ff, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5cd0_24_ff, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cd8_24_ff, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce0_24_ff, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce8_24_ff, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf0_24_ff, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf8_24_ff, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf9_24_ff, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfa_24_ff, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfb_24_ff, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfc_24_ff, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5dc0_24_ff, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dc8_24_ff, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5dd0_24_ff, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dd8_24_ff, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de0_24_ff, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de8_24_ff, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df0_24_ff, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5df8_24_ff, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df9_24_ff, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfa_24_ff, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfb_24_ff, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfc_24_ff, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5ec0_24_ff, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ec8_24_ff, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ed0_24_ff, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ed8_24_ff, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee0_24_ff, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee8_24_ff, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef0_24_ff, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef8_24_ff, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef9_24_ff, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efa_24_ff, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efb_24_ff, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efc_24_ff, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5fc0_24_ff, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fc8_24_ff, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5fd0_24_ff, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fd8_24_ff, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe0_24_ff, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe8_24_ff, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff0_24_ff, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff8_24_ff, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff9_24_ff, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffa_24_ff, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffb_24_ff, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffc_24_ff, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_6000_24_ff, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6001_24_ff, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_60ff_24_ff, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6100_24_ff, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ NULL, op_6101_24_ff, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ NULL, op_61ff_24_ff, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ NULL, op_6200_24_ff, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6201_24_ff, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_62ff_24_ff, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6300_24_ff, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6301_24_ff, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_63ff_24_ff, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6400_24_ff, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6401_24_ff, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_64ff_24_ff, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6500_24_ff, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6501_24_ff, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_65ff_24_ff, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6600_24_ff, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6601_24_ff, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_66ff_24_ff, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6700_24_ff, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6701_24_ff, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_67ff_24_ff, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6800_24_ff, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6801_24_ff, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_68ff_24_ff, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6900_24_ff, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6901_24_ff, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_69ff_24_ff, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6a00_24_ff, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6a01_24_ff, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6aff_24_ff, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6b00_24_ff, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6b01_24_ff, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6bff_24_ff, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6c00_24_ff, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6c01_24_ff, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6cff_24_ff, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6d00_24_ff, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6d01_24_ff, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6dff_24_ff, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6e00_24_ff, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6e01_24_ff, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6eff_24_ff, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6f00_24_ff, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6f01_24_ff, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6fff_24_ff, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_7000_24_ff, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_8000_24_ff, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8010_24_ff, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8018_24_ff, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8020_24_ff, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8028_24_ff, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8030_24_ff, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8038_24_ff, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8039_24_ff, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803a_24_ff, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803b_24_ff, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_803c_24_ff, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8040_24_ff, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8050_24_ff, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8058_24_ff, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8060_24_ff, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8068_24_ff, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8070_24_ff, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8078_24_ff, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8079_24_ff, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807a_24_ff, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807b_24_ff, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_807c_24_ff, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8080_24_ff, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8090_24_ff, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8098_24_ff, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a0_24_ff, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a8_24_ff, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b0_24_ff, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80b8_24_ff, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b9_24_ff, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80ba_24_ff, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80bb_24_ff, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80bc_24_ff, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80c0_24_ff, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d0_24_ff, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d8_24_ff, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e0_24_ff, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e8_24_ff, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f0_24_ff, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f8_24_ff, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f9_24_ff, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fa_24_ff, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fb_24_ff, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fc_24_ff, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_8100_24_ff, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8108_24_ff, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8110_24_ff, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8118_24_ff, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8120_24_ff, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8128_24_ff, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8130_24_ff, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8138_24_ff, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8139_24_ff, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8140_24_ff, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8148_24_ff, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ NULL, op_8150_24_ff, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8158_24_ff, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8160_24_ff, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8168_24_ff, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8170_24_ff, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8178_24_ff, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8179_24_ff, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8180_24_ff, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8188_24_ff, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ NULL, op_8190_24_ff, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8198_24_ff, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a0_24_ff, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a8_24_ff, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b0_24_ff, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_81b8_24_ff, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b9_24_ff, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81c0_24_ff, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d0_24_ff, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d8_24_ff, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e0_24_ff, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e8_24_ff, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f0_24_ff, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f8_24_ff, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f9_24_ff, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fa_24_ff, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fb_24_ff, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fc_24_ff, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_9000_24_ff, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9010_24_ff, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9018_24_ff, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9020_24_ff, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9028_24_ff, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9030_24_ff, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9038_24_ff, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9039_24_ff, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903a_24_ff, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903b_24_ff, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_903c_24_ff, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9040_24_ff, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9048_24_ff, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9050_24_ff, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9058_24_ff, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9060_24_ff, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9068_24_ff, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9070_24_ff, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9078_24_ff, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9079_24_ff, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907a_24_ff, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907b_24_ff, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_907c_24_ff, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9080_24_ff, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9088_24_ff, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9090_24_ff, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9098_24_ff, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a0_24_ff, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a8_24_ff, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b0_24_ff, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90b8_24_ff, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b9_24_ff, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90ba_24_ff, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90bb_24_ff, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90bc_24_ff, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90c0_24_ff, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90c8_24_ff, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d0_24_ff, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d8_24_ff, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e0_24_ff, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e8_24_ff, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f0_24_ff, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f8_24_ff, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f9_24_ff, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fa_24_ff, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fb_24_ff, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fc_24_ff, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_9100_24_ff, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9108_24_ff, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9110_24_ff, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9118_24_ff, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9120_24_ff, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9128_24_ff, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9130_24_ff, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9138_24_ff, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9139_24_ff, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9140_24_ff, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9148_24_ff, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9150_24_ff, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9158_24_ff, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9160_24_ff, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9168_24_ff, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9170_24_ff, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9178_24_ff, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9179_24_ff, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9180_24_ff, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9188_24_ff, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9190_24_ff, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9198_24_ff, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a0_24_ff, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a8_24_ff, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b0_24_ff, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_91b8_24_ff, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b9_24_ff, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91c0_24_ff, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91c8_24_ff, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d0_24_ff, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d8_24_ff, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e0_24_ff, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e8_24_ff, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f0_24_ff, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f8_24_ff, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f9_24_ff, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fa_24_ff, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fb_24_ff, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fc_24_ff, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_b000_24_ff, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b010_24_ff, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b018_24_ff, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b020_24_ff, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b028_24_ff, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b030_24_ff, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b038_24_ff, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b039_24_ff, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03a_24_ff, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03b_24_ff, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b03c_24_ff, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b040_24_ff, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b048_24_ff, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b050_24_ff, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b058_24_ff, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b060_24_ff, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b068_24_ff, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b070_24_ff, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b078_24_ff, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b079_24_ff, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07a_24_ff, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07b_24_ff, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b07c_24_ff, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b080_24_ff, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b088_24_ff, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b090_24_ff, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b098_24_ff, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a0_24_ff, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a8_24_ff, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b0_24_ff, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b8_24_ff, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b9_24_ff, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0ba_24_ff, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bb_24_ff, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bc_24_ff, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0c0_24_ff, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0c8_24_ff, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d0_24_ff, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d8_24_ff, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e0_24_ff, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e8_24_ff, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f0_24_ff, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f8_24_ff, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f9_24_ff, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fa_24_ff, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fb_24_ff, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fc_24_ff, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b100_24_ff, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b108_24_ff, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b110_24_ff, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b118_24_ff, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b120_24_ff, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b128_24_ff, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b130_24_ff, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b138_24_ff, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b139_24_ff, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b140_24_ff, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b148_24_ff, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b150_24_ff, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b158_24_ff, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b160_24_ff, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b168_24_ff, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b170_24_ff, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b178_24_ff, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b179_24_ff, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b180_24_ff, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b188_24_ff, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b190_24_ff, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b198_24_ff, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a0_24_ff, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a8_24_ff, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b0_24_ff, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b8_24_ff, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b9_24_ff, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1c0_24_ff, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1c8_24_ff, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d0_24_ff, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d8_24_ff, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e0_24_ff, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e8_24_ff, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f0_24_ff, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f8_24_ff, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f9_24_ff, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fa_24_ff, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fb_24_ff, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fc_24_ff, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_c000_24_ff, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c010_24_ff, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c018_24_ff, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c020_24_ff, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c028_24_ff, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c030_24_ff, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c038_24_ff, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c039_24_ff, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03a_24_ff, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03b_24_ff, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c03c_24_ff, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c040_24_ff, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c050_24_ff, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c058_24_ff, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c060_24_ff, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c068_24_ff, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c070_24_ff, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c078_24_ff, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c079_24_ff, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07a_24_ff, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07b_24_ff, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c07c_24_ff, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c080_24_ff, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c090_24_ff, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c098_24_ff, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a0_24_ff, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a8_24_ff, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b0_24_ff, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0b8_24_ff, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b9_24_ff, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0ba_24_ff, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0bb_24_ff, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0bc_24_ff, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0c0_24_ff, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d0_24_ff, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d8_24_ff, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e0_24_ff, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e8_24_ff, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f0_24_ff, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f8_24_ff, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f9_24_ff, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fa_24_ff, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fb_24_ff, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fc_24_ff, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c100_24_ff, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c108_24_ff, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c110_24_ff, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c118_24_ff, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c120_24_ff, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c128_24_ff, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c130_24_ff, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c138_24_ff, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c139_24_ff, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c140_24_ff, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c148_24_ff, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c150_24_ff, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c158_24_ff, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c160_24_ff, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c168_24_ff, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c170_24_ff, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c178_24_ff, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c179_24_ff, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c188_24_ff, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c190_24_ff, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c198_24_ff, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a0_24_ff, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a8_24_ff, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b0_24_ff, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c1b8_24_ff, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b9_24_ff, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1c0_24_ff, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d0_24_ff, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d8_24_ff, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e0_24_ff, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e8_24_ff, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f0_24_ff, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f8_24_ff, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f9_24_ff, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fa_24_ff, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fb_24_ff, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fc_24_ff, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_d000_24_ff, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d010_24_ff, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d018_24_ff, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d020_24_ff, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d028_24_ff, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d030_24_ff, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d038_24_ff, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d039_24_ff, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03a_24_ff, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03b_24_ff, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d03c_24_ff, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d040_24_ff, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d048_24_ff, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d050_24_ff, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d058_24_ff, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d060_24_ff, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d068_24_ff, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d070_24_ff, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d078_24_ff, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d079_24_ff, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07a_24_ff, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07b_24_ff, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d07c_24_ff, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d080_24_ff, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d088_24_ff, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d090_24_ff, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d098_24_ff, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a0_24_ff, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a8_24_ff, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b0_24_ff, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b8_24_ff, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b9_24_ff, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0ba_24_ff, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bb_24_ff, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bc_24_ff, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0c0_24_ff, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0c8_24_ff, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d0_24_ff, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d8_24_ff, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e0_24_ff, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e8_24_ff, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f0_24_ff, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f8_24_ff, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f9_24_ff, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fa_24_ff, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fb_24_ff, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fc_24_ff, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d100_24_ff, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d108_24_ff, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d110_24_ff, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d118_24_ff, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d120_24_ff, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d128_24_ff, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d130_24_ff, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d138_24_ff, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d139_24_ff, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d140_24_ff, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d148_24_ff, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d150_24_ff, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d158_24_ff, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d160_24_ff, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d168_24_ff, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d170_24_ff, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d178_24_ff, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d179_24_ff, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d180_24_ff, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d188_24_ff, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d190_24_ff, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d198_24_ff, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a0_24_ff, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a8_24_ff, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b0_24_ff, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b8_24_ff, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b9_24_ff, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1c0_24_ff, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1c8_24_ff, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d0_24_ff, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d8_24_ff, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e0_24_ff, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e8_24_ff, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f0_24_ff, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f8_24_ff, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f9_24_ff, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fa_24_ff, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fb_24_ff, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fc_24_ff, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_e000_24_ff, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e008_24_ff, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e010_24_ff, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e018_24_ff, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e020_24_ff, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e028_24_ff, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e030_24_ff, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e038_24_ff, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e040_24_ff, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e048_24_ff, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e050_24_ff, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e058_24_ff, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e060_24_ff, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e068_24_ff, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e070_24_ff, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e078_24_ff, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e080_24_ff, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e088_24_ff, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e090_24_ff, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e098_24_ff, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0a0_24_ff, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e0a8_24_ff, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e0b0_24_ff, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e0b8_24_ff, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0d0_24_ff, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0d8_24_ff, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e0_24_ff, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e8_24_ff, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f0_24_ff, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f8_24_ff, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f9_24_ff, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e100_24_ff, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e108_24_ff, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e110_24_ff, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e118_24_ff, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e120_24_ff, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e128_24_ff, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e130_24_ff, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e138_24_ff, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e140_24_ff, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e148_24_ff, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e150_24_ff, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e158_24_ff, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e160_24_ff, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e168_24_ff, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e170_24_ff, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e178_24_ff, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e180_24_ff, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e188_24_ff, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e190_24_ff, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e198_24_ff, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1a0_24_ff, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e1a8_24_ff, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e1b0_24_ff, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e1b8_24_ff, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1d0_24_ff, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1d8_24_ff, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e0_24_ff, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e8_24_ff, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f0_24_ff, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f8_24_ff, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f9_24_ff, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e2d0_24_ff, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2d8_24_ff, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e0_24_ff, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e8_24_ff, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f0_24_ff, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f8_24_ff, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f9_24_ff, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e3d0_24_ff, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3d8_24_ff, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e0_24_ff, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e8_24_ff, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f0_24_ff, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f8_24_ff, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f9_24_ff, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e4d0_24_ff, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4d8_24_ff, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e0_24_ff, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e8_24_ff, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f0_24_ff, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f8_24_ff, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f9_24_ff, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e5d0_24_ff, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5d8_24_ff, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e0_24_ff, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e8_24_ff, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f0_24_ff, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f8_24_ff, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f9_24_ff, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e6d0_24_ff, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6d8_24_ff, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e0_24_ff, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e8_24_ff, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f0_24_ff, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f8_24_ff, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f9_24_ff, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e7d0_24_ff, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7d8_24_ff, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e0_24_ff, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e8_24_ff, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f0_24_ff, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f8_24_ff, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f9_24_ff, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8c0_24_ff, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8d0_24_ff, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8e8_24_ff, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f0_24_ff, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f8_24_ff, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f9_24_ff, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8fa_24_ff, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8fb_24_ff, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9c0_24_ff, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9d0_24_ff, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9e8_24_ff, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f0_24_ff, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f8_24_ff, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f9_24_ff, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9fa_24_ff, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9fb_24_ff, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eac0_24_ff, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ead0_24_ff, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eae8_24_ff, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf0_24_ff, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf8_24_ff, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf9_24_ff, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebc0_24_ff, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebd0_24_ff, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebe8_24_ff, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf0_24_ff, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf8_24_ff, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf9_24_ff, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebfa_24_ff, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebfb_24_ff, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecc0_24_ff, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecd0_24_ff, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ece8_24_ff, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf0_24_ff, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf8_24_ff, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf9_24_ff, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edc0_24_ff, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edd0_24_ff, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ede8_24_ff, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf0_24_ff, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf8_24_ff, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf9_24_ff, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edfa_24_ff, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edfb_24_ff, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eec0_24_ff, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eed0_24_ff, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eee8_24_ff, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef0_24_ff, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef8_24_ff, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef9_24_ff, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efc0_24_ff, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efd0_24_ff, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efe8_24_ff, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff0_24_ff, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff8_24_ff, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff9_24_ff, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f000_24_ff, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f008_24_ff, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f010_24_ff, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f018_24_ff, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f020_24_ff, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f028_24_ff, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f030_24_ff, 0xf030, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f038_24_ff, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f039_24_ff, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f200_24_ff, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f208_24_ff, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f210_24_ff, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f218_24_ff, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f220_24_ff, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f228_24_ff, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f230_24_ff, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f238_24_ff, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f239_24_ff, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23a_24_ff, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23b_24_ff, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23c_24_ff, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f240_24_ff, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f248_24_ff, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f250_24_ff, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f258_24_ff, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f260_24_ff, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f268_24_ff, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f270_24_ff, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f278_24_ff, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f279_24_ff, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27a_24_ff, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27b_24_ff, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27c_24_ff, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f280_24_ff, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f2c0_24_ff, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f310_24_ff, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f320_24_ff, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f328_24_ff, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f330_24_ff, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f338_24_ff, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f339_24_ff, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f350_24_ff, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f358_24_ff, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f368_24_ff, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f370_24_ff, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f378_24_ff, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f379_24_ff, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f37a_24_ff, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f37b_24_ff, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f408_24_ff, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f410_24_ff, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f418_24_ff, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f419_24_ff, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f41a_24_ff, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f41b_24_ff, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f41c_24_ff, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f41d_24_ff, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f41e_24_ff, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f41f_24_ff, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f428_24_ff, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f430_24_ff, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f438_24_ff, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f439_24_ff, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f43a_24_ff, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f43b_24_ff, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f43c_24_ff, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f43d_24_ff, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f43e_24_ff, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f43f_24_ff, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f500_24_ff, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f508_24_ff, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f510_24_ff, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f518_24_ff, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f548_24_ff, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f568_24_ff, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f588_24_ff, 0xf588, -1, { 0, 0 }, 0 }, /* PLPAW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f5c8_24_ff, 0xf5c8, -1, { 0, 0 }, 0 }, /* PLPAR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f600_24_ff, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f608_24_ff, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f610_24_ff, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f618_24_ff, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f620_24_ff, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f800_24_ff, 0xf800, -1, { 0, 0 }, 0 }, /* LPSTOP */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_24 */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_25[] = { +{ NULL, op_0000_24_ff, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0010_24_ff, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0018_24_ff, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0020_24_ff, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0028_24_ff, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0030_24_ff, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0038_24_ff, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0039_24_ff, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_003c_25_ff, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0040_24_ff, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0050_24_ff, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0058_24_ff, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0060_24_ff, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0068_24_ff, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0070_24_ff, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0078_24_ff, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0079_24_ff, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_007c_25_ff, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0080_24_ff, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0090_24_ff, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0098_24_ff, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a0_24_ff, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a8_24_ff, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b0_24_ff, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_00b8_24_ff, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b9_24_ff, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00d0_24_ff, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_00e8_24_ff, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_00f0_24_ff, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ NULL, op_00f8_24_ff, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_00f9_24_ff, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_00fa_24_ff, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_00fb_24_ff, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ NULL, op_0100_24_ff, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0108_24_ff, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0110_24_ff, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0118_24_ff, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0120_24_ff, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0128_24_ff, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0130_24_ff, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0138_24_ff, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0139_24_ff, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013a_24_ff, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013b_24_ff, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_013c_24_ff, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0140_24_ff, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0148_24_ff, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0150_24_ff, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0158_24_ff, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0160_24_ff, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0168_24_ff, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0170_24_ff, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0178_24_ff, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0179_24_ff, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0180_24_ff, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0188_24_ff, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_0190_24_ff, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0198_24_ff, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a0_24_ff, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a8_24_ff, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b0_24_ff, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b8_24_ff, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b9_24_ff, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01c0_24_ff, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01c8_24_ff, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_01d0_24_ff, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01d8_24_ff, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e0_24_ff, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e8_24_ff, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f0_24_ff, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_01f8_24_ff, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f9_24_ff, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0200_24_ff, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0210_24_ff, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0218_24_ff, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0220_24_ff, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0228_24_ff, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0230_24_ff, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0238_24_ff, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0239_24_ff, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_023c_25_ff, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0240_24_ff, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0250_24_ff, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0258_24_ff, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0260_24_ff, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0268_24_ff, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0270_24_ff, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0278_24_ff, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0279_24_ff, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_027c_25_ff, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0280_24_ff, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0290_24_ff, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0298_24_ff, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a0_24_ff, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a8_24_ff, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b0_24_ff, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_02b8_24_ff, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b9_24_ff, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02d0_24_ff, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_02e8_24_ff, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_02f0_24_ff, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ NULL, op_02f8_24_ff, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_02f9_24_ff, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_02fa_24_ff, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_02fb_24_ff, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ NULL, op_0400_24_ff, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0410_24_ff, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0418_24_ff, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0420_24_ff, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0428_24_ff, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0430_24_ff, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0438_24_ff, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0439_24_ff, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0440_24_ff, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0450_24_ff, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0458_24_ff, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0460_24_ff, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0468_24_ff, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0470_24_ff, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0478_24_ff, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0479_24_ff, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0480_24_ff, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0490_24_ff, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0498_24_ff, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a0_24_ff, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a8_24_ff, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b0_24_ff, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_04b8_24_ff, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b9_24_ff, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04d0_24_ff, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_04e8_24_ff, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_04f0_24_ff, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ NULL, op_04f8_24_ff, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_04f9_24_ff, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_04fa_24_ff, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ NULL, op_04fb_24_ff, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ NULL, op_0600_24_ff, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0610_24_ff, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0618_24_ff, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0620_24_ff, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0628_24_ff, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0630_24_ff, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0638_24_ff, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0639_24_ff, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0640_24_ff, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0650_24_ff, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0658_24_ff, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0660_24_ff, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0668_24_ff, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0670_24_ff, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0678_24_ff, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0679_24_ff, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0680_24_ff, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0690_24_ff, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0698_24_ff, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a0_24_ff, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a8_24_ff, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b0_24_ff, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_06b8_24_ff, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b9_24_ff, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06c0_24_ff, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ NULL, op_06c8_24_ff, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ NULL, op_06d0_24_ff, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ NULL, op_06e8_24_ff, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ NULL, op_06f0_24_ff, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ NULL, op_06f8_24_ff, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ NULL, op_06f9_24_ff, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ NULL, op_06fa_24_ff, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ NULL, op_06fb_24_ff, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ NULL, op_0800_24_ff, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0810_24_ff, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0818_24_ff, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0820_24_ff, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0828_24_ff, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0830_24_ff, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0838_24_ff, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0839_24_ff, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083a_24_ff, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083b_24_ff, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0840_24_ff, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0850_24_ff, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0858_24_ff, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0860_24_ff, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0868_24_ff, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0870_24_ff, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0878_24_ff, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0879_24_ff, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0880_24_ff, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0890_24_ff, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0898_24_ff, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a0_24_ff, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a8_24_ff, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b0_24_ff, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b8_24_ff, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b9_24_ff, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08c0_24_ff, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d0_24_ff, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d8_24_ff, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e0_24_ff, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e8_24_ff, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f0_24_ff, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_08f8_24_ff, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f9_24_ff, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0a00_24_ff, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a10_24_ff, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a18_24_ff, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a20_24_ff, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a28_24_ff, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a30_24_ff, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a38_24_ff, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a39_24_ff, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a3c_25_ff, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a40_24_ff, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a50_24_ff, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a58_24_ff, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a60_24_ff, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a68_24_ff, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a70_24_ff, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a78_24_ff, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a79_24_ff, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a7c_25_ff, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a80_24_ff, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a90_24_ff, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a98_24_ff, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa0_24_ff, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa8_24_ff, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab0_24_ff, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab8_24_ff, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab9_24_ff, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad0_25_ff, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad8_25_ff, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae0_25_ff, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae8_25_ff, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af0_25_ff, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af8_25_ff, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af9_25_ff, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ NULL, op_0c00_24_ff, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c10_24_ff, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c18_24_ff, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c20_24_ff, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c28_24_ff, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c30_24_ff, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c38_24_ff, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c39_24_ff, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c3a_24_ff, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c3b_24_ff, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c40_24_ff, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c50_24_ff, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c58_24_ff, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c60_24_ff, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c68_24_ff, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c70_24_ff, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c78_24_ff, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c79_24_ff, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c7a_24_ff, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c7b_24_ff, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c80_24_ff, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c90_24_ff, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c98_24_ff, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca0_24_ff, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca8_24_ff, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb0_24_ff, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb8_24_ff, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb9_24_ff, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cba_24_ff, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cbb_24_ff, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd0_25_ff, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd8_25_ff, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce0_25_ff, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce8_25_ff, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf0_25_ff, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf8_25_ff, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf9_25_ff, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cfc_25_ff, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e10_25_ff, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e18_25_ff, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e20_25_ff, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e28_25_ff, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e30_25_ff, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e38_25_ff, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e39_25_ff, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e50_25_ff, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e58_25_ff, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e60_25_ff, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e68_25_ff, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e70_25_ff, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e78_25_ff, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e79_25_ff, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e90_25_ff, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e98_25_ff, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea0_25_ff, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea8_25_ff, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb0_25_ff, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb8_25_ff, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb9_25_ff, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed0_25_ff, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed8_25_ff, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee0_25_ff, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee8_25_ff, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef0_25_ff, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef8_25_ff, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef9_25_ff, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0efc_25_ff, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ NULL, op_1000_24_ff, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1010_24_ff, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1018_24_ff, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1020_24_ff, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1028_24_ff, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1030_24_ff, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1038_24_ff, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1039_24_ff, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103a_24_ff, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103b_24_ff, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_103c_24_ff, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1080_24_ff, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1090_24_ff, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1098_24_ff, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a0_24_ff, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a8_24_ff, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b0_24_ff, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b8_24_ff, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b9_24_ff, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10ba_24_ff, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bb_24_ff, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bc_24_ff, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10c0_24_ff, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d0_24_ff, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d8_24_ff, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e0_24_ff, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e8_24_ff, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f0_24_ff, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f8_24_ff, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f9_24_ff, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fa_24_ff, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fb_24_ff, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fc_24_ff, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1100_24_ff, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1110_24_ff, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1118_24_ff, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1120_24_ff, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1128_24_ff, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1130_24_ff, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1138_24_ff, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1139_24_ff, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113a_24_ff, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113b_24_ff, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_113c_24_ff, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1140_24_ff, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1150_24_ff, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1158_24_ff, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1160_24_ff, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1168_24_ff, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1170_24_ff, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1178_24_ff, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1179_24_ff, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117a_24_ff, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117b_24_ff, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_117c_24_ff, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1180_24_ff, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1190_24_ff, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1198_24_ff, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a0_24_ff, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a8_24_ff, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b0_24_ff, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11b8_24_ff, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b9_24_ff, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11ba_24_ff, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11bb_24_ff, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11bc_24_ff, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11c0_24_ff, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d0_24_ff, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d8_24_ff, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e0_24_ff, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e8_24_ff, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f0_24_ff, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f8_24_ff, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f9_24_ff, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fa_24_ff, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fb_24_ff, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fc_24_ff, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13c0_24_ff, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d0_24_ff, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d8_24_ff, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e0_24_ff, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e8_24_ff, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f0_24_ff, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f8_24_ff, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f9_24_ff, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fa_24_ff, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fb_24_ff, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fc_24_ff, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2000_24_ff, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2008_24_ff, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2010_24_ff, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2018_24_ff, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2020_24_ff, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2028_24_ff, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2030_24_ff, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2038_24_ff, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2039_24_ff, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203a_24_ff, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203b_24_ff, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_203c_24_ff, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2040_24_ff, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2048_24_ff, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2050_24_ff, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2058_24_ff, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2060_24_ff, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2068_24_ff, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2070_24_ff, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2078_24_ff, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2079_24_ff, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207a_24_ff, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207b_24_ff, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207c_24_ff, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2080_24_ff, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2088_24_ff, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2090_24_ff, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2098_24_ff, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a0_24_ff, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a8_24_ff, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b0_24_ff, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b8_24_ff, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b9_24_ff, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20ba_24_ff, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bb_24_ff, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bc_24_ff, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c0_24_ff, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c8_24_ff, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d0_24_ff, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d8_24_ff, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e0_24_ff, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e8_24_ff, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f0_24_ff, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f8_24_ff, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f9_24_ff, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fa_24_ff, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fb_24_ff, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fc_24_ff, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2100_24_ff, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2108_24_ff, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2110_24_ff, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2118_24_ff, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2120_24_ff, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2128_24_ff, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2130_24_ff, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2138_24_ff, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2139_24_ff, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213a_24_ff, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213b_24_ff, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_213c_24_ff, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2140_24_ff, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2148_24_ff, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2150_24_ff, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2158_24_ff, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2160_24_ff, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2168_24_ff, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2170_24_ff, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2178_24_ff, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2179_24_ff, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217a_24_ff, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217b_24_ff, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_217c_24_ff, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2180_24_ff, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2188_24_ff, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2190_24_ff, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2198_24_ff, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a0_24_ff, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a8_24_ff, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b0_24_ff, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21b8_24_ff, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b9_24_ff, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21ba_24_ff, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21bb_24_ff, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21bc_24_ff, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c0_24_ff, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c8_24_ff, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d0_24_ff, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d8_24_ff, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e0_24_ff, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e8_24_ff, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f0_24_ff, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f8_24_ff, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f9_24_ff, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fa_24_ff, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fb_24_ff, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fc_24_ff, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c0_24_ff, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c8_24_ff, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d0_24_ff, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d8_24_ff, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e0_24_ff, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e8_24_ff, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f0_24_ff, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f8_24_ff, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f9_24_ff, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fa_24_ff, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fb_24_ff, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fc_24_ff, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3000_24_ff, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3008_24_ff, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3010_24_ff, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3018_24_ff, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3020_24_ff, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3028_24_ff, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3030_24_ff, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3038_24_ff, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3039_24_ff, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303a_24_ff, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303b_24_ff, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_303c_24_ff, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3040_24_ff, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3048_24_ff, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3050_24_ff, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3058_24_ff, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3060_24_ff, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3068_24_ff, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3070_24_ff, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3078_24_ff, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3079_24_ff, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307a_24_ff, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307b_24_ff, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307c_24_ff, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3080_24_ff, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3088_24_ff, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3090_24_ff, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3098_24_ff, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a0_24_ff, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a8_24_ff, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b0_24_ff, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b8_24_ff, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b9_24_ff, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30ba_24_ff, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bb_24_ff, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bc_24_ff, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c0_24_ff, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c8_24_ff, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d0_24_ff, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d8_24_ff, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e0_24_ff, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e8_24_ff, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f0_24_ff, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f8_24_ff, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f9_24_ff, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fa_24_ff, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fb_24_ff, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fc_24_ff, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3100_24_ff, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3108_24_ff, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3110_24_ff, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3118_24_ff, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3120_24_ff, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3128_24_ff, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3130_24_ff, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3138_24_ff, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3139_24_ff, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313a_24_ff, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313b_24_ff, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_313c_24_ff, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3140_24_ff, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3148_24_ff, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3150_24_ff, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3158_24_ff, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3160_24_ff, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3168_24_ff, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3170_24_ff, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3178_24_ff, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3179_24_ff, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317a_24_ff, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317b_24_ff, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_317c_24_ff, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3180_24_ff, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3188_24_ff, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3190_24_ff, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3198_24_ff, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a0_24_ff, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a8_24_ff, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b0_24_ff, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31b8_24_ff, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b9_24_ff, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31ba_24_ff, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31bb_24_ff, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31bc_24_ff, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c0_24_ff, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c8_24_ff, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d0_24_ff, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d8_24_ff, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e0_24_ff, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e8_24_ff, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f0_24_ff, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f8_24_ff, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f9_24_ff, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fa_24_ff, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fb_24_ff, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fc_24_ff, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c0_24_ff, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c8_24_ff, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d0_24_ff, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d8_24_ff, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e0_24_ff, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e8_24_ff, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f0_24_ff, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f8_24_ff, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f9_24_ff, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fa_24_ff, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fb_24_ff, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fc_24_ff, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_4000_24_ff, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4010_24_ff, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4018_24_ff, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4020_24_ff, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4028_24_ff, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4030_24_ff, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4038_24_ff, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4039_24_ff, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4040_24_ff, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4050_24_ff, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4058_24_ff, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4060_24_ff, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4068_24_ff, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4070_24_ff, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4078_24_ff, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4079_24_ff, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4080_24_ff, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4090_24_ff, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4098_24_ff, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a0_24_ff, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a8_24_ff, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b0_24_ff, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b8_24_ff, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b9_24_ff, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40c0_24_ff, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d0_24_ff, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d8_24_ff, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e0_24_ff, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e8_24_ff, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f0_24_ff, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f8_24_ff, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f9_24_ff, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_4100_24_ff, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4110_24_ff, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4118_24_ff, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4120_24_ff, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4128_24_ff, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4130_24_ff, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_4138_24_ff, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4139_24_ff, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_413a_24_ff, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_413b_24_ff, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_413c_24_ff, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4180_24_ff, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4190_24_ff, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4198_24_ff, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a0_24_ff, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a8_24_ff, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b0_24_ff, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41b8_24_ff, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b9_24_ff, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41ba_24_ff, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41bb_24_ff, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41bc_24_ff, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41d0_24_ff, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41e8_24_ff, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f0_24_ff, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_41f8_24_ff, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f9_24_ff, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fa_24_ff, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fb_24_ff, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_4200_24_ff, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4210_24_ff, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4218_24_ff, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4220_24_ff, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4228_24_ff, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4230_24_ff, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4238_24_ff, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4239_24_ff, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4240_24_ff, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4250_24_ff, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4258_24_ff, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4260_24_ff, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4268_24_ff, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4270_24_ff, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4278_24_ff, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4279_24_ff, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4280_24_ff, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4290_24_ff, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4298_24_ff, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a0_24_ff, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a8_24_ff, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b0_24_ff, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_42b8_24_ff, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b9_24_ff, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42c0_24_ff, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_42d0_24_ff, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_42d8_24_ff, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_42e0_24_ff, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_42e8_24_ff, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_42f0_24_ff, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_42f8_24_ff, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_42f9_24_ff, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_4400_24_ff, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4410_24_ff, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4418_24_ff, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4420_24_ff, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4428_24_ff, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4430_24_ff, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4438_24_ff, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4439_24_ff, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4440_24_ff, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4450_24_ff, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4458_24_ff, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4460_24_ff, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4468_24_ff, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4470_24_ff, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4478_24_ff, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4479_24_ff, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4480_24_ff, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4490_24_ff, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4498_24_ff, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a0_24_ff, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a8_24_ff, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b0_24_ff, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_44b8_24_ff, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b9_24_ff, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44c0_24_ff, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d0_24_ff, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d8_24_ff, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e0_24_ff, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e8_24_ff, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f0_24_ff, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f8_24_ff, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f9_24_ff, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fa_24_ff, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fb_24_ff, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fc_24_ff, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4600_24_ff, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4610_24_ff, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4618_24_ff, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4620_24_ff, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4628_24_ff, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4630_24_ff, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4638_24_ff, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4639_24_ff, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4640_24_ff, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4650_24_ff, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4658_24_ff, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4660_24_ff, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4668_24_ff, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4670_24_ff, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4678_24_ff, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4679_24_ff, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4680_24_ff, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4690_24_ff, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4698_24_ff, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a0_24_ff, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a8_24_ff, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b0_24_ff, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_46b8_24_ff, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b9_24_ff, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46c0_24_ff, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d0_24_ff, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d8_24_ff, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e0_24_ff, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e8_24_ff, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f0_24_ff, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f8_24_ff, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f9_24_ff, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fa_24_ff, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fb_24_ff, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fc_24_ff, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4800_24_ff, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4808_25_ff, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ NULL, op_4810_24_ff, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4818_24_ff, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4820_24_ff, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4828_24_ff, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4830_24_ff, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ NULL, op_4838_24_ff, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4839_24_ff, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4840_24_ff, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ NULL, op_4848_24_ff, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ NULL, op_4850_24_ff, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4868_24_ff, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4870_24_ff, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4878_24_ff, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4879_24_ff, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487a_24_ff, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487b_24_ff, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4880_24_ff, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_4890_24_ff, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a0_24_ff, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a8_24_ff, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b0_24_ff, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b8_24_ff, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b9_24_ff, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48c0_24_ff, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_48d0_24_ff, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e0_24_ff, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e8_24_ff, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f0_24_ff, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f8_24_ff, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f9_24_ff, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_49c0_24_ff, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_4a00_24_ff, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a10_24_ff, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a18_24_ff, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a20_24_ff, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a28_24_ff, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a30_24_ff, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a38_24_ff, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a39_24_ff, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a3a_24_ff, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a3b_24_ff, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a3c_24_ff, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a40_24_ff, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a48_24_ff, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a50_24_ff, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a58_24_ff, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a60_24_ff, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a68_24_ff, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a70_24_ff, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a78_24_ff, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a79_24_ff, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a7a_24_ff, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a7b_24_ff, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a7c_24_ff, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a80_24_ff, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a88_24_ff, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a90_24_ff, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a98_24_ff, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa0_24_ff, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa8_24_ff, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab0_24_ff, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4ab8_24_ff, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab9_24_ff, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aba_24_ff, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4abb_24_ff, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4abc_24_ff, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ac0_24_ff, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad0_24_ff, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad8_24_ff, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae0_24_ff, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae8_24_ff, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af0_24_ff, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ NULL, op_4af8_24_ff, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af9_24_ff, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4c00_24_ff, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ NULL, op_4c10_24_ff, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ NULL, op_4c18_24_ff, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ NULL, op_4c20_24_ff, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ NULL, op_4c28_24_ff, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ NULL, op_4c30_24_ff, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ NULL, op_4c38_24_ff, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ NULL, op_4c39_24_ff, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ NULL, op_4c3a_24_ff, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ NULL, op_4c3b_24_ff, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ NULL, op_4c3c_24_ff, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ NULL, op_4c40_24_ff, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c50_24_ff, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c58_24_ff, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c60_24_ff, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c68_24_ff, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c70_24_ff, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c78_24_ff, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c79_24_ff, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c7a_24_ff, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c7b_24_ff, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c7c_24_ff, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ NULL, op_4c90_24_ff, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4c98_24_ff, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ca8_24_ff, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb0_24_ff, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb8_24_ff, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb9_24_ff, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cba_24_ff, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cbb_24_ff, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd0_24_ff, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd8_24_ff, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ce8_24_ff, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf0_24_ff, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf8_24_ff, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf9_24_ff, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfa_24_ff, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfb_24_ff, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4e40_24_ff, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ NULL, op_4e50_25_ff, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ NULL, op_4e58_24_ff, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ NULL, op_4e60_25_ff, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ NULL, op_4e68_24_ff, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ NULL, op_4e70_24_ff, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ NULL, op_4e71_25_ff, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ NULL, op_4e72_25_ff, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ NULL, op_4e73_25_ff, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ NULL, op_4e74_24_ff, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ NULL, op_4e75_24_ff, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ NULL, op_4e76_24_ff, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ NULL, op_4e77_25_ff, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ NULL, op_4e7a_24_ff, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7b_25_ff, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ NULL, op_4e90_24_ff, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ NULL, op_4ea8_24_ff, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb0_24_ff, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4eb8_24_ff, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb9_24_ff, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ NULL, op_4eba_24_ff, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4ebb_24_ff, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4ed0_24_ff, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ NULL, op_4ee8_24_ff, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef0_24_ff, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_4ef8_24_ff, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef9_24_ff, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ NULL, op_4efa_24_ff, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4efb_24_ff, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_5000_24_ff, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5010_24_ff, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5018_24_ff, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5020_24_ff, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5028_24_ff, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5030_24_ff, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5038_24_ff, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5039_24_ff, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5040_24_ff, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5048_24_ff, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5050_24_ff, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5058_24_ff, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5060_24_ff, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5068_24_ff, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5070_24_ff, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5078_24_ff, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5079_24_ff, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5080_24_ff, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5088_24_ff, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5090_24_ff, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5098_24_ff, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a0_24_ff, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a8_24_ff, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b0_24_ff, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_50b8_24_ff, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b9_24_ff, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50c0_24_ff, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50c8_24_ff, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_50d0_24_ff, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50d8_24_ff, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e0_24_ff, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e8_24_ff, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f0_24_ff, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_50f8_24_ff, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f9_24_ff, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50fa_24_ff, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_50fb_24_ff, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_50fc_24_ff, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5100_24_ff, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5110_24_ff, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5118_24_ff, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5120_24_ff, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5128_24_ff, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5130_24_ff, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5138_24_ff, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5139_24_ff, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5140_24_ff, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5148_24_ff, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5150_24_ff, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5158_24_ff, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5160_24_ff, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5168_24_ff, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5170_24_ff, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5178_24_ff, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5179_24_ff, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5180_24_ff, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5188_24_ff, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5190_24_ff, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5198_24_ff, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a0_24_ff, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a8_24_ff, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b0_24_ff, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_51b8_24_ff, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b9_24_ff, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51c0_24_ff, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51c8_24_ff, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_51d0_24_ff, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51d8_24_ff, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e0_24_ff, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e8_24_ff, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f0_24_ff, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_51f8_24_ff, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f9_24_ff, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51fa_24_ff, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_51fb_24_ff, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_51fc_24_ff, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_52c0_24_ff, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52c8_24_ff, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_52d0_24_ff, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52d8_24_ff, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e0_24_ff, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e8_24_ff, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f0_24_ff, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_52f8_24_ff, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f9_24_ff, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52fa_24_ff, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_52fb_24_ff, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_52fc_24_ff, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_53c0_24_ff, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53c8_24_ff, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_53d0_24_ff, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53d8_24_ff, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e0_24_ff, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e8_24_ff, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f0_24_ff, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_53f8_24_ff, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f9_24_ff, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53fa_24_ff, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_53fb_24_ff, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_53fc_24_ff, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_54c0_24_ff, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54c8_24_ff, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_54d0_24_ff, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54d8_24_ff, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e0_24_ff, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e8_24_ff, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f0_24_ff, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_54f8_24_ff, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f9_24_ff, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54fa_24_ff, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_54fb_24_ff, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_54fc_24_ff, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_55c0_24_ff, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55c8_24_ff, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_55d0_24_ff, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55d8_24_ff, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e0_24_ff, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e8_24_ff, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f0_24_ff, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_55f8_24_ff, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f9_24_ff, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55fa_24_ff, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_55fb_24_ff, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_55fc_24_ff, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_56c0_24_ff, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56c8_24_ff, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_56d0_24_ff, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56d8_24_ff, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e0_24_ff, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e8_24_ff, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f0_24_ff, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_56f8_24_ff, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f9_24_ff, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56fa_24_ff, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_56fb_24_ff, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_56fc_24_ff, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_57c0_24_ff, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57c8_24_ff, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_57d0_24_ff, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57d8_24_ff, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e0_24_ff, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e8_24_ff, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f0_24_ff, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_57f8_24_ff, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f9_24_ff, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57fa_24_ff, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_57fb_24_ff, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_57fc_24_ff, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_58c0_24_ff, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58c8_24_ff, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_58d0_24_ff, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58d8_24_ff, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e0_24_ff, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e8_24_ff, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f0_24_ff, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_58f8_24_ff, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f9_24_ff, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58fa_24_ff, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_58fb_24_ff, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_58fc_24_ff, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_59c0_24_ff, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59c8_24_ff, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_59d0_24_ff, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59d8_24_ff, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e0_24_ff, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e8_24_ff, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f0_24_ff, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_59f8_24_ff, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f9_24_ff, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59fa_24_ff, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_59fb_24_ff, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_59fc_24_ff, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5ac0_24_ff, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ac8_24_ff, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ad0_24_ff, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ad8_24_ff, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae0_24_ff, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae8_24_ff, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af0_24_ff, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5af8_24_ff, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af9_24_ff, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5afa_24_ff, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5afb_24_ff, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5afc_24_ff, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5bc0_24_ff, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bc8_24_ff, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5bd0_24_ff, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bd8_24_ff, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be0_24_ff, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be8_24_ff, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf0_24_ff, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf8_24_ff, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf9_24_ff, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bfa_24_ff, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5bfb_24_ff, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5bfc_24_ff, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5cc0_24_ff, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cc8_24_ff, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5cd0_24_ff, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cd8_24_ff, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce0_24_ff, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce8_24_ff, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf0_24_ff, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf8_24_ff, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf9_24_ff, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cfa_24_ff, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5cfb_24_ff, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5cfc_24_ff, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5dc0_24_ff, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dc8_24_ff, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5dd0_24_ff, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dd8_24_ff, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de0_24_ff, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de8_24_ff, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df0_24_ff, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5df8_24_ff, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df9_24_ff, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dfa_24_ff, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5dfb_24_ff, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5dfc_24_ff, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5ec0_24_ff, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ec8_24_ff, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ed0_24_ff, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ed8_24_ff, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee0_24_ff, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee8_24_ff, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef0_24_ff, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef8_24_ff, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef9_24_ff, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5efa_24_ff, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5efb_24_ff, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5efc_24_ff, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5fc0_24_ff, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fc8_24_ff, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5fd0_24_ff, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fd8_24_ff, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe0_24_ff, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe8_24_ff, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff0_24_ff, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff8_24_ff, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff9_24_ff, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ffa_24_ff, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5ffb_24_ff, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_5ffc_24_ff, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ NULL, op_6000_24_ff, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6001_24_ff, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_60ff_24_ff, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6100_24_ff, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ NULL, op_6101_24_ff, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ NULL, op_61ff_24_ff, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ NULL, op_6200_24_ff, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6201_24_ff, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_62ff_24_ff, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6300_24_ff, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6301_24_ff, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_63ff_24_ff, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6400_24_ff, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6401_24_ff, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_64ff_24_ff, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6500_24_ff, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6501_24_ff, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_65ff_24_ff, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6600_24_ff, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6601_24_ff, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_66ff_24_ff, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6700_24_ff, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6701_24_ff, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_67ff_24_ff, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6800_24_ff, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6801_24_ff, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_68ff_24_ff, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6900_24_ff, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6901_24_ff, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_69ff_24_ff, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6a00_24_ff, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6a01_24_ff, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6aff_24_ff, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6b00_24_ff, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6b01_24_ff, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6bff_24_ff, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6c00_24_ff, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6c01_24_ff, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6cff_24_ff, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6d00_24_ff, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6d01_24_ff, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6dff_24_ff, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6e00_24_ff, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6e01_24_ff, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6eff_24_ff, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6f00_24_ff, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6f01_24_ff, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6fff_24_ff, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_7000_24_ff, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_8000_24_ff, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8010_24_ff, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8018_24_ff, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8020_24_ff, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8028_24_ff, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8030_24_ff, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8038_24_ff, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8039_24_ff, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803a_24_ff, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803b_24_ff, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_803c_24_ff, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8040_24_ff, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8050_24_ff, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8058_24_ff, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8060_24_ff, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8068_24_ff, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8070_24_ff, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8078_24_ff, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8079_24_ff, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807a_24_ff, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807b_24_ff, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_807c_24_ff, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8080_24_ff, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8090_24_ff, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8098_24_ff, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a0_24_ff, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a8_24_ff, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b0_24_ff, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80b8_24_ff, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b9_24_ff, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80ba_24_ff, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80bb_24_ff, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80bc_24_ff, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80c0_24_ff, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d0_24_ff, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d8_24_ff, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e0_24_ff, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e8_24_ff, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f0_24_ff, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f8_24_ff, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f9_24_ff, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fa_24_ff, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fb_24_ff, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fc_24_ff, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_8100_24_ff, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8108_24_ff, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8110_24_ff, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8118_24_ff, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8120_24_ff, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8128_24_ff, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8130_24_ff, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8138_24_ff, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8139_24_ff, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8140_24_ff, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ NULL, op_8148_24_ff, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ NULL, op_8150_24_ff, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8158_24_ff, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8160_24_ff, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8168_24_ff, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8170_24_ff, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8178_24_ff, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8179_24_ff, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8180_24_ff, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ NULL, op_8188_24_ff, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ NULL, op_8190_24_ff, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8198_24_ff, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a0_24_ff, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a8_24_ff, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b0_24_ff, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_81b8_24_ff, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b9_24_ff, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81c0_24_ff, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d0_24_ff, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d8_24_ff, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e0_24_ff, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e8_24_ff, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f0_24_ff, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f8_24_ff, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f9_24_ff, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fa_24_ff, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fb_24_ff, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fc_24_ff, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_9000_24_ff, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9010_24_ff, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9018_24_ff, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9020_24_ff, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9028_24_ff, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9030_24_ff, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9038_24_ff, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9039_24_ff, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903a_24_ff, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903b_24_ff, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_903c_24_ff, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9040_24_ff, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9048_24_ff, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9050_24_ff, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9058_24_ff, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9060_24_ff, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9068_24_ff, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9070_24_ff, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9078_24_ff, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9079_24_ff, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907a_24_ff, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907b_24_ff, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_907c_24_ff, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9080_24_ff, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9088_24_ff, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9090_24_ff, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9098_24_ff, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a0_24_ff, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a8_24_ff, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b0_24_ff, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90b8_24_ff, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b9_24_ff, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90ba_24_ff, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90bb_24_ff, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90bc_24_ff, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90c0_24_ff, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90c8_24_ff, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d0_24_ff, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d8_24_ff, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e0_24_ff, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e8_24_ff, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f0_24_ff, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f8_24_ff, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f9_24_ff, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fa_24_ff, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fb_24_ff, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fc_24_ff, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_9100_24_ff, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9108_24_ff, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9110_24_ff, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9118_24_ff, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9120_24_ff, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9128_24_ff, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9130_24_ff, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9138_24_ff, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9139_24_ff, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9140_24_ff, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9148_24_ff, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9150_24_ff, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9158_24_ff, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9160_24_ff, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9168_24_ff, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9170_24_ff, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9178_24_ff, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9179_24_ff, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9180_24_ff, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9188_24_ff, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9190_24_ff, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9198_24_ff, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a0_24_ff, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a8_24_ff, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b0_24_ff, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_91b8_24_ff, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b9_24_ff, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91c0_24_ff, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91c8_24_ff, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d0_24_ff, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d8_24_ff, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e0_24_ff, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e8_24_ff, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f0_24_ff, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f8_24_ff, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f9_24_ff, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fa_24_ff, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fb_24_ff, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fc_24_ff, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_b000_24_ff, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b010_24_ff, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b018_24_ff, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b020_24_ff, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b028_24_ff, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b030_24_ff, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b038_24_ff, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b039_24_ff, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03a_24_ff, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03b_24_ff, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b03c_24_ff, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b040_24_ff, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b048_24_ff, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b050_24_ff, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b058_24_ff, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b060_24_ff, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b068_24_ff, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b070_24_ff, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b078_24_ff, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b079_24_ff, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07a_24_ff, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07b_24_ff, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b07c_24_ff, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b080_24_ff, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b088_24_ff, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b090_24_ff, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b098_24_ff, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a0_24_ff, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a8_24_ff, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b0_24_ff, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b8_24_ff, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b9_24_ff, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0ba_24_ff, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bb_24_ff, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bc_24_ff, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0c0_24_ff, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0c8_24_ff, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d0_24_ff, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d8_24_ff, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e0_24_ff, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e8_24_ff, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f0_24_ff, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f8_24_ff, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f9_24_ff, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fa_24_ff, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fb_24_ff, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fc_24_ff, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b100_24_ff, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b108_24_ff, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b110_24_ff, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b118_24_ff, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b120_24_ff, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b128_24_ff, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b130_24_ff, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b138_24_ff, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b139_24_ff, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b140_24_ff, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b148_24_ff, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b150_24_ff, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b158_24_ff, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b160_24_ff, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b168_24_ff, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b170_24_ff, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b178_24_ff, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b179_24_ff, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b180_24_ff, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b188_24_ff, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b190_24_ff, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b198_24_ff, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a0_24_ff, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a8_24_ff, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b0_24_ff, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b8_24_ff, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b9_24_ff, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1c0_24_ff, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1c8_24_ff, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d0_24_ff, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d8_24_ff, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e0_24_ff, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e8_24_ff, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f0_24_ff, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f8_24_ff, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f9_24_ff, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fa_24_ff, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fb_24_ff, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fc_24_ff, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_c000_24_ff, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c010_24_ff, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c018_24_ff, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c020_24_ff, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c028_24_ff, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c030_24_ff, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c038_24_ff, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c039_24_ff, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03a_24_ff, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03b_24_ff, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c03c_24_ff, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c040_24_ff, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c050_24_ff, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c058_24_ff, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c060_24_ff, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c068_24_ff, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c070_24_ff, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c078_24_ff, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c079_24_ff, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07a_24_ff, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07b_24_ff, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c07c_24_ff, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c080_24_ff, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c090_24_ff, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c098_24_ff, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a0_24_ff, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a8_24_ff, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b0_24_ff, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0b8_24_ff, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b9_24_ff, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0ba_24_ff, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0bb_24_ff, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0bc_24_ff, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0c0_24_ff, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d0_24_ff, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d8_24_ff, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e0_24_ff, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e8_24_ff, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f0_24_ff, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f8_24_ff, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f9_24_ff, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fa_24_ff, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fb_24_ff, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fc_24_ff, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c100_24_ff, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c108_24_ff, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c110_24_ff, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c118_24_ff, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c120_24_ff, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c128_24_ff, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c130_24_ff, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c138_24_ff, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c139_24_ff, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c140_24_ff, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c148_24_ff, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c150_24_ff, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c158_24_ff, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c160_24_ff, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c168_24_ff, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c170_24_ff, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c178_24_ff, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c179_24_ff, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c188_24_ff, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c190_24_ff, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c198_24_ff, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a0_24_ff, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a8_24_ff, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b0_24_ff, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c1b8_24_ff, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b9_24_ff, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1c0_24_ff, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d0_24_ff, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d8_24_ff, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e0_24_ff, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e8_24_ff, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f0_24_ff, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f8_24_ff, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f9_24_ff, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fa_24_ff, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fb_24_ff, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fc_24_ff, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_d000_24_ff, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d010_24_ff, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d018_24_ff, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d020_24_ff, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d028_24_ff, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d030_24_ff, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d038_24_ff, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d039_24_ff, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03a_24_ff, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03b_24_ff, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d03c_24_ff, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d040_24_ff, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d048_24_ff, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d050_24_ff, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d058_24_ff, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d060_24_ff, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d068_24_ff, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d070_24_ff, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d078_24_ff, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d079_24_ff, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07a_24_ff, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07b_24_ff, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d07c_24_ff, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d080_24_ff, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d088_24_ff, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d090_24_ff, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d098_24_ff, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a0_24_ff, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a8_24_ff, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b0_24_ff, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b8_24_ff, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b9_24_ff, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0ba_24_ff, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bb_24_ff, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bc_24_ff, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0c0_24_ff, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0c8_24_ff, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d0_24_ff, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d8_24_ff, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e0_24_ff, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e8_24_ff, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f0_24_ff, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f8_24_ff, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f9_24_ff, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fa_24_ff, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fb_24_ff, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fc_24_ff, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d100_24_ff, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d108_24_ff, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d110_24_ff, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d118_24_ff, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d120_24_ff, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d128_24_ff, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d130_24_ff, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d138_24_ff, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d139_24_ff, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d140_24_ff, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d148_24_ff, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d150_24_ff, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d158_24_ff, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d160_24_ff, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d168_24_ff, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d170_24_ff, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d178_24_ff, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d179_24_ff, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d180_24_ff, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d188_24_ff, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d190_24_ff, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d198_24_ff, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a0_24_ff, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a8_24_ff, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b0_24_ff, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b8_24_ff, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b9_24_ff, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1c0_24_ff, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1c8_24_ff, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d0_24_ff, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d8_24_ff, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e0_24_ff, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e8_24_ff, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f0_24_ff, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f8_24_ff, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f9_24_ff, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fa_24_ff, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fb_24_ff, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fc_24_ff, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_e000_24_ff, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e008_24_ff, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e010_24_ff, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e018_24_ff, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e020_24_ff, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e028_24_ff, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e030_24_ff, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e038_24_ff, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e040_24_ff, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e048_24_ff, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e050_24_ff, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e058_24_ff, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e060_24_ff, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e068_24_ff, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e070_24_ff, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e078_24_ff, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e080_24_ff, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e088_24_ff, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e090_24_ff, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e098_24_ff, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0a0_24_ff, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e0a8_24_ff, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e0b0_24_ff, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e0b8_24_ff, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0d0_24_ff, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0d8_24_ff, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e0_24_ff, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e8_24_ff, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f0_24_ff, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f8_24_ff, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f9_24_ff, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e100_24_ff, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e108_24_ff, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e110_24_ff, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e118_24_ff, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e120_24_ff, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e128_24_ff, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e130_24_ff, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e138_24_ff, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e140_24_ff, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e148_24_ff, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e150_24_ff, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e158_24_ff, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e160_24_ff, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e168_24_ff, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e170_24_ff, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e178_24_ff, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e180_24_ff, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e188_24_ff, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e190_24_ff, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e198_24_ff, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1a0_24_ff, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e1a8_24_ff, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e1b0_24_ff, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e1b8_24_ff, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1d0_24_ff, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1d8_24_ff, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e0_24_ff, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e8_24_ff, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f0_24_ff, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f8_24_ff, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f9_24_ff, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e2d0_24_ff, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2d8_24_ff, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e0_24_ff, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e8_24_ff, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f0_24_ff, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f8_24_ff, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f9_24_ff, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e3d0_24_ff, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3d8_24_ff, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e0_24_ff, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e8_24_ff, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f0_24_ff, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f8_24_ff, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f9_24_ff, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e4d0_24_ff, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4d8_24_ff, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e0_24_ff, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e8_24_ff, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f0_24_ff, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f8_24_ff, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f9_24_ff, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e5d0_24_ff, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5d8_24_ff, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e0_24_ff, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e8_24_ff, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f0_24_ff, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f8_24_ff, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f9_24_ff, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e6d0_24_ff, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6d8_24_ff, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e0_24_ff, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e8_24_ff, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f0_24_ff, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f8_24_ff, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f9_24_ff, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e7d0_24_ff, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7d8_24_ff, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e0_24_ff, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e8_24_ff, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f0_24_ff, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f8_24_ff, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f9_24_ff, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e8c0_24_ff, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ NULL, op_e8d0_24_ff, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ NULL, op_e8e8_24_ff, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ NULL, op_e8f0_24_ff, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ NULL, op_e8f8_24_ff, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ NULL, op_e8f9_24_ff, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ NULL, op_e8fa_24_ff, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ NULL, op_e8fb_24_ff, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ NULL, op_e9c0_24_ff, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ NULL, op_e9d0_24_ff, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ NULL, op_e9e8_24_ff, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ NULL, op_e9f0_24_ff, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ NULL, op_e9f8_24_ff, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ NULL, op_e9f9_24_ff, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ NULL, op_e9fa_24_ff, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ NULL, op_e9fb_24_ff, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ NULL, op_eac0_24_ff, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ NULL, op_ead0_24_ff, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ NULL, op_eae8_24_ff, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ NULL, op_eaf0_24_ff, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ NULL, op_eaf8_24_ff, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ NULL, op_eaf9_24_ff, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ NULL, op_ebc0_24_ff, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ NULL, op_ebd0_24_ff, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ NULL, op_ebe8_24_ff, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ NULL, op_ebf0_24_ff, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ NULL, op_ebf8_24_ff, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ NULL, op_ebf9_24_ff, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ NULL, op_ebfa_24_ff, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ NULL, op_ebfb_24_ff, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ NULL, op_ecc0_24_ff, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ NULL, op_ecd0_24_ff, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ NULL, op_ece8_24_ff, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ NULL, op_ecf0_24_ff, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ NULL, op_ecf8_24_ff, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ NULL, op_ecf9_24_ff, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ NULL, op_edc0_24_ff, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ NULL, op_edd0_24_ff, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ NULL, op_ede8_24_ff, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ NULL, op_edf0_24_ff, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ NULL, op_edf8_24_ff, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ NULL, op_edf9_24_ff, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ NULL, op_edfa_24_ff, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ NULL, op_edfb_24_ff, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ NULL, op_eec0_24_ff, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ NULL, op_eed0_24_ff, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ NULL, op_eee8_24_ff, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ NULL, op_eef0_24_ff, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ NULL, op_eef8_24_ff, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ NULL, op_eef9_24_ff, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ NULL, op_efc0_24_ff, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ NULL, op_efd0_24_ff, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ NULL, op_efe8_24_ff, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ NULL, op_eff0_24_ff, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ NULL, op_eff8_24_ff, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ NULL, op_eff9_24_ff, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ NULL, op_f000_24_ff, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ NULL, op_f008_24_ff, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ NULL, op_f010_24_ff, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ NULL, op_f018_24_ff, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ NULL, op_f020_24_ff, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ NULL, op_f028_24_ff, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ NULL, op_f030_24_ff, 0xf030, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ NULL, op_f038_24_ff, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ NULL, op_f039_24_ff, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ NULL, op_f200_24_ff, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f208_24_ff, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f210_24_ff, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f218_24_ff, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f220_24_ff, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f228_24_ff, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f230_24_ff, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f238_24_ff, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f239_24_ff, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f23a_24_ff, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f23b_24_ff, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f23c_24_ff, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ NULL, op_f240_24_ff, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ NULL, op_f248_24_ff, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ NULL, op_f250_24_ff, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ NULL, op_f258_24_ff, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ NULL, op_f260_24_ff, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ NULL, op_f268_24_ff, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ NULL, op_f270_24_ff, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ NULL, op_f278_24_ff, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ NULL, op_f279_24_ff, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ NULL, op_f27a_24_ff, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ NULL, op_f27b_24_ff, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ NULL, op_f27c_24_ff, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ NULL, op_f280_24_ff, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ NULL, op_f2c0_24_ff, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ NULL, op_f310_24_ff, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ NULL, op_f320_24_ff, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ NULL, op_f328_24_ff, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ NULL, op_f330_24_ff, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ NULL, op_f338_24_ff, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ NULL, op_f339_24_ff, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ NULL, op_f350_24_ff, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ NULL, op_f358_24_ff, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ NULL, op_f368_24_ff, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ NULL, op_f370_24_ff, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ NULL, op_f378_24_ff, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ NULL, op_f379_24_ff, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ NULL, op_f37a_24_ff, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ NULL, op_f37b_24_ff, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ NULL, op_f408_24_ff, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +{ NULL, op_f410_24_ff, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +{ NULL, op_f418_24_ff, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +{ NULL, op_f419_24_ff, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +{ NULL, op_f41a_24_ff, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +{ NULL, op_f41b_24_ff, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +{ NULL, op_f41c_24_ff, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +{ NULL, op_f41d_24_ff, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +{ NULL, op_f41e_24_ff, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +{ NULL, op_f41f_24_ff, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +{ NULL, op_f428_24_ff, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +{ NULL, op_f430_24_ff, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +{ NULL, op_f438_24_ff, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ NULL, op_f439_24_ff, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ NULL, op_f43a_24_ff, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ NULL, op_f43b_24_ff, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ NULL, op_f43c_24_ff, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ NULL, op_f43d_24_ff, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ NULL, op_f43e_24_ff, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ NULL, op_f43f_24_ff, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f500_25_ff, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f508_25_ff, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f510_25_ff, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f518_25_ff, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f548_25_ff, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f568_25_ff, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +{ NULL, op_f600_24_ff, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ NULL, op_f608_24_ff, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ NULL, op_f610_24_ff, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ NULL, op_f618_24_ff, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ NULL, op_f620_24_ff, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifdef CPUEMU_31 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_31[] = { +{ op_0000_31_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_31_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_31_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_31_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_31_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_31_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_31_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_31_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_31_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_31_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_31_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_31_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_31_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_31_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_31_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_31_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_31_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_31_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_31_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_31_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_31_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_31_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_31_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_31_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_31_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_31_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_00d0_31_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00e8_31_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f0_31_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f8_31_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f9_31_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fa_31_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fb_31_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0100_31_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_31_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_31_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_31_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_31_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_31_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_31_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_31_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_31_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_31_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_31_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_31_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_31_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_31_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_31_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_31_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_31_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_31_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_31_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_31_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_31_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_31_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_31_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_31_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_31_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_31_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_31_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_31_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_31_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_31_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_31_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_31_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_31_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_31_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_31_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_31_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_31_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_31_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_31_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_31_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_31_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_31_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_31_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_31_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_31_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_31_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_31_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_31_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_31_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_31_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_31_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_31_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_31_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_31_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_31_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_31_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_31_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_31_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_31_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_31_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_31_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_31_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_31_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_31_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_31_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ op_02d0_31_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02e8_31_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f0_31_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f8_31_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f9_31_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fa_31_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fb_31_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0400_31_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_31_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_31_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_31_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_31_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_31_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_31_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_31_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_31_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_31_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_31_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_31_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_31_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_31_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_31_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_31_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_31_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_31_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_31_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_31_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_31_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_31_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_31_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_31_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ op_04d0_31_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04e8_31_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f0_31_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f8_31_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f9_31_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fa_31_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fb_31_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0600_31_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_31_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_31_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_31_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_31_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_31_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_31_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_31_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_31_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_31_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_31_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_31_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_31_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_31_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_31_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_31_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_31_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_31_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_31_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_31_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_31_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_31_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_31_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_31_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ op_06c0_31_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06c8_31_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06d0_31_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06e8_31_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f0_31_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f8_31_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f9_31_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fa_31_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fb_31_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ op_0800_31_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_31_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_31_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_31_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_31_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_31_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_31_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_31_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_31_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_31_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_31_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_31_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_31_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_31_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_31_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_31_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_31_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_31_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_31_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_31_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_31_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_31_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_31_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_31_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_31_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_31_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_31_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_31_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_31_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_31_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_31_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_31_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_31_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_31_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_31_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_31_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_31_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_31_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_31_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_31_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_31_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_31_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_31_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_31_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_31_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_31_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_31_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_31_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_31_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_31_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_31_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_31_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_31_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_31_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_31_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_31_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_31_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_31_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_31_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_31_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_31_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_31_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_31_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_31_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_31_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_31_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_31_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_31_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_31_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_31_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_31_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_31_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_31_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_31_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_31_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c3a_31_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c3b_31_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c40_31_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_31_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_31_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_31_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_31_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_31_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_31_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_31_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c7a_31_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c7b_31_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c80_31_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_31_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_31_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_31_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_31_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_31_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_31_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_31_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cba_31_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cbb_31_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_31_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_31_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_31_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_31_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_31_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_31_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_31_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_31_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_31_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_31_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_31_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_31_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_31_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_31_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_31_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_31_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_31_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_31_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_31_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_31_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_31_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_31_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_31_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_31_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_31_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_31_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_31_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_31_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_31_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_31_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_31_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_31_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_31_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_31_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_31_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_31_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_31_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_31_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_31_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_31_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_31_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_31_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_31_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_31_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_31_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_31_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_31_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_31_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_31_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_31_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_31_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_31_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_31_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_31_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_31_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_31_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_31_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_31_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_31_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_31_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_31_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_31_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_31_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_31_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_31_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_31_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_31_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_31_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_31_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_31_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_31_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_31_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_31_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_31_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_31_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_31_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_31_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_31_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_31_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_31_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_31_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_31_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_31_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_31_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_31_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_31_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_31_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_31_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_31_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_31_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_31_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_31_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_31_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_31_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_31_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_31_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_31_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_31_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_31_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_31_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_31_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_31_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_31_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_31_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_31_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_31_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_31_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_31_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_31_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_31_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_31_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_31_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_31_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_31_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_31_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_31_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_31_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_31_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_31_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_31_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_31_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_31_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_31_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_31_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_31_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_31_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_31_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_31_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_31_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_31_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_31_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_31_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_31_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_31_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_31_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_31_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_31_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_31_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_31_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_31_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_31_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_31_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_31_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_31_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_31_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_31_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_31_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_31_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_31_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_31_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_31_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_31_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_31_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_31_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_31_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_31_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_31_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_31_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_31_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_31_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_31_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_31_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_31_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_31_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_31_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_31_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_31_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_31_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_31_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_31_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_31_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_31_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_31_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_31_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_31_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_31_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_31_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_31_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_31_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_31_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_31_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_31_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_31_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_31_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_31_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_31_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_31_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_31_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_31_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_31_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_31_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_31_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_31_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_31_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_31_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_31_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_31_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_31_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_31_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_31_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_31_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_31_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_31_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_31_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_31_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_31_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_31_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_31_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_31_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_31_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_31_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_31_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_31_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_31_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_31_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_31_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_31_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_31_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_31_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_31_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_31_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_31_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_31_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_31_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_31_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_31_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_31_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_31_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_31_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_31_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_31_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_31_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_31_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_31_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_31_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_31_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_31_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_31_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_31_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_31_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_31_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_31_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_31_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_31_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_31_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_31_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_31_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_31_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_31_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_31_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_31_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_31_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_31_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_31_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_31_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_31_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_31_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_31_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_31_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_31_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_31_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_31_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_31_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_31_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_31_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_31_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_31_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_31_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_31_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_31_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_31_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_31_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_31_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_31_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_31_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_31_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_31_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_31_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_31_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_31_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_31_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_31_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_31_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_31_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_31_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_31_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_31_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_31_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_31_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_31_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_31_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_31_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_31_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_31_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_31_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_31_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_31_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_31_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_31_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_31_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_31_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_31_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_31_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_31_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_31_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_31_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_31_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_31_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_31_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_31_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_31_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_31_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_31_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_31_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_31_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_31_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_31_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_31_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_31_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_31_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_31_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_31_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_31_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_31_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_31_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_31_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_31_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_31_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_31_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_31_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_31_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_31_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_31_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_31_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_31_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_31_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_31_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_31_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_31_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_31_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_31_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_31_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_31_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_31_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_31_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_31_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_31_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_31_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_31_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_31_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_31_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_31_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_31_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_31_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_31_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_31_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_31_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_31_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_31_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_31_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_31_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_31_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_31_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_31_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_31_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_31_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_31_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_31_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_31_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_31_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_31_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_31_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_31_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4100_31_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4110_31_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4118_31_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4120_31_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4128_31_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4130_31_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4138_31_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4139_31_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413a_31_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413b_31_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413c_31_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ op_4180_31_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_31_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_31_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_31_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_31_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_31_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_31_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_31_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_31_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_31_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_31_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_31_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_31_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_31_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_31_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_31_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_31_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_31_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_31_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_31_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_31_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_31_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_31_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_31_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_31_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_31_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_31_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_31_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_31_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_31_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_31_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_31_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_31_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_31_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_31_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_31_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_31_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_31_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_31_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_31_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_31_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_31_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_31_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_31_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_31_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_31_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_31_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_31_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_31_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_31_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_31_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_31_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_31_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_31_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_31_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_31_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_31_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_31_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_31_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_31_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_31_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_31_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_31_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_31_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_31_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_31_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_31_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_31_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_31_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_31_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_31_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_31_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_31_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_31_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_31_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_31_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_31_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_31_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_31_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_31_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_31_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_31_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_31_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_31_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_31_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_31_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_31_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_31_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_31_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_31_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_31_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_31_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_31_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_31_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_31_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_31_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_31_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_31_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_31_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_31_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_31_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_31_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_31_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_31_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_31_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_31_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_31_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_31_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_31_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_31_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_31_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_31_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_31_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_31_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_31_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_31_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_31_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_31_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_31_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_31_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_31_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_31_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_31_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_31_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_31_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_31_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_31_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_31_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_31_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_31_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_31_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_31_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_31_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_31_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_31_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_31_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_31_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_31_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_31_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_31_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_31_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_31_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_31_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_31_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_31_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_31_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_31_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_31_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_31_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_31_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_31_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_31_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ op_49c0_31_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ op_4a00_31_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_31_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_31_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_31_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_31_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_31_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_31_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_31_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a3a_31_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3b_31_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3c_31_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a40_31_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a48_31_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a50_31_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_31_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_31_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_31_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_31_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_31_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_31_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a7a_31_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7b_31_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7c_31_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a80_31_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a88_31_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a90_31_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_31_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_31_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_31_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_31_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_31_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_31_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4aba_31_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abb_31_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abc_31_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4ac0_31_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_31_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_31_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_31_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_31_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_31_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_31_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_31_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4c00_31_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c10_31_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c18_31_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c20_31_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c28_31_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c30_31_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c38_31_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c39_31_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3a_31_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3b_31_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3c_31_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c40_31_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c50_31_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c58_31_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c60_31_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c68_31_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c70_31_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c78_31_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c79_31_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7a_31_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7b_31_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7c_31_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ op_4c90_31_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_31_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_31_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_31_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_31_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_31_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_31_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_31_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_31_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_31_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_31_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_31_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_31_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_31_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_31_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_31_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_31_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_31_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_31_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_31_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_31_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_31_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_31_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_31_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_31_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_31_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_31_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_31_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_31_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_31_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_31_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_31_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_31_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_31_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_31_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_31_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_31_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_31_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_31_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_31_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_31_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_31_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_31_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_31_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_31_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_31_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_31_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_31_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_31_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_31_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_31_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_31_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_31_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_31_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_31_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_31_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_31_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_31_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_31_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_31_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_31_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_31_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_31_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_31_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_31_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_31_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_31_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_31_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_31_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_31_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_31_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_31_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_31_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_31_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_31_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_31_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_31_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_31_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_31_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_31_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_50fa_31_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fb_31_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fc_31_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5100_31_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_31_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_31_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_31_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_31_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_31_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_31_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_31_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_31_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_31_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_31_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_31_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_31_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_31_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_31_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_31_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_31_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_31_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_31_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_31_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_31_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_31_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_31_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_31_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_31_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_31_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_31_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_31_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_31_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_31_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_31_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_31_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_31_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_31_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_31_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_51fa_31_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fb_31_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fc_31_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_52c0_31_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_31_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_31_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_31_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_31_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_31_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_31_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_31_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_31_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_52fa_31_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fb_31_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fc_31_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_53c0_31_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_31_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_31_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_31_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_31_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_31_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_31_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_31_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_31_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_53fa_31_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fb_31_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fc_31_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_54c0_31_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_31_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_31_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_31_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_31_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_31_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_31_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_31_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_31_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_54fa_31_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fb_31_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fc_31_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_55c0_31_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_31_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_31_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_31_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_31_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_31_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_31_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_31_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_31_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_55fa_31_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fb_31_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fc_31_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_56c0_31_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_31_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_31_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_31_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_31_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_31_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_31_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_31_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_31_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_56fa_31_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fb_31_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fc_31_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_57c0_31_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_31_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_31_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_31_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_31_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_31_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_31_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_31_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_31_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_57fa_31_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fb_31_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fc_31_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_58c0_31_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_31_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_31_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_31_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_31_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_31_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_31_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_31_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_31_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_58fa_31_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fb_31_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fc_31_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_59c0_31_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_31_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_31_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_31_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_31_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_31_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_31_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_31_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_31_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_59fa_31_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fb_31_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fc_31_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ac0_31_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_31_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_31_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_31_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_31_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_31_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_31_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_31_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_31_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5afa_31_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afb_31_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afc_31_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5bc0_31_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_31_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_31_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_31_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_31_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_31_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_31_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_31_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_31_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5bfa_31_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfb_31_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfc_31_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5cc0_31_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_31_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_31_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_31_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_31_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_31_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_31_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_31_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_31_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5cfa_31_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfb_31_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfc_31_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5dc0_31_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_31_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_31_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_31_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_31_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_31_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_31_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_31_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_31_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5dfa_31_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfb_31_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfc_31_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ec0_31_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_31_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_31_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_31_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_31_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_31_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_31_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_31_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_31_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5efa_31_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efb_31_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efc_31_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5fc0_31_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_31_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_31_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_31_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_31_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_31_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_31_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_31_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_31_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5ffa_31_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffb_31_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffc_31_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_6000_31_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_31_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_31_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_31_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_31_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_31_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_31_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_31_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_31_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_31_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_31_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_31_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_31_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_31_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_31_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_31_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_31_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_31_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_31_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_31_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_31_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_31_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_31_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_31_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_31_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_31_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_31_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_31_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_31_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_31_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_31_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_31_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_31_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_31_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_31_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_31_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_31_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_31_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_31_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_31_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_31_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_31_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_31_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_31_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_31_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_31_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_31_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_31_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_31_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_31_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_31_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_31_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_31_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_31_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_31_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_31_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_31_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_31_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_31_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_31_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_31_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_31_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_31_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_31_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_31_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_31_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_31_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_31_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_31_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_31_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_31_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_31_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_31_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_31_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_31_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_31_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_31_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_31_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_31_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_31_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_31_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_31_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_31_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_31_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_31_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_31_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_31_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_31_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_31_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_31_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_31_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_31_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_31_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_31_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_31_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_31_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_31_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_31_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_31_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_31_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_31_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_31_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8140_31_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8148_31_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ op_8150_31_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_31_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_31_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_31_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_31_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_31_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_31_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8180_31_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8188_31_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ op_8190_31_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_31_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_31_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_31_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_31_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_31_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_31_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_31_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_31_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_31_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_31_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_31_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_31_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_31_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_31_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_31_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_31_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_31_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_31_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_31_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_31_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_31_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_31_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_31_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_31_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_31_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_31_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_31_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_31_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_31_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_31_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_31_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_31_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_31_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_31_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_31_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_31_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_31_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_31_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_31_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_31_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_31_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_31_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_31_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_31_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_31_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_31_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_31_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_31_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_31_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_31_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_31_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_31_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_31_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_31_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_31_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_31_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_31_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_31_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_31_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_31_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_31_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_31_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_31_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_31_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_31_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_31_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_31_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_31_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_31_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_31_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_31_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_31_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_31_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_31_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_31_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_31_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_31_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_31_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_31_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_31_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_31_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_31_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_31_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_31_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_31_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_31_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_31_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_31_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_31_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_31_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_31_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_31_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_31_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_31_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_31_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_31_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_31_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_31_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_31_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_31_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_31_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_31_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_31_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_31_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_31_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_31_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_31_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_31_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_31_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_31_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_31_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_31_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_31_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_31_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_31_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_31_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_31_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_31_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_31_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_31_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_31_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_31_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_31_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_31_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_31_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_31_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_31_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_31_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_31_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_31_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_31_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_31_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_31_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_31_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_31_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_31_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_31_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_31_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_31_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_31_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_31_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_31_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_31_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_31_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_31_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_31_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_31_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_31_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_31_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_31_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_31_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_31_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_31_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_31_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_31_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_31_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_31_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_31_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_31_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_31_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_31_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_31_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_31_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_31_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_31_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_31_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_31_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_31_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_31_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_31_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_31_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_31_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_31_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_31_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_31_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_31_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_31_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_31_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_31_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_31_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_31_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_31_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_31_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_31_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_31_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_31_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_31_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_31_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_31_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_31_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_31_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_31_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_31_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_31_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_31_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_31_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_31_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_31_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_31_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_31_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_31_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_31_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_31_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_31_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_31_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_31_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_31_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_31_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_31_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_31_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_31_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_31_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_31_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_31_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_31_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_31_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_31_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_31_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_31_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_31_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_31_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_31_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_31_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_31_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_31_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_31_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_31_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_31_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_31_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_31_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_31_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_31_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_31_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_31_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_31_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_31_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_31_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_31_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_31_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_31_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_31_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_31_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_31_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_31_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_31_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_31_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_31_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_31_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_31_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_31_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_31_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_31_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_31_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_31_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_31_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_31_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_31_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_31_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_31_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_31_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_31_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_31_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_31_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_31_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_31_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_31_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_31_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_31_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_31_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_31_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_31_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_31_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_31_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_31_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_31_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_31_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_31_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_31_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_31_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_31_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_31_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_31_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_31_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_31_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_31_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_31_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_31_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_31_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_31_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_31_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_31_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_31_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_31_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_31_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_31_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_31_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_31_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_31_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_31_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_31_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_31_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_31_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_31_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_31_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_31_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_31_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_31_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_31_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_31_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_31_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_31_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_31_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_31_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_31_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_31_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_31_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_31_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_31_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_31_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_31_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_31_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_31_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_31_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_31_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_31_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_31_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_31_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_31_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_31_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_31_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_31_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_31_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_31_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_31_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_31_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_31_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_31_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_31_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_31_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_31_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_31_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_31_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_31_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_31_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_31_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_31_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_31_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_31_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_31_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_31_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_31_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_31_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_31_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_31_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_31_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_31_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_31_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_31_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_31_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_31_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_31_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_31_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_31_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_31_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_31_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_31_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_31_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_31_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_31_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_31_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_31_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_31_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_31_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_31_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_31_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_31_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_31_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_31_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_31_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_31_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_31_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_31_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_31_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_31_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_31_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_31_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_31_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_31_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_31_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_31_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_31_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_31_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_31_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_31_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_31_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_31_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_31_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_31_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_31_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_31_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_31_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_31_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_31_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_31_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_31_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_31_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_31_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_31_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_31_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_31_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_31_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_31_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_31_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_31_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_31_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_31_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_31_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_31_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_31_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_31_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_31_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_31_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_31_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_31_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_31_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_31_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_31_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_31_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_31_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_31_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_31_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_31_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_31_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_31_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_31_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_31_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_31_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_31_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_31_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_31_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_31_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_31_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_31_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_31_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_31_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_31_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_31_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_31_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_31_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_31_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_31_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_31_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_31_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_31_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_31_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_31_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_31_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_31_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_31_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_31_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ op_e8c0_31_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8d0_31_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8e8_31_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f0_31_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f8_31_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f9_31_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fa_31_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fb_31_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9c0_31_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9d0_31_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9e8_31_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f0_31_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f8_31_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f9_31_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fa_31_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fb_31_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eac0_31_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ead0_31_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eae8_31_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf0_31_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf8_31_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf9_31_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebc0_31_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebd0_31_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebe8_31_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf0_31_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf8_31_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf9_31_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfa_31_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfb_31_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecc0_31_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecd0_31_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ece8_31_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf0_31_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf8_31_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf9_31_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edc0_31_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edd0_31_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ede8_31_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf0_31_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf8_31_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf9_31_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfa_31_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfb_31_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eec0_31_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eed0_31_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eee8_31_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef0_31_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef8_31_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef9_31_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efc0_31_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efd0_31_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efe8_31_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff0_31_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff8_31_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff9_31_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f000_31_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f008_31_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f010_31_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f018_31_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f020_31_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f028_31_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f030_31_ff, NULL, 0xf030, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f038_31_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f039_31_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f200_31_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f208_31_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f210_31_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f218_31_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f220_31_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f228_31_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f230_31_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f238_31_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f239_31_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23a_31_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23b_31_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23c_31_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f240_31_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f248_31_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f250_31_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f258_31_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f260_31_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f268_31_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f270_31_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f278_31_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f279_31_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27a_31_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27b_31_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27c_31_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f280_31_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f2c0_31_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f310_31_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f320_31_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f328_31_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f330_31_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f338_31_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f339_31_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f350_31_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f358_31_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f368_31_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f370_31_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f378_31_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f379_31_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37a_31_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37b_31_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f408_31_ff, NULL, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f410_31_ff, NULL, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f418_31_ff, NULL, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f419_31_ff, NULL, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41a_31_ff, NULL, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41b_31_ff, NULL, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41c_31_ff, NULL, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41d_31_ff, NULL, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41e_31_ff, NULL, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41f_31_ff, NULL, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f428_31_ff, NULL, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f430_31_ff, NULL, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f438_31_ff, NULL, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f439_31_ff, NULL, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43a_31_ff, NULL, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43b_31_ff, NULL, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43c_31_ff, NULL, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43d_31_ff, NULL, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43e_31_ff, NULL, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43f_31_ff, NULL, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f500_31_ff, NULL, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f508_31_ff, NULL, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f510_31_ff, NULL, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f518_31_ff, NULL, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f548_31_ff, NULL, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f568_31_ff, NULL, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f600_31_ff, NULL, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f608_31_ff, NULL, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f610_31_ff, NULL, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f618_31_ff, NULL, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f620_31_ff, NULL, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_31 */ +#ifdef CPUEMU_32 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_32[] = { +{ op_0000_32_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_32_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_32_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_32_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_32_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_32_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_32_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_32_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_32_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_32_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_32_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_32_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_32_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_32_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_32_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_32_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_32_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_32_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_32_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_32_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_32_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_32_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_32_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_32_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_32_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_32_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_00d0_32_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00e8_32_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f0_32_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f8_32_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f9_32_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fa_32_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fb_32_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0100_32_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_32_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_32_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_32_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_32_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_32_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_32_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_32_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_32_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_32_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_32_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_32_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_32_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_32_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_32_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_32_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_32_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_32_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_32_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_32_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_32_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_32_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_32_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_32_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_32_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_32_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_32_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_32_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_32_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_32_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_32_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_32_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_32_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_32_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_32_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_32_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_32_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_32_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_32_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_32_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_32_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_32_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_32_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_32_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_32_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_32_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_32_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_32_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_32_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_32_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_32_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_32_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_32_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_32_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_32_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_32_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_32_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_32_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_32_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_32_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_32_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_32_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_32_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_32_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_32_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ op_02d0_32_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02e8_32_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f0_32_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f8_32_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f9_32_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fa_32_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fb_32_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0400_32_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_32_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_32_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_32_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_32_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_32_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_32_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_32_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_32_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_32_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_32_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_32_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_32_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_32_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_32_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_32_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_32_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_32_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_32_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_32_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_32_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_32_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_32_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_32_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ op_04d0_32_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04e8_32_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f0_32_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f8_32_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f9_32_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fa_32_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fb_32_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0600_32_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_32_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_32_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_32_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_32_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_32_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_32_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_32_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_32_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_32_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_32_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_32_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_32_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_32_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_32_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_32_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_32_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_32_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_32_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_32_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_32_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_32_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_32_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_32_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ op_06c0_32_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06c8_32_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06d0_32_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06e8_32_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f0_32_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f8_32_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f9_32_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fa_32_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fb_32_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ op_0800_32_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_32_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_32_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_32_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_32_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_32_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_32_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_32_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_32_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_32_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_32_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_32_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_32_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_32_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_32_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_32_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_32_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_32_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_32_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_32_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_32_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_32_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_32_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_32_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_32_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_32_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_32_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_32_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_32_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_32_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_32_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_32_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_32_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_32_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_32_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_32_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_32_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_32_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_32_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_32_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_32_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_32_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_32_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_32_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_32_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_32_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_32_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_32_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_32_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_32_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_32_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_32_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_32_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_32_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_32_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_32_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_32_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_32_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_32_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_32_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_32_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_32_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_32_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_32_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_32_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_32_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_32_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_32_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_32_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_32_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_32_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_32_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_32_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_32_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_32_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c3a_32_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c3b_32_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c40_32_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_32_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_32_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_32_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_32_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_32_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_32_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_32_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c7a_32_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c7b_32_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c80_32_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_32_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_32_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_32_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_32_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_32_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_32_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_32_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cba_32_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cbb_32_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_32_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_32_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_32_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_32_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_32_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_32_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_32_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_32_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_32_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_32_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_32_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_32_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_32_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_32_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_32_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_32_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_32_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_32_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_32_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_32_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_32_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_32_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_32_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_32_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_32_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_32_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_32_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_32_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_32_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_32_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_32_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_32_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_32_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_32_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_32_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_32_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_32_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_32_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_32_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_32_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_32_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_32_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_32_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_32_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_32_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_32_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_32_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_32_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_32_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_32_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_32_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_32_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_32_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_32_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_32_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_32_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_32_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_32_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_32_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_32_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_32_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_32_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_32_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_32_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_32_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_32_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_32_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_32_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_32_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_32_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_32_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_32_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_32_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_32_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_32_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_32_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_32_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_32_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_32_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_32_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_32_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_32_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_32_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_32_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_32_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_32_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_32_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_32_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_32_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_32_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_32_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_32_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_32_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_32_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_32_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_32_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_32_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_32_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_32_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_32_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_32_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_32_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_32_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_32_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_32_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_32_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_32_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_32_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_32_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_32_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_32_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_32_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_32_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_32_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_32_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_32_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_32_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_32_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_32_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_32_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_32_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_32_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_32_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_32_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_32_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_32_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_32_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_32_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_32_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_32_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_32_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_32_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_32_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_32_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_32_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_32_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_32_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_32_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_32_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_32_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_32_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_32_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_32_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_32_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_32_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_32_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_32_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_32_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_32_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_32_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_32_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_32_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_32_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_32_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_32_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_32_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_32_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_32_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_32_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_32_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_32_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_32_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_32_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_32_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_32_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_32_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_32_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_32_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_32_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_32_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_32_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_32_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_32_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_32_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_32_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_32_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_32_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_32_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_32_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_32_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_32_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_32_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_32_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_32_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_32_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_32_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_32_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_32_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_32_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_32_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_32_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_32_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_32_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_32_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_32_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_32_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_32_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_32_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_32_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_32_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_32_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_32_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_32_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_32_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_32_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_32_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_32_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_32_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_32_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_32_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_32_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_32_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_32_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_32_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_32_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_32_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_32_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_32_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_32_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_32_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_32_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_32_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_32_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_32_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_32_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_32_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_32_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_32_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_32_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_32_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_32_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_32_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_32_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_32_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_32_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_32_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_32_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_32_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_32_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_32_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_32_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_32_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_32_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_32_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_32_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_32_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_32_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_32_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_32_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_32_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_32_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_32_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_32_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_32_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_32_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_32_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_32_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_32_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_32_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_32_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_32_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_32_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_32_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_32_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_32_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_32_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_32_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_32_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_32_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_32_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_32_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_32_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_32_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_32_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_32_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_32_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_32_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_32_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_32_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_32_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_32_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_32_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_32_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_32_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_32_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_32_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_32_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_32_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_32_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_32_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_32_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_32_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_32_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_32_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_32_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_32_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_32_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_32_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_32_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_32_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_32_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_32_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_32_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_32_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_32_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_32_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_32_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_32_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_32_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_32_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_32_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_32_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_32_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_32_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_32_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_32_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_32_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_32_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_32_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_32_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_32_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_32_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_32_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_32_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_32_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_32_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_32_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_32_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_32_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_32_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_32_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_32_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_32_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_32_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_32_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_32_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_32_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_32_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_32_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_32_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_32_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_32_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_32_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_32_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_32_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_32_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_32_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_32_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_32_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_32_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_32_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_32_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_32_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_32_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_32_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_32_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_32_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_32_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_32_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_32_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_32_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_32_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_32_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_32_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_32_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_32_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_32_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_32_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_32_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_32_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_32_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_32_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_32_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4100_32_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4110_32_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4118_32_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4120_32_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4128_32_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4130_32_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4138_32_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4139_32_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413a_32_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413b_32_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413c_32_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ op_4180_32_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_32_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_32_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_32_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_32_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_32_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_32_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_32_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_32_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_32_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_32_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_32_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_32_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_32_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_32_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_32_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_32_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_32_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_32_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_32_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_32_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_32_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_32_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_32_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_32_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_32_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_32_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_32_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_32_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_32_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_32_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_32_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_32_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_32_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_32_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_32_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_32_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_32_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_32_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_32_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_32_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_32_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_32_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_32_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_32_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_32_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_32_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_32_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_32_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_32_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_32_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_32_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_32_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_32_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_32_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_32_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_32_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_32_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_32_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_32_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_32_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_32_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_32_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_32_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_32_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_32_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_32_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_32_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_32_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_32_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_32_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_32_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_32_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_32_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_32_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_32_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_32_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_32_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_32_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_32_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_32_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_32_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_32_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_32_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_32_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_32_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_32_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_32_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_32_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_32_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_32_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_32_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_32_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_32_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_32_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_32_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_32_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_32_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_32_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_32_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_32_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_32_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_32_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_32_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_32_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_32_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_32_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_32_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_32_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_32_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_32_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_32_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_32_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_32_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_32_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_32_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_32_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_32_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_32_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_32_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_32_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_32_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_32_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_32_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_32_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_32_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_32_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_32_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_32_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_32_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_32_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_32_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_32_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_32_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_32_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_32_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_32_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_32_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_32_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_32_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_32_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_32_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_32_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_32_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_32_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_32_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_32_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_32_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_32_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_32_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_32_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_32_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ op_49c0_32_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ op_4a00_32_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_32_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_32_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_32_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_32_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_32_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_32_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_32_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a3a_32_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3b_32_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3c_32_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a40_32_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a48_32_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a50_32_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_32_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_32_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_32_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_32_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_32_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_32_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a7a_32_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7b_32_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7c_32_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a80_32_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a88_32_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a90_32_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_32_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_32_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_32_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_32_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_32_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_32_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4aba_32_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abb_32_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abc_32_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4ac0_32_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_32_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_32_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_32_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_32_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_32_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_32_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_32_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4c00_32_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c10_32_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c18_32_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c20_32_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c28_32_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c30_32_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c38_32_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c39_32_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3a_32_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3b_32_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3c_32_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c40_32_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c50_32_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c58_32_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c60_32_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c68_32_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c70_32_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c78_32_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c79_32_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7a_32_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7b_32_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7c_32_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ op_4c90_32_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_32_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_32_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_32_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_32_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_32_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_32_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_32_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_32_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_32_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_32_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_32_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_32_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_32_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_32_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_32_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_32_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_32_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_32_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_32_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_32_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_32_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_32_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_32_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_32_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_32_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_32_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_32_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_32_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_32_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_32_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_32_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_32_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_32_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_32_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_32_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_32_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_32_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_32_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_32_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_32_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_32_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_32_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_32_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_32_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_32_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_32_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_32_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_32_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_32_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_32_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_32_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_32_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_32_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_32_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_32_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_32_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_32_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_32_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_32_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_32_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_32_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_32_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_32_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_32_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_32_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_32_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_32_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_32_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_32_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_32_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_32_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_32_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_32_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_32_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_32_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_32_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_32_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_32_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_32_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_50fa_32_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fb_32_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fc_32_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5100_32_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_32_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_32_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_32_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_32_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_32_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_32_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_32_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_32_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_32_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_32_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_32_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_32_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_32_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_32_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_32_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_32_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_32_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_32_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_32_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_32_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_32_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_32_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_32_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_32_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_32_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_32_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_32_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_32_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_32_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_32_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_32_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_32_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_32_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_32_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_51fa_32_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fb_32_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fc_32_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_52c0_32_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_32_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_32_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_32_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_32_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_32_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_32_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_32_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_32_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_52fa_32_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fb_32_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fc_32_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_53c0_32_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_32_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_32_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_32_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_32_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_32_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_32_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_32_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_32_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_53fa_32_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fb_32_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fc_32_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_54c0_32_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_32_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_32_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_32_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_32_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_32_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_32_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_32_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_32_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_54fa_32_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fb_32_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fc_32_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_55c0_32_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_32_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_32_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_32_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_32_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_32_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_32_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_32_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_32_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_55fa_32_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fb_32_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fc_32_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_56c0_32_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_32_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_32_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_32_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_32_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_32_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_32_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_32_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_32_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_56fa_32_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fb_32_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fc_32_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_57c0_32_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_32_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_32_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_32_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_32_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_32_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_32_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_32_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_32_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_57fa_32_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fb_32_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fc_32_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_58c0_32_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_32_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_32_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_32_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_32_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_32_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_32_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_32_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_32_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_58fa_32_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fb_32_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fc_32_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_59c0_32_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_32_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_32_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_32_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_32_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_32_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_32_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_32_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_32_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_59fa_32_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fb_32_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fc_32_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ac0_32_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_32_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_32_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_32_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_32_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_32_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_32_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_32_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_32_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5afa_32_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afb_32_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afc_32_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5bc0_32_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_32_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_32_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_32_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_32_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_32_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_32_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_32_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_32_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5bfa_32_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfb_32_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfc_32_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5cc0_32_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_32_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_32_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_32_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_32_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_32_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_32_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_32_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_32_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5cfa_32_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfb_32_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfc_32_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5dc0_32_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_32_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_32_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_32_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_32_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_32_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_32_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_32_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_32_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5dfa_32_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfb_32_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfc_32_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ec0_32_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_32_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_32_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_32_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_32_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_32_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_32_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_32_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_32_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5efa_32_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efb_32_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efc_32_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5fc0_32_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_32_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_32_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_32_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_32_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_32_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_32_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_32_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_32_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5ffa_32_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffb_32_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffc_32_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_6000_32_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_32_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_32_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_32_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_32_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_32_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_32_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_32_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_32_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_32_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_32_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_32_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_32_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_32_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_32_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_32_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_32_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_32_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_32_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_32_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_32_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_32_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_32_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_32_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_32_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_32_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_32_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_32_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_32_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_32_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_32_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_32_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_32_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_32_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_32_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_32_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_32_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_32_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_32_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_32_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_32_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_32_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_32_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_32_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_32_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_32_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_32_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_32_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_32_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_32_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_32_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_32_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_32_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_32_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_32_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_32_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_32_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_32_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_32_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_32_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_32_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_32_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_32_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_32_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_32_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_32_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_32_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_32_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_32_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_32_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_32_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_32_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_32_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_32_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_32_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_32_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_32_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_32_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_32_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_32_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_32_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_32_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_32_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_32_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_32_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_32_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_32_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_32_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_32_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_32_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_32_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_32_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_32_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_32_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_32_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_32_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_32_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_32_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_32_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_32_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_32_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_32_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8140_32_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8148_32_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ op_8150_32_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_32_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_32_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_32_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_32_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_32_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_32_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8180_32_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8188_32_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ op_8190_32_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_32_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_32_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_32_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_32_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_32_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_32_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_32_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_32_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_32_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_32_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_32_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_32_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_32_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_32_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_32_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_32_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_32_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_32_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_32_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_32_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_32_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_32_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_32_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_32_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_32_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_32_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_32_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_32_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_32_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_32_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_32_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_32_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_32_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_32_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_32_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_32_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_32_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_32_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_32_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_32_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_32_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_32_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_32_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_32_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_32_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_32_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_32_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_32_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_32_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_32_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_32_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_32_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_32_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_32_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_32_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_32_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_32_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_32_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_32_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_32_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_32_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_32_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_32_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_32_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_32_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_32_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_32_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_32_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_32_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_32_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_32_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_32_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_32_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_32_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_32_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_32_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_32_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_32_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_32_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_32_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_32_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_32_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_32_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_32_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_32_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_32_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_32_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_32_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_32_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_32_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_32_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_32_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_32_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_32_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_32_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_32_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_32_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_32_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_32_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_32_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_32_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_32_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_32_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_32_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_32_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_32_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_32_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_32_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_32_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_32_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_32_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_32_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_32_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_32_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_32_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_32_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_32_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_32_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_32_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_32_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_32_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_32_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_32_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_32_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_32_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_32_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_32_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_32_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_32_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_32_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_32_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_32_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_32_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_32_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_32_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_32_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_32_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_32_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_32_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_32_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_32_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_32_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_32_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_32_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_32_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_32_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_32_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_32_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_32_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_32_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_32_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_32_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_32_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_32_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_32_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_32_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_32_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_32_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_32_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_32_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_32_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_32_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_32_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_32_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_32_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_32_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_32_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_32_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_32_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_32_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_32_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_32_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_32_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_32_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_32_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_32_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_32_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_32_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_32_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_32_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_32_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_32_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_32_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_32_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_32_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_32_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_32_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_32_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_32_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_32_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_32_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_32_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_32_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_32_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_32_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_32_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_32_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_32_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_32_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_32_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_32_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_32_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_32_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_32_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_32_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_32_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_32_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_32_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_32_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_32_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_32_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_32_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_32_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_32_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_32_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_32_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_32_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_32_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_32_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_32_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_32_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_32_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_32_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_32_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_32_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_32_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_32_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_32_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_32_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_32_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_32_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_32_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_32_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_32_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_32_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_32_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_32_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_32_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_32_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_32_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_32_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_32_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_32_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_32_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_32_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_32_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_32_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_32_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_32_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_32_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_32_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_32_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_32_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_32_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_32_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_32_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_32_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_32_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_32_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_32_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_32_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_32_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_32_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_32_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_32_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_32_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_32_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_32_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_32_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_32_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_32_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_32_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_32_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_32_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_32_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_32_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_32_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_32_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_32_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_32_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_32_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_32_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_32_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_32_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_32_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_32_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_32_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_32_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_32_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_32_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_32_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_32_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_32_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_32_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_32_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_32_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_32_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_32_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_32_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_32_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_32_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_32_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_32_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_32_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_32_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_32_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_32_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_32_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_32_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_32_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_32_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_32_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_32_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_32_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_32_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_32_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_32_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_32_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_32_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_32_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_32_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_32_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_32_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_32_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_32_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_32_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_32_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_32_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_32_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_32_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_32_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_32_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_32_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_32_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_32_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_32_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_32_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_32_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_32_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_32_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_32_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_32_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_32_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_32_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_32_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_32_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_32_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_32_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_32_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_32_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_32_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_32_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_32_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_32_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_32_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_32_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_32_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_32_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_32_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_32_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_32_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_32_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_32_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_32_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_32_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_32_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_32_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_32_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_32_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_32_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_32_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_32_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_32_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_32_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_32_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_32_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_32_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_32_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_32_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_32_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_32_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_32_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_32_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_32_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_32_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_32_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_32_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_32_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_32_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_32_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_32_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_32_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_32_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_32_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_32_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_32_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_32_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_32_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_32_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_32_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_32_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_32_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_32_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_32_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_32_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_32_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_32_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_32_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_32_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_32_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_32_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_32_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_32_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_32_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_32_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_32_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_32_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_32_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_32_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_32_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_32_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_32_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_32_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_32_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_32_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_32_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_32_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_32_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_32_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_32_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_32_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_32_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_32_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_32_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_32_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_32_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_32_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_32_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_32_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_32_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_32_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_32_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_32_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_32_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_32_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_32_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_32_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_32_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_32_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_32_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_32_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_32_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_32_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_32_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_32_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_32_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_32_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_32_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_32_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_32_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ op_e8c0_32_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8d0_32_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8e8_32_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f0_32_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f8_32_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f9_32_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fa_32_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fb_32_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9c0_32_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9d0_32_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9e8_32_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f0_32_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f8_32_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f9_32_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fa_32_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fb_32_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eac0_32_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ead0_32_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eae8_32_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf0_32_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf8_32_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf9_32_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebc0_32_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebd0_32_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebe8_32_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf0_32_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf8_32_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf9_32_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfa_32_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfb_32_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecc0_32_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecd0_32_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ece8_32_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf0_32_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf8_32_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf9_32_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edc0_32_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edd0_32_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ede8_32_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf0_32_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf8_32_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf9_32_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfa_32_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfb_32_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eec0_32_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eed0_32_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eee8_32_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef0_32_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef8_32_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef9_32_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efc0_32_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efd0_32_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efe8_32_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff0_32_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff8_32_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff9_32_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f000_32_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f008_32_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f010_32_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f018_32_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f020_32_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f028_32_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f030_32_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f038_32_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f039_32_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f200_32_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f208_32_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f210_32_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f218_32_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f220_32_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f228_32_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f230_32_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f238_32_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f239_32_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23a_32_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23b_32_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23c_32_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f240_32_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f248_32_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f250_32_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f258_32_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f260_32_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f268_32_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f270_32_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f278_32_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f279_32_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27a_32_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27b_32_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27c_32_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f280_32_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f2c0_32_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f310_32_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f320_32_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f328_32_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f330_32_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f338_32_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f339_32_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f350_32_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f358_32_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f368_32_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f370_32_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f378_32_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f379_32_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37a_32_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37b_32_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_32 */ +#ifdef CPUEMU_33 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_33[] = { +{ op_0000_33_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_33_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_33_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_33_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_33_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_33_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_33_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_33_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_33_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_33_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_33_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_33_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_33_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_33_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_33_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_33_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_33_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_33_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_33_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_33_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_33_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_33_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_33_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_33_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_33_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_33_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_00d0_33_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00e8_33_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f0_33_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f8_33_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f9_33_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fa_33_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fb_33_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0100_33_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_33_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_33_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_33_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_33_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_33_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_33_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_33_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_33_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_33_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_33_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_33_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_33_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_33_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_33_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_33_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_33_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_33_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_33_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_33_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_33_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_33_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_33_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_33_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_33_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_33_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_33_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_33_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_33_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_33_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_33_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_33_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_33_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_33_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_33_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_33_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_33_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_33_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_33_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_33_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_33_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_33_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_33_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_33_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_33_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_33_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_33_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_33_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_33_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_33_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_33_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_33_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_33_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_33_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_33_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_33_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_33_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_33_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_33_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_33_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_33_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_33_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_33_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_33_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_33_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ op_02d0_33_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02e8_33_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f0_33_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f8_33_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f9_33_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fa_33_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fb_33_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0400_33_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_33_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_33_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_33_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_33_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_33_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_33_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_33_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_33_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_33_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_33_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_33_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_33_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_33_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_33_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_33_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_33_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_33_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_33_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_33_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_33_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_33_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_33_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_33_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ op_04d0_33_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04e8_33_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f0_33_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f8_33_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f9_33_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fa_33_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fb_33_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0600_33_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_33_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_33_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_33_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_33_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_33_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_33_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_33_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_33_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_33_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_33_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_33_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_33_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_33_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_33_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_33_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_33_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_33_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_33_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_33_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_33_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_33_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_33_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_33_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ op_06c0_33_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06c8_33_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06d0_33_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06e8_33_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f0_33_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f8_33_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f9_33_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fa_33_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fb_33_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ op_0800_33_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_33_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_33_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_33_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_33_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_33_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_33_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_33_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_33_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_33_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_33_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_33_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_33_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_33_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_33_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_33_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_33_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_33_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_33_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_33_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_33_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_33_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_33_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_33_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_33_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_33_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_33_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_33_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_33_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_33_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_33_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_33_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_33_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_33_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_33_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_33_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_33_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_33_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_33_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_33_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_33_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_33_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_33_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_33_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_33_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_33_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_33_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_33_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_33_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_33_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_33_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_33_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_33_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_33_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_33_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_33_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_33_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_33_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_33_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_33_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_33_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_33_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_33_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_33_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_33_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_33_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_33_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_33_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_33_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_33_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_33_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_33_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_33_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_33_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_33_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c3a_33_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c3b_33_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c40_33_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_33_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_33_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_33_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_33_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_33_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_33_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_33_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c7a_33_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c7b_33_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c80_33_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_33_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_33_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_33_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_33_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_33_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_33_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_33_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cba_33_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cbb_33_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_33_ff, NULL, 0x0cd0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_33_ff, NULL, 0x0cd8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_33_ff, NULL, 0x0ce0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_33_ff, NULL, 0x0ce8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_33_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_33_ff, NULL, 0x0cf8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_33_ff, NULL, 0x0cf9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_33_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_33_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_33_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_33_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_33_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_33_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_33_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_33_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_33_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_33_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_33_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_33_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_33_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_33_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_33_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_33_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_33_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_33_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_33_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_33_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_33_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_33_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_33_ff, NULL, 0x0ed0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_33_ff, NULL, 0x0ed8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_33_ff, NULL, 0x0ee0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_33_ff, NULL, 0x0ee8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_33_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_33_ff, NULL, 0x0ef8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_33_ff, NULL, 0x0ef9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_33_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_33_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_33_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_33_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_33_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_33_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_33_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_33_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_33_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_33_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_33_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_33_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_33_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_33_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_33_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_33_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_33_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_33_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_33_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_33_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_33_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_33_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_33_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_33_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_33_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_33_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_33_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_33_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_33_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_33_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_33_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_33_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_33_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_33_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_33_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_33_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_33_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_33_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_33_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_33_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_33_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_33_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_33_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_33_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_33_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_33_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_33_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_33_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_33_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_33_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_33_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_33_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_33_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_33_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_33_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_33_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_33_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_33_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_33_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_33_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_33_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_33_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_33_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_33_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_33_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_33_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_33_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_33_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_33_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_33_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_33_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_33_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_33_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_33_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_33_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_33_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_33_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_33_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_33_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_33_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_33_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_33_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_33_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_33_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_33_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_33_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_33_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_33_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_33_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_33_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_33_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_33_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_33_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_33_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_33_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_33_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_33_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_33_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_33_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_33_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_33_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_33_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_33_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_33_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_33_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_33_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_33_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_33_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_33_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_33_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_33_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_33_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_33_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_33_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_33_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_33_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_33_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_33_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_33_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_33_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_33_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_33_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_33_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_33_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_33_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_33_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_33_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_33_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_33_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_33_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_33_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_33_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_33_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_33_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_33_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_33_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_33_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_33_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_33_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_33_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_33_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_33_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_33_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_33_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_33_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_33_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_33_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_33_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_33_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_33_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_33_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_33_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_33_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_33_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_33_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_33_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_33_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_33_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_33_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_33_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_33_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_33_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_33_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_33_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_33_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_33_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_33_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_33_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_33_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_33_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_33_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_33_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_33_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_33_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_33_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_33_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_33_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_33_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_33_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_33_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_33_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_33_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_33_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_33_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_33_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_33_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_33_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_33_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_33_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_33_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_33_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_33_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_33_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_33_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_33_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_33_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_33_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_33_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_33_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_33_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_33_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_33_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_33_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_33_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_33_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_33_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_33_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_33_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_33_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_33_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_33_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_33_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_33_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_33_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_33_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_33_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_33_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_33_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_33_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_33_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_33_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_33_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_33_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_33_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_33_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_33_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_33_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_33_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_33_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_33_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_33_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_33_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_33_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_33_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_33_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_33_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_33_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_33_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_33_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_33_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_33_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_33_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_33_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_33_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_33_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_33_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_33_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_33_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_33_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_33_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_33_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_33_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_33_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_33_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_33_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_33_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_33_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_33_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_33_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_33_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_33_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_33_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_33_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_33_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_33_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_33_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_33_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_33_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_33_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_33_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_33_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_33_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_33_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_33_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_33_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_33_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_33_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_33_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_33_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_33_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_33_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_33_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_33_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_33_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_33_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_33_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_33_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_33_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_33_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_33_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_33_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_33_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_33_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_33_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_33_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_33_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_33_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_33_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_33_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_33_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_33_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_33_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_33_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_33_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_33_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_33_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_33_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_33_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_33_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_33_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_33_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_33_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_33_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_33_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_33_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_33_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_33_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_33_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_33_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_33_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_33_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_33_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_33_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_33_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_33_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_33_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_33_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_33_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_33_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_33_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_33_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_33_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_33_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_33_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_33_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_33_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_33_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4100_33_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4110_33_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4118_33_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4120_33_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4128_33_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4130_33_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4138_33_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4139_33_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413a_33_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413b_33_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413c_33_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ op_4180_33_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_33_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_33_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_33_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_33_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_33_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_33_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_33_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_33_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_33_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_33_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_33_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_33_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_33_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_33_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_33_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_33_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_33_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_33_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_33_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_33_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_33_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_33_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_33_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_33_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_33_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_33_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_33_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_33_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_33_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_33_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_33_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_33_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_33_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_33_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_33_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_33_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_33_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_33_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_33_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_33_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_33_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_33_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_33_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_33_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_33_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_33_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_33_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_33_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_33_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_33_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_33_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_33_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_33_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_33_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_33_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_33_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_33_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_33_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_33_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_33_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_33_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_33_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_33_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_33_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_33_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_33_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_33_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_33_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_33_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_33_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_33_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_33_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_33_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_33_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_33_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_33_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_33_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_33_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_33_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_33_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_33_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_33_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_33_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_33_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_33_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_33_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_33_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_33_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_33_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_33_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_33_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_33_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_33_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_33_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_33_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_33_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_33_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_33_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_33_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_33_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_33_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_33_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_33_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_33_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_33_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_33_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_33_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_33_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_33_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_33_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_33_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_33_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_33_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_33_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_33_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_33_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_33_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_33_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_33_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_33_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_33_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_33_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_33_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_33_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_33_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_33_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_33_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_33_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_33_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_33_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_33_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_33_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_33_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_33_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_33_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_33_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_33_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_33_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_33_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_33_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_33_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_33_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_33_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_33_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_33_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_33_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_33_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_33_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_33_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_33_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_33_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ op_49c0_33_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ op_4a00_33_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_33_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_33_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_33_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_33_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_33_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_33_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_33_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a3a_33_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3b_33_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3c_33_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a40_33_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a48_33_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a50_33_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_33_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_33_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_33_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_33_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_33_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_33_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a7a_33_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7b_33_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7c_33_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a80_33_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a88_33_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a90_33_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_33_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_33_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_33_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_33_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_33_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_33_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4aba_33_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abb_33_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abc_33_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4ac0_33_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4ac8_33_ff, NULL, 0x4ac8, 2, { 0, 0 }, 0 }, /* HALT */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4acc_33_ff, NULL, 0x4acc, 2, { 0, 0 }, 0 }, /* PULSE */ +#endif +{ op_4ad0_33_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_33_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_33_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_33_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_33_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_33_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_33_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4c00_33_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c10_33_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c18_33_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c20_33_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c28_33_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c30_33_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c38_33_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c39_33_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3a_33_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3b_33_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3c_33_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c40_33_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c50_33_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c58_33_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c60_33_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c68_33_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c70_33_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c78_33_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c79_33_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7a_33_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7b_33_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7c_33_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ op_4c90_33_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_33_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_33_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_33_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_33_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_33_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_33_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_33_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_33_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_33_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_33_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_33_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_33_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_33_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_33_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_33_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_33_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_33_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_33_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_33_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_33_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_33_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_33_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_33_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_33_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_33_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_33_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_33_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_33_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_33_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_33_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_33_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_33_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_33_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_33_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_33_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_33_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_33_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_33_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_33_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_33_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_33_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_33_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_33_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_33_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_33_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_33_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_33_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_33_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_33_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_33_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_33_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_33_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_33_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_33_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_33_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_33_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_33_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_33_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_33_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_33_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_33_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_33_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_33_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_33_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_33_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_33_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_33_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_33_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_33_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_33_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_33_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_33_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_33_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_33_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_33_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_33_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_33_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_33_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_33_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_50fa_33_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fb_33_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fc_33_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5100_33_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_33_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_33_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_33_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_33_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_33_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_33_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_33_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_33_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_33_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_33_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_33_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_33_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_33_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_33_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_33_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_33_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_33_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_33_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_33_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_33_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_33_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_33_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_33_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_33_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_33_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_33_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_33_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_33_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_33_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_33_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_33_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_33_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_33_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_33_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_51fa_33_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fb_33_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fc_33_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_52c0_33_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_33_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_33_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_33_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_33_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_33_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_33_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_33_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_33_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_52fa_33_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fb_33_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fc_33_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_53c0_33_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_33_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_33_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_33_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_33_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_33_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_33_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_33_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_33_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_53fa_33_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fb_33_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fc_33_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_54c0_33_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_33_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_33_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_33_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_33_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_33_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_33_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_33_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_33_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_54fa_33_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fb_33_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fc_33_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_55c0_33_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_33_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_33_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_33_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_33_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_33_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_33_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_33_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_33_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_55fa_33_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fb_33_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fc_33_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_56c0_33_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_33_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_33_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_33_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_33_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_33_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_33_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_33_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_33_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_56fa_33_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fb_33_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fc_33_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_57c0_33_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_33_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_33_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_33_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_33_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_33_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_33_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_33_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_33_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_57fa_33_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fb_33_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fc_33_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_58c0_33_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_33_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_33_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_33_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_33_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_33_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_33_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_33_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_33_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_58fa_33_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fb_33_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fc_33_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_59c0_33_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_33_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_33_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_33_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_33_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_33_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_33_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_33_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_33_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_59fa_33_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fb_33_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fc_33_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ac0_33_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_33_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_33_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_33_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_33_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_33_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_33_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_33_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_33_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5afa_33_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afb_33_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afc_33_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5bc0_33_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_33_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_33_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_33_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_33_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_33_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_33_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_33_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_33_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5bfa_33_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfb_33_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfc_33_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5cc0_33_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_33_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_33_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_33_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_33_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_33_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_33_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_33_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_33_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5cfa_33_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfb_33_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfc_33_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5dc0_33_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_33_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_33_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_33_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_33_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_33_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_33_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_33_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_33_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5dfa_33_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfb_33_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfc_33_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ec0_33_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_33_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_33_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_33_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_33_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_33_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_33_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_33_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_33_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5efa_33_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efb_33_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efc_33_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5fc0_33_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_33_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_33_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_33_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_33_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_33_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_33_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_33_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_33_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5ffa_33_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffb_33_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffc_33_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_6000_33_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_33_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_33_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_33_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_33_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_33_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_33_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_33_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_33_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_33_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_33_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_33_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_33_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_33_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_33_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_33_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_33_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_33_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_33_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_33_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_33_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_33_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_33_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_33_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_33_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_33_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_33_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_33_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_33_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_33_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_33_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_33_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_33_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_33_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_33_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_33_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_33_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_33_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_33_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_33_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_33_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_33_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_33_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_33_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_33_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_33_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_33_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_33_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_33_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_33_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_33_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_33_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_33_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_33_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_33_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_33_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_33_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_33_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_33_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_33_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_33_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_33_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_33_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_33_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_33_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_33_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_33_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_33_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_33_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_33_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_33_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_33_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_33_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_33_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_33_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_33_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_33_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_33_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_33_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_33_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_33_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_33_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_33_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_33_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_33_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_33_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_33_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_33_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_33_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_33_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_33_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_33_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_33_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_33_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_33_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_33_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_33_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_33_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_33_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_33_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_33_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_33_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8140_33_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8148_33_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ op_8150_33_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_33_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_33_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_33_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_33_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_33_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_33_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8180_33_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8188_33_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ op_8190_33_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_33_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_33_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_33_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_33_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_33_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_33_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_33_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_33_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_33_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_33_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_33_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_33_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_33_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_33_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_33_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_33_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_33_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_33_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_33_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_33_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_33_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_33_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_33_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_33_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_33_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_33_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_33_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_33_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_33_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_33_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_33_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_33_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_33_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_33_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_33_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_33_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_33_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_33_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_33_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_33_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_33_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_33_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_33_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_33_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_33_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_33_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_33_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_33_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_33_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_33_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_33_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_33_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_33_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_33_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_33_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_33_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_33_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_33_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_33_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_33_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_33_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_33_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_33_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_33_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_33_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_33_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_33_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_33_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_33_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_33_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_33_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_33_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_33_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_33_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_33_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_33_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_33_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_33_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_33_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_33_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_33_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_33_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_33_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_33_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_33_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_33_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_33_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_33_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_33_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_33_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_33_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_33_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_33_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_33_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_33_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_33_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_33_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_33_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_33_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_33_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_33_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_33_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_33_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_33_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_33_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_33_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_33_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_33_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_33_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_33_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_33_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_33_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_33_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_33_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_33_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_33_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_33_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_33_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_33_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_33_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_33_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_33_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_33_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_33_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_33_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_33_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_33_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_33_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_33_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_33_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_33_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_33_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_33_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_33_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_33_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_33_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_33_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_33_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_33_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_33_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_33_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_33_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_33_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_33_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_33_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_33_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_33_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_33_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_33_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_33_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_33_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_33_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_33_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_33_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_33_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_33_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_33_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_33_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_33_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_33_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_33_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_33_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_33_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_33_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_33_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_33_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_33_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_33_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_33_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_33_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_33_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_33_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_33_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_33_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_33_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_33_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_33_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_33_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_33_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_33_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_33_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_33_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_33_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_33_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_33_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_33_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_33_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_33_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_33_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_33_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_33_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_33_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_33_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_33_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_33_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_33_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_33_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_33_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_33_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_33_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_33_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_33_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_33_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_33_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_33_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_33_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_33_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_33_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_33_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_33_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_33_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_33_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_33_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_33_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_33_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_33_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_33_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_33_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_33_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_33_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_33_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_33_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_33_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_33_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_33_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_33_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_33_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_33_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_33_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_33_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_33_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_33_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_33_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_33_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_33_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_33_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_33_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_33_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_33_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_33_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_33_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_33_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_33_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_33_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_33_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_33_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_33_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_33_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_33_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_33_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_33_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_33_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_33_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_33_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_33_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_33_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_33_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_33_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_33_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_33_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_33_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_33_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_33_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_33_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_33_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_33_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_33_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_33_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_33_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_33_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_33_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_33_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_33_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_33_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_33_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_33_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_33_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_33_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_33_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_33_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_33_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_33_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_33_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_33_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_33_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_33_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_33_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_33_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_33_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_33_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_33_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_33_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_33_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_33_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_33_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_33_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_33_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_33_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_33_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_33_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_33_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_33_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_33_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_33_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_33_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_33_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_33_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_33_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_33_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_33_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_33_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_33_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_33_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_33_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_33_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_33_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_33_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_33_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_33_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_33_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_33_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_33_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_33_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_33_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_33_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_33_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_33_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_33_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_33_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_33_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_33_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_33_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_33_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_33_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_33_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_33_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_33_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_33_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_33_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_33_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_33_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_33_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_33_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_33_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_33_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_33_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_33_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_33_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_33_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_33_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_33_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_33_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_33_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_33_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_33_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_33_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_33_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_33_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_33_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_33_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_33_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_33_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_33_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_33_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_33_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_33_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_33_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_33_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_33_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_33_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_33_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_33_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_33_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_33_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_33_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_33_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_33_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_33_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_33_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_33_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_33_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_33_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_33_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_33_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_33_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_33_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_33_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_33_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_33_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_33_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_33_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_33_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_33_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_33_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_33_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_33_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_33_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_33_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_33_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_33_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_33_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_33_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_33_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_33_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_33_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_33_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_33_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_33_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_33_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_33_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_33_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_33_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_33_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_33_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_33_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_33_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_33_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_33_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_33_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_33_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_33_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_33_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_33_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_33_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_33_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_33_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_33_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_33_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_33_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_33_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_33_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_33_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_33_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_33_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_33_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_33_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_33_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_33_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_33_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_33_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_33_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_33_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_33_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_33_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_33_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_33_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_33_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_33_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_33_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_33_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_33_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_33_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_33_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_33_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_33_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_33_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_33_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_33_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_33_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_33_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ op_e8c0_33_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8d0_33_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8e8_33_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f0_33_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f8_33_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f9_33_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fa_33_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fb_33_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9c0_33_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9d0_33_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9e8_33_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f0_33_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f8_33_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f9_33_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fa_33_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fb_33_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eac0_33_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ead0_33_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eae8_33_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf0_33_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf8_33_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf9_33_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebc0_33_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebd0_33_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebe8_33_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf0_33_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf8_33_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf9_33_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfa_33_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfb_33_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecc0_33_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecd0_33_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ece8_33_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf0_33_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf8_33_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf9_33_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edc0_33_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edd0_33_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ede8_33_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf0_33_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf8_33_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf9_33_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfa_33_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfb_33_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eec0_33_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eed0_33_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eee8_33_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef0_33_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef8_33_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef9_33_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efc0_33_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efd0_33_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efe8_33_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff0_33_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff8_33_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff9_33_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f000_33_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f008_33_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f010_33_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f018_33_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f020_33_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f028_33_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f030_33_ff, NULL, 0xf030, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f038_33_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f039_33_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f200_33_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f208_33_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f210_33_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f218_33_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f220_33_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f228_33_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f230_33_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f238_33_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f239_33_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23a_33_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23b_33_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23c_33_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f240_33_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f248_33_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f250_33_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f258_33_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f260_33_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f268_33_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f270_33_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f278_33_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f279_33_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27a_33_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27b_33_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27c_33_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f280_33_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f2c0_33_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f310_33_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f320_33_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f328_33_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f330_33_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f338_33_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f339_33_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f350_33_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f358_33_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f368_33_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f370_33_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f378_33_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f379_33_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37a_33_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37b_33_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f408_33_ff, NULL, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f410_33_ff, NULL, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f418_33_ff, NULL, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f419_33_ff, NULL, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41a_33_ff, NULL, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41b_33_ff, NULL, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41c_33_ff, NULL, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41d_33_ff, NULL, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41e_33_ff, NULL, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41f_33_ff, NULL, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f428_33_ff, NULL, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f430_33_ff, NULL, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f438_33_ff, NULL, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f439_33_ff, NULL, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43a_33_ff, NULL, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43b_33_ff, NULL, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43c_33_ff, NULL, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43d_33_ff, NULL, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43e_33_ff, NULL, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43f_33_ff, NULL, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f500_33_ff, NULL, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f508_33_ff, NULL, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f510_33_ff, NULL, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f518_33_ff, NULL, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f548_33_ff, NULL, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f568_33_ff, NULL, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f588_33_ff, NULL, 0xf588, -1, { 0, 0 }, 0 }, /* PLPAW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f5c8_33_ff, NULL, 0xf5c8, -1, { 0, 0 }, 0 }, /* PLPAR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f600_33_ff, NULL, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f608_33_ff, NULL, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f610_33_ff, NULL, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f618_33_ff, NULL, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f620_33_ff, NULL, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f800_33_ff, NULL, 0xf800, -1, { 0, 0 }, 0 }, /* LPSTOP */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_33 */ +#ifdef CPUEMU_34 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_34[] = { +{ op_0000_34_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_34_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_34_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_34_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_34_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_34_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_34_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_34_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_34_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_34_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_34_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_34_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_34_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_34_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_34_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_34_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_34_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_34_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_34_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_34_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_34_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_34_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_34_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_34_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_34_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_34_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_00d0_34_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00e8_34_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f0_34_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f8_34_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f9_34_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fa_34_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fb_34_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0100_34_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_34_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_34_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_34_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_34_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_34_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_34_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_34_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_34_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_34_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_34_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_34_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_34_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_34_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_34_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_34_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_34_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_34_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_34_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_34_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_34_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_34_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_34_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_34_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_34_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_34_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_34_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_34_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_34_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_34_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_34_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_34_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_34_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_34_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_34_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_34_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_34_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_34_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_34_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_34_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_34_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_34_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_34_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_34_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_34_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_34_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_34_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_34_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_34_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_34_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_34_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_34_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_34_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_34_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_34_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_34_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_34_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_34_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_34_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_34_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_34_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_34_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_34_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_34_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_34_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ op_02d0_34_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02e8_34_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f0_34_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f8_34_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f9_34_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fa_34_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fb_34_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0400_34_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_34_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_34_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_34_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_34_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_34_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_34_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_34_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_34_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_34_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_34_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_34_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_34_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_34_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_34_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_34_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_34_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_34_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_34_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_34_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_34_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_34_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_34_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_34_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ op_04d0_34_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04e8_34_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f0_34_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f8_34_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f9_34_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fa_34_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fb_34_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0600_34_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_34_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_34_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_34_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_34_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_34_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_34_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_34_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_34_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_34_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_34_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_34_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_34_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_34_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_34_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_34_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_34_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_34_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_34_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_34_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_34_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_34_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_34_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_34_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ op_06c0_34_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06c8_34_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06d0_34_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06e8_34_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f0_34_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f8_34_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f9_34_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fa_34_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fb_34_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ op_0800_34_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_34_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_34_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_34_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_34_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_34_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_34_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_34_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_34_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_34_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_34_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_34_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_34_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_34_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_34_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_34_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_34_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_34_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_34_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_34_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_34_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_34_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_34_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_34_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_34_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_34_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_34_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_34_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_34_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_34_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_34_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_34_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_34_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_34_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_34_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_34_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_34_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_34_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_34_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_34_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_34_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_34_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_34_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_34_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_34_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_34_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_34_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_34_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_34_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_34_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_34_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_34_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_34_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_34_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_34_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_34_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_34_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_34_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_34_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_34_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_34_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_34_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_34_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_34_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_34_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_34_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_34_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_34_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_34_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_34_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_34_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_34_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_34_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_34_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_34_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c3a_34_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c3b_34_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c40_34_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_34_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_34_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_34_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_34_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_34_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_34_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_34_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c7a_34_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c7b_34_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c80_34_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_34_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_34_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_34_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_34_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_34_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_34_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_34_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cba_34_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cbb_34_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_34_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_34_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_34_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_34_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_34_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_34_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_34_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_34_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_34_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_34_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_34_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_34_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_34_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_34_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_34_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_34_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_34_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_34_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_34_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_34_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_34_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_34_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_34_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_34_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_34_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_34_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_34_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_34_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_34_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_34_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_34_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_34_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_34_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_34_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_34_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_34_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_34_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_34_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_34_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_34_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_34_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_34_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_34_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_34_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_34_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_34_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_34_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_34_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_34_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_34_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_34_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_34_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_34_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_34_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_34_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_34_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_34_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_34_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_34_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_34_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_34_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_34_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_34_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_34_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_34_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_34_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_34_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_34_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_34_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_34_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_34_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_34_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_34_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_34_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_34_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_34_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_34_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_34_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_34_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_34_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_34_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_34_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_34_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_34_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_34_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_34_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_34_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_34_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_34_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_34_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_34_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_34_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_34_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_34_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_34_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_34_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_34_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_34_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_34_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_34_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_34_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_34_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_34_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_34_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_34_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_34_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_34_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_34_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_34_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_34_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_34_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_34_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_34_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_34_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_34_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_34_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_34_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_34_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_34_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_34_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_34_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_34_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_34_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_34_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_34_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_34_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_34_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_34_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_34_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_34_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_34_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_34_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_34_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_34_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_34_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_34_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_34_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_34_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_34_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_34_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_34_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_34_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_34_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_34_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_34_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_34_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_34_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_34_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_34_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_34_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_34_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_34_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_34_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_34_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_34_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_34_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_34_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_34_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_34_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_34_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_34_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_34_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_34_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_34_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_34_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_34_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_34_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_34_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_34_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_34_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_34_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_34_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_34_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_34_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_34_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_34_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_34_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_34_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_34_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_34_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_34_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_34_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_34_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_34_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_34_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_34_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_34_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_34_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_34_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_34_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_34_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_34_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_34_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_34_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_34_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_34_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_34_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_34_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_34_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_34_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_34_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_34_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_34_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_34_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_34_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_34_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_34_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_34_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_34_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_34_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_34_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_34_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_34_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_34_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_34_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_34_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_34_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_34_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_34_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_34_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_34_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_34_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_34_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_34_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_34_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_34_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_34_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_34_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_34_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_34_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_34_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_34_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_34_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_34_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_34_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_34_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_34_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_34_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_34_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_34_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_34_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_34_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_34_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_34_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_34_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_34_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_34_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_34_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_34_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_34_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_34_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_34_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_34_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_34_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_34_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_34_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_34_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_34_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_34_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_34_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_34_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_34_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_34_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_34_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_34_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_34_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_34_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_34_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_34_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_34_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_34_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_34_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_34_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_34_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_34_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_34_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_34_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_34_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_34_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_34_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_34_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_34_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_34_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_34_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_34_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_34_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_34_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_34_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_34_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_34_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_34_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_34_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_34_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_34_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_34_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_34_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_34_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_34_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_34_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_34_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_34_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_34_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_34_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_34_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_34_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_34_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_34_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_34_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_34_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_34_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_34_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_34_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_34_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_34_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_34_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_34_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_34_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_34_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_34_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_34_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_34_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_34_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_34_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_34_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_34_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_34_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_34_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_34_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_34_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_34_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_34_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_34_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_34_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_34_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_34_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_34_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_34_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_34_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_34_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_34_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_34_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_34_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_34_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_34_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_34_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_34_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_34_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_34_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_34_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_34_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_34_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_34_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_34_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_34_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_34_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_34_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_34_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_34_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_34_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_34_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_34_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_34_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_34_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_34_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_34_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_34_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_34_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_34_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_34_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_34_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_34_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_34_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_34_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4100_34_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4110_34_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4118_34_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4120_34_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4128_34_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4130_34_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4138_34_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4139_34_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413a_34_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413b_34_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413c_34_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ op_4180_34_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_34_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_34_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_34_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_34_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_34_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_34_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_34_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_34_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_34_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_34_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_34_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_34_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_34_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_34_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_34_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_34_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_34_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_34_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_34_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_34_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_34_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_34_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_34_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_34_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_34_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_34_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_34_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_34_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_34_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_34_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_34_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_34_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_34_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_34_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_34_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_34_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_34_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_34_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_34_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_34_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_34_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_34_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_34_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_34_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_34_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_34_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_34_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_34_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_34_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_34_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_34_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_34_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_34_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_34_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_34_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_34_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_34_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_34_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_34_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_34_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_34_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_34_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_34_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_34_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_34_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_34_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_34_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_34_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_34_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_34_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_34_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_34_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_34_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_34_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_34_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_34_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_34_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_34_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_34_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_34_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_34_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_34_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_34_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_34_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_34_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_34_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_34_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_34_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_34_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_34_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_34_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_34_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_34_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_34_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_34_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_34_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_34_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_34_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_34_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_34_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_34_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_34_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_34_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_34_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_34_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_34_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_34_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_34_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_34_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_34_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_34_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_34_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_34_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_34_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_34_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_34_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_34_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_34_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_34_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_34_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_34_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_34_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_34_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_34_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_34_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_34_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_34_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_34_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_34_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_34_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_34_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_34_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_34_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_34_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_34_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_34_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_34_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_34_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_34_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_34_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_34_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_34_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_34_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_34_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_34_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_34_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_34_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_34_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_34_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_34_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_34_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ op_49c0_34_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ op_4a00_34_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_34_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_34_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_34_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_34_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_34_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_34_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_34_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a3a_34_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3b_34_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3c_34_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a40_34_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a48_34_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a50_34_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_34_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_34_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_34_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_34_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_34_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_34_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a7a_34_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7b_34_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7c_34_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a80_34_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a88_34_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a90_34_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_34_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_34_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_34_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_34_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_34_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_34_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4aba_34_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abb_34_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abc_34_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4ac0_34_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_34_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_34_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_34_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_34_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_34_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_34_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_34_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4c00_34_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c10_34_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c18_34_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c20_34_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c28_34_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c30_34_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c38_34_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c39_34_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3a_34_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3b_34_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3c_34_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c40_34_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c50_34_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c58_34_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c60_34_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c68_34_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c70_34_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c78_34_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c79_34_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7a_34_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7b_34_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7c_34_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ op_4c90_34_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_34_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_34_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_34_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_34_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_34_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_34_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_34_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_34_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_34_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_34_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_34_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_34_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_34_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_34_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_34_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_34_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_34_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_34_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_34_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_34_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_34_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_34_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_34_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_34_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_34_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_34_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_34_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_34_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_34_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_34_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_34_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_34_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_34_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_34_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_34_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_34_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_34_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_34_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_34_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_34_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_34_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_34_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_34_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_34_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_34_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_34_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_34_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_34_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_34_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_34_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_34_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_34_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_34_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_34_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_34_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_34_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_34_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_34_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_34_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_34_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_34_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_34_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_34_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_34_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_34_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_34_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_34_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_34_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_34_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_34_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_34_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_34_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_34_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_34_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_34_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_34_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_34_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_34_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_34_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_50fa_34_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fb_34_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fc_34_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5100_34_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_34_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_34_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_34_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_34_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_34_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_34_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_34_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_34_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_34_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_34_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_34_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_34_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_34_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_34_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_34_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_34_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_34_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_34_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_34_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_34_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_34_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_34_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_34_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_34_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_34_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_34_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_34_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_34_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_34_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_34_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_34_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_34_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_34_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_34_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_51fa_34_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fb_34_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fc_34_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_52c0_34_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_34_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_34_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_34_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_34_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_34_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_34_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_34_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_34_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_52fa_34_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fb_34_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fc_34_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_53c0_34_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_34_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_34_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_34_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_34_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_34_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_34_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_34_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_34_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_53fa_34_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fb_34_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fc_34_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_54c0_34_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_34_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_34_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_34_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_34_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_34_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_34_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_34_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_34_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_54fa_34_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fb_34_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fc_34_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_55c0_34_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_34_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_34_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_34_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_34_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_34_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_34_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_34_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_34_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_55fa_34_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fb_34_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fc_34_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_56c0_34_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_34_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_34_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_34_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_34_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_34_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_34_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_34_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_34_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_56fa_34_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fb_34_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fc_34_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_57c0_34_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_34_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_34_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_34_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_34_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_34_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_34_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_34_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_34_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_57fa_34_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fb_34_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fc_34_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_58c0_34_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_34_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_34_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_34_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_34_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_34_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_34_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_34_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_34_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_58fa_34_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fb_34_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fc_34_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_59c0_34_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_34_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_34_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_34_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_34_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_34_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_34_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_34_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_34_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_59fa_34_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fb_34_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fc_34_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ac0_34_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_34_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_34_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_34_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_34_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_34_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_34_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_34_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_34_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5afa_34_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afb_34_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afc_34_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5bc0_34_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_34_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_34_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_34_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_34_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_34_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_34_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_34_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_34_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5bfa_34_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfb_34_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfc_34_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5cc0_34_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_34_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_34_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_34_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_34_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_34_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_34_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_34_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_34_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5cfa_34_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfb_34_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfc_34_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5dc0_34_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_34_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_34_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_34_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_34_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_34_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_34_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_34_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_34_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5dfa_34_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfb_34_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfc_34_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ec0_34_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_34_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_34_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_34_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_34_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_34_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_34_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_34_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_34_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5efa_34_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efb_34_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efc_34_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5fc0_34_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_34_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_34_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_34_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_34_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_34_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_34_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_34_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_34_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5ffa_34_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffb_34_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffc_34_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_6000_34_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_34_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_34_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_34_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_34_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_34_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_34_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_34_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_34_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_34_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_34_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_34_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_34_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_34_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_34_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_34_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_34_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_34_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_34_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_34_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_34_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_34_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_34_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_34_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_34_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_34_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_34_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_34_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_34_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_34_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_34_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_34_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_34_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_34_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_34_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_34_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_34_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_34_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_34_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_34_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_34_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_34_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_34_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_34_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_34_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_34_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_34_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_34_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_34_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_34_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_34_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_34_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_34_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_34_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_34_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_34_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_34_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_34_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_34_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_34_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_34_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_34_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_34_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_34_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_34_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_34_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_34_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_34_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_34_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_34_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_34_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_34_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_34_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_34_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_34_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_34_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_34_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_34_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_34_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_34_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_34_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_34_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_34_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_34_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_34_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_34_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_34_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_34_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_34_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_34_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_34_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_34_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_34_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_34_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_34_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_34_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_34_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_34_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_34_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_34_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_34_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_34_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8140_34_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8148_34_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ op_8150_34_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_34_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_34_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_34_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_34_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_34_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_34_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8180_34_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8188_34_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ op_8190_34_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_34_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_34_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_34_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_34_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_34_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_34_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_34_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_34_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_34_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_34_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_34_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_34_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_34_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_34_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_34_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_34_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_34_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_34_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_34_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_34_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_34_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_34_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_34_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_34_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_34_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_34_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_34_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_34_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_34_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_34_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_34_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_34_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_34_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_34_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_34_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_34_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_34_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_34_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_34_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_34_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_34_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_34_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_34_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_34_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_34_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_34_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_34_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_34_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_34_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_34_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_34_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_34_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_34_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_34_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_34_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_34_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_34_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_34_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_34_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_34_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_34_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_34_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_34_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_34_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_34_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_34_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_34_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_34_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_34_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_34_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_34_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_34_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_34_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_34_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_34_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_34_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_34_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_34_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_34_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_34_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_34_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_34_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_34_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_34_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_34_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_34_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_34_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_34_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_34_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_34_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_34_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_34_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_34_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_34_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_34_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_34_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_34_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_34_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_34_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_34_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_34_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_34_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_34_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_34_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_34_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_34_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_34_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_34_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_34_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_34_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_34_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_34_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_34_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_34_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_34_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_34_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_34_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_34_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_34_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_34_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_34_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_34_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_34_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_34_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_34_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_34_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_34_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_34_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_34_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_34_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_34_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_34_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_34_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_34_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_34_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_34_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_34_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_34_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_34_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_34_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_34_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_34_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_34_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_34_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_34_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_34_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_34_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_34_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_34_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_34_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_34_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_34_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_34_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_34_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_34_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_34_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_34_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_34_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_34_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_34_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_34_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_34_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_34_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_34_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_34_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_34_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_34_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_34_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_34_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_34_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_34_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_34_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_34_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_34_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_34_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_34_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_34_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_34_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_34_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_34_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_34_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_34_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_34_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_34_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_34_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_34_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_34_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_34_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_34_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_34_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_34_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_34_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_34_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_34_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_34_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_34_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_34_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_34_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_34_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_34_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_34_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_34_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_34_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_34_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_34_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_34_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_34_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_34_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_34_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_34_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_34_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_34_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_34_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_34_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_34_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_34_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_34_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_34_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_34_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_34_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_34_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_34_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_34_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_34_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_34_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_34_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_34_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_34_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_34_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_34_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_34_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_34_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_34_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_34_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_34_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_34_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_34_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_34_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_34_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_34_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_34_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_34_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_34_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_34_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_34_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_34_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_34_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_34_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_34_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_34_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_34_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_34_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_34_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_34_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_34_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_34_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_34_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_34_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_34_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_34_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_34_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_34_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_34_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_34_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_34_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_34_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_34_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_34_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_34_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_34_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_34_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_34_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_34_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_34_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_34_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_34_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_34_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_34_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_34_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_34_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_34_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_34_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_34_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_34_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_34_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_34_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_34_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_34_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_34_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_34_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_34_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_34_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_34_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_34_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_34_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_34_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_34_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_34_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_34_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_34_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_34_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_34_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_34_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_34_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_34_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_34_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_34_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_34_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_34_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_34_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_34_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_34_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_34_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_34_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_34_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_34_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_34_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_34_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_34_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_34_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_34_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_34_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_34_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_34_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_34_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_34_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_34_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_34_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_34_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_34_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_34_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_34_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_34_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_34_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_34_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_34_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_34_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_34_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_34_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_34_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_34_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_34_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_34_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_34_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_34_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_34_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_34_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_34_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_34_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_34_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_34_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_34_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_34_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_34_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_34_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_34_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_34_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_34_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_34_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_34_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_34_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_34_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_34_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_34_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_34_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_34_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_34_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_34_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_34_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_34_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_34_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_34_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_34_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_34_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_34_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_34_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_34_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_34_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_34_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_34_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_34_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_34_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_34_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_34_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_34_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_34_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_34_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_34_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_34_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_34_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_34_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_34_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_34_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_34_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_34_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_34_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_34_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_34_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_34_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_34_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_34_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_34_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_34_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_34_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_34_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_34_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_34_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_34_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_34_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_34_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_34_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_34_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_34_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_34_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_34_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_34_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_34_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_34_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_34_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_34_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_34_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_34_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_34_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_34_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_34_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_34_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_34_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_34_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_34_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_34_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_34_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_34_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_34_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_34_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_34_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_34_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_34_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_34_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_34_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_34_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_34_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_34_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_34_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_34_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_34_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_34_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_34_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_34_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_34_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_34_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_34_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_34_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_34_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_34_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_34_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_34_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_34_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_34_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_34_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_34_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ op_e8c0_34_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8d0_34_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8e8_34_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f0_34_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f8_34_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f9_34_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fa_34_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fb_34_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9c0_34_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9d0_34_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9e8_34_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f0_34_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f8_34_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f9_34_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fa_34_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fb_34_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eac0_34_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ead0_34_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eae8_34_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf0_34_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf8_34_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf9_34_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebc0_34_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebd0_34_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebe8_34_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf0_34_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf8_34_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf9_34_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfa_34_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfb_34_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecc0_34_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecd0_34_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ece8_34_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf0_34_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf8_34_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf9_34_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edc0_34_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edd0_34_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ede8_34_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf0_34_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf8_34_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf9_34_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfa_34_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfb_34_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eec0_34_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eed0_34_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eee8_34_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef0_34_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef8_34_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef9_34_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efc0_34_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efd0_34_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efe8_34_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff0_34_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff8_34_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff9_34_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f000_34_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f008_34_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f010_34_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f018_34_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f020_34_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f028_34_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f030_34_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f038_34_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f039_34_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f200_34_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f208_34_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f210_34_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f218_34_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f220_34_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f228_34_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f230_34_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f238_34_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f239_34_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23a_34_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23b_34_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23c_34_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f240_34_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f248_34_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f250_34_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f258_34_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f260_34_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f268_34_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f270_34_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f278_34_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f279_34_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27a_34_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27b_34_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27c_34_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f280_34_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f2c0_34_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f310_34_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f320_34_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f328_34_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f330_34_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f338_34_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f339_34_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f350_34_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f358_34_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f368_34_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f370_34_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f378_34_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f379_34_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37a_34_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37b_34_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_34 */ +#ifdef CPUEMU_35 +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_35[] = { +{ NULL, op_0000_35_ff, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0010_35_ff, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0018_35_ff, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0020_35_ff, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0028_35_ff, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0030_35_ff, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0038_35_ff, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0039_35_ff, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_003c_35_ff, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0040_35_ff, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0050_35_ff, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0058_35_ff, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0060_35_ff, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0068_35_ff, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0070_35_ff, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_0078_35_ff, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0079_35_ff, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_007c_35_ff, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ NULL, op_0080_35_ff, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0090_35_ff, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_0098_35_ff, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a0_35_ff, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00a8_35_ff, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b0_35_ff, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_00b8_35_ff, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_00b9_35_ff, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00d0_35_ff, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00e8_35_ff, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f0_35_ff, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f8_35_ff, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00f9_35_ff, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00fa_35_ff, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_00fb_35_ff, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0100_35_ff, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0108_35_ff, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0110_35_ff, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0118_35_ff, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0120_35_ff, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0128_35_ff, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0130_35_ff, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0138_35_ff, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0139_35_ff, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013a_35_ff, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_013b_35_ff, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_013c_35_ff, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0140_35_ff, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0148_35_ff, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ NULL, op_0150_35_ff, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0158_35_ff, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0160_35_ff, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0168_35_ff, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0170_35_ff, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0178_35_ff, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0179_35_ff, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0180_35_ff, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0188_35_ff, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_0190_35_ff, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0198_35_ff, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a0_35_ff, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01a8_35_ff, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b0_35_ff, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b8_35_ff, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01b9_35_ff, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_01c0_35_ff, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01c8_35_ff, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ NULL, op_01d0_35_ff, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01d8_35_ff, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e0_35_ff, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01e8_35_ff, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f0_35_ff, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_01f8_35_ff, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_01f9_35_ff, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0200_35_ff, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0210_35_ff, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0218_35_ff, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0220_35_ff, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0228_35_ff, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0230_35_ff, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0238_35_ff, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0239_35_ff, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_023c_35_ff, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0240_35_ff, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0250_35_ff, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0258_35_ff, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0260_35_ff, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0268_35_ff, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0270_35_ff, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_0278_35_ff, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0279_35_ff, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_027c_35_ff, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ NULL, op_0280_35_ff, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0290_35_ff, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_0298_35_ff, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a0_35_ff, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02a8_35_ff, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b0_35_ff, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_02b8_35_ff, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_02b9_35_ff, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02d0_35_ff, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02e8_35_ff, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f0_35_ff, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f8_35_ff, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02f9_35_ff, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02fa_35_ff, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_02fb_35_ff, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0400_35_ff, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0410_35_ff, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0418_35_ff, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0420_35_ff, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0428_35_ff, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0430_35_ff, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0438_35_ff, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0439_35_ff, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0440_35_ff, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0450_35_ff, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0458_35_ff, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0460_35_ff, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0468_35_ff, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0470_35_ff, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_0478_35_ff, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0479_35_ff, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0480_35_ff, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0490_35_ff, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_0498_35_ff, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a0_35_ff, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04a8_35_ff, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b0_35_ff, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_04b8_35_ff, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_04b9_35_ff, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04d0_35_ff, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04e8_35_ff, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f0_35_ff, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f8_35_ff, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04f9_35_ff, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04fa_35_ff, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_04fb_35_ff, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ NULL, op_0600_35_ff, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0610_35_ff, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0618_35_ff, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0620_35_ff, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0628_35_ff, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0630_35_ff, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0638_35_ff, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0639_35_ff, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0640_35_ff, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0650_35_ff, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0658_35_ff, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0660_35_ff, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0668_35_ff, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0670_35_ff, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_0678_35_ff, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0679_35_ff, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0680_35_ff, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0690_35_ff, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_0698_35_ff, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a0_35_ff, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06a8_35_ff, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b0_35_ff, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_06b8_35_ff, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_06b9_35_ff, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06c0_35_ff, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06c8_35_ff, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06d0_35_ff, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06e8_35_ff, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f0_35_ff, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f8_35_ff, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06f9_35_ff, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06fa_35_ff, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_06fb_35_ff, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ NULL, op_0800_35_ff, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0810_35_ff, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0818_35_ff, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0820_35_ff, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0828_35_ff, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0830_35_ff, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0838_35_ff, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_0839_35_ff, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083a_35_ff, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ NULL, op_083b_35_ff, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ NULL, op_0840_35_ff, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0850_35_ff, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0858_35_ff, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0860_35_ff, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0868_35_ff, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0870_35_ff, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ NULL, op_0878_35_ff, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0879_35_ff, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ NULL, op_0880_35_ff, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0890_35_ff, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_0898_35_ff, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a0_35_ff, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08a8_35_ff, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b0_35_ff, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b8_35_ff, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08b9_35_ff, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ NULL, op_08c0_35_ff, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d0_35_ff, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08d8_35_ff, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e0_35_ff, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08e8_35_ff, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f0_35_ff, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ NULL, op_08f8_35_ff, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_08f9_35_ff, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ NULL, op_0a00_35_ff, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a10_35_ff, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a18_35_ff, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a20_35_ff, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a28_35_ff, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a30_35_ff, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a38_35_ff, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a39_35_ff, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a3c_35_ff, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a40_35_ff, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a50_35_ff, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a58_35_ff, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a60_35_ff, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a68_35_ff, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a70_35_ff, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0a78_35_ff, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a79_35_ff, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a7c_35_ff, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ NULL, op_0a80_35_ff, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a90_35_ff, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0a98_35_ff, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa0_35_ff, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0aa8_35_ff, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab0_35_ff, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab8_35_ff, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_0ab9_35_ff, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad0_35_ff, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ad8_35_ff, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae0_35_ff, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ae8_35_ff, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af0_35_ff, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af8_35_ff, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0af9_35_ff, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ NULL, op_0c00_35_ff, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c10_35_ff, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c18_35_ff, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c20_35_ff, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c28_35_ff, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c30_35_ff, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c38_35_ff, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c39_35_ff, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c3a_35_ff, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c3b_35_ff, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ NULL, op_0c40_35_ff, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c50_35_ff, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c58_35_ff, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c60_35_ff, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c68_35_ff, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c70_35_ff, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0c78_35_ff, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c79_35_ff, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c7a_35_ff, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0c7b_35_ff, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ NULL, op_0c80_35_ff, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c90_35_ff, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0c98_35_ff, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca0_35_ff, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0ca8_35_ff, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb0_35_ff, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb8_35_ff, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_0cb9_35_ff, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cba_35_ff, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cbb_35_ff, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd0_35_ff, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cd8_35_ff, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce0_35_ff, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ce8_35_ff, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf0_35_ff, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf8_35_ff, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cf9_35_ff, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0cfc_35_ff, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e10_35_ff, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e18_35_ff, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e20_35_ff, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e28_35_ff, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e30_35_ff, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e38_35_ff, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e39_35_ff, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e50_35_ff, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e58_35_ff, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e60_35_ff, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e68_35_ff, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e70_35_ff, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e78_35_ff, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e79_35_ff, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e90_35_ff, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0e98_35_ff, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea0_35_ff, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ea8_35_ff, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb0_35_ff, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb8_35_ff, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0eb9_35_ff, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed0_35_ff, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ed8_35_ff, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee0_35_ff, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ee8_35_ff, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef0_35_ff, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef8_35_ff, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0ef9_35_ff, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_0efc_35_ff, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ NULL, op_1000_35_ff, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1010_35_ff, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1018_35_ff, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1020_35_ff, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1028_35_ff, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1030_35_ff, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1038_35_ff, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1039_35_ff, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103a_35_ff, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_103b_35_ff, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_103c_35_ff, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1080_35_ff, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1090_35_ff, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1098_35_ff, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a0_35_ff, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10a8_35_ff, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b0_35_ff, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b8_35_ff, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10b9_35_ff, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10ba_35_ff, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bb_35_ff, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10bc_35_ff, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10c0_35_ff, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d0_35_ff, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10d8_35_ff, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e0_35_ff, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10e8_35_ff, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f0_35_ff, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f8_35_ff, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10f9_35_ff, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fa_35_ff, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fb_35_ff, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_10fc_35_ff, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1100_35_ff, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1110_35_ff, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1118_35_ff, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1120_35_ff, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1128_35_ff, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1130_35_ff, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1138_35_ff, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1139_35_ff, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113a_35_ff, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_113b_35_ff, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_113c_35_ff, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1140_35_ff, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1150_35_ff, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1158_35_ff, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1160_35_ff, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1168_35_ff, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1170_35_ff, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_1178_35_ff, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1179_35_ff, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117a_35_ff, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_117b_35_ff, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_117c_35_ff, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_1180_35_ff, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1190_35_ff, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_1198_35_ff, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a0_35_ff, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11a8_35_ff, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b0_35_ff, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11b8_35_ff, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11b9_35_ff, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11ba_35_ff, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11bb_35_ff, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_11bc_35_ff, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_11c0_35_ff, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d0_35_ff, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11d8_35_ff, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e0_35_ff, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11e8_35_ff, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f0_35_ff, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f8_35_ff, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11f9_35_ff, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fa_35_ff, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fb_35_ff, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_11fc_35_ff, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13c0_35_ff, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d0_35_ff, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13d8_35_ff, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e0_35_ff, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13e8_35_ff, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f0_35_ff, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f8_35_ff, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13f9_35_ff, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fa_35_ff, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fb_35_ff, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_13fc_35_ff, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2000_35_ff, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2008_35_ff, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2010_35_ff, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2018_35_ff, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2020_35_ff, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2028_35_ff, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2030_35_ff, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2038_35_ff, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2039_35_ff, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203a_35_ff, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_203b_35_ff, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_203c_35_ff, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2040_35_ff, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2048_35_ff, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2050_35_ff, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2058_35_ff, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2060_35_ff, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2068_35_ff, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2070_35_ff, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2078_35_ff, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2079_35_ff, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207a_35_ff, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207b_35_ff, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_207c_35_ff, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_2080_35_ff, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2088_35_ff, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2090_35_ff, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2098_35_ff, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a0_35_ff, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20a8_35_ff, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b0_35_ff, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b8_35_ff, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20b9_35_ff, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20ba_35_ff, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bb_35_ff, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20bc_35_ff, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c0_35_ff, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20c8_35_ff, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d0_35_ff, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20d8_35_ff, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e0_35_ff, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20e8_35_ff, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f0_35_ff, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f8_35_ff, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20f9_35_ff, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fa_35_ff, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fb_35_ff, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_20fc_35_ff, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2100_35_ff, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2108_35_ff, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2110_35_ff, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2118_35_ff, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2120_35_ff, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2128_35_ff, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2130_35_ff, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2138_35_ff, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2139_35_ff, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213a_35_ff, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_213b_35_ff, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_213c_35_ff, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2140_35_ff, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2148_35_ff, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2150_35_ff, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2158_35_ff, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2160_35_ff, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2168_35_ff, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2170_35_ff, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_2178_35_ff, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2179_35_ff, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217a_35_ff, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_217b_35_ff, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_217c_35_ff, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_2180_35_ff, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2188_35_ff, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2190_35_ff, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_2198_35_ff, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a0_35_ff, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21a8_35_ff, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b0_35_ff, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21b8_35_ff, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21b9_35_ff, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21ba_35_ff, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21bb_35_ff, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_21bc_35_ff, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c0_35_ff, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21c8_35_ff, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d0_35_ff, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21d8_35_ff, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e0_35_ff, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21e8_35_ff, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f0_35_ff, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f8_35_ff, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21f9_35_ff, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fa_35_ff, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fb_35_ff, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_21fc_35_ff, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c0_35_ff, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23c8_35_ff, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d0_35_ff, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23d8_35_ff, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e0_35_ff, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23e8_35_ff, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f0_35_ff, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f8_35_ff, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23f9_35_ff, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fa_35_ff, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fb_35_ff, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_23fc_35_ff, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3000_35_ff, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3008_35_ff, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3010_35_ff, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3018_35_ff, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3020_35_ff, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3028_35_ff, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3030_35_ff, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3038_35_ff, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3039_35_ff, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303a_35_ff, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_303b_35_ff, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_303c_35_ff, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3040_35_ff, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3048_35_ff, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3050_35_ff, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3058_35_ff, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3060_35_ff, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3068_35_ff, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3070_35_ff, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3078_35_ff, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3079_35_ff, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307a_35_ff, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307b_35_ff, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ NULL, op_307c_35_ff, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ NULL, op_3080_35_ff, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3088_35_ff, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3090_35_ff, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3098_35_ff, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a0_35_ff, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30a8_35_ff, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b0_35_ff, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b8_35_ff, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30b9_35_ff, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30ba_35_ff, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bb_35_ff, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30bc_35_ff, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c0_35_ff, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30c8_35_ff, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d0_35_ff, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30d8_35_ff, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e0_35_ff, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30e8_35_ff, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f0_35_ff, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f8_35_ff, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30f9_35_ff, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fa_35_ff, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fb_35_ff, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_30fc_35_ff, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3100_35_ff, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3108_35_ff, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3110_35_ff, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3118_35_ff, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3120_35_ff, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3128_35_ff, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3130_35_ff, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3138_35_ff, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3139_35_ff, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313a_35_ff, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_313b_35_ff, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_313c_35_ff, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3140_35_ff, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3148_35_ff, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3150_35_ff, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3158_35_ff, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3160_35_ff, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3168_35_ff, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3170_35_ff, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_3178_35_ff, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3179_35_ff, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317a_35_ff, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_317b_35_ff, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_317c_35_ff, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_3180_35_ff, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3188_35_ff, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3190_35_ff, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_3198_35_ff, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a0_35_ff, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31a8_35_ff, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b0_35_ff, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31b8_35_ff, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31b9_35_ff, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31ba_35_ff, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31bb_35_ff, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ NULL, op_31bc_35_ff, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c0_35_ff, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31c8_35_ff, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d0_35_ff, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31d8_35_ff, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e0_35_ff, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31e8_35_ff, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f0_35_ff, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f8_35_ff, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31f9_35_ff, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fa_35_ff, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fb_35_ff, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ NULL, op_31fc_35_ff, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c0_35_ff, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33c8_35_ff, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d0_35_ff, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33d8_35_ff, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e0_35_ff, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33e8_35_ff, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f0_35_ff, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f8_35_ff, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33f9_35_ff, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fa_35_ff, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fb_35_ff, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ NULL, op_33fc_35_ff, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_4000_35_ff, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4010_35_ff, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4018_35_ff, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4020_35_ff, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4028_35_ff, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4030_35_ff, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4038_35_ff, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4039_35_ff, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4040_35_ff, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4050_35_ff, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4058_35_ff, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4060_35_ff, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4068_35_ff, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4070_35_ff, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_4078_35_ff, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4079_35_ff, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4080_35_ff, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4090_35_ff, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_4098_35_ff, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a0_35_ff, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40a8_35_ff, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b0_35_ff, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b8_35_ff, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40b9_35_ff, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ NULL, op_40c0_35_ff, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d0_35_ff, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40d8_35_ff, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e0_35_ff, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40e8_35_ff, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f0_35_ff, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f8_35_ff, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ NULL, op_40f9_35_ff, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4100_35_ff, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4110_35_ff, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4118_35_ff, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4120_35_ff, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4128_35_ff, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4130_35_ff, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4138_35_ff, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4139_35_ff, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413a_35_ff, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413b_35_ff, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_413c_35_ff, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ NULL, op_4180_35_ff, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4190_35_ff, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_4198_35_ff, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a0_35_ff, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41a8_35_ff, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b0_35_ff, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41b8_35_ff, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41b9_35_ff, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41ba_35_ff, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41bb_35_ff, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ NULL, op_41bc_35_ff, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ NULL, op_41d0_35_ff, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41e8_35_ff, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f0_35_ff, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_41f8_35_ff, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41f9_35_ff, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fa_35_ff, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ NULL, op_41fb_35_ff, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ NULL, op_4200_35_ff, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4210_35_ff, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4218_35_ff, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4220_35_ff, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4228_35_ff, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4230_35_ff, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4238_35_ff, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4239_35_ff, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4240_35_ff, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4250_35_ff, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4258_35_ff, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4260_35_ff, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4268_35_ff, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4270_35_ff, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_4278_35_ff, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4279_35_ff, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4280_35_ff, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4290_35_ff, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_4298_35_ff, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a0_35_ff, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42a8_35_ff, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b0_35_ff, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ NULL, op_42b8_35_ff, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ NULL, op_42b9_35_ff, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42c0_35_ff, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d0_35_ff, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42d8_35_ff, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e0_35_ff, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42e8_35_ff, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f0_35_ff, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f8_35_ff, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_42f9_35_ff, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ NULL, op_4400_35_ff, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4410_35_ff, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4418_35_ff, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4420_35_ff, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4428_35_ff, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4430_35_ff, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4438_35_ff, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4439_35_ff, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4440_35_ff, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4450_35_ff, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4458_35_ff, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4460_35_ff, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4468_35_ff, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4470_35_ff, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_4478_35_ff, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4479_35_ff, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4480_35_ff, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4490_35_ff, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_4498_35_ff, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a0_35_ff, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44a8_35_ff, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b0_35_ff, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ NULL, op_44b8_35_ff, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44b9_35_ff, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ NULL, op_44c0_35_ff, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d0_35_ff, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44d8_35_ff, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e0_35_ff, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44e8_35_ff, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f0_35_ff, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f8_35_ff, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44f9_35_ff, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fa_35_ff, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fb_35_ff, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_44fc_35_ff, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4600_35_ff, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4610_35_ff, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4618_35_ff, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4620_35_ff, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4628_35_ff, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4630_35_ff, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4638_35_ff, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4639_35_ff, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4640_35_ff, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4650_35_ff, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4658_35_ff, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4660_35_ff, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4668_35_ff, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4670_35_ff, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_4678_35_ff, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4679_35_ff, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4680_35_ff, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4690_35_ff, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_4698_35_ff, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a0_35_ff, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46a8_35_ff, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b0_35_ff, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ NULL, op_46b8_35_ff, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46b9_35_ff, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ NULL, op_46c0_35_ff, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d0_35_ff, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46d8_35_ff, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e0_35_ff, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46e8_35_ff, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f0_35_ff, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f8_35_ff, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46f9_35_ff, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fa_35_ff, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fb_35_ff, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ NULL, op_46fc_35_ff, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ NULL, op_4800_35_ff, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4808_35_ff, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ NULL, op_4810_35_ff, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4818_35_ff, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4820_35_ff, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4828_35_ff, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4830_35_ff, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ NULL, op_4838_35_ff, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4839_35_ff, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ NULL, op_4840_35_ff, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4848_35_ff, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ NULL, op_4850_35_ff, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4868_35_ff, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4870_35_ff, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4878_35_ff, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_4879_35_ff, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487a_35_ff, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ NULL, op_487b_35_ff, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ NULL, op_4880_35_ff, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_4890_35_ff, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a0_35_ff, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48a8_35_ff, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b0_35_ff, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b8_35_ff, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48b9_35_ff, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48c0_35_ff, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ NULL, op_48d0_35_ff, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e0_35_ff, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48e8_35_ff, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f0_35_ff, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f8_35_ff, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ NULL, op_48f9_35_ff, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_49c0_35_ff, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ NULL, op_4a00_35_ff, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a10_35_ff, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a18_35_ff, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a20_35_ff, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a28_35_ff, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a30_35_ff, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a38_35_ff, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a39_35_ff, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3a_35_ff, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3b_35_ff, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a3c_35_ff, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a40_35_ff, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a48_35_ff, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a50_35_ff, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a58_35_ff, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a60_35_ff, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a68_35_ff, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a70_35_ff, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4a78_35_ff, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a79_35_ff, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7a_35_ff, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7b_35_ff, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a7c_35_ff, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a80_35_ff, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4a88_35_ff, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4a90_35_ff, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4a98_35_ff, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa0_35_ff, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4aa8_35_ff, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab0_35_ff, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ NULL, op_4ab8_35_ff, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ NULL, op_4ab9_35_ff, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4aba_35_ff, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4abb_35_ff, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4abc_35_ff, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ NULL, op_4ac0_35_ff, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad0_35_ff, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ad8_35_ff, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae0_35_ff, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4ae8_35_ff, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af0_35_ff, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ NULL, op_4af8_35_ff, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ NULL, op_4af9_35_ff, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c00_35_ff, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c10_35_ff, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c18_35_ff, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c20_35_ff, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c28_35_ff, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c30_35_ff, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c38_35_ff, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c39_35_ff, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3a_35_ff, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3b_35_ff, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c3c_35_ff, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c40_35_ff, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c50_35_ff, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c58_35_ff, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c60_35_ff, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c68_35_ff, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c70_35_ff, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c78_35_ff, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c79_35_ff, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7a_35_ff, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7b_35_ff, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4c7c_35_ff, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ NULL, op_4c90_35_ff, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4c98_35_ff, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ca8_35_ff, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb0_35_ff, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb8_35_ff, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cb9_35_ff, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cba_35_ff, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cbb_35_ff, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd0_35_ff, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cd8_35_ff, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4ce8_35_ff, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf0_35_ff, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf8_35_ff, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cf9_35_ff, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfa_35_ff, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4cfb_35_ff, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ NULL, op_4e40_35_ff, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ NULL, op_4e50_35_ff, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ NULL, op_4e58_35_ff, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ NULL, op_4e60_35_ff, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ NULL, op_4e68_35_ff, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ NULL, op_4e70_35_ff, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ NULL, op_4e71_35_ff, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ NULL, op_4e72_35_ff, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ NULL, op_4e73_35_ff, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e74_35_ff, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ NULL, op_4e75_35_ff, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ NULL, op_4e76_35_ff, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ NULL, op_4e77_35_ff, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7a_35_ff, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_4e7b_35_ff, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ NULL, op_4e90_35_ff, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ NULL, op_4ea8_35_ff, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb0_35_ff, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4eb8_35_ff, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4eb9_35_ff, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ NULL, op_4eba_35_ff, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ NULL, op_4ebb_35_ff, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ NULL, op_4ed0_35_ff, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ NULL, op_4ee8_35_ff, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef0_35_ff, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_4ef8_35_ff, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4ef9_35_ff, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ NULL, op_4efa_35_ff, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ NULL, op_4efb_35_ff, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ NULL, op_5000_35_ff, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5010_35_ff, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5018_35_ff, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5020_35_ff, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5028_35_ff, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5030_35_ff, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5038_35_ff, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5039_35_ff, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5040_35_ff, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5048_35_ff, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5050_35_ff, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5058_35_ff, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5060_35_ff, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5068_35_ff, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5070_35_ff, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_5078_35_ff, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5079_35_ff, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5080_35_ff, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5088_35_ff, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_5090_35_ff, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_5098_35_ff, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a0_35_ff, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50a8_35_ff, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b0_35_ff, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_50b8_35_ff, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50b9_35_ff, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_50c0_35_ff, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50c8_35_ff, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_50d0_35_ff, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50d8_35_ff, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e0_35_ff, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50e8_35_ff, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f0_35_ff, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_50f8_35_ff, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_50f9_35_ff, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fa_35_ff, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fb_35_ff, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_50fc_35_ff, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5100_35_ff, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5110_35_ff, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5118_35_ff, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5120_35_ff, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5128_35_ff, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5130_35_ff, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5138_35_ff, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5139_35_ff, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5140_35_ff, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5148_35_ff, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5150_35_ff, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5158_35_ff, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5160_35_ff, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5168_35_ff, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5170_35_ff, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_5178_35_ff, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5179_35_ff, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5180_35_ff, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5188_35_ff, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_5190_35_ff, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_5198_35_ff, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a0_35_ff, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51a8_35_ff, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b0_35_ff, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_51b8_35_ff, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51b9_35_ff, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_51c0_35_ff, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51c8_35_ff, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_51d0_35_ff, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51d8_35_ff, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e0_35_ff, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51e8_35_ff, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f0_35_ff, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_51f8_35_ff, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_51f9_35_ff, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fa_35_ff, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fb_35_ff, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_51fc_35_ff, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_52c0_35_ff, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52c8_35_ff, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_52d0_35_ff, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52d8_35_ff, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e0_35_ff, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52e8_35_ff, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f0_35_ff, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_52f8_35_ff, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_52f9_35_ff, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fa_35_ff, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fb_35_ff, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_52fc_35_ff, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_53c0_35_ff, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53c8_35_ff, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_53d0_35_ff, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53d8_35_ff, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e0_35_ff, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53e8_35_ff, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f0_35_ff, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_53f8_35_ff, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_53f9_35_ff, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fa_35_ff, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fb_35_ff, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_53fc_35_ff, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_54c0_35_ff, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54c8_35_ff, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_54d0_35_ff, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54d8_35_ff, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e0_35_ff, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54e8_35_ff, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f0_35_ff, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_54f8_35_ff, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_54f9_35_ff, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fa_35_ff, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fb_35_ff, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_54fc_35_ff, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_55c0_35_ff, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55c8_35_ff, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_55d0_35_ff, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55d8_35_ff, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e0_35_ff, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55e8_35_ff, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f0_35_ff, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_55f8_35_ff, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_55f9_35_ff, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fa_35_ff, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fb_35_ff, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_55fc_35_ff, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_56c0_35_ff, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56c8_35_ff, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_56d0_35_ff, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56d8_35_ff, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e0_35_ff, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56e8_35_ff, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f0_35_ff, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_56f8_35_ff, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_56f9_35_ff, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fa_35_ff, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fb_35_ff, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_56fc_35_ff, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_57c0_35_ff, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57c8_35_ff, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_57d0_35_ff, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57d8_35_ff, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e0_35_ff, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57e8_35_ff, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f0_35_ff, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_57f8_35_ff, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_57f9_35_ff, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fa_35_ff, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fb_35_ff, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_57fc_35_ff, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_58c0_35_ff, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58c8_35_ff, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_58d0_35_ff, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58d8_35_ff, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e0_35_ff, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58e8_35_ff, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f0_35_ff, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_58f8_35_ff, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_58f9_35_ff, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fa_35_ff, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fb_35_ff, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_58fc_35_ff, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_59c0_35_ff, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59c8_35_ff, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_59d0_35_ff, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59d8_35_ff, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e0_35_ff, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59e8_35_ff, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f0_35_ff, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_59f8_35_ff, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_59f9_35_ff, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fa_35_ff, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fb_35_ff, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_59fc_35_ff, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5ac0_35_ff, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ac8_35_ff, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ad0_35_ff, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ad8_35_ff, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae0_35_ff, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ae8_35_ff, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af0_35_ff, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5af8_35_ff, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5af9_35_ff, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afa_35_ff, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afb_35_ff, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5afc_35_ff, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5bc0_35_ff, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bc8_35_ff, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5bd0_35_ff, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bd8_35_ff, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be0_35_ff, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5be8_35_ff, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf0_35_ff, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf8_35_ff, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5bf9_35_ff, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfa_35_ff, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfb_35_ff, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5bfc_35_ff, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5cc0_35_ff, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cc8_35_ff, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5cd0_35_ff, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cd8_35_ff, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce0_35_ff, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ce8_35_ff, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf0_35_ff, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf8_35_ff, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5cf9_35_ff, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfa_35_ff, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfb_35_ff, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5cfc_35_ff, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5dc0_35_ff, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dc8_35_ff, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5dd0_35_ff, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5dd8_35_ff, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de0_35_ff, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5de8_35_ff, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df0_35_ff, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5df8_35_ff, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5df9_35_ff, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfa_35_ff, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfb_35_ff, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5dfc_35_ff, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5ec0_35_ff, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ec8_35_ff, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5ed0_35_ff, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ed8_35_ff, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee0_35_ff, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ee8_35_ff, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef0_35_ff, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef8_35_ff, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ef9_35_ff, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efa_35_ff, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efb_35_ff, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5efc_35_ff, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_5fc0_35_ff, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fc8_35_ff, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ NULL, op_5fd0_35_ff, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fd8_35_ff, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe0_35_ff, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5fe8_35_ff, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff0_35_ff, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff8_35_ff, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ NULL, op_5ff9_35_ff, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffa_35_ff, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffb_35_ff, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_5ffc_35_ff, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ NULL, op_6000_35_ff, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6001_35_ff, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_60ff_35_ff, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6100_35_ff, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ NULL, op_6101_35_ff, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ NULL, op_61ff_35_ff, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ NULL, op_6200_35_ff, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6201_35_ff, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_62ff_35_ff, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6300_35_ff, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6301_35_ff, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_63ff_35_ff, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6400_35_ff, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6401_35_ff, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_64ff_35_ff, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6500_35_ff, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6501_35_ff, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_65ff_35_ff, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6600_35_ff, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6601_35_ff, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_66ff_35_ff, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6700_35_ff, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6701_35_ff, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_67ff_35_ff, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6800_35_ff, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6801_35_ff, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_68ff_35_ff, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6900_35_ff, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6901_35_ff, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_69ff_35_ff, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6a00_35_ff, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6a01_35_ff, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6aff_35_ff, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6b00_35_ff, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6b01_35_ff, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6bff_35_ff, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6c00_35_ff, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6c01_35_ff, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6cff_35_ff, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6d00_35_ff, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6d01_35_ff, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6dff_35_ff, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6e00_35_ff, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6e01_35_ff, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6eff_35_ff, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_6f00_35_ff, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ NULL, op_6f01_35_ff, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ NULL, op_6fff_35_ff, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ NULL, op_7000_35_ff, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ NULL, op_8000_35_ff, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8010_35_ff, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8018_35_ff, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8020_35_ff, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8028_35_ff, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8030_35_ff, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8038_35_ff, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8039_35_ff, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803a_35_ff, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_803b_35_ff, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_803c_35_ff, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8040_35_ff, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8050_35_ff, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8058_35_ff, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8060_35_ff, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8068_35_ff, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8070_35_ff, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8078_35_ff, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8079_35_ff, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807a_35_ff, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_807b_35_ff, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_807c_35_ff, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8080_35_ff, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8090_35_ff, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8098_35_ff, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a0_35_ff, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80a8_35_ff, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b0_35_ff, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80b8_35_ff, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80b9_35_ff, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80ba_35_ff, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80bb_35_ff, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_80bc_35_ff, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_80c0_35_ff, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d0_35_ff, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80d8_35_ff, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e0_35_ff, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80e8_35_ff, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f0_35_ff, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f8_35_ff, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80f9_35_ff, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fa_35_ff, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fb_35_ff, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ NULL, op_80fc_35_ff, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ NULL, op_8100_35_ff, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8108_35_ff, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ NULL, op_8110_35_ff, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8118_35_ff, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8120_35_ff, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8128_35_ff, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8130_35_ff, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8138_35_ff, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8139_35_ff, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8140_35_ff, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8148_35_ff, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ NULL, op_8150_35_ff, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8158_35_ff, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8160_35_ff, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8168_35_ff, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8170_35_ff, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_8178_35_ff, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8179_35_ff, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8180_35_ff, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_8188_35_ff, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ NULL, op_8190_35_ff, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_8198_35_ff, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a0_35_ff, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81a8_35_ff, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b0_35_ff, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ NULL, op_81b8_35_ff, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81b9_35_ff, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ NULL, op_81c0_35_ff, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d0_35_ff, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81d8_35_ff, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e0_35_ff, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81e8_35_ff, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f0_35_ff, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f8_35_ff, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81f9_35_ff, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fa_35_ff, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fb_35_ff, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ NULL, op_81fc_35_ff, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ NULL, op_9000_35_ff, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9010_35_ff, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9018_35_ff, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9020_35_ff, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9028_35_ff, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9030_35_ff, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9038_35_ff, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9039_35_ff, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903a_35_ff, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_903b_35_ff, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_903c_35_ff, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9040_35_ff, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9048_35_ff, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9050_35_ff, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9058_35_ff, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9060_35_ff, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9068_35_ff, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9070_35_ff, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9078_35_ff, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9079_35_ff, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907a_35_ff, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_907b_35_ff, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_907c_35_ff, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9080_35_ff, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9088_35_ff, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9090_35_ff, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9098_35_ff, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a0_35_ff, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90a8_35_ff, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b0_35_ff, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90b8_35_ff, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90b9_35_ff, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90ba_35_ff, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90bb_35_ff, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_90bc_35_ff, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_90c0_35_ff, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90c8_35_ff, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d0_35_ff, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90d8_35_ff, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e0_35_ff, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90e8_35_ff, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f0_35_ff, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f8_35_ff, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90f9_35_ff, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fa_35_ff, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fb_35_ff, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_90fc_35_ff, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_9100_35_ff, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9108_35_ff, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9110_35_ff, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9118_35_ff, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9120_35_ff, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9128_35_ff, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9130_35_ff, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9138_35_ff, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9139_35_ff, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9140_35_ff, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9148_35_ff, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9150_35_ff, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9158_35_ff, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9160_35_ff, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9168_35_ff, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9170_35_ff, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_9178_35_ff, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9179_35_ff, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9180_35_ff, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9188_35_ff, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ NULL, op_9190_35_ff, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_9198_35_ff, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a0_35_ff, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91a8_35_ff, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b0_35_ff, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ NULL, op_91b8_35_ff, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91b9_35_ff, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ NULL, op_91c0_35_ff, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91c8_35_ff, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d0_35_ff, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91d8_35_ff, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e0_35_ff, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91e8_35_ff, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f0_35_ff, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f8_35_ff, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91f9_35_ff, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fa_35_ff, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fb_35_ff, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ NULL, op_91fc_35_ff, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ NULL, op_b000_35_ff, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b010_35_ff, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b018_35_ff, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b020_35_ff, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b028_35_ff, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b030_35_ff, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b038_35_ff, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b039_35_ff, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03a_35_ff, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b03b_35_ff, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b03c_35_ff, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b040_35_ff, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b048_35_ff, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b050_35_ff, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b058_35_ff, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b060_35_ff, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b068_35_ff, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b070_35_ff, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b078_35_ff, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b079_35_ff, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07a_35_ff, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b07b_35_ff, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b07c_35_ff, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b080_35_ff, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b088_35_ff, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b090_35_ff, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b098_35_ff, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a0_35_ff, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0a8_35_ff, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b0_35_ff, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b8_35_ff, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0b9_35_ff, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0ba_35_ff, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bb_35_ff, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ NULL, op_b0bc_35_ff, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ NULL, op_b0c0_35_ff, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0c8_35_ff, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d0_35_ff, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0d8_35_ff, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e0_35_ff, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0e8_35_ff, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f0_35_ff, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f8_35_ff, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0f9_35_ff, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fa_35_ff, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fb_35_ff, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b0fc_35_ff, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b100_35_ff, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b108_35_ff, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b110_35_ff, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b118_35_ff, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b120_35_ff, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b128_35_ff, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b130_35_ff, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b138_35_ff, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b139_35_ff, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b140_35_ff, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b148_35_ff, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b150_35_ff, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b158_35_ff, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b160_35_ff, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b168_35_ff, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b170_35_ff, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b178_35_ff, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b179_35_ff, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b180_35_ff, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b188_35_ff, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ NULL, op_b190_35_ff, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b198_35_ff, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a0_35_ff, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1a8_35_ff, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b0_35_ff, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b8_35_ff, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1b9_35_ff, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ NULL, op_b1c0_35_ff, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1c8_35_ff, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d0_35_ff, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1d8_35_ff, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e0_35_ff, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1e8_35_ff, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f0_35_ff, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f8_35_ff, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1f9_35_ff, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fa_35_ff, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fb_35_ff, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ NULL, op_b1fc_35_ff, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ NULL, op_c000_35_ff, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c010_35_ff, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c018_35_ff, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c020_35_ff, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c028_35_ff, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c030_35_ff, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c038_35_ff, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c039_35_ff, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03a_35_ff, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c03b_35_ff, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c03c_35_ff, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c040_35_ff, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c050_35_ff, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c058_35_ff, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c060_35_ff, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c068_35_ff, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c070_35_ff, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c078_35_ff, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c079_35_ff, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07a_35_ff, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c07b_35_ff, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c07c_35_ff, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c080_35_ff, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c090_35_ff, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c098_35_ff, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a0_35_ff, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0a8_35_ff, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b0_35_ff, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0b8_35_ff, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0b9_35_ff, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0ba_35_ff, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0bb_35_ff, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c0bc_35_ff, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c0c0_35_ff, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d0_35_ff, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0d8_35_ff, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e0_35_ff, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0e8_35_ff, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f0_35_ff, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f8_35_ff, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0f9_35_ff, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fa_35_ff, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fb_35_ff, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ NULL, op_c0fc_35_ff, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ NULL, op_c100_35_ff, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c108_35_ff, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ NULL, op_c110_35_ff, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c118_35_ff, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c120_35_ff, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c128_35_ff, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c130_35_ff, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c138_35_ff, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c139_35_ff, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c140_35_ff, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c148_35_ff, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c150_35_ff, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c158_35_ff, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c160_35_ff, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c168_35_ff, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c170_35_ff, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c178_35_ff, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c179_35_ff, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c188_35_ff, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ NULL, op_c190_35_ff, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c198_35_ff, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a0_35_ff, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1a8_35_ff, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b0_35_ff, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ NULL, op_c1b8_35_ff, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1b9_35_ff, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ NULL, op_c1c0_35_ff, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d0_35_ff, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1d8_35_ff, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e0_35_ff, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1e8_35_ff, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f0_35_ff, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f8_35_ff, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1f9_35_ff, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fa_35_ff, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fb_35_ff, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ NULL, op_c1fc_35_ff, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ NULL, op_d000_35_ff, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d010_35_ff, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d018_35_ff, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d020_35_ff, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d028_35_ff, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d030_35_ff, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d038_35_ff, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d039_35_ff, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03a_35_ff, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d03b_35_ff, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d03c_35_ff, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d040_35_ff, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d048_35_ff, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d050_35_ff, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d058_35_ff, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d060_35_ff, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d068_35_ff, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d070_35_ff, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d078_35_ff, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d079_35_ff, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07a_35_ff, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d07b_35_ff, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d07c_35_ff, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d080_35_ff, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d088_35_ff, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d090_35_ff, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d098_35_ff, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a0_35_ff, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0a8_35_ff, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b0_35_ff, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b8_35_ff, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0b9_35_ff, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0ba_35_ff, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bb_35_ff, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d0bc_35_ff, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d0c0_35_ff, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0c8_35_ff, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d0_35_ff, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0d8_35_ff, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e0_35_ff, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0e8_35_ff, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f0_35_ff, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f8_35_ff, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0f9_35_ff, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fa_35_ff, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fb_35_ff, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d0fc_35_ff, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d100_35_ff, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d108_35_ff, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d110_35_ff, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d118_35_ff, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d120_35_ff, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d128_35_ff, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d130_35_ff, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d138_35_ff, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d139_35_ff, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d140_35_ff, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d148_35_ff, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d150_35_ff, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d158_35_ff, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d160_35_ff, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d168_35_ff, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d170_35_ff, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d178_35_ff, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d179_35_ff, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d180_35_ff, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d188_35_ff, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ NULL, op_d190_35_ff, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d198_35_ff, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a0_35_ff, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1a8_35_ff, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b0_35_ff, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b8_35_ff, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1b9_35_ff, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ NULL, op_d1c0_35_ff, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1c8_35_ff, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d0_35_ff, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1d8_35_ff, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e0_35_ff, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1e8_35_ff, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f0_35_ff, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f8_35_ff, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1f9_35_ff, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fa_35_ff, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fb_35_ff, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ NULL, op_d1fc_35_ff, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ NULL, op_e000_35_ff, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e008_35_ff, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e010_35_ff, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e018_35_ff, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e020_35_ff, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e028_35_ff, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e030_35_ff, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e038_35_ff, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e040_35_ff, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e048_35_ff, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e050_35_ff, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e058_35_ff, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e060_35_ff, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e068_35_ff, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e070_35_ff, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e078_35_ff, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e080_35_ff, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e088_35_ff, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e090_35_ff, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e098_35_ff, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0a0_35_ff, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ NULL, op_e0a8_35_ff, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ NULL, op_e0b0_35_ff, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ NULL, op_e0b8_35_ff, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ NULL, op_e0d0_35_ff, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0d8_35_ff, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e0_35_ff, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0e8_35_ff, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f0_35_ff, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f8_35_ff, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e0f9_35_ff, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ NULL, op_e100_35_ff, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e108_35_ff, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e110_35_ff, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e118_35_ff, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e120_35_ff, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e128_35_ff, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e130_35_ff, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e138_35_ff, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e140_35_ff, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e148_35_ff, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e150_35_ff, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e158_35_ff, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e160_35_ff, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e168_35_ff, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e170_35_ff, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e178_35_ff, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e180_35_ff, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e188_35_ff, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e190_35_ff, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e198_35_ff, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1a0_35_ff, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ NULL, op_e1a8_35_ff, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ NULL, op_e1b0_35_ff, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ NULL, op_e1b8_35_ff, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ NULL, op_e1d0_35_ff, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1d8_35_ff, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e0_35_ff, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1e8_35_ff, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f0_35_ff, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f8_35_ff, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e1f9_35_ff, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ NULL, op_e2d0_35_ff, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2d8_35_ff, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e0_35_ff, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2e8_35_ff, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f0_35_ff, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f8_35_ff, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e2f9_35_ff, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ NULL, op_e3d0_35_ff, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3d8_35_ff, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e0_35_ff, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3e8_35_ff, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f0_35_ff, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f8_35_ff, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e3f9_35_ff, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ NULL, op_e4d0_35_ff, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4d8_35_ff, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e0_35_ff, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4e8_35_ff, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f0_35_ff, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f8_35_ff, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e4f9_35_ff, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ NULL, op_e5d0_35_ff, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5d8_35_ff, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e0_35_ff, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5e8_35_ff, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f0_35_ff, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f8_35_ff, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e5f9_35_ff, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ NULL, op_e6d0_35_ff, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6d8_35_ff, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e0_35_ff, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6e8_35_ff, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f0_35_ff, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f8_35_ff, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e6f9_35_ff, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ NULL, op_e7d0_35_ff, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7d8_35_ff, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e0_35_ff, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7e8_35_ff, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f0_35_ff, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f8_35_ff, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ NULL, op_e7f9_35_ff, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8c0_35_ff, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8d0_35_ff, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8e8_35_ff, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f0_35_ff, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f8_35_ff, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8f9_35_ff, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8fa_35_ff, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e8fb_35_ff, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9c0_35_ff, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9d0_35_ff, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9e8_35_ff, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f0_35_ff, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f8_35_ff, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9f9_35_ff, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9fa_35_ff, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_e9fb_35_ff, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eac0_35_ff, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ead0_35_ff, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eae8_35_ff, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf0_35_ff, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf8_35_ff, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eaf9_35_ff, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebc0_35_ff, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebd0_35_ff, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebe8_35_ff, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf0_35_ff, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf8_35_ff, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebf9_35_ff, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebfa_35_ff, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ebfb_35_ff, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecc0_35_ff, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecd0_35_ff, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ece8_35_ff, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf0_35_ff, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf8_35_ff, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ecf9_35_ff, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edc0_35_ff, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edd0_35_ff, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_ede8_35_ff, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf0_35_ff, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf8_35_ff, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edf9_35_ff, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edfa_35_ff, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_edfb_35_ff, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eec0_35_ff, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eed0_35_ff, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eee8_35_ff, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef0_35_ff, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef8_35_ff, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eef9_35_ff, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efc0_35_ff, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efd0_35_ff, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_efe8_35_ff, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff0_35_ff, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff8_35_ff, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_eff9_35_ff, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f000_35_ff, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f008_35_ff, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f010_35_ff, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f018_35_ff, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f020_35_ff, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f028_35_ff, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f030_35_ff, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f038_35_ff, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f039_35_ff, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f200_35_ff, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f208_35_ff, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f210_35_ff, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f218_35_ff, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f220_35_ff, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f228_35_ff, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f230_35_ff, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f238_35_ff, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f239_35_ff, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23a_35_ff, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23b_35_ff, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f23c_35_ff, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f240_35_ff, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f248_35_ff, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f250_35_ff, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f258_35_ff, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f260_35_ff, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f268_35_ff, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f270_35_ff, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f278_35_ff, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f279_35_ff, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27a_35_ff, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27b_35_ff, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f27c_35_ff, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f280_35_ff, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f2c0_35_ff, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f310_35_ff, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f320_35_ff, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f328_35_ff, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f330_35_ff, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f338_35_ff, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f339_35_ff, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f350_35_ff, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f358_35_ff, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f368_35_ff, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f370_35_ff, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f378_35_ff, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f379_35_ff, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f37a_35_ff, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ NULL, op_f37b_35_ff, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#endif /* CPUEMU_35 */ +#ifdef CPUEMU_40 +const struct cputbl op_smalltbl_40[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_40_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_40_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_40_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_40_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_40_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_40_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_00d0_40_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00e8_40_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f0_40_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f8_40_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f9_40_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fa_40_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fb_40_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_40_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_40_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_40_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_40_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_40_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_40_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_40_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_40_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_40_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_40_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_40_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_40_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_40_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_40_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_40_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_40_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_40_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_40_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_40_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_40_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_40_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_40_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_40_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_40_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ op_02d0_40_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02e8_40_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f0_40_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f8_40_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f9_40_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fa_40_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fb_40_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_40_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_40_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_40_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_40_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ op_04d0_40_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04e8_40_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f0_40_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f8_40_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f9_40_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fa_40_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fb_40_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_40_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_40_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_40_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_40_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ op_06c0_40_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06c8_40_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06d0_40_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06e8_40_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f0_40_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f8_40_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f9_40_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fa_40_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fb_40_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_40_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_40_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_40_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_40_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_40_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_40_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_40_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_40_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_40_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_40_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_40_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_40_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_40_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_40_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_40_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_40_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_40_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_40_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_40_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_40_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_40_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_40_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_40_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_40_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_40_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_40_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_40_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_40_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c3a_40_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c3b_40_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_40_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c7a_40_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c7b_40_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_40_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cba_40_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cbb_40_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_40_ff, NULL, 0x0cd0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_40_ff, NULL, 0x0cd8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_40_ff, NULL, 0x0ce0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_40_ff, NULL, 0x0ce8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_40_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_40_ff, NULL, 0x0cf8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_40_ff, NULL, 0x0cf9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_40_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_40_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_40_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_40_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_40_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_40_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_40_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_40_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_40_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_40_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_40_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_40_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_40_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_40_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_40_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_40_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_40_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_40_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_40_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_40_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_40_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_40_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_40_ff, NULL, 0x0ed0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_40_ff, NULL, 0x0ed8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_40_ff, NULL, 0x0ee0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_40_ff, NULL, 0x0ee8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_40_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_40_ff, NULL, 0x0ef8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_40_ff, NULL, 0x0ef9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_40_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_40_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_40_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_40_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_40_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_40_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_40_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_40_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_40_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_40_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_40_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_40_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_40_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_40_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_40_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_40_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_40_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_40_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_40_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_40_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_40_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_40_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_40_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_40_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_40_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_40_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_40_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_40_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_40_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_40_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_40_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_40_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_40_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_40_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_40_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_40_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_40_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_40_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_40_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_40_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_40_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_40_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_40_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_40_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_40_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_40_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_40_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_40_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_40_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_40_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_40_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_40_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_40_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_40_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_40_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_40_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_40_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_40_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_40_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_40_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_40_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_40_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_40_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_40_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_40_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_40_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_40_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_40_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_40_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_40_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_40_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_40_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_40_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_40_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_40_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_40_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_40_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_40_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_40_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_40_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_40_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_40_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_40_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_40_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_40_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_40_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_40_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_40_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_40_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_40_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_40_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_40_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_40_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4100_40_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4110_40_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4118_40_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4120_40_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4128_40_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4130_40_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4138_40_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4139_40_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413a_40_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413b_40_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413c_40_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_40_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_40_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_40_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_40_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_40_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_40_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_40_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_40_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_40_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_40_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_40_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_40_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_40_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_40_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_40_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_40_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_40_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_40_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_40_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_40_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_40_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_40_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_40_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_40_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_40_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_40_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_40_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_40_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_40_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_40_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_40_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_40_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_40_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_40_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_40_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_40_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_40_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_40_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_40_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_40_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_40_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_40_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_40_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_40_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_40_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_40_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_40_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_40_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_40_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_40_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_40_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_40_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_40_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_40_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_40_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_40_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_40_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_40_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_40_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_40_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_40_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_40_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_40_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_40_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_40_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_40_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_40_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_40_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_40_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_40_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_40_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_40_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_40_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_40_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_40_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_40_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_40_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_40_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_40_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_40_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_40_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_40_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_40_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_40_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_40_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_40_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_40_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_40_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_40_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ op_49c0_40_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_40_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a3a_40_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3b_40_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3c_40_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a48_40_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_40_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a7a_40_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7b_40_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7c_40_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a88_40_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_40_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4aba_40_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abb_40_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abc_40_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4ac0_40_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4ac8_40_ff, NULL, 0x4ac8, 2, { 0, 0 }, 0 }, /* HALT */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4acc_40_ff, NULL, 0x4acc, 2, { 0, 0 }, 0 }, /* PULSE */ +#endif +{ op_4ad0_40_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_40_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_40_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_40_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_40_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_40_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_40_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4c00_40_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c10_40_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c18_40_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c20_40_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c28_40_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c30_40_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c38_40_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c39_40_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3a_40_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3b_40_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3c_40_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c40_40_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c50_40_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c58_40_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c60_40_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c68_40_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c70_40_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c78_40_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c79_40_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7a_40_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7b_40_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7c_40_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ op_4c90_40_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_40_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_40_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_40_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_40_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_40_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_40_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_40_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_40_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_40_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_40_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_40_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_40_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_40_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_40_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_40_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_40_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_40_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_40_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_40_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_40_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_40_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_40_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_40_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_40_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_40_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_40_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_40_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_40_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_40_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_40_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_40_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_40_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_40_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_40_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_40_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_40_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_40_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_40_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_40_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_40_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_40_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_40_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_40_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_40_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_40_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_40_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_40_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_40_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_40_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_40_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_40_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_40_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_40_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_40_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_50fa_40_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fb_40_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fc_40_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_40_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_40_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_40_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_40_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_40_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_40_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_40_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_40_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_40_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_40_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_40_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_40_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_40_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_51fa_40_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fb_40_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fc_40_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_52c0_40_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_40_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_40_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_40_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_40_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_40_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_40_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_40_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_40_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_52fa_40_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fb_40_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fc_40_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_53c0_40_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_40_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_40_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_40_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_40_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_40_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_40_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_40_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_40_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_53fa_40_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fb_40_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fc_40_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_54c0_40_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_40_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_40_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_40_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_40_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_40_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_40_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_40_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_40_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_54fa_40_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fb_40_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fc_40_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_55c0_40_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_40_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_40_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_40_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_40_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_40_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_40_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_40_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_40_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_55fa_40_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fb_40_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fc_40_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_56c0_40_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_40_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_40_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_40_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_40_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_40_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_40_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_40_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_40_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_56fa_40_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fb_40_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fc_40_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_57c0_40_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_40_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_40_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_40_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_40_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_40_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_40_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_40_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_40_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_57fa_40_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fb_40_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fc_40_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_58c0_40_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_40_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_40_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_40_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_40_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_40_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_40_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_40_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_40_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_58fa_40_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fb_40_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fc_40_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_59c0_40_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_40_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_40_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_40_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_40_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_40_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_40_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_40_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_40_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_59fa_40_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fb_40_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fc_40_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ac0_40_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_40_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_40_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_40_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_40_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_40_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_40_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_40_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_40_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5afa_40_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afb_40_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afc_40_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5bc0_40_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_40_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_40_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_40_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_40_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_40_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_40_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_40_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_40_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5bfa_40_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfb_40_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfc_40_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5cc0_40_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_40_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_40_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_40_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_40_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_40_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_40_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_40_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_40_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5cfa_40_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfb_40_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfc_40_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5dc0_40_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_40_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_40_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_40_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_40_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_40_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_40_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_40_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_40_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5dfa_40_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfb_40_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfc_40_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ec0_40_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_40_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_40_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_40_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_40_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_40_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_40_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_40_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_40_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5efa_40_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efb_40_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efc_40_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5fc0_40_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_40_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_40_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_40_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_40_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_40_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_40_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_40_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_40_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5ffa_40_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffb_40_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffc_40_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_6000_40_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_40_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_40_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_40_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_40_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_40_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_40_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_40_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_40_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_40_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_40_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_40_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_40_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_40_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_40_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_40_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_40_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_40_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_40_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_40_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_40_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_40_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_40_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_40_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_40_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_40_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_40_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_40_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_40_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_40_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_40_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_40_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_40_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_40_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_40_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_40_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_40_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_40_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_40_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_40_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_40_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_40_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_40_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_40_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_40_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_40_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_40_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_40_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_40_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_40_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_40_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_40_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_40_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_40_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_40_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_40_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_40_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_40_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_40_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_40_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_40_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_40_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_40_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_40_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_40_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_40_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_40_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_40_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_40_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_40_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_40_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_40_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_40_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_40_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_40_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_40_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_40_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8140_40_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8148_40_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_40_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8180_40_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8188_40_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_40_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_40_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_40_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_40_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_40_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_40_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_40_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_40_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_40_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_40_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_40_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_40_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_40_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_40_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_40_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_40_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_40_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_40_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_40_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_40_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_40_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_40_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_40_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_40_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_40_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_40_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_40_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_40_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_40_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_40_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_40_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_40_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_40_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_40_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_40_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_40_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_40_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_40_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_40_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_40_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_40_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_40_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_40_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_40_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_40_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_40_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_40_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_40_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_40_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_40_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_40_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_40_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_40_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_40_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_40_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_40_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_40_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_40_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_40_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_40_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_40_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_40_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_40_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_40_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_40_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_40_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_40_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_40_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_40_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_40_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_40_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_40_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_40_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_40_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_40_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_40_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_40_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_40_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_40_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_40_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_40_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_40_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_40_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_40_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_40_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_40_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_40_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_40_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_40_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_40_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_40_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_40_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_40_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_40_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_40_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_40_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_40_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_40_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_40_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_40_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_40_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_40_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_40_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_40_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_40_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_40_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_40_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_40_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_40_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_40_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_40_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_40_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_40_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_40_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_40_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_40_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_40_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_40_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_40_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_40_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_40_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_40_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_40_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_40_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_40_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_40_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_40_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_40_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_40_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_40_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_40_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_40_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_40_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_40_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_40_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_40_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_40_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_40_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_40_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_40_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_40_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_40_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_40_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_40_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_40_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_40_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_40_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_40_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_40_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_40_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_40_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_40_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_40_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_40_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_40_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_40_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_40_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_40_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_40_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_40_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_40_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_40_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_40_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_40_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_40_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_40_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_40_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_40_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_40_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_40_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_40_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_40_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_40_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_40_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_40_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_40_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_40_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_40_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_40_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_40_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_40_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_40_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ op_e8c0_40_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8d0_40_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8e8_40_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f0_40_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f8_40_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f9_40_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fa_40_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fb_40_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9c0_40_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9d0_40_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9e8_40_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f0_40_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f8_40_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f9_40_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fa_40_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fb_40_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eac0_40_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ead0_40_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eae8_40_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf0_40_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf8_40_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf9_40_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebc0_40_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebd0_40_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebe8_40_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf0_40_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf8_40_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf9_40_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfa_40_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfb_40_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecc0_40_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecd0_40_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ece8_40_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf0_40_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf8_40_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf9_40_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edc0_40_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edd0_40_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ede8_40_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf0_40_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf8_40_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf9_40_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfa_40_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfb_40_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eec0_40_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eed0_40_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eee8_40_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef0_40_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef8_40_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef9_40_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efc0_40_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efd0_40_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efe8_40_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff0_40_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff8_40_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff9_40_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f000_40_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f008_40_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f010_40_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f018_40_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f020_40_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f028_40_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f030_40_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f038_40_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f039_40_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f200_40_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f208_40_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f210_40_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f218_40_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f220_40_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f228_40_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f230_40_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f238_40_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f239_40_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23a_40_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23b_40_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23c_40_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f240_40_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f248_40_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f250_40_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f258_40_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f260_40_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f268_40_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f270_40_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f278_40_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f279_40_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27a_40_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27b_40_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27c_40_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f280_40_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f2c0_40_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f310_40_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f320_40_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f328_40_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f330_40_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f338_40_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f339_40_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f350_40_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f358_40_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f368_40_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f370_40_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f378_40_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f379_40_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37a_40_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37b_40_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f408_40_ff, NULL, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f410_40_ff, NULL, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f418_40_ff, NULL, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f419_40_ff, NULL, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41a_40_ff, NULL, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41b_40_ff, NULL, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41c_40_ff, NULL, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41d_40_ff, NULL, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41e_40_ff, NULL, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41f_40_ff, NULL, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f428_40_ff, NULL, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f430_40_ff, NULL, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f438_40_ff, NULL, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f439_40_ff, NULL, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43a_40_ff, NULL, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43b_40_ff, NULL, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43c_40_ff, NULL, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43d_40_ff, NULL, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43e_40_ff, NULL, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43f_40_ff, NULL, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f500_40_ff, NULL, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f508_40_ff, NULL, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f510_40_ff, NULL, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f518_40_ff, NULL, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f548_40_ff, NULL, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f568_40_ff, NULL, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f588_40_ff, NULL, 0xf588, -1, { 0, 0 }, 0 }, /* PLPAW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f5c8_40_ff, NULL, 0xf5c8, -1, { 0, 0 }, 0 }, /* PLPAR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f600_40_ff, NULL, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f608_40_ff, NULL, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f610_40_ff, NULL, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f618_40_ff, NULL, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f620_40_ff, NULL, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f800_40_ff, NULL, 0xf800, -1, { 0, 0 }, 0 }, /* LPSTOP */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_40 */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_41[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_40_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_41_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_40_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_41_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_40_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_40_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_00d0_40_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00e8_40_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f0_40_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_00f8_40_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f9_40_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fa_40_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fb_40_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_40_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_40_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_40_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_40_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_40_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_40_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_40_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_40_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_40_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_40_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_40_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_40_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_40_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_40_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_40_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_40_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_40_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_40_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_40_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_41_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_40_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_41_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_40_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_40_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_02d0_40_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02e8_40_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f0_40_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_02f8_40_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f9_40_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fa_40_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fb_40_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_40_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_40_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_40_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_40_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_04d0_40_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04e8_40_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f0_40_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_04f8_40_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f9_40_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fa_40_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fb_40_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_40_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_40_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_40_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_40_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_06c0_40_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06c8_40_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06d0_40_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06e8_40_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f0_40_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f8_40_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f9_40_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fa_40_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fb_40_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_40_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_40_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_40_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_40_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_40_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_40_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_40_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_40_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_40_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_40_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_40_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_40_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_40_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_40_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_40_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_41_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_40_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_41_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_40_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_40_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_41_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_41_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_41_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_41_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_41_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_41_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_41_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_40_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3a_40_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3b_40_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_40_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7a_40_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7b_40_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_40_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0cba_40_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cbb_40_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_41_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_41_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_41_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_41_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_41_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_41_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_41_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_41_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_41_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_41_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_41_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_41_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_41_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_41_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_41_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_41_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_41_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_41_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_41_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_41_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_41_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_41_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_41_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_41_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_41_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_41_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_41_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_41_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_41_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_41_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_41_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_41_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_41_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_41_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_41_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_41_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_41_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_40_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_40_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_40_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_40_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_40_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_40_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_40_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_40_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_40_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_40_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_40_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_40_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_40_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_40_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_40_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_40_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_40_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_40_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_40_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_40_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_40_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_40_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_40_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_40_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_40_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_40_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_40_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_40_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_40_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_40_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_40_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_40_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_40_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_40_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_40_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_40_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_40_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_40_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_40_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_40_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_40_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_40_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_40_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_40_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_40_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_40_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_40_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_40_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_40_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_40_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_40_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_40_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_40_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_40_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_40_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_40_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_40_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_40_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_40_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_40_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_40_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_40_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_40_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_40_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_40_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_40_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_40_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_40_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_40_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_40_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_40_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_40_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_40_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_40_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_40_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_40_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_40_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_40_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_40_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_40_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_40_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_40_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_40_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_40_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_40_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_40_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_40_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_40_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_40_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_40_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_40_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_40_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4100_40_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4110_40_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4118_40_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4120_40_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4128_40_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4130_40_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_4138_40_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4139_40_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_413a_40_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_413b_40_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_413c_40_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_40_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_40_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_40_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_40_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_40_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_40_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_40_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_40_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_40_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_40_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_40_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_40_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_40_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_40_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_40_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_40_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_40_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_40_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_40_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_40_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_40_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_40_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_40_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_40_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_40_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_40_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_40_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_40_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_40_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_40_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_40_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_40_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_40_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_40_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f0_40_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_42f8_40_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_40_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_40_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_40_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_40_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_40_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_40_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_40_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_40_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_40_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_40_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_40_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_40_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_40_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_40_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_40_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_40_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_40_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_40_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_40_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_40_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_40_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_40_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_40_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_40_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_40_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_40_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_40_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_40_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_40_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_40_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_41_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_40_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_40_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_40_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_40_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_40_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_40_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_40_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_40_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_40_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_40_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_40_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_40_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_40_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_40_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_40_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_40_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_40_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_40_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_40_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_40_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_40_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_40_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_49c0_40_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_40_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a3a_40_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a3b_40_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a3c_40_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a48_40_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_40_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a7a_40_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a7b_40_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a7c_40_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a88_40_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_40_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4aba_40_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4abb_40_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4abc_40_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_40_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_40_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_40_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_40_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_40_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_40_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_40_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_40_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c00_40_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c10_40_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c18_40_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c20_40_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c28_40_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c30_40_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c38_40_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c39_40_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3a_40_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3b_40_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c3c_40_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c40_40_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c50_40_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c58_40_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c60_40_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c68_40_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c70_40_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c78_40_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c79_40_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7a_40_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7b_40_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c7c_40_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c90_40_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_40_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_40_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_40_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_40_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_40_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_40_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_40_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_40_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_40_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_40_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_40_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_40_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_40_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_40_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_40_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_41_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_41_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_40_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_41_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_41_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_41_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e74_40_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ op_4e75_40_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_40_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_41_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_40_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_41_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_40_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_40_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_40_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_40_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_40_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_40_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_40_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_40_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_40_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_40_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_40_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_40_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_40_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_40_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_40_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_40_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_40_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_40_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_40_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_40_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_40_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_40_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_40_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_40_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_40_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_40_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_40_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_50fa_40_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fb_40_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fc_40_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_40_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_40_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_40_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_40_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_40_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_40_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_40_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_40_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_40_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_40_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_40_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_40_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_40_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_51fa_40_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fb_40_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fc_40_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52c0_40_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_40_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_40_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_40_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_40_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_40_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_40_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_40_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_40_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52fa_40_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fb_40_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fc_40_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53c0_40_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_40_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_40_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_40_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_40_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_40_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_40_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_40_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_40_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53fa_40_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fb_40_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fc_40_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54c0_40_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_40_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_40_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_40_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_40_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_40_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_40_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_40_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_40_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54fa_40_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fb_40_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fc_40_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55c0_40_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_40_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_40_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_40_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_40_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_40_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_40_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_40_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_40_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55fa_40_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fb_40_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fc_40_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56c0_40_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_40_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_40_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_40_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_40_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_40_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_40_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_40_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_40_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56fa_40_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fb_40_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fc_40_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57c0_40_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_40_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_40_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_40_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_40_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_40_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_40_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_40_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_40_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57fa_40_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fb_40_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fc_40_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58c0_40_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_40_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_40_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_40_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_40_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_40_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_40_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_40_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_40_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58fa_40_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fb_40_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fc_40_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59c0_40_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_40_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_40_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_40_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_40_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_40_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_40_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_40_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_40_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59fa_40_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fb_40_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fc_40_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ac0_40_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_40_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_40_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_40_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_40_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_40_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_40_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_40_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_40_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5afa_40_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afb_40_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afc_40_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bc0_40_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_40_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_40_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_40_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_40_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_40_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_40_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_40_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_40_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bfa_40_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfb_40_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfc_40_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cc0_40_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_40_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_40_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_40_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_40_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_40_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_40_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_40_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_40_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cfa_40_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfb_40_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfc_40_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dc0_40_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_40_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_40_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_40_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_40_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_40_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_40_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_40_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_40_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dfa_40_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfb_40_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfc_40_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ec0_40_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_40_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_40_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_40_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_40_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_40_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_40_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_40_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_40_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5efa_40_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efb_40_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efc_40_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5fc0_40_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_40_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_40_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_40_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_40_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_40_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_40_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_40_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_40_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ffa_40_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffb_40_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffc_40_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_6000_40_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_40_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_40_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_40_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_40_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_40_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_40_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_40_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_40_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_40_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_40_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_40_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_40_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_40_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_40_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_40_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_40_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_40_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_40_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_40_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_40_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_40_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_40_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_40_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_40_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_40_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_40_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_40_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_40_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_40_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_40_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_40_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_40_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_40_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_40_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_40_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_40_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_40_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_40_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_40_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_40_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_40_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_40_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_40_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_40_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_40_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_40_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_40_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_40_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_40_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_40_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_40_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_40_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_40_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_40_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_40_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_40_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_40_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_40_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_40_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_40_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_40_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_40_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_40_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_40_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_40_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_40_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_40_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_40_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_40_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_40_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_40_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_40_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_40_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_40_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_40_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_40_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8140_40_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8148_40_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_40_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8180_40_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8188_40_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_40_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_40_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_40_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_40_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_40_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_40_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_40_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_40_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_40_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_40_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_40_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_40_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_40_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_40_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_40_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_40_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_40_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_40_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_40_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_40_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_40_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_40_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_40_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_40_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_40_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_40_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_40_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_40_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_40_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_40_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_40_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_40_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_40_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_40_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_40_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_40_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_40_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_40_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_40_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_40_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_40_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_40_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_40_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_40_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_40_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_40_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_40_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_40_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_40_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_40_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_40_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_40_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_40_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_40_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_40_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_40_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_40_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_40_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_40_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_40_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_40_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_40_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_40_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_40_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_40_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_40_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_40_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_40_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_40_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_40_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_40_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_40_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_40_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_40_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_40_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_40_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_40_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_40_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_40_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_40_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_40_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_40_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_40_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_40_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_40_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_40_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_40_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_40_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_40_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_40_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_40_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_40_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_40_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_40_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_40_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_40_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_40_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_40_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_40_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_40_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_40_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_40_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_40_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_40_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_40_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_40_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_40_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_40_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_40_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_40_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_40_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_40_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_40_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_40_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_40_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_40_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_40_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_40_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_40_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_40_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_40_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_40_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_40_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_40_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_40_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_40_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_40_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_40_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_40_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_40_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_40_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_40_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_40_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_40_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_40_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_40_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_40_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_40_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_40_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_40_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_40_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_40_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_40_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_40_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_40_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_40_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_40_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_40_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_40_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_40_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_40_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_40_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_40_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_40_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_40_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_40_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_40_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_40_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_40_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_40_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_40_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_40_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_40_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_40_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_40_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_40_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_40_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_40_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_40_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_40_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_40_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_40_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_40_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_40_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_40_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_40_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_40_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_40_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_40_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_40_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_40_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_40_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ op_e8c0_40_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8d0_40_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8e8_40_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f0_40_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e8f8_40_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f9_40_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fa_40_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fb_40_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e9c0_40_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9d0_40_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9e8_40_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f0_40_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_e9f8_40_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f9_40_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fa_40_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fb_40_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_eac0_40_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ead0_40_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eae8_40_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf0_40_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ op_eaf8_40_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf9_40_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ebc0_40_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebd0_40_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebe8_40_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf0_40_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ebf8_40_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf9_40_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfa_40_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfb_40_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ecc0_40_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecd0_40_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ece8_40_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf0_40_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ op_ecf8_40_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf9_40_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ op_edc0_40_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edd0_40_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_ede8_40_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf0_40_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_edf8_40_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf9_40_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfa_40_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfb_40_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_eec0_40_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eed0_40_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eee8_40_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef0_40_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ op_eef8_40_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef9_40_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ op_efc0_40_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efd0_40_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efe8_40_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff0_40_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ op_eff8_40_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff9_40_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ op_f000_40_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f008_40_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f010_40_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f018_40_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f020_40_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f028_40_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f030_40_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +{ op_f038_40_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f039_40_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f200_40_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f208_40_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f210_40_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f218_40_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f220_40_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f228_40_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f230_40_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f238_40_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f239_40_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23a_40_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23b_40_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23c_40_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f240_40_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f248_40_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ op_f250_40_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f258_40_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f260_40_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f268_40_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f270_40_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f278_40_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f279_40_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f27a_40_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27b_40_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27c_40_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f280_40_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f2c0_40_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f310_40_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f320_40_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f328_40_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f330_40_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f338_40_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f339_40_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f350_40_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f358_40_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f368_40_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f370_40_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f378_40_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f379_40_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37a_40_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37b_40_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f408_40_ff, NULL, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +{ op_f410_40_ff, NULL, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +{ op_f418_40_ff, NULL, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f419_40_ff, NULL, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41a_40_ff, NULL, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41b_40_ff, NULL, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41c_40_ff, NULL, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41d_40_ff, NULL, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41e_40_ff, NULL, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41f_40_ff, NULL, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f428_40_ff, NULL, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +{ op_f430_40_ff, NULL, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +{ op_f438_40_ff, NULL, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f439_40_ff, NULL, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43a_40_ff, NULL, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43b_40_ff, NULL, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43c_40_ff, NULL, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43d_40_ff, NULL, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43e_40_ff, NULL, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43f_40_ff, NULL, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#ifndef CPUEMU_68000_ONLY +{ op_f500_41_ff, NULL, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f508_41_ff, NULL, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f510_41_ff, NULL, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f518_41_ff, NULL, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f548_41_ff, NULL, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f568_41_ff, NULL, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +{ op_f600_40_ff, NULL, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f608_40_ff, NULL, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f610_40_ff, NULL, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f618_40_ff, NULL, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f620_40_ff, NULL, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_42[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_40_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_42_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_40_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_42_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_40_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_40_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_00d0_40_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00e8_40_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f0_40_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_00f8_40_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f9_40_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fa_40_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fb_40_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_40_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_40_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_40_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_40_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_40_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_40_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_40_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_40_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_40_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_40_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_40_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_40_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_40_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_40_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_40_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_40_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_40_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_40_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_40_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_42_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_40_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_42_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_40_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_40_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_02d0_40_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02e8_40_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f0_40_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_02f8_40_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f9_40_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fa_40_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fb_40_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_40_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_40_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_40_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_40_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_04d0_40_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04e8_40_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f0_40_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_04f8_40_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f9_40_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fa_40_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fb_40_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_40_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_40_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_40_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_40_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_06c0_40_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06c8_40_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06d0_40_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06e8_40_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f0_40_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f8_40_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f9_40_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fa_40_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fb_40_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_40_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_40_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_40_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_40_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_40_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_40_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_40_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_40_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_40_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_40_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_40_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_40_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_40_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_40_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_40_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_42_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_40_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_42_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_40_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_40_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_42_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_42_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_42_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_42_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_42_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_42_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_42_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_40_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3a_40_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3b_40_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_40_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7a_40_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7b_40_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_40_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0cba_40_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cbb_40_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_42_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_42_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_42_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_42_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_42_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_42_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_42_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_42_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_42_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_42_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_42_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_42_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_42_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_42_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_42_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_42_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_42_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_42_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_42_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_42_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_42_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_42_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_42_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_42_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_42_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_42_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_42_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_42_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_42_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_42_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_42_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_42_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_42_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_42_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_42_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_42_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_42_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_40_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_40_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_40_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_40_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_40_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_40_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_40_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_40_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_40_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_40_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_40_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_40_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_40_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_40_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_40_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_40_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_40_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_40_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_40_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_40_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_40_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_40_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_40_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_40_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_40_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_40_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_40_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_40_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_40_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_40_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_40_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_40_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_40_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_40_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_40_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_40_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_40_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_40_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_40_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_40_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_40_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_40_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_40_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_40_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_40_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_40_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_40_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_40_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_40_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_40_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_40_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_40_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_40_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_40_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_40_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_40_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_40_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_40_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_40_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_40_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_40_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_40_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_40_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_40_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_40_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_40_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_40_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_40_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_40_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_40_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_40_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_40_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_40_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_40_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_40_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_40_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_40_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_40_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_40_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_40_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_40_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_40_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_40_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_40_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_40_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_40_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_40_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_40_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_40_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_40_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_40_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_40_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4100_40_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4110_40_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4118_40_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4120_40_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4128_40_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4130_40_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_4138_40_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4139_40_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_413a_40_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_413b_40_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_413c_40_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_40_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_40_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_40_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_40_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_40_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_40_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_40_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_40_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_40_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_40_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_40_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_40_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_40_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_40_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_40_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_40_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_40_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_40_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_40_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_40_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_40_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_40_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_40_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_40_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_40_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_40_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_40_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_40_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_40_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_40_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_40_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_40_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_40_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_40_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f0_40_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_42f8_40_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_40_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_40_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_40_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_40_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_40_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_40_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_40_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_40_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_40_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_40_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_40_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_40_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_40_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_40_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_40_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_40_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_40_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_40_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_40_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_40_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_40_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_40_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_40_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_40_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_40_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_40_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_40_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_40_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_40_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_42_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4808_41_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +{ op_4810_42_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_42_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_42_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_42_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_42_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_42_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_42_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_40_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_40_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_40_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_42_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_42_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_42_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_42_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_42_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_42_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_42_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_42_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_42_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_42_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_42_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_42_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_49c0_40_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_40_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a3a_40_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a3b_40_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a3c_40_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a48_40_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_40_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a7a_40_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a7b_40_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a7c_40_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a88_40_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_40_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4aba_40_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4abb_40_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4abc_40_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_40_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_40_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_40_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_40_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_40_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_40_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_40_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_40_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c00_40_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c10_40_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c18_40_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c20_40_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c28_40_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c30_40_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c38_40_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c39_40_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3a_40_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3b_40_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c3c_40_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c40_40_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c50_40_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c58_40_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c60_40_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c68_40_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c70_40_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c78_40_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c79_40_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7a_40_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7b_40_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c7c_40_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c90_42_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_42_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_42_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_42_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_42_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_42_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_42_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_42_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_42_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_42_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_42_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_42_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_42_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_42_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_42_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_42_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_41_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_42_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_40_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_42_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_42_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_42_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_42_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_42_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_40_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_42_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_40_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_42_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_42_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_42_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_42_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_42_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_42_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_42_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_42_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_40_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_40_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_40_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_40_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_40_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_40_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_40_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_40_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_40_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_40_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_40_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_40_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_42_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_40_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_40_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_40_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_40_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_40_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_40_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_40_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_50fa_40_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fb_40_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fc_40_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_40_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_40_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_40_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_40_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_40_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_42_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_40_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_40_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_40_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_40_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_40_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_40_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_40_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_51fa_40_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fb_40_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fc_40_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52c0_40_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_42_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_40_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_40_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_40_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_40_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_40_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_40_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_40_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52fa_40_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fb_40_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fc_40_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53c0_40_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_42_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_40_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_40_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_40_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_40_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_40_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_40_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_40_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53fa_40_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fb_40_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fc_40_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54c0_40_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_42_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_40_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_40_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_40_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_40_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_40_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_40_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_40_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54fa_40_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fb_40_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fc_40_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55c0_40_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_42_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_40_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_40_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_40_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_40_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_40_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_40_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_40_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55fa_40_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fb_40_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fc_40_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56c0_40_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_42_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_40_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_40_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_40_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_40_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_40_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_40_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_40_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56fa_40_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fb_40_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fc_40_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57c0_40_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_42_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_40_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_40_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_40_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_40_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_40_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_40_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_40_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57fa_40_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fb_40_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fc_40_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58c0_40_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_42_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_40_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_40_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_40_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_40_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_40_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_40_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_40_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58fa_40_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fb_40_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fc_40_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59c0_40_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_42_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_40_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_40_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_40_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_40_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_40_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_40_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_40_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59fa_40_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fb_40_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fc_40_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ac0_40_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_42_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_40_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_40_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_40_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_40_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_40_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_40_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_40_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5afa_40_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afb_40_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afc_40_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bc0_40_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_42_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_40_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_40_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_40_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_40_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_40_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_40_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_40_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bfa_40_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfb_40_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfc_40_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cc0_40_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_42_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_40_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_40_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_40_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_40_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_40_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_40_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_40_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cfa_40_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfb_40_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfc_40_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dc0_40_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_42_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_40_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_40_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_40_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_40_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_40_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_40_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_40_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dfa_40_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfb_40_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfc_40_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ec0_40_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_42_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_40_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_40_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_40_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_40_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_40_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_40_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_40_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5efa_40_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efb_40_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efc_40_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5fc0_40_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_42_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_40_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_40_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_40_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_40_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_40_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_40_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_40_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ffa_40_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffb_40_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffc_40_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_6000_42_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_42_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_42_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_42_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_42_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_42_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_42_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_42_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_42_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_42_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_42_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_42_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_42_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_42_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_42_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_42_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_42_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_42_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_42_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_42_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_42_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_42_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_42_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_42_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_42_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_42_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_42_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_42_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_42_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_42_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_42_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_42_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_42_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_42_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_42_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_42_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_42_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_42_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_42_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_42_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_42_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_42_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_42_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_42_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_42_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_42_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_42_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_42_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_40_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_40_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_40_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_40_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_40_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_40_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_40_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_40_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_40_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_40_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_40_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_40_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_40_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_40_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_40_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_40_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_40_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_40_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_40_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_40_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_40_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_40_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_40_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_40_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_40_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_40_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_42_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_42_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_40_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8140_40_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8148_40_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_40_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8180_40_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8188_40_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_40_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_40_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_40_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_40_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_40_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_40_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_40_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_40_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_40_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_40_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_40_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_40_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_40_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_40_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_40_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_40_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_40_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_40_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_40_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_40_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_40_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_40_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_40_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_40_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_40_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_40_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_40_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_40_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_40_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_40_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_40_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_40_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_40_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_40_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_40_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_40_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_40_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_40_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_40_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_40_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_40_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_40_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_40_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_40_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_40_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_40_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_40_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_40_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_40_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_40_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_40_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_40_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_40_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_40_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_40_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_40_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_40_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_40_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_40_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_40_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_40_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_40_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_40_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_40_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_40_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_40_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_40_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_40_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_40_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_40_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_40_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_40_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_40_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_40_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_40_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_40_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_40_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_40_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_40_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_40_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_40_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_42_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_42_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_40_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_40_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_40_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_40_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_40_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_40_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_40_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_40_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_40_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_40_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_40_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_40_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_40_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_40_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_40_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_40_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_40_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_40_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_40_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_40_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_40_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_40_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_40_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_40_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_40_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_40_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_40_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_40_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_40_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_40_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_40_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_40_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_40_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_40_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_40_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_40_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_40_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_40_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_40_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_40_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_40_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_40_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_40_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_40_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_40_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_40_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_40_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_40_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_40_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_40_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_40_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_40_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_40_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_40_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_40_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_40_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_40_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_40_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_40_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_40_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_40_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_40_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_40_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_40_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_40_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_40_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_40_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_40_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_40_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_40_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_40_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_40_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_40_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_40_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_40_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_40_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_40_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_40_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_40_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_40_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_40_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_40_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_40_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_40_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_40_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_40_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_40_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_40_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_40_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_40_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_40_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_40_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_40_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_40_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_40_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_40_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_40_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_40_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_40_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ op_e8c0_40_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8d0_40_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8e8_40_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f0_40_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e8f8_40_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f9_40_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fa_40_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fb_40_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e9c0_40_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9d0_40_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9e8_40_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f0_40_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_e9f8_40_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f9_40_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fa_40_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fb_40_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_eac0_40_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ead0_40_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eae8_40_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf0_40_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ op_eaf8_40_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf9_40_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ebc0_40_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebd0_40_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebe8_40_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf0_40_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ebf8_40_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf9_40_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfa_40_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfb_40_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ecc0_40_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecd0_40_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ece8_40_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf0_40_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ op_ecf8_40_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf9_40_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ op_edc0_40_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edd0_40_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_ede8_40_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf0_40_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_edf8_40_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf9_40_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfa_40_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfb_40_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_eec0_40_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eed0_40_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eee8_40_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef0_40_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ op_eef8_40_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef9_40_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ op_efc0_40_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efd0_40_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efe8_40_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff0_40_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ op_eff8_40_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff9_40_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ op_f000_40_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f008_40_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f010_40_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f018_40_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f020_40_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f028_40_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f030_40_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +{ op_f038_40_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f039_40_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f200_40_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f208_40_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f210_40_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f218_40_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f220_40_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f228_40_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f230_40_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f238_40_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f239_40_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23a_40_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23b_40_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23c_40_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f240_40_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f248_40_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ op_f250_40_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f258_40_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f260_40_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f268_40_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f270_40_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f278_40_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f279_40_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f27a_40_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27b_40_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27c_40_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f280_40_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f2c0_40_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f310_40_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f320_40_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f328_40_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f330_40_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f338_40_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f339_40_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f350_40_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f358_40_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f368_40_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f370_40_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f378_40_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f379_40_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37a_40_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37b_40_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_43[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_40_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_43_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_40_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_43_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_40_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_40_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_00d0_40_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00e8_40_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f0_40_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_00f8_40_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f9_40_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fa_40_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fb_40_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_40_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_40_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_40_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_40_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_40_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_40_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_40_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_40_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_40_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_40_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_40_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_40_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_40_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_40_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_40_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_40_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_40_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_40_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_40_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_43_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_40_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_43_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_40_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_40_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_02d0_40_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02e8_40_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f0_40_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_02f8_40_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f9_40_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fa_40_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fb_40_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_40_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_40_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_40_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_40_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_04d0_40_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04e8_40_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f0_40_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_04f8_40_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f9_40_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fa_40_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fb_40_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_40_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_40_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_40_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_40_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_06c0_40_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06c8_40_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06d0_40_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06e8_40_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f0_40_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f8_40_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f9_40_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fa_40_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fb_40_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_40_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_40_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_40_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_40_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_40_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_40_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_40_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_40_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_40_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_40_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_40_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_40_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_40_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_40_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_40_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_43_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_40_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_43_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_40_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_40_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0ad0_42_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ad8_42_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ae0_42_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ae8_42_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0af0_42_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +{ op_0af8_42_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0af9_42_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_40_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3a_40_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3b_40_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_40_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7a_40_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7b_40_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_40_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0cba_40_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cbb_40_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cd0_42_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0cd8_42_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ce0_42_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ce8_42_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0cf0_42_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +{ op_0cf8_42_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0cf9_42_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +{ op_0cfc_42_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +{ op_0e10_42_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e18_42_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e20_42_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e28_42_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e30_42_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +{ op_0e38_42_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e39_42_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e50_42_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e58_42_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e60_42_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e68_42_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e70_42_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +{ op_0e78_42_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e79_42_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e90_42_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e98_42_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea0_42_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea8_42_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0eb0_42_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +{ op_0eb8_42_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0eb9_42_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ed0_42_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ed8_42_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ee0_42_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ee8_42_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0ef0_42_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +{ op_0ef8_42_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0ef9_42_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +{ op_0efc_42_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_40_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_40_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_40_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_40_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_40_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_40_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_40_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_40_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_40_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_40_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_40_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_40_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_40_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_40_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_40_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_40_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_40_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_40_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_40_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_40_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_40_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_40_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_40_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_40_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_40_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_40_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_40_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_40_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_40_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_40_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_40_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_40_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_40_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_40_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_40_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_40_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_40_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_40_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_40_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_40_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_40_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_40_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_40_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_40_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_40_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_40_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_40_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_40_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_40_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_40_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_40_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_40_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_40_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_40_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_40_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_40_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_40_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_40_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_40_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_40_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_40_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_40_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_40_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_40_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_40_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_40_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_40_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_40_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_40_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_40_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_40_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_40_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_40_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_40_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_40_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_40_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_40_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_40_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_40_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_40_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_40_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_40_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_40_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_40_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_40_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_40_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_40_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_40_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_40_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_40_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_40_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_40_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4100_40_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4110_40_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4118_40_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4120_40_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4128_40_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4130_40_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_4138_40_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4139_40_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_413a_40_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_413b_40_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_413c_40_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_40_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_40_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_40_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_40_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_40_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_40_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_40_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_40_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_40_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_40_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_40_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_40_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_40_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_40_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_40_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_40_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_40_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_40_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_40_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_40_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_40_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_40_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_40_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_40_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_40_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_40_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_40_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_40_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_40_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_40_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_40_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_40_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_40_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_40_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f0_40_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_42f8_40_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_40_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_40_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_40_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_40_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_40_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_40_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_40_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_40_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_40_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_40_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_40_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_40_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_40_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_40_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_40_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_40_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_40_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_40_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_40_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_40_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_40_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_40_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_40_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_40_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_40_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_40_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_40_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_40_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_40_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_42_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4808_41_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +{ op_4810_42_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_42_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_42_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_42_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_42_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_42_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_42_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_40_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_40_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_40_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_42_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_42_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_42_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_42_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_42_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_42_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_42_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_42_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_42_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_42_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_42_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_42_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_49c0_40_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_40_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a3a_40_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a3b_40_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a3c_40_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a48_40_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_40_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a7a_40_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a7b_40_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a7c_40_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a88_40_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_40_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4aba_40_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4abb_40_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4abc_40_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_40_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_40_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_40_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_40_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_40_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_40_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_40_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_40_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c00_40_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c10_40_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c18_40_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c20_40_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c28_40_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c30_40_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c38_40_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c39_40_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3a_40_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3b_40_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c3c_40_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c40_40_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c50_40_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c58_40_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c60_40_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c68_40_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c70_40_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c78_40_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c79_40_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7a_40_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7b_40_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c7c_40_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c90_42_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_42_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_42_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_42_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_42_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_42_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_42_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_42_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_42_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_42_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_42_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_42_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_42_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_42_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_42_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_42_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_41_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_42_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_40_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_42_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_43_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_43_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e74_42_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ op_4e75_42_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_40_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_43_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_40_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +{ op_4e7b_42_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +{ op_4e90_42_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_42_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_42_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_42_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_42_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_42_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_42_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_40_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_40_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_40_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_40_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_40_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_40_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_40_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_40_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_40_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_40_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_40_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_40_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_42_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_40_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_40_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_40_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_40_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_40_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_40_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_40_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_50fa_40_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fb_40_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fc_40_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_40_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_40_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_40_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_40_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_40_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_42_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_40_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_40_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_40_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_40_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_40_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_40_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_40_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_51fa_40_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fb_40_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fc_40_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52c0_40_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_42_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_40_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_40_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_40_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_40_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_40_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_40_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_40_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52fa_40_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fb_40_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fc_40_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53c0_40_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_42_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_40_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_40_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_40_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_40_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_40_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_40_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_40_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53fa_40_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fb_40_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fc_40_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54c0_40_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_42_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_40_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_40_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_40_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_40_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_40_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_40_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_40_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54fa_40_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fb_40_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fc_40_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55c0_40_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_42_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_40_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_40_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_40_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_40_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_40_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_40_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_40_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55fa_40_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fb_40_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fc_40_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56c0_40_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_42_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_40_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_40_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_40_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_40_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_40_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_40_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_40_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56fa_40_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fb_40_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fc_40_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57c0_40_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_42_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_40_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_40_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_40_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_40_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_40_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_40_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_40_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57fa_40_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fb_40_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fc_40_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58c0_40_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_42_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_40_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_40_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_40_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_40_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_40_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_40_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_40_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58fa_40_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fb_40_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fc_40_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59c0_40_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_42_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_40_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_40_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_40_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_40_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_40_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_40_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_40_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59fa_40_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fb_40_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fc_40_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ac0_40_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_42_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_40_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_40_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_40_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_40_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_40_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_40_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_40_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5afa_40_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afb_40_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afc_40_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bc0_40_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_42_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_40_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_40_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_40_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_40_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_40_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_40_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_40_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bfa_40_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfb_40_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfc_40_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cc0_40_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_42_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_40_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_40_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_40_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_40_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_40_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_40_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_40_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cfa_40_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfb_40_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfc_40_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dc0_40_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_42_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_40_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_40_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_40_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_40_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_40_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_40_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_40_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dfa_40_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfb_40_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfc_40_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ec0_40_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_42_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_40_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_40_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_40_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_40_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_40_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_40_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_40_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5efa_40_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efb_40_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efc_40_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5fc0_40_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_42_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_40_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_40_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_40_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_40_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_40_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_40_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_40_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ffa_40_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffb_40_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffc_40_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_6000_42_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_42_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_42_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_42_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_42_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_42_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_42_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_42_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_42_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_42_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_42_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_42_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_42_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_42_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_42_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_42_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_42_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_42_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_42_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_42_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_42_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_42_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_42_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_42_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_42_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_42_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_42_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_42_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_42_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_42_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_42_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_42_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_42_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_42_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_42_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_42_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_42_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_42_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_42_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_42_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_42_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_42_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_42_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_42_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_42_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_42_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_42_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_42_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_40_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_40_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_40_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_40_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_40_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_40_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_40_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_40_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_40_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_40_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_40_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_40_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_40_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_40_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_40_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_40_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_40_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_40_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_40_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_40_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_40_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_40_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_40_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_40_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_40_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_40_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_42_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_42_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_40_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8140_40_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8148_40_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_40_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8180_40_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8188_40_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_40_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_40_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_40_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_40_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_40_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_40_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_40_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_40_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_40_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_40_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_40_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_40_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_40_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_40_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_40_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_40_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_40_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_40_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_40_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_40_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_40_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_40_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_40_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_40_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_40_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_40_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_40_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_40_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_40_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_40_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_40_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_40_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_40_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_40_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_40_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_40_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_40_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_40_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_40_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_40_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_40_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_40_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_40_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_40_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_40_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_40_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_40_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_40_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_40_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_40_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_40_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_40_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_40_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_40_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_40_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_40_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_40_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_40_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_40_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_40_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_40_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_40_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_40_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_40_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_40_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_40_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_40_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_40_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_40_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_40_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_40_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_40_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_40_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_40_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_40_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_40_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_40_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_40_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_40_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_40_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_40_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_42_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_42_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_40_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_40_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_40_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_40_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_40_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_40_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_40_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_40_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_40_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_40_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_40_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_40_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_40_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_40_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_40_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_40_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_40_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_40_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_40_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_40_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_40_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_40_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_40_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_40_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_40_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_40_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_40_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_40_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_40_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_40_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_40_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_40_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_40_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_40_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_40_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_40_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_40_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_40_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_40_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_40_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_40_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_40_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_40_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_40_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_40_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_40_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_40_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_40_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_40_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_40_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_40_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_40_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_40_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_40_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_40_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_40_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_40_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_40_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_40_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_40_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_40_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_40_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_40_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_40_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_40_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_40_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_40_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_40_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_40_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_40_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_40_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_40_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_40_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_40_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_40_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_40_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_40_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_40_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_40_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_40_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_40_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_40_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_40_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_40_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_40_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_40_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_40_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_40_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_40_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_40_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_40_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_40_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_40_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_40_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_40_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_40_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_40_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_40_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_40_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ op_e8c0_40_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8d0_40_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8e8_40_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f0_40_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e8f8_40_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f9_40_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fa_40_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fb_40_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e9c0_40_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9d0_40_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9e8_40_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f0_40_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_e9f8_40_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f9_40_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fa_40_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fb_40_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_eac0_40_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ead0_40_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eae8_40_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf0_40_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ op_eaf8_40_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf9_40_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ebc0_40_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebd0_40_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebe8_40_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf0_40_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ebf8_40_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf9_40_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfa_40_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfb_40_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ecc0_40_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecd0_40_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ece8_40_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf0_40_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ op_ecf8_40_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf9_40_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ op_edc0_40_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edd0_40_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_ede8_40_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf0_40_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_edf8_40_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf9_40_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfa_40_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfb_40_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_eec0_40_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eed0_40_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eee8_40_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef0_40_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ op_eef8_40_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef9_40_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ op_efc0_40_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efd0_40_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efe8_40_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff0_40_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ op_eff8_40_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff9_40_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ op_f200_40_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f208_40_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f210_40_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f218_40_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f220_40_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f228_40_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f230_40_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f238_40_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f239_40_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23a_40_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23b_40_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23c_40_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f240_40_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f248_40_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ op_f250_40_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f258_40_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f260_40_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f268_40_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f270_40_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f278_40_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f279_40_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f27a_40_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27b_40_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27c_40_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f280_40_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f2c0_40_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f310_40_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f320_40_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f328_40_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f330_40_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f338_40_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f339_40_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f350_40_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f358_40_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f368_40_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f370_40_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f378_40_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f379_40_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37a_40_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37b_40_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_44[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_44_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_44_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_44_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_44_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_40_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_44_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_40_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_44_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_44_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_44_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_40_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_44_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_44_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_40_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_40_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_40_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_40_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_40_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_44_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_40_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_40_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_44_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_40_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_44_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_44_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_44_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_44_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_44_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_40_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_44_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_44_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_44_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_40_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_44_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_44_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_44_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_40_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_44_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_44_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_44_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_44_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_44_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_44_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_40_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_40_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_40_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_40_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_44_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_40_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_40_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_44_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_44_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_44_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_44_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_44_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_44_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_40_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_44_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_44_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_44_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_44_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0e10_42_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e18_42_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e20_42_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e28_42_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#ifndef CPUEMU_68000_ONLY +{ op_0e30_44_ff, NULL, 0x0e30, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +{ op_0e38_42_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e39_42_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e50_42_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e58_42_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e60_42_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e68_42_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#ifndef CPUEMU_68000_ONLY +{ op_0e70_44_ff, NULL, 0x0e70, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +{ op_0e78_42_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e79_42_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e90_42_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e98_42_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea0_42_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea8_42_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_44_ff, NULL, 0x0eb0, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +{ op_0eb8_42_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0eb9_42_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_44_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_44_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_44_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_44_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_44_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_44_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_44_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_44_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_44_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_44_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_44_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_44_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_44_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_44_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_44_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_44_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_44_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_44_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_44_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_44_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_44_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_44_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_44_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_44_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_44_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_44_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_44_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_44_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_44_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_44_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_44_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_44_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_44_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_44_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_44_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_44_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_44_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_44_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_44_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_44_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_44_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_44_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_44_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_44_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_44_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_44_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_44_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_44_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_44_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_44_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_44_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_44_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_44_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_44_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_44_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_44_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_44_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_44_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_44_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_44_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_44_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_44_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_44_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_44_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_44_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_44_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_44_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_44_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_44_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_44_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_44_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_44_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_44_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_44_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_44_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_44_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_44_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_44_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_44_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_44_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_44_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_44_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_44_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_44_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_40_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_40_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_40_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_40_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_40_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_44_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_40_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_40_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_44_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_44_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_44_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_40_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_44_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_40_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_40_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_40_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_40_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_40_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_44_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_40_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_40_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_40_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_40_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_40_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_40_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_40_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_44_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_40_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_40_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_40_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_40_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_40_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_40_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_40_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_44_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_40_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_40_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_40_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_40_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_40_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_40_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_40_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_42f0_44_ff, NULL, 0x42f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_42f8_40_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_40_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_44_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_44_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_44_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_40_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_40_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_40_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_40_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_40_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_44_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_40_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_40_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_40_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_44_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_40_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_44_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_44_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_44_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_40_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_40_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_40_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_40_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_40_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_44_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_40_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_40_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_40_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_44_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_40_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_44_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_44_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_44_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_44_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_44_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_44_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_44_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_44_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_40_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_44_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_44_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_44_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_44_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_44_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_44_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_44_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_44_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_44_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_44_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_44_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_44_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_44_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_44_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_44_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_44_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_44_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_44_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_44_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_44_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_44_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_44_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_44_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_44_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_44_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_44_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_44_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_44_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_44_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_44_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_44_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_44_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_44_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_44_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_44_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_44_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_44_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_44_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_44_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_44_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_44_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_44_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_42_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_40_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_42_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_44_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_44_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e74_42_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ op_4e75_44_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_40_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_44_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_40_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +{ op_4e7b_42_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +{ op_4e90_42_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_42_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_44_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_42_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_42_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_42_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_44_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_40_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_40_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_44_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_40_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_40_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_40_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_44_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_44_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_44_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_40_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_44_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_40_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_44_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_40_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_40_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_40_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_40_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_44_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_40_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_40_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_44_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_44_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_40_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_44_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_40_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_44_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_40_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_40_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_40_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_40_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_44_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_40_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_40_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_40_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_44_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_40_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_40_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_40_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_40_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_44_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_40_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_40_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_40_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_44_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_40_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_40_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_40_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_40_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_44_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_40_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_40_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_40_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_44_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_40_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_40_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_40_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_40_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_44_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_40_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_40_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_40_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_44_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_40_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_40_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_40_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_40_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_44_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_40_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_40_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_40_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_44_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_40_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_40_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_40_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_40_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_44_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_40_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_40_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_40_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_44_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_40_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_40_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_40_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_40_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_44_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_40_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_40_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_40_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_44_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_40_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_40_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_40_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_40_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_44_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_40_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_40_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_40_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_44_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_40_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_40_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_40_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_40_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_44_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_40_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_40_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_40_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_44_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_40_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_40_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_40_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_40_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_44_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_40_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_40_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_40_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_44_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_40_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_40_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_40_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_40_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_44_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_40_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_40_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_40_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_44_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_40_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_40_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_40_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_40_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_44_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_40_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_40_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_40_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_44_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_40_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_40_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_40_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_40_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_44_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_40_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_40_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_40_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_44_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_40_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_40_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_40_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_40_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_44_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_40_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_40_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_40_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_44_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_40_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_40_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_40_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_40_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_44_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_40_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_40_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_44_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_44_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_44_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_44_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_44_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_44_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_44_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_44_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_44_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_44_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_44_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_44_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_44_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_44_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_44_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_44_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_44_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_44_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_44_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_44_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_44_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_44_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_44_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_44_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_44_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_44_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_44_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_44_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_44_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_44_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_44_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_44_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_44_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_44_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_44_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_44_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_44_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_44_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_44_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_44_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_44_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_44_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_44_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_44_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_44_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_44_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_44_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_44_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_44_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_44_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_44_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_44_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_40_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_40_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_40_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_40_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_40_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_44_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_40_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_40_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_40_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_44_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_40_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_44_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_44_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_44_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_44_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_44_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_44_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_44_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_44_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_44_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_44_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_44_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_44_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_44_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_44_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_44_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_44_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_44_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_44_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_44_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_44_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_44_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_44_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_44_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_44_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_44_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_44_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_44_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_44_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_44_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_44_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_44_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_40_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_40_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_40_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_40_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_40_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_40_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_44_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_40_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_40_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_40_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_44_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_40_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_44_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_44_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_40_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_40_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_44_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_40_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_40_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_44_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_40_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_40_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_44_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_44_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_44_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_44_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_44_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_44_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_44_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_44_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_44_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_44_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_44_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_44_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_44_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_40_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_44_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_44_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_44_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_44_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_44_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_44_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_44_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_40_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_40_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_40_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_40_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_40_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_44_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_40_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_40_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_40_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_44_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_40_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_44_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_44_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_44_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_44_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_44_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_44_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_44_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_44_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_44_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_44_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_44_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_44_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_44_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_44_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_44_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_44_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_44_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_44_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_44_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_44_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_44_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_44_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_44_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_44_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_44_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_44_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_44_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_44_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_44_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_44_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_44_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_40_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_40_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_40_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_40_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_40_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_40_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_44_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_40_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_40_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_40_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_44_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_40_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_44_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_44_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_40_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_40_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_44_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_40_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_40_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_44_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_40_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_40_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_44_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_44_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_44_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_44_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_44_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_44_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_44_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_44_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_44_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_44_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_44_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_44_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_44_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_44_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_44_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_44_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_44_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_44_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_44_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_44_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_44_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_44_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_44_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_44_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_44_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_44_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_44_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_44_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_44_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_44_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_44_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_44_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_44_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_44_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_44_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_44_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_44_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_44_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_44_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_44_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_44_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_44_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_44_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_44_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_44_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_44_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_44_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_44_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_44_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_44_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_44_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_44_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_44_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_44_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_44_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_44_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_44_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_44_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_44_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_45[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_44_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_45_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_44_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_45_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_45_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_44_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_45_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_44_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_44_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_44_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_45_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_44_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_44_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_45_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_45_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_45_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_45_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_45_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_45_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_45_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_45_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_44_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_45_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_44_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_44_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_45_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_44_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_45_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_45_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_44_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_44_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_44_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_45_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_44_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_44_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_44_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_45_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_44_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_44_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_44_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_44_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_44_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_44_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_45_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_45_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_45_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_45_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_45_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_45_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_45_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_44_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_44_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_44_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_45_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_44_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_45_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_45_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_44_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_44_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_44_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_44_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_44_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_44_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_44_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_44_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_44_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_44_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_44_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_44_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_44_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_44_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_44_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_44_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_44_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_44_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_44_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_44_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_44_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_44_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_44_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_44_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_44_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_44_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_44_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_44_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_44_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_44_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_44_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_44_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_44_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_44_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_44_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_44_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_44_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_44_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_44_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_44_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_44_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_44_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_44_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_44_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_44_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_44_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_44_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_44_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_44_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_44_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_44_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_44_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_44_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_44_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_44_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_44_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_44_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_44_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_44_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_44_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_44_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_44_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_44_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_44_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_44_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_44_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_44_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_44_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_44_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_44_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_44_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_44_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_44_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_44_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_44_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_44_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_44_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_44_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_44_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_44_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_44_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_44_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_44_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_44_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_44_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_44_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_44_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_44_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_45_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_45_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_45_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_45_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_45_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_45_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_45_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_45_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_44_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_44_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_44_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_45_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_44_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_45_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_45_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_45_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_45_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_45_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_45_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_45_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_45_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_45_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_45_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_45_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_45_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_45_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_45_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_45_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_45_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_45_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_45_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_45_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_45_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_45_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_45_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_45_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_45_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_44_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_44_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_44_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_45_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_45_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_45_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_45_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_45_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_45_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_45_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_45_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_45_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_45_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_45_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_44_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_44_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_44_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_45_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_45_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_45_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_45_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_45_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_45_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_45_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_45_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_45_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_45_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_45_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_44_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_44_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_44_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_44_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_44_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_44_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_44_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_44_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_44_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_44_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_44_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_44_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_44_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_44_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_44_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_44_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_44_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_44_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_44_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_44_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_44_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_44_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_44_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_44_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_44_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_45_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_45_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_45_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_45_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_45_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_45_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_45_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_45_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_44_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_44_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_44_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_44_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_44_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_44_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_44_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_44_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_44_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_44_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_44_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_44_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_44_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_44_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_44_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_44_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_44_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_45_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_45_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_42_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_45_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_45_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e75_45_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_45_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_45_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e90_45_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_45_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_45_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_45_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_45_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_45_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_45_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_45_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_45_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_45_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_45_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_45_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_45_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_45_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_44_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_44_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_45_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_44_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_45_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_45_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_45_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_45_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_45_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_45_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_45_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_45_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_45_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_44_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_44_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_45_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_44_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_45_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_45_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_45_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_45_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_45_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_45_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_45_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_45_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_45_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_45_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_45_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_45_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_45_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_45_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_45_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_45_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_45_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_45_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_45_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_45_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_45_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_45_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_45_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_45_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_45_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_45_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_45_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_45_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_45_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_45_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_45_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_45_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_45_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_45_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_45_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_45_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_45_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_45_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_45_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_45_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_45_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_45_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_45_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_45_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_45_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_45_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_45_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_45_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_45_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_45_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_45_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_45_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_45_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_45_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_45_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_45_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_45_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_45_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_45_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_45_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_45_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_45_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_45_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_45_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_45_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_45_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_45_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_45_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_45_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_45_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_45_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_45_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_45_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_45_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_45_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_45_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_45_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_45_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_45_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_45_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_45_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_45_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_45_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_45_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_45_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_45_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_45_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_45_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_45_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_45_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_45_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_45_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_45_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_45_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_45_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_45_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_45_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_45_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_45_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_45_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_45_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_45_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_45_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_45_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_45_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_45_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_45_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_45_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_45_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_45_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_45_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_45_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_45_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_45_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_45_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_45_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_45_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_45_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_45_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_45_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_45_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_45_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_45_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_45_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_45_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_45_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_45_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_45_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_45_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_45_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_45_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_45_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_45_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_45_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_45_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_44_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_44_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_44_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_45_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_45_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_45_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_44_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_44_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_44_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_44_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_44_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_44_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_44_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_44_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_44_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_44_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_44_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_44_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_44_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_44_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_44_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_44_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_44_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_44_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_44_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_44_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_44_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_44_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_44_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_44_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_44_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_44_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_44_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_44_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_44_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_44_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_44_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_44_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_44_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_44_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_44_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_44_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_44_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_44_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_44_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_44_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_44_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_44_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_44_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_44_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_44_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_44_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_45_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_45_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_45_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_45_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_45_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_45_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_45_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_45_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_45_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_45_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_45_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_44_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_44_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_44_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_44_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_44_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_44_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_44_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_44_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_44_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_44_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_44_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_44_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_44_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_44_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_44_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_44_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_44_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_44_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_44_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_44_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_44_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_44_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_44_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_44_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_44_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_44_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_44_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_44_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_44_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_44_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_44_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_45_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_45_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_45_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_45_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_45_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_45_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_45_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_45_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_45_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_45_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_45_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_45_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_44_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_44_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_45_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_45_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_44_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_45_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_45_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_44_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_45_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_45_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_44_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_44_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_44_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_44_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_44_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_44_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_44_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_44_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_44_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_44_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_44_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_44_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_44_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_45_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_44_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_44_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_44_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_44_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_44_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_44_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_44_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_45_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_45_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_45_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_45_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_45_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_45_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_45_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_45_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_45_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_45_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_45_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_44_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_44_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_44_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_44_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_44_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_44_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_44_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_44_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_44_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_44_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_44_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_44_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_44_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_44_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_44_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_44_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_44_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_44_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_44_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_44_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_44_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_44_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_44_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_44_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_44_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_44_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_44_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_44_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_44_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_44_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_44_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_45_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_45_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_45_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_45_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_45_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_45_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_45_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_45_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_45_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_45_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_45_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_45_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_44_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_44_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_45_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_45_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_44_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_45_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_45_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_44_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_45_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_45_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_44_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_44_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_44_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_44_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_44_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_44_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_44_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_44_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_44_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_44_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_44_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_44_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_44_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_44_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_44_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_44_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_44_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_44_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_44_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_44_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_44_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_44_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_44_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_44_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_44_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_44_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_44_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_44_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_44_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_44_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_44_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_44_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_44_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_44_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_44_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_44_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_44_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_44_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_44_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_44_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_44_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_44_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_44_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_44_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_44_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_44_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_44_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_44_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_44_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_44_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_44_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_44_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_44_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_44_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_44_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_44_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_44_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_44_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_44_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +const struct cputbl op_smalltbl_46[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_44_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_45_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_44_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_45_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_46_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_44_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_46_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_44_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_44_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_44_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_46_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_44_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_44_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_46_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_46_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_46_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_46_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_46_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_46_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_46_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_46_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_44_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_46_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_44_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_44_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_45_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_44_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_45_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_46_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_44_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_44_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_44_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_46_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_44_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_44_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_44_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_46_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_44_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_44_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_44_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_44_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_44_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_44_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_46_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_46_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_46_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_46_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_46_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_46_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_46_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_44_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_44_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_44_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_45_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_44_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_45_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_46_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_44_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_44_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_44_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_44_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_44_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_44_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_44_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_44_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_44_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_44_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_44_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_44_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_44_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_44_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_44_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_44_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_44_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_44_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_44_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_44_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_44_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_44_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_44_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_44_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_44_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_44_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_44_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_44_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_44_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_44_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_44_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_44_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_44_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_44_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_44_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_44_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_44_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_44_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_44_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_44_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_44_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_44_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_44_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_44_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_44_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_44_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_44_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_44_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_44_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_44_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_44_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_44_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_44_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_44_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_44_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_44_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_44_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_44_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_44_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_44_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_44_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_44_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_44_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_44_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_44_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_44_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_44_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_44_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_44_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_44_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_44_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_44_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_44_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_44_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_44_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_44_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_44_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_44_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_44_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_44_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_44_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_44_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_44_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_44_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_44_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_44_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_44_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_44_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_46_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_46_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_46_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_46_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_46_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_46_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_46_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_46_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_44_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_44_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_44_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_46_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_44_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_46_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_46_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_46_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_46_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_46_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_46_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_46_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_46_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_46_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_46_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_46_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_46_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_46_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_46_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_46_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_46_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_46_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_46_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_46_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_46_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_46_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_46_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_46_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_46_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_44_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_44_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_44_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_46_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_46_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_46_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_46_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_46_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_46_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_46_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_46_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_46_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_46_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_46_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_44_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_44_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_44_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_46_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_46_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_46_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_46_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_46_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_46_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_46_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_46_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_46_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_46_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_46_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_44_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_44_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_44_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_44_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_44_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_44_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_44_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_44_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_44_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_44_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_44_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_44_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_44_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_44_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_44_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_44_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_44_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_44_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_44_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_44_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_44_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_44_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_44_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_44_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_44_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_46_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_46_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_46_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_46_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_46_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_46_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_46_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_46_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_44_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_44_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_44_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_44_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_44_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_44_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_44_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_44_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_44_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_44_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_44_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_44_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_44_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_44_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_44_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_44_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_44_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_46_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_46_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_42_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_46_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_45_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e75_46_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_46_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_45_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e90_46_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_46_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_46_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_46_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_46_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_46_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_46_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_46_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_46_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_46_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_46_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_46_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_46_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_46_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_44_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_44_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_46_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_44_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_46_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_46_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_46_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_46_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_46_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_46_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_46_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_46_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_46_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_44_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_44_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_46_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_44_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_46_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_46_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_46_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_46_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_46_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_46_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_46_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_46_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_46_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_46_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_46_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_46_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_46_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_46_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_46_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_46_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_46_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_46_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_46_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_46_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_46_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_46_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_46_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_46_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_46_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_46_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_46_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_46_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_46_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_46_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_46_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_46_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_46_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_46_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_46_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_46_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_46_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_46_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_46_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_46_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_46_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_46_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_46_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_46_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_46_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_46_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_46_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_46_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_46_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_46_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_46_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_46_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_46_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_46_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_46_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_46_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_46_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_46_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_46_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_46_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_46_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_46_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_46_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_46_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_46_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_46_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_46_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_46_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_46_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_46_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_46_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_46_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_46_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_46_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_46_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_46_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_46_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_46_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_46_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_46_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_46_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_46_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_46_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_46_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_46_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_46_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_46_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_46_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_46_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_46_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_46_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_46_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_46_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_46_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_46_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_46_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_46_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_46_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_46_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_46_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_46_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_46_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_46_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_46_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_46_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_46_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_46_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_46_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_46_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_46_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_46_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_46_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_46_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_46_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_46_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_46_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_46_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_46_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_46_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_46_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_46_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_46_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_46_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_46_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_46_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_46_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_46_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_46_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_46_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_46_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_46_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_46_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_46_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_46_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_46_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_44_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_44_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_44_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_46_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_46_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_46_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_44_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_44_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_44_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_44_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_44_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_44_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_44_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_44_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_44_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_44_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_44_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_44_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_44_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_44_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_44_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_44_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_44_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_44_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_44_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_44_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_44_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_44_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_44_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_44_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_44_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_44_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_44_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_44_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_44_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_44_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_44_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_44_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_44_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_44_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_44_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_44_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_44_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_44_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_44_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_44_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_44_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_44_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_44_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_44_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_44_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_44_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_46_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_46_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_46_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_46_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_46_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_46_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_46_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_46_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_46_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_46_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_46_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_44_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_44_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_44_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_44_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_44_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_44_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_44_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_44_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_44_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_44_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_44_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_44_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_44_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_44_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_44_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_44_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_44_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_44_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_44_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_44_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_44_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_44_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_44_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_44_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_44_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_44_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_44_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_44_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_44_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_44_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_44_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_46_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_46_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_46_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_46_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_46_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_46_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_46_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_46_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_46_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_46_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_46_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_46_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_44_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_44_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_46_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_46_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_44_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_46_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_46_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_44_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_46_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_46_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_44_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_44_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_44_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_44_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_44_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_44_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_44_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_44_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_44_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_44_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_44_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_44_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_44_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_46_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_44_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_44_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_44_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_44_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_44_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_44_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_44_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_46_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_46_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_46_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_46_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_46_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_46_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_46_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_46_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_46_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_46_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_46_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_44_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_44_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_44_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_44_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_44_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_44_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_44_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_44_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_44_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_44_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_44_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_44_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_44_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_44_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_44_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_44_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_44_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_44_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_44_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_44_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_44_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_44_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_44_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_44_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_44_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_44_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_44_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_44_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_44_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_44_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_44_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_46_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_46_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_46_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_46_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_46_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_46_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_46_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_46_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_46_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_46_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_46_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_46_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_44_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_44_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_46_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_46_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_44_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_46_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_46_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_44_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_46_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_46_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_44_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_44_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_44_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_44_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_44_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_44_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_44_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_44_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_44_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_44_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_44_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_44_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_44_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_44_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_44_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_44_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_44_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_44_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_44_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_44_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_44_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_44_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_44_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_44_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_44_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_44_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_44_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_44_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_44_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_44_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_44_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_44_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_44_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_44_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_44_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_44_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_44_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_44_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_44_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_44_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_44_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_44_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_44_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_44_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_44_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_44_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_44_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_44_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_44_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_44_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_44_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_44_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_44_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_44_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_44_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_44_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_44_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_44_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_44_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +const struct cputbl op_smalltbl_47[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_44_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_45_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_44_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_45_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_47_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_44_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_47_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_44_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_44_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_44_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_47_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_44_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_44_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_47_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_47_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_47_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_47_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_47_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_47_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_47_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_47_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_44_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_47_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_44_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_44_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_45_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_44_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_45_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_47_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_44_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_44_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_44_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_47_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_44_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_44_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_44_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_47_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_44_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_44_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_44_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_44_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_44_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_44_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_47_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_47_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_47_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_47_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_47_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_47_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_47_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_44_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_44_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_44_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_45_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_44_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_45_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_47_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_44_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_44_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_44_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_44_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_44_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_44_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_44_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_44_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_44_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_44_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_44_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_44_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_44_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_44_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_44_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_44_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_44_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_44_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_44_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_44_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_44_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_44_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_44_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_44_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_44_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_44_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_44_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_44_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_44_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_44_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_44_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_44_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_44_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_44_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_44_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_44_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_44_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_44_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_44_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_44_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_44_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_44_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_44_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_44_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_44_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_44_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_44_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_44_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_44_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_44_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_44_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_44_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_44_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_44_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_44_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_44_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_44_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_44_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_44_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_44_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_44_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_44_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_44_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_44_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_44_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_44_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_44_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_44_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_44_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_44_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_44_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_44_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_44_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_44_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_44_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_44_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_44_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_44_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_44_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_44_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_44_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_44_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_44_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_44_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_44_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_44_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_44_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_44_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_47_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_47_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_47_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_47_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_47_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_47_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_47_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_47_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_44_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_44_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_44_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_47_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_44_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_47_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_47_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_47_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_47_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_47_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_47_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_47_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_47_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_47_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_47_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_47_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_47_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_47_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_47_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_47_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_47_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_47_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_47_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_47_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_47_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_47_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_47_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_47_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_47_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_44_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_44_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_44_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_47_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_47_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_47_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_47_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_47_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_47_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_47_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_47_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_47_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_47_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_47_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_44_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_44_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_44_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_47_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_47_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_47_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_47_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_47_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_47_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_47_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_47_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_47_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_47_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_47_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_44_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_44_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_44_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_44_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_44_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_44_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_44_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_44_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_44_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_44_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_44_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_44_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_44_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_44_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_44_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_44_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_44_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_44_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_44_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_44_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_44_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_44_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_44_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_44_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_44_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_47_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_47_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_47_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_47_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_47_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_47_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_47_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_47_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_44_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_44_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_44_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_44_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_44_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_44_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_44_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_44_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_44_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_44_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_44_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_44_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_44_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_44_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_44_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_44_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_44_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_47_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_47_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_42_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_47_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_45_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e75_47_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_47_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_45_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e90_47_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_47_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_47_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_47_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_47_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_47_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_47_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_47_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_47_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_47_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_47_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_47_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_47_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_47_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_44_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_44_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_47_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_44_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_47_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_47_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_47_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_47_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_47_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_47_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_47_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_47_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_47_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_44_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_44_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_47_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_44_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_47_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_47_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_47_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_47_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_47_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_47_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_47_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_47_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_47_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_47_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_47_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_47_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_47_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_47_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_47_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_47_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_47_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_47_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_47_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_47_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_47_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_47_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_47_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_47_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_47_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_47_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_47_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_47_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_47_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_47_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_47_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_47_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_47_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_47_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_47_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_47_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_47_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_47_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_47_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_47_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_47_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_47_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_47_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_47_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_47_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_47_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_47_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_47_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_47_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_47_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_47_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_47_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_47_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_47_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_47_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_47_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_47_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_47_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_47_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_47_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_47_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_47_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_47_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_47_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_47_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_47_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_47_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_47_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_47_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_47_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_47_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_47_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_47_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_47_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_47_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_47_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_47_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_47_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_47_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_47_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_47_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_47_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_47_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_47_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_47_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_47_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_47_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_47_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_47_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_47_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_47_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_47_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_47_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_47_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_47_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_47_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_47_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_47_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_47_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_47_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_47_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_47_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_47_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_47_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_47_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_47_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_47_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_47_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_47_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_47_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_47_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_47_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_47_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_47_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_47_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_47_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_47_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_47_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_47_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_47_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_47_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_47_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_47_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_47_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_47_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_47_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_47_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_47_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_47_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_47_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_47_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_47_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_47_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_47_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_47_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_44_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_44_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_44_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_47_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_47_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_47_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_44_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_44_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_44_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_44_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_44_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_44_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_44_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_44_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_44_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_44_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_44_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_44_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_44_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_44_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_44_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_44_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_44_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_44_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_44_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_44_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_44_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_44_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_44_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_44_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_44_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_44_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_44_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_44_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_44_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_44_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_44_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_44_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_44_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_44_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_44_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_44_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_44_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_44_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_44_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_44_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_44_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_44_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_44_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_44_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_44_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_44_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_47_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_47_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_47_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_47_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_47_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_47_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_47_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_47_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_47_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_47_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_47_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_44_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_44_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_44_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_44_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_44_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_44_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_44_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_44_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_44_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_44_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_44_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_44_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_44_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_44_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_44_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_44_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_44_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_44_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_44_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_44_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_44_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_44_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_44_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_44_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_44_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_44_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_44_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_44_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_44_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_44_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_44_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_47_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_47_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_47_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_47_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_47_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_47_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_47_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_47_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_47_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_47_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_47_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_47_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_44_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_44_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_47_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_47_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_44_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_47_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_47_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_44_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_47_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_47_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_44_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_44_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_44_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_44_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_44_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_44_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_44_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_44_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_44_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_44_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_44_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_44_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_44_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_47_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_44_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_44_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_44_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_44_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_44_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_44_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_44_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_47_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_47_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_47_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_47_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_47_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_47_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_47_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_47_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_47_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_47_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_47_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_44_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_44_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_44_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_44_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_44_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_44_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_44_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_44_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_44_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_44_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_44_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_44_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_44_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_44_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_44_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_44_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_44_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_44_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_44_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_44_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_44_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_44_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_44_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_44_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_44_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_44_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_44_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_44_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_44_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_44_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_44_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_47_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_47_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_47_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_47_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_47_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_47_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_47_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_47_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_47_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_47_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_47_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_47_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_44_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_44_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_47_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_47_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_44_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_47_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_47_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_44_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_47_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_47_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_44_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_44_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_44_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_44_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_44_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_44_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_44_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_44_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_44_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_44_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_44_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_44_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_44_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_44_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_44_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_44_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_44_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_44_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_44_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_44_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_44_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_44_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_44_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_44_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_44_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_44_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_44_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_44_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_44_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_44_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_44_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_44_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_44_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_44_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_44_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_44_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_44_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_44_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_44_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_44_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_44_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_44_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_44_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_44_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_44_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_44_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_44_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_44_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_44_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_44_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_44_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_44_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_44_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_44_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_44_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_44_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_44_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_44_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_44_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +const struct cputbl op_smalltbl_48[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_44_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_45_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_44_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_45_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_48_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_44_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_48_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_44_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_44_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_44_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_48_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_44_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_44_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_48_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_48_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_48_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_48_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_48_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_48_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_48_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_48_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_44_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_48_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_44_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_44_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_45_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_44_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_45_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_48_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_44_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_44_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_44_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_48_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_44_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_44_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_44_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_48_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_44_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_44_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_44_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_44_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_44_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_44_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_48_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_48_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_48_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_48_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_48_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_48_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_48_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_44_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_44_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_44_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_45_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_44_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_45_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_48_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_44_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_44_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_44_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_44_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_44_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_44_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_44_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_44_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_44_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_44_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_44_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_44_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_44_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_44_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_44_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_44_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_44_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_44_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_44_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_44_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_44_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_44_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_44_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_44_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_44_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_44_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_44_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_44_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_44_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_44_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_44_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_44_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_44_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_44_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_44_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_44_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_44_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_44_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_44_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_44_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_44_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_44_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_44_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_44_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_44_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_44_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_44_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_44_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_44_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_44_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_44_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_44_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_44_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_44_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_44_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_44_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_44_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_44_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_44_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_44_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_44_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_44_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_44_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_44_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_44_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_44_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_44_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_44_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_44_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_44_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_44_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_44_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_44_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_44_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_44_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_44_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_44_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_44_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_44_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_44_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_44_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_44_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_44_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_44_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_44_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_44_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_44_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_44_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_48_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_48_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_48_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_48_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_48_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_48_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_48_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_48_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_44_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_44_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_44_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_48_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_44_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_48_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_48_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_48_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_48_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_48_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_48_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_48_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_48_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_48_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_48_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_48_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_48_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_48_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_48_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_48_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_48_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_48_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_48_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_48_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_48_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_48_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_48_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_48_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_48_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_44_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_44_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_44_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_48_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_48_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_48_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_48_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_48_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_48_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_48_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_48_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_48_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_48_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_48_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_44_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_44_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_44_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_48_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_48_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_48_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_48_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_48_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_48_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_48_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_48_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_48_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_48_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_48_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_44_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_44_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_44_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_44_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_44_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_44_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_44_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_44_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_44_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_44_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_44_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_44_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_44_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_44_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_44_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_44_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_44_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_44_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_44_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_44_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_44_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_44_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_44_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_44_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_44_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_48_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_48_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_48_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_48_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_48_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_48_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_48_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_48_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_44_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_44_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_44_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_44_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_44_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_44_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_44_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_44_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_44_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_44_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_44_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_44_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_44_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_44_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_44_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_44_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_44_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_48_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_48_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_42_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_48_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_45_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e75_48_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_48_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_45_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e90_48_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_48_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_48_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_48_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_48_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_48_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_48_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_48_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_48_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_48_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_48_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_48_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_48_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_48_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_44_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_44_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_48_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_44_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_48_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_48_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_48_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_48_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_48_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_48_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_48_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_48_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_48_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_44_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_44_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_48_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_44_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_48_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_48_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_48_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_48_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_48_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_48_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_48_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_48_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_48_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_48_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_48_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_48_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_48_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_48_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_48_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_48_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_48_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_48_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_48_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_48_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_48_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_48_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_48_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_48_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_48_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_48_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_48_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_48_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_48_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_48_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_48_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_48_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_48_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_48_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_48_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_48_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_48_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_48_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_48_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_48_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_48_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_48_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_48_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_48_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_48_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_48_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_48_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_48_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_48_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_48_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_48_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_48_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_48_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_48_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_48_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_48_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_48_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_48_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_48_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_48_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_48_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_48_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_48_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_48_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_48_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_48_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_48_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_48_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_48_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_48_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_48_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_48_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_48_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_48_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_48_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_48_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_48_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_48_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_48_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_48_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_48_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_48_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_48_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_48_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_48_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_48_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_48_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_48_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_48_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_48_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_48_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_48_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_48_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_48_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_48_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_48_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_48_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_48_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_48_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_48_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_48_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_48_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_48_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_48_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_48_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_48_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_48_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_48_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_48_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_48_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_48_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_48_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_48_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_48_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_48_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_48_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_48_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_48_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_48_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_48_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_48_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_48_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_48_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_48_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_48_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_48_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_48_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_48_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_48_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_48_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_48_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_48_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_48_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_48_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_48_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_44_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_44_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_44_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_48_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_48_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_48_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_44_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_44_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_44_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_44_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_44_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_44_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_44_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_44_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_44_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_44_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_44_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_44_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_44_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_44_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_44_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_44_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_44_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_44_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_44_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_44_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_44_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_44_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_44_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_44_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_44_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_44_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_44_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_44_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_44_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_44_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_44_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_44_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_44_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_44_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_44_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_44_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_44_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_44_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_44_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_44_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_44_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_44_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_44_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_44_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_44_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_44_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_48_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_48_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_48_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_48_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_48_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_48_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_48_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_48_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_48_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_48_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_48_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_44_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_44_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_44_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_44_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_44_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_44_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_44_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_44_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_44_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_44_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_44_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_44_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_44_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_44_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_44_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_44_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_44_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_44_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_44_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_44_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_44_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_44_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_44_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_44_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_44_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_44_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_44_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_44_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_44_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_44_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_44_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_48_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_48_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_48_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_48_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_48_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_48_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_48_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_48_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_48_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_48_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_48_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_48_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_44_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_44_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_48_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_48_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_44_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_48_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_48_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_44_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_48_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_48_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_44_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_44_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_44_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_44_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_44_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_44_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_44_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_44_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_44_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_44_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_44_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_44_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_44_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_48_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_44_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_44_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_44_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_44_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_44_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_44_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_44_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_48_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_48_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_48_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_48_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_48_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_48_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_48_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_48_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_48_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_48_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_48_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_44_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_44_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_44_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_44_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_44_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_44_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_44_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_44_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_44_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_44_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_44_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_44_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_44_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_44_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_44_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_44_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_44_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_44_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_44_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_44_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_44_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_44_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_44_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_44_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_44_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_44_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_44_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_44_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_44_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_44_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_44_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_48_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_48_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_48_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_48_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_48_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_48_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_48_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_48_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_48_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_48_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_48_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_48_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_44_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_44_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_48_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_48_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_44_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_48_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_48_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_44_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_48_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_48_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_44_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_44_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_44_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_44_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_44_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_44_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_44_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_44_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_44_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_44_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_44_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_44_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_44_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_44_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_44_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_44_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_44_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_44_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_44_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_44_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_44_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_44_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_44_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_44_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_44_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_44_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_44_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_44_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_44_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_44_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_44_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_44_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_44_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_44_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_44_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_44_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_44_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_44_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_44_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_44_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_44_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_44_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_44_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_44_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_44_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_44_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_44_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_44_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_44_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_44_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_44_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_44_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_44_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_44_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_44_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_44_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_44_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_44_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_44_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +const struct cputbl op_smalltbl_49[] = { +{ op_0000_40_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_40_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_40_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_40_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_40_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_44_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_40_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_40_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_45_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_40_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_40_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_40_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_40_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_40_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_44_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_40_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_40_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_45_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_49_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_40_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_40_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_40_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_40_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_44_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_40_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_40_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_40_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_49_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_40_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_40_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_40_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_40_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_44_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_40_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_40_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_40_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_44_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_40_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_44_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_49_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_40_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_40_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_40_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_40_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_44_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_40_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_40_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_44_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_49_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_49_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_49_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_49_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_49_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_49_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_49_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_49_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_44_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_49_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_40_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_40_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_40_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_40_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_44_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_40_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_40_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_40_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_40_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_40_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_40_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_40_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_44_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_40_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_40_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_45_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_40_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_40_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_40_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_40_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_40_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_44_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_40_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_40_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_45_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_49_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_40_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_40_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_40_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_40_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_44_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_40_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_40_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_40_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_40_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_40_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_40_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_40_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_44_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_40_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_40_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_40_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_40_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_40_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_40_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_40_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_44_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_40_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_40_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_49_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_40_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_40_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_40_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_40_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_44_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_40_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_40_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_40_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_40_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_40_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_40_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_40_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_44_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_40_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_40_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_40_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_40_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_40_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_40_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_40_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_44_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_40_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_40_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_49_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_40_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_40_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_40_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_40_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_44_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_40_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_40_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_40_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_40_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_40_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_40_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_40_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_44_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_40_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_40_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_40_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_44_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_44_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_40_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_40_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_40_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_40_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_44_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_40_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_40_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_44_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_49_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_49_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_49_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_49_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_49_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_49_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_49_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_44_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_40_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_40_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_40_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_40_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_44_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_40_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_40_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_40_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_40_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_40_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_40_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_40_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_44_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_40_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_40_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_45_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_40_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_40_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_40_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_40_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_40_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_44_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_40_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_40_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_45_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_49_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_40_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_40_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_40_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_40_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_44_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_40_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_40_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_40_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_40_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_40_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_40_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_40_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_44_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_40_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_40_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_40_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_40_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_40_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_40_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_40_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_44_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_40_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_40_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_40_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_40_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_40_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_40_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_40_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_44_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_40_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_40_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_1000_40_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_40_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_40_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_40_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_40_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_44_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_40_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_40_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_40_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_44_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_40_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_40_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_40_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_40_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_40_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_40_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_44_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_40_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_40_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_40_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_44_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_40_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_40_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_40_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_40_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_40_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_40_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_44_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_40_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_40_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_40_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_44_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_40_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_40_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_40_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_40_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_40_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_40_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_44_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_40_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_40_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_40_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_44_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_40_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_40_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_40_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_40_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_40_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_40_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_44_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_40_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_40_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_40_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_44_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_40_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_44_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_44_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_44_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_44_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_44_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_44_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_44_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_44_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_44_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_44_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_44_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_40_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_40_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_40_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_40_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_40_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_44_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_40_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_40_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_40_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_44_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_40_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_40_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_40_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_40_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_40_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_40_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_44_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_40_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_40_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_40_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_44_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_40_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_40_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_40_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_40_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_40_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_40_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_40_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_44_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_40_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_40_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_40_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_44_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_40_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_40_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_40_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_40_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_40_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_40_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_40_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_44_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_40_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_40_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_40_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_44_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_40_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_40_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_40_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_40_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_40_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_40_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_40_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_44_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_40_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_40_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_40_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_44_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_40_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_40_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_40_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_40_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_40_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_40_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_40_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_44_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_40_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_40_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_40_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_44_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_40_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_40_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_40_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_40_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_40_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_40_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_40_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_44_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_40_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_40_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_40_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_44_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_40_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_40_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_40_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_40_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_40_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_40_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_40_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_44_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_40_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_40_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_40_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_44_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_40_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_44_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_44_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_44_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_44_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_44_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_44_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_44_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_44_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_44_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_44_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_44_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_44_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_40_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_40_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_40_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_40_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_40_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_40_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_44_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_40_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_40_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_40_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_44_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_40_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_40_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_40_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_40_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_40_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_40_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_40_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_44_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_40_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_40_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_40_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_44_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_40_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_40_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_40_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_40_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_40_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_40_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_40_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_44_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_40_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_40_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_40_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_44_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_40_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_40_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_40_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_40_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_40_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_40_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_40_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_44_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_40_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_40_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_40_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_44_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_40_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_40_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_40_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_40_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_40_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_40_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_40_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_44_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_40_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_40_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_40_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_44_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_40_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_40_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_40_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_40_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_40_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_40_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_40_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_44_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_40_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_40_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_40_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_44_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_40_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_40_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_40_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_40_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_40_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_40_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_40_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_44_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_40_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_40_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_40_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_44_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_40_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_40_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_40_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_40_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_40_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_40_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_40_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_44_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_40_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_40_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_40_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_44_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_40_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_44_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_44_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_44_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_44_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_44_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_44_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_44_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_44_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_44_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_44_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_44_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_44_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_40_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_40_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_40_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_40_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_40_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_40_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_44_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_40_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_40_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_40_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_44_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_40_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_40_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_40_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_40_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_40_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_40_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_40_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_44_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_40_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_40_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_40_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_44_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_40_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_40_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_40_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_40_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_40_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_40_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_44_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_40_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_40_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_40_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_40_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_40_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_40_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_40_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_44_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_40_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_40_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_40_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_40_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_40_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_40_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_40_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_44_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_40_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_40_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_49_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_49_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_49_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_49_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_49_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_49_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_49_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_49_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_40_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_40_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_40_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_40_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_40_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_44_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_40_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_40_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_40_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_44_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_40_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_40_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_40_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_44_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_40_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_49_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_40_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_44_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_49_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_49_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_49_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_49_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_49_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_49_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_49_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_49_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_49_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_49_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_49_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_49_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_49_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_49_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_49_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_49_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_49_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_49_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_49_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_49_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_49_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_49_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_49_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_49_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4400_40_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_40_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_40_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_40_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_40_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_44_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_40_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_40_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_40_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_40_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_40_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_40_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_40_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_44_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_40_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_40_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_40_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_40_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_40_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_40_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_40_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_44_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_40_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_40_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_49_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_49_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_49_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_49_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_49_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_49_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_49_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_49_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_49_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_49_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_49_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_40_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_40_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_40_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_40_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_40_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_44_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_40_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_40_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_40_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_40_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_40_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_40_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_40_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_44_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_40_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_40_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_40_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_40_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_40_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_40_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_40_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_44_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_40_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_40_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_49_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_49_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_49_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_49_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_49_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_49_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_49_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_49_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_49_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_49_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_49_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_44_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_44_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_44_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_44_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_44_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_44_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_44_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_44_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_40_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4850_40_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_40_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_44_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_40_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_40_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_40_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_44_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_40_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_44_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_44_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_44_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_44_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_44_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_44_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_40_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_44_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_44_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_44_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_44_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_44_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_44_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_40_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_40_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_40_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_40_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_40_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_44_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_40_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_40_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_40_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_40_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_40_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_40_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_40_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_44_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_40_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_40_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_40_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_40_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_40_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_40_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_40_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_44_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_40_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_40_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_49_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_49_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_49_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_49_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_49_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_49_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_49_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_49_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_44_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_44_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_44_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_44_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_44_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_44_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_44_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_44_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_44_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_44_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_44_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_44_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_44_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_44_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_44_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_44_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_40_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_44_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_40_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_49_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_49_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_40_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_42_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_49_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_45_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e75_49_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_49_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_45_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e90_49_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_49_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_49_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_49_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_49_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_49_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_49_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_49_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_49_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_49_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_49_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_49_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_49_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_49_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_40_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_40_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_40_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_40_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_40_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_44_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_40_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_40_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_40_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_40_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_40_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_40_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_40_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_40_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_44_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_40_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_40_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_49_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_40_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_40_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_40_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_40_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_40_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_44_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_40_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_40_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_49_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_49_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_49_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_49_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_49_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_49_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_49_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_49_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_49_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_40_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_40_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_40_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_40_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_40_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_44_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_40_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_40_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_40_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_40_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_40_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_40_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_40_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_40_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_44_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_40_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_40_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_49_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_40_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_40_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_40_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_40_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_40_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_44_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_40_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_40_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_49_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_49_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_49_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_49_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_49_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_49_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_49_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_49_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_49_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_49_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_49_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_49_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_49_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_49_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_49_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_49_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_49_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_49_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_49_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_49_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_49_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_49_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_49_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_49_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_49_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_49_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_49_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_49_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_49_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_49_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_49_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_49_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_49_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_49_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_49_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_49_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_49_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_49_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_49_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_49_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_49_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_49_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_49_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_49_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_49_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_49_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_49_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_49_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_49_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_49_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_49_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_49_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_49_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_49_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_49_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_49_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_49_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_49_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_49_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_49_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_49_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_49_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_49_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_49_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_49_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_49_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_49_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_49_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_49_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_49_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_49_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_49_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_49_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_49_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_49_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_49_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_49_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_49_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_49_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_49_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_49_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_49_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_49_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_49_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_49_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_49_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_49_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_49_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_49_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_49_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_49_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_49_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_49_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_49_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_49_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_49_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_49_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_49_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_49_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_49_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_49_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_49_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_49_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_49_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_49_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_49_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_49_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_49_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_49_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_49_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_49_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_49_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_49_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_49_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_49_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_49_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_49_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_49_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_49_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_49_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_49_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_49_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_49_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_49_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_49_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_49_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_49_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_49_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_49_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_49_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_49_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_49_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_49_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_49_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_49_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_44_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_44_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_44_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_49_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_49_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_49_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_44_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_44_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_44_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_44_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_44_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_44_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_44_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_44_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_44_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_44_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_44_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_44_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_44_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_44_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_44_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_44_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_44_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_44_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_44_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_44_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_44_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_44_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_44_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_44_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_44_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_44_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_44_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_44_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_44_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_44_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_44_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_44_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_44_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_44_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_44_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_44_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_44_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_44_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_44_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_44_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_44_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_44_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_40_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_40_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_40_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_40_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_40_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_40_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_44_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_40_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_40_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_40_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_44_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_40_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_40_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_40_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_40_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_40_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_40_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_44_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_40_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_40_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_40_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_44_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_40_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_49_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_49_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_49_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_49_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_49_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_49_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_49_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_49_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_49_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_49_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_49_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_44_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_44_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_44_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_44_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_44_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_44_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_44_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_44_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_44_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_44_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_44_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_44_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_44_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_40_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_40_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_40_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_40_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_44_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_40_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_40_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_40_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_40_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_40_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_40_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_44_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_40_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_40_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_40_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_40_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_40_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_40_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_44_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_40_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_40_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_44_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_44_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_44_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_44_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_44_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_44_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_44_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_44_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_44_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_44_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_44_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_40_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_40_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_40_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_40_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_40_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_44_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_40_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_40_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_40_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_44_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_40_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_40_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_40_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_40_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_40_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_40_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_40_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_44_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_40_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_40_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_40_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_44_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_40_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_49_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_49_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_49_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_49_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_49_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_49_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_49_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_49_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_49_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_49_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_49_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_49_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_40_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_40_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_40_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_40_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_40_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_40_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_44_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_40_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_40_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_40_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_44_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_40_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_49_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_49_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_40_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_40_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_40_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_40_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_44_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_40_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_40_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_49_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_49_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_40_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_40_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_40_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_40_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_44_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_40_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_40_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_49_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_49_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_40_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_40_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_40_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_40_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_44_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_40_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_40_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_40_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_40_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_40_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_40_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_40_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_40_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_44_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_40_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_40_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_40_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_44_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_40_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_40_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_40_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_40_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_40_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_40_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_44_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_40_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_40_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_40_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_44_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_40_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_40_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_40_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_40_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_40_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_40_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_40_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_44_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_40_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_40_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_40_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_44_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_40_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_40_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_40_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_40_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_40_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_40_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_40_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_44_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_40_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_40_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_40_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_44_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_40_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_40_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_40_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_40_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_40_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_40_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_40_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_44_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_40_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_40_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_40_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_44_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_40_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_40_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_40_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_40_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_40_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_40_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_40_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_44_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_40_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_40_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_40_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_40_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_40_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_40_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_40_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_40_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_44_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_40_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_40_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_49_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_40_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_40_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_40_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_40_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_40_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_44_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_40_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_40_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_40_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_40_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_40_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_40_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_40_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_40_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_44_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_40_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_40_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_40_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_44_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_40_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_40_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_40_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_40_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_40_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_40_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_44_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_40_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_40_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_40_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_44_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_40_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_40_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_40_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_40_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_40_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_40_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_44_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_40_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_40_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_40_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_44_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_40_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_49_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_49_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_49_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_49_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_49_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_49_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_49_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_49_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_49_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_49_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_49_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_44_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_44_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_44_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_44_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_44_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_44_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_44_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_44_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_44_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_44_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_44_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_44_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_44_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_40_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_40_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_40_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_40_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_44_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_40_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_40_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_40_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_40_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_40_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_40_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_40_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_40_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_44_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_40_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_40_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_40_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_40_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_40_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_40_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_40_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_44_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_40_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_40_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_44_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_44_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_44_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_44_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_44_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_44_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_44_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_44_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_44_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_44_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_44_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_40_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_40_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_40_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_40_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_40_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_44_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_40_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_40_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_40_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_44_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_40_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_40_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_40_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_40_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_40_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_40_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_40_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_44_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_40_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_40_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_40_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_44_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_40_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_49_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_49_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_49_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_49_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_49_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_49_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_49_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_49_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_49_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_49_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_49_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_49_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_40_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_40_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_40_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_40_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_40_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_40_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_44_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_40_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_40_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_40_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_44_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_40_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_49_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_49_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_40_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_40_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_40_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_40_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_44_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_40_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_40_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_49_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_49_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_40_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_40_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_40_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_40_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_44_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_40_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_40_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_49_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_49_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_40_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_40_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_40_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_40_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_44_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_40_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_40_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_40_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_40_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_40_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_40_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_40_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_40_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_44_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_40_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_40_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_40_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_44_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_40_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_44_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_44_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_44_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_44_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_44_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_44_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_44_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_44_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_44_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_44_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_44_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_44_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_44_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_44_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_44_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_44_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_44_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_44_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_44_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_44_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_44_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_44_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_44_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_44_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_40_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_40_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_40_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_40_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_44_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_40_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_40_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_44_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_44_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_44_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_44_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_44_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_44_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_44_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_44_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_44_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_44_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_44_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_44_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_44_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_44_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_44_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_44_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_44_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_44_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_44_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_44_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_44_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_44_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_44_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_44_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_40_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_40_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_40_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_40_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_44_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_40_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_40_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_40_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_40_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_40_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_40_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_44_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_40_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_40_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_40_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_40_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_40_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_40_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_44_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_40_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_40_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_40_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_40_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_40_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_40_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_44_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_40_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_40_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_40_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_40_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_40_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_40_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_44_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_40_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_40_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_40_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_40_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_40_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_40_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_44_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_40_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_40_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_40_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_40_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_40_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_40_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_44_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_40_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_40_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#ifdef CPUEMU_50 +const struct cputbl op_smalltbl_50[] = { +{ op_0000_50_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_50_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_50_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_50_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_50_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_50_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_50_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_50_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_50_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_50_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_50_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_50_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_50_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_50_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_50_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_50_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_50_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_50_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_50_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_50_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_50_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_50_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_50_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_50_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_50_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_50_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_00d0_50_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00e8_50_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f0_50_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f8_50_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00f9_50_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fa_50_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_00fb_50_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0100_50_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_50_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_50_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_50_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_50_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_50_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_50_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_50_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_50_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_50_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_50_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_50_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_50_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_50_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_50_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_50_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_50_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_50_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_50_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_50_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_50_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_50_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_50_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_50_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_50_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_50_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_50_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_50_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_50_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_50_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_50_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_50_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_50_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_50_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_50_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_50_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_50_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_50_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_50_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_50_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_50_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_50_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_50_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_50_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_50_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_50_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_50_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_50_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_50_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_50_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_50_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_50_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_50_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_50_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_50_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_50_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_50_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_50_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_50_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_50_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_50_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_50_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_50_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_50_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_50_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +#ifndef CPUEMU_68000_ONLY +{ op_02d0_50_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02e8_50_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f0_50_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f8_50_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02f9_50_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fa_50_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_02fb_50_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0400_50_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_50_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_50_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_50_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_50_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_50_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_50_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_50_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_50_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_50_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_50_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_50_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_50_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_50_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_50_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_50_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_50_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_50_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_50_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_50_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_50_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_50_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_50_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_50_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +#ifndef CPUEMU_68000_ONLY +{ op_04d0_50_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04e8_50_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f0_50_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f8_50_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04f9_50_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fa_50_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_04fb_50_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +#endif +{ op_0600_50_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_50_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_50_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_50_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_50_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_50_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_50_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_50_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_50_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_50_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_50_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_50_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_50_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_50_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_50_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_50_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_50_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_50_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_50_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_50_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_50_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_50_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_50_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_50_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +#ifndef CPUEMU_68000_ONLY +{ op_06c0_50_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06c8_50_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06d0_50_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06e8_50_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f0_50_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f8_50_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06f9_50_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fa_50_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_06fb_50_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +#endif +{ op_0800_50_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_50_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_50_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_50_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_50_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_50_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_50_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_50_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_50_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_50_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_50_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_50_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_50_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_50_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_50_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_50_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_50_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_50_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_50_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_50_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_50_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_50_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_50_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_50_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_50_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_50_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_50_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_50_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_50_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_50_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_50_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_50_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_50_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_50_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_50_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_50_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_50_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_50_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_50_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_50_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_50_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_50_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_50_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_50_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_50_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_50_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_50_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_50_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_50_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_50_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_50_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_50_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_50_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_50_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_50_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_50_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_50_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_50_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_50_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_50_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_50_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_50_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_50_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_50_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_50_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_50_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_50_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_50_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_50_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_50_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_50_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_50_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_50_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_50_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_50_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c3a_50_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c3b_50_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c40_50_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_50_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_50_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_50_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_50_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_50_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_50_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_50_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0c7a_50_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0c7b_50_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +#endif +{ op_0c80_50_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_50_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_50_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_50_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_50_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_50_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_50_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_50_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cba_50_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cbb_50_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_50_ff, NULL, 0x0cd0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_50_ff, NULL, 0x0cd8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_50_ff, NULL, 0x0ce0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_50_ff, NULL, 0x0ce8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_50_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_50_ff, NULL, 0x0cf8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_50_ff, NULL, 0x0cf9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_50_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_50_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_50_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_50_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_50_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_50_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_50_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_50_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_50_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_50_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_50_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_50_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_50_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_50_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_50_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_50_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_50_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_50_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_50_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_50_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_50_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_50_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_50_ff, NULL, 0x0ed0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_50_ff, NULL, 0x0ed8, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_50_ff, NULL, 0x0ee0, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_50_ff, NULL, 0x0ee8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_50_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_50_ff, NULL, 0x0ef8, 12, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_50_ff, NULL, 0x0ef9, 16, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_50_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_50_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_50_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_50_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_50_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_50_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_50_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_50_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_50_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_50_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_50_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_50_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_50_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_50_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_50_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_50_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_50_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_50_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_50_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_50_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_50_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_50_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_50_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_50_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_50_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_50_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_50_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_50_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_50_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_50_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_50_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_50_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_50_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_50_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_50_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_50_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_50_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_50_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_50_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_50_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_50_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_50_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_50_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_50_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_50_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_50_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_50_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_50_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_50_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_50_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_50_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_50_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_50_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_50_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_50_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_50_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_50_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_50_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_50_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_50_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_50_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_50_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_50_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_50_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_50_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_50_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_50_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_50_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_50_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_50_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_50_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_50_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_50_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_50_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_50_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_50_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_50_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_50_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_50_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_50_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_50_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_50_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_50_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_50_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_50_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_50_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_50_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_50_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_50_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_50_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_50_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_50_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_50_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_50_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_50_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_50_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_50_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_50_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_50_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_50_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_50_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_50_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_50_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_50_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_50_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_50_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_50_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_50_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_50_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_50_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_50_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_50_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_50_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_50_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_50_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_50_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_50_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_50_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_50_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_50_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_50_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_50_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_50_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_50_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_50_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_50_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_50_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_50_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_50_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_50_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_50_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_50_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_50_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_50_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_50_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_50_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_50_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_50_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_50_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_50_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_50_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_50_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_50_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_50_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_50_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_50_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_50_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_50_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_50_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_50_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_50_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_50_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_50_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_50_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_50_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_50_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_50_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_50_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_50_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_50_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_50_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_50_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_50_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_50_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_50_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_50_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_50_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_50_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_50_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_50_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_50_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_50_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_50_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_50_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_50_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_50_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_50_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_50_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_50_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_50_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_50_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_50_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_50_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_50_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_50_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_50_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_50_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_50_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_50_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_50_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_50_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_50_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_50_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_50_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_50_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_50_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_50_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_50_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_50_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_50_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_50_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_50_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_50_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_50_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_50_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_50_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_50_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_50_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_50_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_50_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_50_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_50_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_50_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_50_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_50_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_50_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_50_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_50_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_50_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_50_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_50_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_50_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_50_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_50_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_50_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_50_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_50_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_50_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_50_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_50_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_50_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_50_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_50_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_50_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_50_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_50_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_50_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_50_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_50_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_50_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_50_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_50_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_50_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_50_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_50_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_50_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_50_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_50_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_50_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_50_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_50_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_50_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_50_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_50_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_50_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_50_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_50_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_50_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_50_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_50_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_50_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_50_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_50_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_50_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_50_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_50_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_50_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_50_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_50_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_50_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_50_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_50_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_50_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_50_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_50_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_50_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_50_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_50_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_50_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_50_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_50_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_50_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_50_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_50_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_50_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_50_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_50_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_50_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_50_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_50_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_50_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_50_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_50_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_50_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_50_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_50_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_50_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_50_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_50_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_50_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_50_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_50_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_50_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_50_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_50_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_50_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_50_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_50_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_50_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_50_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_50_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_50_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_50_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_50_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_50_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_50_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_50_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_50_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_50_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_50_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_50_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_50_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_50_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_50_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_50_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_50_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_50_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_50_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_50_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_50_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_50_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_50_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_50_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_50_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_50_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_50_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_50_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4100_50_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4110_50_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4118_50_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4120_50_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4128_50_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4130_50_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4138_50_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4139_50_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413a_50_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413b_50_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_413c_50_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +#endif +{ op_4180_50_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_50_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_50_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_50_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_50_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_50_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_50_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_50_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_50_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_50_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_50_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_50_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_50_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_50_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_50_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_50_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_50_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_50_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_50_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_50_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_50_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_50_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_50_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_50_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_50_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_50_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_50_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_50_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_50_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_50_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_50_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_50_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_50_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_50_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_50_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_50_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_50_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_50_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_50_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_50_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_50_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_50_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +#ifndef CPUEMU_68000_ONLY +{ op_42c0_50_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d0_50_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42d8_50_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e0_50_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42e8_50_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f0_50_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f8_50_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_42f9_50_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_4400_50_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_50_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_50_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_50_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_50_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_50_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_50_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_50_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_50_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_50_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_50_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_50_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_50_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_50_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_50_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_50_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_50_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_50_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_50_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_50_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_50_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_50_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_50_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_50_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_50_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_50_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_50_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_50_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_50_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_50_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_50_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_50_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_50_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_50_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_50_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_50_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_50_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_50_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_50_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_50_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_50_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_50_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_50_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_50_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_50_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_50_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_50_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_50_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_50_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_50_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_50_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_50_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_50_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_50_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_50_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_50_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_50_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_50_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_50_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_50_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_50_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_50_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_50_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_50_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_50_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_50_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_50_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_50_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_50_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_50_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_50_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_50_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_50_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_50_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_50_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_50_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_50_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_50_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_50_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_50_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +#ifndef CPUEMU_68000_ONLY +{ op_4848_50_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +#endif +{ op_4850_50_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_50_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_50_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_50_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_50_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_50_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_50_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_50_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_50_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_50_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_50_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_50_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_50_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_50_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_50_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_50_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_50_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_50_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_50_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_50_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_50_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +#ifndef CPUEMU_68000_ONLY +{ op_49c0_50_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +#endif +{ op_4a00_50_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_50_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_50_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_50_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_50_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_50_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_50_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_50_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a3a_50_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3b_50_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a3c_50_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a40_50_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a48_50_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a50_50_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_50_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_50_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_50_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_50_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_50_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_50_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a7a_50_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7b_50_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4a7c_50_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a80_50_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4a88_50_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4a90_50_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_50_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_50_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_50_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_50_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_50_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_50_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +#ifndef CPUEMU_68000_ONLY +{ op_4aba_50_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abb_50_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4abc_50_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +#endif +{ op_4ac0_50_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4ac8_50_ff, NULL, 0x4ac8, 2, { 0, 0 }, 0 }, /* HALT */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4acc_50_ff, NULL, 0x4acc, 2, { 0, 0 }, 0 }, /* PULSE */ +#endif +{ op_4ad0_50_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_50_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_50_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_50_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_50_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_50_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_50_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +#ifndef CPUEMU_68000_ONLY +{ op_4c00_50_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c10_50_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c18_50_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c20_50_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c28_50_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c30_50_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c38_50_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c39_50_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3a_50_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3b_50_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c3c_50_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c40_50_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c50_50_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c58_50_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c60_50_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c68_50_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c70_50_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c78_50_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c79_50_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7a_50_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7b_50_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4c7c_50_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +#endif +{ op_4c90_50_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_50_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_50_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_50_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_50_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_50_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_50_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_50_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_50_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_50_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_50_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_50_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_50_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_50_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_50_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_50_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_50_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_50_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_50_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_50_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_50_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_50_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_50_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_50_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_50_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_50_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_50_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_50_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_50_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7a_50_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_50_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_50_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_50_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_50_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_50_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_50_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_50_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_50_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_50_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_50_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_50_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_50_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_50_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_50_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_50_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_50_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_50_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_50_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_50_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_50_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_50_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_50_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_50_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_50_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_50_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_50_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_50_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_50_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_50_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_50_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_50_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_50_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_50_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_50_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_50_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_50_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_50_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_50_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_50_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_50_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_50_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_50_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_50_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_50_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_50_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_50_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_50_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_50_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_50_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_50_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_50fa_50_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fb_50_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_50fc_50_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5100_50_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_50_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_50_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_50_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_50_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_50_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_50_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_50_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_50_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_50_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_50_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_50_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_50_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_50_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_50_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_50_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_50_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_50_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_50_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_50_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_50_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_50_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_50_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_50_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_50_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_50_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_50_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_50_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_50_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_50_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_50_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_50_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_50_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_50_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_50_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_51fa_50_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fb_50_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_51fc_50_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_52c0_50_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_50_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_50_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_50_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_50_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_50_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_50_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_50_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_50_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_52fa_50_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fb_50_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_52fc_50_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_53c0_50_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_50_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_50_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_50_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_50_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_50_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_50_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_50_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_50_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_53fa_50_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fb_50_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_53fc_50_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_54c0_50_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_50_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_50_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_50_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_50_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_50_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_50_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_50_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_50_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_54fa_50_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fb_50_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_54fc_50_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_55c0_50_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_50_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_50_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_50_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_50_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_50_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_50_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_50_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_50_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_55fa_50_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fb_50_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_55fc_50_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_56c0_50_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_50_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_50_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_50_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_50_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_50_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_50_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_50_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_50_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_56fa_50_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fb_50_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_56fc_50_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_57c0_50_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_50_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_50_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_50_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_50_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_50_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_50_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_50_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_50_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_57fa_50_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fb_50_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_57fc_50_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_58c0_50_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_50_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_50_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_50_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_50_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_50_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_50_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_50_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_50_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_58fa_50_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fb_50_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_58fc_50_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_59c0_50_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_50_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_50_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_50_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_50_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_50_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_50_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_50_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_50_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_59fa_50_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fb_50_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_59fc_50_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ac0_50_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_50_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_50_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_50_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_50_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_50_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_50_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_50_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_50_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5afa_50_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afb_50_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5afc_50_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5bc0_50_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_50_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_50_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_50_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_50_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_50_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_50_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_50_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_50_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5bfa_50_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfb_50_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5bfc_50_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5cc0_50_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_50_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_50_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_50_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_50_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_50_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_50_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_50_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_50_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5cfa_50_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfb_50_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5cfc_50_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5dc0_50_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_50_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_50_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_50_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_50_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_50_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_50_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_50_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_50_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5dfa_50_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfb_50_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5dfc_50_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5ec0_50_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_50_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_50_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_50_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_50_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_50_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_50_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_50_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_50_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5efa_50_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efb_50_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5efc_50_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_5fc0_50_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_50_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_50_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_50_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_50_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_50_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_50_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_50_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_50_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +#ifndef CPUEMU_68000_ONLY +{ op_5ffa_50_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffb_50_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_5ffc_50_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +#endif +{ op_6000_50_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_50_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_50_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_50_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_50_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_50_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_50_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_50_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_50_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_50_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_50_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_50_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_50_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_50_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_50_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_50_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_50_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_50_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_50_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_50_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_50_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_50_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_50_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_50_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_50_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_50_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_50_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_50_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_50_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_50_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_50_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_50_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_50_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_50_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_50_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_50_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_50_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_50_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_50_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_50_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_50_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_50_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_50_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_50_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_50_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_50_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_50_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_50_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_50_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_50_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_50_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_50_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_50_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_50_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_50_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_50_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_50_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_50_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_50_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_50_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_50_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_50_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_50_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_50_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_50_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_50_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_50_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_50_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_50_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_50_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_50_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_50_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_50_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_50_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_50_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_50_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_50_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_50_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_50_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_50_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_50_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_50_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_50_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_50_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_50_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_50_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_50_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_50_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_50_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_50_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_50_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_50_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_50_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_50_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_50_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_50_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_50_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_50_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_50_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_50_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_50_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_50_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8140_50_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8148_50_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +#endif +{ op_8150_50_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_50_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_50_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_50_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_50_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_50_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_50_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +#ifndef CPUEMU_68000_ONLY +{ op_8180_50_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_8188_50_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +#endif +{ op_8190_50_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_50_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_50_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_50_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_50_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_50_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_50_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_50_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_50_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_50_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_50_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_50_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_50_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_50_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_50_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_50_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_50_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_50_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_50_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_50_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_50_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_50_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_50_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_50_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_50_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_50_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_50_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_50_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_50_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_50_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_50_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_50_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_50_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_50_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_50_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_50_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_50_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_50_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_50_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_50_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_50_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_50_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_50_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_50_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_50_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_50_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_50_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_50_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_50_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_50_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_50_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_50_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_50_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_50_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_50_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_50_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_50_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_50_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_50_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_50_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_50_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_50_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_50_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_50_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_50_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_50_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_50_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_50_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_50_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_50_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_50_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_50_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_50_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_50_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_50_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_50_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_50_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_50_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_50_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_50_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_50_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_50_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_50_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_50_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_50_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_50_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_50_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_50_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_50_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_50_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_50_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_50_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_50_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_50_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_50_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_50_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_50_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_50_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_50_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_50_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_50_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_50_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_50_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_50_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_50_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_50_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_50_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_50_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_50_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_50_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_50_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_50_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_50_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_50_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_50_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_50_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_50_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_50_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_50_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_50_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_50_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_50_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_50_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_50_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_50_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_50_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_50_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_50_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_50_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_50_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_50_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_50_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_50_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_50_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_50_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_50_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_50_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_50_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_50_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_50_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_50_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_50_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_50_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_50_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_50_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_50_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_50_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_50_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_50_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_50_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_50_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_50_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_50_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_50_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_50_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_50_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_50_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_50_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_50_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_50_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_50_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_50_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_50_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_50_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_50_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_50_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_50_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_50_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_50_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_50_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_50_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_50_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_50_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_50_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_50_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_50_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_50_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_50_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_50_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_50_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_50_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_50_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_50_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_50_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_50_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_50_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_50_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_50_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_50_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_50_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_50_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_50_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_50_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_50_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_50_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_50_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_50_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_50_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_50_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_50_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_50_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_50_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_50_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_50_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_50_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_50_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_50_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_50_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_50_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_50_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_50_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_50_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_50_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_50_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_50_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_50_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_50_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_50_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_50_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_50_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_50_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_50_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_50_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_50_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_50_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_50_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_50_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_50_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_50_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_50_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_50_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_50_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_50_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_50_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_50_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_50_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_50_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_50_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_50_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_50_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_50_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_50_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_50_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_50_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_50_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_50_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_50_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_50_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_50_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_50_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_50_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_50_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_50_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_50_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_50_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_50_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_50_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_50_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_50_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_50_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_50_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_50_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_50_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_50_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_50_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_50_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_50_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_50_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_50_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_50_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_50_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_50_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_50_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_50_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_50_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_50_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_50_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_50_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_50_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_50_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_50_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_50_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_50_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_50_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_50_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_50_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_50_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_50_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_50_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_50_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_50_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_50_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_50_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_50_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_50_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_50_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_50_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_50_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_50_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_50_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_50_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_50_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_50_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_50_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_50_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_50_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_50_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_50_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_50_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_50_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_50_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_50_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_50_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_50_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_50_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_50_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_50_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_50_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_50_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_50_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_50_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_50_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_50_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_50_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_50_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_50_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_50_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_50_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_50_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_50_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_50_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_50_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_50_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_50_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_50_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_50_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_50_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_50_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_50_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_50_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_50_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_50_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_50_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_50_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_50_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_50_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_50_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_50_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_50_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_50_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_50_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_50_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_50_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_50_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_50_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_50_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_50_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_50_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_50_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_50_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_50_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_50_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_50_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_50_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_50_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_50_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_50_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_50_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_50_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_50_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_50_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_50_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_50_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_50_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_50_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_50_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_50_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_50_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_50_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_50_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_50_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_50_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_50_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_50_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_50_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_50_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_50_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_50_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_50_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_50_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_50_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_50_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_50_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_50_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_50_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_50_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_50_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_50_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_50_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_50_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_50_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_50_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_50_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_50_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_50_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_50_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_50_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_50_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_50_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_50_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_50_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_50_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_50_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_50_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_50_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_50_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_50_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_50_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_50_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_50_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_50_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_50_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_50_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_50_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_50_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_50_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_50_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_50_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_50_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_50_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_50_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_50_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_50_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_50_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_50_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_50_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_50_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_50_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_50_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_50_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_50_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_50_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_50_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_50_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_50_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_50_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_50_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_50_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_50_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_50_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_50_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_50_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_50_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_50_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_50_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_50_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_50_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_50_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_50_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_50_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_50_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +#ifndef CPUEMU_68000_ONLY +{ op_e8c0_50_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8d0_50_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8e8_50_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f0_50_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f8_50_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8f9_50_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fa_50_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e8fb_50_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9c0_50_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9d0_50_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9e8_50_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f0_50_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f8_50_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9f9_50_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fa_50_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_e9fb_50_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eac0_50_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ead0_50_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eae8_50_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf0_50_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf8_50_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eaf9_50_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebc0_50_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebd0_50_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebe8_50_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf0_50_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf8_50_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebf9_50_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfa_50_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ebfb_50_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecc0_50_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecd0_50_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ece8_50_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf0_50_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf8_50_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ecf9_50_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edc0_50_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edd0_50_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_ede8_50_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf0_50_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf8_50_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edf9_50_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfa_50_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_edfb_50_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eec0_50_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eed0_50_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eee8_50_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef0_50_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef8_50_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eef9_50_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efc0_50_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efd0_50_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_efe8_50_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff0_50_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff8_50_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_eff9_50_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f000_50_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f008_50_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f010_50_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f018_50_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f020_50_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f028_50_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f030_50_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f038_50_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f039_50_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f200_50_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f208_50_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f210_50_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f218_50_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f220_50_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f228_50_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f230_50_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f238_50_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f239_50_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23a_50_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23b_50_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f23c_50_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f240_50_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f248_50_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f250_50_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f258_50_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f260_50_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f268_50_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f270_50_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f278_50_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f279_50_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27a_50_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27b_50_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f27c_50_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f280_50_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f2c0_50_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f310_50_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f320_50_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f328_50_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f330_50_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f338_50_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f339_50_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f350_50_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f358_50_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f368_50_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f370_50_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f378_50_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f379_50_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37a_50_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f37b_50_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f408_50_ff, NULL, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f410_50_ff, NULL, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f418_50_ff, NULL, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f419_50_ff, NULL, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41a_50_ff, NULL, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41b_50_ff, NULL, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41c_50_ff, NULL, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41d_50_ff, NULL, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41e_50_ff, NULL, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f41f_50_ff, NULL, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f428_50_ff, NULL, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f430_50_ff, NULL, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f438_50_ff, NULL, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f439_50_ff, NULL, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43a_50_ff, NULL, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43b_50_ff, NULL, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43c_50_ff, NULL, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43d_50_ff, NULL, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43e_50_ff, NULL, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f43f_50_ff, NULL, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f500_50_ff, NULL, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f508_50_ff, NULL, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f510_50_ff, NULL, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f518_50_ff, NULL, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f548_50_ff, NULL, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f568_50_ff, NULL, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f588_50_ff, NULL, 0xf588, -1, { 0, 0 }, 0 }, /* PLPAW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f5c8_50_ff, NULL, 0xf5c8, -1, { 0, 0 }, 0 }, /* PLPAR */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f600_50_ff, NULL, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f608_50_ff, NULL, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f610_50_ff, NULL, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f618_50_ff, NULL, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f620_50_ff, NULL, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f800_50_ff, NULL, 0xf800, -1, { 0, 0 }, 0 }, /* LPSTOP */ +#endif +{ 0, 0 }}; +#endif /* CPUEMU_50 */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_51[] = { +{ op_0000_50_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_50_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_50_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_50_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_50_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_50_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_50_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_50_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_51_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_50_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_50_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_50_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_50_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_50_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_50_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_50_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_50_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_51_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_50_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_50_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_50_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_50_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_50_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_50_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_50_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_50_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_00d0_50_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00e8_50_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f0_50_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_00f8_50_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f9_50_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fa_50_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fb_50_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0100_50_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_50_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_50_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_50_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_50_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_50_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_50_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_50_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_50_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_50_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_50_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_50_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_50_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_50_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_50_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_50_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_50_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_50_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_50_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_50_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_50_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_50_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_50_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_50_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_50_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_50_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_50_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_50_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_50_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_50_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_50_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_50_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_50_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_50_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_50_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_50_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_50_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_50_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_50_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_50_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_50_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_50_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_50_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_50_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_50_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_50_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_50_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_51_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_50_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_50_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_50_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_50_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_50_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_50_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_50_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_50_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_51_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_50_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_50_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_50_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_50_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_50_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_50_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_50_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_50_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_02d0_50_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02e8_50_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f0_50_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_02f8_50_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f9_50_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fa_50_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fb_50_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0400_50_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_50_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_50_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_50_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_50_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_50_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_50_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_50_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_50_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_50_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_50_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_50_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_50_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_50_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_50_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_50_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_50_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_50_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_50_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_50_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_50_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_50_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_50_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_50_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_04d0_50_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04e8_50_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f0_50_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_04f8_50_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f9_50_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fa_50_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fb_50_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0600_50_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_50_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_50_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_50_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_50_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_50_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_50_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_50_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_50_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_50_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_50_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_50_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_50_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_50_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_50_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_50_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_50_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_50_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_50_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_50_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_50_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_50_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_50_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_50_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_06c0_50_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06c8_50_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06d0_50_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06e8_50_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f0_50_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f8_50_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f9_50_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fa_50_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fb_50_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_0800_50_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_50_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_50_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_50_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_50_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_50_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_50_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_50_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_50_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_50_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_50_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_50_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_50_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_50_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_50_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_50_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_50_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_50_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_50_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_50_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_50_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_50_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_50_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_50_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_50_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_50_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_50_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_50_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_50_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_50_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_50_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_50_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_50_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_50_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_50_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_50_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_50_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_50_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_50_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_50_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_50_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_50_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_51_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_50_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_50_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_50_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_50_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_50_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_50_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_50_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_50_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_51_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_50_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_50_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_50_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_50_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_50_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_50_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_50_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_50_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_51_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_51_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_51_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_51_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_51_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_51_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_51_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_50_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_50_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_50_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_50_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_50_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_50_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_50_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_50_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3a_50_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3b_50_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c40_50_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_50_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_50_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_50_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_50_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_50_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_50_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_50_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7a_50_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7b_50_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c80_50_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_50_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_50_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_50_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_50_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_50_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_50_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_50_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0cba_50_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cbb_50_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_51_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_51_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_51_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_51_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_51_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_51_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_51_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_51_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_51_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_51_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_51_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_51_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_51_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_51_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_51_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_51_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_51_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_51_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_51_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_51_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_51_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_51_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_51_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_51_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_51_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_51_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_51_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_51_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_51_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_51_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_51_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_51_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_51_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_51_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_51_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_51_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_51_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_50_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_50_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_50_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_50_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_50_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_50_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_50_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_50_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_50_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_50_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_50_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_50_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_50_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_50_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_50_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_50_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_50_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_50_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_50_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_50_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_50_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_50_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_50_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_50_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_50_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_50_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_50_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_50_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_50_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_50_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_50_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_50_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_50_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_50_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_50_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_50_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_50_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_50_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_50_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_50_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_50_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_50_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_50_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_50_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_50_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_50_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_50_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_50_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_50_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_50_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_50_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_50_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_50_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_50_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_50_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_50_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_50_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_50_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_50_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_50_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_50_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_50_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_50_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_50_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_50_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_50_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_50_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_50_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_50_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_50_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_50_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_50_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_50_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_50_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_50_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_50_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_50_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_50_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_50_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_50_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_50_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_50_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_50_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_50_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_50_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_50_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_50_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_50_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_50_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_50_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_50_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_50_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_50_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_50_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_50_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_50_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_50_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_50_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_50_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_50_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_50_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_50_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_50_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_50_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_50_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_50_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_50_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_50_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_50_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_50_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_50_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_50_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_50_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_50_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_50_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_50_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_50_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_50_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_50_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_50_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_50_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_50_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_50_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_50_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_50_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_50_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_50_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_50_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_50_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_50_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_50_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_50_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_50_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_50_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_50_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_50_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_50_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_50_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_50_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_50_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_50_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_50_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_50_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_50_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_50_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_50_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_50_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_50_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_50_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_50_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_50_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_50_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_50_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_50_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_50_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_50_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_50_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_50_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_50_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_50_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_50_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_50_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_50_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_50_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_50_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_50_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_50_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_50_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_50_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_50_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_50_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_50_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_50_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_50_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_50_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_50_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_50_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_50_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_50_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_50_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_50_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_50_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_50_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_50_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_50_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_50_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_50_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_50_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_50_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_50_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_50_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_50_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_50_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_50_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_50_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_50_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_50_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_50_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_50_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_50_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_50_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_50_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_50_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_50_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_50_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_50_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_50_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_50_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_50_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_50_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_50_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_50_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_50_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_50_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_50_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_50_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_50_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_50_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_50_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_50_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_50_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_50_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_50_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_50_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_50_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_50_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_50_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_50_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_50_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_50_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_50_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_50_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_50_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_50_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_50_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_50_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_50_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_50_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_50_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_50_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_50_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_50_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_50_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_50_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_50_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_50_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_50_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_50_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_50_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_50_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_50_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_50_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_50_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_50_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_50_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_50_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_50_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_50_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_50_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_50_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_50_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_50_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_50_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_50_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_50_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_50_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_50_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_50_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_50_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_50_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_50_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_50_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_50_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_50_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_50_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_50_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_50_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_50_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_50_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_50_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_50_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_50_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_50_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_50_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_50_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_50_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_50_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_50_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_50_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_50_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_50_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_50_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_50_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_50_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_50_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_50_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_50_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_50_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_50_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_50_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_50_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_50_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_50_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_50_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_50_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_50_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_50_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_50_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_50_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_50_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_50_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_50_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_50_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_50_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_50_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_50_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_50_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_50_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_50_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_50_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_50_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_50_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_50_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_50_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_50_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_50_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_50_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_50_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_50_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_50_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_50_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_50_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_50_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_50_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_50_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_50_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4100_50_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4110_50_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4118_50_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4120_50_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4128_50_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4130_50_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_4138_50_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4139_50_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_413a_50_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_413b_50_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_413c_50_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_4180_50_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_50_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_50_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_50_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_50_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_50_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_50_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_50_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_50_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_50_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_50_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_50_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_50_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_50_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_50_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_50_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_50_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_50_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_50_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_50_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_50_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_50_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_50_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_50_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_50_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_50_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_50_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_50_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_50_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_50_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_50_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_50_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_50_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_50_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_50_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_50_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_50_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_50_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_50_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_50_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_50_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_50_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_50_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_50_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_50_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_50_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_50_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f0_50_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_42f8_50_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_50_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_50_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_50_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_50_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_50_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_50_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_50_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_50_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_50_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_50_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_50_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_50_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_50_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_50_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_50_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_50_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_50_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_50_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_50_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_50_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_50_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_50_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_50_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_50_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_50_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_50_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_50_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_50_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_50_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_50_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_50_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_50_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_50_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_50_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_50_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_50_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_50_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_50_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_50_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_50_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_50_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_50_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_50_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_50_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_50_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_50_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_50_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_50_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_50_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_50_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_50_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_50_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_50_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_50_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_50_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_50_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_50_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_50_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_50_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_50_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_50_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_50_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_50_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_50_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_50_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_50_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_50_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_50_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_50_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_50_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_50_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_50_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +#ifndef CPUEMU_68000_ONLY +{ op_4808_51_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +#endif +{ op_4810_50_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_50_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_50_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_50_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_50_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_50_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_50_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_50_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_50_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_50_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_50_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_50_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_50_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_50_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_50_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_50_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_50_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_50_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_50_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_50_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_50_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_50_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_50_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_50_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_50_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_50_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_50_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_50_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_50_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_50_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_49c0_50_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4a00_50_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_50_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_50_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_50_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_50_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_50_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_50_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_50_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a3a_50_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a3b_50_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a3c_50_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_50_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a48_50_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_50_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_50_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_50_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_50_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_50_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_50_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_50_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a7a_50_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a7b_50_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a7c_50_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_50_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a88_50_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_50_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_50_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_50_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_50_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_50_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_50_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_50_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4aba_50_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4abb_50_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4abc_50_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_50_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_50_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_50_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_50_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_50_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_50_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_50_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_50_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c00_50_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c10_50_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c18_50_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c20_50_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c28_50_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c30_50_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c38_50_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c39_50_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3a_50_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3b_50_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c3c_50_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c40_50_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c50_50_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c58_50_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c60_50_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c68_50_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c70_50_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c78_50_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c79_50_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7a_50_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7b_50_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c7c_50_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c90_50_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_50_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_50_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_50_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_50_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_50_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_50_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_50_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_50_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_50_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_50_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_50_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_50_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_50_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_50_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_50_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_50_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_51_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_50_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_51_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_50_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_50_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_51_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_51_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_51_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e74_50_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ op_4e75_50_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_50_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_51_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_50_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_51_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_50_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_50_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_50_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_50_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_50_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_50_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_50_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_50_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_50_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_50_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_50_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_50_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_50_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_50_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_50_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_50_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_50_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_50_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_50_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_50_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_50_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_50_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_50_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_50_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_50_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_50_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_50_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_50_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_50_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_50_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_50_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_50_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_50_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_50_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_50_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_50_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_50_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_50_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_50_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_50_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_50_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_50_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_50_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_50_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_50_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_50_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_50_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_50_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_50_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_50fa_50_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fb_50_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fc_50_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5100_50_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_50_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_50_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_50_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_50_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_50_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_50_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_50_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_50_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_50_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_50_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_50_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_50_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_50_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_50_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_50_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_50_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_50_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_50_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_50_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_50_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_50_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_50_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_50_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_50_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_50_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_50_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_50_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_50_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_50_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_50_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_50_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_50_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_50_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_50_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_51fa_50_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fb_50_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fc_50_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52c0_50_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_50_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_50_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_50_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_50_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_50_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_50_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_50_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_50_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52fa_50_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fb_50_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fc_50_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53c0_50_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_50_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_50_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_50_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_50_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_50_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_50_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_50_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_50_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53fa_50_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fb_50_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fc_50_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54c0_50_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_50_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_50_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_50_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_50_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_50_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_50_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_50_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_50_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54fa_50_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fb_50_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fc_50_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55c0_50_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_50_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_50_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_50_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_50_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_50_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_50_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_50_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_50_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55fa_50_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fb_50_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fc_50_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56c0_50_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_50_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_50_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_50_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_50_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_50_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_50_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_50_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_50_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56fa_50_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fb_50_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fc_50_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57c0_50_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_50_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_50_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_50_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_50_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_50_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_50_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_50_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_50_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57fa_50_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fb_50_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fc_50_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58c0_50_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_50_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_50_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_50_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_50_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_50_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_50_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_50_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_50_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58fa_50_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fb_50_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fc_50_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59c0_50_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_50_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_50_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_50_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_50_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_50_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_50_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_50_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_50_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59fa_50_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fb_50_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fc_50_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ac0_50_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_50_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_50_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_50_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_50_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_50_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_50_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_50_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_50_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5afa_50_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afb_50_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afc_50_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bc0_50_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_50_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_50_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_50_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_50_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_50_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_50_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_50_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_50_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bfa_50_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfb_50_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfc_50_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cc0_50_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_50_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_50_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_50_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_50_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_50_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_50_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_50_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_50_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cfa_50_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfb_50_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfc_50_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dc0_50_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_50_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_50_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_50_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_50_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_50_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_50_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_50_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_50_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dfa_50_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfb_50_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfc_50_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ec0_50_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_50_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_50_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_50_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_50_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_50_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_50_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_50_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_50_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5efa_50_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efb_50_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efc_50_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5fc0_50_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_50_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_50_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_50_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_50_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_50_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_50_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_50_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_50_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ffa_50_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffb_50_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffc_50_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_6000_50_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_50_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_50_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_50_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_50_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_50_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_50_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_50_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_50_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_50_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_50_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_50_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_50_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_50_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_50_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_50_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_50_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_50_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_50_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_50_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_50_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_50_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_50_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_50_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_50_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_50_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_50_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_50_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_50_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_50_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_50_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_50_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_50_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_50_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_50_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_50_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_50_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_50_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_50_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_50_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_50_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_50_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_50_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_50_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_50_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_50_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_50_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_50_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_50_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_50_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_50_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_50_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_50_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_50_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_50_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_50_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_50_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_50_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_50_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_50_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_50_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_50_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_50_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_50_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_50_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_50_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_50_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_50_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_50_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_50_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_50_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_50_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_50_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_50_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_50_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_50_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_50_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_50_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_50_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_50_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_50_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_50_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_50_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_50_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_50_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_50_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_50_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_50_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_50_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_50_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_50_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_50_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_50_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_50_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_50_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_50_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_50_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_50_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_50_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_50_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_50_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_50_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8140_50_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8148_50_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8150_50_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_50_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_50_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_50_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_50_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_50_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_50_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8180_50_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8188_50_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8190_50_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_50_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_50_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_50_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_50_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_50_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_50_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_50_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_50_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_50_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_50_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_50_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_50_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_50_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_50_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_50_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_50_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_50_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_50_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_50_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_50_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_50_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_50_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_50_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_50_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_50_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_50_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_50_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_50_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_50_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_50_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_50_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_50_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_50_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_50_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_50_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_50_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_50_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_50_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_50_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_50_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_50_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_50_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_50_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_50_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_50_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_50_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_50_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_50_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_50_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_50_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_50_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_50_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_50_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_50_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_50_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_50_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_50_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_50_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_50_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_50_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_50_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_50_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_50_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_50_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_50_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_50_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_50_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_50_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_50_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_50_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_50_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_50_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_50_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_50_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_50_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_50_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_50_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_50_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_50_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_50_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_50_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_50_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_50_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_50_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_50_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_50_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_50_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_50_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_50_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_50_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_50_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_50_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_50_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_50_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_50_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_50_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_50_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_50_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_50_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_50_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_50_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_50_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_50_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_50_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_50_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_50_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_50_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_50_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_50_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_50_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_50_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_50_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_50_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_50_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_50_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_50_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_50_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_50_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_50_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_50_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_50_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_50_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_50_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_50_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_50_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_50_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_50_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_50_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_50_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_50_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_50_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_50_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_50_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_50_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_50_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_50_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_50_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_50_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_50_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_50_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_50_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_50_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_50_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_50_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_50_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_50_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_50_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_50_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_50_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_50_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_50_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_50_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_50_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_50_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_50_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_50_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_50_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_50_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_50_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_50_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_50_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_50_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_50_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_50_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_50_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_50_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_50_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_50_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_50_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_50_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_50_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_50_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_50_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_50_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_50_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_50_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_50_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_50_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_50_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_50_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_50_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_50_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_50_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_50_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_50_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_50_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_50_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_50_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_50_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_50_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_50_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_50_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_50_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_50_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_50_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_50_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_50_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_50_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_50_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_50_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_50_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_50_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_50_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_50_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_50_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_50_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_50_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_50_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_50_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_50_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_50_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_50_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_50_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_50_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_50_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_50_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_50_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_50_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_50_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_50_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_50_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_50_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_50_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_50_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_50_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_50_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_50_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_50_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_50_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_50_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_50_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_50_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_50_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_50_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_50_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_50_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_50_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_50_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_50_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_50_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_50_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_50_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_50_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_50_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_50_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_50_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_50_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_50_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_50_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_50_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_50_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_50_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_50_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_50_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_50_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_50_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_50_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_50_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_50_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_50_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_50_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_50_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_50_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_50_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_50_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_50_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_50_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_50_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_50_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_50_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_50_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_50_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_50_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_50_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_50_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_50_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_50_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_50_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_50_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_50_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_50_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_50_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_50_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_50_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_50_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_50_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_50_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_50_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_50_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_50_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_50_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_50_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_50_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_50_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_50_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_50_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_50_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_50_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_50_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_50_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_50_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_50_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_50_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_50_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_50_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_50_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_50_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_50_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_50_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_50_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_50_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_50_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_50_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_50_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_50_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_50_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_50_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_50_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_50_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_50_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_50_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_50_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_50_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_50_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_50_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_50_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_50_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_50_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_50_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_50_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_50_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_50_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_50_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_50_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_50_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_50_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_50_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_50_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_50_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_50_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_50_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_50_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_50_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_50_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_50_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_50_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_50_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_50_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_50_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_50_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_50_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_50_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_50_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_50_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_50_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_50_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_50_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_50_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_50_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_50_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_50_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_50_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_50_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_50_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_50_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_50_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_50_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_50_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_50_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_50_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_50_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_50_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_50_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_50_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_50_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_50_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_50_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_50_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_50_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_50_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_50_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_50_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_50_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_50_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_50_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_50_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_50_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_50_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_50_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_50_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_50_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_50_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_50_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_50_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_50_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_50_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_50_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_50_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_50_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_50_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_50_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_50_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_50_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_50_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_50_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_50_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_50_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_50_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_50_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_50_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_50_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_50_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_50_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_50_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_50_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_50_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_50_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_50_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_50_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_50_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_50_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_50_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_50_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_50_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_50_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_50_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_50_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_50_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_50_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_50_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_50_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_50_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_50_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_50_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_50_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_50_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_50_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_50_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_50_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_50_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_50_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_50_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_50_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_50_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_50_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_50_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_50_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_50_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_50_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_50_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_50_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_50_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_50_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_50_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_50_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_50_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_50_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_50_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_50_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_50_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ op_e8c0_50_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8d0_50_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8e8_50_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f0_50_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e8f8_50_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f9_50_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fa_50_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fb_50_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e9c0_50_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9d0_50_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9e8_50_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f0_50_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_e9f8_50_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f9_50_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fa_50_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fb_50_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_eac0_50_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ead0_50_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eae8_50_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf0_50_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ op_eaf8_50_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf9_50_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ebc0_50_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebd0_50_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebe8_50_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf0_50_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ebf8_50_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf9_50_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfa_50_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfb_50_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ecc0_50_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecd0_50_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ece8_50_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf0_50_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ op_ecf8_50_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf9_50_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ op_edc0_50_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edd0_50_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_ede8_50_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf0_50_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_edf8_50_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf9_50_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfa_50_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfb_50_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_eec0_50_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eed0_50_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eee8_50_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef0_50_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ op_eef8_50_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef9_50_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ op_efc0_50_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efd0_50_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efe8_50_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff0_50_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ op_eff8_50_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff9_50_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ op_f000_50_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f008_50_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f010_50_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f018_50_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f020_50_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f028_50_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f030_50_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +{ op_f038_50_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f039_50_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f200_50_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f208_50_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f210_50_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f218_50_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f220_50_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f228_50_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f230_50_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f238_50_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f239_50_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23a_50_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23b_50_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23c_50_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f240_50_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f248_50_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ op_f250_50_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f258_50_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f260_50_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f268_50_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f270_50_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f278_50_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f279_50_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f27a_50_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27b_50_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27c_50_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f280_50_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f2c0_50_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f310_50_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f320_50_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f328_50_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f330_50_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f338_50_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f339_50_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f350_50_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f358_50_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f368_50_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f370_50_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f378_50_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f379_50_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37a_50_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37b_50_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f408_50_ff, NULL, 0xf408, -1, { 0, 0 }, 0 }, /* CINVL */ +{ op_f410_50_ff, NULL, 0xf410, -1, { 0, 0 }, 0 }, /* CINVP */ +{ op_f418_50_ff, NULL, 0xf418, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f419_50_ff, NULL, 0xf419, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41a_50_ff, NULL, 0xf41a, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41b_50_ff, NULL, 0xf41b, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41c_50_ff, NULL, 0xf41c, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41d_50_ff, NULL, 0xf41d, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41e_50_ff, NULL, 0xf41e, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f41f_50_ff, NULL, 0xf41f, -1, { 0, 0 }, 0 }, /* CINVA */ +{ op_f428_50_ff, NULL, 0xf428, -1, { 0, 0 }, 0 }, /* CPUSHL */ +{ op_f430_50_ff, NULL, 0xf430, -1, { 0, 0 }, 0 }, /* CPUSHP */ +{ op_f438_50_ff, NULL, 0xf438, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f439_50_ff, NULL, 0xf439, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43a_50_ff, NULL, 0xf43a, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43b_50_ff, NULL, 0xf43b, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43c_50_ff, NULL, 0xf43c, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43d_50_ff, NULL, 0xf43d, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43e_50_ff, NULL, 0xf43e, -1, { 0, 0 }, 0 }, /* CPUSHA */ +{ op_f43f_50_ff, NULL, 0xf43f, -1, { 0, 0 }, 0 }, /* CPUSHA */ +#ifndef CPUEMU_68000_ONLY +{ op_f500_51_ff, NULL, 0xf500, -1, { 0, 0 }, 0 }, /* PFLUSHN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f508_51_ff, NULL, 0xf508, -1, { 0, 0 }, 0 }, /* PFLUSH */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f510_51_ff, NULL, 0xf510, -1, { 0, 0 }, 0 }, /* PFLUSHAN */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f518_51_ff, NULL, 0xf518, -1, { 0, 0 }, 0 }, /* PFLUSHA */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f548_51_ff, NULL, 0xf548, -1, { 0, 0 }, 0 }, /* PTESTW */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_f568_51_ff, NULL, 0xf568, -1, { 0, 0 }, 0 }, /* PTESTR */ +#endif +{ op_f600_50_ff, NULL, 0xf600, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f608_50_ff, NULL, 0xf608, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f610_50_ff, NULL, 0xf610, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f618_50_ff, NULL, 0xf618, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ op_f620_50_ff, NULL, 0xf620, -1, { 0, 0 }, 0 }, /* MOVE16 */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_52[] = { +{ op_0000_50_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_50_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_50_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_50_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_50_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_50_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_50_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_50_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_52_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_50_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_50_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_50_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_50_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_50_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_50_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_50_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_50_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_52_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_50_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_50_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_50_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_50_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_50_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_50_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_50_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_50_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_00d0_50_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00e8_50_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f0_50_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_00f8_50_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f9_50_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fa_50_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fb_50_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0100_50_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_50_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_50_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_50_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_50_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_50_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_50_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_50_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_50_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_50_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_50_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_50_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_50_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_50_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_50_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_50_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_50_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_50_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_50_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_50_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_50_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_50_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_50_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_50_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_50_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_50_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_50_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_50_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_50_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_50_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_50_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_50_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_50_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_50_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_50_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_50_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_50_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_50_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_50_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_50_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_50_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_50_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_50_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_50_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_50_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_50_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_50_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_52_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_50_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_50_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_50_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_50_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_50_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_50_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_50_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_50_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_52_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_50_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_50_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_50_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_50_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_50_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_50_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_50_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_50_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_02d0_50_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02e8_50_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f0_50_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_02f8_50_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f9_50_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fa_50_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fb_50_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0400_50_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_50_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_50_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_50_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_50_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_50_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_50_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_50_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_50_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_50_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_50_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_50_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_50_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_50_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_50_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_50_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_50_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_50_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_50_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_50_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_50_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_50_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_50_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_50_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_04d0_50_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04e8_50_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f0_50_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_04f8_50_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f9_50_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fa_50_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fb_50_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0600_50_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_50_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_50_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_50_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_50_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_50_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_50_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_50_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_50_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_50_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_50_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_50_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_50_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_50_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_50_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_50_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_50_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_50_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_50_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_50_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_50_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_50_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_50_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_50_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_06c0_50_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06c8_50_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06d0_50_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06e8_50_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f0_50_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f8_50_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f9_50_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fa_50_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fb_50_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_0800_50_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_50_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_50_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_50_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_50_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_50_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_50_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_50_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_50_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_50_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_50_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_50_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_50_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_50_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_50_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_50_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_50_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_50_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_50_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_50_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_50_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_50_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_50_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_50_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_50_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_50_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_50_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_50_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_50_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_50_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_50_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_50_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_50_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_50_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_50_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_50_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_50_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_50_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_50_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_50_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_50_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_50_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_52_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_50_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_50_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_50_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_50_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_50_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_50_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_50_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_50_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_52_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_50_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_50_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_50_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_50_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_50_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_50_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_50_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_50_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +#ifndef CPUEMU_68000_ONLY +{ op_0ad0_52_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ad8_52_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae0_52_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ae8_52_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af0_52_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af8_52_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0af9_52_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +{ op_0c00_50_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_50_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_50_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_50_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_50_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_50_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_50_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_50_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3a_50_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3b_50_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c40_50_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_50_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_50_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_50_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_50_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_50_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_50_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_50_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7a_50_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7b_50_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c80_50_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_50_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_50_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_50_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_50_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_50_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_50_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_50_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0cba_50_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cbb_50_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +#ifndef CPUEMU_68000_ONLY +{ op_0cd0_52_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cd8_52_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce0_52_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ce8_52_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf0_52_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf8_52_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cf9_52_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0cfc_52_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e10_52_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e18_52_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e20_52_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e28_52_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e30_52_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e38_52_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e39_52_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e50_52_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e58_52_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e60_52_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e68_52_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e70_52_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e78_52_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e79_52_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e90_52_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0e98_52_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea0_52_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ea8_52_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_52_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb8_52_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0eb9_52_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed0_52_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ed8_52_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee0_52_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ee8_52_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef0_52_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef8_52_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0ef9_52_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +#endif +#ifndef CPUEMU_68000_ONLY +{ op_0efc_52_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +#endif +{ op_1000_50_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_50_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_50_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_50_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_50_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_50_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_50_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_50_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_50_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_50_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_50_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_50_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_50_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_50_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_50_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_50_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_50_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_50_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_50_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_50_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_50_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_50_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_50_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_50_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_50_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_50_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_50_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_50_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_50_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_50_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_50_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_50_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_50_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_50_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_50_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_50_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_50_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_50_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_50_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_50_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_50_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_50_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_50_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_50_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_50_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_50_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_50_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_50_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_50_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_50_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_50_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_50_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_50_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_50_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_50_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_50_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_50_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_50_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_50_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_50_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_50_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_50_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_50_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_50_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_50_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_50_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_50_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_50_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_50_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_50_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_50_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_50_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_50_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_50_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_50_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_50_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_50_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_50_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_50_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_50_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_50_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_50_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_50_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_50_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_50_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_50_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_50_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_50_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_50_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_50_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_50_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_50_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_50_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_50_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_50_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_50_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_50_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_50_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_50_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_50_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_50_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_50_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_50_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_50_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_50_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_50_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_50_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_50_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_50_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_50_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_50_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_50_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_50_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_50_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_50_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_50_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_50_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_50_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_50_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_50_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_50_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_50_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_50_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_50_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_50_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_50_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_50_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_50_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_50_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_50_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_50_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_50_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_50_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_50_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_50_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_50_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_50_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_50_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_50_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_50_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_50_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_50_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_50_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_50_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_50_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_50_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_50_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_50_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_50_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_50_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_50_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_50_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_50_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_50_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_50_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_50_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_50_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_50_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_50_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_50_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_50_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_50_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_50_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_50_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_50_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_50_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_50_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_50_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_50_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_50_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_50_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_50_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_50_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_50_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_50_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_50_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_50_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_50_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_50_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_50_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_50_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_50_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_50_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_50_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_50_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_50_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_50_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_50_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_50_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_50_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_50_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_50_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_50_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_50_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_50_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_50_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_50_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_50_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_50_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_50_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_50_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_50_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_50_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_50_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_50_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_50_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_50_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_50_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_50_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_50_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_50_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_50_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_50_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_50_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_50_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_50_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_50_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_50_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_50_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_50_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_50_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_50_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_50_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_50_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_50_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_50_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_50_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_50_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_50_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_50_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_50_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_50_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_50_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_50_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_50_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_50_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_50_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_50_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_50_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_50_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_50_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_50_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_50_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_50_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_50_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_50_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_50_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_50_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_50_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_50_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_50_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_50_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_50_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_50_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_50_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_50_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_50_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_50_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_50_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_50_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_50_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_50_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_50_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_50_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_50_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_50_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_50_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_50_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_50_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_50_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_50_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_50_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_50_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_50_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_50_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_50_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_50_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_50_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_50_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_50_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_50_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_50_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_50_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_50_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_50_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_50_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_50_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_50_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_50_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_50_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_50_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_50_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_50_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_50_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_50_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_50_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_50_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_50_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_50_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_50_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_50_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_50_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_50_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_50_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_50_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_50_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_50_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_50_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_50_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_50_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_50_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_50_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_50_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_50_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_50_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_50_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_50_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_50_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_50_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_50_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_50_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_50_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_50_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_50_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_50_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_50_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_50_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_50_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_50_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_50_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_50_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_50_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_50_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_50_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_50_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_50_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4100_50_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4110_50_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4118_50_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4120_50_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4128_50_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4130_50_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_4138_50_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4139_50_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_413a_50_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_413b_50_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_413c_50_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_4180_50_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_50_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_50_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_50_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_50_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_50_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_50_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_50_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_50_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_50_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_50_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_50_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_50_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_50_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_50_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_50_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_50_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_50_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_50_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_50_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_50_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_50_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_50_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_50_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_50_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_50_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_50_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_50_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_50_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_50_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_50_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_50_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_50_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_50_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_50_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_50_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_50_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_50_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_50_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_50_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_50_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_50_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_50_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_50_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_50_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_50_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_50_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f0_50_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_42f8_50_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_50_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_50_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_50_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_50_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_50_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_50_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_50_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_50_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_50_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_50_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_50_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_50_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_50_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_50_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_50_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_50_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_50_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_50_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_50_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_50_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_50_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_50_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_50_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_50_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_50_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_50_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_50_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_50_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_50_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_50_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_50_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_50_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_50_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_50_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_50_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_50_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_50_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_50_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_50_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_50_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_50_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_50_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_50_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_50_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_50_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_50_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_50_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_50_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_50_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_50_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_50_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_50_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_50_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_50_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_50_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_50_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_50_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_50_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_50_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_50_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_50_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_50_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_50_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_50_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_50_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_50_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_50_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_50_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_50_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_50_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_50_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_52_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4808_51_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +{ op_4810_52_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_52_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_52_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_52_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_52_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_52_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_52_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_50_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_50_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_50_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_50_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_50_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_50_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_50_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_50_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_50_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_50_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_52_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_52_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_52_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_52_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_52_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_52_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_50_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_52_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_52_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_52_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_52_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_52_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_52_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_49c0_50_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4a00_50_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_50_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_50_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_50_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_50_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_50_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_50_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_50_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a3a_50_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a3b_50_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a3c_50_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_50_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a48_50_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_50_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_50_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_50_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_50_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_50_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_50_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_50_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a7a_50_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a7b_50_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a7c_50_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_50_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a88_50_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_50_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_50_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_50_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_50_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_50_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_50_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_50_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4aba_50_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4abb_50_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4abc_50_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_50_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_50_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_50_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_50_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_50_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_50_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_50_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_50_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c00_50_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c10_50_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c18_50_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c20_50_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c28_50_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c30_50_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c38_50_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c39_50_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3a_50_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3b_50_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c3c_50_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c40_50_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c50_50_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c58_50_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c60_50_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c68_50_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c70_50_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c78_50_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c79_50_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7a_50_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7b_50_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c7c_50_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c90_52_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_52_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_52_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_52_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_52_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_52_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_52_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_52_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_52_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_52_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_52_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_52_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_52_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_52_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_52_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_52_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_50_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_51_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_50_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_52_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_50_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_50_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_52_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_52_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_52_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +#ifndef CPUEMU_68000_ONLY +{ op_4e74_52_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +#endif +{ op_4e75_52_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_50_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_52_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_50_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +#ifndef CPUEMU_68000_ONLY +{ op_4e7b_52_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +#endif +{ op_4e90_52_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_52_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_52_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_52_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_52_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_52_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_52_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_50_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_50_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_50_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_50_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_50_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_50_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_50_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_50_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_50_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_50_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_50_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_50_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_50_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_50_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_50_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_50_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_50_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_50_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_50_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_50_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_50_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_50_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_50_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_50_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_50_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_50_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_50_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_50_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_50_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_50_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_50_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_50_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_50_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_50_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_52_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_50_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_50_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_50_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_50_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_50_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_50_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_50_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_50fa_50_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fb_50_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fc_50_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5100_50_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_50_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_50_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_50_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_50_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_50_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_50_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_50_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_50_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_50_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_50_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_50_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_50_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_50_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_50_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_50_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_50_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_50_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_50_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_50_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_50_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_50_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_50_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_50_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_50_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_50_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_50_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_52_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_50_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_50_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_50_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_50_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_50_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_50_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_50_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_51fa_50_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fb_50_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fc_50_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52c0_50_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_52_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_50_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_50_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_50_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_50_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_50_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_50_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_50_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52fa_50_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fb_50_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fc_50_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53c0_50_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_52_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_50_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_50_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_50_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_50_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_50_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_50_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_50_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53fa_50_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fb_50_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fc_50_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54c0_50_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_52_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_50_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_50_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_50_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_50_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_50_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_50_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_50_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54fa_50_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fb_50_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fc_50_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55c0_50_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_52_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_50_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_50_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_50_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_50_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_50_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_50_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_50_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55fa_50_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fb_50_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fc_50_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56c0_50_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_52_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_50_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_50_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_50_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_50_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_50_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_50_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_50_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56fa_50_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fb_50_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fc_50_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57c0_50_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_52_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_50_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_50_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_50_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_50_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_50_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_50_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_50_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57fa_50_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fb_50_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fc_50_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58c0_50_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_52_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_50_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_50_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_50_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_50_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_50_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_50_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_50_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58fa_50_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fb_50_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fc_50_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59c0_50_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_52_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_50_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_50_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_50_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_50_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_50_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_50_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_50_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59fa_50_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fb_50_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fc_50_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ac0_50_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_52_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_50_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_50_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_50_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_50_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_50_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_50_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_50_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5afa_50_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afb_50_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afc_50_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bc0_50_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_52_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_50_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_50_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_50_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_50_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_50_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_50_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_50_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bfa_50_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfb_50_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfc_50_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cc0_50_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_52_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_50_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_50_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_50_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_50_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_50_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_50_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_50_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cfa_50_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfb_50_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfc_50_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dc0_50_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_52_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_50_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_50_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_50_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_50_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_50_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_50_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_50_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dfa_50_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfb_50_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfc_50_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ec0_50_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_52_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_50_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_50_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_50_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_50_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_50_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_50_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_50_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5efa_50_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efb_50_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efc_50_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5fc0_50_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_52_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_50_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_50_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_50_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_50_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_50_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_50_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_50_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ffa_50_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffb_50_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffc_50_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_6000_52_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_52_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_52_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_52_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_52_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_52_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_52_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_52_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_52_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_52_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_52_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_52_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_52_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_52_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_52_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_52_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_52_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_52_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_52_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_52_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_52_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_52_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_52_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_52_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_52_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_52_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_52_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_52_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_52_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_52_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_52_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_52_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_52_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_52_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_52_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_52_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_52_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_52_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_52_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_52_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_52_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_52_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_52_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_52_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_52_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_52_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_52_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_52_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_50_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_50_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_50_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_50_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_50_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_50_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_50_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_50_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_50_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_50_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_50_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_50_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_50_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_50_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_50_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_50_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_50_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_50_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_50_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_50_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_50_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_50_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_50_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_50_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_50_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_50_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_50_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_50_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_50_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_50_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_50_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_50_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_50_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_50_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_50_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_50_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_50_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_50_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_50_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_50_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_50_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_50_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_50_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_50_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_50_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_52_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_52_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_50_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_50_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_50_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_50_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_50_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_50_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_50_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8140_50_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8148_50_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8150_50_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_50_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_50_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_50_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_50_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_50_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_50_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8180_50_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8188_50_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8190_50_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_50_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_50_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_50_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_50_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_50_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_50_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_50_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_50_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_50_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_50_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_50_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_50_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_50_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_50_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_50_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_50_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_50_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_50_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_50_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_50_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_50_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_50_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_50_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_50_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_50_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_50_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_50_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_50_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_50_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_50_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_50_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_50_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_50_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_50_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_50_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_50_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_50_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_50_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_50_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_50_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_50_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_50_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_50_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_50_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_50_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_50_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_50_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_50_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_50_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_50_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_50_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_50_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_50_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_50_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_50_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_50_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_50_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_50_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_50_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_50_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_50_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_50_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_50_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_50_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_50_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_50_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_50_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_50_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_50_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_50_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_50_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_50_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_50_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_50_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_50_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_50_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_50_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_50_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_50_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_50_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_50_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_50_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_50_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_50_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_50_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_50_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_50_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_50_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_50_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_50_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_50_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_50_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_50_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_50_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_50_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_50_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_50_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_50_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_50_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_50_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_50_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_50_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_50_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_50_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_50_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_50_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_50_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_50_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_50_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_50_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_50_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_50_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_50_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_50_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_50_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_50_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_50_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_50_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_50_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_50_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_50_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_50_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_50_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_50_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_50_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_50_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_50_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_50_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_50_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_50_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_50_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_50_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_50_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_50_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_50_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_50_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_50_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_50_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_50_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_50_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_50_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_50_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_50_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_50_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_50_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_50_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_50_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_50_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_50_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_50_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_50_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_50_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_50_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_50_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_50_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_50_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_50_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_50_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_50_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_50_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_50_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_50_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_50_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_50_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_50_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_50_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_50_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_50_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_50_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_50_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_50_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_50_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_50_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_50_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_50_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_50_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_50_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_50_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_50_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_50_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_50_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_50_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_50_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_50_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_50_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_50_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_50_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_50_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_50_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_50_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_50_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_50_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_50_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_50_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_50_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_50_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_50_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_50_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_50_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_50_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_50_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_50_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_50_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_50_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_50_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_50_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_50_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_50_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_50_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_50_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_50_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_50_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_50_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_50_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_50_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_50_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_50_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_50_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_50_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_50_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_50_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_50_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_50_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_50_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_50_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_50_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_50_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_50_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_50_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_50_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_50_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_50_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_50_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_52_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_52_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_50_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_50_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_50_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_50_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_50_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_50_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_50_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_50_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_50_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_50_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_50_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_50_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_50_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_50_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_50_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_50_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_50_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_50_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_50_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_50_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_50_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_50_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_50_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_50_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_50_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_50_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_50_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_50_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_50_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_50_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_50_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_50_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_50_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_50_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_50_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_50_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_50_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_50_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_50_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_50_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_50_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_50_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_50_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_50_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_50_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_50_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_50_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_50_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_50_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_50_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_50_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_50_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_50_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_50_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_50_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_50_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_50_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_50_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_50_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_50_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_50_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_50_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_50_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_50_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_50_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_50_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_50_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_50_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_50_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_50_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_50_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_50_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_50_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_50_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_50_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_50_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_50_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_50_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_50_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_50_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_50_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_50_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_50_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_50_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_50_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_50_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_50_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_50_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_50_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_50_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_50_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_50_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_50_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_50_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_50_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_50_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_50_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_50_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_50_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_50_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_50_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_50_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_50_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_50_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_50_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_50_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_50_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_50_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_50_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_50_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_50_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_50_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_50_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_50_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_50_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_50_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_50_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_50_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_50_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_50_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_50_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_50_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_50_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_50_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_50_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_50_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_50_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_50_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_50_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_50_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_50_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_50_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_50_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_50_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_50_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_50_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_50_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_50_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_50_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_50_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_50_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_50_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_50_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_50_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_50_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_50_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_50_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_50_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_50_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_50_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_50_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_50_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_50_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_50_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_50_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_50_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_50_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_50_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_50_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_50_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_50_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_50_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_50_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_50_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_50_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_50_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_50_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_50_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_50_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_50_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_50_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_50_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_50_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_50_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_50_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_50_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_50_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_50_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_50_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_50_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_50_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_50_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_50_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_50_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_50_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_50_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_50_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_50_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_50_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_50_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_50_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_50_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_50_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_50_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_50_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_50_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_50_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_50_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_50_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_50_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_50_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_50_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_50_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_50_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_50_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_50_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_50_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_50_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_50_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_50_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_50_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_50_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_50_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_50_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_50_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_50_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_50_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_50_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_50_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_50_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_50_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_50_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_50_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_50_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_50_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ op_e8c0_50_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8d0_50_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8e8_50_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f0_50_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e8f8_50_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f9_50_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fa_50_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fb_50_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e9c0_50_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9d0_50_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9e8_50_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f0_50_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_e9f8_50_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f9_50_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fa_50_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fb_50_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_eac0_50_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ead0_50_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eae8_50_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf0_50_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ op_eaf8_50_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf9_50_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ebc0_50_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebd0_50_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebe8_50_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf0_50_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ebf8_50_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf9_50_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfa_50_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfb_50_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ecc0_50_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecd0_50_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ece8_50_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf0_50_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ op_ecf8_50_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf9_50_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ op_edc0_50_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edd0_50_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_ede8_50_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf0_50_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_edf8_50_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf9_50_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfa_50_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfb_50_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_eec0_50_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eed0_50_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eee8_50_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef0_50_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ op_eef8_50_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef9_50_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ op_efc0_50_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efd0_50_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efe8_50_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff0_50_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ op_eff8_50_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff9_50_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ op_f000_50_ff, NULL, 0xf000, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f008_50_ff, NULL, 0xf008, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f010_50_ff, NULL, 0xf010, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f018_50_ff, NULL, 0xf018, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f020_50_ff, NULL, 0xf020, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f028_50_ff, NULL, 0xf028, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f030_50_ff, NULL, 0xf030, -1, { -3, 0 }, 0 }, /* MMUOP030 */ +{ op_f038_50_ff, NULL, 0xf038, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f039_50_ff, NULL, 0xf039, -1, { 0, 0 }, 0 }, /* MMUOP030 */ +{ op_f200_50_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f208_50_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f210_50_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f218_50_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f220_50_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f228_50_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f230_50_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f238_50_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f239_50_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23a_50_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23b_50_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23c_50_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f240_50_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f248_50_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ op_f250_50_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f258_50_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f260_50_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f268_50_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f270_50_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f278_50_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f279_50_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f27a_50_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27b_50_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27c_50_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f280_50_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f2c0_50_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f310_50_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f320_50_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f328_50_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f330_50_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f338_50_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f339_50_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f350_50_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f358_50_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f368_50_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f370_50_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f378_50_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f379_50_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37a_50_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37b_50_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_53[] = { +{ op_0000_50_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_50_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_50_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_50_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_50_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_50_ff, NULL, 0x0030, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0038_50_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_50_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_53_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_50_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_50_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_50_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_50_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_50_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_50_ff, NULL, 0x0070, 4, { 2, 0 }, 0 }, /* OR */ +{ op_0078_50_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_50_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_53_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_50_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_50_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_50_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_50_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_50_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_50_ff, NULL, 0x00b0, 6, { 2, 0 }, 0 }, /* OR */ +{ op_00b8_50_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_50_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_00d0_50_ff, NULL, 0x00d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00e8_50_ff, NULL, 0x00e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f0_50_ff, NULL, 0x00f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_00f8_50_ff, NULL, 0x00f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00f9_50_ff, NULL, 0x00f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fa_50_ff, NULL, 0x00fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_00fb_50_ff, NULL, 0x00fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0100_50_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_50_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_50_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_50_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_50_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_50_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_50_ff, NULL, 0x0130, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_0138_50_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_50_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_50_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_50_ff, NULL, 0x013b, 2, { 2, 0 }, 0 }, /* BTST */ +{ op_013c_50_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_50_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_50_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_50_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_50_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_50_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_50_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_50_ff, NULL, 0x0170, 2, { 2, 0 }, 0 }, /* BCHG */ +{ op_0178_50_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_50_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_50_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_50_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_50_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_50_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_50_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_50_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_50_ff, NULL, 0x01b0, 2, { 2, 0 }, 0 }, /* BCLR */ +{ op_01b8_50_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_50_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_50_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_50_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_50_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_50_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_50_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_50_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_50_ff, NULL, 0x01f0, 2, { 2, 0 }, 0 }, /* BSET */ +{ op_01f8_50_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_50_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_50_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_50_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_50_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_50_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_50_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_50_ff, NULL, 0x0230, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0238_50_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_50_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_53_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_50_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_50_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_50_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_50_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_50_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_50_ff, NULL, 0x0270, 4, { 2, 0 }, 0 }, /* AND */ +{ op_0278_50_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_50_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_53_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_50_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_50_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_50_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_50_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_50_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_50_ff, NULL, 0x02b0, 6, { 2, 0 }, 0 }, /* AND */ +{ op_02b8_50_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_50_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_02d0_50_ff, NULL, 0x02d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02e8_50_ff, NULL, 0x02e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f0_50_ff, NULL, 0x02f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_02f8_50_ff, NULL, 0x02f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02f9_50_ff, NULL, 0x02f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fa_50_ff, NULL, 0x02fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_02fb_50_ff, NULL, 0x02fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0400_50_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_50_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_50_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_50_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_50_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_50_ff, NULL, 0x0430, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0438_50_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_50_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_50_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_50_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_50_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_50_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_50_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_50_ff, NULL, 0x0470, 4, { 2, 0 }, 0 }, /* SUB */ +{ op_0478_50_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_50_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_50_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_50_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_50_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_50_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_50_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_50_ff, NULL, 0x04b0, 6, { 2, 0 }, 0 }, /* SUB */ +{ op_04b8_50_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_50_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_04d0_50_ff, NULL, 0x04d0, 4, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04e8_50_ff, NULL, 0x04e8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f0_50_ff, NULL, 0x04f0, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_04f8_50_ff, NULL, 0x04f8, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04f9_50_ff, NULL, 0x04f9, 8, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fa_50_ff, NULL, 0x04fa, 6, { 0, 0 }, 0 }, /* CHK2 */ +{ op_04fb_50_ff, NULL, 0x04fb, 4, { 2, 0 }, 0 }, /* CHK2 */ +{ op_0600_50_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_50_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_50_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_50_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_50_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_50_ff, NULL, 0x0630, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0638_50_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_50_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_50_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_50_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_50_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_50_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_50_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_50_ff, NULL, 0x0670, 4, { 2, 0 }, 0 }, /* ADD */ +{ op_0678_50_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_50_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_50_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_50_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_50_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_50_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_50_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_50_ff, NULL, 0x06b0, 6, { 2, 0 }, 0 }, /* ADD */ +{ op_06b8_50_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_50_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_06c0_50_ff, NULL, 0x06c0, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06c8_50_ff, NULL, 0x06c8, 2, { 0, 0 }, 0 }, /* RTM */ +{ op_06d0_50_ff, NULL, 0x06d0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06e8_50_ff, NULL, 0x06e8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f0_50_ff, NULL, 0x06f0, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f8_50_ff, NULL, 0x06f8, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06f9_50_ff, NULL, 0x06f9, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fa_50_ff, NULL, 0x06fa, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_06fb_50_ff, NULL, 0x06fb, 2, { 0, 0 }, 0 }, /* CALLM */ +{ op_0800_50_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_50_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_50_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_50_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_50_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_50_ff, NULL, 0x0830, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0838_50_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_50_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_50_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_50_ff, NULL, 0x083b, 4, { 2, 0 }, 0 }, /* BTST */ +{ op_0840_50_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_50_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_50_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_50_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_50_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_50_ff, NULL, 0x0870, 4, { 2, 0 }, 0 }, /* BCHG */ +{ op_0878_50_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_50_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_50_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_50_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_50_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_50_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_50_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_50_ff, NULL, 0x08b0, 4, { 2, 0 }, 0 }, /* BCLR */ +{ op_08b8_50_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_50_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_50_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_50_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_50_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_50_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_50_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_50_ff, NULL, 0x08f0, 4, { 2, 0 }, 0 }, /* BSET */ +{ op_08f8_50_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_50_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_50_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_50_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_50_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_50_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_50_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_50_ff, NULL, 0x0a30, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a38_50_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_50_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_53_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_50_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_50_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_50_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_50_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_50_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_50_ff, NULL, 0x0a70, 4, { 2, 0 }, 0 }, /* EOR */ +{ op_0a78_50_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_50_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_53_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_50_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_50_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_50_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_50_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_50_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_50_ff, NULL, 0x0ab0, 6, { 2, 0 }, 0 }, /* EOR */ +{ op_0ab8_50_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_50_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0ad0_52_ff, NULL, 0x0ad0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ad8_52_ff, NULL, 0x0ad8, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ae0_52_ff, NULL, 0x0ae0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ae8_52_ff, NULL, 0x0ae8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0af0_52_ff, NULL, 0x0af0, 4, { 2, 0 }, 0 }, /* CAS */ +{ op_0af8_52_ff, NULL, 0x0af8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0af9_52_ff, NULL, 0x0af9, 8, { 0, 0 }, 0 }, /* CAS */ +{ op_0c00_50_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_50_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_50_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_50_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_50_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_50_ff, NULL, 0x0c30, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c38_50_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_50_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3a_50_ff, NULL, 0x0c3a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c3b_50_ff, NULL, 0x0c3b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c40_50_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_50_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_50_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_50_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_50_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_50_ff, NULL, 0x0c70, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c78_50_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_50_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7a_50_ff, NULL, 0x0c7a, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c7b_50_ff, NULL, 0x0c7b, 4, { 2, 0 }, 0 }, /* CMP */ +{ op_0c80_50_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_50_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_50_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_50_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_50_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_50_ff, NULL, 0x0cb0, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cb8_50_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_50_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0cba_50_ff, NULL, 0x0cba, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cbb_50_ff, NULL, 0x0cbb, 6, { 2, 0 }, 0 }, /* CMP */ +{ op_0cd0_52_ff, NULL, 0x0cd0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0cd8_52_ff, NULL, 0x0cd8, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ce0_52_ff, NULL, 0x0ce0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ce8_52_ff, NULL, 0x0ce8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0cf0_52_ff, NULL, 0x0cf0, 4, { 2, 0 }, 0 }, /* CAS */ +{ op_0cf8_52_ff, NULL, 0x0cf8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0cf9_52_ff, NULL, 0x0cf9, 8, { 0, 0 }, 0 }, /* CAS */ +{ op_0cfc_52_ff, NULL, 0x0cfc, 6, { 0, 0 }, 0 }, /* CAS2 */ +{ op_0e10_52_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e18_52_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e20_52_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e28_52_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e30_52_ff, NULL, 0x0e30, 4, { 2, 2 }, 0 }, /* MOVES */ +{ op_0e38_52_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e39_52_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e50_52_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e58_52_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e60_52_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e68_52_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e70_52_ff, NULL, 0x0e70, 4, { 2, 2 }, 0 }, /* MOVES */ +{ op_0e78_52_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e79_52_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e90_52_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e98_52_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea0_52_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea8_52_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0eb0_52_ff, NULL, 0x0eb0, 4, { 2, 2 }, 0 }, /* MOVES */ +{ op_0eb8_52_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0eb9_52_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ed0_52_ff, NULL, 0x0ed0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ed8_52_ff, NULL, 0x0ed8, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ee0_52_ff, NULL, 0x0ee0, 4, { 0, 0 }, 0 }, /* CAS */ +{ op_0ee8_52_ff, NULL, 0x0ee8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0ef0_52_ff, NULL, 0x0ef0, 4, { 2, 0 }, 0 }, /* CAS */ +{ op_0ef8_52_ff, NULL, 0x0ef8, 6, { 0, 0 }, 0 }, /* CAS */ +{ op_0ef9_52_ff, NULL, 0x0ef9, 8, { 0, 0 }, 0 }, /* CAS */ +{ op_0efc_52_ff, NULL, 0x0efc, 6, { 0, 0 }, 0 }, /* CAS2 */ +{ op_1000_50_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_50_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_50_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_50_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_50_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_50_ff, NULL, 0x1030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1038_50_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_50_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_50_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_50_ff, NULL, 0x103b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_103c_50_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_50_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_50_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_50_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_50_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_50_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_50_ff, NULL, 0x10b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10b8_50_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_50_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_50_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_50_ff, NULL, 0x10bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10bc_50_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_50_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_50_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_50_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_50_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_50_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_50_ff, NULL, 0x10f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10f8_50_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_50_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_50_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_50_ff, NULL, 0x10fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_10fc_50_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_50_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_50_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_50_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_50_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_50_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_50_ff, NULL, 0x1130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1138_50_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_50_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_50_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_50_ff, NULL, 0x113b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_113c_50_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_50_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_50_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_50_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_50_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_50_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_50_ff, NULL, 0x1170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1178_50_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_50_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_50_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_50_ff, NULL, 0x117b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_117c_50_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_50_ff, NULL, 0x1180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1190_50_ff, NULL, 0x1190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_1198_50_ff, NULL, 0x1198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a0_50_ff, NULL, 0x11a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_11a8_50_ff, NULL, 0x11a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b0_50_ff, NULL, 0x11b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11b8_50_ff, NULL, 0x11b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11b9_50_ff, NULL, 0x11b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_11ba_50_ff, NULL, 0x11ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11bb_50_ff, NULL, 0x11bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_11bc_50_ff, NULL, 0x11bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_11c0_50_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_50_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_50_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_50_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_50_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_50_ff, NULL, 0x11f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11f8_50_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_50_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_50_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_50_ff, NULL, 0x11fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11fc_50_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_50_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_50_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_50_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_50_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_50_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_50_ff, NULL, 0x13f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13f8_50_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_50_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_50_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_50_ff, NULL, 0x13fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_13fc_50_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_50_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_50_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_50_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_50_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_50_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_50_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_50_ff, NULL, 0x2030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2038_50_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_50_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_50_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_50_ff, NULL, 0x203b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_203c_50_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_50_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_50_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_50_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_50_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_50_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_50_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_50_ff, NULL, 0x2070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_2078_50_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_50_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_50_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_50_ff, NULL, 0x207b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_207c_50_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_50_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_50_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_50_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_50_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_50_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_50_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_50_ff, NULL, 0x20b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20b8_50_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_50_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_50_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_50_ff, NULL, 0x20bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20bc_50_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_50_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_50_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_50_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_50_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_50_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_50_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_50_ff, NULL, 0x20f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20f8_50_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_50_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_50_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_50_ff, NULL, 0x20fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_20fc_50_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_50_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_50_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_50_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_50_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_50_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_50_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_50_ff, NULL, 0x2130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2138_50_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_50_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_50_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_50_ff, NULL, 0x213b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_213c_50_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_50_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_50_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_50_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_50_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_50_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_50_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_50_ff, NULL, 0x2170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2178_50_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_50_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_50_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_50_ff, NULL, 0x217b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_217c_50_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_50_ff, NULL, 0x2180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2188_50_ff, NULL, 0x2188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2190_50_ff, NULL, 0x2190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_2198_50_ff, NULL, 0x2198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a0_50_ff, NULL, 0x21a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_21a8_50_ff, NULL, 0x21a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b0_50_ff, NULL, 0x21b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21b8_50_ff, NULL, 0x21b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21b9_50_ff, NULL, 0x21b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21ba_50_ff, NULL, 0x21ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_21bb_50_ff, NULL, 0x21bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_21bc_50_ff, NULL, 0x21bc, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_21c0_50_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_50_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_50_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_50_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_50_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_50_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_50_ff, NULL, 0x21f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21f8_50_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_50_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_50_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_50_ff, NULL, 0x21fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21fc_50_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_50_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_50_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_50_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_50_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_50_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_50_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_50_ff, NULL, 0x23f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23f8_50_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_50_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_50_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_50_ff, NULL, 0x23fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_23fc_50_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_50_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_50_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_50_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_50_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_50_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_50_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_50_ff, NULL, 0x3030, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3038_50_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_50_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_50_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_50_ff, NULL, 0x303b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_303c_50_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_50_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_50_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_50_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_50_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_50_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_50_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_50_ff, NULL, 0x3070, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_3078_50_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_50_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_50_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_50_ff, NULL, 0x307b, 2, { 2, 0 }, 0 }, /* MOVEA */ +{ op_307c_50_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_50_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_50_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_50_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_50_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_50_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_50_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_50_ff, NULL, 0x30b0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30b8_50_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_50_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_50_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_50_ff, NULL, 0x30bb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30bc_50_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_50_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_50_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_50_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_50_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_50_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_50_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_50_ff, NULL, 0x30f0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30f8_50_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_50_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_50_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_50_ff, NULL, 0x30fb, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_30fc_50_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_50_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_50_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_50_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_50_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_50_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_50_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_50_ff, NULL, 0x3130, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3138_50_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_50_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_50_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_50_ff, NULL, 0x313b, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_313c_50_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_50_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_50_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_50_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_50_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_50_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_50_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_50_ff, NULL, 0x3170, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3178_50_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_50_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_50_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_50_ff, NULL, 0x317b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_317c_50_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_50_ff, NULL, 0x3180, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3188_50_ff, NULL, 0x3188, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3190_50_ff, NULL, 0x3190, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_3198_50_ff, NULL, 0x3198, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a0_50_ff, NULL, 0x31a0, 2, { 2, 0 }, 0 }, /* MOVE */ +{ op_31a8_50_ff, NULL, 0x31a8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b0_50_ff, NULL, 0x31b0, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31b8_50_ff, NULL, 0x31b8, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31b9_50_ff, NULL, 0x31b9, 6, { 2, 0 }, 0 }, /* MOVE */ +{ op_31ba_50_ff, NULL, 0x31ba, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31bb_50_ff, NULL, 0x31bb, 2, { 2, 2 }, 0 }, /* MOVE */ +{ op_31bc_50_ff, NULL, 0x31bc, 4, { 2, 0 }, 0 }, /* MOVE */ +{ op_31c0_50_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_50_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_50_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_50_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_50_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_50_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_50_ff, NULL, 0x31f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31f8_50_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_50_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_50_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_50_ff, NULL, 0x31fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31fc_50_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_50_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_50_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_50_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_50_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_50_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_50_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_50_ff, NULL, 0x33f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33f8_50_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_50_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_50_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_50_ff, NULL, 0x33fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_33fc_50_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_50_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_50_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_50_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_50_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_50_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_50_ff, NULL, 0x4030, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4038_50_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_50_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_50_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_50_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_50_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_50_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_50_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_50_ff, NULL, 0x4070, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_4078_50_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_50_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_50_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_50_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_50_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_50_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_50_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_50_ff, NULL, 0x40b0, 2, { 2, 0 }, 0 }, /* NEGX */ +{ op_40b8_50_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_50_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_50_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_50_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_50_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_50_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_50_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_50_ff, NULL, 0x40f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_50_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_50_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4100_50_ff, NULL, 0x4100, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4110_50_ff, NULL, 0x4110, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4118_50_ff, NULL, 0x4118, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4120_50_ff, NULL, 0x4120, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4128_50_ff, NULL, 0x4128, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4130_50_ff, NULL, 0x4130, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_4138_50_ff, NULL, 0x4138, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_4139_50_ff, NULL, 0x4139, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_413a_50_ff, NULL, 0x413a, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_413b_50_ff, NULL, 0x413b, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_413c_50_ff, NULL, 0x413c, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_4180_50_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_50_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_50_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_50_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_50_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_50_ff, NULL, 0x41b0, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41b8_50_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_50_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_50_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_50_ff, NULL, 0x41bb, 2, { 2, 0 }, 0 }, /* CHK */ +{ op_41bc_50_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_50_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_50_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_50_ff, NULL, 0x41f0, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_41f8_50_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_50_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_50_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_50_ff, NULL, 0x41fb, 2, { 2, 0 }, 0 }, /* LEA */ +{ op_4200_50_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_50_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_50_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_50_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_50_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_50_ff, NULL, 0x4230, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4238_50_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_50_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_50_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_50_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_50_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_50_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_50_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_50_ff, NULL, 0x4270, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_4278_50_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_50_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_50_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_50_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_50_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_50_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_50_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_50_ff, NULL, 0x42b0, 2, { 2, 0 }, 0 }, /* CLR */ +{ op_42b8_50_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_50_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_50_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_50_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_50_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_50_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_50_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f0_50_ff, NULL, 0x42f0, 2, { 2, 0 }, 0 }, /* MVSR2 */ +{ op_42f8_50_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_50_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_50_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_50_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_50_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_50_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_50_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_50_ff, NULL, 0x4430, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4438_50_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_50_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_50_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_50_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_50_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_50_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_50_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_50_ff, NULL, 0x4470, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_4478_50_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_50_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_50_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_50_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_50_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_50_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_50_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_50_ff, NULL, 0x44b0, 2, { 2, 0 }, 0 }, /* NEG */ +{ op_44b8_50_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_50_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_50_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_50_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_50_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_50_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_50_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_50_ff, NULL, 0x44f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44f8_50_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_50_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_50_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_50_ff, NULL, 0x44fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_44fc_50_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_50_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_50_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_50_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_50_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_50_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_50_ff, NULL, 0x4630, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4638_50_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_50_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_50_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_50_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_50_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_50_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_50_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_50_ff, NULL, 0x4670, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_4678_50_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_50_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_50_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_50_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_50_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_50_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_50_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_50_ff, NULL, 0x46b0, 2, { 2, 0 }, 0 }, /* NOT */ +{ op_46b8_50_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_50_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_50_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_50_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_50_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_50_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_50_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_50_ff, NULL, 0x46f0, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46f8_50_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_50_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_50_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_50_ff, NULL, 0x46fb, 2, { 2, 0 }, 0 }, /* MV2SR */ +{ op_46fc_50_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_52_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4808_51_ff, NULL, 0x4808, 6, { 0, 0 }, 0 }, /* LINK */ +{ op_4810_52_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_52_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_52_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_52_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_52_ff, NULL, 0x4830, 2, { 2, 0 }, 0 }, /* NBCD */ +{ op_4838_52_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_52_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_50_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_50_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_50_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_50_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_50_ff, NULL, 0x4870, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4878_50_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_50_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_50_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_50_ff, NULL, 0x487b, 2, { 2, 0 }, 0 }, /* PEA */ +{ op_4880_50_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_52_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_52_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_52_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_52_ff, NULL, 0x48b0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48b8_52_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_52_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_50_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_52_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_52_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_52_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_52_ff, NULL, 0x48f0, 4, { 2, 0 }, 0 }, /* MVMLE */ +{ op_48f8_52_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_52_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_49c0_50_ff, NULL, 0x49c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4a00_50_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_50_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_50_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_50_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_50_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_50_ff, NULL, 0x4a30, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a38_50_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_50_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a3a_50_ff, NULL, 0x4a3a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a3b_50_ff, NULL, 0x4a3b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a3c_50_ff, NULL, 0x4a3c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_50_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a48_50_ff, NULL, 0x4a48, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_50_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_50_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_50_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_50_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_50_ff, NULL, 0x4a70, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a78_50_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_50_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a7a_50_ff, NULL, 0x4a7a, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a7b_50_ff, NULL, 0x4a7b, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4a7c_50_ff, NULL, 0x4a7c, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_50_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a88_50_ff, NULL, 0x4a88, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_50_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_50_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_50_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_50_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_50_ff, NULL, 0x4ab0, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4ab8_50_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_50_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4aba_50_ff, NULL, 0x4aba, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4abb_50_ff, NULL, 0x4abb, 2, { 2, 0 }, 0 }, /* TST */ +{ op_4abc_50_ff, NULL, 0x4abc, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_50_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_50_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_50_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_50_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_50_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_50_ff, NULL, 0x4af0, 2, { 2, 0 }, 0 }, /* TAS */ +{ op_4af8_50_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_50_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c00_50_ff, NULL, 0x4c00, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c10_50_ff, NULL, 0x4c10, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c18_50_ff, NULL, 0x4c18, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c20_50_ff, NULL, 0x4c20, 4, { 0, 0 }, 0 }, /* MULL */ +{ op_4c28_50_ff, NULL, 0x4c28, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c30_50_ff, NULL, 0x4c30, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c38_50_ff, NULL, 0x4c38, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c39_50_ff, NULL, 0x4c39, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3a_50_ff, NULL, 0x4c3a, 6, { 0, 0 }, 0 }, /* MULL */ +{ op_4c3b_50_ff, NULL, 0x4c3b, 4, { 2, 0 }, 0 }, /* MULL */ +{ op_4c3c_50_ff, NULL, 0x4c3c, 8, { 0, 0 }, 0 }, /* MULL */ +{ op_4c40_50_ff, NULL, 0x4c40, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c50_50_ff, NULL, 0x4c50, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c58_50_ff, NULL, 0x4c58, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c60_50_ff, NULL, 0x4c60, 4, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c68_50_ff, NULL, 0x4c68, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c70_50_ff, NULL, 0x4c70, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c78_50_ff, NULL, 0x4c78, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c79_50_ff, NULL, 0x4c79, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7a_50_ff, NULL, 0x4c7a, 6, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c7b_50_ff, NULL, 0x4c7b, 4, { 2, 0 }, 0 }, /* DIVL */ +{ op_4c7c_50_ff, NULL, 0x4c7c, 8, { 0, 0 }, 0 }, /* DIVL */ +{ op_4c90_52_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_52_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_52_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_52_ff, NULL, 0x4cb0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_52_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_52_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_52_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_52_ff, NULL, 0x4cbb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_52_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_52_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_52_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_52_ff, NULL, 0x4cf0, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_52_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_52_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_52_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_52_ff, NULL, 0x4cfb, 4, { 2, 0 }, 0 }, /* MVMEL */ +{ op_4e40_50_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_51_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_50_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_52_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_50_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_50_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_52_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_53_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_53_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e74_52_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ op_4e75_52_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_50_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_53_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_50_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +{ op_4e7b_52_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +{ op_4e90_52_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_52_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_52_ff, NULL, 0x4eb0, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4eb8_52_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_52_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_52_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_52_ff, NULL, 0x4ebb, 2, { 2, 0 }, 1 }, /* JSR */ +{ op_4ed0_50_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_50_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_50_ff, NULL, 0x4ef0, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_4ef8_50_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_50_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_50_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_50_ff, NULL, 0x4efb, 2, { 2, 0 }, 1 }, /* JMP */ +{ op_5000_50_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_50_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_50_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_50_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_50_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_50_ff, NULL, 0x5030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5038_50_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_50_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_50_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_50_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_50_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_50_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_50_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_50_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_50_ff, NULL, 0x5070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_5078_50_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_50_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_50_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_50_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_50_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_50_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_50_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_50_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_50_ff, NULL, 0x50b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_50b8_50_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_50_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_50_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_52_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_50_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_50_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_50_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_50_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_50_ff, NULL, 0x50f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_50f8_50_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_50_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_50fa_50_ff, NULL, 0x50fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fb_50_ff, NULL, 0x50fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_50fc_50_ff, NULL, 0x50fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5100_50_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_50_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_50_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_50_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_50_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_50_ff, NULL, 0x5130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5138_50_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_50_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_50_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_50_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_50_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_50_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_50_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_50_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_50_ff, NULL, 0x5170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_5178_50_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_50_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_50_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_50_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_50_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_50_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_50_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_50_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_50_ff, NULL, 0x51b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_51b8_50_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_50_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_50_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_52_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_50_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_50_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_50_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_50_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_50_ff, NULL, 0x51f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_51f8_50_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_50_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_51fa_50_ff, NULL, 0x51fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fb_50_ff, NULL, 0x51fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_51fc_50_ff, NULL, 0x51fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52c0_50_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_52_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_50_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_50_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_50_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_50_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_50_ff, NULL, 0x52f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_52f8_50_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_50_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52fa_50_ff, NULL, 0x52fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fb_50_ff, NULL, 0x52fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_52fc_50_ff, NULL, 0x52fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53c0_50_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_52_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_50_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_50_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_50_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_50_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_50_ff, NULL, 0x53f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_53f8_50_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_50_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53fa_50_ff, NULL, 0x53fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fb_50_ff, NULL, 0x53fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_53fc_50_ff, NULL, 0x53fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54c0_50_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_52_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_50_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_50_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_50_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_50_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_50_ff, NULL, 0x54f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_54f8_50_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_50_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54fa_50_ff, NULL, 0x54fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fb_50_ff, NULL, 0x54fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_54fc_50_ff, NULL, 0x54fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55c0_50_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_52_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_50_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_50_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_50_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_50_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_50_ff, NULL, 0x55f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_55f8_50_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_50_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55fa_50_ff, NULL, 0x55fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fb_50_ff, NULL, 0x55fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_55fc_50_ff, NULL, 0x55fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56c0_50_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_52_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_50_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_50_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_50_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_50_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_50_ff, NULL, 0x56f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_56f8_50_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_50_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56fa_50_ff, NULL, 0x56fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fb_50_ff, NULL, 0x56fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_56fc_50_ff, NULL, 0x56fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57c0_50_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_52_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_50_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_50_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_50_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_50_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_50_ff, NULL, 0x57f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_57f8_50_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_50_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57fa_50_ff, NULL, 0x57fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fb_50_ff, NULL, 0x57fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_57fc_50_ff, NULL, 0x57fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58c0_50_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_52_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_50_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_50_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_50_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_50_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_50_ff, NULL, 0x58f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_58f8_50_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_50_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58fa_50_ff, NULL, 0x58fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fb_50_ff, NULL, 0x58fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_58fc_50_ff, NULL, 0x58fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59c0_50_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_52_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_50_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_50_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_50_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_50_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_50_ff, NULL, 0x59f0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_59f8_50_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_50_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59fa_50_ff, NULL, 0x59fa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fb_50_ff, NULL, 0x59fb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_59fc_50_ff, NULL, 0x59fc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ac0_50_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_52_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_50_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_50_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_50_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_50_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_50_ff, NULL, 0x5af0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5af8_50_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_50_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5afa_50_ff, NULL, 0x5afa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afb_50_ff, NULL, 0x5afb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5afc_50_ff, NULL, 0x5afc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bc0_50_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_52_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_50_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_50_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_50_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_50_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_50_ff, NULL, 0x5bf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5bf8_50_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_50_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bfa_50_ff, NULL, 0x5bfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfb_50_ff, NULL, 0x5bfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5bfc_50_ff, NULL, 0x5bfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cc0_50_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_52_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_50_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_50_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_50_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_50_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_50_ff, NULL, 0x5cf0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5cf8_50_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_50_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cfa_50_ff, NULL, 0x5cfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfb_50_ff, NULL, 0x5cfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5cfc_50_ff, NULL, 0x5cfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dc0_50_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_52_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_50_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_50_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_50_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_50_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_50_ff, NULL, 0x5df0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5df8_50_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_50_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dfa_50_ff, NULL, 0x5dfa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfb_50_ff, NULL, 0x5dfb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5dfc_50_ff, NULL, 0x5dfc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ec0_50_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_52_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_50_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_50_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_50_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_50_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_50_ff, NULL, 0x5ef0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ef8_50_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_50_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5efa_50_ff, NULL, 0x5efa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efb_50_ff, NULL, 0x5efb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5efc_50_ff, NULL, 0x5efc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5fc0_50_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_52_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_50_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_50_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_50_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_50_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_50_ff, NULL, 0x5ff0, 2, { 2, 0 }, 0 }, /* Scc */ +{ op_5ff8_50_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_50_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ffa_50_ff, NULL, 0x5ffa, 4, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffb_50_ff, NULL, 0x5ffb, 6, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_5ffc_50_ff, NULL, 0x5ffc, 2, { 0, 0 }, 0 }, /* TRAPcc */ +{ op_6000_52_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_52_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_52_ff, NULL, 0x60ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6100_52_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_52_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_52_ff, NULL, 0x61ff, 6, { 0, 0 }, 3 }, /* BSR */ +{ op_6200_52_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_52_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_52_ff, NULL, 0x62ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6300_52_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_52_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_52_ff, NULL, 0x63ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6400_52_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_52_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_52_ff, NULL, 0x64ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6500_52_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_52_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_52_ff, NULL, 0x65ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6600_52_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_52_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_52_ff, NULL, 0x66ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6700_52_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_52_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_52_ff, NULL, 0x67ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6800_52_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_52_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_52_ff, NULL, 0x68ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6900_52_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_52_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_52_ff, NULL, 0x69ff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6a00_52_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_52_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_52_ff, NULL, 0x6aff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6b00_52_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_52_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_52_ff, NULL, 0x6bff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6c00_52_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_52_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_52_ff, NULL, 0x6cff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6d00_52_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_52_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_52_ff, NULL, 0x6dff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6e00_52_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_52_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_52_ff, NULL, 0x6eff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_6f00_52_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_52_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_52_ff, NULL, 0x6fff, 6, { 0, 0 }, -3 }, /* Bcc */ +{ op_7000_50_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_50_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_50_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_50_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_50_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_50_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_50_ff, NULL, 0x8030, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8038_50_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_50_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_50_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_50_ff, NULL, 0x803b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_803c_50_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_50_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_50_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_50_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_50_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_50_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_50_ff, NULL, 0x8070, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8078_50_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_50_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_50_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_50_ff, NULL, 0x807b, 2, { 2, 0 }, 0 }, /* OR */ +{ op_807c_50_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_50_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_50_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_50_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_50_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_50_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_50_ff, NULL, 0x80b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80b8_50_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_50_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_50_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_50_ff, NULL, 0x80bb, 2, { 2, 0 }, 0 }, /* OR */ +{ op_80bc_50_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_50_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_50_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_50_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_50_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_50_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_50_ff, NULL, 0x80f0, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80f8_50_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_50_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_50_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_50_ff, NULL, 0x80fb, 2, { 2, 0 }, 0 }, /* DIVU */ +{ op_80fc_50_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_52_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_52_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_50_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_50_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_50_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_50_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_50_ff, NULL, 0x8130, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8138_50_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_50_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8140_50_ff, NULL, 0x8140, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8148_50_ff, NULL, 0x8148, 4, { 0, 0 }, 0 }, /* PACK */ +{ op_8150_50_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_50_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_50_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_50_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_50_ff, NULL, 0x8170, 2, { 2, 0 }, 0 }, /* OR */ +{ op_8178_50_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_50_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8180_50_ff, NULL, 0x8180, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8188_50_ff, NULL, 0x8188, 4, { 0, 0 }, 0 }, /* UNPK */ +{ op_8190_50_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_50_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_50_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_50_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_50_ff, NULL, 0x81b0, 2, { 2, 0 }, 0 }, /* OR */ +{ op_81b8_50_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_50_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_50_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_50_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_50_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_50_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_50_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_50_ff, NULL, 0x81f0, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81f8_50_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_50_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_50_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_50_ff, NULL, 0x81fb, 2, { 2, 0 }, 0 }, /* DIVS */ +{ op_81fc_50_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_50_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_50_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_50_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_50_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_50_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_50_ff, NULL, 0x9030, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9038_50_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_50_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_50_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_50_ff, NULL, 0x903b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_903c_50_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_50_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_50_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_50_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_50_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_50_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_50_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_50_ff, NULL, 0x9070, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9078_50_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_50_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_50_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_50_ff, NULL, 0x907b, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_907c_50_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_50_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_50_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_50_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_50_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_50_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_50_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_50_ff, NULL, 0x90b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90b8_50_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_50_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_50_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_50_ff, NULL, 0x90bb, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_90bc_50_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_50_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_50_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_50_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_50_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_50_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_50_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_50_ff, NULL, 0x90f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90f8_50_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_50_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_50_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_50_ff, NULL, 0x90fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_90fc_50_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_50_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_50_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_50_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_50_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_50_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_50_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_50_ff, NULL, 0x9130, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9138_50_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_50_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_50_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_50_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_50_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_50_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_50_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_50_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_50_ff, NULL, 0x9170, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_9178_50_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_50_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_50_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_50_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_50_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_50_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_50_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_50_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_50_ff, NULL, 0x91b0, 2, { 2, 0 }, 0 }, /* SUB */ +{ op_91b8_50_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_50_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_50_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_50_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_50_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_50_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_50_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_50_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_50_ff, NULL, 0x91f0, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91f8_50_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_50_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_50_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_50_ff, NULL, 0x91fb, 2, { 2, 0 }, 0 }, /* SUBA */ +{ op_91fc_50_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_50_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_50_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_50_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_50_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_50_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_50_ff, NULL, 0xb030, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b038_50_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_50_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_50_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_50_ff, NULL, 0xb03b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b03c_50_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_50_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_50_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_50_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_50_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_50_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_50_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_50_ff, NULL, 0xb070, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b078_50_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_50_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_50_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_50_ff, NULL, 0xb07b, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b07c_50_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_50_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_50_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_50_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_50_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_50_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_50_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_50_ff, NULL, 0xb0b0, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0b8_50_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_50_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_50_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_50_ff, NULL, 0xb0bb, 2, { 2, 0 }, 0 }, /* CMP */ +{ op_b0bc_50_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_50_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_50_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_50_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_50_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_50_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_50_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_50_ff, NULL, 0xb0f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0f8_50_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_50_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_50_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_50_ff, NULL, 0xb0fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b0fc_50_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_50_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_50_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_50_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_50_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_50_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_50_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_50_ff, NULL, 0xb130, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b138_50_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_50_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_50_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_50_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_50_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_50_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_50_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_50_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_50_ff, NULL, 0xb170, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b178_50_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_50_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_50_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_50_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_50_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_50_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_50_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_50_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_50_ff, NULL, 0xb1b0, 2, { 2, 0 }, 0 }, /* EOR */ +{ op_b1b8_50_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_50_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_50_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_50_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_50_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_50_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_50_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_50_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_50_ff, NULL, 0xb1f0, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1f8_50_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_50_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_50_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_50_ff, NULL, 0xb1fb, 2, { 2, 0 }, 0 }, /* CMPA */ +{ op_b1fc_50_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_50_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_50_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_50_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_50_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_50_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_50_ff, NULL, 0xc030, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c038_50_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_50_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_50_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_50_ff, NULL, 0xc03b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c03c_50_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_50_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_50_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_50_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_50_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_50_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_50_ff, NULL, 0xc070, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c078_50_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_50_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_50_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_50_ff, NULL, 0xc07b, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c07c_50_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_50_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_50_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_50_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_50_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_50_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_50_ff, NULL, 0xc0b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0b8_50_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_50_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_50_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_50_ff, NULL, 0xc0bb, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c0bc_50_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_50_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_50_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_50_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_50_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_50_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_50_ff, NULL, 0xc0f0, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0f8_50_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_50_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_50_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_50_ff, NULL, 0xc0fb, 2, { 2, 0 }, 0 }, /* MULU */ +{ op_c0fc_50_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_52_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_52_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_50_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_50_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_50_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_50_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_50_ff, NULL, 0xc130, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c138_50_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_50_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_50_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_50_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_50_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_50_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_50_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_50_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_50_ff, NULL, 0xc170, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c178_50_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_50_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_50_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_50_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_50_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_50_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_50_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_50_ff, NULL, 0xc1b0, 2, { 2, 0 }, 0 }, /* AND */ +{ op_c1b8_50_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_50_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_50_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_50_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_50_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_50_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_50_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_50_ff, NULL, 0xc1f0, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1f8_50_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_50_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_50_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_50_ff, NULL, 0xc1fb, 2, { 2, 0 }, 0 }, /* MULS */ +{ op_c1fc_50_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_50_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_50_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_50_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_50_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_50_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_50_ff, NULL, 0xd030, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d038_50_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_50_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_50_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_50_ff, NULL, 0xd03b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d03c_50_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_50_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_50_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_50_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_50_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_50_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_50_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_50_ff, NULL, 0xd070, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d078_50_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_50_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_50_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_50_ff, NULL, 0xd07b, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d07c_50_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_50_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_50_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_50_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_50_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_50_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_50_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_50_ff, NULL, 0xd0b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0b8_50_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_50_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_50_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_50_ff, NULL, 0xd0bb, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d0bc_50_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_50_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_50_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_50_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_50_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_50_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_50_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_50_ff, NULL, 0xd0f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0f8_50_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_50_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_50_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_50_ff, NULL, 0xd0fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d0fc_50_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_50_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_50_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_50_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_50_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_50_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_50_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_50_ff, NULL, 0xd130, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d138_50_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_50_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_50_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_50_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_50_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_50_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_50_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_50_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_50_ff, NULL, 0xd170, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d178_50_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_50_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_50_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_50_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_50_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_50_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_50_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_50_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_50_ff, NULL, 0xd1b0, 2, { 2, 0 }, 0 }, /* ADD */ +{ op_d1b8_50_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_50_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_50_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_50_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_50_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_50_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_50_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_50_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_50_ff, NULL, 0xd1f0, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1f8_50_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_50_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_50_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_50_ff, NULL, 0xd1fb, 2, { 2, 0 }, 0 }, /* ADDA */ +{ op_d1fc_50_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_50_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_50_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_50_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_50_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_50_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_50_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_50_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_50_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_50_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_50_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_50_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_50_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_50_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_50_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_50_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_50_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_50_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_50_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_50_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_50_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_50_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_50_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_50_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_50_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_50_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_50_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_50_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_50_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_50_ff, NULL, 0xe0f0, 2, { 2, 0 }, 0 }, /* ASRW */ +{ op_e0f8_50_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_50_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_50_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_50_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_50_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_50_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_50_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_50_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_50_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_50_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_50_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_50_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_50_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_50_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_50_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_50_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_50_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_50_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_50_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_50_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_50_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_50_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_50_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_50_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_50_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_50_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_50_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_50_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_50_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_50_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_50_ff, NULL, 0xe1f0, 2, { 2, 0 }, 0 }, /* ASLW */ +{ op_e1f8_50_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_50_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_50_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_50_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_50_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_50_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_50_ff, NULL, 0xe2f0, 2, { 2, 0 }, 0 }, /* LSRW */ +{ op_e2f8_50_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_50_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_50_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_50_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_50_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_50_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_50_ff, NULL, 0xe3f0, 2, { 2, 0 }, 0 }, /* LSLW */ +{ op_e3f8_50_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_50_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_50_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_50_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_50_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_50_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_50_ff, NULL, 0xe4f0, 2, { 2, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_50_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_50_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_50_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_50_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_50_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_50_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_50_ff, NULL, 0xe5f0, 2, { 2, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_50_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_50_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_50_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_50_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_50_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_50_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_50_ff, NULL, 0xe6f0, 2, { 2, 0 }, 0 }, /* RORW */ +{ op_e6f8_50_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_50_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_50_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_50_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_50_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_50_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_50_ff, NULL, 0xe7f0, 2, { 2, 0 }, 0 }, /* ROLW */ +{ op_e7f8_50_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_50_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ op_e8c0_50_ff, NULL, 0xe8c0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8d0_50_ff, NULL, 0xe8d0, 4, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8e8_50_ff, NULL, 0xe8e8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f0_50_ff, NULL, 0xe8f0, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e8f8_50_ff, NULL, 0xe8f8, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8f9_50_ff, NULL, 0xe8f9, 8, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fa_50_ff, NULL, 0xe8fa, 6, { 0, 0 }, 0 }, /* BFTST */ +{ op_e8fb_50_ff, NULL, 0xe8fb, 4, { 2, 0 }, 0 }, /* BFTST */ +{ op_e9c0_50_ff, NULL, 0xe9c0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9d0_50_ff, NULL, 0xe9d0, 4, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9e8_50_ff, NULL, 0xe9e8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f0_50_ff, NULL, 0xe9f0, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_e9f8_50_ff, NULL, 0xe9f8, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9f9_50_ff, NULL, 0xe9f9, 8, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fa_50_ff, NULL, 0xe9fa, 6, { 0, 0 }, 0 }, /* BFEXTU */ +{ op_e9fb_50_ff, NULL, 0xe9fb, 4, { 2, 0 }, 0 }, /* BFEXTU */ +{ op_eac0_50_ff, NULL, 0xeac0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ead0_50_ff, NULL, 0xead0, 4, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eae8_50_ff, NULL, 0xeae8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf0_50_ff, NULL, 0xeaf0, 4, { 2, 0 }, 0 }, /* BFCHG */ +{ op_eaf8_50_ff, NULL, 0xeaf8, 6, { 0, 0 }, 0 }, /* BFCHG */ +{ op_eaf9_50_ff, NULL, 0xeaf9, 8, { 0, 0 }, 0 }, /* BFCHG */ +{ op_ebc0_50_ff, NULL, 0xebc0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebd0_50_ff, NULL, 0xebd0, 4, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebe8_50_ff, NULL, 0xebe8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf0_50_ff, NULL, 0xebf0, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ebf8_50_ff, NULL, 0xebf8, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebf9_50_ff, NULL, 0xebf9, 8, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfa_50_ff, NULL, 0xebfa, 6, { 0, 0 }, 0 }, /* BFEXTS */ +{ op_ebfb_50_ff, NULL, 0xebfb, 4, { 2, 0 }, 0 }, /* BFEXTS */ +{ op_ecc0_50_ff, NULL, 0xecc0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecd0_50_ff, NULL, 0xecd0, 4, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ece8_50_ff, NULL, 0xece8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf0_50_ff, NULL, 0xecf0, 4, { 2, 0 }, 0 }, /* BFCLR */ +{ op_ecf8_50_ff, NULL, 0xecf8, 6, { 0, 0 }, 0 }, /* BFCLR */ +{ op_ecf9_50_ff, NULL, 0xecf9, 8, { 0, 0 }, 0 }, /* BFCLR */ +{ op_edc0_50_ff, NULL, 0xedc0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edd0_50_ff, NULL, 0xedd0, 4, { 0, 0 }, 0 }, /* BFFFO */ +{ op_ede8_50_ff, NULL, 0xede8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf0_50_ff, NULL, 0xedf0, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_edf8_50_ff, NULL, 0xedf8, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edf9_50_ff, NULL, 0xedf9, 8, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfa_50_ff, NULL, 0xedfa, 6, { 0, 0 }, 0 }, /* BFFFO */ +{ op_edfb_50_ff, NULL, 0xedfb, 4, { 2, 0 }, 0 }, /* BFFFO */ +{ op_eec0_50_ff, NULL, 0xeec0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eed0_50_ff, NULL, 0xeed0, 4, { 0, 0 }, 0 }, /* BFSET */ +{ op_eee8_50_ff, NULL, 0xeee8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef0_50_ff, NULL, 0xeef0, 4, { 2, 0 }, 0 }, /* BFSET */ +{ op_eef8_50_ff, NULL, 0xeef8, 6, { 0, 0 }, 0 }, /* BFSET */ +{ op_eef9_50_ff, NULL, 0xeef9, 8, { 0, 0 }, 0 }, /* BFSET */ +{ op_efc0_50_ff, NULL, 0xefc0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efd0_50_ff, NULL, 0xefd0, 4, { 0, 0 }, 0 }, /* BFINS */ +{ op_efe8_50_ff, NULL, 0xefe8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff0_50_ff, NULL, 0xeff0, 4, { 2, 0 }, 0 }, /* BFINS */ +{ op_eff8_50_ff, NULL, 0xeff8, 6, { 0, 0 }, 0 }, /* BFINS */ +{ op_eff9_50_ff, NULL, 0xeff9, 8, { 0, 0 }, 0 }, /* BFINS */ +{ op_f200_50_ff, NULL, 0xf200, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f208_50_ff, NULL, 0xf208, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f210_50_ff, NULL, 0xf210, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f218_50_ff, NULL, 0xf218, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f220_50_ff, NULL, 0xf220, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f228_50_ff, NULL, 0xf228, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f230_50_ff, NULL, 0xf230, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f238_50_ff, NULL, 0xf238, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f239_50_ff, NULL, 0xf239, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23a_50_ff, NULL, 0xf23a, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23b_50_ff, NULL, 0xf23b, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f23c_50_ff, NULL, 0xf23c, -1, { 0, 0 }, 0 }, /* FPP */ +{ op_f240_50_ff, NULL, 0xf240, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f248_50_ff, NULL, 0xf248, -1, { 0, 0 }, 0 }, /* FDBcc */ +{ op_f250_50_ff, NULL, 0xf250, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f258_50_ff, NULL, 0xf258, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f260_50_ff, NULL, 0xf260, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f268_50_ff, NULL, 0xf268, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f270_50_ff, NULL, 0xf270, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f278_50_ff, NULL, 0xf278, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f279_50_ff, NULL, 0xf279, -1, { 0, 0 }, 0 }, /* FScc */ +{ op_f27a_50_ff, NULL, 0xf27a, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27b_50_ff, NULL, 0xf27b, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f27c_50_ff, NULL, 0xf27c, -1, { 0, 0 }, 0 }, /* FTRAPcc */ +{ op_f280_50_ff, NULL, 0xf280, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f2c0_50_ff, NULL, 0xf2c0, -1, { 0, 0 }, 0 }, /* FBcc */ +{ op_f310_50_ff, NULL, 0xf310, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f320_50_ff, NULL, 0xf320, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f328_50_ff, NULL, 0xf328, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f330_50_ff, NULL, 0xf330, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f338_50_ff, NULL, 0xf338, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f339_50_ff, NULL, 0xf339, -1, { 0, 0 }, 0 }, /* FSAVE */ +{ op_f350_50_ff, NULL, 0xf350, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f358_50_ff, NULL, 0xf358, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f368_50_ff, NULL, 0xf368, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f370_50_ff, NULL, 0xf370, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f378_50_ff, NULL, 0xf378, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f379_50_ff, NULL, 0xf379, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37a_50_ff, NULL, 0xf37a, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ op_f37b_50_ff, NULL, 0xf37b, -1, { 0, 0 }, 0 }, /* FRESTORE */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_54[] = { +{ op_0000_50_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_50_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_50_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_50_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_50_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_54_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_50_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_50_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_54_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_50_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_50_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_50_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_50_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_50_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_54_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_50_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_50_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_54_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_50_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_50_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_50_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_50_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_50_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_54_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_50_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_50_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_50_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_50_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_50_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_50_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_50_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_50_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_54_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_50_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_50_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_50_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_54_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_50_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_54_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_50_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_50_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_50_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_50_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_50_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_54_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_50_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_50_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_54_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_50_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_50_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_50_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_50_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_50_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_54_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_50_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_50_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_54_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_50_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_50_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_50_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_50_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_50_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_54_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_50_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_50_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_50_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_50_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_50_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_50_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_50_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_54_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_50_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_50_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_54_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_50_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_50_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_50_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_50_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_50_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_54_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_50_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_50_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_54_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_50_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_50_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_50_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_50_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_50_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_54_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_50_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_50_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_50_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_50_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_50_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_50_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_50_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_54_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_50_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_50_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_50_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_50_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_50_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_50_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_50_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_54_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_50_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_50_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_50_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_50_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_50_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_50_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_50_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_54_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_50_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_50_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_50_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_50_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_50_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_50_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_50_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_54_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_50_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_50_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_50_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_50_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_50_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_50_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_50_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_54_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_50_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_50_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_50_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_50_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_50_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_50_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_50_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_54_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_50_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_50_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_50_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_50_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_50_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_50_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_50_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_54_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_50_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_50_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_50_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_54_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_54_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_50_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_50_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_50_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_50_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_54_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_50_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_50_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_54_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_50_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_50_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_50_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_50_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_54_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_50_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_50_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_54_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_50_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_50_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_50_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_50_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_54_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_50_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_50_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_50_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_50_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_50_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_50_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_50_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_54_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_50_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_50_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_54_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_50_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_50_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_50_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_50_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_50_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_54_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_50_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_50_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_54_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_50_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_50_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_50_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_50_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_50_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_54_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_50_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_50_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_50_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_50_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_50_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_50_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_50_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_54_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_50_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_50_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_50_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_50_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_50_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_50_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_50_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_54_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_50_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_50_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_50_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_50_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_50_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_50_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_50_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_54_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_50_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_50_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_0e10_52_ff, NULL, 0x0e10, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e18_52_ff, NULL, 0x0e18, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e20_52_ff, NULL, 0x0e20, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e28_52_ff, NULL, 0x0e28, 6, { 0, 0 }, 0 }, /* MOVES */ +#ifndef CPUEMU_68000_ONLY +{ op_0e30_54_ff, NULL, 0x0e30, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +{ op_0e38_52_ff, NULL, 0x0e38, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e39_52_ff, NULL, 0x0e39, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e50_52_ff, NULL, 0x0e50, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e58_52_ff, NULL, 0x0e58, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e60_52_ff, NULL, 0x0e60, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e68_52_ff, NULL, 0x0e68, 6, { 0, 0 }, 0 }, /* MOVES */ +#ifndef CPUEMU_68000_ONLY +{ op_0e70_54_ff, NULL, 0x0e70, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +{ op_0e78_52_ff, NULL, 0x0e78, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e79_52_ff, NULL, 0x0e79, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e90_52_ff, NULL, 0x0e90, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0e98_52_ff, NULL, 0x0e98, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea0_52_ff, NULL, 0x0ea0, 4, { 0, 0 }, 0 }, /* MOVES */ +{ op_0ea8_52_ff, NULL, 0x0ea8, 6, { 0, 0 }, 0 }, /* MOVES */ +#ifndef CPUEMU_68000_ONLY +{ op_0eb0_54_ff, NULL, 0x0eb0, 6, { 4, 4 }, 0 }, /* MOVES */ +#endif +{ op_0eb8_52_ff, NULL, 0x0eb8, 6, { 0, 0 }, 0 }, /* MOVES */ +{ op_0eb9_52_ff, NULL, 0x0eb9, 8, { 0, 0 }, 0 }, /* MOVES */ +{ op_1000_50_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_50_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_50_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_50_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_50_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_54_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_50_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_50_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_50_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_54_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_50_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_50_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_50_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_50_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_50_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_50_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_54_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_50_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_50_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_50_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_54_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_50_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_50_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_50_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_50_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_50_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_50_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_54_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_50_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_50_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_50_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_54_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_50_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_50_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_50_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_50_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_50_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_50_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_54_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_50_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_50_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_50_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_54_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_50_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_50_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_50_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_50_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_50_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_50_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_54_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_50_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_50_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_50_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_54_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_50_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_54_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_54_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_54_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_54_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_54_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_54_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_54_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_54_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_54_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_54_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_54_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_50_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_50_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_50_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_50_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_50_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_54_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_50_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_50_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_50_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_54_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_50_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_50_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_50_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_50_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_50_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_50_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_54_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_50_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_50_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_50_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_54_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_50_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_50_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_50_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_50_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_50_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_50_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_50_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_54_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_50_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_50_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_50_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_54_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_50_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_50_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_50_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_50_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_50_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_50_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_50_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_54_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_50_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_50_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_50_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_54_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_50_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_50_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_50_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_50_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_50_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_50_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_50_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_54_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_50_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_50_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_50_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_54_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_50_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_50_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_50_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_50_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_50_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_50_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_50_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_54_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_50_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_50_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_50_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_54_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_50_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_50_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_50_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_50_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_50_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_50_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_50_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_54_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_50_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_50_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_50_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_54_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_50_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_50_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_50_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_50_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_50_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_50_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_50_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_54_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_50_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_50_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_50_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_54_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_50_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_54_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_54_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_54_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_54_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_54_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_54_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_54_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_54_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_54_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_54_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_54_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_54_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_50_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_50_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_50_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_50_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_50_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_50_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_54_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_50_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_50_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_50_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_54_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_50_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_50_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_50_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_50_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_50_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_50_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_50_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_54_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_50_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_50_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_50_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_54_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_50_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_50_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_50_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_50_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_50_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_50_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_50_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_54_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_50_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_50_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_50_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_54_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_50_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_50_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_50_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_50_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_50_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_50_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_50_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_54_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_50_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_50_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_50_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_54_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_50_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_50_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_50_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_50_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_50_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_50_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_50_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_54_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_50_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_50_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_50_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_54_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_50_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_50_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_50_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_50_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_50_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_50_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_50_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_54_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_50_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_50_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_50_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_54_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_50_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_50_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_50_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_50_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_50_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_50_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_50_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_54_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_50_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_50_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_50_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_54_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_50_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_50_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_50_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_50_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_50_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_50_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_50_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_54_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_50_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_50_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_50_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_54_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_50_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_54_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_54_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_54_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_54_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_54_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_54_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_54_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_54_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_54_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_54_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_54_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_54_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_50_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_50_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_50_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_50_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_50_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_50_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_54_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_50_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_50_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_50_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_54_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_50_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_50_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_50_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_50_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_50_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_50_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_50_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_54_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_50_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_50_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_50_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_54_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_50_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_50_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_50_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_50_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_50_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_50_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_54_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_50_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_50_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_50_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_50_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_50_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_50_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_50_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_54_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_50_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_50_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_50_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_50_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_50_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_50_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_50_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_54_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_50_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_50_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_50_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_50_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_50_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_50_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_50_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_54_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_50_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_50_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_50_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_50_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_50_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_50_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_50_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_54_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_50_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_50_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_50_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_54_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_50_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_50_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_50_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_54_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_50_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_50_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_50_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_54_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_50_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_50_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_50_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_50_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_50_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_54_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_50_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_50_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_50_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_50_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_50_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_50_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_50_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_54_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_50_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_50_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_50_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_50_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_50_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_50_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_50_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_54_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_50_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_50_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_42c0_50_ff, NULL, 0x42c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d0_50_ff, NULL, 0x42d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42d8_50_ff, NULL, 0x42d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e0_50_ff, NULL, 0x42e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42e8_50_ff, NULL, 0x42e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ op_42f0_54_ff, NULL, 0x42f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +#endif +{ op_42f8_50_ff, NULL, 0x42f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_42f9_50_ff, NULL, 0x42f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4400_50_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_50_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_50_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_50_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_50_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_54_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_50_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_50_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_50_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_50_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_50_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_50_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_50_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_54_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_50_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_50_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_50_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_50_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_50_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_50_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_50_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_54_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_50_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_50_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_50_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_50_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_50_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_50_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_50_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_54_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_50_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_50_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_50_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_54_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_50_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_50_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_50_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_50_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_50_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_50_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_54_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_50_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_50_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_50_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_50_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_50_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_50_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_50_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_54_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_50_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_50_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_50_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_50_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_50_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_50_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_50_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_54_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_50_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_50_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_50_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_50_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_50_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_50_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_50_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_54_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_50_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_50_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_50_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_54_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_50_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_54_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_54_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_54_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_54_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_54_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_54_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_54_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_54_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_50_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4848_50_ff, NULL, 0x4848, 2, { 0, 0 }, 0 }, /* BKPT */ +{ op_4850_50_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_50_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_54_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_50_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_50_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_50_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_54_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_50_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_54_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_54_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_54_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_54_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_54_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_54_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_50_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_54_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_54_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_54_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_54_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_54_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_54_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_50_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_50_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_50_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_50_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_50_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_54_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_50_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_50_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_50_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_50_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_50_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_50_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_50_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_54_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_50_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_50_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_50_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_50_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_50_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_50_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_50_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_54_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_50_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_50_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_54_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_54_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_54_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_54_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_54_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_54_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_54_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_54_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_54_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_54_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_54_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_54_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_54_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_54_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_54_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_54_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_54_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_54_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_54_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_54_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_54_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_54_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_54_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_54_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_50_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_54_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_50_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_52_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_50_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_50_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_52_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_54_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_54_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e74_52_ff, NULL, 0x4e74, 4, { 0, 0 }, 2 }, /* RTD */ +{ op_4e75_54_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_50_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_54_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e7a_50_ff, NULL, 0x4e7a, 4, { 0, 0 }, 0 }, /* MOVEC2 */ +{ op_4e7b_52_ff, NULL, 0x4e7b, 4, { 0, 0 }, 0 }, /* MOVE2C */ +{ op_4e90_52_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_52_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_54_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_52_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_52_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_52_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_54_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_50_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_50_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_54_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_50_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_50_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_50_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_54_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_50_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_50_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_50_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_50_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_50_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_54_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_50_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_50_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_50_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_50_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_50_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_50_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_50_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_50_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_54_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_50_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_50_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_50_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_50_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_50_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_50_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_50_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_50_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_54_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_50_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_50_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_50_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_54_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_50_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_50_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_50_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_50_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_54_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_50_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_50_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_50_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_50_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_50_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_50_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_50_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_54_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_50_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_50_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_50_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_50_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_50_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_50_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_50_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_50_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_54_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_50_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_50_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_50_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_50_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_50_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_50_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_50_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_50_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_54_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_50_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_50_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_50_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_54_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_50_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_50_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_50_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_50_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_54_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_50_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_50_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_50_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_54_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_50_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_50_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_50_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_50_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_54_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_50_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_50_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_50_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_54_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_50_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_50_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_50_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_50_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_54_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_50_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_50_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_50_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_54_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_50_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_50_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_50_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_50_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_54_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_50_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_50_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_50_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_54_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_50_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_50_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_50_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_50_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_54_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_50_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_50_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_50_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_54_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_50_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_50_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_50_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_50_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_54_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_50_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_50_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_50_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_54_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_50_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_50_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_50_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_50_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_54_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_50_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_50_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_50_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_54_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_50_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_50_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_50_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_50_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_54_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_50_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_50_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_50_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_54_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_50_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_50_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_50_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_50_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_54_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_50_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_50_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_50_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_54_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_50_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_50_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_50_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_50_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_54_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_50_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_50_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_50_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_54_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_50_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_50_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_50_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_50_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_54_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_50_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_50_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_50_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_54_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_50_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_50_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_50_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_50_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_54_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_50_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_50_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_50_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_54_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_50_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_50_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_50_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_50_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_54_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_50_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_50_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_50_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_54_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_50_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_50_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_50_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_50_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_54_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_50_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_50_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_50_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_54_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_50_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_50_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_50_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_50_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_54_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_50_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_50_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_54_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_54_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_54_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_54_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_54_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_54_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_54_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_54_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_54_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_54_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_54_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_54_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_54_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_54_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_54_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_54_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_54_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_54_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_54_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_54_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_54_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_54_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_54_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_54_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_54_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_54_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_54_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_54_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_54_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_54_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_54_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_54_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_54_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_54_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_54_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_54_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_54_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_54_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_54_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_54_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_54_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_54_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_54_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_54_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_54_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_54_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_54_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_54_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_50_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_50_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_50_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_50_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_50_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_50_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_54_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_50_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_50_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_50_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_54_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_50_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_50_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_50_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_50_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_50_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_50_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_54_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_50_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_50_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_50_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_54_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_50_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_50_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_50_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_50_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_50_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_50_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_54_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_50_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_50_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_50_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_54_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_50_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_54_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_54_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_54_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_54_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_54_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_54_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_54_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_54_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_54_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_54_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_54_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_54_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_54_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_50_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_50_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_50_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_50_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_54_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_50_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_50_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_50_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_50_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_50_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_50_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_54_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_50_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_50_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_50_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_50_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_50_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_50_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_54_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_50_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_50_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_54_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_54_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_54_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_54_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_54_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_54_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_54_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_54_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_54_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_54_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_54_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_50_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_50_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_50_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_50_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_50_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_54_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_50_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_50_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_50_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_54_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_50_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_50_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_50_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_50_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_50_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_50_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_50_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_54_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_50_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_50_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_50_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_54_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_50_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_50_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_50_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_50_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_50_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_50_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_50_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_54_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_50_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_50_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_50_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_54_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_50_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_50_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_50_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_50_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_50_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_50_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_50_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_54_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_50_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_50_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_50_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_54_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_50_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_50_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_50_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_50_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_50_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_50_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_50_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_54_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_50_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_50_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_50_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_50_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_50_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_50_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_50_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_50_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_54_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_50_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_50_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_50_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_50_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_50_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_50_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_50_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_50_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_54_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_50_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_50_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_50_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_50_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_50_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_50_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_50_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_50_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_54_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_50_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_50_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_50_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_54_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_50_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_50_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_50_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_50_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_50_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_50_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_54_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_50_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_50_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_50_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_54_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_50_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_50_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_50_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_50_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_50_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_50_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_50_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_54_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_50_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_50_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_50_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_54_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_50_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_50_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_50_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_50_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_50_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_50_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_50_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_54_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_50_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_50_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_50_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_54_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_50_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_50_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_50_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_50_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_50_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_50_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_50_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_54_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_50_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_50_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_50_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_54_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_50_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_50_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_50_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_50_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_50_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_50_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_50_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_54_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_50_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_50_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_50_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_50_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_50_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_50_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_50_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_50_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_54_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_50_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_50_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_50_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_50_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_50_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_50_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_50_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_50_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_54_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_50_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_50_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_50_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_50_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_50_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_50_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_50_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_50_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_54_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_50_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_50_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_50_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_54_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_50_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_50_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_50_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_50_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_50_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_50_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_54_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_50_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_50_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_50_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_54_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_50_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_50_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_50_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_50_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_50_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_50_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_54_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_50_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_50_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_50_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_54_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_50_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_50_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_50_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_50_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_50_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_50_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_54_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_50_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_50_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_50_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_54_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_50_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_54_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_54_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_54_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_54_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_54_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_54_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_54_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_54_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_54_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_54_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_54_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_54_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_54_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_50_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_50_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_50_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_50_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_54_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_50_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_50_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_50_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_50_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_50_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_50_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_50_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_50_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_54_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_50_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_50_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_50_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_50_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_50_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_50_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_50_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_54_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_50_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_50_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_54_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_54_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_54_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_54_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_54_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_54_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_54_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_54_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_54_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_54_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_54_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_50_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_50_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_50_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_50_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_50_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_54_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_50_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_50_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_50_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_54_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_50_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_50_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_50_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_50_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_50_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_50_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_50_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_54_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_50_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_50_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_50_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_54_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_50_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_50_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_50_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_50_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_50_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_50_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_50_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_54_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_50_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_50_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_50_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_54_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_50_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_50_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_50_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_50_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_50_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_50_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_50_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_54_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_50_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_50_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_50_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_54_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_50_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_50_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_50_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_50_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_50_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_50_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_50_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_54_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_50_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_50_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_50_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_50_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_50_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_50_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_50_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_50_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_54_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_50_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_50_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_50_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_50_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_50_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_50_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_50_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_50_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_54_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_50_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_50_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_50_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_50_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_50_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_50_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_50_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_50_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_54_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_50_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_50_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_50_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_54_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_50_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_54_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_54_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_54_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_54_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_54_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_54_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_54_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_54_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_54_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_54_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_54_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_54_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_54_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_54_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_54_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_54_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_54_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_54_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_54_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_54_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_54_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_54_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_54_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_54_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_50_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_50_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_50_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_50_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_54_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_50_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_50_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_54_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_54_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_54_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_54_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_54_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_54_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_54_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_54_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_54_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_54_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_54_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_54_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_54_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_54_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_54_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_54_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_54_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_54_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_54_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_54_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_54_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_54_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_54_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_54_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_50_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_50_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_50_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_50_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_54_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_50_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_50_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_50_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_50_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_50_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_50_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_54_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_50_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_50_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_50_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_50_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_50_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_50_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_54_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_50_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_50_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_50_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_50_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_50_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_50_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_54_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_50_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_50_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_50_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_50_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_50_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_50_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_54_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_50_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_50_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_50_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_50_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_50_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_50_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_54_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_50_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_50_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_50_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_50_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_50_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_50_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_54_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_50_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_50_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY +const struct cputbl op_smalltbl_55[] = { +{ op_0000_50_ff, NULL, 0x0000, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0010_50_ff, NULL, 0x0010, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0018_50_ff, NULL, 0x0018, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0020_50_ff, NULL, 0x0020, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0028_50_ff, NULL, 0x0028, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0030_54_ff, NULL, 0x0030, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0038_50_ff, NULL, 0x0038, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0039_50_ff, NULL, 0x0039, 8, { 0, 0 }, 0 }, /* OR */ +{ op_003c_55_ff, NULL, 0x003c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0040_50_ff, NULL, 0x0040, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0050_50_ff, NULL, 0x0050, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0058_50_ff, NULL, 0x0058, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0060_50_ff, NULL, 0x0060, 4, { 0, 0 }, 0 }, /* OR */ +{ op_0068_50_ff, NULL, 0x0068, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0070_54_ff, NULL, 0x0070, 6, { 4, 0 }, 0 }, /* OR */ +{ op_0078_50_ff, NULL, 0x0078, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0079_50_ff, NULL, 0x0079, 8, { 0, 0 }, 0 }, /* OR */ +{ op_007c_55_ff, NULL, 0x007c, 4, { 0, 0 }, 0 }, /* ORSR */ +{ op_0080_55_ff, NULL, 0x0080, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0090_50_ff, NULL, 0x0090, 6, { 0, 0 }, 0 }, /* OR */ +{ op_0098_50_ff, NULL, 0x0098, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a0_50_ff, NULL, 0x00a0, 6, { 0, 0 }, 0 }, /* OR */ +{ op_00a8_50_ff, NULL, 0x00a8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b0_54_ff, NULL, 0x00b0, 8, { 4, 0 }, 0 }, /* OR */ +{ op_00b8_50_ff, NULL, 0x00b8, 8, { 0, 0 }, 0 }, /* OR */ +{ op_00b9_50_ff, NULL, 0x00b9, 10, { 0, 0 }, 0 }, /* OR */ +{ op_0100_50_ff, NULL, 0x0100, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0108_55_ff, NULL, 0x0108, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0110_50_ff, NULL, 0x0110, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0118_50_ff, NULL, 0x0118, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0120_50_ff, NULL, 0x0120, 2, { 0, 0 }, 0 }, /* BTST */ +{ op_0128_50_ff, NULL, 0x0128, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0130_54_ff, NULL, 0x0130, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_0138_50_ff, NULL, 0x0138, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0139_50_ff, NULL, 0x0139, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_013a_50_ff, NULL, 0x013a, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_013b_54_ff, NULL, 0x013b, 4, { 4, 0 }, 0 }, /* BTST */ +{ op_013c_50_ff, NULL, 0x013c, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0140_54_ff, NULL, 0x0140, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0148_55_ff, NULL, 0x0148, 4, { 0, 0 }, 0 }, /* MVPMR */ +{ op_0150_50_ff, NULL, 0x0150, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0158_50_ff, NULL, 0x0158, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0160_50_ff, NULL, 0x0160, 2, { 0, 0 }, 0 }, /* BCHG */ +{ op_0168_50_ff, NULL, 0x0168, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0170_54_ff, NULL, 0x0170, 4, { 4, 0 }, 0 }, /* BCHG */ +{ op_0178_50_ff, NULL, 0x0178, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0179_50_ff, NULL, 0x0179, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0180_54_ff, NULL, 0x0180, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0188_55_ff, NULL, 0x0188, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_0190_55_ff, NULL, 0x0190, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_0198_55_ff, NULL, 0x0198, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a0_55_ff, NULL, 0x01a0, 2, { 0, 0 }, 0 }, /* BCLR */ +{ op_01a8_55_ff, NULL, 0x01a8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b0_55_ff, NULL, 0x01b0, 4, { 4, 0 }, 0 }, /* BCLR */ +{ op_01b8_55_ff, NULL, 0x01b8, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_01b9_55_ff, NULL, 0x01b9, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_01c0_54_ff, NULL, 0x01c0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01c8_55_ff, NULL, 0x01c8, 4, { 0, 0 }, 0 }, /* MVPRM */ +{ op_01d0_50_ff, NULL, 0x01d0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01d8_50_ff, NULL, 0x01d8, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e0_50_ff, NULL, 0x01e0, 2, { 0, 0 }, 0 }, /* BSET */ +{ op_01e8_50_ff, NULL, 0x01e8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f0_54_ff, NULL, 0x01f0, 4, { 4, 0 }, 0 }, /* BSET */ +{ op_01f8_50_ff, NULL, 0x01f8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_01f9_50_ff, NULL, 0x01f9, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_0200_50_ff, NULL, 0x0200, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0210_50_ff, NULL, 0x0210, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0218_50_ff, NULL, 0x0218, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0220_50_ff, NULL, 0x0220, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0228_50_ff, NULL, 0x0228, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0230_54_ff, NULL, 0x0230, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0238_50_ff, NULL, 0x0238, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0239_50_ff, NULL, 0x0239, 8, { 0, 0 }, 0 }, /* AND */ +{ op_023c_55_ff, NULL, 0x023c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0240_50_ff, NULL, 0x0240, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0250_50_ff, NULL, 0x0250, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0258_50_ff, NULL, 0x0258, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0260_50_ff, NULL, 0x0260, 4, { 0, 0 }, 0 }, /* AND */ +{ op_0268_50_ff, NULL, 0x0268, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0270_54_ff, NULL, 0x0270, 6, { 4, 0 }, 0 }, /* AND */ +{ op_0278_50_ff, NULL, 0x0278, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0279_50_ff, NULL, 0x0279, 8, { 0, 0 }, 0 }, /* AND */ +{ op_027c_55_ff, NULL, 0x027c, 4, { 0, 0 }, 0 }, /* ANDSR */ +{ op_0280_55_ff, NULL, 0x0280, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0290_50_ff, NULL, 0x0290, 6, { 0, 0 }, 0 }, /* AND */ +{ op_0298_50_ff, NULL, 0x0298, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a0_50_ff, NULL, 0x02a0, 6, { 0, 0 }, 0 }, /* AND */ +{ op_02a8_50_ff, NULL, 0x02a8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b0_54_ff, NULL, 0x02b0, 8, { 4, 0 }, 0 }, /* AND */ +{ op_02b8_50_ff, NULL, 0x02b8, 8, { 0, 0 }, 0 }, /* AND */ +{ op_02b9_50_ff, NULL, 0x02b9, 10, { 0, 0 }, 0 }, /* AND */ +{ op_0400_50_ff, NULL, 0x0400, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0410_50_ff, NULL, 0x0410, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0418_50_ff, NULL, 0x0418, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0420_50_ff, NULL, 0x0420, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0428_50_ff, NULL, 0x0428, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0430_54_ff, NULL, 0x0430, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0438_50_ff, NULL, 0x0438, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0439_50_ff, NULL, 0x0439, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0440_50_ff, NULL, 0x0440, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0450_50_ff, NULL, 0x0450, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0458_50_ff, NULL, 0x0458, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0460_50_ff, NULL, 0x0460, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_0468_50_ff, NULL, 0x0468, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0470_54_ff, NULL, 0x0470, 6, { 4, 0 }, 0 }, /* SUB */ +{ op_0478_50_ff, NULL, 0x0478, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0479_50_ff, NULL, 0x0479, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_0480_55_ff, NULL, 0x0480, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0490_50_ff, NULL, 0x0490, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_0498_50_ff, NULL, 0x0498, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a0_50_ff, NULL, 0x04a0, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_04a8_50_ff, NULL, 0x04a8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b0_54_ff, NULL, 0x04b0, 8, { 4, 0 }, 0 }, /* SUB */ +{ op_04b8_50_ff, NULL, 0x04b8, 8, { 0, 0 }, 0 }, /* SUB */ +{ op_04b9_50_ff, NULL, 0x04b9, 10, { 0, 0 }, 0 }, /* SUB */ +{ op_0600_50_ff, NULL, 0x0600, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0610_50_ff, NULL, 0x0610, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0618_50_ff, NULL, 0x0618, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0620_50_ff, NULL, 0x0620, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0628_50_ff, NULL, 0x0628, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0630_54_ff, NULL, 0x0630, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0638_50_ff, NULL, 0x0638, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0639_50_ff, NULL, 0x0639, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0640_50_ff, NULL, 0x0640, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0650_50_ff, NULL, 0x0650, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0658_50_ff, NULL, 0x0658, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0660_50_ff, NULL, 0x0660, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_0668_50_ff, NULL, 0x0668, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0670_54_ff, NULL, 0x0670, 6, { 4, 0 }, 0 }, /* ADD */ +{ op_0678_50_ff, NULL, 0x0678, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0679_50_ff, NULL, 0x0679, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_0680_55_ff, NULL, 0x0680, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0690_50_ff, NULL, 0x0690, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_0698_50_ff, NULL, 0x0698, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a0_50_ff, NULL, 0x06a0, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_06a8_50_ff, NULL, 0x06a8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b0_54_ff, NULL, 0x06b0, 8, { 4, 0 }, 0 }, /* ADD */ +{ op_06b8_50_ff, NULL, 0x06b8, 8, { 0, 0 }, 0 }, /* ADD */ +{ op_06b9_50_ff, NULL, 0x06b9, 10, { 0, 0 }, 0 }, /* ADD */ +{ op_0800_50_ff, NULL, 0x0800, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0810_50_ff, NULL, 0x0810, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0818_50_ff, NULL, 0x0818, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0820_50_ff, NULL, 0x0820, 4, { 0, 0 }, 0 }, /* BTST */ +{ op_0828_50_ff, NULL, 0x0828, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0830_54_ff, NULL, 0x0830, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0838_50_ff, NULL, 0x0838, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_0839_50_ff, NULL, 0x0839, 8, { 0, 0 }, 0 }, /* BTST */ +{ op_083a_50_ff, NULL, 0x083a, 6, { 0, 0 }, 0 }, /* BTST */ +{ op_083b_54_ff, NULL, 0x083b, 6, { 4, 0 }, 0 }, /* BTST */ +{ op_0840_54_ff, NULL, 0x0840, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0850_50_ff, NULL, 0x0850, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0858_50_ff, NULL, 0x0858, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0860_50_ff, NULL, 0x0860, 4, { 0, 0 }, 0 }, /* BCHG */ +{ op_0868_50_ff, NULL, 0x0868, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0870_54_ff, NULL, 0x0870, 6, { 4, 0 }, 0 }, /* BCHG */ +{ op_0878_50_ff, NULL, 0x0878, 6, { 0, 0 }, 0 }, /* BCHG */ +{ op_0879_50_ff, NULL, 0x0879, 8, { 0, 0 }, 0 }, /* BCHG */ +{ op_0880_54_ff, NULL, 0x0880, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0890_55_ff, NULL, 0x0890, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_0898_55_ff, NULL, 0x0898, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a0_55_ff, NULL, 0x08a0, 4, { 0, 0 }, 0 }, /* BCLR */ +{ op_08a8_55_ff, NULL, 0x08a8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b0_55_ff, NULL, 0x08b0, 6, { 4, 0 }, 0 }, /* BCLR */ +{ op_08b8_55_ff, NULL, 0x08b8, 6, { 0, 0 }, 0 }, /* BCLR */ +{ op_08b9_55_ff, NULL, 0x08b9, 8, { 0, 0 }, 0 }, /* BCLR */ +{ op_08c0_54_ff, NULL, 0x08c0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d0_50_ff, NULL, 0x08d0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08d8_50_ff, NULL, 0x08d8, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e0_50_ff, NULL, 0x08e0, 4, { 0, 0 }, 0 }, /* BSET */ +{ op_08e8_50_ff, NULL, 0x08e8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f0_54_ff, NULL, 0x08f0, 6, { 4, 0 }, 0 }, /* BSET */ +{ op_08f8_50_ff, NULL, 0x08f8, 6, { 0, 0 }, 0 }, /* BSET */ +{ op_08f9_50_ff, NULL, 0x08f9, 8, { 0, 0 }, 0 }, /* BSET */ +{ op_0a00_50_ff, NULL, 0x0a00, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a10_50_ff, NULL, 0x0a10, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a18_50_ff, NULL, 0x0a18, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a20_50_ff, NULL, 0x0a20, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a28_50_ff, NULL, 0x0a28, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a30_54_ff, NULL, 0x0a30, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a38_50_ff, NULL, 0x0a38, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a39_50_ff, NULL, 0x0a39, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a3c_55_ff, NULL, 0x0a3c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a40_50_ff, NULL, 0x0a40, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a50_50_ff, NULL, 0x0a50, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a58_50_ff, NULL, 0x0a58, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a60_50_ff, NULL, 0x0a60, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_0a68_50_ff, NULL, 0x0a68, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a70_54_ff, NULL, 0x0a70, 6, { 4, 0 }, 0 }, /* EOR */ +{ op_0a78_50_ff, NULL, 0x0a78, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a79_50_ff, NULL, 0x0a79, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0a7c_55_ff, NULL, 0x0a7c, 4, { 0, 0 }, 0 }, /* EORSR */ +{ op_0a80_55_ff, NULL, 0x0a80, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a90_50_ff, NULL, 0x0a90, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0a98_50_ff, NULL, 0x0a98, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa0_50_ff, NULL, 0x0aa0, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_0aa8_50_ff, NULL, 0x0aa8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab0_54_ff, NULL, 0x0ab0, 8, { 4, 0 }, 0 }, /* EOR */ +{ op_0ab8_50_ff, NULL, 0x0ab8, 8, { 0, 0 }, 0 }, /* EOR */ +{ op_0ab9_50_ff, NULL, 0x0ab9, 10, { 0, 0 }, 0 }, /* EOR */ +{ op_0c00_50_ff, NULL, 0x0c00, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c10_50_ff, NULL, 0x0c10, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c18_50_ff, NULL, 0x0c18, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c20_50_ff, NULL, 0x0c20, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c28_50_ff, NULL, 0x0c28, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c30_54_ff, NULL, 0x0c30, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c38_50_ff, NULL, 0x0c38, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c39_50_ff, NULL, 0x0c39, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c40_50_ff, NULL, 0x0c40, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c50_50_ff, NULL, 0x0c50, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c58_50_ff, NULL, 0x0c58, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c60_50_ff, NULL, 0x0c60, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_0c68_50_ff, NULL, 0x0c68, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c70_54_ff, NULL, 0x0c70, 6, { 4, 0 }, 0 }, /* CMP */ +{ op_0c78_50_ff, NULL, 0x0c78, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c79_50_ff, NULL, 0x0c79, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0c80_50_ff, NULL, 0x0c80, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c90_50_ff, NULL, 0x0c90, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0c98_50_ff, NULL, 0x0c98, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca0_50_ff, NULL, 0x0ca0, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_0ca8_50_ff, NULL, 0x0ca8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb0_54_ff, NULL, 0x0cb0, 8, { 4, 0 }, 0 }, /* CMP */ +{ op_0cb8_50_ff, NULL, 0x0cb8, 8, { 0, 0 }, 0 }, /* CMP */ +{ op_0cb9_50_ff, NULL, 0x0cb9, 10, { 0, 0 }, 0 }, /* CMP */ +{ op_1000_50_ff, NULL, 0x1000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1010_50_ff, NULL, 0x1010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1018_50_ff, NULL, 0x1018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1020_50_ff, NULL, 0x1020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1028_50_ff, NULL, 0x1028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1030_54_ff, NULL, 0x1030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1038_50_ff, NULL, 0x1038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1039_50_ff, NULL, 0x1039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_103a_50_ff, NULL, 0x103a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_103b_54_ff, NULL, 0x103b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_103c_50_ff, NULL, 0x103c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1080_50_ff, NULL, 0x1080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1090_50_ff, NULL, 0x1090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1098_50_ff, NULL, 0x1098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a0_50_ff, NULL, 0x10a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10a8_50_ff, NULL, 0x10a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b0_54_ff, NULL, 0x10b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10b8_50_ff, NULL, 0x10b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10b9_50_ff, NULL, 0x10b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10ba_50_ff, NULL, 0x10ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10bb_54_ff, NULL, 0x10bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10bc_50_ff, NULL, 0x10bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10c0_50_ff, NULL, 0x10c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d0_50_ff, NULL, 0x10d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10d8_50_ff, NULL, 0x10d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e0_50_ff, NULL, 0x10e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_10e8_50_ff, NULL, 0x10e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f0_54_ff, NULL, 0x10f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10f8_50_ff, NULL, 0x10f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10f9_50_ff, NULL, 0x10f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fa_50_ff, NULL, 0x10fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_10fb_54_ff, NULL, 0x10fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_10fc_50_ff, NULL, 0x10fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1100_50_ff, NULL, 0x1100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1110_50_ff, NULL, 0x1110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1118_50_ff, NULL, 0x1118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1120_50_ff, NULL, 0x1120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_1128_50_ff, NULL, 0x1128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1130_54_ff, NULL, 0x1130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1138_50_ff, NULL, 0x1138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1139_50_ff, NULL, 0x1139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_113a_50_ff, NULL, 0x113a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_113b_54_ff, NULL, 0x113b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_113c_50_ff, NULL, 0x113c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1140_50_ff, NULL, 0x1140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1150_50_ff, NULL, 0x1150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1158_50_ff, NULL, 0x1158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1160_50_ff, NULL, 0x1160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_1168_50_ff, NULL, 0x1168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1170_54_ff, NULL, 0x1170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_1178_50_ff, NULL, 0x1178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1179_50_ff, NULL, 0x1179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_117a_50_ff, NULL, 0x117a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_117b_54_ff, NULL, 0x117b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_117c_50_ff, NULL, 0x117c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_1180_54_ff, NULL, 0x1180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1190_54_ff, NULL, 0x1190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_1198_54_ff, NULL, 0x1198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a0_54_ff, NULL, 0x11a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_11a8_54_ff, NULL, 0x11a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b0_54_ff, NULL, 0x11b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11b8_54_ff, NULL, 0x11b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11b9_54_ff, NULL, 0x11b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_11ba_54_ff, NULL, 0x11ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11bb_54_ff, NULL, 0x11bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_11bc_54_ff, NULL, 0x11bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_11c0_50_ff, NULL, 0x11c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d0_50_ff, NULL, 0x11d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11d8_50_ff, NULL, 0x11d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e0_50_ff, NULL, 0x11e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_11e8_50_ff, NULL, 0x11e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f0_54_ff, NULL, 0x11f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11f8_50_ff, NULL, 0x11f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11f9_50_ff, NULL, 0x11f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fa_50_ff, NULL, 0x11fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_11fb_54_ff, NULL, 0x11fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_11fc_50_ff, NULL, 0x11fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13c0_50_ff, NULL, 0x13c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d0_50_ff, NULL, 0x13d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13d8_50_ff, NULL, 0x13d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e0_50_ff, NULL, 0x13e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_13e8_50_ff, NULL, 0x13e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f0_54_ff, NULL, 0x13f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13f8_50_ff, NULL, 0x13f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13f9_50_ff, NULL, 0x13f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fa_50_ff, NULL, 0x13fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_13fb_54_ff, NULL, 0x13fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_13fc_50_ff, NULL, 0x13fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2000_50_ff, NULL, 0x2000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2008_50_ff, NULL, 0x2008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2010_50_ff, NULL, 0x2010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2018_50_ff, NULL, 0x2018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2020_50_ff, NULL, 0x2020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2028_50_ff, NULL, 0x2028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2030_54_ff, NULL, 0x2030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2038_50_ff, NULL, 0x2038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2039_50_ff, NULL, 0x2039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_203a_50_ff, NULL, 0x203a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_203b_54_ff, NULL, 0x203b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_203c_50_ff, NULL, 0x203c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2040_50_ff, NULL, 0x2040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2048_50_ff, NULL, 0x2048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2050_50_ff, NULL, 0x2050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2058_50_ff, NULL, 0x2058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2060_50_ff, NULL, 0x2060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2068_50_ff, NULL, 0x2068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2070_54_ff, NULL, 0x2070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_2078_50_ff, NULL, 0x2078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2079_50_ff, NULL, 0x2079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207a_50_ff, NULL, 0x207a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_207b_54_ff, NULL, 0x207b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_207c_50_ff, NULL, 0x207c, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_2080_50_ff, NULL, 0x2080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2088_50_ff, NULL, 0x2088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2090_50_ff, NULL, 0x2090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2098_50_ff, NULL, 0x2098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a0_50_ff, NULL, 0x20a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20a8_50_ff, NULL, 0x20a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b0_54_ff, NULL, 0x20b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20b8_50_ff, NULL, 0x20b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20b9_50_ff, NULL, 0x20b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20ba_50_ff, NULL, 0x20ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20bb_54_ff, NULL, 0x20bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20bc_50_ff, NULL, 0x20bc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c0_50_ff, NULL, 0x20c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20c8_50_ff, NULL, 0x20c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d0_50_ff, NULL, 0x20d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20d8_50_ff, NULL, 0x20d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e0_50_ff, NULL, 0x20e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_20e8_50_ff, NULL, 0x20e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f0_54_ff, NULL, 0x20f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20f8_50_ff, NULL, 0x20f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20f9_50_ff, NULL, 0x20f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fa_50_ff, NULL, 0x20fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_20fb_54_ff, NULL, 0x20fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_20fc_50_ff, NULL, 0x20fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2100_50_ff, NULL, 0x2100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2108_50_ff, NULL, 0x2108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2110_50_ff, NULL, 0x2110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2118_50_ff, NULL, 0x2118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2120_50_ff, NULL, 0x2120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_2128_50_ff, NULL, 0x2128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2130_54_ff, NULL, 0x2130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2138_50_ff, NULL, 0x2138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2139_50_ff, NULL, 0x2139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_213a_50_ff, NULL, 0x213a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_213b_54_ff, NULL, 0x213b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_213c_50_ff, NULL, 0x213c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2140_50_ff, NULL, 0x2140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2148_50_ff, NULL, 0x2148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2150_50_ff, NULL, 0x2150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2158_50_ff, NULL, 0x2158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2160_50_ff, NULL, 0x2160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_2168_50_ff, NULL, 0x2168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2170_54_ff, NULL, 0x2170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_2178_50_ff, NULL, 0x2178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_2179_50_ff, NULL, 0x2179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_217a_50_ff, NULL, 0x217a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_217b_54_ff, NULL, 0x217b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_217c_50_ff, NULL, 0x217c, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_2180_54_ff, NULL, 0x2180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2188_54_ff, NULL, 0x2188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2190_54_ff, NULL, 0x2190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_2198_54_ff, NULL, 0x2198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a0_54_ff, NULL, 0x21a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_21a8_54_ff, NULL, 0x21a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b0_54_ff, NULL, 0x21b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21b8_54_ff, NULL, 0x21b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21b9_54_ff, NULL, 0x21b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21ba_54_ff, NULL, 0x21ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_21bb_54_ff, NULL, 0x21bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_21bc_54_ff, NULL, 0x21bc, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_21c0_50_ff, NULL, 0x21c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21c8_50_ff, NULL, 0x21c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d0_50_ff, NULL, 0x21d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21d8_50_ff, NULL, 0x21d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e0_50_ff, NULL, 0x21e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_21e8_50_ff, NULL, 0x21e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f0_54_ff, NULL, 0x21f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21f8_50_ff, NULL, 0x21f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21f9_50_ff, NULL, 0x21f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fa_50_ff, NULL, 0x21fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_21fb_54_ff, NULL, 0x21fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_21fc_50_ff, NULL, 0x21fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c0_50_ff, NULL, 0x23c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23c8_50_ff, NULL, 0x23c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d0_50_ff, NULL, 0x23d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23d8_50_ff, NULL, 0x23d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e0_50_ff, NULL, 0x23e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_23e8_50_ff, NULL, 0x23e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f0_54_ff, NULL, 0x23f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23f8_50_ff, NULL, 0x23f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23f9_50_ff, NULL, 0x23f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fa_50_ff, NULL, 0x23fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_23fb_54_ff, NULL, 0x23fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_23fc_50_ff, NULL, 0x23fc, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_3000_50_ff, NULL, 0x3000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3008_50_ff, NULL, 0x3008, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3010_50_ff, NULL, 0x3010, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3018_50_ff, NULL, 0x3018, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3020_50_ff, NULL, 0x3020, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3028_50_ff, NULL, 0x3028, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3030_54_ff, NULL, 0x3030, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3038_50_ff, NULL, 0x3038, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3039_50_ff, NULL, 0x3039, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_303a_50_ff, NULL, 0x303a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_303b_54_ff, NULL, 0x303b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_303c_50_ff, NULL, 0x303c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3040_50_ff, NULL, 0x3040, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3048_50_ff, NULL, 0x3048, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3050_50_ff, NULL, 0x3050, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3058_50_ff, NULL, 0x3058, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3060_50_ff, NULL, 0x3060, 2, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3068_50_ff, NULL, 0x3068, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3070_54_ff, NULL, 0x3070, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_3078_50_ff, NULL, 0x3078, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3079_50_ff, NULL, 0x3079, 6, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307a_50_ff, NULL, 0x307a, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_307b_54_ff, NULL, 0x307b, 4, { 4, 0 }, 0 }, /* MOVEA */ +{ op_307c_50_ff, NULL, 0x307c, 4, { 0, 0 }, 0 }, /* MOVEA */ +{ op_3080_50_ff, NULL, 0x3080, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3088_50_ff, NULL, 0x3088, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3090_50_ff, NULL, 0x3090, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3098_50_ff, NULL, 0x3098, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a0_50_ff, NULL, 0x30a0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30a8_50_ff, NULL, 0x30a8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b0_54_ff, NULL, 0x30b0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30b8_50_ff, NULL, 0x30b8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30b9_50_ff, NULL, 0x30b9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30ba_50_ff, NULL, 0x30ba, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30bb_54_ff, NULL, 0x30bb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30bc_50_ff, NULL, 0x30bc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c0_50_ff, NULL, 0x30c0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30c8_50_ff, NULL, 0x30c8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d0_50_ff, NULL, 0x30d0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30d8_50_ff, NULL, 0x30d8, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e0_50_ff, NULL, 0x30e0, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_30e8_50_ff, NULL, 0x30e8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f0_54_ff, NULL, 0x30f0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30f8_50_ff, NULL, 0x30f8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30f9_50_ff, NULL, 0x30f9, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fa_50_ff, NULL, 0x30fa, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_30fb_54_ff, NULL, 0x30fb, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_30fc_50_ff, NULL, 0x30fc, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3100_50_ff, NULL, 0x3100, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3108_50_ff, NULL, 0x3108, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3110_50_ff, NULL, 0x3110, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3118_50_ff, NULL, 0x3118, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3120_50_ff, NULL, 0x3120, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_3128_50_ff, NULL, 0x3128, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3130_54_ff, NULL, 0x3130, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3138_50_ff, NULL, 0x3138, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3139_50_ff, NULL, 0x3139, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_313a_50_ff, NULL, 0x313a, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_313b_54_ff, NULL, 0x313b, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_313c_50_ff, NULL, 0x313c, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3140_50_ff, NULL, 0x3140, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3148_50_ff, NULL, 0x3148, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3150_50_ff, NULL, 0x3150, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3158_50_ff, NULL, 0x3158, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3160_50_ff, NULL, 0x3160, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_3168_50_ff, NULL, 0x3168, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3170_54_ff, NULL, 0x3170, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_3178_50_ff, NULL, 0x3178, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3179_50_ff, NULL, 0x3179, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_317a_50_ff, NULL, 0x317a, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_317b_54_ff, NULL, 0x317b, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_317c_50_ff, NULL, 0x317c, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_3180_54_ff, NULL, 0x3180, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3188_54_ff, NULL, 0x3188, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3190_54_ff, NULL, 0x3190, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_3198_54_ff, NULL, 0x3198, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a0_54_ff, NULL, 0x31a0, 4, { 4, 0 }, 0 }, /* MOVE */ +{ op_31a8_54_ff, NULL, 0x31a8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b0_54_ff, NULL, 0x31b0, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31b8_54_ff, NULL, 0x31b8, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31b9_54_ff, NULL, 0x31b9, 8, { 4, 0 }, 0 }, /* MOVE */ +{ op_31ba_54_ff, NULL, 0x31ba, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31bb_54_ff, NULL, 0x31bb, 6, { 6, 4 }, 0 }, /* MOVE */ +{ op_31bc_54_ff, NULL, 0x31bc, 6, { 4, 0 }, 0 }, /* MOVE */ +{ op_31c0_50_ff, NULL, 0x31c0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31c8_50_ff, NULL, 0x31c8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d0_50_ff, NULL, 0x31d0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31d8_50_ff, NULL, 0x31d8, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e0_50_ff, NULL, 0x31e0, 4, { 0, 0 }, 0 }, /* MOVE */ +{ op_31e8_50_ff, NULL, 0x31e8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f0_54_ff, NULL, 0x31f0, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31f8_50_ff, NULL, 0x31f8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31f9_50_ff, NULL, 0x31f9, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fa_50_ff, NULL, 0x31fa, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_31fb_54_ff, NULL, 0x31fb, 6, { 6, 0 }, 0 }, /* MOVE */ +{ op_31fc_50_ff, NULL, 0x31fc, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c0_50_ff, NULL, 0x33c0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33c8_50_ff, NULL, 0x33c8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d0_50_ff, NULL, 0x33d0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33d8_50_ff, NULL, 0x33d8, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e0_50_ff, NULL, 0x33e0, 6, { 0, 0 }, 0 }, /* MOVE */ +{ op_33e8_50_ff, NULL, 0x33e8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f0_54_ff, NULL, 0x33f0, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33f8_50_ff, NULL, 0x33f8, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33f9_50_ff, NULL, 0x33f9, 10, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fa_50_ff, NULL, 0x33fa, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_33fb_54_ff, NULL, 0x33fb, 8, { 8, 0 }, 0 }, /* MOVE */ +{ op_33fc_50_ff, NULL, 0x33fc, 8, { 0, 0 }, 0 }, /* MOVE */ +{ op_4000_50_ff, NULL, 0x4000, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4010_50_ff, NULL, 0x4010, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4018_50_ff, NULL, 0x4018, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4020_50_ff, NULL, 0x4020, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4028_50_ff, NULL, 0x4028, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4030_54_ff, NULL, 0x4030, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4038_50_ff, NULL, 0x4038, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4039_50_ff, NULL, 0x4039, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4040_50_ff, NULL, 0x4040, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4050_50_ff, NULL, 0x4050, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4058_50_ff, NULL, 0x4058, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4060_50_ff, NULL, 0x4060, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4068_50_ff, NULL, 0x4068, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4070_54_ff, NULL, 0x4070, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_4078_50_ff, NULL, 0x4078, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_4079_50_ff, NULL, 0x4079, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_4080_50_ff, NULL, 0x4080, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4090_50_ff, NULL, 0x4090, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_4098_50_ff, NULL, 0x4098, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a0_50_ff, NULL, 0x40a0, 2, { 0, 0 }, 0 }, /* NEGX */ +{ op_40a8_50_ff, NULL, 0x40a8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b0_54_ff, NULL, 0x40b0, 4, { 4, 0 }, 0 }, /* NEGX */ +{ op_40b8_50_ff, NULL, 0x40b8, 4, { 0, 0 }, 0 }, /* NEGX */ +{ op_40b9_50_ff, NULL, 0x40b9, 6, { 0, 0 }, 0 }, /* NEGX */ +{ op_40c0_55_ff, NULL, 0x40c0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d0_55_ff, NULL, 0x40d0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40d8_55_ff, NULL, 0x40d8, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e0_55_ff, NULL, 0x40e0, 2, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40e8_55_ff, NULL, 0x40e8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f0_55_ff, NULL, 0x40f0, 4, { 4, 0 }, 0 }, /* MVSR2 */ +{ op_40f8_55_ff, NULL, 0x40f8, 4, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_40f9_55_ff, NULL, 0x40f9, 6, { 0, 0 }, 0 }, /* MVSR2 */ +{ op_4180_50_ff, NULL, 0x4180, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4190_50_ff, NULL, 0x4190, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_4198_50_ff, NULL, 0x4198, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a0_50_ff, NULL, 0x41a0, 2, { 0, 0 }, 0 }, /* CHK */ +{ op_41a8_50_ff, NULL, 0x41a8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b0_54_ff, NULL, 0x41b0, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41b8_50_ff, NULL, 0x41b8, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41b9_50_ff, NULL, 0x41b9, 6, { 0, 0 }, 0 }, /* CHK */ +{ op_41ba_50_ff, NULL, 0x41ba, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41bb_54_ff, NULL, 0x41bb, 4, { 4, 0 }, 0 }, /* CHK */ +{ op_41bc_50_ff, NULL, 0x41bc, 4, { 0, 0 }, 0 }, /* CHK */ +{ op_41d0_50_ff, NULL, 0x41d0, 2, { 0, 0 }, 0 }, /* LEA */ +{ op_41e8_50_ff, NULL, 0x41e8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f0_54_ff, NULL, 0x41f0, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_41f8_50_ff, NULL, 0x41f8, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41f9_55_ff, NULL, 0x41f9, 6, { 0, 0 }, 0 }, /* LEA */ +{ op_41fa_50_ff, NULL, 0x41fa, 4, { 0, 0 }, 0 }, /* LEA */ +{ op_41fb_54_ff, NULL, 0x41fb, 4, { 4, 0 }, 0 }, /* LEA */ +{ op_4200_55_ff, NULL, 0x4200, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4210_55_ff, NULL, 0x4210, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4218_55_ff, NULL, 0x4218, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4220_55_ff, NULL, 0x4220, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4228_55_ff, NULL, 0x4228, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4230_55_ff, NULL, 0x4230, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4238_55_ff, NULL, 0x4238, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4239_55_ff, NULL, 0x4239, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4240_55_ff, NULL, 0x4240, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4250_55_ff, NULL, 0x4250, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4258_55_ff, NULL, 0x4258, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4260_55_ff, NULL, 0x4260, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4268_55_ff, NULL, 0x4268, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4270_55_ff, NULL, 0x4270, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_4278_55_ff, NULL, 0x4278, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_4279_55_ff, NULL, 0x4279, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4280_55_ff, NULL, 0x4280, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4290_55_ff, NULL, 0x4290, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_4298_55_ff, NULL, 0x4298, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a0_55_ff, NULL, 0x42a0, 2, { 0, 0 }, 0 }, /* CLR */ +{ op_42a8_55_ff, NULL, 0x42a8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b0_55_ff, NULL, 0x42b0, 4, { 4, 0 }, 0 }, /* CLR */ +{ op_42b8_55_ff, NULL, 0x42b8, 4, { 0, 0 }, 0 }, /* CLR */ +{ op_42b9_55_ff, NULL, 0x42b9, 6, { 0, 0 }, 0 }, /* CLR */ +{ op_4400_50_ff, NULL, 0x4400, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4410_50_ff, NULL, 0x4410, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4418_50_ff, NULL, 0x4418, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4420_50_ff, NULL, 0x4420, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4428_50_ff, NULL, 0x4428, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4430_54_ff, NULL, 0x4430, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4438_50_ff, NULL, 0x4438, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4439_50_ff, NULL, 0x4439, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4440_50_ff, NULL, 0x4440, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4450_50_ff, NULL, 0x4450, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4458_50_ff, NULL, 0x4458, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4460_50_ff, NULL, 0x4460, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4468_50_ff, NULL, 0x4468, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4470_54_ff, NULL, 0x4470, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_4478_50_ff, NULL, 0x4478, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_4479_50_ff, NULL, 0x4479, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_4480_50_ff, NULL, 0x4480, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4490_50_ff, NULL, 0x4490, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_4498_50_ff, NULL, 0x4498, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a0_50_ff, NULL, 0x44a0, 2, { 0, 0 }, 0 }, /* NEG */ +{ op_44a8_50_ff, NULL, 0x44a8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b0_54_ff, NULL, 0x44b0, 4, { 4, 0 }, 0 }, /* NEG */ +{ op_44b8_50_ff, NULL, 0x44b8, 4, { 0, 0 }, 0 }, /* NEG */ +{ op_44b9_50_ff, NULL, 0x44b9, 6, { 0, 0 }, 0 }, /* NEG */ +{ op_44c0_55_ff, NULL, 0x44c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d0_55_ff, NULL, 0x44d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44d8_55_ff, NULL, 0x44d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e0_55_ff, NULL, 0x44e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44e8_55_ff, NULL, 0x44e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f0_55_ff, NULL, 0x44f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44f8_55_ff, NULL, 0x44f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44f9_55_ff, NULL, 0x44f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fa_55_ff, NULL, 0x44fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_44fb_55_ff, NULL, 0x44fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_44fc_55_ff, NULL, 0x44fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4600_50_ff, NULL, 0x4600, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4610_50_ff, NULL, 0x4610, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4618_50_ff, NULL, 0x4618, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4620_50_ff, NULL, 0x4620, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4628_50_ff, NULL, 0x4628, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4630_54_ff, NULL, 0x4630, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4638_50_ff, NULL, 0x4638, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4639_50_ff, NULL, 0x4639, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4640_50_ff, NULL, 0x4640, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4650_50_ff, NULL, 0x4650, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4658_50_ff, NULL, 0x4658, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4660_50_ff, NULL, 0x4660, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4668_50_ff, NULL, 0x4668, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4670_54_ff, NULL, 0x4670, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_4678_50_ff, NULL, 0x4678, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_4679_50_ff, NULL, 0x4679, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_4680_50_ff, NULL, 0x4680, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4690_50_ff, NULL, 0x4690, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_4698_50_ff, NULL, 0x4698, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a0_50_ff, NULL, 0x46a0, 2, { 0, 0 }, 0 }, /* NOT */ +{ op_46a8_50_ff, NULL, 0x46a8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b0_54_ff, NULL, 0x46b0, 4, { 4, 0 }, 0 }, /* NOT */ +{ op_46b8_50_ff, NULL, 0x46b8, 4, { 0, 0 }, 0 }, /* NOT */ +{ op_46b9_50_ff, NULL, 0x46b9, 6, { 0, 0 }, 0 }, /* NOT */ +{ op_46c0_55_ff, NULL, 0x46c0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d0_55_ff, NULL, 0x46d0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46d8_55_ff, NULL, 0x46d8, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e0_55_ff, NULL, 0x46e0, 2, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46e8_55_ff, NULL, 0x46e8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f0_55_ff, NULL, 0x46f0, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46f8_55_ff, NULL, 0x46f8, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46f9_55_ff, NULL, 0x46f9, 6, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fa_55_ff, NULL, 0x46fa, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_46fb_55_ff, NULL, 0x46fb, 4, { 4, 0 }, 0 }, /* MV2SR */ +{ op_46fc_55_ff, NULL, 0x46fc, 4, { 0, 0 }, 0 }, /* MV2SR */ +{ op_4800_54_ff, NULL, 0x4800, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4810_54_ff, NULL, 0x4810, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4818_54_ff, NULL, 0x4818, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4820_54_ff, NULL, 0x4820, 2, { 0, 0 }, 0 }, /* NBCD */ +{ op_4828_54_ff, NULL, 0x4828, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4830_54_ff, NULL, 0x4830, 4, { 4, 0 }, 0 }, /* NBCD */ +{ op_4838_54_ff, NULL, 0x4838, 4, { 0, 0 }, 0 }, /* NBCD */ +{ op_4839_54_ff, NULL, 0x4839, 6, { 0, 0 }, 0 }, /* NBCD */ +{ op_4840_50_ff, NULL, 0x4840, 2, { 0, 0 }, 0 }, /* SWAP */ +{ op_4850_50_ff, NULL, 0x4850, 2, { 0, 0 }, 0 }, /* PEA */ +{ op_4868_50_ff, NULL, 0x4868, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4870_54_ff, NULL, 0x4870, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4878_50_ff, NULL, 0x4878, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_4879_50_ff, NULL, 0x4879, 6, { 0, 0 }, 0 }, /* PEA */ +{ op_487a_50_ff, NULL, 0x487a, 4, { 0, 0 }, 0 }, /* PEA */ +{ op_487b_54_ff, NULL, 0x487b, 4, { 4, 0 }, 0 }, /* PEA */ +{ op_4880_50_ff, NULL, 0x4880, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_4890_54_ff, NULL, 0x4890, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a0_54_ff, NULL, 0x48a0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48a8_54_ff, NULL, 0x48a8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b0_54_ff, NULL, 0x48b0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48b8_54_ff, NULL, 0x48b8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48b9_54_ff, NULL, 0x48b9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48c0_50_ff, NULL, 0x48c0, 2, { 0, 0 }, 0 }, /* EXT */ +{ op_48d0_54_ff, NULL, 0x48d0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e0_54_ff, NULL, 0x48e0, 4, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48e8_54_ff, NULL, 0x48e8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f0_54_ff, NULL, 0x48f0, 6, { 4, 0 }, 0 }, /* MVMLE */ +{ op_48f8_54_ff, NULL, 0x48f8, 6, { 0, 0 }, 0 }, /* MVMLE */ +{ op_48f9_54_ff, NULL, 0x48f9, 8, { 0, 0 }, 0 }, /* MVMLE */ +{ op_4a00_50_ff, NULL, 0x4a00, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a10_50_ff, NULL, 0x4a10, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a18_50_ff, NULL, 0x4a18, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a20_50_ff, NULL, 0x4a20, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a28_50_ff, NULL, 0x4a28, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a30_54_ff, NULL, 0x4a30, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a38_50_ff, NULL, 0x4a38, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a39_50_ff, NULL, 0x4a39, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a40_50_ff, NULL, 0x4a40, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a50_50_ff, NULL, 0x4a50, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a58_50_ff, NULL, 0x4a58, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a60_50_ff, NULL, 0x4a60, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a68_50_ff, NULL, 0x4a68, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a70_54_ff, NULL, 0x4a70, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4a78_50_ff, NULL, 0x4a78, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4a79_50_ff, NULL, 0x4a79, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4a80_50_ff, NULL, 0x4a80, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a90_50_ff, NULL, 0x4a90, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4a98_50_ff, NULL, 0x4a98, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa0_50_ff, NULL, 0x4aa0, 2, { 0, 0 }, 0 }, /* TST */ +{ op_4aa8_50_ff, NULL, 0x4aa8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab0_54_ff, NULL, 0x4ab0, 4, { 4, 0 }, 0 }, /* TST */ +{ op_4ab8_50_ff, NULL, 0x4ab8, 4, { 0, 0 }, 0 }, /* TST */ +{ op_4ab9_50_ff, NULL, 0x4ab9, 6, { 0, 0 }, 0 }, /* TST */ +{ op_4ac0_55_ff, NULL, 0x4ac0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad0_55_ff, NULL, 0x4ad0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ad8_55_ff, NULL, 0x4ad8, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae0_55_ff, NULL, 0x4ae0, 2, { 0, 0 }, 0 }, /* TAS */ +{ op_4ae8_55_ff, NULL, 0x4ae8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af0_55_ff, NULL, 0x4af0, 4, { 4, 0 }, 0 }, /* TAS */ +{ op_4af8_55_ff, NULL, 0x4af8, 4, { 0, 0 }, 0 }, /* TAS */ +{ op_4af9_55_ff, NULL, 0x4af9, 6, { 0, 0 }, 0 }, /* TAS */ +{ op_4c90_54_ff, NULL, 0x4c90, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4c98_54_ff, NULL, 0x4c98, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ca8_54_ff, NULL, 0x4ca8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb0_54_ff, NULL, 0x4cb0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cb8_54_ff, NULL, 0x4cb8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cb9_54_ff, NULL, 0x4cb9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cba_54_ff, NULL, 0x4cba, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cbb_54_ff, NULL, 0x4cbb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cd0_54_ff, NULL, 0x4cd0, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cd8_54_ff, NULL, 0x4cd8, 4, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4ce8_54_ff, NULL, 0x4ce8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf0_54_ff, NULL, 0x4cf0, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4cf8_54_ff, NULL, 0x4cf8, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cf9_54_ff, NULL, 0x4cf9, 8, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfa_54_ff, NULL, 0x4cfa, 6, { 0, 0 }, 0 }, /* MVMEL */ +{ op_4cfb_54_ff, NULL, 0x4cfb, 6, { 4, 0 }, 0 }, /* MVMEL */ +{ op_4e40_50_ff, NULL, 0x4e40, 2, { 0, 0 }, 0 }, /* TRAP */ +{ op_4e50_54_ff, NULL, 0x4e50, 4, { 0, 0 }, 0 }, /* LINK */ +{ op_4e58_50_ff, NULL, 0x4e58, 2, { 0, 0 }, 0 }, /* UNLK */ +{ op_4e60_55_ff, NULL, 0x4e60, 2, { 0, 0 }, 0 }, /* MVR2USP */ +{ op_4e68_55_ff, NULL, 0x4e68, 2, { 0, 0 }, 0 }, /* MVUSP2R */ +{ op_4e70_50_ff, NULL, 0x4e70, 2, { 0, 0 }, 0 }, /* RESET */ +{ op_4e71_52_ff, NULL, 0x4e71, 2, { 0, 0 }, 0 }, /* NOP */ +{ op_4e72_55_ff, NULL, 0x4e72, 0, { 0, 0 }, 0 }, /* STOP */ +{ op_4e73_55_ff, NULL, 0x4e73, 2, { 0, 0 }, 1 }, /* RTE */ +{ op_4e75_55_ff, NULL, 0x4e75, 2, { 0, 0 }, 1 }, /* RTS */ +{ op_4e76_55_ff, NULL, 0x4e76, 2, { 0, 0 }, 0 }, /* TRAPV */ +{ op_4e77_55_ff, NULL, 0x4e77, 2, { 0, 0 }, 1 }, /* RTR */ +{ op_4e90_55_ff, NULL, 0x4e90, 2, { 0, 0 }, 1 }, /* JSR */ +{ op_4ea8_55_ff, NULL, 0x4ea8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb0_55_ff, NULL, 0x4eb0, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4eb8_55_ff, NULL, 0x4eb8, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4eb9_55_ff, NULL, 0x4eb9, 6, { 0, 0 }, 3 }, /* JSR */ +{ op_4eba_55_ff, NULL, 0x4eba, 4, { 0, 0 }, 2 }, /* JSR */ +{ op_4ebb_55_ff, NULL, 0x4ebb, 4, { 4, 0 }, 2 }, /* JSR */ +{ op_4ed0_55_ff, NULL, 0x4ed0, 2, { 0, 0 }, 1 }, /* JMP */ +{ op_4ee8_55_ff, NULL, 0x4ee8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef0_55_ff, NULL, 0x4ef0, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_4ef8_55_ff, NULL, 0x4ef8, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4ef9_55_ff, NULL, 0x4ef9, 6, { 0, 0 }, 3 }, /* JMP */ +{ op_4efa_55_ff, NULL, 0x4efa, 4, { 0, 0 }, 2 }, /* JMP */ +{ op_4efb_55_ff, NULL, 0x4efb, 4, { 4, 0 }, 2 }, /* JMP */ +{ op_5000_50_ff, NULL, 0x5000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5010_50_ff, NULL, 0x5010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5018_50_ff, NULL, 0x5018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5020_50_ff, NULL, 0x5020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5028_50_ff, NULL, 0x5028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5030_54_ff, NULL, 0x5030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5038_50_ff, NULL, 0x5038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5039_50_ff, NULL, 0x5039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5040_50_ff, NULL, 0x5040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5048_50_ff, NULL, 0x5048, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5050_50_ff, NULL, 0x5050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5058_50_ff, NULL, 0x5058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5060_50_ff, NULL, 0x5060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5068_50_ff, NULL, 0x5068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5070_54_ff, NULL, 0x5070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_5078_50_ff, NULL, 0x5078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_5079_50_ff, NULL, 0x5079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_5080_55_ff, NULL, 0x5080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5088_50_ff, NULL, 0x5088, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_5090_50_ff, NULL, 0x5090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_5098_50_ff, NULL, 0x5098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a0_50_ff, NULL, 0x50a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_50a8_50_ff, NULL, 0x50a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b0_54_ff, NULL, 0x50b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_50b8_50_ff, NULL, 0x50b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_50b9_50_ff, NULL, 0x50b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_50c0_55_ff, NULL, 0x50c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50c8_55_ff, NULL, 0x50c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_50d0_55_ff, NULL, 0x50d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50d8_55_ff, NULL, 0x50d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e0_55_ff, NULL, 0x50e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_50e8_55_ff, NULL, 0x50e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f0_55_ff, NULL, 0x50f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_50f8_55_ff, NULL, 0x50f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_50f9_55_ff, NULL, 0x50f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5100_50_ff, NULL, 0x5100, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5110_50_ff, NULL, 0x5110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5118_50_ff, NULL, 0x5118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5120_50_ff, NULL, 0x5120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5128_50_ff, NULL, 0x5128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5130_54_ff, NULL, 0x5130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5138_50_ff, NULL, 0x5138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5139_50_ff, NULL, 0x5139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5140_50_ff, NULL, 0x5140, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5148_50_ff, NULL, 0x5148, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5150_50_ff, NULL, 0x5150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5158_50_ff, NULL, 0x5158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5160_50_ff, NULL, 0x5160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5168_50_ff, NULL, 0x5168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5170_54_ff, NULL, 0x5170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_5178_50_ff, NULL, 0x5178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_5179_50_ff, NULL, 0x5179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_5180_55_ff, NULL, 0x5180, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5188_50_ff, NULL, 0x5188, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_5190_50_ff, NULL, 0x5190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_5198_50_ff, NULL, 0x5198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a0_50_ff, NULL, 0x51a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_51a8_50_ff, NULL, 0x51a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b0_54_ff, NULL, 0x51b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_51b8_50_ff, NULL, 0x51b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_51b9_50_ff, NULL, 0x51b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_51c0_55_ff, NULL, 0x51c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51c8_55_ff, NULL, 0x51c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_51d0_55_ff, NULL, 0x51d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51d8_55_ff, NULL, 0x51d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e0_55_ff, NULL, 0x51e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_51e8_55_ff, NULL, 0x51e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f0_55_ff, NULL, 0x51f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_51f8_55_ff, NULL, 0x51f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_51f9_55_ff, NULL, 0x51f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_52c0_55_ff, NULL, 0x52c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52c8_55_ff, NULL, 0x52c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_52d0_55_ff, NULL, 0x52d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52d8_55_ff, NULL, 0x52d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e0_55_ff, NULL, 0x52e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_52e8_55_ff, NULL, 0x52e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f0_55_ff, NULL, 0x52f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_52f8_55_ff, NULL, 0x52f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_52f9_55_ff, NULL, 0x52f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_53c0_55_ff, NULL, 0x53c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53c8_55_ff, NULL, 0x53c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_53d0_55_ff, NULL, 0x53d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53d8_55_ff, NULL, 0x53d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e0_55_ff, NULL, 0x53e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_53e8_55_ff, NULL, 0x53e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f0_55_ff, NULL, 0x53f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_53f8_55_ff, NULL, 0x53f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_53f9_55_ff, NULL, 0x53f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_54c0_55_ff, NULL, 0x54c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54c8_55_ff, NULL, 0x54c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_54d0_55_ff, NULL, 0x54d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54d8_55_ff, NULL, 0x54d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e0_55_ff, NULL, 0x54e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_54e8_55_ff, NULL, 0x54e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f0_55_ff, NULL, 0x54f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_54f8_55_ff, NULL, 0x54f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_54f9_55_ff, NULL, 0x54f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_55c0_55_ff, NULL, 0x55c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55c8_55_ff, NULL, 0x55c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_55d0_55_ff, NULL, 0x55d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55d8_55_ff, NULL, 0x55d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e0_55_ff, NULL, 0x55e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_55e8_55_ff, NULL, 0x55e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f0_55_ff, NULL, 0x55f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_55f8_55_ff, NULL, 0x55f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_55f9_55_ff, NULL, 0x55f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_56c0_55_ff, NULL, 0x56c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56c8_55_ff, NULL, 0x56c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_56d0_55_ff, NULL, 0x56d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56d8_55_ff, NULL, 0x56d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e0_55_ff, NULL, 0x56e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_56e8_55_ff, NULL, 0x56e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f0_55_ff, NULL, 0x56f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_56f8_55_ff, NULL, 0x56f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_56f9_55_ff, NULL, 0x56f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_57c0_55_ff, NULL, 0x57c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57c8_55_ff, NULL, 0x57c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_57d0_55_ff, NULL, 0x57d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57d8_55_ff, NULL, 0x57d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e0_55_ff, NULL, 0x57e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_57e8_55_ff, NULL, 0x57e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f0_55_ff, NULL, 0x57f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_57f8_55_ff, NULL, 0x57f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_57f9_55_ff, NULL, 0x57f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_58c0_55_ff, NULL, 0x58c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58c8_55_ff, NULL, 0x58c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_58d0_55_ff, NULL, 0x58d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58d8_55_ff, NULL, 0x58d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e0_55_ff, NULL, 0x58e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_58e8_55_ff, NULL, 0x58e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f0_55_ff, NULL, 0x58f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_58f8_55_ff, NULL, 0x58f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_58f9_55_ff, NULL, 0x58f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_59c0_55_ff, NULL, 0x59c0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59c8_55_ff, NULL, 0x59c8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_59d0_55_ff, NULL, 0x59d0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59d8_55_ff, NULL, 0x59d8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e0_55_ff, NULL, 0x59e0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_59e8_55_ff, NULL, 0x59e8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f0_55_ff, NULL, 0x59f0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_59f8_55_ff, NULL, 0x59f8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_59f9_55_ff, NULL, 0x59f9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac0_55_ff, NULL, 0x5ac0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ac8_55_ff, NULL, 0x5ac8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ad0_55_ff, NULL, 0x5ad0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ad8_55_ff, NULL, 0x5ad8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae0_55_ff, NULL, 0x5ae0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ae8_55_ff, NULL, 0x5ae8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af0_55_ff, NULL, 0x5af0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5af8_55_ff, NULL, 0x5af8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5af9_55_ff, NULL, 0x5af9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc0_55_ff, NULL, 0x5bc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bc8_55_ff, NULL, 0x5bc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5bd0_55_ff, NULL, 0x5bd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5bd8_55_ff, NULL, 0x5bd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be0_55_ff, NULL, 0x5be0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5be8_55_ff, NULL, 0x5be8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf0_55_ff, NULL, 0x5bf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5bf8_55_ff, NULL, 0x5bf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5bf9_55_ff, NULL, 0x5bf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc0_55_ff, NULL, 0x5cc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cc8_55_ff, NULL, 0x5cc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5cd0_55_ff, NULL, 0x5cd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5cd8_55_ff, NULL, 0x5cd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce0_55_ff, NULL, 0x5ce0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ce8_55_ff, NULL, 0x5ce8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf0_55_ff, NULL, 0x5cf0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5cf8_55_ff, NULL, 0x5cf8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5cf9_55_ff, NULL, 0x5cf9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc0_55_ff, NULL, 0x5dc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dc8_55_ff, NULL, 0x5dc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5dd0_55_ff, NULL, 0x5dd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5dd8_55_ff, NULL, 0x5dd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de0_55_ff, NULL, 0x5de0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5de8_55_ff, NULL, 0x5de8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df0_55_ff, NULL, 0x5df0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5df8_55_ff, NULL, 0x5df8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5df9_55_ff, NULL, 0x5df9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec0_55_ff, NULL, 0x5ec0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ec8_55_ff, NULL, 0x5ec8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5ed0_55_ff, NULL, 0x5ed0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ed8_55_ff, NULL, 0x5ed8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee0_55_ff, NULL, 0x5ee0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5ee8_55_ff, NULL, 0x5ee8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef0_55_ff, NULL, 0x5ef0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ef8_55_ff, NULL, 0x5ef8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ef9_55_ff, NULL, 0x5ef9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc0_55_ff, NULL, 0x5fc0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fc8_55_ff, NULL, 0x5fc8, 4, { 0, 0 }, -2 }, /* DBcc */ +{ op_5fd0_55_ff, NULL, 0x5fd0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fd8_55_ff, NULL, 0x5fd8, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe0_55_ff, NULL, 0x5fe0, 2, { 0, 0 }, 0 }, /* Scc */ +{ op_5fe8_55_ff, NULL, 0x5fe8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff0_55_ff, NULL, 0x5ff0, 4, { 4, 0 }, 0 }, /* Scc */ +{ op_5ff8_55_ff, NULL, 0x5ff8, 4, { 0, 0 }, 0 }, /* Scc */ +{ op_5ff9_55_ff, NULL, 0x5ff9, 6, { 0, 0 }, 0 }, /* Scc */ +{ op_6000_54_ff, NULL, 0x6000, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6001_54_ff, NULL, 0x6001, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_60ff_54_ff, NULL, 0x60ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6100_55_ff, NULL, 0x6100, 4, { 0, 0 }, 2 }, /* BSR */ +{ op_6101_55_ff, NULL, 0x6101, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_61ff_55_ff, NULL, 0x61ff, 2, { 0, 0 }, 1 }, /* BSR */ +{ op_6200_54_ff, NULL, 0x6200, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6201_54_ff, NULL, 0x6201, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_62ff_54_ff, NULL, 0x62ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6300_54_ff, NULL, 0x6300, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6301_54_ff, NULL, 0x6301, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_63ff_54_ff, NULL, 0x63ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6400_54_ff, NULL, 0x6400, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6401_54_ff, NULL, 0x6401, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_64ff_54_ff, NULL, 0x64ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6500_54_ff, NULL, 0x6500, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6501_54_ff, NULL, 0x6501, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_65ff_54_ff, NULL, 0x65ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6600_54_ff, NULL, 0x6600, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6601_54_ff, NULL, 0x6601, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_66ff_54_ff, NULL, 0x66ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6700_54_ff, NULL, 0x6700, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6701_54_ff, NULL, 0x6701, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_67ff_54_ff, NULL, 0x67ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6800_54_ff, NULL, 0x6800, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6801_54_ff, NULL, 0x6801, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_68ff_54_ff, NULL, 0x68ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6900_54_ff, NULL, 0x6900, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6901_54_ff, NULL, 0x6901, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_69ff_54_ff, NULL, 0x69ff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6a00_54_ff, NULL, 0x6a00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6a01_54_ff, NULL, 0x6a01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6aff_54_ff, NULL, 0x6aff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6b00_54_ff, NULL, 0x6b00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6b01_54_ff, NULL, 0x6b01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6bff_54_ff, NULL, 0x6bff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6c00_54_ff, NULL, 0x6c00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6c01_54_ff, NULL, 0x6c01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6cff_54_ff, NULL, 0x6cff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6d00_54_ff, NULL, 0x6d00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6d01_54_ff, NULL, 0x6d01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6dff_54_ff, NULL, 0x6dff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6e00_54_ff, NULL, 0x6e00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6e01_54_ff, NULL, 0x6e01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6eff_54_ff, NULL, 0x6eff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_6f00_54_ff, NULL, 0x6f00, 4, { 0, 0 }, -2 }, /* Bcc */ +{ op_6f01_54_ff, NULL, 0x6f01, 2, { 0, 0 }, -1 }, /* Bcc */ +{ op_6fff_54_ff, NULL, 0x6fff, 2, { 0, 0 }, 0 }, /* Bcc */ +{ op_7000_50_ff, NULL, 0x7000, 2, { 0, 0 }, 0 }, /* MOVE */ +{ op_8000_50_ff, NULL, 0x8000, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8010_50_ff, NULL, 0x8010, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8018_50_ff, NULL, 0x8018, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8020_50_ff, NULL, 0x8020, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8028_50_ff, NULL, 0x8028, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8030_54_ff, NULL, 0x8030, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8038_50_ff, NULL, 0x8038, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8039_50_ff, NULL, 0x8039, 6, { 0, 0 }, 0 }, /* OR */ +{ op_803a_50_ff, NULL, 0x803a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_803b_54_ff, NULL, 0x803b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_803c_50_ff, NULL, 0x803c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8040_50_ff, NULL, 0x8040, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8050_50_ff, NULL, 0x8050, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8058_50_ff, NULL, 0x8058, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8060_50_ff, NULL, 0x8060, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8068_50_ff, NULL, 0x8068, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8070_54_ff, NULL, 0x8070, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8078_50_ff, NULL, 0x8078, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8079_50_ff, NULL, 0x8079, 6, { 0, 0 }, 0 }, /* OR */ +{ op_807a_50_ff, NULL, 0x807a, 4, { 0, 0 }, 0 }, /* OR */ +{ op_807b_54_ff, NULL, 0x807b, 4, { 4, 0 }, 0 }, /* OR */ +{ op_807c_50_ff, NULL, 0x807c, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8080_55_ff, NULL, 0x8080, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8090_55_ff, NULL, 0x8090, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8098_55_ff, NULL, 0x8098, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a0_55_ff, NULL, 0x80a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_80a8_55_ff, NULL, 0x80a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b0_55_ff, NULL, 0x80b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80b8_55_ff, NULL, 0x80b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80b9_55_ff, NULL, 0x80b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80ba_55_ff, NULL, 0x80ba, 4, { 0, 0 }, 0 }, /* OR */ +{ op_80bb_55_ff, NULL, 0x80bb, 4, { 4, 0 }, 0 }, /* OR */ +{ op_80bc_55_ff, NULL, 0x80bc, 6, { 0, 0 }, 0 }, /* OR */ +{ op_80c0_54_ff, NULL, 0x80c0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d0_54_ff, NULL, 0x80d0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80d8_54_ff, NULL, 0x80d8, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e0_54_ff, NULL, 0x80e0, 2, { 0, 0 }, 0 }, /* DIVU */ +{ op_80e8_54_ff, NULL, 0x80e8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f0_54_ff, NULL, 0x80f0, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80f8_54_ff, NULL, 0x80f8, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80f9_54_ff, NULL, 0x80f9, 6, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fa_54_ff, NULL, 0x80fa, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_80fb_54_ff, NULL, 0x80fb, 4, { 4, 0 }, 0 }, /* DIVU */ +{ op_80fc_54_ff, NULL, 0x80fc, 4, { 0, 0 }, 0 }, /* DIVU */ +{ op_8100_54_ff, NULL, 0x8100, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8108_54_ff, NULL, 0x8108, 2, { 0, 0 }, 0 }, /* SBCD */ +{ op_8110_50_ff, NULL, 0x8110, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8118_50_ff, NULL, 0x8118, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8120_50_ff, NULL, 0x8120, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8128_50_ff, NULL, 0x8128, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8130_54_ff, NULL, 0x8130, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8138_50_ff, NULL, 0x8138, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8139_50_ff, NULL, 0x8139, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8150_50_ff, NULL, 0x8150, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8158_50_ff, NULL, 0x8158, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8160_50_ff, NULL, 0x8160, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8168_50_ff, NULL, 0x8168, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8170_54_ff, NULL, 0x8170, 4, { 4, 0 }, 0 }, /* OR */ +{ op_8178_50_ff, NULL, 0x8178, 4, { 0, 0 }, 0 }, /* OR */ +{ op_8179_50_ff, NULL, 0x8179, 6, { 0, 0 }, 0 }, /* OR */ +{ op_8190_50_ff, NULL, 0x8190, 2, { 0, 0 }, 0 }, /* OR */ +{ op_8198_50_ff, NULL, 0x8198, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a0_50_ff, NULL, 0x81a0, 2, { 0, 0 }, 0 }, /* OR */ +{ op_81a8_50_ff, NULL, 0x81a8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b0_54_ff, NULL, 0x81b0, 4, { 4, 0 }, 0 }, /* OR */ +{ op_81b8_50_ff, NULL, 0x81b8, 4, { 0, 0 }, 0 }, /* OR */ +{ op_81b9_50_ff, NULL, 0x81b9, 6, { 0, 0 }, 0 }, /* OR */ +{ op_81c0_54_ff, NULL, 0x81c0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d0_54_ff, NULL, 0x81d0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81d8_54_ff, NULL, 0x81d8, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e0_54_ff, NULL, 0x81e0, 2, { 0, 0 }, 0 }, /* DIVS */ +{ op_81e8_54_ff, NULL, 0x81e8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f0_54_ff, NULL, 0x81f0, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81f8_54_ff, NULL, 0x81f8, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81f9_54_ff, NULL, 0x81f9, 6, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fa_54_ff, NULL, 0x81fa, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_81fb_54_ff, NULL, 0x81fb, 4, { 4, 0 }, 0 }, /* DIVS */ +{ op_81fc_54_ff, NULL, 0x81fc, 4, { 0, 0 }, 0 }, /* DIVS */ +{ op_9000_50_ff, NULL, 0x9000, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9010_50_ff, NULL, 0x9010, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9018_50_ff, NULL, 0x9018, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9020_50_ff, NULL, 0x9020, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9028_50_ff, NULL, 0x9028, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9030_54_ff, NULL, 0x9030, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9038_50_ff, NULL, 0x9038, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9039_50_ff, NULL, 0x9039, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_903a_50_ff, NULL, 0x903a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_903b_54_ff, NULL, 0x903b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_903c_50_ff, NULL, 0x903c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9040_50_ff, NULL, 0x9040, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9048_50_ff, NULL, 0x9048, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9050_50_ff, NULL, 0x9050, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9058_50_ff, NULL, 0x9058, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9060_50_ff, NULL, 0x9060, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9068_50_ff, NULL, 0x9068, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9070_54_ff, NULL, 0x9070, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9078_50_ff, NULL, 0x9078, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9079_50_ff, NULL, 0x9079, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_907a_50_ff, NULL, 0x907a, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_907b_54_ff, NULL, 0x907b, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_907c_50_ff, NULL, 0x907c, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9080_55_ff, NULL, 0x9080, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9088_55_ff, NULL, 0x9088, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9090_55_ff, NULL, 0x9090, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9098_55_ff, NULL, 0x9098, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a0_55_ff, NULL, 0x90a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_90a8_55_ff, NULL, 0x90a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b0_55_ff, NULL, 0x90b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90b8_55_ff, NULL, 0x90b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90b9_55_ff, NULL, 0x90b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90ba_55_ff, NULL, 0x90ba, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_90bb_55_ff, NULL, 0x90bb, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_90bc_55_ff, NULL, 0x90bc, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_90c0_50_ff, NULL, 0x90c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90c8_50_ff, NULL, 0x90c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d0_50_ff, NULL, 0x90d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90d8_50_ff, NULL, 0x90d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e0_50_ff, NULL, 0x90e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_90e8_50_ff, NULL, 0x90e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f0_54_ff, NULL, 0x90f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90f8_50_ff, NULL, 0x90f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90f9_50_ff, NULL, 0x90f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fa_50_ff, NULL, 0x90fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_90fb_54_ff, NULL, 0x90fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_90fc_50_ff, NULL, 0x90fc, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_9100_55_ff, NULL, 0x9100, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9108_55_ff, NULL, 0x9108, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9110_50_ff, NULL, 0x9110, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9118_50_ff, NULL, 0x9118, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9120_50_ff, NULL, 0x9120, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9128_50_ff, NULL, 0x9128, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9130_54_ff, NULL, 0x9130, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9138_50_ff, NULL, 0x9138, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9139_50_ff, NULL, 0x9139, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9140_55_ff, NULL, 0x9140, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9148_55_ff, NULL, 0x9148, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9150_50_ff, NULL, 0x9150, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9158_50_ff, NULL, 0x9158, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9160_50_ff, NULL, 0x9160, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9168_50_ff, NULL, 0x9168, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9170_54_ff, NULL, 0x9170, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_9178_50_ff, NULL, 0x9178, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_9179_50_ff, NULL, 0x9179, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_9180_55_ff, NULL, 0x9180, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9188_55_ff, NULL, 0x9188, 2, { 0, 0 }, 0 }, /* SUBX */ +{ op_9190_50_ff, NULL, 0x9190, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_9198_50_ff, NULL, 0x9198, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a0_50_ff, NULL, 0x91a0, 2, { 0, 0 }, 0 }, /* SUB */ +{ op_91a8_50_ff, NULL, 0x91a8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b0_54_ff, NULL, 0x91b0, 4, { 4, 0 }, 0 }, /* SUB */ +{ op_91b8_50_ff, NULL, 0x91b8, 4, { 0, 0 }, 0 }, /* SUB */ +{ op_91b9_50_ff, NULL, 0x91b9, 6, { 0, 0 }, 0 }, /* SUB */ +{ op_91c0_50_ff, NULL, 0x91c0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91c8_50_ff, NULL, 0x91c8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d0_50_ff, NULL, 0x91d0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91d8_50_ff, NULL, 0x91d8, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e0_50_ff, NULL, 0x91e0, 2, { 0, 0 }, 0 }, /* SUBA */ +{ op_91e8_50_ff, NULL, 0x91e8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f0_54_ff, NULL, 0x91f0, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91f8_50_ff, NULL, 0x91f8, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91f9_50_ff, NULL, 0x91f9, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fa_50_ff, NULL, 0x91fa, 4, { 0, 0 }, 0 }, /* SUBA */ +{ op_91fb_54_ff, NULL, 0x91fb, 4, { 4, 0 }, 0 }, /* SUBA */ +{ op_91fc_50_ff, NULL, 0x91fc, 6, { 0, 0 }, 0 }, /* SUBA */ +{ op_b000_50_ff, NULL, 0xb000, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b010_50_ff, NULL, 0xb010, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b018_50_ff, NULL, 0xb018, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b020_50_ff, NULL, 0xb020, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b028_50_ff, NULL, 0xb028, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b030_54_ff, NULL, 0xb030, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b038_50_ff, NULL, 0xb038, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b039_50_ff, NULL, 0xb039, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b03a_50_ff, NULL, 0xb03a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b03b_54_ff, NULL, 0xb03b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b03c_50_ff, NULL, 0xb03c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b040_50_ff, NULL, 0xb040, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b048_50_ff, NULL, 0xb048, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b050_50_ff, NULL, 0xb050, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b058_50_ff, NULL, 0xb058, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b060_50_ff, NULL, 0xb060, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b068_50_ff, NULL, 0xb068, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b070_54_ff, NULL, 0xb070, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b078_50_ff, NULL, 0xb078, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b079_50_ff, NULL, 0xb079, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b07a_50_ff, NULL, 0xb07a, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b07b_54_ff, NULL, 0xb07b, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b07c_50_ff, NULL, 0xb07c, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b080_50_ff, NULL, 0xb080, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b088_50_ff, NULL, 0xb088, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b090_50_ff, NULL, 0xb090, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b098_50_ff, NULL, 0xb098, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a0_50_ff, NULL, 0xb0a0, 2, { 0, 0 }, 0 }, /* CMP */ +{ op_b0a8_50_ff, NULL, 0xb0a8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b0_54_ff, NULL, 0xb0b0, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0b8_50_ff, NULL, 0xb0b8, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0b9_50_ff, NULL, 0xb0b9, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0ba_50_ff, NULL, 0xb0ba, 4, { 0, 0 }, 0 }, /* CMP */ +{ op_b0bb_54_ff, NULL, 0xb0bb, 4, { 4, 0 }, 0 }, /* CMP */ +{ op_b0bc_50_ff, NULL, 0xb0bc, 6, { 0, 0 }, 0 }, /* CMP */ +{ op_b0c0_50_ff, NULL, 0xb0c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0c8_50_ff, NULL, 0xb0c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d0_50_ff, NULL, 0xb0d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0d8_50_ff, NULL, 0xb0d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e0_50_ff, NULL, 0xb0e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0e8_50_ff, NULL, 0xb0e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f0_54_ff, NULL, 0xb0f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0f8_50_ff, NULL, 0xb0f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0f9_50_ff, NULL, 0xb0f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fa_50_ff, NULL, 0xb0fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b0fb_54_ff, NULL, 0xb0fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b0fc_50_ff, NULL, 0xb0fc, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b100_50_ff, NULL, 0xb100, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b108_50_ff, NULL, 0xb108, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b110_50_ff, NULL, 0xb110, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b118_50_ff, NULL, 0xb118, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b120_50_ff, NULL, 0xb120, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b128_50_ff, NULL, 0xb128, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b130_54_ff, NULL, 0xb130, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b138_50_ff, NULL, 0xb138, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b139_50_ff, NULL, 0xb139, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b140_50_ff, NULL, 0xb140, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b148_50_ff, NULL, 0xb148, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b150_50_ff, NULL, 0xb150, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b158_50_ff, NULL, 0xb158, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b160_50_ff, NULL, 0xb160, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b168_50_ff, NULL, 0xb168, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b170_54_ff, NULL, 0xb170, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b178_50_ff, NULL, 0xb178, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b179_50_ff, NULL, 0xb179, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b180_55_ff, NULL, 0xb180, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b188_50_ff, NULL, 0xb188, 2, { 0, 0 }, 0 }, /* CMPM */ +{ op_b190_50_ff, NULL, 0xb190, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b198_50_ff, NULL, 0xb198, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a0_50_ff, NULL, 0xb1a0, 2, { 0, 0 }, 0 }, /* EOR */ +{ op_b1a8_50_ff, NULL, 0xb1a8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b0_54_ff, NULL, 0xb1b0, 4, { 4, 0 }, 0 }, /* EOR */ +{ op_b1b8_50_ff, NULL, 0xb1b8, 4, { 0, 0 }, 0 }, /* EOR */ +{ op_b1b9_50_ff, NULL, 0xb1b9, 6, { 0, 0 }, 0 }, /* EOR */ +{ op_b1c0_50_ff, NULL, 0xb1c0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1c8_50_ff, NULL, 0xb1c8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d0_50_ff, NULL, 0xb1d0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1d8_50_ff, NULL, 0xb1d8, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e0_50_ff, NULL, 0xb1e0, 2, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1e8_50_ff, NULL, 0xb1e8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f0_54_ff, NULL, 0xb1f0, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1f8_50_ff, NULL, 0xb1f8, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1f9_50_ff, NULL, 0xb1f9, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fa_50_ff, NULL, 0xb1fa, 4, { 0, 0 }, 0 }, /* CMPA */ +{ op_b1fb_54_ff, NULL, 0xb1fb, 4, { 4, 0 }, 0 }, /* CMPA */ +{ op_b1fc_50_ff, NULL, 0xb1fc, 6, { 0, 0 }, 0 }, /* CMPA */ +{ op_c000_50_ff, NULL, 0xc000, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c010_50_ff, NULL, 0xc010, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c018_50_ff, NULL, 0xc018, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c020_50_ff, NULL, 0xc020, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c028_50_ff, NULL, 0xc028, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c030_54_ff, NULL, 0xc030, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c038_50_ff, NULL, 0xc038, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c039_50_ff, NULL, 0xc039, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c03a_50_ff, NULL, 0xc03a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c03b_54_ff, NULL, 0xc03b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c03c_50_ff, NULL, 0xc03c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c040_50_ff, NULL, 0xc040, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c050_50_ff, NULL, 0xc050, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c058_50_ff, NULL, 0xc058, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c060_50_ff, NULL, 0xc060, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c068_50_ff, NULL, 0xc068, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c070_54_ff, NULL, 0xc070, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c078_50_ff, NULL, 0xc078, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c079_50_ff, NULL, 0xc079, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c07a_50_ff, NULL, 0xc07a, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c07b_54_ff, NULL, 0xc07b, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c07c_50_ff, NULL, 0xc07c, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c080_55_ff, NULL, 0xc080, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c090_55_ff, NULL, 0xc090, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c098_55_ff, NULL, 0xc098, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a0_55_ff, NULL, 0xc0a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c0a8_55_ff, NULL, 0xc0a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b0_55_ff, NULL, 0xc0b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0b8_55_ff, NULL, 0xc0b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0b9_55_ff, NULL, 0xc0b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0ba_55_ff, NULL, 0xc0ba, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c0bb_55_ff, NULL, 0xc0bb, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c0bc_55_ff, NULL, 0xc0bc, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c0c0_54_ff, NULL, 0xc0c0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d0_54_ff, NULL, 0xc0d0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0d8_54_ff, NULL, 0xc0d8, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e0_54_ff, NULL, 0xc0e0, 2, { 0, 0 }, 0 }, /* MULU */ +{ op_c0e8_54_ff, NULL, 0xc0e8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f0_54_ff, NULL, 0xc0f0, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0f8_54_ff, NULL, 0xc0f8, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0f9_54_ff, NULL, 0xc0f9, 6, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fa_54_ff, NULL, 0xc0fa, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c0fb_54_ff, NULL, 0xc0fb, 4, { 4, 0 }, 0 }, /* MULU */ +{ op_c0fc_54_ff, NULL, 0xc0fc, 4, { 0, 0 }, 0 }, /* MULU */ +{ op_c100_54_ff, NULL, 0xc100, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c108_54_ff, NULL, 0xc108, 2, { 0, 0 }, 0 }, /* ABCD */ +{ op_c110_50_ff, NULL, 0xc110, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c118_50_ff, NULL, 0xc118, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c120_50_ff, NULL, 0xc120, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c128_50_ff, NULL, 0xc128, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c130_54_ff, NULL, 0xc130, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c138_50_ff, NULL, 0xc138, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c139_50_ff, NULL, 0xc139, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c140_50_ff, NULL, 0xc140, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c148_50_ff, NULL, 0xc148, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c150_50_ff, NULL, 0xc150, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c158_50_ff, NULL, 0xc158, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c160_50_ff, NULL, 0xc160, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c168_50_ff, NULL, 0xc168, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c170_54_ff, NULL, 0xc170, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c178_50_ff, NULL, 0xc178, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c179_50_ff, NULL, 0xc179, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c188_50_ff, NULL, 0xc188, 2, { 0, 0 }, 0 }, /* EXG */ +{ op_c190_50_ff, NULL, 0xc190, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c198_50_ff, NULL, 0xc198, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a0_50_ff, NULL, 0xc1a0, 2, { 0, 0 }, 0 }, /* AND */ +{ op_c1a8_50_ff, NULL, 0xc1a8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b0_54_ff, NULL, 0xc1b0, 4, { 4, 0 }, 0 }, /* AND */ +{ op_c1b8_50_ff, NULL, 0xc1b8, 4, { 0, 0 }, 0 }, /* AND */ +{ op_c1b9_50_ff, NULL, 0xc1b9, 6, { 0, 0 }, 0 }, /* AND */ +{ op_c1c0_54_ff, NULL, 0xc1c0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d0_54_ff, NULL, 0xc1d0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1d8_54_ff, NULL, 0xc1d8, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e0_54_ff, NULL, 0xc1e0, 2, { 0, 0 }, 0 }, /* MULS */ +{ op_c1e8_54_ff, NULL, 0xc1e8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f0_54_ff, NULL, 0xc1f0, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1f8_54_ff, NULL, 0xc1f8, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1f9_54_ff, NULL, 0xc1f9, 6, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fa_54_ff, NULL, 0xc1fa, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_c1fb_54_ff, NULL, 0xc1fb, 4, { 4, 0 }, 0 }, /* MULS */ +{ op_c1fc_54_ff, NULL, 0xc1fc, 4, { 0, 0 }, 0 }, /* MULS */ +{ op_d000_50_ff, NULL, 0xd000, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d010_50_ff, NULL, 0xd010, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d018_50_ff, NULL, 0xd018, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d020_50_ff, NULL, 0xd020, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d028_50_ff, NULL, 0xd028, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d030_54_ff, NULL, 0xd030, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d038_50_ff, NULL, 0xd038, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d039_50_ff, NULL, 0xd039, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d03a_50_ff, NULL, 0xd03a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d03b_54_ff, NULL, 0xd03b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d03c_50_ff, NULL, 0xd03c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d040_50_ff, NULL, 0xd040, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d048_50_ff, NULL, 0xd048, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d050_50_ff, NULL, 0xd050, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d058_50_ff, NULL, 0xd058, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d060_50_ff, NULL, 0xd060, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d068_50_ff, NULL, 0xd068, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d070_54_ff, NULL, 0xd070, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d078_50_ff, NULL, 0xd078, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d079_50_ff, NULL, 0xd079, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d07a_50_ff, NULL, 0xd07a, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d07b_54_ff, NULL, 0xd07b, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d07c_50_ff, NULL, 0xd07c, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d080_55_ff, NULL, 0xd080, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d088_55_ff, NULL, 0xd088, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d090_55_ff, NULL, 0xd090, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d098_55_ff, NULL, 0xd098, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a0_55_ff, NULL, 0xd0a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d0a8_55_ff, NULL, 0xd0a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b0_55_ff, NULL, 0xd0b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0b8_55_ff, NULL, 0xd0b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0b9_55_ff, NULL, 0xd0b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0ba_55_ff, NULL, 0xd0ba, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d0bb_55_ff, NULL, 0xd0bb, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d0bc_55_ff, NULL, 0xd0bc, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d0c0_50_ff, NULL, 0xd0c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0c8_50_ff, NULL, 0xd0c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d0_50_ff, NULL, 0xd0d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0d8_50_ff, NULL, 0xd0d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e0_50_ff, NULL, 0xd0e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0e8_50_ff, NULL, 0xd0e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f0_54_ff, NULL, 0xd0f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0f8_50_ff, NULL, 0xd0f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0f9_50_ff, NULL, 0xd0f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fa_50_ff, NULL, 0xd0fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d0fb_54_ff, NULL, 0xd0fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d0fc_50_ff, NULL, 0xd0fc, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d100_55_ff, NULL, 0xd100, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d108_55_ff, NULL, 0xd108, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d110_50_ff, NULL, 0xd110, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d118_50_ff, NULL, 0xd118, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d120_50_ff, NULL, 0xd120, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d128_50_ff, NULL, 0xd128, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d130_54_ff, NULL, 0xd130, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d138_50_ff, NULL, 0xd138, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d139_50_ff, NULL, 0xd139, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d140_55_ff, NULL, 0xd140, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d148_55_ff, NULL, 0xd148, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d150_50_ff, NULL, 0xd150, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d158_50_ff, NULL, 0xd158, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d160_50_ff, NULL, 0xd160, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d168_50_ff, NULL, 0xd168, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d170_54_ff, NULL, 0xd170, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d178_50_ff, NULL, 0xd178, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d179_50_ff, NULL, 0xd179, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d180_55_ff, NULL, 0xd180, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d188_55_ff, NULL, 0xd188, 2, { 0, 0 }, 0 }, /* ADDX */ +{ op_d190_50_ff, NULL, 0xd190, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d198_50_ff, NULL, 0xd198, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a0_50_ff, NULL, 0xd1a0, 2, { 0, 0 }, 0 }, /* ADD */ +{ op_d1a8_50_ff, NULL, 0xd1a8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b0_54_ff, NULL, 0xd1b0, 4, { 4, 0 }, 0 }, /* ADD */ +{ op_d1b8_50_ff, NULL, 0xd1b8, 4, { 0, 0 }, 0 }, /* ADD */ +{ op_d1b9_50_ff, NULL, 0xd1b9, 6, { 0, 0 }, 0 }, /* ADD */ +{ op_d1c0_50_ff, NULL, 0xd1c0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1c8_50_ff, NULL, 0xd1c8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d0_50_ff, NULL, 0xd1d0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1d8_50_ff, NULL, 0xd1d8, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e0_50_ff, NULL, 0xd1e0, 2, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1e8_50_ff, NULL, 0xd1e8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f0_54_ff, NULL, 0xd1f0, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1f8_50_ff, NULL, 0xd1f8, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1f9_50_ff, NULL, 0xd1f9, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fa_50_ff, NULL, 0xd1fa, 4, { 0, 0 }, 0 }, /* ADDA */ +{ op_d1fb_54_ff, NULL, 0xd1fb, 4, { 4, 0 }, 0 }, /* ADDA */ +{ op_d1fc_50_ff, NULL, 0xd1fc, 6, { 0, 0 }, 0 }, /* ADDA */ +{ op_e000_54_ff, NULL, 0xe000, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e008_54_ff, NULL, 0xe008, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e010_54_ff, NULL, 0xe010, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e018_54_ff, NULL, 0xe018, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e020_54_ff, NULL, 0xe020, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e028_54_ff, NULL, 0xe028, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e030_54_ff, NULL, 0xe030, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e038_54_ff, NULL, 0xe038, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e040_54_ff, NULL, 0xe040, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e048_54_ff, NULL, 0xe048, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e050_54_ff, NULL, 0xe050, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e058_54_ff, NULL, 0xe058, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e060_54_ff, NULL, 0xe060, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e068_54_ff, NULL, 0xe068, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e070_54_ff, NULL, 0xe070, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e078_54_ff, NULL, 0xe078, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e080_54_ff, NULL, 0xe080, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e088_54_ff, NULL, 0xe088, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e090_54_ff, NULL, 0xe090, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e098_54_ff, NULL, 0xe098, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0a0_54_ff, NULL, 0xe0a0, 2, { 0, 0 }, 0 }, /* ASR */ +{ op_e0a8_54_ff, NULL, 0xe0a8, 2, { 0, 0 }, 0 }, /* LSR */ +{ op_e0b0_54_ff, NULL, 0xe0b0, 2, { 0, 0 }, 0 }, /* ROXR */ +{ op_e0b8_54_ff, NULL, 0xe0b8, 2, { 0, 0 }, 0 }, /* ROR */ +{ op_e0d0_50_ff, NULL, 0xe0d0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0d8_50_ff, NULL, 0xe0d8, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e0_50_ff, NULL, 0xe0e0, 2, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0e8_50_ff, NULL, 0xe0e8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f0_54_ff, NULL, 0xe0f0, 4, { 4, 0 }, 0 }, /* ASRW */ +{ op_e0f8_50_ff, NULL, 0xe0f8, 4, { 0, 0 }, 0 }, /* ASRW */ +{ op_e0f9_50_ff, NULL, 0xe0f9, 6, { 0, 0 }, 0 }, /* ASRW */ +{ op_e100_54_ff, NULL, 0xe100, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e108_54_ff, NULL, 0xe108, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e110_54_ff, NULL, 0xe110, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e118_54_ff, NULL, 0xe118, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e120_54_ff, NULL, 0xe120, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e128_54_ff, NULL, 0xe128, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e130_54_ff, NULL, 0xe130, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e138_54_ff, NULL, 0xe138, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e140_54_ff, NULL, 0xe140, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e148_54_ff, NULL, 0xe148, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e150_54_ff, NULL, 0xe150, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e158_54_ff, NULL, 0xe158, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e160_54_ff, NULL, 0xe160, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e168_54_ff, NULL, 0xe168, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e170_54_ff, NULL, 0xe170, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e178_54_ff, NULL, 0xe178, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e180_54_ff, NULL, 0xe180, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e188_54_ff, NULL, 0xe188, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e190_54_ff, NULL, 0xe190, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e198_54_ff, NULL, 0xe198, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1a0_54_ff, NULL, 0xe1a0, 2, { 0, 0 }, 0 }, /* ASL */ +{ op_e1a8_54_ff, NULL, 0xe1a8, 2, { 0, 0 }, 0 }, /* LSL */ +{ op_e1b0_54_ff, NULL, 0xe1b0, 2, { 0, 0 }, 0 }, /* ROXL */ +{ op_e1b8_54_ff, NULL, 0xe1b8, 2, { 0, 0 }, 0 }, /* ROL */ +{ op_e1d0_50_ff, NULL, 0xe1d0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1d8_50_ff, NULL, 0xe1d8, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e0_50_ff, NULL, 0xe1e0, 2, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1e8_50_ff, NULL, 0xe1e8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f0_54_ff, NULL, 0xe1f0, 4, { 4, 0 }, 0 }, /* ASLW */ +{ op_e1f8_50_ff, NULL, 0xe1f8, 4, { 0, 0 }, 0 }, /* ASLW */ +{ op_e1f9_50_ff, NULL, 0xe1f9, 6, { 0, 0 }, 0 }, /* ASLW */ +{ op_e2d0_50_ff, NULL, 0xe2d0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2d8_50_ff, NULL, 0xe2d8, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e0_50_ff, NULL, 0xe2e0, 2, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2e8_50_ff, NULL, 0xe2e8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f0_54_ff, NULL, 0xe2f0, 4, { 4, 0 }, 0 }, /* LSRW */ +{ op_e2f8_50_ff, NULL, 0xe2f8, 4, { 0, 0 }, 0 }, /* LSRW */ +{ op_e2f9_50_ff, NULL, 0xe2f9, 6, { 0, 0 }, 0 }, /* LSRW */ +{ op_e3d0_50_ff, NULL, 0xe3d0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3d8_50_ff, NULL, 0xe3d8, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e0_50_ff, NULL, 0xe3e0, 2, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3e8_50_ff, NULL, 0xe3e8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f0_54_ff, NULL, 0xe3f0, 4, { 4, 0 }, 0 }, /* LSLW */ +{ op_e3f8_50_ff, NULL, 0xe3f8, 4, { 0, 0 }, 0 }, /* LSLW */ +{ op_e3f9_50_ff, NULL, 0xe3f9, 6, { 0, 0 }, 0 }, /* LSLW */ +{ op_e4d0_50_ff, NULL, 0xe4d0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4d8_50_ff, NULL, 0xe4d8, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e0_50_ff, NULL, 0xe4e0, 2, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4e8_50_ff, NULL, 0xe4e8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f0_54_ff, NULL, 0xe4f0, 4, { 4, 0 }, 0 }, /* ROXRW */ +{ op_e4f8_50_ff, NULL, 0xe4f8, 4, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e4f9_50_ff, NULL, 0xe4f9, 6, { 0, 0 }, 0 }, /* ROXRW */ +{ op_e5d0_50_ff, NULL, 0xe5d0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5d8_50_ff, NULL, 0xe5d8, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e0_50_ff, NULL, 0xe5e0, 2, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5e8_50_ff, NULL, 0xe5e8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f0_54_ff, NULL, 0xe5f0, 4, { 4, 0 }, 0 }, /* ROXLW */ +{ op_e5f8_50_ff, NULL, 0xe5f8, 4, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e5f9_50_ff, NULL, 0xe5f9, 6, { 0, 0 }, 0 }, /* ROXLW */ +{ op_e6d0_50_ff, NULL, 0xe6d0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6d8_50_ff, NULL, 0xe6d8, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e0_50_ff, NULL, 0xe6e0, 2, { 0, 0 }, 0 }, /* RORW */ +{ op_e6e8_50_ff, NULL, 0xe6e8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f0_54_ff, NULL, 0xe6f0, 4, { 4, 0 }, 0 }, /* RORW */ +{ op_e6f8_50_ff, NULL, 0xe6f8, 4, { 0, 0 }, 0 }, /* RORW */ +{ op_e6f9_50_ff, NULL, 0xe6f9, 6, { 0, 0 }, 0 }, /* RORW */ +{ op_e7d0_50_ff, NULL, 0xe7d0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7d8_50_ff, NULL, 0xe7d8, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e0_50_ff, NULL, 0xe7e0, 2, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7e8_50_ff, NULL, 0xe7e8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f0_54_ff, NULL, 0xe7f0, 4, { 4, 0 }, 0 }, /* ROLW */ +{ op_e7f8_50_ff, NULL, 0xe7f8, 4, { 0, 0 }, 0 }, /* ROLW */ +{ op_e7f9_50_ff, NULL, 0xe7f9, 6, { 0, 0 }, 0 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_68000_ONLY */ diff --git a/cputbl.h b/cputbl.h new file mode 100644 index 00000000..eba23c6d --- /dev/null +++ b/cputbl.h @@ -0,0 +1,69295 @@ +#define HARDWARE_BUS_ERROR_EMULATION 1 +extern cpuop_func op_0000_0_nf; +extern cpuop_func op_0000_0_ff; +extern cpuop_func op_0010_0_nf; +extern cpuop_func op_0010_0_ff; +extern cpuop_func op_0018_0_nf; +extern cpuop_func op_0018_0_ff; +extern cpuop_func op_0020_0_nf; +extern cpuop_func op_0020_0_ff; +extern cpuop_func op_0028_0_nf; +extern cpuop_func op_0028_0_ff; +extern cpuop_func op_0030_0_nf; +extern cpuop_func op_0030_0_ff; +extern cpuop_func op_0038_0_nf; +extern cpuop_func op_0038_0_ff; +extern cpuop_func op_0039_0_nf; +extern cpuop_func op_0039_0_ff; +extern cpuop_func op_003c_0_nf; +extern cpuop_func op_003c_0_ff; +extern cpuop_func op_0040_0_nf; +extern cpuop_func op_0040_0_ff; +extern cpuop_func op_0050_0_nf; +extern cpuop_func op_0050_0_ff; +extern cpuop_func op_0058_0_nf; +extern cpuop_func op_0058_0_ff; +extern cpuop_func op_0060_0_nf; +extern cpuop_func op_0060_0_ff; +extern cpuop_func op_0068_0_nf; +extern cpuop_func op_0068_0_ff; +extern cpuop_func op_0070_0_nf; +extern cpuop_func op_0070_0_ff; +extern cpuop_func op_0078_0_nf; +extern cpuop_func op_0078_0_ff; +extern cpuop_func op_0079_0_nf; +extern cpuop_func op_0079_0_ff; +extern cpuop_func op_007c_0_nf; +extern cpuop_func op_007c_0_ff; +extern cpuop_func op_0080_0_nf; +extern cpuop_func op_0080_0_ff; +extern cpuop_func op_0090_0_nf; +extern cpuop_func op_0090_0_ff; +extern cpuop_func op_0098_0_nf; +extern cpuop_func op_0098_0_ff; +extern cpuop_func op_00a0_0_nf; +extern cpuop_func op_00a0_0_ff; +extern cpuop_func op_00a8_0_nf; +extern cpuop_func op_00a8_0_ff; +extern cpuop_func op_00b0_0_nf; +extern cpuop_func op_00b0_0_ff; +extern cpuop_func op_00b8_0_nf; +extern cpuop_func op_00b8_0_ff; +extern cpuop_func op_00b9_0_nf; +extern cpuop_func op_00b9_0_ff; +extern cpuop_func op_00d0_0_nf; +extern cpuop_func op_00d0_0_ff; +extern cpuop_func op_00e8_0_nf; +extern cpuop_func op_00e8_0_ff; +extern cpuop_func op_00f0_0_nf; +extern cpuop_func op_00f0_0_ff; +extern cpuop_func op_00f8_0_nf; +extern cpuop_func op_00f8_0_ff; +extern cpuop_func op_00f9_0_nf; +extern cpuop_func op_00f9_0_ff; +extern cpuop_func op_00fa_0_nf; +extern cpuop_func op_00fa_0_ff; +extern cpuop_func op_00fb_0_nf; +extern cpuop_func op_00fb_0_ff; +extern cpuop_func op_0100_0_nf; +extern cpuop_func op_0100_0_ff; +extern cpuop_func op_0108_0_nf; +extern cpuop_func op_0108_0_ff; +extern cpuop_func op_0110_0_nf; +extern cpuop_func op_0110_0_ff; +extern cpuop_func op_0118_0_nf; +extern cpuop_func op_0118_0_ff; +extern cpuop_func op_0120_0_nf; +extern cpuop_func op_0120_0_ff; +extern cpuop_func op_0128_0_nf; +extern cpuop_func op_0128_0_ff; +extern cpuop_func op_0130_0_nf; +extern cpuop_func op_0130_0_ff; +extern cpuop_func op_0138_0_nf; +extern cpuop_func op_0138_0_ff; +extern cpuop_func op_0139_0_nf; +extern cpuop_func op_0139_0_ff; +extern cpuop_func op_013a_0_nf; +extern cpuop_func op_013a_0_ff; +extern cpuop_func op_013b_0_nf; +extern cpuop_func op_013b_0_ff; +extern cpuop_func op_013c_0_nf; +extern cpuop_func op_013c_0_ff; +extern cpuop_func op_0140_0_nf; +extern cpuop_func op_0140_0_ff; +extern cpuop_func op_0148_0_nf; +extern cpuop_func op_0148_0_ff; +extern cpuop_func op_0150_0_nf; +extern cpuop_func op_0150_0_ff; +extern cpuop_func op_0158_0_nf; +extern cpuop_func op_0158_0_ff; +extern cpuop_func op_0160_0_nf; +extern cpuop_func op_0160_0_ff; +extern cpuop_func op_0168_0_nf; +extern cpuop_func op_0168_0_ff; +extern cpuop_func op_0170_0_nf; +extern cpuop_func op_0170_0_ff; +extern cpuop_func op_0178_0_nf; +extern cpuop_func op_0178_0_ff; +extern cpuop_func op_0179_0_nf; +extern cpuop_func op_0179_0_ff; +extern cpuop_func op_0180_0_nf; +extern cpuop_func op_0180_0_ff; +extern cpuop_func op_0188_0_nf; +extern cpuop_func op_0188_0_ff; +extern cpuop_func op_0190_0_nf; +extern cpuop_func op_0190_0_ff; +extern cpuop_func op_0198_0_nf; +extern cpuop_func op_0198_0_ff; +extern cpuop_func op_01a0_0_nf; +extern cpuop_func op_01a0_0_ff; +extern cpuop_func op_01a8_0_nf; +extern cpuop_func op_01a8_0_ff; +extern cpuop_func op_01b0_0_nf; +extern cpuop_func op_01b0_0_ff; +extern cpuop_func op_01b8_0_nf; +extern cpuop_func op_01b8_0_ff; +extern cpuop_func op_01b9_0_nf; +extern cpuop_func op_01b9_0_ff; +extern cpuop_func op_01c0_0_nf; +extern cpuop_func op_01c0_0_ff; +extern cpuop_func op_01c8_0_nf; +extern cpuop_func op_01c8_0_ff; +extern cpuop_func op_01d0_0_nf; +extern cpuop_func op_01d0_0_ff; +extern cpuop_func op_01d8_0_nf; +extern cpuop_func op_01d8_0_ff; +extern cpuop_func op_01e0_0_nf; +extern cpuop_func op_01e0_0_ff; +extern cpuop_func op_01e8_0_nf; +extern cpuop_func op_01e8_0_ff; +extern cpuop_func op_01f0_0_nf; +extern cpuop_func op_01f0_0_ff; +extern cpuop_func op_01f8_0_nf; +extern cpuop_func op_01f8_0_ff; +extern cpuop_func op_01f9_0_nf; +extern cpuop_func op_01f9_0_ff; +extern cpuop_func op_0200_0_nf; +extern cpuop_func op_0200_0_ff; +extern cpuop_func op_0210_0_nf; +extern cpuop_func op_0210_0_ff; +extern cpuop_func op_0218_0_nf; +extern cpuop_func op_0218_0_ff; +extern cpuop_func op_0220_0_nf; +extern cpuop_func op_0220_0_ff; +extern cpuop_func op_0228_0_nf; +extern cpuop_func op_0228_0_ff; +extern cpuop_func op_0230_0_nf; +extern cpuop_func op_0230_0_ff; +extern cpuop_func op_0238_0_nf; +extern cpuop_func op_0238_0_ff; +extern cpuop_func op_0239_0_nf; +extern cpuop_func op_0239_0_ff; +extern cpuop_func op_023c_0_nf; +extern cpuop_func op_023c_0_ff; +extern cpuop_func op_0240_0_nf; +extern cpuop_func op_0240_0_ff; +extern cpuop_func op_0250_0_nf; +extern cpuop_func op_0250_0_ff; +extern cpuop_func op_0258_0_nf; +extern cpuop_func op_0258_0_ff; +extern cpuop_func op_0260_0_nf; +extern cpuop_func op_0260_0_ff; +extern cpuop_func op_0268_0_nf; +extern cpuop_func op_0268_0_ff; +extern cpuop_func op_0270_0_nf; +extern cpuop_func op_0270_0_ff; +extern cpuop_func op_0278_0_nf; +extern cpuop_func op_0278_0_ff; +extern cpuop_func op_0279_0_nf; +extern cpuop_func op_0279_0_ff; +extern cpuop_func op_027c_0_nf; +extern cpuop_func op_027c_0_ff; +extern cpuop_func op_0280_0_nf; +extern cpuop_func op_0280_0_ff; +extern cpuop_func op_0290_0_nf; +extern cpuop_func op_0290_0_ff; +extern cpuop_func op_0298_0_nf; +extern cpuop_func op_0298_0_ff; +extern cpuop_func op_02a0_0_nf; +extern cpuop_func op_02a0_0_ff; +extern cpuop_func op_02a8_0_nf; +extern cpuop_func op_02a8_0_ff; +extern cpuop_func op_02b0_0_nf; +extern cpuop_func op_02b0_0_ff; +extern cpuop_func op_02b8_0_nf; +extern cpuop_func op_02b8_0_ff; +extern cpuop_func op_02b9_0_nf; +extern cpuop_func op_02b9_0_ff; +extern cpuop_func op_02d0_0_nf; +extern cpuop_func op_02d0_0_ff; +extern cpuop_func op_02e8_0_nf; +extern cpuop_func op_02e8_0_ff; +extern cpuop_func op_02f0_0_nf; +extern cpuop_func op_02f0_0_ff; +extern cpuop_func op_02f8_0_nf; +extern cpuop_func op_02f8_0_ff; +extern cpuop_func op_02f9_0_nf; +extern cpuop_func op_02f9_0_ff; +extern cpuop_func op_02fa_0_nf; +extern cpuop_func op_02fa_0_ff; +extern cpuop_func op_02fb_0_nf; +extern cpuop_func op_02fb_0_ff; +extern cpuop_func op_0400_0_nf; +extern cpuop_func op_0400_0_ff; +extern cpuop_func op_0410_0_nf; +extern cpuop_func op_0410_0_ff; +extern cpuop_func op_0418_0_nf; +extern cpuop_func op_0418_0_ff; +extern cpuop_func op_0420_0_nf; +extern cpuop_func op_0420_0_ff; +extern cpuop_func op_0428_0_nf; +extern cpuop_func op_0428_0_ff; +extern cpuop_func op_0430_0_nf; +extern cpuop_func op_0430_0_ff; +extern cpuop_func op_0438_0_nf; +extern cpuop_func op_0438_0_ff; +extern cpuop_func op_0439_0_nf; +extern cpuop_func op_0439_0_ff; +extern cpuop_func op_0440_0_nf; +extern cpuop_func op_0440_0_ff; +extern cpuop_func op_0450_0_nf; +extern cpuop_func op_0450_0_ff; +extern cpuop_func op_0458_0_nf; +extern cpuop_func op_0458_0_ff; +extern cpuop_func op_0460_0_nf; +extern cpuop_func op_0460_0_ff; +extern cpuop_func op_0468_0_nf; +extern cpuop_func op_0468_0_ff; +extern cpuop_func op_0470_0_nf; +extern cpuop_func op_0470_0_ff; +extern cpuop_func op_0478_0_nf; +extern cpuop_func op_0478_0_ff; +extern cpuop_func op_0479_0_nf; +extern cpuop_func op_0479_0_ff; +extern cpuop_func op_0480_0_nf; +extern cpuop_func op_0480_0_ff; +extern cpuop_func op_0490_0_nf; +extern cpuop_func op_0490_0_ff; +extern cpuop_func op_0498_0_nf; +extern cpuop_func op_0498_0_ff; +extern cpuop_func op_04a0_0_nf; +extern cpuop_func op_04a0_0_ff; +extern cpuop_func op_04a8_0_nf; +extern cpuop_func op_04a8_0_ff; +extern cpuop_func op_04b0_0_nf; +extern cpuop_func op_04b0_0_ff; +extern cpuop_func op_04b8_0_nf; +extern cpuop_func op_04b8_0_ff; +extern cpuop_func op_04b9_0_nf; +extern cpuop_func op_04b9_0_ff; +extern cpuop_func op_04d0_0_nf; +extern cpuop_func op_04d0_0_ff; +extern cpuop_func op_04e8_0_nf; +extern cpuop_func op_04e8_0_ff; +extern cpuop_func op_04f0_0_nf; +extern cpuop_func op_04f0_0_ff; +extern cpuop_func op_04f8_0_nf; +extern cpuop_func op_04f8_0_ff; +extern cpuop_func op_04f9_0_nf; +extern cpuop_func op_04f9_0_ff; +extern cpuop_func op_04fa_0_nf; +extern cpuop_func op_04fa_0_ff; +extern cpuop_func op_04fb_0_nf; +extern cpuop_func op_04fb_0_ff; +extern cpuop_func op_0600_0_nf; +extern cpuop_func op_0600_0_ff; +extern cpuop_func op_0610_0_nf; +extern cpuop_func op_0610_0_ff; +extern cpuop_func op_0618_0_nf; +extern cpuop_func op_0618_0_ff; +extern cpuop_func op_0620_0_nf; +extern cpuop_func op_0620_0_ff; +extern cpuop_func op_0628_0_nf; +extern cpuop_func op_0628_0_ff; +extern cpuop_func op_0630_0_nf; +extern cpuop_func op_0630_0_ff; +extern cpuop_func op_0638_0_nf; +extern cpuop_func op_0638_0_ff; +extern cpuop_func op_0639_0_nf; +extern cpuop_func op_0639_0_ff; +extern cpuop_func op_0640_0_nf; +extern cpuop_func op_0640_0_ff; +extern cpuop_func op_0650_0_nf; +extern cpuop_func op_0650_0_ff; +extern cpuop_func op_0658_0_nf; +extern cpuop_func op_0658_0_ff; +extern cpuop_func op_0660_0_nf; +extern cpuop_func op_0660_0_ff; +extern cpuop_func op_0668_0_nf; +extern cpuop_func op_0668_0_ff; +extern cpuop_func op_0670_0_nf; +extern cpuop_func op_0670_0_ff; +extern cpuop_func op_0678_0_nf; +extern cpuop_func op_0678_0_ff; +extern cpuop_func op_0679_0_nf; +extern cpuop_func op_0679_0_ff; +extern cpuop_func op_0680_0_nf; +extern cpuop_func op_0680_0_ff; +extern cpuop_func op_0690_0_nf; +extern cpuop_func op_0690_0_ff; +extern cpuop_func op_0698_0_nf; +extern cpuop_func op_0698_0_ff; +extern cpuop_func op_06a0_0_nf; +extern cpuop_func op_06a0_0_ff; +extern cpuop_func op_06a8_0_nf; +extern cpuop_func op_06a8_0_ff; +extern cpuop_func op_06b0_0_nf; +extern cpuop_func op_06b0_0_ff; +extern cpuop_func op_06b8_0_nf; +extern cpuop_func op_06b8_0_ff; +extern cpuop_func op_06b9_0_nf; +extern cpuop_func op_06b9_0_ff; +extern cpuop_func op_06c0_0_nf; +extern cpuop_func op_06c0_0_ff; +extern cpuop_func op_06c8_0_nf; +extern cpuop_func op_06c8_0_ff; +extern cpuop_func op_06d0_0_nf; +extern cpuop_func op_06d0_0_ff; +extern cpuop_func op_06e8_0_nf; +extern cpuop_func op_06e8_0_ff; +extern cpuop_func op_06f0_0_nf; +extern cpuop_func op_06f0_0_ff; +extern cpuop_func op_06f8_0_nf; +extern cpuop_func op_06f8_0_ff; +extern cpuop_func op_06f9_0_nf; +extern cpuop_func op_06f9_0_ff; +extern cpuop_func op_06fa_0_nf; +extern cpuop_func op_06fa_0_ff; +extern cpuop_func op_06fb_0_nf; +extern cpuop_func op_06fb_0_ff; +extern cpuop_func op_0800_0_nf; +extern cpuop_func op_0800_0_ff; +extern cpuop_func op_0810_0_nf; +extern cpuop_func op_0810_0_ff; +extern cpuop_func op_0818_0_nf; +extern cpuop_func op_0818_0_ff; +extern cpuop_func op_0820_0_nf; +extern cpuop_func op_0820_0_ff; +extern cpuop_func op_0828_0_nf; +extern cpuop_func op_0828_0_ff; +extern cpuop_func op_0830_0_nf; +extern cpuop_func op_0830_0_ff; +extern cpuop_func op_0838_0_nf; +extern cpuop_func op_0838_0_ff; +extern cpuop_func op_0839_0_nf; +extern cpuop_func op_0839_0_ff; +extern cpuop_func op_083a_0_nf; +extern cpuop_func op_083a_0_ff; +extern cpuop_func op_083b_0_nf; +extern cpuop_func op_083b_0_ff; +extern cpuop_func op_0840_0_nf; +extern cpuop_func op_0840_0_ff; +extern cpuop_func op_0850_0_nf; +extern cpuop_func op_0850_0_ff; +extern cpuop_func op_0858_0_nf; +extern cpuop_func op_0858_0_ff; +extern cpuop_func op_0860_0_nf; +extern cpuop_func op_0860_0_ff; +extern cpuop_func op_0868_0_nf; +extern cpuop_func op_0868_0_ff; +extern cpuop_func op_0870_0_nf; +extern cpuop_func op_0870_0_ff; +extern cpuop_func op_0878_0_nf; +extern cpuop_func op_0878_0_ff; +extern cpuop_func op_0879_0_nf; +extern cpuop_func op_0879_0_ff; +extern cpuop_func op_0880_0_nf; +extern cpuop_func op_0880_0_ff; +extern cpuop_func op_0890_0_nf; +extern cpuop_func op_0890_0_ff; +extern cpuop_func op_0898_0_nf; +extern cpuop_func op_0898_0_ff; +extern cpuop_func op_08a0_0_nf; +extern cpuop_func op_08a0_0_ff; +extern cpuop_func op_08a8_0_nf; +extern cpuop_func op_08a8_0_ff; +extern cpuop_func op_08b0_0_nf; +extern cpuop_func op_08b0_0_ff; +extern cpuop_func op_08b8_0_nf; +extern cpuop_func op_08b8_0_ff; +extern cpuop_func op_08b9_0_nf; +extern cpuop_func op_08b9_0_ff; +extern cpuop_func op_08c0_0_nf; +extern cpuop_func op_08c0_0_ff; +extern cpuop_func op_08d0_0_nf; +extern cpuop_func op_08d0_0_ff; +extern cpuop_func op_08d8_0_nf; +extern cpuop_func op_08d8_0_ff; +extern cpuop_func op_08e0_0_nf; +extern cpuop_func op_08e0_0_ff; +extern cpuop_func op_08e8_0_nf; +extern cpuop_func op_08e8_0_ff; +extern cpuop_func op_08f0_0_nf; +extern cpuop_func op_08f0_0_ff; +extern cpuop_func op_08f8_0_nf; +extern cpuop_func op_08f8_0_ff; +extern cpuop_func op_08f9_0_nf; +extern cpuop_func op_08f9_0_ff; +extern cpuop_func op_0a00_0_nf; +extern cpuop_func op_0a00_0_ff; +extern cpuop_func op_0a10_0_nf; +extern cpuop_func op_0a10_0_ff; +extern cpuop_func op_0a18_0_nf; +extern cpuop_func op_0a18_0_ff; +extern cpuop_func op_0a20_0_nf; +extern cpuop_func op_0a20_0_ff; +extern cpuop_func op_0a28_0_nf; +extern cpuop_func op_0a28_0_ff; +extern cpuop_func op_0a30_0_nf; +extern cpuop_func op_0a30_0_ff; +extern cpuop_func op_0a38_0_nf; +extern cpuop_func op_0a38_0_ff; +extern cpuop_func op_0a39_0_nf; +extern cpuop_func op_0a39_0_ff; +extern cpuop_func op_0a3c_0_nf; +extern cpuop_func op_0a3c_0_ff; +extern cpuop_func op_0a40_0_nf; +extern cpuop_func op_0a40_0_ff; +extern cpuop_func op_0a50_0_nf; +extern cpuop_func op_0a50_0_ff; +extern cpuop_func op_0a58_0_nf; +extern cpuop_func op_0a58_0_ff; +extern cpuop_func op_0a60_0_nf; +extern cpuop_func op_0a60_0_ff; +extern cpuop_func op_0a68_0_nf; +extern cpuop_func op_0a68_0_ff; +extern cpuop_func op_0a70_0_nf; +extern cpuop_func op_0a70_0_ff; +extern cpuop_func op_0a78_0_nf; +extern cpuop_func op_0a78_0_ff; +extern cpuop_func op_0a79_0_nf; +extern cpuop_func op_0a79_0_ff; +extern cpuop_func op_0a7c_0_nf; +extern cpuop_func op_0a7c_0_ff; +extern cpuop_func op_0a80_0_nf; +extern cpuop_func op_0a80_0_ff; +extern cpuop_func op_0a90_0_nf; +extern cpuop_func op_0a90_0_ff; +extern cpuop_func op_0a98_0_nf; +extern cpuop_func op_0a98_0_ff; +extern cpuop_func op_0aa0_0_nf; +extern cpuop_func op_0aa0_0_ff; +extern cpuop_func op_0aa8_0_nf; +extern cpuop_func op_0aa8_0_ff; +extern cpuop_func op_0ab0_0_nf; +extern cpuop_func op_0ab0_0_ff; +extern cpuop_func op_0ab8_0_nf; +extern cpuop_func op_0ab8_0_ff; +extern cpuop_func op_0ab9_0_nf; +extern cpuop_func op_0ab9_0_ff; +extern cpuop_func op_0ad0_0_nf; +extern cpuop_func op_0ad0_0_ff; +extern cpuop_func op_0ad8_0_nf; +extern cpuop_func op_0ad8_0_ff; +extern cpuop_func op_0ae0_0_nf; +extern cpuop_func op_0ae0_0_ff; +extern cpuop_func op_0ae8_0_nf; +extern cpuop_func op_0ae8_0_ff; +extern cpuop_func op_0af0_0_nf; +extern cpuop_func op_0af0_0_ff; +extern cpuop_func op_0af8_0_nf; +extern cpuop_func op_0af8_0_ff; +extern cpuop_func op_0af9_0_nf; +extern cpuop_func op_0af9_0_ff; +extern cpuop_func op_0c00_0_nf; +extern cpuop_func op_0c00_0_ff; +extern cpuop_func op_0c10_0_nf; +extern cpuop_func op_0c10_0_ff; +extern cpuop_func op_0c18_0_nf; +extern cpuop_func op_0c18_0_ff; +extern cpuop_func op_0c20_0_nf; +extern cpuop_func op_0c20_0_ff; +extern cpuop_func op_0c28_0_nf; +extern cpuop_func op_0c28_0_ff; +extern cpuop_func op_0c30_0_nf; +extern cpuop_func op_0c30_0_ff; +extern cpuop_func op_0c38_0_nf; +extern cpuop_func op_0c38_0_ff; +extern cpuop_func op_0c39_0_nf; +extern cpuop_func op_0c39_0_ff; +extern cpuop_func op_0c3a_0_nf; +extern cpuop_func op_0c3a_0_ff; +extern cpuop_func op_0c3b_0_nf; +extern cpuop_func op_0c3b_0_ff; +extern cpuop_func op_0c40_0_nf; +extern cpuop_func op_0c40_0_ff; +extern cpuop_func op_0c50_0_nf; +extern cpuop_func op_0c50_0_ff; +extern cpuop_func op_0c58_0_nf; +extern cpuop_func op_0c58_0_ff; +extern cpuop_func op_0c60_0_nf; +extern cpuop_func op_0c60_0_ff; +extern cpuop_func op_0c68_0_nf; +extern cpuop_func op_0c68_0_ff; +extern cpuop_func op_0c70_0_nf; +extern cpuop_func op_0c70_0_ff; +extern cpuop_func op_0c78_0_nf; +extern cpuop_func op_0c78_0_ff; +extern cpuop_func op_0c79_0_nf; +extern cpuop_func op_0c79_0_ff; +extern cpuop_func op_0c7a_0_nf; +extern cpuop_func op_0c7a_0_ff; +extern cpuop_func op_0c7b_0_nf; +extern cpuop_func op_0c7b_0_ff; +extern cpuop_func op_0c80_0_nf; +extern cpuop_func op_0c80_0_ff; +extern cpuop_func op_0c90_0_nf; +extern cpuop_func op_0c90_0_ff; +extern cpuop_func op_0c98_0_nf; +extern cpuop_func op_0c98_0_ff; +extern cpuop_func op_0ca0_0_nf; +extern cpuop_func op_0ca0_0_ff; +extern cpuop_func op_0ca8_0_nf; +extern cpuop_func op_0ca8_0_ff; +extern cpuop_func op_0cb0_0_nf; +extern cpuop_func op_0cb0_0_ff; +extern cpuop_func op_0cb8_0_nf; +extern cpuop_func op_0cb8_0_ff; +extern cpuop_func op_0cb9_0_nf; +extern cpuop_func op_0cb9_0_ff; +extern cpuop_func op_0cba_0_nf; +extern cpuop_func op_0cba_0_ff; +extern cpuop_func op_0cbb_0_nf; +extern cpuop_func op_0cbb_0_ff; +extern cpuop_func op_0cd0_0_nf; +extern cpuop_func op_0cd0_0_ff; +extern cpuop_func op_0cd8_0_nf; +extern cpuop_func op_0cd8_0_ff; +extern cpuop_func op_0ce0_0_nf; +extern cpuop_func op_0ce0_0_ff; +extern cpuop_func op_0ce8_0_nf; +extern cpuop_func op_0ce8_0_ff; +extern cpuop_func op_0cf0_0_nf; +extern cpuop_func op_0cf0_0_ff; +extern cpuop_func op_0cf8_0_nf; +extern cpuop_func op_0cf8_0_ff; +extern cpuop_func op_0cf9_0_nf; +extern cpuop_func op_0cf9_0_ff; +extern cpuop_func op_0cfc_0_nf; +extern cpuop_func op_0cfc_0_ff; +extern cpuop_func op_0e10_0_nf; +extern cpuop_func op_0e10_0_ff; +extern cpuop_func op_0e18_0_nf; +extern cpuop_func op_0e18_0_ff; +extern cpuop_func op_0e20_0_nf; +extern cpuop_func op_0e20_0_ff; +extern cpuop_func op_0e28_0_nf; +extern cpuop_func op_0e28_0_ff; +extern cpuop_func op_0e30_0_nf; +extern cpuop_func op_0e30_0_ff; +extern cpuop_func op_0e38_0_nf; +extern cpuop_func op_0e38_0_ff; +extern cpuop_func op_0e39_0_nf; +extern cpuop_func op_0e39_0_ff; +extern cpuop_func op_0e50_0_nf; +extern cpuop_func op_0e50_0_ff; +extern cpuop_func op_0e58_0_nf; +extern cpuop_func op_0e58_0_ff; +extern cpuop_func op_0e60_0_nf; +extern cpuop_func op_0e60_0_ff; +extern cpuop_func op_0e68_0_nf; +extern cpuop_func op_0e68_0_ff; +extern cpuop_func op_0e70_0_nf; +extern cpuop_func op_0e70_0_ff; +extern cpuop_func op_0e78_0_nf; +extern cpuop_func op_0e78_0_ff; +extern cpuop_func op_0e79_0_nf; +extern cpuop_func op_0e79_0_ff; +extern cpuop_func op_0e90_0_nf; +extern cpuop_func op_0e90_0_ff; +extern cpuop_func op_0e98_0_nf; +extern cpuop_func op_0e98_0_ff; +extern cpuop_func op_0ea0_0_nf; +extern cpuop_func op_0ea0_0_ff; +extern cpuop_func op_0ea8_0_nf; +extern cpuop_func op_0ea8_0_ff; +extern cpuop_func op_0eb0_0_nf; +extern cpuop_func op_0eb0_0_ff; +extern cpuop_func op_0eb8_0_nf; +extern cpuop_func op_0eb8_0_ff; +extern cpuop_func op_0eb9_0_nf; +extern cpuop_func op_0eb9_0_ff; +extern cpuop_func op_0ed0_0_nf; +extern cpuop_func op_0ed0_0_ff; +extern cpuop_func op_0ed8_0_nf; +extern cpuop_func op_0ed8_0_ff; +extern cpuop_func op_0ee0_0_nf; +extern cpuop_func op_0ee0_0_ff; +extern cpuop_func op_0ee8_0_nf; +extern cpuop_func op_0ee8_0_ff; +extern cpuop_func op_0ef0_0_nf; +extern cpuop_func op_0ef0_0_ff; +extern cpuop_func op_0ef8_0_nf; +extern cpuop_func op_0ef8_0_ff; +extern cpuop_func op_0ef9_0_nf; +extern cpuop_func op_0ef9_0_ff; +extern cpuop_func op_0efc_0_nf; +extern cpuop_func op_0efc_0_ff; +extern cpuop_func op_1000_0_nf; +extern cpuop_func op_1000_0_ff; +extern cpuop_func op_1010_0_nf; +extern cpuop_func op_1010_0_ff; +extern cpuop_func op_1018_0_nf; +extern cpuop_func op_1018_0_ff; +extern cpuop_func op_1020_0_nf; +extern cpuop_func op_1020_0_ff; +extern cpuop_func op_1028_0_nf; +extern cpuop_func op_1028_0_ff; +extern cpuop_func op_1030_0_nf; +extern cpuop_func op_1030_0_ff; +extern cpuop_func op_1038_0_nf; +extern cpuop_func op_1038_0_ff; +extern cpuop_func op_1039_0_nf; +extern cpuop_func op_1039_0_ff; +extern cpuop_func op_103a_0_nf; +extern cpuop_func op_103a_0_ff; +extern cpuop_func op_103b_0_nf; +extern cpuop_func op_103b_0_ff; +extern cpuop_func op_103c_0_nf; +extern cpuop_func op_103c_0_ff; +extern cpuop_func op_1080_0_nf; +extern cpuop_func op_1080_0_ff; +extern cpuop_func op_1090_0_nf; +extern cpuop_func op_1090_0_ff; +extern cpuop_func op_1098_0_nf; +extern cpuop_func op_1098_0_ff; +extern cpuop_func op_10a0_0_nf; +extern cpuop_func op_10a0_0_ff; +extern cpuop_func op_10a8_0_nf; +extern cpuop_func op_10a8_0_ff; +extern cpuop_func op_10b0_0_nf; +extern cpuop_func op_10b0_0_ff; +extern cpuop_func op_10b8_0_nf; +extern cpuop_func op_10b8_0_ff; +extern cpuop_func op_10b9_0_nf; +extern cpuop_func op_10b9_0_ff; +extern cpuop_func op_10ba_0_nf; +extern cpuop_func op_10ba_0_ff; +extern cpuop_func op_10bb_0_nf; +extern cpuop_func op_10bb_0_ff; +extern cpuop_func op_10bc_0_nf; +extern cpuop_func op_10bc_0_ff; +extern cpuop_func op_10c0_0_nf; +extern cpuop_func op_10c0_0_ff; +extern cpuop_func op_10d0_0_nf; +extern cpuop_func op_10d0_0_ff; +extern cpuop_func op_10d8_0_nf; +extern cpuop_func op_10d8_0_ff; +extern cpuop_func op_10e0_0_nf; +extern cpuop_func op_10e0_0_ff; +extern cpuop_func op_10e8_0_nf; +extern cpuop_func op_10e8_0_ff; +extern cpuop_func op_10f0_0_nf; +extern cpuop_func op_10f0_0_ff; +extern cpuop_func op_10f8_0_nf; +extern cpuop_func op_10f8_0_ff; +extern cpuop_func op_10f9_0_nf; +extern cpuop_func op_10f9_0_ff; +extern cpuop_func op_10fa_0_nf; +extern cpuop_func op_10fa_0_ff; +extern cpuop_func op_10fb_0_nf; +extern cpuop_func op_10fb_0_ff; +extern cpuop_func op_10fc_0_nf; +extern cpuop_func op_10fc_0_ff; +extern cpuop_func op_1100_0_nf; +extern cpuop_func op_1100_0_ff; +extern cpuop_func op_1110_0_nf; +extern cpuop_func op_1110_0_ff; +extern cpuop_func op_1118_0_nf; +extern cpuop_func op_1118_0_ff; +extern cpuop_func op_1120_0_nf; +extern cpuop_func op_1120_0_ff; +extern cpuop_func op_1128_0_nf; +extern cpuop_func op_1128_0_ff; +extern cpuop_func op_1130_0_nf; +extern cpuop_func op_1130_0_ff; +extern cpuop_func op_1138_0_nf; +extern cpuop_func op_1138_0_ff; +extern cpuop_func op_1139_0_nf; +extern cpuop_func op_1139_0_ff; +extern cpuop_func op_113a_0_nf; +extern cpuop_func op_113a_0_ff; +extern cpuop_func op_113b_0_nf; +extern cpuop_func op_113b_0_ff; +extern cpuop_func op_113c_0_nf; +extern cpuop_func op_113c_0_ff; +extern cpuop_func op_1140_0_nf; +extern cpuop_func op_1140_0_ff; +extern cpuop_func op_1150_0_nf; +extern cpuop_func op_1150_0_ff; +extern cpuop_func op_1158_0_nf; +extern cpuop_func op_1158_0_ff; +extern cpuop_func op_1160_0_nf; +extern cpuop_func op_1160_0_ff; +extern cpuop_func op_1168_0_nf; +extern cpuop_func op_1168_0_ff; +extern cpuop_func op_1170_0_nf; +extern cpuop_func op_1170_0_ff; +extern cpuop_func op_1178_0_nf; +extern cpuop_func op_1178_0_ff; +extern cpuop_func op_1179_0_nf; +extern cpuop_func op_1179_0_ff; +extern cpuop_func op_117a_0_nf; +extern cpuop_func op_117a_0_ff; +extern cpuop_func op_117b_0_nf; +extern cpuop_func op_117b_0_ff; +extern cpuop_func op_117c_0_nf; +extern cpuop_func op_117c_0_ff; +extern cpuop_func op_1180_0_nf; +extern cpuop_func op_1180_0_ff; +extern cpuop_func op_1190_0_nf; +extern cpuop_func op_1190_0_ff; +extern cpuop_func op_1198_0_nf; +extern cpuop_func op_1198_0_ff; +extern cpuop_func op_11a0_0_nf; +extern cpuop_func op_11a0_0_ff; +extern cpuop_func op_11a8_0_nf; +extern cpuop_func op_11a8_0_ff; +extern cpuop_func op_11b0_0_nf; +extern cpuop_func op_11b0_0_ff; +extern cpuop_func op_11b8_0_nf; +extern cpuop_func op_11b8_0_ff; +extern cpuop_func op_11b9_0_nf; +extern cpuop_func op_11b9_0_ff; +extern cpuop_func op_11ba_0_nf; +extern cpuop_func op_11ba_0_ff; +extern cpuop_func op_11bb_0_nf; +extern cpuop_func op_11bb_0_ff; +extern cpuop_func op_11bc_0_nf; +extern cpuop_func op_11bc_0_ff; +extern cpuop_func op_11c0_0_nf; +extern cpuop_func op_11c0_0_ff; +extern cpuop_func op_11d0_0_nf; +extern cpuop_func op_11d0_0_ff; +extern cpuop_func op_11d8_0_nf; +extern cpuop_func op_11d8_0_ff; +extern cpuop_func op_11e0_0_nf; +extern cpuop_func op_11e0_0_ff; +extern cpuop_func op_11e8_0_nf; +extern cpuop_func op_11e8_0_ff; +extern cpuop_func op_11f0_0_nf; +extern cpuop_func op_11f0_0_ff; +extern cpuop_func op_11f8_0_nf; +extern cpuop_func op_11f8_0_ff; +extern cpuop_func op_11f9_0_nf; +extern cpuop_func op_11f9_0_ff; +extern cpuop_func op_11fa_0_nf; +extern cpuop_func op_11fa_0_ff; +extern cpuop_func op_11fb_0_nf; +extern cpuop_func op_11fb_0_ff; +extern cpuop_func op_11fc_0_nf; +extern cpuop_func op_11fc_0_ff; +extern cpuop_func op_13c0_0_nf; +extern cpuop_func op_13c0_0_ff; +extern cpuop_func op_13d0_0_nf; +extern cpuop_func op_13d0_0_ff; +extern cpuop_func op_13d8_0_nf; +extern cpuop_func op_13d8_0_ff; +extern cpuop_func op_13e0_0_nf; +extern cpuop_func op_13e0_0_ff; +extern cpuop_func op_13e8_0_nf; +extern cpuop_func op_13e8_0_ff; +extern cpuop_func op_13f0_0_nf; +extern cpuop_func op_13f0_0_ff; +extern cpuop_func op_13f8_0_nf; +extern cpuop_func op_13f8_0_ff; +extern cpuop_func op_13f9_0_nf; +extern cpuop_func op_13f9_0_ff; +extern cpuop_func op_13fa_0_nf; +extern cpuop_func op_13fa_0_ff; +extern cpuop_func op_13fb_0_nf; +extern cpuop_func op_13fb_0_ff; +extern cpuop_func op_13fc_0_nf; +extern cpuop_func op_13fc_0_ff; +extern cpuop_func op_2000_0_nf; +extern cpuop_func op_2000_0_ff; +extern cpuop_func op_2008_0_nf; +extern cpuop_func op_2008_0_ff; +extern cpuop_func op_2010_0_nf; +extern cpuop_func op_2010_0_ff; +extern cpuop_func op_2018_0_nf; +extern cpuop_func op_2018_0_ff; +extern cpuop_func op_2020_0_nf; +extern cpuop_func op_2020_0_ff; +extern cpuop_func op_2028_0_nf; +extern cpuop_func op_2028_0_ff; +extern cpuop_func op_2030_0_nf; +extern cpuop_func op_2030_0_ff; +extern cpuop_func op_2038_0_nf; +extern cpuop_func op_2038_0_ff; +extern cpuop_func op_2039_0_nf; +extern cpuop_func op_2039_0_ff; +extern cpuop_func op_203a_0_nf; +extern cpuop_func op_203a_0_ff; +extern cpuop_func op_203b_0_nf; +extern cpuop_func op_203b_0_ff; +extern cpuop_func op_203c_0_nf; +extern cpuop_func op_203c_0_ff; +extern cpuop_func op_2040_0_nf; +extern cpuop_func op_2040_0_ff; +extern cpuop_func op_2048_0_nf; +extern cpuop_func op_2048_0_ff; +extern cpuop_func op_2050_0_nf; +extern cpuop_func op_2050_0_ff; +extern cpuop_func op_2058_0_nf; +extern cpuop_func op_2058_0_ff; +extern cpuop_func op_2060_0_nf; +extern cpuop_func op_2060_0_ff; +extern cpuop_func op_2068_0_nf; +extern cpuop_func op_2068_0_ff; +extern cpuop_func op_2070_0_nf; +extern cpuop_func op_2070_0_ff; +extern cpuop_func op_2078_0_nf; +extern cpuop_func op_2078_0_ff; +extern cpuop_func op_2079_0_nf; +extern cpuop_func op_2079_0_ff; +extern cpuop_func op_207a_0_nf; +extern cpuop_func op_207a_0_ff; +extern cpuop_func op_207b_0_nf; +extern cpuop_func op_207b_0_ff; +extern cpuop_func op_207c_0_nf; +extern cpuop_func op_207c_0_ff; +extern cpuop_func op_2080_0_nf; +extern cpuop_func op_2080_0_ff; +extern cpuop_func op_2088_0_nf; +extern cpuop_func op_2088_0_ff; +extern cpuop_func op_2090_0_nf; +extern cpuop_func op_2090_0_ff; +extern cpuop_func op_2098_0_nf; +extern cpuop_func op_2098_0_ff; +extern cpuop_func op_20a0_0_nf; +extern cpuop_func op_20a0_0_ff; +extern cpuop_func op_20a8_0_nf; +extern cpuop_func op_20a8_0_ff; +extern cpuop_func op_20b0_0_nf; +extern cpuop_func op_20b0_0_ff; +extern cpuop_func op_20b8_0_nf; +extern cpuop_func op_20b8_0_ff; +extern cpuop_func op_20b9_0_nf; +extern cpuop_func op_20b9_0_ff; +extern cpuop_func op_20ba_0_nf; +extern cpuop_func op_20ba_0_ff; +extern cpuop_func op_20bb_0_nf; +extern cpuop_func op_20bb_0_ff; +extern cpuop_func op_20bc_0_nf; +extern cpuop_func op_20bc_0_ff; +extern cpuop_func op_20c0_0_nf; +extern cpuop_func op_20c0_0_ff; +extern cpuop_func op_20c8_0_nf; +extern cpuop_func op_20c8_0_ff; +extern cpuop_func op_20d0_0_nf; +extern cpuop_func op_20d0_0_ff; +extern cpuop_func op_20d8_0_nf; +extern cpuop_func op_20d8_0_ff; +extern cpuop_func op_20e0_0_nf; +extern cpuop_func op_20e0_0_ff; +extern cpuop_func op_20e8_0_nf; +extern cpuop_func op_20e8_0_ff; +extern cpuop_func op_20f0_0_nf; +extern cpuop_func op_20f0_0_ff; +extern cpuop_func op_20f8_0_nf; +extern cpuop_func op_20f8_0_ff; +extern cpuop_func op_20f9_0_nf; +extern cpuop_func op_20f9_0_ff; +extern cpuop_func op_20fa_0_nf; +extern cpuop_func op_20fa_0_ff; +extern cpuop_func op_20fb_0_nf; +extern cpuop_func op_20fb_0_ff; +extern cpuop_func op_20fc_0_nf; +extern cpuop_func op_20fc_0_ff; +extern cpuop_func op_2100_0_nf; +extern cpuop_func op_2100_0_ff; +extern cpuop_func op_2108_0_nf; +extern cpuop_func op_2108_0_ff; +extern cpuop_func op_2110_0_nf; +extern cpuop_func op_2110_0_ff; +extern cpuop_func op_2118_0_nf; +extern cpuop_func op_2118_0_ff; +extern cpuop_func op_2120_0_nf; +extern cpuop_func op_2120_0_ff; +extern cpuop_func op_2128_0_nf; +extern cpuop_func op_2128_0_ff; +extern cpuop_func op_2130_0_nf; +extern cpuop_func op_2130_0_ff; +extern cpuop_func op_2138_0_nf; +extern cpuop_func op_2138_0_ff; +extern cpuop_func op_2139_0_nf; +extern cpuop_func op_2139_0_ff; +extern cpuop_func op_213a_0_nf; +extern cpuop_func op_213a_0_ff; +extern cpuop_func op_213b_0_nf; +extern cpuop_func op_213b_0_ff; +extern cpuop_func op_213c_0_nf; +extern cpuop_func op_213c_0_ff; +extern cpuop_func op_2140_0_nf; +extern cpuop_func op_2140_0_ff; +extern cpuop_func op_2148_0_nf; +extern cpuop_func op_2148_0_ff; +extern cpuop_func op_2150_0_nf; +extern cpuop_func op_2150_0_ff; +extern cpuop_func op_2158_0_nf; +extern cpuop_func op_2158_0_ff; +extern cpuop_func op_2160_0_nf; +extern cpuop_func op_2160_0_ff; +extern cpuop_func op_2168_0_nf; +extern cpuop_func op_2168_0_ff; +extern cpuop_func op_2170_0_nf; +extern cpuop_func op_2170_0_ff; +extern cpuop_func op_2178_0_nf; +extern cpuop_func op_2178_0_ff; +extern cpuop_func op_2179_0_nf; +extern cpuop_func op_2179_0_ff; +extern cpuop_func op_217a_0_nf; +extern cpuop_func op_217a_0_ff; +extern cpuop_func op_217b_0_nf; +extern cpuop_func op_217b_0_ff; +extern cpuop_func op_217c_0_nf; +extern cpuop_func op_217c_0_ff; +extern cpuop_func op_2180_0_nf; +extern cpuop_func op_2180_0_ff; +extern cpuop_func op_2188_0_nf; +extern cpuop_func op_2188_0_ff; +extern cpuop_func op_2190_0_nf; +extern cpuop_func op_2190_0_ff; +extern cpuop_func op_2198_0_nf; +extern cpuop_func op_2198_0_ff; +extern cpuop_func op_21a0_0_nf; +extern cpuop_func op_21a0_0_ff; +extern cpuop_func op_21a8_0_nf; +extern cpuop_func op_21a8_0_ff; +extern cpuop_func op_21b0_0_nf; +extern cpuop_func op_21b0_0_ff; +extern cpuop_func op_21b8_0_nf; +extern cpuop_func op_21b8_0_ff; +extern cpuop_func op_21b9_0_nf; +extern cpuop_func op_21b9_0_ff; +extern cpuop_func op_21ba_0_nf; +extern cpuop_func op_21ba_0_ff; +extern cpuop_func op_21bb_0_nf; +extern cpuop_func op_21bb_0_ff; +extern cpuop_func op_21bc_0_nf; +extern cpuop_func op_21bc_0_ff; +extern cpuop_func op_21c0_0_nf; +extern cpuop_func op_21c0_0_ff; +extern cpuop_func op_21c8_0_nf; +extern cpuop_func op_21c8_0_ff; +extern cpuop_func op_21d0_0_nf; +extern cpuop_func op_21d0_0_ff; +extern cpuop_func op_21d8_0_nf; +extern cpuop_func op_21d8_0_ff; +extern cpuop_func op_21e0_0_nf; +extern cpuop_func op_21e0_0_ff; +extern cpuop_func op_21e8_0_nf; +extern cpuop_func op_21e8_0_ff; +extern cpuop_func op_21f0_0_nf; +extern cpuop_func op_21f0_0_ff; +extern cpuop_func op_21f8_0_nf; +extern cpuop_func op_21f8_0_ff; +extern cpuop_func op_21f9_0_nf; +extern cpuop_func op_21f9_0_ff; +extern cpuop_func op_21fa_0_nf; +extern cpuop_func op_21fa_0_ff; +extern cpuop_func op_21fb_0_nf; +extern cpuop_func op_21fb_0_ff; +extern cpuop_func op_21fc_0_nf; +extern cpuop_func op_21fc_0_ff; +extern cpuop_func op_23c0_0_nf; +extern cpuop_func op_23c0_0_ff; +extern cpuop_func op_23c8_0_nf; +extern cpuop_func op_23c8_0_ff; +extern cpuop_func op_23d0_0_nf; +extern cpuop_func op_23d0_0_ff; +extern cpuop_func op_23d8_0_nf; +extern cpuop_func op_23d8_0_ff; +extern cpuop_func op_23e0_0_nf; +extern cpuop_func op_23e0_0_ff; +extern cpuop_func op_23e8_0_nf; +extern cpuop_func op_23e8_0_ff; +extern cpuop_func op_23f0_0_nf; +extern cpuop_func op_23f0_0_ff; +extern cpuop_func op_23f8_0_nf; +extern cpuop_func op_23f8_0_ff; +extern cpuop_func op_23f9_0_nf; +extern cpuop_func op_23f9_0_ff; +extern cpuop_func op_23fa_0_nf; +extern cpuop_func op_23fa_0_ff; +extern cpuop_func op_23fb_0_nf; +extern cpuop_func op_23fb_0_ff; +extern cpuop_func op_23fc_0_nf; +extern cpuop_func op_23fc_0_ff; +extern cpuop_func op_3000_0_nf; +extern cpuop_func op_3000_0_ff; +extern cpuop_func op_3008_0_nf; +extern cpuop_func op_3008_0_ff; +extern cpuop_func op_3010_0_nf; +extern cpuop_func op_3010_0_ff; +extern cpuop_func op_3018_0_nf; +extern cpuop_func op_3018_0_ff; +extern cpuop_func op_3020_0_nf; +extern cpuop_func op_3020_0_ff; +extern cpuop_func op_3028_0_nf; +extern cpuop_func op_3028_0_ff; +extern cpuop_func op_3030_0_nf; +extern cpuop_func op_3030_0_ff; +extern cpuop_func op_3038_0_nf; +extern cpuop_func op_3038_0_ff; +extern cpuop_func op_3039_0_nf; +extern cpuop_func op_3039_0_ff; +extern cpuop_func op_303a_0_nf; +extern cpuop_func op_303a_0_ff; +extern cpuop_func op_303b_0_nf; +extern cpuop_func op_303b_0_ff; +extern cpuop_func op_303c_0_nf; +extern cpuop_func op_303c_0_ff; +extern cpuop_func op_3040_0_nf; +extern cpuop_func op_3040_0_ff; +extern cpuop_func op_3048_0_nf; +extern cpuop_func op_3048_0_ff; +extern cpuop_func op_3050_0_nf; +extern cpuop_func op_3050_0_ff; +extern cpuop_func op_3058_0_nf; +extern cpuop_func op_3058_0_ff; +extern cpuop_func op_3060_0_nf; +extern cpuop_func op_3060_0_ff; +extern cpuop_func op_3068_0_nf; +extern cpuop_func op_3068_0_ff; +extern cpuop_func op_3070_0_nf; +extern cpuop_func op_3070_0_ff; +extern cpuop_func op_3078_0_nf; +extern cpuop_func op_3078_0_ff; +extern cpuop_func op_3079_0_nf; +extern cpuop_func op_3079_0_ff; +extern cpuop_func op_307a_0_nf; +extern cpuop_func op_307a_0_ff; +extern cpuop_func op_307b_0_nf; +extern cpuop_func op_307b_0_ff; +extern cpuop_func op_307c_0_nf; +extern cpuop_func op_307c_0_ff; +extern cpuop_func op_3080_0_nf; +extern cpuop_func op_3080_0_ff; +extern cpuop_func op_3088_0_nf; +extern cpuop_func op_3088_0_ff; +extern cpuop_func op_3090_0_nf; +extern cpuop_func op_3090_0_ff; +extern cpuop_func op_3098_0_nf; +extern cpuop_func op_3098_0_ff; +extern cpuop_func op_30a0_0_nf; +extern cpuop_func op_30a0_0_ff; +extern cpuop_func op_30a8_0_nf; +extern cpuop_func op_30a8_0_ff; +extern cpuop_func op_30b0_0_nf; +extern cpuop_func op_30b0_0_ff; +extern cpuop_func op_30b8_0_nf; +extern cpuop_func op_30b8_0_ff; +extern cpuop_func op_30b9_0_nf; +extern cpuop_func op_30b9_0_ff; +extern cpuop_func op_30ba_0_nf; +extern cpuop_func op_30ba_0_ff; +extern cpuop_func op_30bb_0_nf; +extern cpuop_func op_30bb_0_ff; +extern cpuop_func op_30bc_0_nf; +extern cpuop_func op_30bc_0_ff; +extern cpuop_func op_30c0_0_nf; +extern cpuop_func op_30c0_0_ff; +extern cpuop_func op_30c8_0_nf; +extern cpuop_func op_30c8_0_ff; +extern cpuop_func op_30d0_0_nf; +extern cpuop_func op_30d0_0_ff; +extern cpuop_func op_30d8_0_nf; +extern cpuop_func op_30d8_0_ff; +extern cpuop_func op_30e0_0_nf; +extern cpuop_func op_30e0_0_ff; +extern cpuop_func op_30e8_0_nf; +extern cpuop_func op_30e8_0_ff; +extern cpuop_func op_30f0_0_nf; +extern cpuop_func op_30f0_0_ff; +extern cpuop_func op_30f8_0_nf; +extern cpuop_func op_30f8_0_ff; +extern cpuop_func op_30f9_0_nf; +extern cpuop_func op_30f9_0_ff; +extern cpuop_func op_30fa_0_nf; +extern cpuop_func op_30fa_0_ff; +extern cpuop_func op_30fb_0_nf; +extern cpuop_func op_30fb_0_ff; +extern cpuop_func op_30fc_0_nf; +extern cpuop_func op_30fc_0_ff; +extern cpuop_func op_3100_0_nf; +extern cpuop_func op_3100_0_ff; +extern cpuop_func op_3108_0_nf; +extern cpuop_func op_3108_0_ff; +extern cpuop_func op_3110_0_nf; +extern cpuop_func op_3110_0_ff; +extern cpuop_func op_3118_0_nf; +extern cpuop_func op_3118_0_ff; +extern cpuop_func op_3120_0_nf; +extern cpuop_func op_3120_0_ff; +extern cpuop_func op_3128_0_nf; +extern cpuop_func op_3128_0_ff; +extern cpuop_func op_3130_0_nf; +extern cpuop_func op_3130_0_ff; +extern cpuop_func op_3138_0_nf; +extern cpuop_func op_3138_0_ff; +extern cpuop_func op_3139_0_nf; +extern cpuop_func op_3139_0_ff; +extern cpuop_func op_313a_0_nf; +extern cpuop_func op_313a_0_ff; +extern cpuop_func op_313b_0_nf; +extern cpuop_func op_313b_0_ff; +extern cpuop_func op_313c_0_nf; +extern cpuop_func op_313c_0_ff; +extern cpuop_func op_3140_0_nf; +extern cpuop_func op_3140_0_ff; +extern cpuop_func op_3148_0_nf; +extern cpuop_func op_3148_0_ff; +extern cpuop_func op_3150_0_nf; +extern cpuop_func op_3150_0_ff; +extern cpuop_func op_3158_0_nf; +extern cpuop_func op_3158_0_ff; +extern cpuop_func op_3160_0_nf; +extern cpuop_func op_3160_0_ff; +extern cpuop_func op_3168_0_nf; +extern cpuop_func op_3168_0_ff; +extern cpuop_func op_3170_0_nf; +extern cpuop_func op_3170_0_ff; +extern cpuop_func op_3178_0_nf; +extern cpuop_func op_3178_0_ff; +extern cpuop_func op_3179_0_nf; +extern cpuop_func op_3179_0_ff; +extern cpuop_func op_317a_0_nf; +extern cpuop_func op_317a_0_ff; +extern cpuop_func op_317b_0_nf; +extern cpuop_func op_317b_0_ff; +extern cpuop_func op_317c_0_nf; +extern cpuop_func op_317c_0_ff; +extern cpuop_func op_3180_0_nf; +extern cpuop_func op_3180_0_ff; +extern cpuop_func op_3188_0_nf; +extern cpuop_func op_3188_0_ff; +extern cpuop_func op_3190_0_nf; +extern cpuop_func op_3190_0_ff; +extern cpuop_func op_3198_0_nf; +extern cpuop_func op_3198_0_ff; +extern cpuop_func op_31a0_0_nf; +extern cpuop_func op_31a0_0_ff; +extern cpuop_func op_31a8_0_nf; +extern cpuop_func op_31a8_0_ff; +extern cpuop_func op_31b0_0_nf; +extern cpuop_func op_31b0_0_ff; +extern cpuop_func op_31b8_0_nf; +extern cpuop_func op_31b8_0_ff; +extern cpuop_func op_31b9_0_nf; +extern cpuop_func op_31b9_0_ff; +extern cpuop_func op_31ba_0_nf; +extern cpuop_func op_31ba_0_ff; +extern cpuop_func op_31bb_0_nf; +extern cpuop_func op_31bb_0_ff; +extern cpuop_func op_31bc_0_nf; +extern cpuop_func op_31bc_0_ff; +extern cpuop_func op_31c0_0_nf; +extern cpuop_func op_31c0_0_ff; +extern cpuop_func op_31c8_0_nf; +extern cpuop_func op_31c8_0_ff; +extern cpuop_func op_31d0_0_nf; +extern cpuop_func op_31d0_0_ff; +extern cpuop_func op_31d8_0_nf; +extern cpuop_func op_31d8_0_ff; +extern cpuop_func op_31e0_0_nf; +extern cpuop_func op_31e0_0_ff; +extern cpuop_func op_31e8_0_nf; +extern cpuop_func op_31e8_0_ff; +extern cpuop_func op_31f0_0_nf; +extern cpuop_func op_31f0_0_ff; +extern cpuop_func op_31f8_0_nf; +extern cpuop_func op_31f8_0_ff; +extern cpuop_func op_31f9_0_nf; +extern cpuop_func op_31f9_0_ff; +extern cpuop_func op_31fa_0_nf; +extern cpuop_func op_31fa_0_ff; +extern cpuop_func op_31fb_0_nf; +extern cpuop_func op_31fb_0_ff; +extern cpuop_func op_31fc_0_nf; +extern cpuop_func op_31fc_0_ff; +extern cpuop_func op_33c0_0_nf; +extern cpuop_func op_33c0_0_ff; +extern cpuop_func op_33c8_0_nf; +extern cpuop_func op_33c8_0_ff; +extern cpuop_func op_33d0_0_nf; +extern cpuop_func op_33d0_0_ff; +extern cpuop_func op_33d8_0_nf; +extern cpuop_func op_33d8_0_ff; +extern cpuop_func op_33e0_0_nf; +extern cpuop_func op_33e0_0_ff; +extern cpuop_func op_33e8_0_nf; +extern cpuop_func op_33e8_0_ff; +extern cpuop_func op_33f0_0_nf; +extern cpuop_func op_33f0_0_ff; +extern cpuop_func op_33f8_0_nf; +extern cpuop_func op_33f8_0_ff; +extern cpuop_func op_33f9_0_nf; +extern cpuop_func op_33f9_0_ff; +extern cpuop_func op_33fa_0_nf; +extern cpuop_func op_33fa_0_ff; +extern cpuop_func op_33fb_0_nf; +extern cpuop_func op_33fb_0_ff; +extern cpuop_func op_33fc_0_nf; +extern cpuop_func op_33fc_0_ff; +extern cpuop_func op_4000_0_nf; +extern cpuop_func op_4000_0_ff; +extern cpuop_func op_4010_0_nf; +extern cpuop_func op_4010_0_ff; +extern cpuop_func op_4018_0_nf; +extern cpuop_func op_4018_0_ff; +extern cpuop_func op_4020_0_nf; +extern cpuop_func op_4020_0_ff; +extern cpuop_func op_4028_0_nf; +extern cpuop_func op_4028_0_ff; +extern cpuop_func op_4030_0_nf; +extern cpuop_func op_4030_0_ff; +extern cpuop_func op_4038_0_nf; +extern cpuop_func op_4038_0_ff; +extern cpuop_func op_4039_0_nf; +extern cpuop_func op_4039_0_ff; +extern cpuop_func op_4040_0_nf; +extern cpuop_func op_4040_0_ff; +extern cpuop_func op_4050_0_nf; +extern cpuop_func op_4050_0_ff; +extern cpuop_func op_4058_0_nf; +extern cpuop_func op_4058_0_ff; +extern cpuop_func op_4060_0_nf; +extern cpuop_func op_4060_0_ff; +extern cpuop_func op_4068_0_nf; +extern cpuop_func op_4068_0_ff; +extern cpuop_func op_4070_0_nf; +extern cpuop_func op_4070_0_ff; +extern cpuop_func op_4078_0_nf; +extern cpuop_func op_4078_0_ff; +extern cpuop_func op_4079_0_nf; +extern cpuop_func op_4079_0_ff; +extern cpuop_func op_4080_0_nf; +extern cpuop_func op_4080_0_ff; +extern cpuop_func op_4090_0_nf; +extern cpuop_func op_4090_0_ff; +extern cpuop_func op_4098_0_nf; +extern cpuop_func op_4098_0_ff; +extern cpuop_func op_40a0_0_nf; +extern cpuop_func op_40a0_0_ff; +extern cpuop_func op_40a8_0_nf; +extern cpuop_func op_40a8_0_ff; +extern cpuop_func op_40b0_0_nf; +extern cpuop_func op_40b0_0_ff; +extern cpuop_func op_40b8_0_nf; +extern cpuop_func op_40b8_0_ff; +extern cpuop_func op_40b9_0_nf; +extern cpuop_func op_40b9_0_ff; +extern cpuop_func op_40c0_0_nf; +extern cpuop_func op_40c0_0_ff; +extern cpuop_func op_40d0_0_nf; +extern cpuop_func op_40d0_0_ff; +extern cpuop_func op_40d8_0_nf; +extern cpuop_func op_40d8_0_ff; +extern cpuop_func op_40e0_0_nf; +extern cpuop_func op_40e0_0_ff; +extern cpuop_func op_40e8_0_nf; +extern cpuop_func op_40e8_0_ff; +extern cpuop_func op_40f0_0_nf; +extern cpuop_func op_40f0_0_ff; +extern cpuop_func op_40f8_0_nf; +extern cpuop_func op_40f8_0_ff; +extern cpuop_func op_40f9_0_nf; +extern cpuop_func op_40f9_0_ff; +extern cpuop_func op_4100_0_nf; +extern cpuop_func op_4100_0_ff; +extern cpuop_func op_4110_0_nf; +extern cpuop_func op_4110_0_ff; +extern cpuop_func op_4118_0_nf; +extern cpuop_func op_4118_0_ff; +extern cpuop_func op_4120_0_nf; +extern cpuop_func op_4120_0_ff; +extern cpuop_func op_4128_0_nf; +extern cpuop_func op_4128_0_ff; +extern cpuop_func op_4130_0_nf; +extern cpuop_func op_4130_0_ff; +extern cpuop_func op_4138_0_nf; +extern cpuop_func op_4138_0_ff; +extern cpuop_func op_4139_0_nf; +extern cpuop_func op_4139_0_ff; +extern cpuop_func op_413a_0_nf; +extern cpuop_func op_413a_0_ff; +extern cpuop_func op_413b_0_nf; +extern cpuop_func op_413b_0_ff; +extern cpuop_func op_413c_0_nf; +extern cpuop_func op_413c_0_ff; +extern cpuop_func op_4180_0_nf; +extern cpuop_func op_4180_0_ff; +extern cpuop_func op_4190_0_nf; +extern cpuop_func op_4190_0_ff; +extern cpuop_func op_4198_0_nf; +extern cpuop_func op_4198_0_ff; +extern cpuop_func op_41a0_0_nf; +extern cpuop_func op_41a0_0_ff; +extern cpuop_func op_41a8_0_nf; +extern cpuop_func op_41a8_0_ff; +extern cpuop_func op_41b0_0_nf; +extern cpuop_func op_41b0_0_ff; +extern cpuop_func op_41b8_0_nf; +extern cpuop_func op_41b8_0_ff; +extern cpuop_func op_41b9_0_nf; +extern cpuop_func op_41b9_0_ff; +extern cpuop_func op_41ba_0_nf; +extern cpuop_func op_41ba_0_ff; +extern cpuop_func op_41bb_0_nf; +extern cpuop_func op_41bb_0_ff; +extern cpuop_func op_41bc_0_nf; +extern cpuop_func op_41bc_0_ff; +extern cpuop_func op_41d0_0_nf; +extern cpuop_func op_41d0_0_ff; +extern cpuop_func op_41e8_0_nf; +extern cpuop_func op_41e8_0_ff; +extern cpuop_func op_41f0_0_nf; +extern cpuop_func op_41f0_0_ff; +extern cpuop_func op_41f8_0_nf; +extern cpuop_func op_41f8_0_ff; +extern cpuop_func op_41f9_0_nf; +extern cpuop_func op_41f9_0_ff; +extern cpuop_func op_41fa_0_nf; +extern cpuop_func op_41fa_0_ff; +extern cpuop_func op_41fb_0_nf; +extern cpuop_func op_41fb_0_ff; +extern cpuop_func op_4200_0_nf; +extern cpuop_func op_4200_0_ff; +extern cpuop_func op_4210_0_nf; +extern cpuop_func op_4210_0_ff; +extern cpuop_func op_4218_0_nf; +extern cpuop_func op_4218_0_ff; +extern cpuop_func op_4220_0_nf; +extern cpuop_func op_4220_0_ff; +extern cpuop_func op_4228_0_nf; +extern cpuop_func op_4228_0_ff; +extern cpuop_func op_4230_0_nf; +extern cpuop_func op_4230_0_ff; +extern cpuop_func op_4238_0_nf; +extern cpuop_func op_4238_0_ff; +extern cpuop_func op_4239_0_nf; +extern cpuop_func op_4239_0_ff; +extern cpuop_func op_4240_0_nf; +extern cpuop_func op_4240_0_ff; +extern cpuop_func op_4250_0_nf; +extern cpuop_func op_4250_0_ff; +extern cpuop_func op_4258_0_nf; +extern cpuop_func op_4258_0_ff; +extern cpuop_func op_4260_0_nf; +extern cpuop_func op_4260_0_ff; +extern cpuop_func op_4268_0_nf; +extern cpuop_func op_4268_0_ff; +extern cpuop_func op_4270_0_nf; +extern cpuop_func op_4270_0_ff; +extern cpuop_func op_4278_0_nf; +extern cpuop_func op_4278_0_ff; +extern cpuop_func op_4279_0_nf; +extern cpuop_func op_4279_0_ff; +extern cpuop_func op_4280_0_nf; +extern cpuop_func op_4280_0_ff; +extern cpuop_func op_4290_0_nf; +extern cpuop_func op_4290_0_ff; +extern cpuop_func op_4298_0_nf; +extern cpuop_func op_4298_0_ff; +extern cpuop_func op_42a0_0_nf; +extern cpuop_func op_42a0_0_ff; +extern cpuop_func op_42a8_0_nf; +extern cpuop_func op_42a8_0_ff; +extern cpuop_func op_42b0_0_nf; +extern cpuop_func op_42b0_0_ff; +extern cpuop_func op_42b8_0_nf; +extern cpuop_func op_42b8_0_ff; +extern cpuop_func op_42b9_0_nf; +extern cpuop_func op_42b9_0_ff; +extern cpuop_func op_42c0_0_nf; +extern cpuop_func op_42c0_0_ff; +extern cpuop_func op_42d0_0_nf; +extern cpuop_func op_42d0_0_ff; +extern cpuop_func op_42d8_0_nf; +extern cpuop_func op_42d8_0_ff; +extern cpuop_func op_42e0_0_nf; +extern cpuop_func op_42e0_0_ff; +extern cpuop_func op_42e8_0_nf; +extern cpuop_func op_42e8_0_ff; +extern cpuop_func op_42f0_0_nf; +extern cpuop_func op_42f0_0_ff; +extern cpuop_func op_42f8_0_nf; +extern cpuop_func op_42f8_0_ff; +extern cpuop_func op_42f9_0_nf; +extern cpuop_func op_42f9_0_ff; +extern cpuop_func op_4400_0_nf; +extern cpuop_func op_4400_0_ff; +extern cpuop_func op_4410_0_nf; +extern cpuop_func op_4410_0_ff; +extern cpuop_func op_4418_0_nf; +extern cpuop_func op_4418_0_ff; +extern cpuop_func op_4420_0_nf; +extern cpuop_func op_4420_0_ff; +extern cpuop_func op_4428_0_nf; +extern cpuop_func op_4428_0_ff; +extern cpuop_func op_4430_0_nf; +extern cpuop_func op_4430_0_ff; +extern cpuop_func op_4438_0_nf; +extern cpuop_func op_4438_0_ff; +extern cpuop_func op_4439_0_nf; +extern cpuop_func op_4439_0_ff; +extern cpuop_func op_4440_0_nf; +extern cpuop_func op_4440_0_ff; +extern cpuop_func op_4450_0_nf; +extern cpuop_func op_4450_0_ff; +extern cpuop_func op_4458_0_nf; +extern cpuop_func op_4458_0_ff; +extern cpuop_func op_4460_0_nf; +extern cpuop_func op_4460_0_ff; +extern cpuop_func op_4468_0_nf; +extern cpuop_func op_4468_0_ff; +extern cpuop_func op_4470_0_nf; +extern cpuop_func op_4470_0_ff; +extern cpuop_func op_4478_0_nf; +extern cpuop_func op_4478_0_ff; +extern cpuop_func op_4479_0_nf; +extern cpuop_func op_4479_0_ff; +extern cpuop_func op_4480_0_nf; +extern cpuop_func op_4480_0_ff; +extern cpuop_func op_4490_0_nf; +extern cpuop_func op_4490_0_ff; +extern cpuop_func op_4498_0_nf; +extern cpuop_func op_4498_0_ff; +extern cpuop_func op_44a0_0_nf; +extern cpuop_func op_44a0_0_ff; +extern cpuop_func op_44a8_0_nf; +extern cpuop_func op_44a8_0_ff; +extern cpuop_func op_44b0_0_nf; +extern cpuop_func op_44b0_0_ff; +extern cpuop_func op_44b8_0_nf; +extern cpuop_func op_44b8_0_ff; +extern cpuop_func op_44b9_0_nf; +extern cpuop_func op_44b9_0_ff; +extern cpuop_func op_44c0_0_nf; +extern cpuop_func op_44c0_0_ff; +extern cpuop_func op_44d0_0_nf; +extern cpuop_func op_44d0_0_ff; +extern cpuop_func op_44d8_0_nf; +extern cpuop_func op_44d8_0_ff; +extern cpuop_func op_44e0_0_nf; +extern cpuop_func op_44e0_0_ff; +extern cpuop_func op_44e8_0_nf; +extern cpuop_func op_44e8_0_ff; +extern cpuop_func op_44f0_0_nf; +extern cpuop_func op_44f0_0_ff; +extern cpuop_func op_44f8_0_nf; +extern cpuop_func op_44f8_0_ff; +extern cpuop_func op_44f9_0_nf; +extern cpuop_func op_44f9_0_ff; +extern cpuop_func op_44fa_0_nf; +extern cpuop_func op_44fa_0_ff; +extern cpuop_func op_44fb_0_nf; +extern cpuop_func op_44fb_0_ff; +extern cpuop_func op_44fc_0_nf; +extern cpuop_func op_44fc_0_ff; +extern cpuop_func op_4600_0_nf; +extern cpuop_func op_4600_0_ff; +extern cpuop_func op_4610_0_nf; +extern cpuop_func op_4610_0_ff; +extern cpuop_func op_4618_0_nf; +extern cpuop_func op_4618_0_ff; +extern cpuop_func op_4620_0_nf; +extern cpuop_func op_4620_0_ff; +extern cpuop_func op_4628_0_nf; +extern cpuop_func op_4628_0_ff; +extern cpuop_func op_4630_0_nf; +extern cpuop_func op_4630_0_ff; +extern cpuop_func op_4638_0_nf; +extern cpuop_func op_4638_0_ff; +extern cpuop_func op_4639_0_nf; +extern cpuop_func op_4639_0_ff; +extern cpuop_func op_4640_0_nf; +extern cpuop_func op_4640_0_ff; +extern cpuop_func op_4650_0_nf; +extern cpuop_func op_4650_0_ff; +extern cpuop_func op_4658_0_nf; +extern cpuop_func op_4658_0_ff; +extern cpuop_func op_4660_0_nf; +extern cpuop_func op_4660_0_ff; +extern cpuop_func op_4668_0_nf; +extern cpuop_func op_4668_0_ff; +extern cpuop_func op_4670_0_nf; +extern cpuop_func op_4670_0_ff; +extern cpuop_func op_4678_0_nf; +extern cpuop_func op_4678_0_ff; +extern cpuop_func op_4679_0_nf; +extern cpuop_func op_4679_0_ff; +extern cpuop_func op_4680_0_nf; +extern cpuop_func op_4680_0_ff; +extern cpuop_func op_4690_0_nf; +extern cpuop_func op_4690_0_ff; +extern cpuop_func op_4698_0_nf; +extern cpuop_func op_4698_0_ff; +extern cpuop_func op_46a0_0_nf; +extern cpuop_func op_46a0_0_ff; +extern cpuop_func op_46a8_0_nf; +extern cpuop_func op_46a8_0_ff; +extern cpuop_func op_46b0_0_nf; +extern cpuop_func op_46b0_0_ff; +extern cpuop_func op_46b8_0_nf; +extern cpuop_func op_46b8_0_ff; +extern cpuop_func op_46b9_0_nf; +extern cpuop_func op_46b9_0_ff; +extern cpuop_func op_46c0_0_nf; +extern cpuop_func op_46c0_0_ff; +extern cpuop_func op_46d0_0_nf; +extern cpuop_func op_46d0_0_ff; +extern cpuop_func op_46d8_0_nf; +extern cpuop_func op_46d8_0_ff; +extern cpuop_func op_46e0_0_nf; +extern cpuop_func op_46e0_0_ff; +extern cpuop_func op_46e8_0_nf; +extern cpuop_func op_46e8_0_ff; +extern cpuop_func op_46f0_0_nf; +extern cpuop_func op_46f0_0_ff; +extern cpuop_func op_46f8_0_nf; +extern cpuop_func op_46f8_0_ff; +extern cpuop_func op_46f9_0_nf; +extern cpuop_func op_46f9_0_ff; +extern cpuop_func op_46fa_0_nf; +extern cpuop_func op_46fa_0_ff; +extern cpuop_func op_46fb_0_nf; +extern cpuop_func op_46fb_0_ff; +extern cpuop_func op_46fc_0_nf; +extern cpuop_func op_46fc_0_ff; +extern cpuop_func op_4800_0_nf; +extern cpuop_func op_4800_0_ff; +extern cpuop_func op_4808_0_nf; +extern cpuop_func op_4808_0_ff; +extern cpuop_func op_4810_0_nf; +extern cpuop_func op_4810_0_ff; +extern cpuop_func op_4818_0_nf; +extern cpuop_func op_4818_0_ff; +extern cpuop_func op_4820_0_nf; +extern cpuop_func op_4820_0_ff; +extern cpuop_func op_4828_0_nf; +extern cpuop_func op_4828_0_ff; +extern cpuop_func op_4830_0_nf; +extern cpuop_func op_4830_0_ff; +extern cpuop_func op_4838_0_nf; +extern cpuop_func op_4838_0_ff; +extern cpuop_func op_4839_0_nf; +extern cpuop_func op_4839_0_ff; +extern cpuop_func op_4840_0_nf; +extern cpuop_func op_4840_0_ff; +extern cpuop_func op_4848_0_nf; +extern cpuop_func op_4848_0_ff; +extern cpuop_func op_4850_0_nf; +extern cpuop_func op_4850_0_ff; +extern cpuop_func op_4868_0_nf; +extern cpuop_func op_4868_0_ff; +extern cpuop_func op_4870_0_nf; +extern cpuop_func op_4870_0_ff; +extern cpuop_func op_4878_0_nf; +extern cpuop_func op_4878_0_ff; +extern cpuop_func op_4879_0_nf; +extern cpuop_func op_4879_0_ff; +extern cpuop_func op_487a_0_nf; +extern cpuop_func op_487a_0_ff; +extern cpuop_func op_487b_0_nf; +extern cpuop_func op_487b_0_ff; +extern cpuop_func op_4880_0_nf; +extern cpuop_func op_4880_0_ff; +extern cpuop_func op_4890_0_nf; +extern cpuop_func op_4890_0_ff; +extern cpuop_func op_48a0_0_nf; +extern cpuop_func op_48a0_0_ff; +extern cpuop_func op_48a8_0_nf; +extern cpuop_func op_48a8_0_ff; +extern cpuop_func op_48b0_0_nf; +extern cpuop_func op_48b0_0_ff; +extern cpuop_func op_48b8_0_nf; +extern cpuop_func op_48b8_0_ff; +extern cpuop_func op_48b9_0_nf; +extern cpuop_func op_48b9_0_ff; +extern cpuop_func op_48c0_0_nf; +extern cpuop_func op_48c0_0_ff; +extern cpuop_func op_48d0_0_nf; +extern cpuop_func op_48d0_0_ff; +extern cpuop_func op_48e0_0_nf; +extern cpuop_func op_48e0_0_ff; +extern cpuop_func op_48e8_0_nf; +extern cpuop_func op_48e8_0_ff; +extern cpuop_func op_48f0_0_nf; +extern cpuop_func op_48f0_0_ff; +extern cpuop_func op_48f8_0_nf; +extern cpuop_func op_48f8_0_ff; +extern cpuop_func op_48f9_0_nf; +extern cpuop_func op_48f9_0_ff; +extern cpuop_func op_49c0_0_nf; +extern cpuop_func op_49c0_0_ff; +extern cpuop_func op_4a00_0_nf; +extern cpuop_func op_4a00_0_ff; +extern cpuop_func op_4a10_0_nf; +extern cpuop_func op_4a10_0_ff; +extern cpuop_func op_4a18_0_nf; +extern cpuop_func op_4a18_0_ff; +extern cpuop_func op_4a20_0_nf; +extern cpuop_func op_4a20_0_ff; +extern cpuop_func op_4a28_0_nf; +extern cpuop_func op_4a28_0_ff; +extern cpuop_func op_4a30_0_nf; +extern cpuop_func op_4a30_0_ff; +extern cpuop_func op_4a38_0_nf; +extern cpuop_func op_4a38_0_ff; +extern cpuop_func op_4a39_0_nf; +extern cpuop_func op_4a39_0_ff; +extern cpuop_func op_4a3a_0_nf; +extern cpuop_func op_4a3a_0_ff; +extern cpuop_func op_4a3b_0_nf; +extern cpuop_func op_4a3b_0_ff; +extern cpuop_func op_4a3c_0_nf; +extern cpuop_func op_4a3c_0_ff; +extern cpuop_func op_4a40_0_nf; +extern cpuop_func op_4a40_0_ff; +extern cpuop_func op_4a48_0_nf; +extern cpuop_func op_4a48_0_ff; +extern cpuop_func op_4a50_0_nf; +extern cpuop_func op_4a50_0_ff; +extern cpuop_func op_4a58_0_nf; +extern cpuop_func op_4a58_0_ff; +extern cpuop_func op_4a60_0_nf; +extern cpuop_func op_4a60_0_ff; +extern cpuop_func op_4a68_0_nf; +extern cpuop_func op_4a68_0_ff; +extern cpuop_func op_4a70_0_nf; +extern cpuop_func op_4a70_0_ff; +extern cpuop_func op_4a78_0_nf; +extern cpuop_func op_4a78_0_ff; +extern cpuop_func op_4a79_0_nf; +extern cpuop_func op_4a79_0_ff; +extern cpuop_func op_4a7a_0_nf; +extern cpuop_func op_4a7a_0_ff; +extern cpuop_func op_4a7b_0_nf; +extern cpuop_func op_4a7b_0_ff; +extern cpuop_func op_4a7c_0_nf; +extern cpuop_func op_4a7c_0_ff; +extern cpuop_func op_4a80_0_nf; +extern cpuop_func op_4a80_0_ff; +extern cpuop_func op_4a88_0_nf; +extern cpuop_func op_4a88_0_ff; +extern cpuop_func op_4a90_0_nf; +extern cpuop_func op_4a90_0_ff; +extern cpuop_func op_4a98_0_nf; +extern cpuop_func op_4a98_0_ff; +extern cpuop_func op_4aa0_0_nf; +extern cpuop_func op_4aa0_0_ff; +extern cpuop_func op_4aa8_0_nf; +extern cpuop_func op_4aa8_0_ff; +extern cpuop_func op_4ab0_0_nf; +extern cpuop_func op_4ab0_0_ff; +extern cpuop_func op_4ab8_0_nf; +extern cpuop_func op_4ab8_0_ff; +extern cpuop_func op_4ab9_0_nf; +extern cpuop_func op_4ab9_0_ff; +extern cpuop_func op_4aba_0_nf; +extern cpuop_func op_4aba_0_ff; +extern cpuop_func op_4abb_0_nf; +extern cpuop_func op_4abb_0_ff; +extern cpuop_func op_4abc_0_nf; +extern cpuop_func op_4abc_0_ff; +extern cpuop_func op_4ac0_0_nf; +extern cpuop_func op_4ac0_0_ff; +extern cpuop_func op_4ac8_0_nf; +extern cpuop_func op_4ac8_0_ff; +extern cpuop_func op_4acc_0_nf; +extern cpuop_func op_4acc_0_ff; +extern cpuop_func op_4ad0_0_nf; +extern cpuop_func op_4ad0_0_ff; +extern cpuop_func op_4ad8_0_nf; +extern cpuop_func op_4ad8_0_ff; +extern cpuop_func op_4ae0_0_nf; +extern cpuop_func op_4ae0_0_ff; +extern cpuop_func op_4ae8_0_nf; +extern cpuop_func op_4ae8_0_ff; +extern cpuop_func op_4af0_0_nf; +extern cpuop_func op_4af0_0_ff; +extern cpuop_func op_4af8_0_nf; +extern cpuop_func op_4af8_0_ff; +extern cpuop_func op_4af9_0_nf; +extern cpuop_func op_4af9_0_ff; +extern cpuop_func op_4c00_0_nf; +extern cpuop_func op_4c00_0_ff; +extern cpuop_func op_4c10_0_nf; +extern cpuop_func op_4c10_0_ff; +extern cpuop_func op_4c18_0_nf; +extern cpuop_func op_4c18_0_ff; +extern cpuop_func op_4c20_0_nf; +extern cpuop_func op_4c20_0_ff; +extern cpuop_func op_4c28_0_nf; +extern cpuop_func op_4c28_0_ff; +extern cpuop_func op_4c30_0_nf; +extern cpuop_func op_4c30_0_ff; +extern cpuop_func op_4c38_0_nf; +extern cpuop_func op_4c38_0_ff; +extern cpuop_func op_4c39_0_nf; +extern cpuop_func op_4c39_0_ff; +extern cpuop_func op_4c3a_0_nf; +extern cpuop_func op_4c3a_0_ff; +extern cpuop_func op_4c3b_0_nf; +extern cpuop_func op_4c3b_0_ff; +extern cpuop_func op_4c3c_0_nf; +extern cpuop_func op_4c3c_0_ff; +extern cpuop_func op_4c40_0_nf; +extern cpuop_func op_4c40_0_ff; +extern cpuop_func op_4c50_0_nf; +extern cpuop_func op_4c50_0_ff; +extern cpuop_func op_4c58_0_nf; +extern cpuop_func op_4c58_0_ff; +extern cpuop_func op_4c60_0_nf; +extern cpuop_func op_4c60_0_ff; +extern cpuop_func op_4c68_0_nf; +extern cpuop_func op_4c68_0_ff; +extern cpuop_func op_4c70_0_nf; +extern cpuop_func op_4c70_0_ff; +extern cpuop_func op_4c78_0_nf; +extern cpuop_func op_4c78_0_ff; +extern cpuop_func op_4c79_0_nf; +extern cpuop_func op_4c79_0_ff; +extern cpuop_func op_4c7a_0_nf; +extern cpuop_func op_4c7a_0_ff; +extern cpuop_func op_4c7b_0_nf; +extern cpuop_func op_4c7b_0_ff; +extern cpuop_func op_4c7c_0_nf; +extern cpuop_func op_4c7c_0_ff; +extern cpuop_func op_4c90_0_nf; +extern cpuop_func op_4c90_0_ff; +extern cpuop_func op_4c98_0_nf; +extern cpuop_func op_4c98_0_ff; +extern cpuop_func op_4ca8_0_nf; +extern cpuop_func op_4ca8_0_ff; +extern cpuop_func op_4cb0_0_nf; +extern cpuop_func op_4cb0_0_ff; +extern cpuop_func op_4cb8_0_nf; +extern cpuop_func op_4cb8_0_ff; +extern cpuop_func op_4cb9_0_nf; +extern cpuop_func op_4cb9_0_ff; +extern cpuop_func op_4cba_0_nf; +extern cpuop_func op_4cba_0_ff; +extern cpuop_func op_4cbb_0_nf; +extern cpuop_func op_4cbb_0_ff; +extern cpuop_func op_4cd0_0_nf; +extern cpuop_func op_4cd0_0_ff; +extern cpuop_func op_4cd8_0_nf; +extern cpuop_func op_4cd8_0_ff; +extern cpuop_func op_4ce8_0_nf; +extern cpuop_func op_4ce8_0_ff; +extern cpuop_func op_4cf0_0_nf; +extern cpuop_func op_4cf0_0_ff; +extern cpuop_func op_4cf8_0_nf; +extern cpuop_func op_4cf8_0_ff; +extern cpuop_func op_4cf9_0_nf; +extern cpuop_func op_4cf9_0_ff; +extern cpuop_func op_4cfa_0_nf; +extern cpuop_func op_4cfa_0_ff; +extern cpuop_func op_4cfb_0_nf; +extern cpuop_func op_4cfb_0_ff; +extern cpuop_func op_4e40_0_nf; +extern cpuop_func op_4e40_0_ff; +extern cpuop_func op_4e50_0_nf; +extern cpuop_func op_4e50_0_ff; +extern cpuop_func op_4e58_0_nf; +extern cpuop_func op_4e58_0_ff; +extern cpuop_func op_4e60_0_nf; +extern cpuop_func op_4e60_0_ff; +extern cpuop_func op_4e68_0_nf; +extern cpuop_func op_4e68_0_ff; +extern cpuop_func op_4e70_0_nf; +extern cpuop_func op_4e70_0_ff; +extern cpuop_func op_4e71_0_nf; +extern cpuop_func op_4e71_0_ff; +extern cpuop_func op_4e72_0_nf; +extern cpuop_func op_4e72_0_ff; +extern cpuop_func op_4e73_0_nf; +extern cpuop_func op_4e73_0_ff; +extern cpuop_func op_4e74_0_nf; +extern cpuop_func op_4e74_0_ff; +extern cpuop_func op_4e75_0_nf; +extern cpuop_func op_4e75_0_ff; +extern cpuop_func op_4e76_0_nf; +extern cpuop_func op_4e76_0_ff; +extern cpuop_func op_4e77_0_nf; +extern cpuop_func op_4e77_0_ff; +extern cpuop_func op_4e7a_0_nf; +extern cpuop_func op_4e7a_0_ff; +extern cpuop_func op_4e7b_0_nf; +extern cpuop_func op_4e7b_0_ff; +extern cpuop_func op_4e90_0_nf; +extern cpuop_func op_4e90_0_ff; +extern cpuop_func op_4ea8_0_nf; +extern cpuop_func op_4ea8_0_ff; +extern cpuop_func op_4eb0_0_nf; +extern cpuop_func op_4eb0_0_ff; +extern cpuop_func op_4eb8_0_nf; +extern cpuop_func op_4eb8_0_ff; +extern cpuop_func op_4eb9_0_nf; +extern cpuop_func op_4eb9_0_ff; +extern cpuop_func op_4eba_0_nf; +extern cpuop_func op_4eba_0_ff; +extern cpuop_func op_4ebb_0_nf; +extern cpuop_func op_4ebb_0_ff; +extern cpuop_func op_4ed0_0_nf; +extern cpuop_func op_4ed0_0_ff; +extern cpuop_func op_4ee8_0_nf; +extern cpuop_func op_4ee8_0_ff; +extern cpuop_func op_4ef0_0_nf; +extern cpuop_func op_4ef0_0_ff; +extern cpuop_func op_4ef8_0_nf; +extern cpuop_func op_4ef8_0_ff; +extern cpuop_func op_4ef9_0_nf; +extern cpuop_func op_4ef9_0_ff; +extern cpuop_func op_4efa_0_nf; +extern cpuop_func op_4efa_0_ff; +extern cpuop_func op_4efb_0_nf; +extern cpuop_func op_4efb_0_ff; +extern cpuop_func op_5000_0_nf; +extern cpuop_func op_5000_0_ff; +extern cpuop_func op_5010_0_nf; +extern cpuop_func op_5010_0_ff; +extern cpuop_func op_5018_0_nf; +extern cpuop_func op_5018_0_ff; +extern cpuop_func op_5020_0_nf; +extern cpuop_func op_5020_0_ff; +extern cpuop_func op_5028_0_nf; +extern cpuop_func op_5028_0_ff; +extern cpuop_func op_5030_0_nf; +extern cpuop_func op_5030_0_ff; +extern cpuop_func op_5038_0_nf; +extern cpuop_func op_5038_0_ff; +extern cpuop_func op_5039_0_nf; +extern cpuop_func op_5039_0_ff; +extern cpuop_func op_5040_0_nf; +extern cpuop_func op_5040_0_ff; +extern cpuop_func op_5048_0_nf; +extern cpuop_func op_5048_0_ff; +extern cpuop_func op_5050_0_nf; +extern cpuop_func op_5050_0_ff; +extern cpuop_func op_5058_0_nf; +extern cpuop_func op_5058_0_ff; +extern cpuop_func op_5060_0_nf; +extern cpuop_func op_5060_0_ff; +extern cpuop_func op_5068_0_nf; +extern cpuop_func op_5068_0_ff; +extern cpuop_func op_5070_0_nf; +extern cpuop_func op_5070_0_ff; +extern cpuop_func op_5078_0_nf; +extern cpuop_func op_5078_0_ff; +extern cpuop_func op_5079_0_nf; +extern cpuop_func op_5079_0_ff; +extern cpuop_func op_5080_0_nf; +extern cpuop_func op_5080_0_ff; +extern cpuop_func op_5088_0_nf; +extern cpuop_func op_5088_0_ff; +extern cpuop_func op_5090_0_nf; +extern cpuop_func op_5090_0_ff; +extern cpuop_func op_5098_0_nf; +extern cpuop_func op_5098_0_ff; +extern cpuop_func op_50a0_0_nf; +extern cpuop_func op_50a0_0_ff; +extern cpuop_func op_50a8_0_nf; +extern cpuop_func op_50a8_0_ff; +extern cpuop_func op_50b0_0_nf; +extern cpuop_func op_50b0_0_ff; +extern cpuop_func op_50b8_0_nf; +extern cpuop_func op_50b8_0_ff; +extern cpuop_func op_50b9_0_nf; +extern cpuop_func op_50b9_0_ff; +extern cpuop_func op_50c0_0_nf; +extern cpuop_func op_50c0_0_ff; +extern cpuop_func op_50c8_0_nf; +extern cpuop_func op_50c8_0_ff; +extern cpuop_func op_50d0_0_nf; +extern cpuop_func op_50d0_0_ff; +extern cpuop_func op_50d8_0_nf; +extern cpuop_func op_50d8_0_ff; +extern cpuop_func op_50e0_0_nf; +extern cpuop_func op_50e0_0_ff; +extern cpuop_func op_50e8_0_nf; +extern cpuop_func op_50e8_0_ff; +extern cpuop_func op_50f0_0_nf; +extern cpuop_func op_50f0_0_ff; +extern cpuop_func op_50f8_0_nf; +extern cpuop_func op_50f8_0_ff; +extern cpuop_func op_50f9_0_nf; +extern cpuop_func op_50f9_0_ff; +extern cpuop_func op_50fa_0_nf; +extern cpuop_func op_50fa_0_ff; +extern cpuop_func op_50fb_0_nf; +extern cpuop_func op_50fb_0_ff; +extern cpuop_func op_50fc_0_nf; +extern cpuop_func op_50fc_0_ff; +extern cpuop_func op_5100_0_nf; +extern cpuop_func op_5100_0_ff; +extern cpuop_func op_5110_0_nf; +extern cpuop_func op_5110_0_ff; +extern cpuop_func op_5118_0_nf; +extern cpuop_func op_5118_0_ff; +extern cpuop_func op_5120_0_nf; +extern cpuop_func op_5120_0_ff; +extern cpuop_func op_5128_0_nf; +extern cpuop_func op_5128_0_ff; +extern cpuop_func op_5130_0_nf; +extern cpuop_func op_5130_0_ff; +extern cpuop_func op_5138_0_nf; +extern cpuop_func op_5138_0_ff; +extern cpuop_func op_5139_0_nf; +extern cpuop_func op_5139_0_ff; +extern cpuop_func op_5140_0_nf; +extern cpuop_func op_5140_0_ff; +extern cpuop_func op_5148_0_nf; +extern cpuop_func op_5148_0_ff; +extern cpuop_func op_5150_0_nf; +extern cpuop_func op_5150_0_ff; +extern cpuop_func op_5158_0_nf; +extern cpuop_func op_5158_0_ff; +extern cpuop_func op_5160_0_nf; +extern cpuop_func op_5160_0_ff; +extern cpuop_func op_5168_0_nf; +extern cpuop_func op_5168_0_ff; +extern cpuop_func op_5170_0_nf; +extern cpuop_func op_5170_0_ff; +extern cpuop_func op_5178_0_nf; +extern cpuop_func op_5178_0_ff; +extern cpuop_func op_5179_0_nf; +extern cpuop_func op_5179_0_ff; +extern cpuop_func op_5180_0_nf; +extern cpuop_func op_5180_0_ff; +extern cpuop_func op_5188_0_nf; +extern cpuop_func op_5188_0_ff; +extern cpuop_func op_5190_0_nf; +extern cpuop_func op_5190_0_ff; +extern cpuop_func op_5198_0_nf; +extern cpuop_func op_5198_0_ff; +extern cpuop_func op_51a0_0_nf; +extern cpuop_func op_51a0_0_ff; +extern cpuop_func op_51a8_0_nf; +extern cpuop_func op_51a8_0_ff; +extern cpuop_func op_51b0_0_nf; +extern cpuop_func op_51b0_0_ff; +extern cpuop_func op_51b8_0_nf; +extern cpuop_func op_51b8_0_ff; +extern cpuop_func op_51b9_0_nf; +extern cpuop_func op_51b9_0_ff; +extern cpuop_func op_51c0_0_nf; +extern cpuop_func op_51c0_0_ff; +extern cpuop_func op_51c8_0_nf; +extern cpuop_func op_51c8_0_ff; +extern cpuop_func op_51d0_0_nf; +extern cpuop_func op_51d0_0_ff; +extern cpuop_func op_51d8_0_nf; +extern cpuop_func op_51d8_0_ff; +extern cpuop_func op_51e0_0_nf; +extern cpuop_func op_51e0_0_ff; +extern cpuop_func op_51e8_0_nf; +extern cpuop_func op_51e8_0_ff; +extern cpuop_func op_51f0_0_nf; +extern cpuop_func op_51f0_0_ff; +extern cpuop_func op_51f8_0_nf; +extern cpuop_func op_51f8_0_ff; +extern cpuop_func op_51f9_0_nf; +extern cpuop_func op_51f9_0_ff; +extern cpuop_func op_51fa_0_nf; +extern cpuop_func op_51fa_0_ff; +extern cpuop_func op_51fb_0_nf; +extern cpuop_func op_51fb_0_ff; +extern cpuop_func op_51fc_0_nf; +extern cpuop_func op_51fc_0_ff; +extern cpuop_func op_52c0_0_nf; +extern cpuop_func op_52c0_0_ff; +extern cpuop_func op_52c8_0_nf; +extern cpuop_func op_52c8_0_ff; +extern cpuop_func op_52d0_0_nf; +extern cpuop_func op_52d0_0_ff; +extern cpuop_func op_52d8_0_nf; +extern cpuop_func op_52d8_0_ff; +extern cpuop_func op_52e0_0_nf; +extern cpuop_func op_52e0_0_ff; +extern cpuop_func op_52e8_0_nf; +extern cpuop_func op_52e8_0_ff; +extern cpuop_func op_52f0_0_nf; +extern cpuop_func op_52f0_0_ff; +extern cpuop_func op_52f8_0_nf; +extern cpuop_func op_52f8_0_ff; +extern cpuop_func op_52f9_0_nf; +extern cpuop_func op_52f9_0_ff; +extern cpuop_func op_52fa_0_nf; +extern cpuop_func op_52fa_0_ff; +extern cpuop_func op_52fb_0_nf; +extern cpuop_func op_52fb_0_ff; +extern cpuop_func op_52fc_0_nf; +extern cpuop_func op_52fc_0_ff; +extern cpuop_func op_53c0_0_nf; +extern cpuop_func op_53c0_0_ff; +extern cpuop_func op_53c8_0_nf; +extern cpuop_func op_53c8_0_ff; +extern cpuop_func op_53d0_0_nf; +extern cpuop_func op_53d0_0_ff; +extern cpuop_func op_53d8_0_nf; +extern cpuop_func op_53d8_0_ff; +extern cpuop_func op_53e0_0_nf; +extern cpuop_func op_53e0_0_ff; +extern cpuop_func op_53e8_0_nf; +extern cpuop_func op_53e8_0_ff; +extern cpuop_func op_53f0_0_nf; +extern cpuop_func op_53f0_0_ff; +extern cpuop_func op_53f8_0_nf; +extern cpuop_func op_53f8_0_ff; +extern cpuop_func op_53f9_0_nf; +extern cpuop_func op_53f9_0_ff; +extern cpuop_func op_53fa_0_nf; +extern cpuop_func op_53fa_0_ff; +extern cpuop_func op_53fb_0_nf; +extern cpuop_func op_53fb_0_ff; +extern cpuop_func op_53fc_0_nf; +extern cpuop_func op_53fc_0_ff; +extern cpuop_func op_54c0_0_nf; +extern cpuop_func op_54c0_0_ff; +extern cpuop_func op_54c8_0_nf; +extern cpuop_func op_54c8_0_ff; +extern cpuop_func op_54d0_0_nf; +extern cpuop_func op_54d0_0_ff; +extern cpuop_func op_54d8_0_nf; +extern cpuop_func op_54d8_0_ff; +extern cpuop_func op_54e0_0_nf; +extern cpuop_func op_54e0_0_ff; +extern cpuop_func op_54e8_0_nf; +extern cpuop_func op_54e8_0_ff; +extern cpuop_func op_54f0_0_nf; +extern cpuop_func op_54f0_0_ff; +extern cpuop_func op_54f8_0_nf; +extern cpuop_func op_54f8_0_ff; +extern cpuop_func op_54f9_0_nf; +extern cpuop_func op_54f9_0_ff; +extern cpuop_func op_54fa_0_nf; +extern cpuop_func op_54fa_0_ff; +extern cpuop_func op_54fb_0_nf; +extern cpuop_func op_54fb_0_ff; +extern cpuop_func op_54fc_0_nf; +extern cpuop_func op_54fc_0_ff; +extern cpuop_func op_55c0_0_nf; +extern cpuop_func op_55c0_0_ff; +extern cpuop_func op_55c8_0_nf; +extern cpuop_func op_55c8_0_ff; +extern cpuop_func op_55d0_0_nf; +extern cpuop_func op_55d0_0_ff; +extern cpuop_func op_55d8_0_nf; +extern cpuop_func op_55d8_0_ff; +extern cpuop_func op_55e0_0_nf; +extern cpuop_func op_55e0_0_ff; +extern cpuop_func op_55e8_0_nf; +extern cpuop_func op_55e8_0_ff; +extern cpuop_func op_55f0_0_nf; +extern cpuop_func op_55f0_0_ff; +extern cpuop_func op_55f8_0_nf; +extern cpuop_func op_55f8_0_ff; +extern cpuop_func op_55f9_0_nf; +extern cpuop_func op_55f9_0_ff; +extern cpuop_func op_55fa_0_nf; +extern cpuop_func op_55fa_0_ff; +extern cpuop_func op_55fb_0_nf; +extern cpuop_func op_55fb_0_ff; +extern cpuop_func op_55fc_0_nf; +extern cpuop_func op_55fc_0_ff; +extern cpuop_func op_56c0_0_nf; +extern cpuop_func op_56c0_0_ff; +extern cpuop_func op_56c8_0_nf; +extern cpuop_func op_56c8_0_ff; +extern cpuop_func op_56d0_0_nf; +extern cpuop_func op_56d0_0_ff; +extern cpuop_func op_56d8_0_nf; +extern cpuop_func op_56d8_0_ff; +extern cpuop_func op_56e0_0_nf; +extern cpuop_func op_56e0_0_ff; +extern cpuop_func op_56e8_0_nf; +extern cpuop_func op_56e8_0_ff; +extern cpuop_func op_56f0_0_nf; +extern cpuop_func op_56f0_0_ff; +extern cpuop_func op_56f8_0_nf; +extern cpuop_func op_56f8_0_ff; +extern cpuop_func op_56f9_0_nf; +extern cpuop_func op_56f9_0_ff; +extern cpuop_func op_56fa_0_nf; +extern cpuop_func op_56fa_0_ff; +extern cpuop_func op_56fb_0_nf; +extern cpuop_func op_56fb_0_ff; +extern cpuop_func op_56fc_0_nf; +extern cpuop_func op_56fc_0_ff; +extern cpuop_func op_57c0_0_nf; +extern cpuop_func op_57c0_0_ff; +extern cpuop_func op_57c8_0_nf; +extern cpuop_func op_57c8_0_ff; +extern cpuop_func op_57d0_0_nf; +extern cpuop_func op_57d0_0_ff; +extern cpuop_func op_57d8_0_nf; +extern cpuop_func op_57d8_0_ff; +extern cpuop_func op_57e0_0_nf; +extern cpuop_func op_57e0_0_ff; +extern cpuop_func op_57e8_0_nf; +extern cpuop_func op_57e8_0_ff; +extern cpuop_func op_57f0_0_nf; +extern cpuop_func op_57f0_0_ff; +extern cpuop_func op_57f8_0_nf; +extern cpuop_func op_57f8_0_ff; +extern cpuop_func op_57f9_0_nf; +extern cpuop_func op_57f9_0_ff; +extern cpuop_func op_57fa_0_nf; +extern cpuop_func op_57fa_0_ff; +extern cpuop_func op_57fb_0_nf; +extern cpuop_func op_57fb_0_ff; +extern cpuop_func op_57fc_0_nf; +extern cpuop_func op_57fc_0_ff; +extern cpuop_func op_58c0_0_nf; +extern cpuop_func op_58c0_0_ff; +extern cpuop_func op_58c8_0_nf; +extern cpuop_func op_58c8_0_ff; +extern cpuop_func op_58d0_0_nf; +extern cpuop_func op_58d0_0_ff; +extern cpuop_func op_58d8_0_nf; +extern cpuop_func op_58d8_0_ff; +extern cpuop_func op_58e0_0_nf; +extern cpuop_func op_58e0_0_ff; +extern cpuop_func op_58e8_0_nf; +extern cpuop_func op_58e8_0_ff; +extern cpuop_func op_58f0_0_nf; +extern cpuop_func op_58f0_0_ff; +extern cpuop_func op_58f8_0_nf; +extern cpuop_func op_58f8_0_ff; +extern cpuop_func op_58f9_0_nf; +extern cpuop_func op_58f9_0_ff; +extern cpuop_func op_58fa_0_nf; +extern cpuop_func op_58fa_0_ff; +extern cpuop_func op_58fb_0_nf; +extern cpuop_func op_58fb_0_ff; +extern cpuop_func op_58fc_0_nf; +extern cpuop_func op_58fc_0_ff; +extern cpuop_func op_59c0_0_nf; +extern cpuop_func op_59c0_0_ff; +extern cpuop_func op_59c8_0_nf; +extern cpuop_func op_59c8_0_ff; +extern cpuop_func op_59d0_0_nf; +extern cpuop_func op_59d0_0_ff; +extern cpuop_func op_59d8_0_nf; +extern cpuop_func op_59d8_0_ff; +extern cpuop_func op_59e0_0_nf; +extern cpuop_func op_59e0_0_ff; +extern cpuop_func op_59e8_0_nf; +extern cpuop_func op_59e8_0_ff; +extern cpuop_func op_59f0_0_nf; +extern cpuop_func op_59f0_0_ff; +extern cpuop_func op_59f8_0_nf; +extern cpuop_func op_59f8_0_ff; +extern cpuop_func op_59f9_0_nf; +extern cpuop_func op_59f9_0_ff; +extern cpuop_func op_59fa_0_nf; +extern cpuop_func op_59fa_0_ff; +extern cpuop_func op_59fb_0_nf; +extern cpuop_func op_59fb_0_ff; +extern cpuop_func op_59fc_0_nf; +extern cpuop_func op_59fc_0_ff; +extern cpuop_func op_5ac0_0_nf; +extern cpuop_func op_5ac0_0_ff; +extern cpuop_func op_5ac8_0_nf; +extern cpuop_func op_5ac8_0_ff; +extern cpuop_func op_5ad0_0_nf; +extern cpuop_func op_5ad0_0_ff; +extern cpuop_func op_5ad8_0_nf; +extern cpuop_func op_5ad8_0_ff; +extern cpuop_func op_5ae0_0_nf; +extern cpuop_func op_5ae0_0_ff; +extern cpuop_func op_5ae8_0_nf; +extern cpuop_func op_5ae8_0_ff; +extern cpuop_func op_5af0_0_nf; +extern cpuop_func op_5af0_0_ff; +extern cpuop_func op_5af8_0_nf; +extern cpuop_func op_5af8_0_ff; +extern cpuop_func op_5af9_0_nf; +extern cpuop_func op_5af9_0_ff; +extern cpuop_func op_5afa_0_nf; +extern cpuop_func op_5afa_0_ff; +extern cpuop_func op_5afb_0_nf; +extern cpuop_func op_5afb_0_ff; +extern cpuop_func op_5afc_0_nf; +extern cpuop_func op_5afc_0_ff; +extern cpuop_func op_5bc0_0_nf; +extern cpuop_func op_5bc0_0_ff; +extern cpuop_func op_5bc8_0_nf; +extern cpuop_func op_5bc8_0_ff; +extern cpuop_func op_5bd0_0_nf; +extern cpuop_func op_5bd0_0_ff; +extern cpuop_func op_5bd8_0_nf; +extern cpuop_func op_5bd8_0_ff; +extern cpuop_func op_5be0_0_nf; +extern cpuop_func op_5be0_0_ff; +extern cpuop_func op_5be8_0_nf; +extern cpuop_func op_5be8_0_ff; +extern cpuop_func op_5bf0_0_nf; +extern cpuop_func op_5bf0_0_ff; +extern cpuop_func op_5bf8_0_nf; +extern cpuop_func op_5bf8_0_ff; +extern cpuop_func op_5bf9_0_nf; +extern cpuop_func op_5bf9_0_ff; +extern cpuop_func op_5bfa_0_nf; +extern cpuop_func op_5bfa_0_ff; +extern cpuop_func op_5bfb_0_nf; +extern cpuop_func op_5bfb_0_ff; +extern cpuop_func op_5bfc_0_nf; +extern cpuop_func op_5bfc_0_ff; +extern cpuop_func op_5cc0_0_nf; +extern cpuop_func op_5cc0_0_ff; +extern cpuop_func op_5cc8_0_nf; +extern cpuop_func op_5cc8_0_ff; +extern cpuop_func op_5cd0_0_nf; +extern cpuop_func op_5cd0_0_ff; +extern cpuop_func op_5cd8_0_nf; +extern cpuop_func op_5cd8_0_ff; +extern cpuop_func op_5ce0_0_nf; +extern cpuop_func op_5ce0_0_ff; +extern cpuop_func op_5ce8_0_nf; +extern cpuop_func op_5ce8_0_ff; +extern cpuop_func op_5cf0_0_nf; +extern cpuop_func op_5cf0_0_ff; +extern cpuop_func op_5cf8_0_nf; +extern cpuop_func op_5cf8_0_ff; +extern cpuop_func op_5cf9_0_nf; +extern cpuop_func op_5cf9_0_ff; +extern cpuop_func op_5cfa_0_nf; +extern cpuop_func op_5cfa_0_ff; +extern cpuop_func op_5cfb_0_nf; +extern cpuop_func op_5cfb_0_ff; +extern cpuop_func op_5cfc_0_nf; +extern cpuop_func op_5cfc_0_ff; +extern cpuop_func op_5dc0_0_nf; +extern cpuop_func op_5dc0_0_ff; +extern cpuop_func op_5dc8_0_nf; +extern cpuop_func op_5dc8_0_ff; +extern cpuop_func op_5dd0_0_nf; +extern cpuop_func op_5dd0_0_ff; +extern cpuop_func op_5dd8_0_nf; +extern cpuop_func op_5dd8_0_ff; +extern cpuop_func op_5de0_0_nf; +extern cpuop_func op_5de0_0_ff; +extern cpuop_func op_5de8_0_nf; +extern cpuop_func op_5de8_0_ff; +extern cpuop_func op_5df0_0_nf; +extern cpuop_func op_5df0_0_ff; +extern cpuop_func op_5df8_0_nf; +extern cpuop_func op_5df8_0_ff; +extern cpuop_func op_5df9_0_nf; +extern cpuop_func op_5df9_0_ff; +extern cpuop_func op_5dfa_0_nf; +extern cpuop_func op_5dfa_0_ff; +extern cpuop_func op_5dfb_0_nf; +extern cpuop_func op_5dfb_0_ff; +extern cpuop_func op_5dfc_0_nf; +extern cpuop_func op_5dfc_0_ff; +extern cpuop_func op_5ec0_0_nf; +extern cpuop_func op_5ec0_0_ff; +extern cpuop_func op_5ec8_0_nf; +extern cpuop_func op_5ec8_0_ff; +extern cpuop_func op_5ed0_0_nf; +extern cpuop_func op_5ed0_0_ff; +extern cpuop_func op_5ed8_0_nf; +extern cpuop_func op_5ed8_0_ff; +extern cpuop_func op_5ee0_0_nf; +extern cpuop_func op_5ee0_0_ff; +extern cpuop_func op_5ee8_0_nf; +extern cpuop_func op_5ee8_0_ff; +extern cpuop_func op_5ef0_0_nf; +extern cpuop_func op_5ef0_0_ff; +extern cpuop_func op_5ef8_0_nf; +extern cpuop_func op_5ef8_0_ff; +extern cpuop_func op_5ef9_0_nf; +extern cpuop_func op_5ef9_0_ff; +extern cpuop_func op_5efa_0_nf; +extern cpuop_func op_5efa_0_ff; +extern cpuop_func op_5efb_0_nf; +extern cpuop_func op_5efb_0_ff; +extern cpuop_func op_5efc_0_nf; +extern cpuop_func op_5efc_0_ff; +extern cpuop_func op_5fc0_0_nf; +extern cpuop_func op_5fc0_0_ff; +extern cpuop_func op_5fc8_0_nf; +extern cpuop_func op_5fc8_0_ff; +extern cpuop_func op_5fd0_0_nf; +extern cpuop_func op_5fd0_0_ff; +extern cpuop_func op_5fd8_0_nf; +extern cpuop_func op_5fd8_0_ff; +extern cpuop_func op_5fe0_0_nf; +extern cpuop_func op_5fe0_0_ff; +extern cpuop_func op_5fe8_0_nf; +extern cpuop_func op_5fe8_0_ff; +extern cpuop_func op_5ff0_0_nf; +extern cpuop_func op_5ff0_0_ff; +extern cpuop_func op_5ff8_0_nf; +extern cpuop_func op_5ff8_0_ff; +extern cpuop_func op_5ff9_0_nf; +extern cpuop_func op_5ff9_0_ff; +extern cpuop_func op_5ffa_0_nf; +extern cpuop_func op_5ffa_0_ff; +extern cpuop_func op_5ffb_0_nf; +extern cpuop_func op_5ffb_0_ff; +extern cpuop_func op_5ffc_0_nf; +extern cpuop_func op_5ffc_0_ff; +extern cpuop_func op_6000_0_nf; +extern cpuop_func op_6000_0_ff; +extern cpuop_func op_6001_0_nf; +extern cpuop_func op_6001_0_ff; +extern cpuop_func op_60ff_0_nf; +extern cpuop_func op_60ff_0_ff; +extern cpuop_func op_6100_0_nf; +extern cpuop_func op_6100_0_ff; +extern cpuop_func op_6101_0_nf; +extern cpuop_func op_6101_0_ff; +extern cpuop_func op_61ff_0_nf; +extern cpuop_func op_61ff_0_ff; +extern cpuop_func op_6200_0_nf; +extern cpuop_func op_6200_0_ff; +extern cpuop_func op_6201_0_nf; +extern cpuop_func op_6201_0_ff; +extern cpuop_func op_62ff_0_nf; +extern cpuop_func op_62ff_0_ff; +extern cpuop_func op_6300_0_nf; +extern cpuop_func op_6300_0_ff; +extern cpuop_func op_6301_0_nf; +extern cpuop_func op_6301_0_ff; +extern cpuop_func op_63ff_0_nf; +extern cpuop_func op_63ff_0_ff; +extern cpuop_func op_6400_0_nf; +extern cpuop_func op_6400_0_ff; +extern cpuop_func op_6401_0_nf; +extern cpuop_func op_6401_0_ff; +extern cpuop_func op_64ff_0_nf; +extern cpuop_func op_64ff_0_ff; +extern cpuop_func op_6500_0_nf; +extern cpuop_func op_6500_0_ff; +extern cpuop_func op_6501_0_nf; +extern cpuop_func op_6501_0_ff; +extern cpuop_func op_65ff_0_nf; +extern cpuop_func op_65ff_0_ff; +extern cpuop_func op_6600_0_nf; +extern cpuop_func op_6600_0_ff; +extern cpuop_func op_6601_0_nf; +extern cpuop_func op_6601_0_ff; +extern cpuop_func op_66ff_0_nf; +extern cpuop_func op_66ff_0_ff; +extern cpuop_func op_6700_0_nf; +extern cpuop_func op_6700_0_ff; +extern cpuop_func op_6701_0_nf; +extern cpuop_func op_6701_0_ff; +extern cpuop_func op_67ff_0_nf; +extern cpuop_func op_67ff_0_ff; +extern cpuop_func op_6800_0_nf; +extern cpuop_func op_6800_0_ff; +extern cpuop_func op_6801_0_nf; +extern cpuop_func op_6801_0_ff; +extern cpuop_func op_68ff_0_nf; +extern cpuop_func op_68ff_0_ff; +extern cpuop_func op_6900_0_nf; +extern cpuop_func op_6900_0_ff; +extern cpuop_func op_6901_0_nf; +extern cpuop_func op_6901_0_ff; +extern cpuop_func op_69ff_0_nf; +extern cpuop_func op_69ff_0_ff; +extern cpuop_func op_6a00_0_nf; +extern cpuop_func op_6a00_0_ff; +extern cpuop_func op_6a01_0_nf; +extern cpuop_func op_6a01_0_ff; +extern cpuop_func op_6aff_0_nf; +extern cpuop_func op_6aff_0_ff; +extern cpuop_func op_6b00_0_nf; +extern cpuop_func op_6b00_0_ff; +extern cpuop_func op_6b01_0_nf; +extern cpuop_func op_6b01_0_ff; +extern cpuop_func op_6bff_0_nf; +extern cpuop_func op_6bff_0_ff; +extern cpuop_func op_6c00_0_nf; +extern cpuop_func op_6c00_0_ff; +extern cpuop_func op_6c01_0_nf; +extern cpuop_func op_6c01_0_ff; +extern cpuop_func op_6cff_0_nf; +extern cpuop_func op_6cff_0_ff; +extern cpuop_func op_6d00_0_nf; +extern cpuop_func op_6d00_0_ff; +extern cpuop_func op_6d01_0_nf; +extern cpuop_func op_6d01_0_ff; +extern cpuop_func op_6dff_0_nf; +extern cpuop_func op_6dff_0_ff; +extern cpuop_func op_6e00_0_nf; +extern cpuop_func op_6e00_0_ff; +extern cpuop_func op_6e01_0_nf; +extern cpuop_func op_6e01_0_ff; +extern cpuop_func op_6eff_0_nf; +extern cpuop_func op_6eff_0_ff; +extern cpuop_func op_6f00_0_nf; +extern cpuop_func op_6f00_0_ff; +extern cpuop_func op_6f01_0_nf; +extern cpuop_func op_6f01_0_ff; +extern cpuop_func op_6fff_0_nf; +extern cpuop_func op_6fff_0_ff; +extern cpuop_func op_7000_0_nf; +extern cpuop_func op_7000_0_ff; +extern cpuop_func op_8000_0_nf; +extern cpuop_func op_8000_0_ff; +extern cpuop_func op_8010_0_nf; +extern cpuop_func op_8010_0_ff; +extern cpuop_func op_8018_0_nf; +extern cpuop_func op_8018_0_ff; +extern cpuop_func op_8020_0_nf; +extern cpuop_func op_8020_0_ff; +extern cpuop_func op_8028_0_nf; +extern cpuop_func op_8028_0_ff; +extern cpuop_func op_8030_0_nf; +extern cpuop_func op_8030_0_ff; +extern cpuop_func op_8038_0_nf; +extern cpuop_func op_8038_0_ff; +extern cpuop_func op_8039_0_nf; +extern cpuop_func op_8039_0_ff; +extern cpuop_func op_803a_0_nf; +extern cpuop_func op_803a_0_ff; +extern cpuop_func op_803b_0_nf; +extern cpuop_func op_803b_0_ff; +extern cpuop_func op_803c_0_nf; +extern cpuop_func op_803c_0_ff; +extern cpuop_func op_8040_0_nf; +extern cpuop_func op_8040_0_ff; +extern cpuop_func op_8050_0_nf; +extern cpuop_func op_8050_0_ff; +extern cpuop_func op_8058_0_nf; +extern cpuop_func op_8058_0_ff; +extern cpuop_func op_8060_0_nf; +extern cpuop_func op_8060_0_ff; +extern cpuop_func op_8068_0_nf; +extern cpuop_func op_8068_0_ff; +extern cpuop_func op_8070_0_nf; +extern cpuop_func op_8070_0_ff; +extern cpuop_func op_8078_0_nf; +extern cpuop_func op_8078_0_ff; +extern cpuop_func op_8079_0_nf; +extern cpuop_func op_8079_0_ff; +extern cpuop_func op_807a_0_nf; +extern cpuop_func op_807a_0_ff; +extern cpuop_func op_807b_0_nf; +extern cpuop_func op_807b_0_ff; +extern cpuop_func op_807c_0_nf; +extern cpuop_func op_807c_0_ff; +extern cpuop_func op_8080_0_nf; +extern cpuop_func op_8080_0_ff; +extern cpuop_func op_8090_0_nf; +extern cpuop_func op_8090_0_ff; +extern cpuop_func op_8098_0_nf; +extern cpuop_func op_8098_0_ff; +extern cpuop_func op_80a0_0_nf; +extern cpuop_func op_80a0_0_ff; +extern cpuop_func op_80a8_0_nf; +extern cpuop_func op_80a8_0_ff; +extern cpuop_func op_80b0_0_nf; +extern cpuop_func op_80b0_0_ff; +extern cpuop_func op_80b8_0_nf; +extern cpuop_func op_80b8_0_ff; +extern cpuop_func op_80b9_0_nf; +extern cpuop_func op_80b9_0_ff; +extern cpuop_func op_80ba_0_nf; +extern cpuop_func op_80ba_0_ff; +extern cpuop_func op_80bb_0_nf; +extern cpuop_func op_80bb_0_ff; +extern cpuop_func op_80bc_0_nf; +extern cpuop_func op_80bc_0_ff; +extern cpuop_func op_80c0_0_nf; +extern cpuop_func op_80c0_0_ff; +extern cpuop_func op_80d0_0_nf; +extern cpuop_func op_80d0_0_ff; +extern cpuop_func op_80d8_0_nf; +extern cpuop_func op_80d8_0_ff; +extern cpuop_func op_80e0_0_nf; +extern cpuop_func op_80e0_0_ff; +extern cpuop_func op_80e8_0_nf; +extern cpuop_func op_80e8_0_ff; +extern cpuop_func op_80f0_0_nf; +extern cpuop_func op_80f0_0_ff; +extern cpuop_func op_80f8_0_nf; +extern cpuop_func op_80f8_0_ff; +extern cpuop_func op_80f9_0_nf; +extern cpuop_func op_80f9_0_ff; +extern cpuop_func op_80fa_0_nf; +extern cpuop_func op_80fa_0_ff; +extern cpuop_func op_80fb_0_nf; +extern cpuop_func op_80fb_0_ff; +extern cpuop_func op_80fc_0_nf; +extern cpuop_func op_80fc_0_ff; +extern cpuop_func op_8100_0_nf; +extern cpuop_func op_8100_0_ff; +extern cpuop_func op_8108_0_nf; +extern cpuop_func op_8108_0_ff; +extern cpuop_func op_8110_0_nf; +extern cpuop_func op_8110_0_ff; +extern cpuop_func op_8118_0_nf; +extern cpuop_func op_8118_0_ff; +extern cpuop_func op_8120_0_nf; +extern cpuop_func op_8120_0_ff; +extern cpuop_func op_8128_0_nf; +extern cpuop_func op_8128_0_ff; +extern cpuop_func op_8130_0_nf; +extern cpuop_func op_8130_0_ff; +extern cpuop_func op_8138_0_nf; +extern cpuop_func op_8138_0_ff; +extern cpuop_func op_8139_0_nf; +extern cpuop_func op_8139_0_ff; +extern cpuop_func op_8140_0_nf; +extern cpuop_func op_8140_0_ff; +extern cpuop_func op_8148_0_nf; +extern cpuop_func op_8148_0_ff; +extern cpuop_func op_8150_0_nf; +extern cpuop_func op_8150_0_ff; +extern cpuop_func op_8158_0_nf; +extern cpuop_func op_8158_0_ff; +extern cpuop_func op_8160_0_nf; +extern cpuop_func op_8160_0_ff; +extern cpuop_func op_8168_0_nf; +extern cpuop_func op_8168_0_ff; +extern cpuop_func op_8170_0_nf; +extern cpuop_func op_8170_0_ff; +extern cpuop_func op_8178_0_nf; +extern cpuop_func op_8178_0_ff; +extern cpuop_func op_8179_0_nf; +extern cpuop_func op_8179_0_ff; +extern cpuop_func op_8180_0_nf; +extern cpuop_func op_8180_0_ff; +extern cpuop_func op_8188_0_nf; +extern cpuop_func op_8188_0_ff; +extern cpuop_func op_8190_0_nf; +extern cpuop_func op_8190_0_ff; +extern cpuop_func op_8198_0_nf; +extern cpuop_func op_8198_0_ff; +extern cpuop_func op_81a0_0_nf; +extern cpuop_func op_81a0_0_ff; +extern cpuop_func op_81a8_0_nf; +extern cpuop_func op_81a8_0_ff; +extern cpuop_func op_81b0_0_nf; +extern cpuop_func op_81b0_0_ff; +extern cpuop_func op_81b8_0_nf; +extern cpuop_func op_81b8_0_ff; +extern cpuop_func op_81b9_0_nf; +extern cpuop_func op_81b9_0_ff; +extern cpuop_func op_81c0_0_nf; +extern cpuop_func op_81c0_0_ff; +extern cpuop_func op_81d0_0_nf; +extern cpuop_func op_81d0_0_ff; +extern cpuop_func op_81d8_0_nf; +extern cpuop_func op_81d8_0_ff; +extern cpuop_func op_81e0_0_nf; +extern cpuop_func op_81e0_0_ff; +extern cpuop_func op_81e8_0_nf; +extern cpuop_func op_81e8_0_ff; +extern cpuop_func op_81f0_0_nf; +extern cpuop_func op_81f0_0_ff; +extern cpuop_func op_81f8_0_nf; +extern cpuop_func op_81f8_0_ff; +extern cpuop_func op_81f9_0_nf; +extern cpuop_func op_81f9_0_ff; +extern cpuop_func op_81fa_0_nf; +extern cpuop_func op_81fa_0_ff; +extern cpuop_func op_81fb_0_nf; +extern cpuop_func op_81fb_0_ff; +extern cpuop_func op_81fc_0_nf; +extern cpuop_func op_81fc_0_ff; +extern cpuop_func op_9000_0_nf; +extern cpuop_func op_9000_0_ff; +extern cpuop_func op_9010_0_nf; +extern cpuop_func op_9010_0_ff; +extern cpuop_func op_9018_0_nf; +extern cpuop_func op_9018_0_ff; +extern cpuop_func op_9020_0_nf; +extern cpuop_func op_9020_0_ff; +extern cpuop_func op_9028_0_nf; +extern cpuop_func op_9028_0_ff; +extern cpuop_func op_9030_0_nf; +extern cpuop_func op_9030_0_ff; +extern cpuop_func op_9038_0_nf; +extern cpuop_func op_9038_0_ff; +extern cpuop_func op_9039_0_nf; +extern cpuop_func op_9039_0_ff; +extern cpuop_func op_903a_0_nf; +extern cpuop_func op_903a_0_ff; +extern cpuop_func op_903b_0_nf; +extern cpuop_func op_903b_0_ff; +extern cpuop_func op_903c_0_nf; +extern cpuop_func op_903c_0_ff; +extern cpuop_func op_9040_0_nf; +extern cpuop_func op_9040_0_ff; +extern cpuop_func op_9048_0_nf; +extern cpuop_func op_9048_0_ff; +extern cpuop_func op_9050_0_nf; +extern cpuop_func op_9050_0_ff; +extern cpuop_func op_9058_0_nf; +extern cpuop_func op_9058_0_ff; +extern cpuop_func op_9060_0_nf; +extern cpuop_func op_9060_0_ff; +extern cpuop_func op_9068_0_nf; +extern cpuop_func op_9068_0_ff; +extern cpuop_func op_9070_0_nf; +extern cpuop_func op_9070_0_ff; +extern cpuop_func op_9078_0_nf; +extern cpuop_func op_9078_0_ff; +extern cpuop_func op_9079_0_nf; +extern cpuop_func op_9079_0_ff; +extern cpuop_func op_907a_0_nf; +extern cpuop_func op_907a_0_ff; +extern cpuop_func op_907b_0_nf; +extern cpuop_func op_907b_0_ff; +extern cpuop_func op_907c_0_nf; +extern cpuop_func op_907c_0_ff; +extern cpuop_func op_9080_0_nf; +extern cpuop_func op_9080_0_ff; +extern cpuop_func op_9088_0_nf; +extern cpuop_func op_9088_0_ff; +extern cpuop_func op_9090_0_nf; +extern cpuop_func op_9090_0_ff; +extern cpuop_func op_9098_0_nf; +extern cpuop_func op_9098_0_ff; +extern cpuop_func op_90a0_0_nf; +extern cpuop_func op_90a0_0_ff; +extern cpuop_func op_90a8_0_nf; +extern cpuop_func op_90a8_0_ff; +extern cpuop_func op_90b0_0_nf; +extern cpuop_func op_90b0_0_ff; +extern cpuop_func op_90b8_0_nf; +extern cpuop_func op_90b8_0_ff; +extern cpuop_func op_90b9_0_nf; +extern cpuop_func op_90b9_0_ff; +extern cpuop_func op_90ba_0_nf; +extern cpuop_func op_90ba_0_ff; +extern cpuop_func op_90bb_0_nf; +extern cpuop_func op_90bb_0_ff; +extern cpuop_func op_90bc_0_nf; +extern cpuop_func op_90bc_0_ff; +extern cpuop_func op_90c0_0_nf; +extern cpuop_func op_90c0_0_ff; +extern cpuop_func op_90c8_0_nf; +extern cpuop_func op_90c8_0_ff; +extern cpuop_func op_90d0_0_nf; +extern cpuop_func op_90d0_0_ff; +extern cpuop_func op_90d8_0_nf; +extern cpuop_func op_90d8_0_ff; +extern cpuop_func op_90e0_0_nf; +extern cpuop_func op_90e0_0_ff; +extern cpuop_func op_90e8_0_nf; +extern cpuop_func op_90e8_0_ff; +extern cpuop_func op_90f0_0_nf; +extern cpuop_func op_90f0_0_ff; +extern cpuop_func op_90f8_0_nf; +extern cpuop_func op_90f8_0_ff; +extern cpuop_func op_90f9_0_nf; +extern cpuop_func op_90f9_0_ff; +extern cpuop_func op_90fa_0_nf; +extern cpuop_func op_90fa_0_ff; +extern cpuop_func op_90fb_0_nf; +extern cpuop_func op_90fb_0_ff; +extern cpuop_func op_90fc_0_nf; +extern cpuop_func op_90fc_0_ff; +extern cpuop_func op_9100_0_nf; +extern cpuop_func op_9100_0_ff; +extern cpuop_func op_9108_0_nf; +extern cpuop_func op_9108_0_ff; +extern cpuop_func op_9110_0_nf; +extern cpuop_func op_9110_0_ff; +extern cpuop_func op_9118_0_nf; +extern cpuop_func op_9118_0_ff; +extern cpuop_func op_9120_0_nf; +extern cpuop_func op_9120_0_ff; +extern cpuop_func op_9128_0_nf; +extern cpuop_func op_9128_0_ff; +extern cpuop_func op_9130_0_nf; +extern cpuop_func op_9130_0_ff; +extern cpuop_func op_9138_0_nf; +extern cpuop_func op_9138_0_ff; +extern cpuop_func op_9139_0_nf; +extern cpuop_func op_9139_0_ff; +extern cpuop_func op_9140_0_nf; +extern cpuop_func op_9140_0_ff; +extern cpuop_func op_9148_0_nf; +extern cpuop_func op_9148_0_ff; +extern cpuop_func op_9150_0_nf; +extern cpuop_func op_9150_0_ff; +extern cpuop_func op_9158_0_nf; +extern cpuop_func op_9158_0_ff; +extern cpuop_func op_9160_0_nf; +extern cpuop_func op_9160_0_ff; +extern cpuop_func op_9168_0_nf; +extern cpuop_func op_9168_0_ff; +extern cpuop_func op_9170_0_nf; +extern cpuop_func op_9170_0_ff; +extern cpuop_func op_9178_0_nf; +extern cpuop_func op_9178_0_ff; +extern cpuop_func op_9179_0_nf; +extern cpuop_func op_9179_0_ff; +extern cpuop_func op_9180_0_nf; +extern cpuop_func op_9180_0_ff; +extern cpuop_func op_9188_0_nf; +extern cpuop_func op_9188_0_ff; +extern cpuop_func op_9190_0_nf; +extern cpuop_func op_9190_0_ff; +extern cpuop_func op_9198_0_nf; +extern cpuop_func op_9198_0_ff; +extern cpuop_func op_91a0_0_nf; +extern cpuop_func op_91a0_0_ff; +extern cpuop_func op_91a8_0_nf; +extern cpuop_func op_91a8_0_ff; +extern cpuop_func op_91b0_0_nf; +extern cpuop_func op_91b0_0_ff; +extern cpuop_func op_91b8_0_nf; +extern cpuop_func op_91b8_0_ff; +extern cpuop_func op_91b9_0_nf; +extern cpuop_func op_91b9_0_ff; +extern cpuop_func op_91c0_0_nf; +extern cpuop_func op_91c0_0_ff; +extern cpuop_func op_91c8_0_nf; +extern cpuop_func op_91c8_0_ff; +extern cpuop_func op_91d0_0_nf; +extern cpuop_func op_91d0_0_ff; +extern cpuop_func op_91d8_0_nf; +extern cpuop_func op_91d8_0_ff; +extern cpuop_func op_91e0_0_nf; +extern cpuop_func op_91e0_0_ff; +extern cpuop_func op_91e8_0_nf; +extern cpuop_func op_91e8_0_ff; +extern cpuop_func op_91f0_0_nf; +extern cpuop_func op_91f0_0_ff; +extern cpuop_func op_91f8_0_nf; +extern cpuop_func op_91f8_0_ff; +extern cpuop_func op_91f9_0_nf; +extern cpuop_func op_91f9_0_ff; +extern cpuop_func op_91fa_0_nf; +extern cpuop_func op_91fa_0_ff; +extern cpuop_func op_91fb_0_nf; +extern cpuop_func op_91fb_0_ff; +extern cpuop_func op_91fc_0_nf; +extern cpuop_func op_91fc_0_ff; +extern cpuop_func op_b000_0_nf; +extern cpuop_func op_b000_0_ff; +extern cpuop_func op_b010_0_nf; +extern cpuop_func op_b010_0_ff; +extern cpuop_func op_b018_0_nf; +extern cpuop_func op_b018_0_ff; +extern cpuop_func op_b020_0_nf; +extern cpuop_func op_b020_0_ff; +extern cpuop_func op_b028_0_nf; +extern cpuop_func op_b028_0_ff; +extern cpuop_func op_b030_0_nf; +extern cpuop_func op_b030_0_ff; +extern cpuop_func op_b038_0_nf; +extern cpuop_func op_b038_0_ff; +extern cpuop_func op_b039_0_nf; +extern cpuop_func op_b039_0_ff; +extern cpuop_func op_b03a_0_nf; +extern cpuop_func op_b03a_0_ff; +extern cpuop_func op_b03b_0_nf; +extern cpuop_func op_b03b_0_ff; +extern cpuop_func op_b03c_0_nf; +extern cpuop_func op_b03c_0_ff; +extern cpuop_func op_b040_0_nf; +extern cpuop_func op_b040_0_ff; +extern cpuop_func op_b048_0_nf; +extern cpuop_func op_b048_0_ff; +extern cpuop_func op_b050_0_nf; +extern cpuop_func op_b050_0_ff; +extern cpuop_func op_b058_0_nf; +extern cpuop_func op_b058_0_ff; +extern cpuop_func op_b060_0_nf; +extern cpuop_func op_b060_0_ff; +extern cpuop_func op_b068_0_nf; +extern cpuop_func op_b068_0_ff; +extern cpuop_func op_b070_0_nf; +extern cpuop_func op_b070_0_ff; +extern cpuop_func op_b078_0_nf; +extern cpuop_func op_b078_0_ff; +extern cpuop_func op_b079_0_nf; +extern cpuop_func op_b079_0_ff; +extern cpuop_func op_b07a_0_nf; +extern cpuop_func op_b07a_0_ff; +extern cpuop_func op_b07b_0_nf; +extern cpuop_func op_b07b_0_ff; +extern cpuop_func op_b07c_0_nf; +extern cpuop_func op_b07c_0_ff; +extern cpuop_func op_b080_0_nf; +extern cpuop_func op_b080_0_ff; +extern cpuop_func op_b088_0_nf; +extern cpuop_func op_b088_0_ff; +extern cpuop_func op_b090_0_nf; +extern cpuop_func op_b090_0_ff; +extern cpuop_func op_b098_0_nf; +extern cpuop_func op_b098_0_ff; +extern cpuop_func op_b0a0_0_nf; +extern cpuop_func op_b0a0_0_ff; +extern cpuop_func op_b0a8_0_nf; +extern cpuop_func op_b0a8_0_ff; +extern cpuop_func op_b0b0_0_nf; +extern cpuop_func op_b0b0_0_ff; +extern cpuop_func op_b0b8_0_nf; +extern cpuop_func op_b0b8_0_ff; +extern cpuop_func op_b0b9_0_nf; +extern cpuop_func op_b0b9_0_ff; +extern cpuop_func op_b0ba_0_nf; +extern cpuop_func op_b0ba_0_ff; +extern cpuop_func op_b0bb_0_nf; +extern cpuop_func op_b0bb_0_ff; +extern cpuop_func op_b0bc_0_nf; +extern cpuop_func op_b0bc_0_ff; +extern cpuop_func op_b0c0_0_nf; +extern cpuop_func op_b0c0_0_ff; +extern cpuop_func op_b0c8_0_nf; +extern cpuop_func op_b0c8_0_ff; +extern cpuop_func op_b0d0_0_nf; +extern cpuop_func op_b0d0_0_ff; +extern cpuop_func op_b0d8_0_nf; +extern cpuop_func op_b0d8_0_ff; +extern cpuop_func op_b0e0_0_nf; +extern cpuop_func op_b0e0_0_ff; +extern cpuop_func op_b0e8_0_nf; +extern cpuop_func op_b0e8_0_ff; +extern cpuop_func op_b0f0_0_nf; +extern cpuop_func op_b0f0_0_ff; +extern cpuop_func op_b0f8_0_nf; +extern cpuop_func op_b0f8_0_ff; +extern cpuop_func op_b0f9_0_nf; +extern cpuop_func op_b0f9_0_ff; +extern cpuop_func op_b0fa_0_nf; +extern cpuop_func op_b0fa_0_ff; +extern cpuop_func op_b0fb_0_nf; +extern cpuop_func op_b0fb_0_ff; +extern cpuop_func op_b0fc_0_nf; +extern cpuop_func op_b0fc_0_ff; +extern cpuop_func op_b100_0_nf; +extern cpuop_func op_b100_0_ff; +extern cpuop_func op_b108_0_nf; +extern cpuop_func op_b108_0_ff; +extern cpuop_func op_b110_0_nf; +extern cpuop_func op_b110_0_ff; +extern cpuop_func op_b118_0_nf; +extern cpuop_func op_b118_0_ff; +extern cpuop_func op_b120_0_nf; +extern cpuop_func op_b120_0_ff; +extern cpuop_func op_b128_0_nf; +extern cpuop_func op_b128_0_ff; +extern cpuop_func op_b130_0_nf; +extern cpuop_func op_b130_0_ff; +extern cpuop_func op_b138_0_nf; +extern cpuop_func op_b138_0_ff; +extern cpuop_func op_b139_0_nf; +extern cpuop_func op_b139_0_ff; +extern cpuop_func op_b140_0_nf; +extern cpuop_func op_b140_0_ff; +extern cpuop_func op_b148_0_nf; +extern cpuop_func op_b148_0_ff; +extern cpuop_func op_b150_0_nf; +extern cpuop_func op_b150_0_ff; +extern cpuop_func op_b158_0_nf; +extern cpuop_func op_b158_0_ff; +extern cpuop_func op_b160_0_nf; +extern cpuop_func op_b160_0_ff; +extern cpuop_func op_b168_0_nf; +extern cpuop_func op_b168_0_ff; +extern cpuop_func op_b170_0_nf; +extern cpuop_func op_b170_0_ff; +extern cpuop_func op_b178_0_nf; +extern cpuop_func op_b178_0_ff; +extern cpuop_func op_b179_0_nf; +extern cpuop_func op_b179_0_ff; +extern cpuop_func op_b180_0_nf; +extern cpuop_func op_b180_0_ff; +extern cpuop_func op_b188_0_nf; +extern cpuop_func op_b188_0_ff; +extern cpuop_func op_b190_0_nf; +extern cpuop_func op_b190_0_ff; +extern cpuop_func op_b198_0_nf; +extern cpuop_func op_b198_0_ff; +extern cpuop_func op_b1a0_0_nf; +extern cpuop_func op_b1a0_0_ff; +extern cpuop_func op_b1a8_0_nf; +extern cpuop_func op_b1a8_0_ff; +extern cpuop_func op_b1b0_0_nf; +extern cpuop_func op_b1b0_0_ff; +extern cpuop_func op_b1b8_0_nf; +extern cpuop_func op_b1b8_0_ff; +extern cpuop_func op_b1b9_0_nf; +extern cpuop_func op_b1b9_0_ff; +extern cpuop_func op_b1c0_0_nf; +extern cpuop_func op_b1c0_0_ff; +extern cpuop_func op_b1c8_0_nf; +extern cpuop_func op_b1c8_0_ff; +extern cpuop_func op_b1d0_0_nf; +extern cpuop_func op_b1d0_0_ff; +extern cpuop_func op_b1d8_0_nf; +extern cpuop_func op_b1d8_0_ff; +extern cpuop_func op_b1e0_0_nf; +extern cpuop_func op_b1e0_0_ff; +extern cpuop_func op_b1e8_0_nf; +extern cpuop_func op_b1e8_0_ff; +extern cpuop_func op_b1f0_0_nf; +extern cpuop_func op_b1f0_0_ff; +extern cpuop_func op_b1f8_0_nf; +extern cpuop_func op_b1f8_0_ff; +extern cpuop_func op_b1f9_0_nf; +extern cpuop_func op_b1f9_0_ff; +extern cpuop_func op_b1fa_0_nf; +extern cpuop_func op_b1fa_0_ff; +extern cpuop_func op_b1fb_0_nf; +extern cpuop_func op_b1fb_0_ff; +extern cpuop_func op_b1fc_0_nf; +extern cpuop_func op_b1fc_0_ff; +extern cpuop_func op_c000_0_nf; +extern cpuop_func op_c000_0_ff; +extern cpuop_func op_c010_0_nf; +extern cpuop_func op_c010_0_ff; +extern cpuop_func op_c018_0_nf; +extern cpuop_func op_c018_0_ff; +extern cpuop_func op_c020_0_nf; +extern cpuop_func op_c020_0_ff; +extern cpuop_func op_c028_0_nf; +extern cpuop_func op_c028_0_ff; +extern cpuop_func op_c030_0_nf; +extern cpuop_func op_c030_0_ff; +extern cpuop_func op_c038_0_nf; +extern cpuop_func op_c038_0_ff; +extern cpuop_func op_c039_0_nf; +extern cpuop_func op_c039_0_ff; +extern cpuop_func op_c03a_0_nf; +extern cpuop_func op_c03a_0_ff; +extern cpuop_func op_c03b_0_nf; +extern cpuop_func op_c03b_0_ff; +extern cpuop_func op_c03c_0_nf; +extern cpuop_func op_c03c_0_ff; +extern cpuop_func op_c040_0_nf; +extern cpuop_func op_c040_0_ff; +extern cpuop_func op_c050_0_nf; +extern cpuop_func op_c050_0_ff; +extern cpuop_func op_c058_0_nf; +extern cpuop_func op_c058_0_ff; +extern cpuop_func op_c060_0_nf; +extern cpuop_func op_c060_0_ff; +extern cpuop_func op_c068_0_nf; +extern cpuop_func op_c068_0_ff; +extern cpuop_func op_c070_0_nf; +extern cpuop_func op_c070_0_ff; +extern cpuop_func op_c078_0_nf; +extern cpuop_func op_c078_0_ff; +extern cpuop_func op_c079_0_nf; +extern cpuop_func op_c079_0_ff; +extern cpuop_func op_c07a_0_nf; +extern cpuop_func op_c07a_0_ff; +extern cpuop_func op_c07b_0_nf; +extern cpuop_func op_c07b_0_ff; +extern cpuop_func op_c07c_0_nf; +extern cpuop_func op_c07c_0_ff; +extern cpuop_func op_c080_0_nf; +extern cpuop_func op_c080_0_ff; +extern cpuop_func op_c090_0_nf; +extern cpuop_func op_c090_0_ff; +extern cpuop_func op_c098_0_nf; +extern cpuop_func op_c098_0_ff; +extern cpuop_func op_c0a0_0_nf; +extern cpuop_func op_c0a0_0_ff; +extern cpuop_func op_c0a8_0_nf; +extern cpuop_func op_c0a8_0_ff; +extern cpuop_func op_c0b0_0_nf; +extern cpuop_func op_c0b0_0_ff; +extern cpuop_func op_c0b8_0_nf; +extern cpuop_func op_c0b8_0_ff; +extern cpuop_func op_c0b9_0_nf; +extern cpuop_func op_c0b9_0_ff; +extern cpuop_func op_c0ba_0_nf; +extern cpuop_func op_c0ba_0_ff; +extern cpuop_func op_c0bb_0_nf; +extern cpuop_func op_c0bb_0_ff; +extern cpuop_func op_c0bc_0_nf; +extern cpuop_func op_c0bc_0_ff; +extern cpuop_func op_c0c0_0_nf; +extern cpuop_func op_c0c0_0_ff; +extern cpuop_func op_c0d0_0_nf; +extern cpuop_func op_c0d0_0_ff; +extern cpuop_func op_c0d8_0_nf; +extern cpuop_func op_c0d8_0_ff; +extern cpuop_func op_c0e0_0_nf; +extern cpuop_func op_c0e0_0_ff; +extern cpuop_func op_c0e8_0_nf; +extern cpuop_func op_c0e8_0_ff; +extern cpuop_func op_c0f0_0_nf; +extern cpuop_func op_c0f0_0_ff; +extern cpuop_func op_c0f8_0_nf; +extern cpuop_func op_c0f8_0_ff; +extern cpuop_func op_c0f9_0_nf; +extern cpuop_func op_c0f9_0_ff; +extern cpuop_func op_c0fa_0_nf; +extern cpuop_func op_c0fa_0_ff; +extern cpuop_func op_c0fb_0_nf; +extern cpuop_func op_c0fb_0_ff; +extern cpuop_func op_c0fc_0_nf; +extern cpuop_func op_c0fc_0_ff; +extern cpuop_func op_c100_0_nf; +extern cpuop_func op_c100_0_ff; +extern cpuop_func op_c108_0_nf; +extern cpuop_func op_c108_0_ff; +extern cpuop_func op_c110_0_nf; +extern cpuop_func op_c110_0_ff; +extern cpuop_func op_c118_0_nf; +extern cpuop_func op_c118_0_ff; +extern cpuop_func op_c120_0_nf; +extern cpuop_func op_c120_0_ff; +extern cpuop_func op_c128_0_nf; +extern cpuop_func op_c128_0_ff; +extern cpuop_func op_c130_0_nf; +extern cpuop_func op_c130_0_ff; +extern cpuop_func op_c138_0_nf; +extern cpuop_func op_c138_0_ff; +extern cpuop_func op_c139_0_nf; +extern cpuop_func op_c139_0_ff; +extern cpuop_func op_c140_0_nf; +extern cpuop_func op_c140_0_ff; +extern cpuop_func op_c148_0_nf; +extern cpuop_func op_c148_0_ff; +extern cpuop_func op_c150_0_nf; +extern cpuop_func op_c150_0_ff; +extern cpuop_func op_c158_0_nf; +extern cpuop_func op_c158_0_ff; +extern cpuop_func op_c160_0_nf; +extern cpuop_func op_c160_0_ff; +extern cpuop_func op_c168_0_nf; +extern cpuop_func op_c168_0_ff; +extern cpuop_func op_c170_0_nf; +extern cpuop_func op_c170_0_ff; +extern cpuop_func op_c178_0_nf; +extern cpuop_func op_c178_0_ff; +extern cpuop_func op_c179_0_nf; +extern cpuop_func op_c179_0_ff; +extern cpuop_func op_c188_0_nf; +extern cpuop_func op_c188_0_ff; +extern cpuop_func op_c190_0_nf; +extern cpuop_func op_c190_0_ff; +extern cpuop_func op_c198_0_nf; +extern cpuop_func op_c198_0_ff; +extern cpuop_func op_c1a0_0_nf; +extern cpuop_func op_c1a0_0_ff; +extern cpuop_func op_c1a8_0_nf; +extern cpuop_func op_c1a8_0_ff; +extern cpuop_func op_c1b0_0_nf; +extern cpuop_func op_c1b0_0_ff; +extern cpuop_func op_c1b8_0_nf; +extern cpuop_func op_c1b8_0_ff; +extern cpuop_func op_c1b9_0_nf; +extern cpuop_func op_c1b9_0_ff; +extern cpuop_func op_c1c0_0_nf; +extern cpuop_func op_c1c0_0_ff; +extern cpuop_func op_c1d0_0_nf; +extern cpuop_func op_c1d0_0_ff; +extern cpuop_func op_c1d8_0_nf; +extern cpuop_func op_c1d8_0_ff; +extern cpuop_func op_c1e0_0_nf; +extern cpuop_func op_c1e0_0_ff; +extern cpuop_func op_c1e8_0_nf; +extern cpuop_func op_c1e8_0_ff; +extern cpuop_func op_c1f0_0_nf; +extern cpuop_func op_c1f0_0_ff; +extern cpuop_func op_c1f8_0_nf; +extern cpuop_func op_c1f8_0_ff; +extern cpuop_func op_c1f9_0_nf; +extern cpuop_func op_c1f9_0_ff; +extern cpuop_func op_c1fa_0_nf; +extern cpuop_func op_c1fa_0_ff; +extern cpuop_func op_c1fb_0_nf; +extern cpuop_func op_c1fb_0_ff; +extern cpuop_func op_c1fc_0_nf; +extern cpuop_func op_c1fc_0_ff; +extern cpuop_func op_d000_0_nf; +extern cpuop_func op_d000_0_ff; +extern cpuop_func op_d010_0_nf; +extern cpuop_func op_d010_0_ff; +extern cpuop_func op_d018_0_nf; +extern cpuop_func op_d018_0_ff; +extern cpuop_func op_d020_0_nf; +extern cpuop_func op_d020_0_ff; +extern cpuop_func op_d028_0_nf; +extern cpuop_func op_d028_0_ff; +extern cpuop_func op_d030_0_nf; +extern cpuop_func op_d030_0_ff; +extern cpuop_func op_d038_0_nf; +extern cpuop_func op_d038_0_ff; +extern cpuop_func op_d039_0_nf; +extern cpuop_func op_d039_0_ff; +extern cpuop_func op_d03a_0_nf; +extern cpuop_func op_d03a_0_ff; +extern cpuop_func op_d03b_0_nf; +extern cpuop_func op_d03b_0_ff; +extern cpuop_func op_d03c_0_nf; +extern cpuop_func op_d03c_0_ff; +extern cpuop_func op_d040_0_nf; +extern cpuop_func op_d040_0_ff; +extern cpuop_func op_d048_0_nf; +extern cpuop_func op_d048_0_ff; +extern cpuop_func op_d050_0_nf; +extern cpuop_func op_d050_0_ff; +extern cpuop_func op_d058_0_nf; +extern cpuop_func op_d058_0_ff; +extern cpuop_func op_d060_0_nf; +extern cpuop_func op_d060_0_ff; +extern cpuop_func op_d068_0_nf; +extern cpuop_func op_d068_0_ff; +extern cpuop_func op_d070_0_nf; +extern cpuop_func op_d070_0_ff; +extern cpuop_func op_d078_0_nf; +extern cpuop_func op_d078_0_ff; +extern cpuop_func op_d079_0_nf; +extern cpuop_func op_d079_0_ff; +extern cpuop_func op_d07a_0_nf; +extern cpuop_func op_d07a_0_ff; +extern cpuop_func op_d07b_0_nf; +extern cpuop_func op_d07b_0_ff; +extern cpuop_func op_d07c_0_nf; +extern cpuop_func op_d07c_0_ff; +extern cpuop_func op_d080_0_nf; +extern cpuop_func op_d080_0_ff; +extern cpuop_func op_d088_0_nf; +extern cpuop_func op_d088_0_ff; +extern cpuop_func op_d090_0_nf; +extern cpuop_func op_d090_0_ff; +extern cpuop_func op_d098_0_nf; +extern cpuop_func op_d098_0_ff; +extern cpuop_func op_d0a0_0_nf; +extern cpuop_func op_d0a0_0_ff; +extern cpuop_func op_d0a8_0_nf; +extern cpuop_func op_d0a8_0_ff; +extern cpuop_func op_d0b0_0_nf; +extern cpuop_func op_d0b0_0_ff; +extern cpuop_func op_d0b8_0_nf; +extern cpuop_func op_d0b8_0_ff; +extern cpuop_func op_d0b9_0_nf; +extern cpuop_func op_d0b9_0_ff; +extern cpuop_func op_d0ba_0_nf; +extern cpuop_func op_d0ba_0_ff; +extern cpuop_func op_d0bb_0_nf; +extern cpuop_func op_d0bb_0_ff; +extern cpuop_func op_d0bc_0_nf; +extern cpuop_func op_d0bc_0_ff; +extern cpuop_func op_d0c0_0_nf; +extern cpuop_func op_d0c0_0_ff; +extern cpuop_func op_d0c8_0_nf; +extern cpuop_func op_d0c8_0_ff; +extern cpuop_func op_d0d0_0_nf; +extern cpuop_func op_d0d0_0_ff; +extern cpuop_func op_d0d8_0_nf; +extern cpuop_func op_d0d8_0_ff; +extern cpuop_func op_d0e0_0_nf; +extern cpuop_func op_d0e0_0_ff; +extern cpuop_func op_d0e8_0_nf; +extern cpuop_func op_d0e8_0_ff; +extern cpuop_func op_d0f0_0_nf; +extern cpuop_func op_d0f0_0_ff; +extern cpuop_func op_d0f8_0_nf; +extern cpuop_func op_d0f8_0_ff; +extern cpuop_func op_d0f9_0_nf; +extern cpuop_func op_d0f9_0_ff; +extern cpuop_func op_d0fa_0_nf; +extern cpuop_func op_d0fa_0_ff; +extern cpuop_func op_d0fb_0_nf; +extern cpuop_func op_d0fb_0_ff; +extern cpuop_func op_d0fc_0_nf; +extern cpuop_func op_d0fc_0_ff; +extern cpuop_func op_d100_0_nf; +extern cpuop_func op_d100_0_ff; +extern cpuop_func op_d108_0_nf; +extern cpuop_func op_d108_0_ff; +extern cpuop_func op_d110_0_nf; +extern cpuop_func op_d110_0_ff; +extern cpuop_func op_d118_0_nf; +extern cpuop_func op_d118_0_ff; +extern cpuop_func op_d120_0_nf; +extern cpuop_func op_d120_0_ff; +extern cpuop_func op_d128_0_nf; +extern cpuop_func op_d128_0_ff; +extern cpuop_func op_d130_0_nf; +extern cpuop_func op_d130_0_ff; +extern cpuop_func op_d138_0_nf; +extern cpuop_func op_d138_0_ff; +extern cpuop_func op_d139_0_nf; +extern cpuop_func op_d139_0_ff; +extern cpuop_func op_d140_0_nf; +extern cpuop_func op_d140_0_ff; +extern cpuop_func op_d148_0_nf; +extern cpuop_func op_d148_0_ff; +extern cpuop_func op_d150_0_nf; +extern cpuop_func op_d150_0_ff; +extern cpuop_func op_d158_0_nf; +extern cpuop_func op_d158_0_ff; +extern cpuop_func op_d160_0_nf; +extern cpuop_func op_d160_0_ff; +extern cpuop_func op_d168_0_nf; +extern cpuop_func op_d168_0_ff; +extern cpuop_func op_d170_0_nf; +extern cpuop_func op_d170_0_ff; +extern cpuop_func op_d178_0_nf; +extern cpuop_func op_d178_0_ff; +extern cpuop_func op_d179_0_nf; +extern cpuop_func op_d179_0_ff; +extern cpuop_func op_d180_0_nf; +extern cpuop_func op_d180_0_ff; +extern cpuop_func op_d188_0_nf; +extern cpuop_func op_d188_0_ff; +extern cpuop_func op_d190_0_nf; +extern cpuop_func op_d190_0_ff; +extern cpuop_func op_d198_0_nf; +extern cpuop_func op_d198_0_ff; +extern cpuop_func op_d1a0_0_nf; +extern cpuop_func op_d1a0_0_ff; +extern cpuop_func op_d1a8_0_nf; +extern cpuop_func op_d1a8_0_ff; +extern cpuop_func op_d1b0_0_nf; +extern cpuop_func op_d1b0_0_ff; +extern cpuop_func op_d1b8_0_nf; +extern cpuop_func op_d1b8_0_ff; +extern cpuop_func op_d1b9_0_nf; +extern cpuop_func op_d1b9_0_ff; +extern cpuop_func op_d1c0_0_nf; +extern cpuop_func op_d1c0_0_ff; +extern cpuop_func op_d1c8_0_nf; +extern cpuop_func op_d1c8_0_ff; +extern cpuop_func op_d1d0_0_nf; +extern cpuop_func op_d1d0_0_ff; +extern cpuop_func op_d1d8_0_nf; +extern cpuop_func op_d1d8_0_ff; +extern cpuop_func op_d1e0_0_nf; +extern cpuop_func op_d1e0_0_ff; +extern cpuop_func op_d1e8_0_nf; +extern cpuop_func op_d1e8_0_ff; +extern cpuop_func op_d1f0_0_nf; +extern cpuop_func op_d1f0_0_ff; +extern cpuop_func op_d1f8_0_nf; +extern cpuop_func op_d1f8_0_ff; +extern cpuop_func op_d1f9_0_nf; +extern cpuop_func op_d1f9_0_ff; +extern cpuop_func op_d1fa_0_nf; +extern cpuop_func op_d1fa_0_ff; +extern cpuop_func op_d1fb_0_nf; +extern cpuop_func op_d1fb_0_ff; +extern cpuop_func op_d1fc_0_nf; +extern cpuop_func op_d1fc_0_ff; +extern cpuop_func op_e000_0_nf; +extern cpuop_func op_e000_0_ff; +extern cpuop_func op_e008_0_nf; +extern cpuop_func op_e008_0_ff; +extern cpuop_func op_e010_0_nf; +extern cpuop_func op_e010_0_ff; +extern cpuop_func op_e018_0_nf; +extern cpuop_func op_e018_0_ff; +extern cpuop_func op_e020_0_nf; +extern cpuop_func op_e020_0_ff; +extern cpuop_func op_e028_0_nf; +extern cpuop_func op_e028_0_ff; +extern cpuop_func op_e030_0_nf; +extern cpuop_func op_e030_0_ff; +extern cpuop_func op_e038_0_nf; +extern cpuop_func op_e038_0_ff; +extern cpuop_func op_e040_0_nf; +extern cpuop_func op_e040_0_ff; +extern cpuop_func op_e048_0_nf; +extern cpuop_func op_e048_0_ff; +extern cpuop_func op_e050_0_nf; +extern cpuop_func op_e050_0_ff; +extern cpuop_func op_e058_0_nf; +extern cpuop_func op_e058_0_ff; +extern cpuop_func op_e060_0_nf; +extern cpuop_func op_e060_0_ff; +extern cpuop_func op_e068_0_nf; +extern cpuop_func op_e068_0_ff; +extern cpuop_func op_e070_0_nf; +extern cpuop_func op_e070_0_ff; +extern cpuop_func op_e078_0_nf; +extern cpuop_func op_e078_0_ff; +extern cpuop_func op_e080_0_nf; +extern cpuop_func op_e080_0_ff; +extern cpuop_func op_e088_0_nf; +extern cpuop_func op_e088_0_ff; +extern cpuop_func op_e090_0_nf; +extern cpuop_func op_e090_0_ff; +extern cpuop_func op_e098_0_nf; +extern cpuop_func op_e098_0_ff; +extern cpuop_func op_e0a0_0_nf; +extern cpuop_func op_e0a0_0_ff; +extern cpuop_func op_e0a8_0_nf; +extern cpuop_func op_e0a8_0_ff; +extern cpuop_func op_e0b0_0_nf; +extern cpuop_func op_e0b0_0_ff; +extern cpuop_func op_e0b8_0_nf; +extern cpuop_func op_e0b8_0_ff; +extern cpuop_func op_e0d0_0_nf; +extern cpuop_func op_e0d0_0_ff; +extern cpuop_func op_e0d8_0_nf; +extern cpuop_func op_e0d8_0_ff; +extern cpuop_func op_e0e0_0_nf; +extern cpuop_func op_e0e0_0_ff; +extern cpuop_func op_e0e8_0_nf; +extern cpuop_func op_e0e8_0_ff; +extern cpuop_func op_e0f0_0_nf; +extern cpuop_func op_e0f0_0_ff; +extern cpuop_func op_e0f8_0_nf; +extern cpuop_func op_e0f8_0_ff; +extern cpuop_func op_e0f9_0_nf; +extern cpuop_func op_e0f9_0_ff; +extern cpuop_func op_e100_0_nf; +extern cpuop_func op_e100_0_ff; +extern cpuop_func op_e108_0_nf; +extern cpuop_func op_e108_0_ff; +extern cpuop_func op_e110_0_nf; +extern cpuop_func op_e110_0_ff; +extern cpuop_func op_e118_0_nf; +extern cpuop_func op_e118_0_ff; +extern cpuop_func op_e120_0_nf; +extern cpuop_func op_e120_0_ff; +extern cpuop_func op_e128_0_nf; +extern cpuop_func op_e128_0_ff; +extern cpuop_func op_e130_0_nf; +extern cpuop_func op_e130_0_ff; +extern cpuop_func op_e138_0_nf; +extern cpuop_func op_e138_0_ff; +extern cpuop_func op_e140_0_nf; +extern cpuop_func op_e140_0_ff; +extern cpuop_func op_e148_0_nf; +extern cpuop_func op_e148_0_ff; +extern cpuop_func op_e150_0_nf; +extern cpuop_func op_e150_0_ff; +extern cpuop_func op_e158_0_nf; +extern cpuop_func op_e158_0_ff; +extern cpuop_func op_e160_0_nf; +extern cpuop_func op_e160_0_ff; +extern cpuop_func op_e168_0_nf; +extern cpuop_func op_e168_0_ff; +extern cpuop_func op_e170_0_nf; +extern cpuop_func op_e170_0_ff; +extern cpuop_func op_e178_0_nf; +extern cpuop_func op_e178_0_ff; +extern cpuop_func op_e180_0_nf; +extern cpuop_func op_e180_0_ff; +extern cpuop_func op_e188_0_nf; +extern cpuop_func op_e188_0_ff; +extern cpuop_func op_e190_0_nf; +extern cpuop_func op_e190_0_ff; +extern cpuop_func op_e198_0_nf; +extern cpuop_func op_e198_0_ff; +extern cpuop_func op_e1a0_0_nf; +extern cpuop_func op_e1a0_0_ff; +extern cpuop_func op_e1a8_0_nf; +extern cpuop_func op_e1a8_0_ff; +extern cpuop_func op_e1b0_0_nf; +extern cpuop_func op_e1b0_0_ff; +extern cpuop_func op_e1b8_0_nf; +extern cpuop_func op_e1b8_0_ff; +extern cpuop_func op_e1d0_0_nf; +extern cpuop_func op_e1d0_0_ff; +extern cpuop_func op_e1d8_0_nf; +extern cpuop_func op_e1d8_0_ff; +extern cpuop_func op_e1e0_0_nf; +extern cpuop_func op_e1e0_0_ff; +extern cpuop_func op_e1e8_0_nf; +extern cpuop_func op_e1e8_0_ff; +extern cpuop_func op_e1f0_0_nf; +extern cpuop_func op_e1f0_0_ff; +extern cpuop_func op_e1f8_0_nf; +extern cpuop_func op_e1f8_0_ff; +extern cpuop_func op_e1f9_0_nf; +extern cpuop_func op_e1f9_0_ff; +extern cpuop_func op_e2d0_0_nf; +extern cpuop_func op_e2d0_0_ff; +extern cpuop_func op_e2d8_0_nf; +extern cpuop_func op_e2d8_0_ff; +extern cpuop_func op_e2e0_0_nf; +extern cpuop_func op_e2e0_0_ff; +extern cpuop_func op_e2e8_0_nf; +extern cpuop_func op_e2e8_0_ff; +extern cpuop_func op_e2f0_0_nf; +extern cpuop_func op_e2f0_0_ff; +extern cpuop_func op_e2f8_0_nf; +extern cpuop_func op_e2f8_0_ff; +extern cpuop_func op_e2f9_0_nf; +extern cpuop_func op_e2f9_0_ff; +extern cpuop_func op_e3d0_0_nf; +extern cpuop_func op_e3d0_0_ff; +extern cpuop_func op_e3d8_0_nf; +extern cpuop_func op_e3d8_0_ff; +extern cpuop_func op_e3e0_0_nf; +extern cpuop_func op_e3e0_0_ff; +extern cpuop_func op_e3e8_0_nf; +extern cpuop_func op_e3e8_0_ff; +extern cpuop_func op_e3f0_0_nf; +extern cpuop_func op_e3f0_0_ff; +extern cpuop_func op_e3f8_0_nf; +extern cpuop_func op_e3f8_0_ff; +extern cpuop_func op_e3f9_0_nf; +extern cpuop_func op_e3f9_0_ff; +extern cpuop_func op_e4d0_0_nf; +extern cpuop_func op_e4d0_0_ff; +extern cpuop_func op_e4d8_0_nf; +extern cpuop_func op_e4d8_0_ff; +extern cpuop_func op_e4e0_0_nf; +extern cpuop_func op_e4e0_0_ff; +extern cpuop_func op_e4e8_0_nf; +extern cpuop_func op_e4e8_0_ff; +extern cpuop_func op_e4f0_0_nf; +extern cpuop_func op_e4f0_0_ff; +extern cpuop_func op_e4f8_0_nf; +extern cpuop_func op_e4f8_0_ff; +extern cpuop_func op_e4f9_0_nf; +extern cpuop_func op_e4f9_0_ff; +extern cpuop_func op_e5d0_0_nf; +extern cpuop_func op_e5d0_0_ff; +extern cpuop_func op_e5d8_0_nf; +extern cpuop_func op_e5d8_0_ff; +extern cpuop_func op_e5e0_0_nf; +extern cpuop_func op_e5e0_0_ff; +extern cpuop_func op_e5e8_0_nf; +extern cpuop_func op_e5e8_0_ff; +extern cpuop_func op_e5f0_0_nf; +extern cpuop_func op_e5f0_0_ff; +extern cpuop_func op_e5f8_0_nf; +extern cpuop_func op_e5f8_0_ff; +extern cpuop_func op_e5f9_0_nf; +extern cpuop_func op_e5f9_0_ff; +extern cpuop_func op_e6d0_0_nf; +extern cpuop_func op_e6d0_0_ff; +extern cpuop_func op_e6d8_0_nf; +extern cpuop_func op_e6d8_0_ff; +extern cpuop_func op_e6e0_0_nf; +extern cpuop_func op_e6e0_0_ff; +extern cpuop_func op_e6e8_0_nf; +extern cpuop_func op_e6e8_0_ff; +extern cpuop_func op_e6f0_0_nf; +extern cpuop_func op_e6f0_0_ff; +extern cpuop_func op_e6f8_0_nf; +extern cpuop_func op_e6f8_0_ff; +extern cpuop_func op_e6f9_0_nf; +extern cpuop_func op_e6f9_0_ff; +extern cpuop_func op_e7d0_0_nf; +extern cpuop_func op_e7d0_0_ff; +extern cpuop_func op_e7d8_0_nf; +extern cpuop_func op_e7d8_0_ff; +extern cpuop_func op_e7e0_0_nf; +extern cpuop_func op_e7e0_0_ff; +extern cpuop_func op_e7e8_0_nf; +extern cpuop_func op_e7e8_0_ff; +extern cpuop_func op_e7f0_0_nf; +extern cpuop_func op_e7f0_0_ff; +extern cpuop_func op_e7f8_0_nf; +extern cpuop_func op_e7f8_0_ff; +extern cpuop_func op_e7f9_0_nf; +extern cpuop_func op_e7f9_0_ff; +extern cpuop_func op_e8c0_0_nf; +extern cpuop_func op_e8c0_0_ff; +extern cpuop_func op_e8d0_0_nf; +extern cpuop_func op_e8d0_0_ff; +extern cpuop_func op_e8e8_0_nf; +extern cpuop_func op_e8e8_0_ff; +extern cpuop_func op_e8f0_0_nf; +extern cpuop_func op_e8f0_0_ff; +extern cpuop_func op_e8f8_0_nf; +extern cpuop_func op_e8f8_0_ff; +extern cpuop_func op_e8f9_0_nf; +extern cpuop_func op_e8f9_0_ff; +extern cpuop_func op_e8fa_0_nf; +extern cpuop_func op_e8fa_0_ff; +extern cpuop_func op_e8fb_0_nf; +extern cpuop_func op_e8fb_0_ff; +extern cpuop_func op_e9c0_0_nf; +extern cpuop_func op_e9c0_0_ff; +extern cpuop_func op_e9d0_0_nf; +extern cpuop_func op_e9d0_0_ff; +extern cpuop_func op_e9e8_0_nf; +extern cpuop_func op_e9e8_0_ff; +extern cpuop_func op_e9f0_0_nf; +extern cpuop_func op_e9f0_0_ff; +extern cpuop_func op_e9f8_0_nf; +extern cpuop_func op_e9f8_0_ff; +extern cpuop_func op_e9f9_0_nf; +extern cpuop_func op_e9f9_0_ff; +extern cpuop_func op_e9fa_0_nf; +extern cpuop_func op_e9fa_0_ff; +extern cpuop_func op_e9fb_0_nf; +extern cpuop_func op_e9fb_0_ff; +extern cpuop_func op_eac0_0_nf; +extern cpuop_func op_eac0_0_ff; +extern cpuop_func op_ead0_0_nf; +extern cpuop_func op_ead0_0_ff; +extern cpuop_func op_eae8_0_nf; +extern cpuop_func op_eae8_0_ff; +extern cpuop_func op_eaf0_0_nf; +extern cpuop_func op_eaf0_0_ff; +extern cpuop_func op_eaf8_0_nf; +extern cpuop_func op_eaf8_0_ff; +extern cpuop_func op_eaf9_0_nf; +extern cpuop_func op_eaf9_0_ff; +extern cpuop_func op_ebc0_0_nf; +extern cpuop_func op_ebc0_0_ff; +extern cpuop_func op_ebd0_0_nf; +extern cpuop_func op_ebd0_0_ff; +extern cpuop_func op_ebe8_0_nf; +extern cpuop_func op_ebe8_0_ff; +extern cpuop_func op_ebf0_0_nf; +extern cpuop_func op_ebf0_0_ff; +extern cpuop_func op_ebf8_0_nf; +extern cpuop_func op_ebf8_0_ff; +extern cpuop_func op_ebf9_0_nf; +extern cpuop_func op_ebf9_0_ff; +extern cpuop_func op_ebfa_0_nf; +extern cpuop_func op_ebfa_0_ff; +extern cpuop_func op_ebfb_0_nf; +extern cpuop_func op_ebfb_0_ff; +extern cpuop_func op_ecc0_0_nf; +extern cpuop_func op_ecc0_0_ff; +extern cpuop_func op_ecd0_0_nf; +extern cpuop_func op_ecd0_0_ff; +extern cpuop_func op_ece8_0_nf; +extern cpuop_func op_ece8_0_ff; +extern cpuop_func op_ecf0_0_nf; +extern cpuop_func op_ecf0_0_ff; +extern cpuop_func op_ecf8_0_nf; +extern cpuop_func op_ecf8_0_ff; +extern cpuop_func op_ecf9_0_nf; +extern cpuop_func op_ecf9_0_ff; +extern cpuop_func op_edc0_0_nf; +extern cpuop_func op_edc0_0_ff; +extern cpuop_func op_edd0_0_nf; +extern cpuop_func op_edd0_0_ff; +extern cpuop_func op_ede8_0_nf; +extern cpuop_func op_ede8_0_ff; +extern cpuop_func op_edf0_0_nf; +extern cpuop_func op_edf0_0_ff; +extern cpuop_func op_edf8_0_nf; +extern cpuop_func op_edf8_0_ff; +extern cpuop_func op_edf9_0_nf; +extern cpuop_func op_edf9_0_ff; +extern cpuop_func op_edfa_0_nf; +extern cpuop_func op_edfa_0_ff; +extern cpuop_func op_edfb_0_nf; +extern cpuop_func op_edfb_0_ff; +extern cpuop_func op_eec0_0_nf; +extern cpuop_func op_eec0_0_ff; +extern cpuop_func op_eed0_0_nf; +extern cpuop_func op_eed0_0_ff; +extern cpuop_func op_eee8_0_nf; +extern cpuop_func op_eee8_0_ff; +extern cpuop_func op_eef0_0_nf; +extern cpuop_func op_eef0_0_ff; +extern cpuop_func op_eef8_0_nf; +extern cpuop_func op_eef8_0_ff; +extern cpuop_func op_eef9_0_nf; +extern cpuop_func op_eef9_0_ff; +extern cpuop_func op_efc0_0_nf; +extern cpuop_func op_efc0_0_ff; +extern cpuop_func op_efd0_0_nf; +extern cpuop_func op_efd0_0_ff; +extern cpuop_func op_efe8_0_nf; +extern cpuop_func op_efe8_0_ff; +extern cpuop_func op_eff0_0_nf; +extern cpuop_func op_eff0_0_ff; +extern cpuop_func op_eff8_0_nf; +extern cpuop_func op_eff8_0_ff; +extern cpuop_func op_eff9_0_nf; +extern cpuop_func op_eff9_0_ff; +extern cpuop_func op_f000_0_nf; +extern cpuop_func op_f000_0_ff; +extern cpuop_func op_f008_0_nf; +extern cpuop_func op_f008_0_ff; +extern cpuop_func op_f010_0_nf; +extern cpuop_func op_f010_0_ff; +extern cpuop_func op_f018_0_nf; +extern cpuop_func op_f018_0_ff; +extern cpuop_func op_f020_0_nf; +extern cpuop_func op_f020_0_ff; +extern cpuop_func op_f028_0_nf; +extern cpuop_func op_f028_0_ff; +extern cpuop_func op_f030_0_nf; +extern cpuop_func op_f030_0_ff; +extern cpuop_func op_f038_0_nf; +extern cpuop_func op_f038_0_ff; +extern cpuop_func op_f039_0_nf; +extern cpuop_func op_f039_0_ff; +extern cpuop_func op_f200_0_nf; +extern cpuop_func op_f200_0_ff; +extern cpuop_func op_f208_0_nf; +extern cpuop_func op_f208_0_ff; +extern cpuop_func op_f210_0_nf; +extern cpuop_func op_f210_0_ff; +extern cpuop_func op_f218_0_nf; +extern cpuop_func op_f218_0_ff; +extern cpuop_func op_f220_0_nf; +extern cpuop_func op_f220_0_ff; +extern cpuop_func op_f228_0_nf; +extern cpuop_func op_f228_0_ff; +extern cpuop_func op_f230_0_nf; +extern cpuop_func op_f230_0_ff; +extern cpuop_func op_f238_0_nf; +extern cpuop_func op_f238_0_ff; +extern cpuop_func op_f239_0_nf; +extern cpuop_func op_f239_0_ff; +extern cpuop_func op_f23a_0_nf; +extern cpuop_func op_f23a_0_ff; +extern cpuop_func op_f23b_0_nf; +extern cpuop_func op_f23b_0_ff; +extern cpuop_func op_f23c_0_nf; +extern cpuop_func op_f23c_0_ff; +extern cpuop_func op_f240_0_nf; +extern cpuop_func op_f240_0_ff; +extern cpuop_func op_f248_0_nf; +extern cpuop_func op_f248_0_ff; +extern cpuop_func op_f250_0_nf; +extern cpuop_func op_f250_0_ff; +extern cpuop_func op_f258_0_nf; +extern cpuop_func op_f258_0_ff; +extern cpuop_func op_f260_0_nf; +extern cpuop_func op_f260_0_ff; +extern cpuop_func op_f268_0_nf; +extern cpuop_func op_f268_0_ff; +extern cpuop_func op_f270_0_nf; +extern cpuop_func op_f270_0_ff; +extern cpuop_func op_f278_0_nf; +extern cpuop_func op_f278_0_ff; +extern cpuop_func op_f279_0_nf; +extern cpuop_func op_f279_0_ff; +extern cpuop_func op_f27a_0_nf; +extern cpuop_func op_f27a_0_ff; +extern cpuop_func op_f27b_0_nf; +extern cpuop_func op_f27b_0_ff; +extern cpuop_func op_f27c_0_nf; +extern cpuop_func op_f27c_0_ff; +extern cpuop_func op_f280_0_nf; +extern cpuop_func op_f280_0_ff; +extern cpuop_func op_f2c0_0_nf; +extern cpuop_func op_f2c0_0_ff; +extern cpuop_func op_f310_0_nf; +extern cpuop_func op_f310_0_ff; +extern cpuop_func op_f320_0_nf; +extern cpuop_func op_f320_0_ff; +extern cpuop_func op_f328_0_nf; +extern cpuop_func op_f328_0_ff; +extern cpuop_func op_f330_0_nf; +extern cpuop_func op_f330_0_ff; +extern cpuop_func op_f338_0_nf; +extern cpuop_func op_f338_0_ff; +extern cpuop_func op_f339_0_nf; +extern cpuop_func op_f339_0_ff; +extern cpuop_func op_f350_0_nf; +extern cpuop_func op_f350_0_ff; +extern cpuop_func op_f358_0_nf; +extern cpuop_func op_f358_0_ff; +extern cpuop_func op_f368_0_nf; +extern cpuop_func op_f368_0_ff; +extern cpuop_func op_f370_0_nf; +extern cpuop_func op_f370_0_ff; +extern cpuop_func op_f378_0_nf; +extern cpuop_func op_f378_0_ff; +extern cpuop_func op_f379_0_nf; +extern cpuop_func op_f379_0_ff; +extern cpuop_func op_f37a_0_nf; +extern cpuop_func op_f37a_0_ff; +extern cpuop_func op_f37b_0_nf; +extern cpuop_func op_f37b_0_ff; +extern cpuop_func op_f408_0_nf; +extern cpuop_func op_f408_0_ff; +extern cpuop_func op_f410_0_nf; +extern cpuop_func op_f410_0_ff; +extern cpuop_func op_f418_0_nf; +extern cpuop_func op_f418_0_ff; +extern cpuop_func op_f419_0_nf; +extern cpuop_func op_f419_0_ff; +extern cpuop_func op_f41a_0_nf; +extern cpuop_func op_f41a_0_ff; +extern cpuop_func op_f41b_0_nf; +extern cpuop_func op_f41b_0_ff; +extern cpuop_func op_f41c_0_nf; +extern cpuop_func op_f41c_0_ff; +extern cpuop_func op_f41d_0_nf; +extern cpuop_func op_f41d_0_ff; +extern cpuop_func op_f41e_0_nf; +extern cpuop_func op_f41e_0_ff; +extern cpuop_func op_f41f_0_nf; +extern cpuop_func op_f41f_0_ff; +extern cpuop_func op_f428_0_nf; +extern cpuop_func op_f428_0_ff; +extern cpuop_func op_f430_0_nf; +extern cpuop_func op_f430_0_ff; +extern cpuop_func op_f438_0_nf; +extern cpuop_func op_f438_0_ff; +extern cpuop_func op_f439_0_nf; +extern cpuop_func op_f439_0_ff; +extern cpuop_func op_f43a_0_nf; +extern cpuop_func op_f43a_0_ff; +extern cpuop_func op_f43b_0_nf; +extern cpuop_func op_f43b_0_ff; +extern cpuop_func op_f43c_0_nf; +extern cpuop_func op_f43c_0_ff; +extern cpuop_func op_f43d_0_nf; +extern cpuop_func op_f43d_0_ff; +extern cpuop_func op_f43e_0_nf; +extern cpuop_func op_f43e_0_ff; +extern cpuop_func op_f43f_0_nf; +extern cpuop_func op_f43f_0_ff; +extern cpuop_func op_f500_0_nf; +extern cpuop_func op_f500_0_ff; +extern cpuop_func op_f508_0_nf; +extern cpuop_func op_f508_0_ff; +extern cpuop_func op_f510_0_nf; +extern cpuop_func op_f510_0_ff; +extern cpuop_func op_f518_0_nf; +extern cpuop_func op_f518_0_ff; +extern cpuop_func op_f548_0_nf; +extern cpuop_func op_f548_0_ff; +extern cpuop_func op_f568_0_nf; +extern cpuop_func op_f568_0_ff; +extern cpuop_func op_f588_0_nf; +extern cpuop_func op_f588_0_ff; +extern cpuop_func op_f5c8_0_nf; +extern cpuop_func op_f5c8_0_ff; +extern cpuop_func op_f600_0_nf; +extern cpuop_func op_f600_0_ff; +extern cpuop_func op_f608_0_nf; +extern cpuop_func op_f608_0_ff; +extern cpuop_func op_f610_0_nf; +extern cpuop_func op_f610_0_ff; +extern cpuop_func op_f618_0_nf; +extern cpuop_func op_f618_0_ff; +extern cpuop_func op_f620_0_nf; +extern cpuop_func op_f620_0_ff; +extern cpuop_func op_f800_0_nf; +extern cpuop_func op_f800_0_ff; +extern cpuop_func op_003c_1_nf; +extern cpuop_func op_003c_1_ff; +extern cpuop_func op_007c_1_nf; +extern cpuop_func op_007c_1_ff; +extern cpuop_func op_023c_1_nf; +extern cpuop_func op_023c_1_ff; +extern cpuop_func op_027c_1_nf; +extern cpuop_func op_027c_1_ff; +extern cpuop_func op_0a3c_1_nf; +extern cpuop_func op_0a3c_1_ff; +extern cpuop_func op_0a7c_1_nf; +extern cpuop_func op_0a7c_1_ff; +extern cpuop_func op_0ad0_1_nf; +extern cpuop_func op_0ad0_1_ff; +extern cpuop_func op_0ad8_1_nf; +extern cpuop_func op_0ad8_1_ff; +extern cpuop_func op_0ae0_1_nf; +extern cpuop_func op_0ae0_1_ff; +extern cpuop_func op_0ae8_1_nf; +extern cpuop_func op_0ae8_1_ff; +extern cpuop_func op_0af0_1_nf; +extern cpuop_func op_0af0_1_ff; +extern cpuop_func op_0af8_1_nf; +extern cpuop_func op_0af8_1_ff; +extern cpuop_func op_0af9_1_nf; +extern cpuop_func op_0af9_1_ff; +extern cpuop_func op_0cd0_1_nf; +extern cpuop_func op_0cd0_1_ff; +extern cpuop_func op_0cd8_1_nf; +extern cpuop_func op_0cd8_1_ff; +extern cpuop_func op_0ce0_1_nf; +extern cpuop_func op_0ce0_1_ff; +extern cpuop_func op_0ce8_1_nf; +extern cpuop_func op_0ce8_1_ff; +extern cpuop_func op_0cf0_1_nf; +extern cpuop_func op_0cf0_1_ff; +extern cpuop_func op_0cf8_1_nf; +extern cpuop_func op_0cf8_1_ff; +extern cpuop_func op_0cf9_1_nf; +extern cpuop_func op_0cf9_1_ff; +extern cpuop_func op_0cfc_1_nf; +extern cpuop_func op_0cfc_1_ff; +extern cpuop_func op_0e10_1_nf; +extern cpuop_func op_0e10_1_ff; +extern cpuop_func op_0e18_1_nf; +extern cpuop_func op_0e18_1_ff; +extern cpuop_func op_0e20_1_nf; +extern cpuop_func op_0e20_1_ff; +extern cpuop_func op_0e28_1_nf; +extern cpuop_func op_0e28_1_ff; +extern cpuop_func op_0e30_1_nf; +extern cpuop_func op_0e30_1_ff; +extern cpuop_func op_0e38_1_nf; +extern cpuop_func op_0e38_1_ff; +extern cpuop_func op_0e39_1_nf; +extern cpuop_func op_0e39_1_ff; +extern cpuop_func op_0e50_1_nf; +extern cpuop_func op_0e50_1_ff; +extern cpuop_func op_0e58_1_nf; +extern cpuop_func op_0e58_1_ff; +extern cpuop_func op_0e60_1_nf; +extern cpuop_func op_0e60_1_ff; +extern cpuop_func op_0e68_1_nf; +extern cpuop_func op_0e68_1_ff; +extern cpuop_func op_0e70_1_nf; +extern cpuop_func op_0e70_1_ff; +extern cpuop_func op_0e78_1_nf; +extern cpuop_func op_0e78_1_ff; +extern cpuop_func op_0e79_1_nf; +extern cpuop_func op_0e79_1_ff; +extern cpuop_func op_0e90_1_nf; +extern cpuop_func op_0e90_1_ff; +extern cpuop_func op_0e98_1_nf; +extern cpuop_func op_0e98_1_ff; +extern cpuop_func op_0ea0_1_nf; +extern cpuop_func op_0ea0_1_ff; +extern cpuop_func op_0ea8_1_nf; +extern cpuop_func op_0ea8_1_ff; +extern cpuop_func op_0eb0_1_nf; +extern cpuop_func op_0eb0_1_ff; +extern cpuop_func op_0eb8_1_nf; +extern cpuop_func op_0eb8_1_ff; +extern cpuop_func op_0eb9_1_nf; +extern cpuop_func op_0eb9_1_ff; +extern cpuop_func op_0ed0_1_nf; +extern cpuop_func op_0ed0_1_ff; +extern cpuop_func op_0ed8_1_nf; +extern cpuop_func op_0ed8_1_ff; +extern cpuop_func op_0ee0_1_nf; +extern cpuop_func op_0ee0_1_ff; +extern cpuop_func op_0ee8_1_nf; +extern cpuop_func op_0ee8_1_ff; +extern cpuop_func op_0ef0_1_nf; +extern cpuop_func op_0ef0_1_ff; +extern cpuop_func op_0ef8_1_nf; +extern cpuop_func op_0ef8_1_ff; +extern cpuop_func op_0ef9_1_nf; +extern cpuop_func op_0ef9_1_ff; +extern cpuop_func op_0efc_1_nf; +extern cpuop_func op_0efc_1_ff; +extern cpuop_func op_4808_1_nf; +extern cpuop_func op_4808_1_ff; +extern cpuop_func op_4e50_1_nf; +extern cpuop_func op_4e50_1_ff; +extern cpuop_func op_4e60_1_nf; +extern cpuop_func op_4e60_1_ff; +extern cpuop_func op_4e71_1_nf; +extern cpuop_func op_4e71_1_ff; +extern cpuop_func op_4e72_1_nf; +extern cpuop_func op_4e72_1_ff; +extern cpuop_func op_4e73_1_nf; +extern cpuop_func op_4e73_1_ff; +extern cpuop_func op_4e77_1_nf; +extern cpuop_func op_4e77_1_ff; +extern cpuop_func op_4e7b_1_nf; +extern cpuop_func op_4e7b_1_ff; +extern cpuop_func op_f500_1_nf; +extern cpuop_func op_f500_1_ff; +extern cpuop_func op_f508_1_nf; +extern cpuop_func op_f508_1_ff; +extern cpuop_func op_f510_1_nf; +extern cpuop_func op_f510_1_ff; +extern cpuop_func op_f518_1_nf; +extern cpuop_func op_f518_1_ff; +extern cpuop_func op_f548_1_nf; +extern cpuop_func op_f548_1_ff; +extern cpuop_func op_f568_1_nf; +extern cpuop_func op_f568_1_ff; +extern cpuop_func op_003c_2_nf; +extern cpuop_func op_003c_2_ff; +extern cpuop_func op_007c_2_nf; +extern cpuop_func op_007c_2_ff; +extern cpuop_func op_023c_2_nf; +extern cpuop_func op_023c_2_ff; +extern cpuop_func op_027c_2_nf; +extern cpuop_func op_027c_2_ff; +extern cpuop_func op_0a3c_2_nf; +extern cpuop_func op_0a3c_2_ff; +extern cpuop_func op_0a7c_2_nf; +extern cpuop_func op_0a7c_2_ff; +extern cpuop_func op_0ad0_2_nf; +extern cpuop_func op_0ad0_2_ff; +extern cpuop_func op_0ad8_2_nf; +extern cpuop_func op_0ad8_2_ff; +extern cpuop_func op_0ae0_2_nf; +extern cpuop_func op_0ae0_2_ff; +extern cpuop_func op_0ae8_2_nf; +extern cpuop_func op_0ae8_2_ff; +extern cpuop_func op_0af0_2_nf; +extern cpuop_func op_0af0_2_ff; +extern cpuop_func op_0af8_2_nf; +extern cpuop_func op_0af8_2_ff; +extern cpuop_func op_0af9_2_nf; +extern cpuop_func op_0af9_2_ff; +extern cpuop_func op_0cd0_2_nf; +extern cpuop_func op_0cd0_2_ff; +extern cpuop_func op_0cd8_2_nf; +extern cpuop_func op_0cd8_2_ff; +extern cpuop_func op_0ce0_2_nf; +extern cpuop_func op_0ce0_2_ff; +extern cpuop_func op_0ce8_2_nf; +extern cpuop_func op_0ce8_2_ff; +extern cpuop_func op_0cf0_2_nf; +extern cpuop_func op_0cf0_2_ff; +extern cpuop_func op_0cf8_2_nf; +extern cpuop_func op_0cf8_2_ff; +extern cpuop_func op_0cf9_2_nf; +extern cpuop_func op_0cf9_2_ff; +extern cpuop_func op_0cfc_2_nf; +extern cpuop_func op_0cfc_2_ff; +extern cpuop_func op_0e10_2_nf; +extern cpuop_func op_0e10_2_ff; +extern cpuop_func op_0e18_2_nf; +extern cpuop_func op_0e18_2_ff; +extern cpuop_func op_0e20_2_nf; +extern cpuop_func op_0e20_2_ff; +extern cpuop_func op_0e28_2_nf; +extern cpuop_func op_0e28_2_ff; +extern cpuop_func op_0e30_2_nf; +extern cpuop_func op_0e30_2_ff; +extern cpuop_func op_0e38_2_nf; +extern cpuop_func op_0e38_2_ff; +extern cpuop_func op_0e39_2_nf; +extern cpuop_func op_0e39_2_ff; +extern cpuop_func op_0e50_2_nf; +extern cpuop_func op_0e50_2_ff; +extern cpuop_func op_0e58_2_nf; +extern cpuop_func op_0e58_2_ff; +extern cpuop_func op_0e60_2_nf; +extern cpuop_func op_0e60_2_ff; +extern cpuop_func op_0e68_2_nf; +extern cpuop_func op_0e68_2_ff; +extern cpuop_func op_0e70_2_nf; +extern cpuop_func op_0e70_2_ff; +extern cpuop_func op_0e78_2_nf; +extern cpuop_func op_0e78_2_ff; +extern cpuop_func op_0e79_2_nf; +extern cpuop_func op_0e79_2_ff; +extern cpuop_func op_0e90_2_nf; +extern cpuop_func op_0e90_2_ff; +extern cpuop_func op_0e98_2_nf; +extern cpuop_func op_0e98_2_ff; +extern cpuop_func op_0ea0_2_nf; +extern cpuop_func op_0ea0_2_ff; +extern cpuop_func op_0ea8_2_nf; +extern cpuop_func op_0ea8_2_ff; +extern cpuop_func op_0eb0_2_nf; +extern cpuop_func op_0eb0_2_ff; +extern cpuop_func op_0eb8_2_nf; +extern cpuop_func op_0eb8_2_ff; +extern cpuop_func op_0eb9_2_nf; +extern cpuop_func op_0eb9_2_ff; +extern cpuop_func op_0ed0_2_nf; +extern cpuop_func op_0ed0_2_ff; +extern cpuop_func op_0ed8_2_nf; +extern cpuop_func op_0ed8_2_ff; +extern cpuop_func op_0ee0_2_nf; +extern cpuop_func op_0ee0_2_ff; +extern cpuop_func op_0ee8_2_nf; +extern cpuop_func op_0ee8_2_ff; +extern cpuop_func op_0ef0_2_nf; +extern cpuop_func op_0ef0_2_ff; +extern cpuop_func op_0ef8_2_nf; +extern cpuop_func op_0ef8_2_ff; +extern cpuop_func op_0ef9_2_nf; +extern cpuop_func op_0ef9_2_ff; +extern cpuop_func op_0efc_2_nf; +extern cpuop_func op_0efc_2_ff; +extern cpuop_func op_4800_2_nf; +extern cpuop_func op_4800_2_ff; +extern cpuop_func op_4810_2_nf; +extern cpuop_func op_4810_2_ff; +extern cpuop_func op_4818_2_nf; +extern cpuop_func op_4818_2_ff; +extern cpuop_func op_4820_2_nf; +extern cpuop_func op_4820_2_ff; +extern cpuop_func op_4828_2_nf; +extern cpuop_func op_4828_2_ff; +extern cpuop_func op_4830_2_nf; +extern cpuop_func op_4830_2_ff; +extern cpuop_func op_4838_2_nf; +extern cpuop_func op_4838_2_ff; +extern cpuop_func op_4839_2_nf; +extern cpuop_func op_4839_2_ff; +extern cpuop_func op_4890_2_nf; +extern cpuop_func op_4890_2_ff; +extern cpuop_func op_48a0_2_nf; +extern cpuop_func op_48a0_2_ff; +extern cpuop_func op_48a8_2_nf; +extern cpuop_func op_48a8_2_ff; +extern cpuop_func op_48b0_2_nf; +extern cpuop_func op_48b0_2_ff; +extern cpuop_func op_48b8_2_nf; +extern cpuop_func op_48b8_2_ff; +extern cpuop_func op_48b9_2_nf; +extern cpuop_func op_48b9_2_ff; +extern cpuop_func op_48d0_2_nf; +extern cpuop_func op_48d0_2_ff; +extern cpuop_func op_48e0_2_nf; +extern cpuop_func op_48e0_2_ff; +extern cpuop_func op_48e8_2_nf; +extern cpuop_func op_48e8_2_ff; +extern cpuop_func op_48f0_2_nf; +extern cpuop_func op_48f0_2_ff; +extern cpuop_func op_48f8_2_nf; +extern cpuop_func op_48f8_2_ff; +extern cpuop_func op_48f9_2_nf; +extern cpuop_func op_48f9_2_ff; +extern cpuop_func op_4c90_2_nf; +extern cpuop_func op_4c90_2_ff; +extern cpuop_func op_4c98_2_nf; +extern cpuop_func op_4c98_2_ff; +extern cpuop_func op_4ca8_2_nf; +extern cpuop_func op_4ca8_2_ff; +extern cpuop_func op_4cb0_2_nf; +extern cpuop_func op_4cb0_2_ff; +extern cpuop_func op_4cb8_2_nf; +extern cpuop_func op_4cb8_2_ff; +extern cpuop_func op_4cb9_2_nf; +extern cpuop_func op_4cb9_2_ff; +extern cpuop_func op_4cba_2_nf; +extern cpuop_func op_4cba_2_ff; +extern cpuop_func op_4cbb_2_nf; +extern cpuop_func op_4cbb_2_ff; +extern cpuop_func op_4cd0_2_nf; +extern cpuop_func op_4cd0_2_ff; +extern cpuop_func op_4cd8_2_nf; +extern cpuop_func op_4cd8_2_ff; +extern cpuop_func op_4ce8_2_nf; +extern cpuop_func op_4ce8_2_ff; +extern cpuop_func op_4cf0_2_nf; +extern cpuop_func op_4cf0_2_ff; +extern cpuop_func op_4cf8_2_nf; +extern cpuop_func op_4cf8_2_ff; +extern cpuop_func op_4cf9_2_nf; +extern cpuop_func op_4cf9_2_ff; +extern cpuop_func op_4cfa_2_nf; +extern cpuop_func op_4cfa_2_ff; +extern cpuop_func op_4cfb_2_nf; +extern cpuop_func op_4cfb_2_ff; +extern cpuop_func op_4e60_2_nf; +extern cpuop_func op_4e60_2_ff; +extern cpuop_func op_4e71_2_nf; +extern cpuop_func op_4e71_2_ff; +extern cpuop_func op_4e72_2_nf; +extern cpuop_func op_4e72_2_ff; +extern cpuop_func op_4e73_2_nf; +extern cpuop_func op_4e73_2_ff; +extern cpuop_func op_4e74_2_nf; +extern cpuop_func op_4e74_2_ff; +extern cpuop_func op_4e75_2_nf; +extern cpuop_func op_4e75_2_ff; +extern cpuop_func op_4e77_2_nf; +extern cpuop_func op_4e77_2_ff; +extern cpuop_func op_4e7b_2_nf; +extern cpuop_func op_4e7b_2_ff; +extern cpuop_func op_4e90_2_nf; +extern cpuop_func op_4e90_2_ff; +extern cpuop_func op_4ea8_2_nf; +extern cpuop_func op_4ea8_2_ff; +extern cpuop_func op_4eb0_2_nf; +extern cpuop_func op_4eb0_2_ff; +extern cpuop_func op_4eb8_2_nf; +extern cpuop_func op_4eb8_2_ff; +extern cpuop_func op_4eb9_2_nf; +extern cpuop_func op_4eb9_2_ff; +extern cpuop_func op_4eba_2_nf; +extern cpuop_func op_4eba_2_ff; +extern cpuop_func op_4ebb_2_nf; +extern cpuop_func op_4ebb_2_ff; +extern cpuop_func op_50c8_2_nf; +extern cpuop_func op_50c8_2_ff; +extern cpuop_func op_51c8_2_nf; +extern cpuop_func op_51c8_2_ff; +extern cpuop_func op_52c8_2_nf; +extern cpuop_func op_52c8_2_ff; +extern cpuop_func op_53c8_2_nf; +extern cpuop_func op_53c8_2_ff; +extern cpuop_func op_54c8_2_nf; +extern cpuop_func op_54c8_2_ff; +extern cpuop_func op_55c8_2_nf; +extern cpuop_func op_55c8_2_ff; +extern cpuop_func op_56c8_2_nf; +extern cpuop_func op_56c8_2_ff; +extern cpuop_func op_57c8_2_nf; +extern cpuop_func op_57c8_2_ff; +extern cpuop_func op_58c8_2_nf; +extern cpuop_func op_58c8_2_ff; +extern cpuop_func op_59c8_2_nf; +extern cpuop_func op_59c8_2_ff; +extern cpuop_func op_5ac8_2_nf; +extern cpuop_func op_5ac8_2_ff; +extern cpuop_func op_5bc8_2_nf; +extern cpuop_func op_5bc8_2_ff; +extern cpuop_func op_5cc8_2_nf; +extern cpuop_func op_5cc8_2_ff; +extern cpuop_func op_5dc8_2_nf; +extern cpuop_func op_5dc8_2_ff; +extern cpuop_func op_5ec8_2_nf; +extern cpuop_func op_5ec8_2_ff; +extern cpuop_func op_5fc8_2_nf; +extern cpuop_func op_5fc8_2_ff; +extern cpuop_func op_6000_2_nf; +extern cpuop_func op_6000_2_ff; +extern cpuop_func op_6001_2_nf; +extern cpuop_func op_6001_2_ff; +extern cpuop_func op_60ff_2_nf; +extern cpuop_func op_60ff_2_ff; +extern cpuop_func op_6100_2_nf; +extern cpuop_func op_6100_2_ff; +extern cpuop_func op_6101_2_nf; +extern cpuop_func op_6101_2_ff; +extern cpuop_func op_61ff_2_nf; +extern cpuop_func op_61ff_2_ff; +extern cpuop_func op_6200_2_nf; +extern cpuop_func op_6200_2_ff; +extern cpuop_func op_6201_2_nf; +extern cpuop_func op_6201_2_ff; +extern cpuop_func op_62ff_2_nf; +extern cpuop_func op_62ff_2_ff; +extern cpuop_func op_6300_2_nf; +extern cpuop_func op_6300_2_ff; +extern cpuop_func op_6301_2_nf; +extern cpuop_func op_6301_2_ff; +extern cpuop_func op_63ff_2_nf; +extern cpuop_func op_63ff_2_ff; +extern cpuop_func op_6400_2_nf; +extern cpuop_func op_6400_2_ff; +extern cpuop_func op_6401_2_nf; +extern cpuop_func op_6401_2_ff; +extern cpuop_func op_64ff_2_nf; +extern cpuop_func op_64ff_2_ff; +extern cpuop_func op_6500_2_nf; +extern cpuop_func op_6500_2_ff; +extern cpuop_func op_6501_2_nf; +extern cpuop_func op_6501_2_ff; +extern cpuop_func op_65ff_2_nf; +extern cpuop_func op_65ff_2_ff; +extern cpuop_func op_6600_2_nf; +extern cpuop_func op_6600_2_ff; +extern cpuop_func op_6601_2_nf; +extern cpuop_func op_6601_2_ff; +extern cpuop_func op_66ff_2_nf; +extern cpuop_func op_66ff_2_ff; +extern cpuop_func op_6700_2_nf; +extern cpuop_func op_6700_2_ff; +extern cpuop_func op_6701_2_nf; +extern cpuop_func op_6701_2_ff; +extern cpuop_func op_67ff_2_nf; +extern cpuop_func op_67ff_2_ff; +extern cpuop_func op_6800_2_nf; +extern cpuop_func op_6800_2_ff; +extern cpuop_func op_6801_2_nf; +extern cpuop_func op_6801_2_ff; +extern cpuop_func op_68ff_2_nf; +extern cpuop_func op_68ff_2_ff; +extern cpuop_func op_6900_2_nf; +extern cpuop_func op_6900_2_ff; +extern cpuop_func op_6901_2_nf; +extern cpuop_func op_6901_2_ff; +extern cpuop_func op_69ff_2_nf; +extern cpuop_func op_69ff_2_ff; +extern cpuop_func op_6a00_2_nf; +extern cpuop_func op_6a00_2_ff; +extern cpuop_func op_6a01_2_nf; +extern cpuop_func op_6a01_2_ff; +extern cpuop_func op_6aff_2_nf; +extern cpuop_func op_6aff_2_ff; +extern cpuop_func op_6b00_2_nf; +extern cpuop_func op_6b00_2_ff; +extern cpuop_func op_6b01_2_nf; +extern cpuop_func op_6b01_2_ff; +extern cpuop_func op_6bff_2_nf; +extern cpuop_func op_6bff_2_ff; +extern cpuop_func op_6c00_2_nf; +extern cpuop_func op_6c00_2_ff; +extern cpuop_func op_6c01_2_nf; +extern cpuop_func op_6c01_2_ff; +extern cpuop_func op_6cff_2_nf; +extern cpuop_func op_6cff_2_ff; +extern cpuop_func op_6d00_2_nf; +extern cpuop_func op_6d00_2_ff; +extern cpuop_func op_6d01_2_nf; +extern cpuop_func op_6d01_2_ff; +extern cpuop_func op_6dff_2_nf; +extern cpuop_func op_6dff_2_ff; +extern cpuop_func op_6e00_2_nf; +extern cpuop_func op_6e00_2_ff; +extern cpuop_func op_6e01_2_nf; +extern cpuop_func op_6e01_2_ff; +extern cpuop_func op_6eff_2_nf; +extern cpuop_func op_6eff_2_ff; +extern cpuop_func op_6f00_2_nf; +extern cpuop_func op_6f00_2_ff; +extern cpuop_func op_6f01_2_nf; +extern cpuop_func op_6f01_2_ff; +extern cpuop_func op_6fff_2_nf; +extern cpuop_func op_6fff_2_ff; +extern cpuop_func op_8100_2_nf; +extern cpuop_func op_8100_2_ff; +extern cpuop_func op_8108_2_nf; +extern cpuop_func op_8108_2_ff; +extern cpuop_func op_c100_2_nf; +extern cpuop_func op_c100_2_ff; +extern cpuop_func op_c108_2_nf; +extern cpuop_func op_c108_2_ff; +extern cpuop_func op_003c_3_nf; +extern cpuop_func op_003c_3_ff; +extern cpuop_func op_007c_3_nf; +extern cpuop_func op_007c_3_ff; +extern cpuop_func op_023c_3_nf; +extern cpuop_func op_023c_3_ff; +extern cpuop_func op_027c_3_nf; +extern cpuop_func op_027c_3_ff; +extern cpuop_func op_0a3c_3_nf; +extern cpuop_func op_0a3c_3_ff; +extern cpuop_func op_0a7c_3_nf; +extern cpuop_func op_0a7c_3_ff; +extern cpuop_func op_4e72_3_nf; +extern cpuop_func op_4e72_3_ff; +extern cpuop_func op_4e73_3_nf; +extern cpuop_func op_4e73_3_ff; +extern cpuop_func op_4e77_3_nf; +extern cpuop_func op_4e77_3_ff; +extern cpuop_func op_0030_4_nf; +extern cpuop_func op_0030_4_ff; +extern cpuop_func op_003c_4_nf; +extern cpuop_func op_003c_4_ff; +extern cpuop_func op_0070_4_nf; +extern cpuop_func op_0070_4_ff; +extern cpuop_func op_007c_4_nf; +extern cpuop_func op_007c_4_ff; +extern cpuop_func op_00b0_4_nf; +extern cpuop_func op_00b0_4_ff; +extern cpuop_func op_0130_4_nf; +extern cpuop_func op_0130_4_ff; +extern cpuop_func op_013b_4_nf; +extern cpuop_func op_013b_4_ff; +extern cpuop_func op_0140_4_nf; +extern cpuop_func op_0140_4_ff; +extern cpuop_func op_0170_4_nf; +extern cpuop_func op_0170_4_ff; +extern cpuop_func op_0180_4_nf; +extern cpuop_func op_0180_4_ff; +extern cpuop_func op_01b0_4_nf; +extern cpuop_func op_01b0_4_ff; +extern cpuop_func op_01c0_4_nf; +extern cpuop_func op_01c0_4_ff; +extern cpuop_func op_01f0_4_nf; +extern cpuop_func op_01f0_4_ff; +extern cpuop_func op_0230_4_nf; +extern cpuop_func op_0230_4_ff; +extern cpuop_func op_023c_4_nf; +extern cpuop_func op_023c_4_ff; +extern cpuop_func op_0270_4_nf; +extern cpuop_func op_0270_4_ff; +extern cpuop_func op_027c_4_nf; +extern cpuop_func op_027c_4_ff; +extern cpuop_func op_02b0_4_nf; +extern cpuop_func op_02b0_4_ff; +extern cpuop_func op_0430_4_nf; +extern cpuop_func op_0430_4_ff; +extern cpuop_func op_0470_4_nf; +extern cpuop_func op_0470_4_ff; +extern cpuop_func op_04b0_4_nf; +extern cpuop_func op_04b0_4_ff; +extern cpuop_func op_0630_4_nf; +extern cpuop_func op_0630_4_ff; +extern cpuop_func op_0670_4_nf; +extern cpuop_func op_0670_4_ff; +extern cpuop_func op_06b0_4_nf; +extern cpuop_func op_06b0_4_ff; +extern cpuop_func op_0830_4_nf; +extern cpuop_func op_0830_4_ff; +extern cpuop_func op_083b_4_nf; +extern cpuop_func op_083b_4_ff; +extern cpuop_func op_0840_4_nf; +extern cpuop_func op_0840_4_ff; +extern cpuop_func op_0870_4_nf; +extern cpuop_func op_0870_4_ff; +extern cpuop_func op_0880_4_nf; +extern cpuop_func op_0880_4_ff; +extern cpuop_func op_08b0_4_nf; +extern cpuop_func op_08b0_4_ff; +extern cpuop_func op_08c0_4_nf; +extern cpuop_func op_08c0_4_ff; +extern cpuop_func op_08f0_4_nf; +extern cpuop_func op_08f0_4_ff; +extern cpuop_func op_0a30_4_nf; +extern cpuop_func op_0a30_4_ff; +extern cpuop_func op_0a3c_4_nf; +extern cpuop_func op_0a3c_4_ff; +extern cpuop_func op_0a70_4_nf; +extern cpuop_func op_0a70_4_ff; +extern cpuop_func op_0a7c_4_nf; +extern cpuop_func op_0a7c_4_ff; +extern cpuop_func op_0ab0_4_nf; +extern cpuop_func op_0ab0_4_ff; +extern cpuop_func op_0c30_4_nf; +extern cpuop_func op_0c30_4_ff; +extern cpuop_func op_0c70_4_nf; +extern cpuop_func op_0c70_4_ff; +extern cpuop_func op_0cb0_4_nf; +extern cpuop_func op_0cb0_4_ff; +extern cpuop_func op_0e30_4_nf; +extern cpuop_func op_0e30_4_ff; +extern cpuop_func op_0e70_4_nf; +extern cpuop_func op_0e70_4_ff; +extern cpuop_func op_0eb0_4_nf; +extern cpuop_func op_0eb0_4_ff; +extern cpuop_func op_1030_4_nf; +extern cpuop_func op_1030_4_ff; +extern cpuop_func op_103b_4_nf; +extern cpuop_func op_103b_4_ff; +extern cpuop_func op_10b0_4_nf; +extern cpuop_func op_10b0_4_ff; +extern cpuop_func op_10bb_4_nf; +extern cpuop_func op_10bb_4_ff; +extern cpuop_func op_10f0_4_nf; +extern cpuop_func op_10f0_4_ff; +extern cpuop_func op_10fb_4_nf; +extern cpuop_func op_10fb_4_ff; +extern cpuop_func op_1130_4_nf; +extern cpuop_func op_1130_4_ff; +extern cpuop_func op_113b_4_nf; +extern cpuop_func op_113b_4_ff; +extern cpuop_func op_1170_4_nf; +extern cpuop_func op_1170_4_ff; +extern cpuop_func op_117b_4_nf; +extern cpuop_func op_117b_4_ff; +extern cpuop_func op_1180_4_nf; +extern cpuop_func op_1180_4_ff; +extern cpuop_func op_1190_4_nf; +extern cpuop_func op_1190_4_ff; +extern cpuop_func op_1198_4_nf; +extern cpuop_func op_1198_4_ff; +extern cpuop_func op_11a0_4_nf; +extern cpuop_func op_11a0_4_ff; +extern cpuop_func op_11a8_4_nf; +extern cpuop_func op_11a8_4_ff; +extern cpuop_func op_11b0_4_nf; +extern cpuop_func op_11b0_4_ff; +extern cpuop_func op_11b8_4_nf; +extern cpuop_func op_11b8_4_ff; +extern cpuop_func op_11b9_4_nf; +extern cpuop_func op_11b9_4_ff; +extern cpuop_func op_11ba_4_nf; +extern cpuop_func op_11ba_4_ff; +extern cpuop_func op_11bb_4_nf; +extern cpuop_func op_11bb_4_ff; +extern cpuop_func op_11bc_4_nf; +extern cpuop_func op_11bc_4_ff; +extern cpuop_func op_11f0_4_nf; +extern cpuop_func op_11f0_4_ff; +extern cpuop_func op_11fb_4_nf; +extern cpuop_func op_11fb_4_ff; +extern cpuop_func op_13f0_4_nf; +extern cpuop_func op_13f0_4_ff; +extern cpuop_func op_13fb_4_nf; +extern cpuop_func op_13fb_4_ff; +extern cpuop_func op_2030_4_nf; +extern cpuop_func op_2030_4_ff; +extern cpuop_func op_203b_4_nf; +extern cpuop_func op_203b_4_ff; +extern cpuop_func op_2070_4_nf; +extern cpuop_func op_2070_4_ff; +extern cpuop_func op_207b_4_nf; +extern cpuop_func op_207b_4_ff; +extern cpuop_func op_20b0_4_nf; +extern cpuop_func op_20b0_4_ff; +extern cpuop_func op_20bb_4_nf; +extern cpuop_func op_20bb_4_ff; +extern cpuop_func op_20f0_4_nf; +extern cpuop_func op_20f0_4_ff; +extern cpuop_func op_20fb_4_nf; +extern cpuop_func op_20fb_4_ff; +extern cpuop_func op_2130_4_nf; +extern cpuop_func op_2130_4_ff; +extern cpuop_func op_213b_4_nf; +extern cpuop_func op_213b_4_ff; +extern cpuop_func op_2170_4_nf; +extern cpuop_func op_2170_4_ff; +extern cpuop_func op_217b_4_nf; +extern cpuop_func op_217b_4_ff; +extern cpuop_func op_2180_4_nf; +extern cpuop_func op_2180_4_ff; +extern cpuop_func op_2188_4_nf; +extern cpuop_func op_2188_4_ff; +extern cpuop_func op_2190_4_nf; +extern cpuop_func op_2190_4_ff; +extern cpuop_func op_2198_4_nf; +extern cpuop_func op_2198_4_ff; +extern cpuop_func op_21a0_4_nf; +extern cpuop_func op_21a0_4_ff; +extern cpuop_func op_21a8_4_nf; +extern cpuop_func op_21a8_4_ff; +extern cpuop_func op_21b0_4_nf; +extern cpuop_func op_21b0_4_ff; +extern cpuop_func op_21b8_4_nf; +extern cpuop_func op_21b8_4_ff; +extern cpuop_func op_21b9_4_nf; +extern cpuop_func op_21b9_4_ff; +extern cpuop_func op_21ba_4_nf; +extern cpuop_func op_21ba_4_ff; +extern cpuop_func op_21bb_4_nf; +extern cpuop_func op_21bb_4_ff; +extern cpuop_func op_21bc_4_nf; +extern cpuop_func op_21bc_4_ff; +extern cpuop_func op_21f0_4_nf; +extern cpuop_func op_21f0_4_ff; +extern cpuop_func op_21fb_4_nf; +extern cpuop_func op_21fb_4_ff; +extern cpuop_func op_23f0_4_nf; +extern cpuop_func op_23f0_4_ff; +extern cpuop_func op_23fb_4_nf; +extern cpuop_func op_23fb_4_ff; +extern cpuop_func op_3030_4_nf; +extern cpuop_func op_3030_4_ff; +extern cpuop_func op_303b_4_nf; +extern cpuop_func op_303b_4_ff; +extern cpuop_func op_3070_4_nf; +extern cpuop_func op_3070_4_ff; +extern cpuop_func op_307b_4_nf; +extern cpuop_func op_307b_4_ff; +extern cpuop_func op_30b0_4_nf; +extern cpuop_func op_30b0_4_ff; +extern cpuop_func op_30bb_4_nf; +extern cpuop_func op_30bb_4_ff; +extern cpuop_func op_30f0_4_nf; +extern cpuop_func op_30f0_4_ff; +extern cpuop_func op_30fb_4_nf; +extern cpuop_func op_30fb_4_ff; +extern cpuop_func op_3130_4_nf; +extern cpuop_func op_3130_4_ff; +extern cpuop_func op_313b_4_nf; +extern cpuop_func op_313b_4_ff; +extern cpuop_func op_3170_4_nf; +extern cpuop_func op_3170_4_ff; +extern cpuop_func op_317b_4_nf; +extern cpuop_func op_317b_4_ff; +extern cpuop_func op_3180_4_nf; +extern cpuop_func op_3180_4_ff; +extern cpuop_func op_3188_4_nf; +extern cpuop_func op_3188_4_ff; +extern cpuop_func op_3190_4_nf; +extern cpuop_func op_3190_4_ff; +extern cpuop_func op_3198_4_nf; +extern cpuop_func op_3198_4_ff; +extern cpuop_func op_31a0_4_nf; +extern cpuop_func op_31a0_4_ff; +extern cpuop_func op_31a8_4_nf; +extern cpuop_func op_31a8_4_ff; +extern cpuop_func op_31b0_4_nf; +extern cpuop_func op_31b0_4_ff; +extern cpuop_func op_31b8_4_nf; +extern cpuop_func op_31b8_4_ff; +extern cpuop_func op_31b9_4_nf; +extern cpuop_func op_31b9_4_ff; +extern cpuop_func op_31ba_4_nf; +extern cpuop_func op_31ba_4_ff; +extern cpuop_func op_31bb_4_nf; +extern cpuop_func op_31bb_4_ff; +extern cpuop_func op_31bc_4_nf; +extern cpuop_func op_31bc_4_ff; +extern cpuop_func op_31f0_4_nf; +extern cpuop_func op_31f0_4_ff; +extern cpuop_func op_31fb_4_nf; +extern cpuop_func op_31fb_4_ff; +extern cpuop_func op_33f0_4_nf; +extern cpuop_func op_33f0_4_ff; +extern cpuop_func op_33fb_4_nf; +extern cpuop_func op_33fb_4_ff; +extern cpuop_func op_4030_4_nf; +extern cpuop_func op_4030_4_ff; +extern cpuop_func op_4070_4_nf; +extern cpuop_func op_4070_4_ff; +extern cpuop_func op_40b0_4_nf; +extern cpuop_func op_40b0_4_ff; +extern cpuop_func op_40f0_4_nf; +extern cpuop_func op_40f0_4_ff; +extern cpuop_func op_41b0_4_nf; +extern cpuop_func op_41b0_4_ff; +extern cpuop_func op_41bb_4_nf; +extern cpuop_func op_41bb_4_ff; +extern cpuop_func op_41f0_4_nf; +extern cpuop_func op_41f0_4_ff; +extern cpuop_func op_41fb_4_nf; +extern cpuop_func op_41fb_4_ff; +extern cpuop_func op_4230_4_nf; +extern cpuop_func op_4230_4_ff; +extern cpuop_func op_4270_4_nf; +extern cpuop_func op_4270_4_ff; +extern cpuop_func op_42b0_4_nf; +extern cpuop_func op_42b0_4_ff; +extern cpuop_func op_42f0_4_nf; +extern cpuop_func op_42f0_4_ff; +extern cpuop_func op_4430_4_nf; +extern cpuop_func op_4430_4_ff; +extern cpuop_func op_4470_4_nf; +extern cpuop_func op_4470_4_ff; +extern cpuop_func op_44b0_4_nf; +extern cpuop_func op_44b0_4_ff; +extern cpuop_func op_44f0_4_nf; +extern cpuop_func op_44f0_4_ff; +extern cpuop_func op_44fb_4_nf; +extern cpuop_func op_44fb_4_ff; +extern cpuop_func op_4630_4_nf; +extern cpuop_func op_4630_4_ff; +extern cpuop_func op_4670_4_nf; +extern cpuop_func op_4670_4_ff; +extern cpuop_func op_46b0_4_nf; +extern cpuop_func op_46b0_4_ff; +extern cpuop_func op_46f0_4_nf; +extern cpuop_func op_46f0_4_ff; +extern cpuop_func op_46fb_4_nf; +extern cpuop_func op_46fb_4_ff; +extern cpuop_func op_4800_4_nf; +extern cpuop_func op_4800_4_ff; +extern cpuop_func op_4810_4_nf; +extern cpuop_func op_4810_4_ff; +extern cpuop_func op_4818_4_nf; +extern cpuop_func op_4818_4_ff; +extern cpuop_func op_4820_4_nf; +extern cpuop_func op_4820_4_ff; +extern cpuop_func op_4828_4_nf; +extern cpuop_func op_4828_4_ff; +extern cpuop_func op_4830_4_nf; +extern cpuop_func op_4830_4_ff; +extern cpuop_func op_4838_4_nf; +extern cpuop_func op_4838_4_ff; +extern cpuop_func op_4839_4_nf; +extern cpuop_func op_4839_4_ff; +extern cpuop_func op_4870_4_nf; +extern cpuop_func op_4870_4_ff; +extern cpuop_func op_487b_4_nf; +extern cpuop_func op_487b_4_ff; +extern cpuop_func op_4890_4_nf; +extern cpuop_func op_4890_4_ff; +extern cpuop_func op_48a0_4_nf; +extern cpuop_func op_48a0_4_ff; +extern cpuop_func op_48a8_4_nf; +extern cpuop_func op_48a8_4_ff; +extern cpuop_func op_48b0_4_nf; +extern cpuop_func op_48b0_4_ff; +extern cpuop_func op_48b8_4_nf; +extern cpuop_func op_48b8_4_ff; +extern cpuop_func op_48b9_4_nf; +extern cpuop_func op_48b9_4_ff; +extern cpuop_func op_48d0_4_nf; +extern cpuop_func op_48d0_4_ff; +extern cpuop_func op_48e0_4_nf; +extern cpuop_func op_48e0_4_ff; +extern cpuop_func op_48e8_4_nf; +extern cpuop_func op_48e8_4_ff; +extern cpuop_func op_48f0_4_nf; +extern cpuop_func op_48f0_4_ff; +extern cpuop_func op_48f8_4_nf; +extern cpuop_func op_48f8_4_ff; +extern cpuop_func op_48f9_4_nf; +extern cpuop_func op_48f9_4_ff; +extern cpuop_func op_4a30_4_nf; +extern cpuop_func op_4a30_4_ff; +extern cpuop_func op_4a70_4_nf; +extern cpuop_func op_4a70_4_ff; +extern cpuop_func op_4ab0_4_nf; +extern cpuop_func op_4ab0_4_ff; +extern cpuop_func op_4ac0_4_nf; +extern cpuop_func op_4ac0_4_ff; +extern cpuop_func op_4ad0_4_nf; +extern cpuop_func op_4ad0_4_ff; +extern cpuop_func op_4ad8_4_nf; +extern cpuop_func op_4ad8_4_ff; +extern cpuop_func op_4ae0_4_nf; +extern cpuop_func op_4ae0_4_ff; +extern cpuop_func op_4ae8_4_nf; +extern cpuop_func op_4ae8_4_ff; +extern cpuop_func op_4af0_4_nf; +extern cpuop_func op_4af0_4_ff; +extern cpuop_func op_4af8_4_nf; +extern cpuop_func op_4af8_4_ff; +extern cpuop_func op_4af9_4_nf; +extern cpuop_func op_4af9_4_ff; +extern cpuop_func op_4c90_4_nf; +extern cpuop_func op_4c90_4_ff; +extern cpuop_func op_4c98_4_nf; +extern cpuop_func op_4c98_4_ff; +extern cpuop_func op_4ca8_4_nf; +extern cpuop_func op_4ca8_4_ff; +extern cpuop_func op_4cb0_4_nf; +extern cpuop_func op_4cb0_4_ff; +extern cpuop_func op_4cb8_4_nf; +extern cpuop_func op_4cb8_4_ff; +extern cpuop_func op_4cb9_4_nf; +extern cpuop_func op_4cb9_4_ff; +extern cpuop_func op_4cba_4_nf; +extern cpuop_func op_4cba_4_ff; +extern cpuop_func op_4cbb_4_nf; +extern cpuop_func op_4cbb_4_ff; +extern cpuop_func op_4cd0_4_nf; +extern cpuop_func op_4cd0_4_ff; +extern cpuop_func op_4cd8_4_nf; +extern cpuop_func op_4cd8_4_ff; +extern cpuop_func op_4ce8_4_nf; +extern cpuop_func op_4ce8_4_ff; +extern cpuop_func op_4cf0_4_nf; +extern cpuop_func op_4cf0_4_ff; +extern cpuop_func op_4cf8_4_nf; +extern cpuop_func op_4cf8_4_ff; +extern cpuop_func op_4cf9_4_nf; +extern cpuop_func op_4cf9_4_ff; +extern cpuop_func op_4cfa_4_nf; +extern cpuop_func op_4cfa_4_ff; +extern cpuop_func op_4cfb_4_nf; +extern cpuop_func op_4cfb_4_ff; +extern cpuop_func op_4e50_4_nf; +extern cpuop_func op_4e50_4_ff; +extern cpuop_func op_4e72_4_nf; +extern cpuop_func op_4e72_4_ff; +extern cpuop_func op_4e73_4_nf; +extern cpuop_func op_4e73_4_ff; +extern cpuop_func op_4e75_4_nf; +extern cpuop_func op_4e75_4_ff; +extern cpuop_func op_4e77_4_nf; +extern cpuop_func op_4e77_4_ff; +extern cpuop_func op_4eb0_4_nf; +extern cpuop_func op_4eb0_4_ff; +extern cpuop_func op_4ebb_4_nf; +extern cpuop_func op_4ebb_4_ff; +extern cpuop_func op_4ef0_4_nf; +extern cpuop_func op_4ef0_4_ff; +extern cpuop_func op_4efb_4_nf; +extern cpuop_func op_4efb_4_ff; +extern cpuop_func op_5030_4_nf; +extern cpuop_func op_5030_4_ff; +extern cpuop_func op_5070_4_nf; +extern cpuop_func op_5070_4_ff; +extern cpuop_func op_50b0_4_nf; +extern cpuop_func op_50b0_4_ff; +extern cpuop_func op_50c8_4_nf; +extern cpuop_func op_50c8_4_ff; +extern cpuop_func op_50f0_4_nf; +extern cpuop_func op_50f0_4_ff; +extern cpuop_func op_5130_4_nf; +extern cpuop_func op_5130_4_ff; +extern cpuop_func op_5170_4_nf; +extern cpuop_func op_5170_4_ff; +extern cpuop_func op_51b0_4_nf; +extern cpuop_func op_51b0_4_ff; +extern cpuop_func op_51c8_4_nf; +extern cpuop_func op_51c8_4_ff; +extern cpuop_func op_51f0_4_nf; +extern cpuop_func op_51f0_4_ff; +extern cpuop_func op_52c8_4_nf; +extern cpuop_func op_52c8_4_ff; +extern cpuop_func op_52f0_4_nf; +extern cpuop_func op_52f0_4_ff; +extern cpuop_func op_53c8_4_nf; +extern cpuop_func op_53c8_4_ff; +extern cpuop_func op_53f0_4_nf; +extern cpuop_func op_53f0_4_ff; +extern cpuop_func op_54c8_4_nf; +extern cpuop_func op_54c8_4_ff; +extern cpuop_func op_54f0_4_nf; +extern cpuop_func op_54f0_4_ff; +extern cpuop_func op_55c8_4_nf; +extern cpuop_func op_55c8_4_ff; +extern cpuop_func op_55f0_4_nf; +extern cpuop_func op_55f0_4_ff; +extern cpuop_func op_56c8_4_nf; +extern cpuop_func op_56c8_4_ff; +extern cpuop_func op_56f0_4_nf; +extern cpuop_func op_56f0_4_ff; +extern cpuop_func op_57c8_4_nf; +extern cpuop_func op_57c8_4_ff; +extern cpuop_func op_57f0_4_nf; +extern cpuop_func op_57f0_4_ff; +extern cpuop_func op_58c8_4_nf; +extern cpuop_func op_58c8_4_ff; +extern cpuop_func op_58f0_4_nf; +extern cpuop_func op_58f0_4_ff; +extern cpuop_func op_59c8_4_nf; +extern cpuop_func op_59c8_4_ff; +extern cpuop_func op_59f0_4_nf; +extern cpuop_func op_59f0_4_ff; +extern cpuop_func op_5ac8_4_nf; +extern cpuop_func op_5ac8_4_ff; +extern cpuop_func op_5af0_4_nf; +extern cpuop_func op_5af0_4_ff; +extern cpuop_func op_5bc8_4_nf; +extern cpuop_func op_5bc8_4_ff; +extern cpuop_func op_5bf0_4_nf; +extern cpuop_func op_5bf0_4_ff; +extern cpuop_func op_5cc8_4_nf; +extern cpuop_func op_5cc8_4_ff; +extern cpuop_func op_5cf0_4_nf; +extern cpuop_func op_5cf0_4_ff; +extern cpuop_func op_5dc8_4_nf; +extern cpuop_func op_5dc8_4_ff; +extern cpuop_func op_5df0_4_nf; +extern cpuop_func op_5df0_4_ff; +extern cpuop_func op_5ec8_4_nf; +extern cpuop_func op_5ec8_4_ff; +extern cpuop_func op_5ef0_4_nf; +extern cpuop_func op_5ef0_4_ff; +extern cpuop_func op_5fc8_4_nf; +extern cpuop_func op_5fc8_4_ff; +extern cpuop_func op_5ff0_4_nf; +extern cpuop_func op_5ff0_4_ff; +extern cpuop_func op_6000_4_nf; +extern cpuop_func op_6000_4_ff; +extern cpuop_func op_6001_4_nf; +extern cpuop_func op_6001_4_ff; +extern cpuop_func op_60ff_4_nf; +extern cpuop_func op_60ff_4_ff; +extern cpuop_func op_6100_4_nf; +extern cpuop_func op_6100_4_ff; +extern cpuop_func op_6101_4_nf; +extern cpuop_func op_6101_4_ff; +extern cpuop_func op_61ff_4_nf; +extern cpuop_func op_61ff_4_ff; +extern cpuop_func op_6200_4_nf; +extern cpuop_func op_6200_4_ff; +extern cpuop_func op_6201_4_nf; +extern cpuop_func op_6201_4_ff; +extern cpuop_func op_62ff_4_nf; +extern cpuop_func op_62ff_4_ff; +extern cpuop_func op_6300_4_nf; +extern cpuop_func op_6300_4_ff; +extern cpuop_func op_6301_4_nf; +extern cpuop_func op_6301_4_ff; +extern cpuop_func op_63ff_4_nf; +extern cpuop_func op_63ff_4_ff; +extern cpuop_func op_6400_4_nf; +extern cpuop_func op_6400_4_ff; +extern cpuop_func op_6401_4_nf; +extern cpuop_func op_6401_4_ff; +extern cpuop_func op_64ff_4_nf; +extern cpuop_func op_64ff_4_ff; +extern cpuop_func op_6500_4_nf; +extern cpuop_func op_6500_4_ff; +extern cpuop_func op_6501_4_nf; +extern cpuop_func op_6501_4_ff; +extern cpuop_func op_65ff_4_nf; +extern cpuop_func op_65ff_4_ff; +extern cpuop_func op_6600_4_nf; +extern cpuop_func op_6600_4_ff; +extern cpuop_func op_6601_4_nf; +extern cpuop_func op_6601_4_ff; +extern cpuop_func op_66ff_4_nf; +extern cpuop_func op_66ff_4_ff; +extern cpuop_func op_6700_4_nf; +extern cpuop_func op_6700_4_ff; +extern cpuop_func op_6701_4_nf; +extern cpuop_func op_6701_4_ff; +extern cpuop_func op_67ff_4_nf; +extern cpuop_func op_67ff_4_ff; +extern cpuop_func op_6800_4_nf; +extern cpuop_func op_6800_4_ff; +extern cpuop_func op_6801_4_nf; +extern cpuop_func op_6801_4_ff; +extern cpuop_func op_68ff_4_nf; +extern cpuop_func op_68ff_4_ff; +extern cpuop_func op_6900_4_nf; +extern cpuop_func op_6900_4_ff; +extern cpuop_func op_6901_4_nf; +extern cpuop_func op_6901_4_ff; +extern cpuop_func op_69ff_4_nf; +extern cpuop_func op_69ff_4_ff; +extern cpuop_func op_6a00_4_nf; +extern cpuop_func op_6a00_4_ff; +extern cpuop_func op_6a01_4_nf; +extern cpuop_func op_6a01_4_ff; +extern cpuop_func op_6aff_4_nf; +extern cpuop_func op_6aff_4_ff; +extern cpuop_func op_6b00_4_nf; +extern cpuop_func op_6b00_4_ff; +extern cpuop_func op_6b01_4_nf; +extern cpuop_func op_6b01_4_ff; +extern cpuop_func op_6bff_4_nf; +extern cpuop_func op_6bff_4_ff; +extern cpuop_func op_6c00_4_nf; +extern cpuop_func op_6c00_4_ff; +extern cpuop_func op_6c01_4_nf; +extern cpuop_func op_6c01_4_ff; +extern cpuop_func op_6cff_4_nf; +extern cpuop_func op_6cff_4_ff; +extern cpuop_func op_6d00_4_nf; +extern cpuop_func op_6d00_4_ff; +extern cpuop_func op_6d01_4_nf; +extern cpuop_func op_6d01_4_ff; +extern cpuop_func op_6dff_4_nf; +extern cpuop_func op_6dff_4_ff; +extern cpuop_func op_6e00_4_nf; +extern cpuop_func op_6e00_4_ff; +extern cpuop_func op_6e01_4_nf; +extern cpuop_func op_6e01_4_ff; +extern cpuop_func op_6eff_4_nf; +extern cpuop_func op_6eff_4_ff; +extern cpuop_func op_6f00_4_nf; +extern cpuop_func op_6f00_4_ff; +extern cpuop_func op_6f01_4_nf; +extern cpuop_func op_6f01_4_ff; +extern cpuop_func op_6fff_4_nf; +extern cpuop_func op_6fff_4_ff; +extern cpuop_func op_8030_4_nf; +extern cpuop_func op_8030_4_ff; +extern cpuop_func op_803b_4_nf; +extern cpuop_func op_803b_4_ff; +extern cpuop_func op_8070_4_nf; +extern cpuop_func op_8070_4_ff; +extern cpuop_func op_807b_4_nf; +extern cpuop_func op_807b_4_ff; +extern cpuop_func op_80b0_4_nf; +extern cpuop_func op_80b0_4_ff; +extern cpuop_func op_80bb_4_nf; +extern cpuop_func op_80bb_4_ff; +extern cpuop_func op_80c0_4_nf; +extern cpuop_func op_80c0_4_ff; +extern cpuop_func op_80d0_4_nf; +extern cpuop_func op_80d0_4_ff; +extern cpuop_func op_80d8_4_nf; +extern cpuop_func op_80d8_4_ff; +extern cpuop_func op_80e0_4_nf; +extern cpuop_func op_80e0_4_ff; +extern cpuop_func op_80e8_4_nf; +extern cpuop_func op_80e8_4_ff; +extern cpuop_func op_80f0_4_nf; +extern cpuop_func op_80f0_4_ff; +extern cpuop_func op_80f8_4_nf; +extern cpuop_func op_80f8_4_ff; +extern cpuop_func op_80f9_4_nf; +extern cpuop_func op_80f9_4_ff; +extern cpuop_func op_80fa_4_nf; +extern cpuop_func op_80fa_4_ff; +extern cpuop_func op_80fb_4_nf; +extern cpuop_func op_80fb_4_ff; +extern cpuop_func op_80fc_4_nf; +extern cpuop_func op_80fc_4_ff; +extern cpuop_func op_8100_4_nf; +extern cpuop_func op_8100_4_ff; +extern cpuop_func op_8108_4_nf; +extern cpuop_func op_8108_4_ff; +extern cpuop_func op_8130_4_nf; +extern cpuop_func op_8130_4_ff; +extern cpuop_func op_8170_4_nf; +extern cpuop_func op_8170_4_ff; +extern cpuop_func op_81b0_4_nf; +extern cpuop_func op_81b0_4_ff; +extern cpuop_func op_81c0_4_nf; +extern cpuop_func op_81c0_4_ff; +extern cpuop_func op_81d0_4_nf; +extern cpuop_func op_81d0_4_ff; +extern cpuop_func op_81d8_4_nf; +extern cpuop_func op_81d8_4_ff; +extern cpuop_func op_81e0_4_nf; +extern cpuop_func op_81e0_4_ff; +extern cpuop_func op_81e8_4_nf; +extern cpuop_func op_81e8_4_ff; +extern cpuop_func op_81f0_4_nf; +extern cpuop_func op_81f0_4_ff; +extern cpuop_func op_81f8_4_nf; +extern cpuop_func op_81f8_4_ff; +extern cpuop_func op_81f9_4_nf; +extern cpuop_func op_81f9_4_ff; +extern cpuop_func op_81fa_4_nf; +extern cpuop_func op_81fa_4_ff; +extern cpuop_func op_81fb_4_nf; +extern cpuop_func op_81fb_4_ff; +extern cpuop_func op_81fc_4_nf; +extern cpuop_func op_81fc_4_ff; +extern cpuop_func op_9030_4_nf; +extern cpuop_func op_9030_4_ff; +extern cpuop_func op_903b_4_nf; +extern cpuop_func op_903b_4_ff; +extern cpuop_func op_9070_4_nf; +extern cpuop_func op_9070_4_ff; +extern cpuop_func op_907b_4_nf; +extern cpuop_func op_907b_4_ff; +extern cpuop_func op_90b0_4_nf; +extern cpuop_func op_90b0_4_ff; +extern cpuop_func op_90bb_4_nf; +extern cpuop_func op_90bb_4_ff; +extern cpuop_func op_90f0_4_nf; +extern cpuop_func op_90f0_4_ff; +extern cpuop_func op_90fb_4_nf; +extern cpuop_func op_90fb_4_ff; +extern cpuop_func op_9130_4_nf; +extern cpuop_func op_9130_4_ff; +extern cpuop_func op_9170_4_nf; +extern cpuop_func op_9170_4_ff; +extern cpuop_func op_91b0_4_nf; +extern cpuop_func op_91b0_4_ff; +extern cpuop_func op_91f0_4_nf; +extern cpuop_func op_91f0_4_ff; +extern cpuop_func op_91fb_4_nf; +extern cpuop_func op_91fb_4_ff; +extern cpuop_func op_b030_4_nf; +extern cpuop_func op_b030_4_ff; +extern cpuop_func op_b03b_4_nf; +extern cpuop_func op_b03b_4_ff; +extern cpuop_func op_b070_4_nf; +extern cpuop_func op_b070_4_ff; +extern cpuop_func op_b07b_4_nf; +extern cpuop_func op_b07b_4_ff; +extern cpuop_func op_b0b0_4_nf; +extern cpuop_func op_b0b0_4_ff; +extern cpuop_func op_b0bb_4_nf; +extern cpuop_func op_b0bb_4_ff; +extern cpuop_func op_b0f0_4_nf; +extern cpuop_func op_b0f0_4_ff; +extern cpuop_func op_b0fb_4_nf; +extern cpuop_func op_b0fb_4_ff; +extern cpuop_func op_b130_4_nf; +extern cpuop_func op_b130_4_ff; +extern cpuop_func op_b170_4_nf; +extern cpuop_func op_b170_4_ff; +extern cpuop_func op_b1b0_4_nf; +extern cpuop_func op_b1b0_4_ff; +extern cpuop_func op_b1f0_4_nf; +extern cpuop_func op_b1f0_4_ff; +extern cpuop_func op_b1fb_4_nf; +extern cpuop_func op_b1fb_4_ff; +extern cpuop_func op_c030_4_nf; +extern cpuop_func op_c030_4_ff; +extern cpuop_func op_c03b_4_nf; +extern cpuop_func op_c03b_4_ff; +extern cpuop_func op_c070_4_nf; +extern cpuop_func op_c070_4_ff; +extern cpuop_func op_c07b_4_nf; +extern cpuop_func op_c07b_4_ff; +extern cpuop_func op_c0b0_4_nf; +extern cpuop_func op_c0b0_4_ff; +extern cpuop_func op_c0bb_4_nf; +extern cpuop_func op_c0bb_4_ff; +extern cpuop_func op_c0c0_4_nf; +extern cpuop_func op_c0c0_4_ff; +extern cpuop_func op_c0d0_4_nf; +extern cpuop_func op_c0d0_4_ff; +extern cpuop_func op_c0d8_4_nf; +extern cpuop_func op_c0d8_4_ff; +extern cpuop_func op_c0e0_4_nf; +extern cpuop_func op_c0e0_4_ff; +extern cpuop_func op_c0e8_4_nf; +extern cpuop_func op_c0e8_4_ff; +extern cpuop_func op_c0f0_4_nf; +extern cpuop_func op_c0f0_4_ff; +extern cpuop_func op_c0f8_4_nf; +extern cpuop_func op_c0f8_4_ff; +extern cpuop_func op_c0f9_4_nf; +extern cpuop_func op_c0f9_4_ff; +extern cpuop_func op_c0fa_4_nf; +extern cpuop_func op_c0fa_4_ff; +extern cpuop_func op_c0fb_4_nf; +extern cpuop_func op_c0fb_4_ff; +extern cpuop_func op_c0fc_4_nf; +extern cpuop_func op_c0fc_4_ff; +extern cpuop_func op_c100_4_nf; +extern cpuop_func op_c100_4_ff; +extern cpuop_func op_c108_4_nf; +extern cpuop_func op_c108_4_ff; +extern cpuop_func op_c130_4_nf; +extern cpuop_func op_c130_4_ff; +extern cpuop_func op_c170_4_nf; +extern cpuop_func op_c170_4_ff; +extern cpuop_func op_c1b0_4_nf; +extern cpuop_func op_c1b0_4_ff; +extern cpuop_func op_c1c0_4_nf; +extern cpuop_func op_c1c0_4_ff; +extern cpuop_func op_c1d0_4_nf; +extern cpuop_func op_c1d0_4_ff; +extern cpuop_func op_c1d8_4_nf; +extern cpuop_func op_c1d8_4_ff; +extern cpuop_func op_c1e0_4_nf; +extern cpuop_func op_c1e0_4_ff; +extern cpuop_func op_c1e8_4_nf; +extern cpuop_func op_c1e8_4_ff; +extern cpuop_func op_c1f0_4_nf; +extern cpuop_func op_c1f0_4_ff; +extern cpuop_func op_c1f8_4_nf; +extern cpuop_func op_c1f8_4_ff; +extern cpuop_func op_c1f9_4_nf; +extern cpuop_func op_c1f9_4_ff; +extern cpuop_func op_c1fa_4_nf; +extern cpuop_func op_c1fa_4_ff; +extern cpuop_func op_c1fb_4_nf; +extern cpuop_func op_c1fb_4_ff; +extern cpuop_func op_c1fc_4_nf; +extern cpuop_func op_c1fc_4_ff; +extern cpuop_func op_d030_4_nf; +extern cpuop_func op_d030_4_ff; +extern cpuop_func op_d03b_4_nf; +extern cpuop_func op_d03b_4_ff; +extern cpuop_func op_d070_4_nf; +extern cpuop_func op_d070_4_ff; +extern cpuop_func op_d07b_4_nf; +extern cpuop_func op_d07b_4_ff; +extern cpuop_func op_d0b0_4_nf; +extern cpuop_func op_d0b0_4_ff; +extern cpuop_func op_d0bb_4_nf; +extern cpuop_func op_d0bb_4_ff; +extern cpuop_func op_d0f0_4_nf; +extern cpuop_func op_d0f0_4_ff; +extern cpuop_func op_d0fb_4_nf; +extern cpuop_func op_d0fb_4_ff; +extern cpuop_func op_d130_4_nf; +extern cpuop_func op_d130_4_ff; +extern cpuop_func op_d170_4_nf; +extern cpuop_func op_d170_4_ff; +extern cpuop_func op_d1b0_4_nf; +extern cpuop_func op_d1b0_4_ff; +extern cpuop_func op_d1f0_4_nf; +extern cpuop_func op_d1f0_4_ff; +extern cpuop_func op_d1fb_4_nf; +extern cpuop_func op_d1fb_4_ff; +extern cpuop_func op_e000_4_nf; +extern cpuop_func op_e000_4_ff; +extern cpuop_func op_e008_4_nf; +extern cpuop_func op_e008_4_ff; +extern cpuop_func op_e010_4_nf; +extern cpuop_func op_e010_4_ff; +extern cpuop_func op_e018_4_nf; +extern cpuop_func op_e018_4_ff; +extern cpuop_func op_e020_4_nf; +extern cpuop_func op_e020_4_ff; +extern cpuop_func op_e028_4_nf; +extern cpuop_func op_e028_4_ff; +extern cpuop_func op_e030_4_nf; +extern cpuop_func op_e030_4_ff; +extern cpuop_func op_e038_4_nf; +extern cpuop_func op_e038_4_ff; +extern cpuop_func op_e040_4_nf; +extern cpuop_func op_e040_4_ff; +extern cpuop_func op_e048_4_nf; +extern cpuop_func op_e048_4_ff; +extern cpuop_func op_e050_4_nf; +extern cpuop_func op_e050_4_ff; +extern cpuop_func op_e058_4_nf; +extern cpuop_func op_e058_4_ff; +extern cpuop_func op_e060_4_nf; +extern cpuop_func op_e060_4_ff; +extern cpuop_func op_e068_4_nf; +extern cpuop_func op_e068_4_ff; +extern cpuop_func op_e070_4_nf; +extern cpuop_func op_e070_4_ff; +extern cpuop_func op_e078_4_nf; +extern cpuop_func op_e078_4_ff; +extern cpuop_func op_e080_4_nf; +extern cpuop_func op_e080_4_ff; +extern cpuop_func op_e088_4_nf; +extern cpuop_func op_e088_4_ff; +extern cpuop_func op_e090_4_nf; +extern cpuop_func op_e090_4_ff; +extern cpuop_func op_e098_4_nf; +extern cpuop_func op_e098_4_ff; +extern cpuop_func op_e0a0_4_nf; +extern cpuop_func op_e0a0_4_ff; +extern cpuop_func op_e0a8_4_nf; +extern cpuop_func op_e0a8_4_ff; +extern cpuop_func op_e0b0_4_nf; +extern cpuop_func op_e0b0_4_ff; +extern cpuop_func op_e0b8_4_nf; +extern cpuop_func op_e0b8_4_ff; +extern cpuop_func op_e0f0_4_nf; +extern cpuop_func op_e0f0_4_ff; +extern cpuop_func op_e100_4_nf; +extern cpuop_func op_e100_4_ff; +extern cpuop_func op_e108_4_nf; +extern cpuop_func op_e108_4_ff; +extern cpuop_func op_e110_4_nf; +extern cpuop_func op_e110_4_ff; +extern cpuop_func op_e118_4_nf; +extern cpuop_func op_e118_4_ff; +extern cpuop_func op_e120_4_nf; +extern cpuop_func op_e120_4_ff; +extern cpuop_func op_e128_4_nf; +extern cpuop_func op_e128_4_ff; +extern cpuop_func op_e130_4_nf; +extern cpuop_func op_e130_4_ff; +extern cpuop_func op_e138_4_nf; +extern cpuop_func op_e138_4_ff; +extern cpuop_func op_e140_4_nf; +extern cpuop_func op_e140_4_ff; +extern cpuop_func op_e148_4_nf; +extern cpuop_func op_e148_4_ff; +extern cpuop_func op_e150_4_nf; +extern cpuop_func op_e150_4_ff; +extern cpuop_func op_e158_4_nf; +extern cpuop_func op_e158_4_ff; +extern cpuop_func op_e160_4_nf; +extern cpuop_func op_e160_4_ff; +extern cpuop_func op_e168_4_nf; +extern cpuop_func op_e168_4_ff; +extern cpuop_func op_e170_4_nf; +extern cpuop_func op_e170_4_ff; +extern cpuop_func op_e178_4_nf; +extern cpuop_func op_e178_4_ff; +extern cpuop_func op_e180_4_nf; +extern cpuop_func op_e180_4_ff; +extern cpuop_func op_e188_4_nf; +extern cpuop_func op_e188_4_ff; +extern cpuop_func op_e190_4_nf; +extern cpuop_func op_e190_4_ff; +extern cpuop_func op_e198_4_nf; +extern cpuop_func op_e198_4_ff; +extern cpuop_func op_e1a0_4_nf; +extern cpuop_func op_e1a0_4_ff; +extern cpuop_func op_e1a8_4_nf; +extern cpuop_func op_e1a8_4_ff; +extern cpuop_func op_e1b0_4_nf; +extern cpuop_func op_e1b0_4_ff; +extern cpuop_func op_e1b8_4_nf; +extern cpuop_func op_e1b8_4_ff; +extern cpuop_func op_e1f0_4_nf; +extern cpuop_func op_e1f0_4_ff; +extern cpuop_func op_e2f0_4_nf; +extern cpuop_func op_e2f0_4_ff; +extern cpuop_func op_e3f0_4_nf; +extern cpuop_func op_e3f0_4_ff; +extern cpuop_func op_e4f0_4_nf; +extern cpuop_func op_e4f0_4_ff; +extern cpuop_func op_e5f0_4_nf; +extern cpuop_func op_e5f0_4_ff; +extern cpuop_func op_e6f0_4_nf; +extern cpuop_func op_e6f0_4_ff; +extern cpuop_func op_e7f0_4_nf; +extern cpuop_func op_e7f0_4_ff; +extern cpuop_func op_003c_5_nf; +extern cpuop_func op_003c_5_ff; +extern cpuop_func op_007c_5_nf; +extern cpuop_func op_007c_5_ff; +extern cpuop_func op_0080_5_nf; +extern cpuop_func op_0080_5_ff; +extern cpuop_func op_0108_5_nf; +extern cpuop_func op_0108_5_ff; +extern cpuop_func op_0148_5_nf; +extern cpuop_func op_0148_5_ff; +extern cpuop_func op_0188_5_nf; +extern cpuop_func op_0188_5_ff; +extern cpuop_func op_0190_5_nf; +extern cpuop_func op_0190_5_ff; +extern cpuop_func op_0198_5_nf; +extern cpuop_func op_0198_5_ff; +extern cpuop_func op_01a0_5_nf; +extern cpuop_func op_01a0_5_ff; +extern cpuop_func op_01a8_5_nf; +extern cpuop_func op_01a8_5_ff; +extern cpuop_func op_01b0_5_nf; +extern cpuop_func op_01b0_5_ff; +extern cpuop_func op_01b8_5_nf; +extern cpuop_func op_01b8_5_ff; +extern cpuop_func op_01b9_5_nf; +extern cpuop_func op_01b9_5_ff; +extern cpuop_func op_01c8_5_nf; +extern cpuop_func op_01c8_5_ff; +extern cpuop_func op_023c_5_nf; +extern cpuop_func op_023c_5_ff; +extern cpuop_func op_027c_5_nf; +extern cpuop_func op_027c_5_ff; +extern cpuop_func op_0280_5_nf; +extern cpuop_func op_0280_5_ff; +extern cpuop_func op_0480_5_nf; +extern cpuop_func op_0480_5_ff; +extern cpuop_func op_0680_5_nf; +extern cpuop_func op_0680_5_ff; +extern cpuop_func op_0890_5_nf; +extern cpuop_func op_0890_5_ff; +extern cpuop_func op_0898_5_nf; +extern cpuop_func op_0898_5_ff; +extern cpuop_func op_08a0_5_nf; +extern cpuop_func op_08a0_5_ff; +extern cpuop_func op_08a8_5_nf; +extern cpuop_func op_08a8_5_ff; +extern cpuop_func op_08b0_5_nf; +extern cpuop_func op_08b0_5_ff; +extern cpuop_func op_08b8_5_nf; +extern cpuop_func op_08b8_5_ff; +extern cpuop_func op_08b9_5_nf; +extern cpuop_func op_08b9_5_ff; +extern cpuop_func op_0a3c_5_nf; +extern cpuop_func op_0a3c_5_ff; +extern cpuop_func op_0a7c_5_nf; +extern cpuop_func op_0a7c_5_ff; +extern cpuop_func op_0a80_5_nf; +extern cpuop_func op_0a80_5_ff; +extern cpuop_func op_40c0_5_nf; +extern cpuop_func op_40c0_5_ff; +extern cpuop_func op_40d0_5_nf; +extern cpuop_func op_40d0_5_ff; +extern cpuop_func op_40d8_5_nf; +extern cpuop_func op_40d8_5_ff; +extern cpuop_func op_40e0_5_nf; +extern cpuop_func op_40e0_5_ff; +extern cpuop_func op_40e8_5_nf; +extern cpuop_func op_40e8_5_ff; +extern cpuop_func op_40f0_5_nf; +extern cpuop_func op_40f0_5_ff; +extern cpuop_func op_40f8_5_nf; +extern cpuop_func op_40f8_5_ff; +extern cpuop_func op_40f9_5_nf; +extern cpuop_func op_40f9_5_ff; +extern cpuop_func op_41f9_5_nf; +extern cpuop_func op_41f9_5_ff; +extern cpuop_func op_4200_5_nf; +extern cpuop_func op_4200_5_ff; +extern cpuop_func op_4210_5_nf; +extern cpuop_func op_4210_5_ff; +extern cpuop_func op_4218_5_nf; +extern cpuop_func op_4218_5_ff; +extern cpuop_func op_4220_5_nf; +extern cpuop_func op_4220_5_ff; +extern cpuop_func op_4228_5_nf; +extern cpuop_func op_4228_5_ff; +extern cpuop_func op_4230_5_nf; +extern cpuop_func op_4230_5_ff; +extern cpuop_func op_4238_5_nf; +extern cpuop_func op_4238_5_ff; +extern cpuop_func op_4239_5_nf; +extern cpuop_func op_4239_5_ff; +extern cpuop_func op_4240_5_nf; +extern cpuop_func op_4240_5_ff; +extern cpuop_func op_4250_5_nf; +extern cpuop_func op_4250_5_ff; +extern cpuop_func op_4258_5_nf; +extern cpuop_func op_4258_5_ff; +extern cpuop_func op_4260_5_nf; +extern cpuop_func op_4260_5_ff; +extern cpuop_func op_4268_5_nf; +extern cpuop_func op_4268_5_ff; +extern cpuop_func op_4270_5_nf; +extern cpuop_func op_4270_5_ff; +extern cpuop_func op_4278_5_nf; +extern cpuop_func op_4278_5_ff; +extern cpuop_func op_4279_5_nf; +extern cpuop_func op_4279_5_ff; +extern cpuop_func op_4280_5_nf; +extern cpuop_func op_4280_5_ff; +extern cpuop_func op_4290_5_nf; +extern cpuop_func op_4290_5_ff; +extern cpuop_func op_4298_5_nf; +extern cpuop_func op_4298_5_ff; +extern cpuop_func op_42a0_5_nf; +extern cpuop_func op_42a0_5_ff; +extern cpuop_func op_42a8_5_nf; +extern cpuop_func op_42a8_5_ff; +extern cpuop_func op_42b0_5_nf; +extern cpuop_func op_42b0_5_ff; +extern cpuop_func op_42b8_5_nf; +extern cpuop_func op_42b8_5_ff; +extern cpuop_func op_42b9_5_nf; +extern cpuop_func op_42b9_5_ff; +extern cpuop_func op_44c0_5_nf; +extern cpuop_func op_44c0_5_ff; +extern cpuop_func op_44d0_5_nf; +extern cpuop_func op_44d0_5_ff; +extern cpuop_func op_44d8_5_nf; +extern cpuop_func op_44d8_5_ff; +extern cpuop_func op_44e0_5_nf; +extern cpuop_func op_44e0_5_ff; +extern cpuop_func op_44e8_5_nf; +extern cpuop_func op_44e8_5_ff; +extern cpuop_func op_44f0_5_nf; +extern cpuop_func op_44f0_5_ff; +extern cpuop_func op_44f8_5_nf; +extern cpuop_func op_44f8_5_ff; +extern cpuop_func op_44f9_5_nf; +extern cpuop_func op_44f9_5_ff; +extern cpuop_func op_44fa_5_nf; +extern cpuop_func op_44fa_5_ff; +extern cpuop_func op_44fb_5_nf; +extern cpuop_func op_44fb_5_ff; +extern cpuop_func op_44fc_5_nf; +extern cpuop_func op_44fc_5_ff; +extern cpuop_func op_46c0_5_nf; +extern cpuop_func op_46c0_5_ff; +extern cpuop_func op_46d0_5_nf; +extern cpuop_func op_46d0_5_ff; +extern cpuop_func op_46d8_5_nf; +extern cpuop_func op_46d8_5_ff; +extern cpuop_func op_46e0_5_nf; +extern cpuop_func op_46e0_5_ff; +extern cpuop_func op_46e8_5_nf; +extern cpuop_func op_46e8_5_ff; +extern cpuop_func op_46f0_5_nf; +extern cpuop_func op_46f0_5_ff; +extern cpuop_func op_46f8_5_nf; +extern cpuop_func op_46f8_5_ff; +extern cpuop_func op_46f9_5_nf; +extern cpuop_func op_46f9_5_ff; +extern cpuop_func op_46fa_5_nf; +extern cpuop_func op_46fa_5_ff; +extern cpuop_func op_46fb_5_nf; +extern cpuop_func op_46fb_5_ff; +extern cpuop_func op_46fc_5_nf; +extern cpuop_func op_46fc_5_ff; +extern cpuop_func op_4ac0_5_nf; +extern cpuop_func op_4ac0_5_ff; +extern cpuop_func op_4ad0_5_nf; +extern cpuop_func op_4ad0_5_ff; +extern cpuop_func op_4ad8_5_nf; +extern cpuop_func op_4ad8_5_ff; +extern cpuop_func op_4ae0_5_nf; +extern cpuop_func op_4ae0_5_ff; +extern cpuop_func op_4ae8_5_nf; +extern cpuop_func op_4ae8_5_ff; +extern cpuop_func op_4af0_5_nf; +extern cpuop_func op_4af0_5_ff; +extern cpuop_func op_4af8_5_nf; +extern cpuop_func op_4af8_5_ff; +extern cpuop_func op_4af9_5_nf; +extern cpuop_func op_4af9_5_ff; +extern cpuop_func op_4e60_5_nf; +extern cpuop_func op_4e60_5_ff; +extern cpuop_func op_4e68_5_nf; +extern cpuop_func op_4e68_5_ff; +extern cpuop_func op_4e72_5_nf; +extern cpuop_func op_4e72_5_ff; +extern cpuop_func op_4e73_5_nf; +extern cpuop_func op_4e73_5_ff; +extern cpuop_func op_4e75_5_nf; +extern cpuop_func op_4e75_5_ff; +extern cpuop_func op_4e76_5_nf; +extern cpuop_func op_4e76_5_ff; +extern cpuop_func op_4e77_5_nf; +extern cpuop_func op_4e77_5_ff; +extern cpuop_func op_4e90_5_nf; +extern cpuop_func op_4e90_5_ff; +extern cpuop_func op_4ea8_5_nf; +extern cpuop_func op_4ea8_5_ff; +extern cpuop_func op_4eb0_5_nf; +extern cpuop_func op_4eb0_5_ff; +extern cpuop_func op_4eb8_5_nf; +extern cpuop_func op_4eb8_5_ff; +extern cpuop_func op_4eb9_5_nf; +extern cpuop_func op_4eb9_5_ff; +extern cpuop_func op_4eba_5_nf; +extern cpuop_func op_4eba_5_ff; +extern cpuop_func op_4ebb_5_nf; +extern cpuop_func op_4ebb_5_ff; +extern cpuop_func op_4ed0_5_nf; +extern cpuop_func op_4ed0_5_ff; +extern cpuop_func op_4ee8_5_nf; +extern cpuop_func op_4ee8_5_ff; +extern cpuop_func op_4ef0_5_nf; +extern cpuop_func op_4ef0_5_ff; +extern cpuop_func op_4ef8_5_nf; +extern cpuop_func op_4ef8_5_ff; +extern cpuop_func op_4ef9_5_nf; +extern cpuop_func op_4ef9_5_ff; +extern cpuop_func op_4efa_5_nf; +extern cpuop_func op_4efa_5_ff; +extern cpuop_func op_4efb_5_nf; +extern cpuop_func op_4efb_5_ff; +extern cpuop_func op_5080_5_nf; +extern cpuop_func op_5080_5_ff; +extern cpuop_func op_50c0_5_nf; +extern cpuop_func op_50c0_5_ff; +extern cpuop_func op_50c8_5_nf; +extern cpuop_func op_50c8_5_ff; +extern cpuop_func op_50d0_5_nf; +extern cpuop_func op_50d0_5_ff; +extern cpuop_func op_50d8_5_nf; +extern cpuop_func op_50d8_5_ff; +extern cpuop_func op_50e0_5_nf; +extern cpuop_func op_50e0_5_ff; +extern cpuop_func op_50e8_5_nf; +extern cpuop_func op_50e8_5_ff; +extern cpuop_func op_50f0_5_nf; +extern cpuop_func op_50f0_5_ff; +extern cpuop_func op_50f8_5_nf; +extern cpuop_func op_50f8_5_ff; +extern cpuop_func op_50f9_5_nf; +extern cpuop_func op_50f9_5_ff; +extern cpuop_func op_5180_5_nf; +extern cpuop_func op_5180_5_ff; +extern cpuop_func op_51c0_5_nf; +extern cpuop_func op_51c0_5_ff; +extern cpuop_func op_51c8_5_nf; +extern cpuop_func op_51c8_5_ff; +extern cpuop_func op_51d0_5_nf; +extern cpuop_func op_51d0_5_ff; +extern cpuop_func op_51d8_5_nf; +extern cpuop_func op_51d8_5_ff; +extern cpuop_func op_51e0_5_nf; +extern cpuop_func op_51e0_5_ff; +extern cpuop_func op_51e8_5_nf; +extern cpuop_func op_51e8_5_ff; +extern cpuop_func op_51f0_5_nf; +extern cpuop_func op_51f0_5_ff; +extern cpuop_func op_51f8_5_nf; +extern cpuop_func op_51f8_5_ff; +extern cpuop_func op_51f9_5_nf; +extern cpuop_func op_51f9_5_ff; +extern cpuop_func op_52c0_5_nf; +extern cpuop_func op_52c0_5_ff; +extern cpuop_func op_52c8_5_nf; +extern cpuop_func op_52c8_5_ff; +extern cpuop_func op_52d0_5_nf; +extern cpuop_func op_52d0_5_ff; +extern cpuop_func op_52d8_5_nf; +extern cpuop_func op_52d8_5_ff; +extern cpuop_func op_52e0_5_nf; +extern cpuop_func op_52e0_5_ff; +extern cpuop_func op_52e8_5_nf; +extern cpuop_func op_52e8_5_ff; +extern cpuop_func op_52f0_5_nf; +extern cpuop_func op_52f0_5_ff; +extern cpuop_func op_52f8_5_nf; +extern cpuop_func op_52f8_5_ff; +extern cpuop_func op_52f9_5_nf; +extern cpuop_func op_52f9_5_ff; +extern cpuop_func op_53c0_5_nf; +extern cpuop_func op_53c0_5_ff; +extern cpuop_func op_53c8_5_nf; +extern cpuop_func op_53c8_5_ff; +extern cpuop_func op_53d0_5_nf; +extern cpuop_func op_53d0_5_ff; +extern cpuop_func op_53d8_5_nf; +extern cpuop_func op_53d8_5_ff; +extern cpuop_func op_53e0_5_nf; +extern cpuop_func op_53e0_5_ff; +extern cpuop_func op_53e8_5_nf; +extern cpuop_func op_53e8_5_ff; +extern cpuop_func op_53f0_5_nf; +extern cpuop_func op_53f0_5_ff; +extern cpuop_func op_53f8_5_nf; +extern cpuop_func op_53f8_5_ff; +extern cpuop_func op_53f9_5_nf; +extern cpuop_func op_53f9_5_ff; +extern cpuop_func op_54c0_5_nf; +extern cpuop_func op_54c0_5_ff; +extern cpuop_func op_54c8_5_nf; +extern cpuop_func op_54c8_5_ff; +extern cpuop_func op_54d0_5_nf; +extern cpuop_func op_54d0_5_ff; +extern cpuop_func op_54d8_5_nf; +extern cpuop_func op_54d8_5_ff; +extern cpuop_func op_54e0_5_nf; +extern cpuop_func op_54e0_5_ff; +extern cpuop_func op_54e8_5_nf; +extern cpuop_func op_54e8_5_ff; +extern cpuop_func op_54f0_5_nf; +extern cpuop_func op_54f0_5_ff; +extern cpuop_func op_54f8_5_nf; +extern cpuop_func op_54f8_5_ff; +extern cpuop_func op_54f9_5_nf; +extern cpuop_func op_54f9_5_ff; +extern cpuop_func op_55c0_5_nf; +extern cpuop_func op_55c0_5_ff; +extern cpuop_func op_55c8_5_nf; +extern cpuop_func op_55c8_5_ff; +extern cpuop_func op_55d0_5_nf; +extern cpuop_func op_55d0_5_ff; +extern cpuop_func op_55d8_5_nf; +extern cpuop_func op_55d8_5_ff; +extern cpuop_func op_55e0_5_nf; +extern cpuop_func op_55e0_5_ff; +extern cpuop_func op_55e8_5_nf; +extern cpuop_func op_55e8_5_ff; +extern cpuop_func op_55f0_5_nf; +extern cpuop_func op_55f0_5_ff; +extern cpuop_func op_55f8_5_nf; +extern cpuop_func op_55f8_5_ff; +extern cpuop_func op_55f9_5_nf; +extern cpuop_func op_55f9_5_ff; +extern cpuop_func op_56c0_5_nf; +extern cpuop_func op_56c0_5_ff; +extern cpuop_func op_56c8_5_nf; +extern cpuop_func op_56c8_5_ff; +extern cpuop_func op_56d0_5_nf; +extern cpuop_func op_56d0_5_ff; +extern cpuop_func op_56d8_5_nf; +extern cpuop_func op_56d8_5_ff; +extern cpuop_func op_56e0_5_nf; +extern cpuop_func op_56e0_5_ff; +extern cpuop_func op_56e8_5_nf; +extern cpuop_func op_56e8_5_ff; +extern cpuop_func op_56f0_5_nf; +extern cpuop_func op_56f0_5_ff; +extern cpuop_func op_56f8_5_nf; +extern cpuop_func op_56f8_5_ff; +extern cpuop_func op_56f9_5_nf; +extern cpuop_func op_56f9_5_ff; +extern cpuop_func op_57c0_5_nf; +extern cpuop_func op_57c0_5_ff; +extern cpuop_func op_57c8_5_nf; +extern cpuop_func op_57c8_5_ff; +extern cpuop_func op_57d0_5_nf; +extern cpuop_func op_57d0_5_ff; +extern cpuop_func op_57d8_5_nf; +extern cpuop_func op_57d8_5_ff; +extern cpuop_func op_57e0_5_nf; +extern cpuop_func op_57e0_5_ff; +extern cpuop_func op_57e8_5_nf; +extern cpuop_func op_57e8_5_ff; +extern cpuop_func op_57f0_5_nf; +extern cpuop_func op_57f0_5_ff; +extern cpuop_func op_57f8_5_nf; +extern cpuop_func op_57f8_5_ff; +extern cpuop_func op_57f9_5_nf; +extern cpuop_func op_57f9_5_ff; +extern cpuop_func op_58c0_5_nf; +extern cpuop_func op_58c0_5_ff; +extern cpuop_func op_58c8_5_nf; +extern cpuop_func op_58c8_5_ff; +extern cpuop_func op_58d0_5_nf; +extern cpuop_func op_58d0_5_ff; +extern cpuop_func op_58d8_5_nf; +extern cpuop_func op_58d8_5_ff; +extern cpuop_func op_58e0_5_nf; +extern cpuop_func op_58e0_5_ff; +extern cpuop_func op_58e8_5_nf; +extern cpuop_func op_58e8_5_ff; +extern cpuop_func op_58f0_5_nf; +extern cpuop_func op_58f0_5_ff; +extern cpuop_func op_58f8_5_nf; +extern cpuop_func op_58f8_5_ff; +extern cpuop_func op_58f9_5_nf; +extern cpuop_func op_58f9_5_ff; +extern cpuop_func op_59c0_5_nf; +extern cpuop_func op_59c0_5_ff; +extern cpuop_func op_59c8_5_nf; +extern cpuop_func op_59c8_5_ff; +extern cpuop_func op_59d0_5_nf; +extern cpuop_func op_59d0_5_ff; +extern cpuop_func op_59d8_5_nf; +extern cpuop_func op_59d8_5_ff; +extern cpuop_func op_59e0_5_nf; +extern cpuop_func op_59e0_5_ff; +extern cpuop_func op_59e8_5_nf; +extern cpuop_func op_59e8_5_ff; +extern cpuop_func op_59f0_5_nf; +extern cpuop_func op_59f0_5_ff; +extern cpuop_func op_59f8_5_nf; +extern cpuop_func op_59f8_5_ff; +extern cpuop_func op_59f9_5_nf; +extern cpuop_func op_59f9_5_ff; +extern cpuop_func op_5ac0_5_nf; +extern cpuop_func op_5ac0_5_ff; +extern cpuop_func op_5ac8_5_nf; +extern cpuop_func op_5ac8_5_ff; +extern cpuop_func op_5ad0_5_nf; +extern cpuop_func op_5ad0_5_ff; +extern cpuop_func op_5ad8_5_nf; +extern cpuop_func op_5ad8_5_ff; +extern cpuop_func op_5ae0_5_nf; +extern cpuop_func op_5ae0_5_ff; +extern cpuop_func op_5ae8_5_nf; +extern cpuop_func op_5ae8_5_ff; +extern cpuop_func op_5af0_5_nf; +extern cpuop_func op_5af0_5_ff; +extern cpuop_func op_5af8_5_nf; +extern cpuop_func op_5af8_5_ff; +extern cpuop_func op_5af9_5_nf; +extern cpuop_func op_5af9_5_ff; +extern cpuop_func op_5bc0_5_nf; +extern cpuop_func op_5bc0_5_ff; +extern cpuop_func op_5bc8_5_nf; +extern cpuop_func op_5bc8_5_ff; +extern cpuop_func op_5bd0_5_nf; +extern cpuop_func op_5bd0_5_ff; +extern cpuop_func op_5bd8_5_nf; +extern cpuop_func op_5bd8_5_ff; +extern cpuop_func op_5be0_5_nf; +extern cpuop_func op_5be0_5_ff; +extern cpuop_func op_5be8_5_nf; +extern cpuop_func op_5be8_5_ff; +extern cpuop_func op_5bf0_5_nf; +extern cpuop_func op_5bf0_5_ff; +extern cpuop_func op_5bf8_5_nf; +extern cpuop_func op_5bf8_5_ff; +extern cpuop_func op_5bf9_5_nf; +extern cpuop_func op_5bf9_5_ff; +extern cpuop_func op_5cc0_5_nf; +extern cpuop_func op_5cc0_5_ff; +extern cpuop_func op_5cc8_5_nf; +extern cpuop_func op_5cc8_5_ff; +extern cpuop_func op_5cd0_5_nf; +extern cpuop_func op_5cd0_5_ff; +extern cpuop_func op_5cd8_5_nf; +extern cpuop_func op_5cd8_5_ff; +extern cpuop_func op_5ce0_5_nf; +extern cpuop_func op_5ce0_5_ff; +extern cpuop_func op_5ce8_5_nf; +extern cpuop_func op_5ce8_5_ff; +extern cpuop_func op_5cf0_5_nf; +extern cpuop_func op_5cf0_5_ff; +extern cpuop_func op_5cf8_5_nf; +extern cpuop_func op_5cf8_5_ff; +extern cpuop_func op_5cf9_5_nf; +extern cpuop_func op_5cf9_5_ff; +extern cpuop_func op_5dc0_5_nf; +extern cpuop_func op_5dc0_5_ff; +extern cpuop_func op_5dc8_5_nf; +extern cpuop_func op_5dc8_5_ff; +extern cpuop_func op_5dd0_5_nf; +extern cpuop_func op_5dd0_5_ff; +extern cpuop_func op_5dd8_5_nf; +extern cpuop_func op_5dd8_5_ff; +extern cpuop_func op_5de0_5_nf; +extern cpuop_func op_5de0_5_ff; +extern cpuop_func op_5de8_5_nf; +extern cpuop_func op_5de8_5_ff; +extern cpuop_func op_5df0_5_nf; +extern cpuop_func op_5df0_5_ff; +extern cpuop_func op_5df8_5_nf; +extern cpuop_func op_5df8_5_ff; +extern cpuop_func op_5df9_5_nf; +extern cpuop_func op_5df9_5_ff; +extern cpuop_func op_5ec0_5_nf; +extern cpuop_func op_5ec0_5_ff; +extern cpuop_func op_5ec8_5_nf; +extern cpuop_func op_5ec8_5_ff; +extern cpuop_func op_5ed0_5_nf; +extern cpuop_func op_5ed0_5_ff; +extern cpuop_func op_5ed8_5_nf; +extern cpuop_func op_5ed8_5_ff; +extern cpuop_func op_5ee0_5_nf; +extern cpuop_func op_5ee0_5_ff; +extern cpuop_func op_5ee8_5_nf; +extern cpuop_func op_5ee8_5_ff; +extern cpuop_func op_5ef0_5_nf; +extern cpuop_func op_5ef0_5_ff; +extern cpuop_func op_5ef8_5_nf; +extern cpuop_func op_5ef8_5_ff; +extern cpuop_func op_5ef9_5_nf; +extern cpuop_func op_5ef9_5_ff; +extern cpuop_func op_5fc0_5_nf; +extern cpuop_func op_5fc0_5_ff; +extern cpuop_func op_5fc8_5_nf; +extern cpuop_func op_5fc8_5_ff; +extern cpuop_func op_5fd0_5_nf; +extern cpuop_func op_5fd0_5_ff; +extern cpuop_func op_5fd8_5_nf; +extern cpuop_func op_5fd8_5_ff; +extern cpuop_func op_5fe0_5_nf; +extern cpuop_func op_5fe0_5_ff; +extern cpuop_func op_5fe8_5_nf; +extern cpuop_func op_5fe8_5_ff; +extern cpuop_func op_5ff0_5_nf; +extern cpuop_func op_5ff0_5_ff; +extern cpuop_func op_5ff8_5_nf; +extern cpuop_func op_5ff8_5_ff; +extern cpuop_func op_5ff9_5_nf; +extern cpuop_func op_5ff9_5_ff; +extern cpuop_func op_6100_5_nf; +extern cpuop_func op_6100_5_ff; +extern cpuop_func op_6101_5_nf; +extern cpuop_func op_6101_5_ff; +extern cpuop_func op_61ff_5_nf; +extern cpuop_func op_61ff_5_ff; +extern cpuop_func op_8080_5_nf; +extern cpuop_func op_8080_5_ff; +extern cpuop_func op_8090_5_nf; +extern cpuop_func op_8090_5_ff; +extern cpuop_func op_8098_5_nf; +extern cpuop_func op_8098_5_ff; +extern cpuop_func op_80a0_5_nf; +extern cpuop_func op_80a0_5_ff; +extern cpuop_func op_80a8_5_nf; +extern cpuop_func op_80a8_5_ff; +extern cpuop_func op_80b0_5_nf; +extern cpuop_func op_80b0_5_ff; +extern cpuop_func op_80b8_5_nf; +extern cpuop_func op_80b8_5_ff; +extern cpuop_func op_80b9_5_nf; +extern cpuop_func op_80b9_5_ff; +extern cpuop_func op_80ba_5_nf; +extern cpuop_func op_80ba_5_ff; +extern cpuop_func op_80bb_5_nf; +extern cpuop_func op_80bb_5_ff; +extern cpuop_func op_80bc_5_nf; +extern cpuop_func op_80bc_5_ff; +extern cpuop_func op_9080_5_nf; +extern cpuop_func op_9080_5_ff; +extern cpuop_func op_9088_5_nf; +extern cpuop_func op_9088_5_ff; +extern cpuop_func op_9090_5_nf; +extern cpuop_func op_9090_5_ff; +extern cpuop_func op_9098_5_nf; +extern cpuop_func op_9098_5_ff; +extern cpuop_func op_90a0_5_nf; +extern cpuop_func op_90a0_5_ff; +extern cpuop_func op_90a8_5_nf; +extern cpuop_func op_90a8_5_ff; +extern cpuop_func op_90b0_5_nf; +extern cpuop_func op_90b0_5_ff; +extern cpuop_func op_90b8_5_nf; +extern cpuop_func op_90b8_5_ff; +extern cpuop_func op_90b9_5_nf; +extern cpuop_func op_90b9_5_ff; +extern cpuop_func op_90ba_5_nf; +extern cpuop_func op_90ba_5_ff; +extern cpuop_func op_90bb_5_nf; +extern cpuop_func op_90bb_5_ff; +extern cpuop_func op_90bc_5_nf; +extern cpuop_func op_90bc_5_ff; +extern cpuop_func op_9100_5_nf; +extern cpuop_func op_9100_5_ff; +extern cpuop_func op_9108_5_nf; +extern cpuop_func op_9108_5_ff; +extern cpuop_func op_9140_5_nf; +extern cpuop_func op_9140_5_ff; +extern cpuop_func op_9148_5_nf; +extern cpuop_func op_9148_5_ff; +extern cpuop_func op_9180_5_nf; +extern cpuop_func op_9180_5_ff; +extern cpuop_func op_9188_5_nf; +extern cpuop_func op_9188_5_ff; +extern cpuop_func op_b180_5_nf; +extern cpuop_func op_b180_5_ff; +extern cpuop_func op_c080_5_nf; +extern cpuop_func op_c080_5_ff; +extern cpuop_func op_c090_5_nf; +extern cpuop_func op_c090_5_ff; +extern cpuop_func op_c098_5_nf; +extern cpuop_func op_c098_5_ff; +extern cpuop_func op_c0a0_5_nf; +extern cpuop_func op_c0a0_5_ff; +extern cpuop_func op_c0a8_5_nf; +extern cpuop_func op_c0a8_5_ff; +extern cpuop_func op_c0b0_5_nf; +extern cpuop_func op_c0b0_5_ff; +extern cpuop_func op_c0b8_5_nf; +extern cpuop_func op_c0b8_5_ff; +extern cpuop_func op_c0b9_5_nf; +extern cpuop_func op_c0b9_5_ff; +extern cpuop_func op_c0ba_5_nf; +extern cpuop_func op_c0ba_5_ff; +extern cpuop_func op_c0bb_5_nf; +extern cpuop_func op_c0bb_5_ff; +extern cpuop_func op_c0bc_5_nf; +extern cpuop_func op_c0bc_5_ff; +extern cpuop_func op_d080_5_nf; +extern cpuop_func op_d080_5_ff; +extern cpuop_func op_d088_5_nf; +extern cpuop_func op_d088_5_ff; +extern cpuop_func op_d090_5_nf; +extern cpuop_func op_d090_5_ff; +extern cpuop_func op_d098_5_nf; +extern cpuop_func op_d098_5_ff; +extern cpuop_func op_d0a0_5_nf; +extern cpuop_func op_d0a0_5_ff; +extern cpuop_func op_d0a8_5_nf; +extern cpuop_func op_d0a8_5_ff; +extern cpuop_func op_d0b0_5_nf; +extern cpuop_func op_d0b0_5_ff; +extern cpuop_func op_d0b8_5_nf; +extern cpuop_func op_d0b8_5_ff; +extern cpuop_func op_d0b9_5_nf; +extern cpuop_func op_d0b9_5_ff; +extern cpuop_func op_d0ba_5_nf; +extern cpuop_func op_d0ba_5_ff; +extern cpuop_func op_d0bb_5_nf; +extern cpuop_func op_d0bb_5_ff; +extern cpuop_func op_d0bc_5_nf; +extern cpuop_func op_d0bc_5_ff; +extern cpuop_func op_d100_5_nf; +extern cpuop_func op_d100_5_ff; +extern cpuop_func op_d108_5_nf; +extern cpuop_func op_d108_5_ff; +extern cpuop_func op_d140_5_nf; +extern cpuop_func op_d140_5_ff; +extern cpuop_func op_d148_5_nf; +extern cpuop_func op_d148_5_ff; +extern cpuop_func op_d180_5_nf; +extern cpuop_func op_d180_5_ff; +extern cpuop_func op_d188_5_nf; +extern cpuop_func op_d188_5_ff; +extern cpuop_func op_0000_11_nf; +extern cpuop_func op_0000_11_ff; +extern cpuop_func op_0010_11_nf; +extern cpuop_func op_0010_11_ff; +extern cpuop_func op_0018_11_nf; +extern cpuop_func op_0018_11_ff; +extern cpuop_func op_0020_11_nf; +extern cpuop_func op_0020_11_ff; +extern cpuop_func op_0028_11_nf; +extern cpuop_func op_0028_11_ff; +extern cpuop_func op_0030_11_nf; +extern cpuop_func op_0030_11_ff; +extern cpuop_func op_0038_11_nf; +extern cpuop_func op_0038_11_ff; +extern cpuop_func op_0039_11_nf; +extern cpuop_func op_0039_11_ff; +extern cpuop_func op_003c_11_nf; +extern cpuop_func op_003c_11_ff; +extern cpuop_func op_0040_11_nf; +extern cpuop_func op_0040_11_ff; +extern cpuop_func op_0050_11_nf; +extern cpuop_func op_0050_11_ff; +extern cpuop_func op_0058_11_nf; +extern cpuop_func op_0058_11_ff; +extern cpuop_func op_0060_11_nf; +extern cpuop_func op_0060_11_ff; +extern cpuop_func op_0068_11_nf; +extern cpuop_func op_0068_11_ff; +extern cpuop_func op_0070_11_nf; +extern cpuop_func op_0070_11_ff; +extern cpuop_func op_0078_11_nf; +extern cpuop_func op_0078_11_ff; +extern cpuop_func op_0079_11_nf; +extern cpuop_func op_0079_11_ff; +extern cpuop_func op_007c_11_nf; +extern cpuop_func op_007c_11_ff; +extern cpuop_func op_0080_11_nf; +extern cpuop_func op_0080_11_ff; +extern cpuop_func op_0090_11_nf; +extern cpuop_func op_0090_11_ff; +extern cpuop_func op_0098_11_nf; +extern cpuop_func op_0098_11_ff; +extern cpuop_func op_00a0_11_nf; +extern cpuop_func op_00a0_11_ff; +extern cpuop_func op_00a8_11_nf; +extern cpuop_func op_00a8_11_ff; +extern cpuop_func op_00b0_11_nf; +extern cpuop_func op_00b0_11_ff; +extern cpuop_func op_00b8_11_nf; +extern cpuop_func op_00b8_11_ff; +extern cpuop_func op_00b9_11_nf; +extern cpuop_func op_00b9_11_ff; +extern cpuop_func op_0100_11_nf; +extern cpuop_func op_0100_11_ff; +extern cpuop_func op_0108_11_nf; +extern cpuop_func op_0108_11_ff; +extern cpuop_func op_0110_11_nf; +extern cpuop_func op_0110_11_ff; +extern cpuop_func op_0118_11_nf; +extern cpuop_func op_0118_11_ff; +extern cpuop_func op_0120_11_nf; +extern cpuop_func op_0120_11_ff; +extern cpuop_func op_0128_11_nf; +extern cpuop_func op_0128_11_ff; +extern cpuop_func op_0130_11_nf; +extern cpuop_func op_0130_11_ff; +extern cpuop_func op_0138_11_nf; +extern cpuop_func op_0138_11_ff; +extern cpuop_func op_0139_11_nf; +extern cpuop_func op_0139_11_ff; +extern cpuop_func op_013a_11_nf; +extern cpuop_func op_013a_11_ff; +extern cpuop_func op_013b_11_nf; +extern cpuop_func op_013b_11_ff; +extern cpuop_func op_013c_11_nf; +extern cpuop_func op_013c_11_ff; +extern cpuop_func op_0140_11_nf; +extern cpuop_func op_0140_11_ff; +extern cpuop_func op_0148_11_nf; +extern cpuop_func op_0148_11_ff; +extern cpuop_func op_0150_11_nf; +extern cpuop_func op_0150_11_ff; +extern cpuop_func op_0158_11_nf; +extern cpuop_func op_0158_11_ff; +extern cpuop_func op_0160_11_nf; +extern cpuop_func op_0160_11_ff; +extern cpuop_func op_0168_11_nf; +extern cpuop_func op_0168_11_ff; +extern cpuop_func op_0170_11_nf; +extern cpuop_func op_0170_11_ff; +extern cpuop_func op_0178_11_nf; +extern cpuop_func op_0178_11_ff; +extern cpuop_func op_0179_11_nf; +extern cpuop_func op_0179_11_ff; +extern cpuop_func op_0180_11_nf; +extern cpuop_func op_0180_11_ff; +extern cpuop_func op_0188_11_nf; +extern cpuop_func op_0188_11_ff; +extern cpuop_func op_0190_11_nf; +extern cpuop_func op_0190_11_ff; +extern cpuop_func op_0198_11_nf; +extern cpuop_func op_0198_11_ff; +extern cpuop_func op_01a0_11_nf; +extern cpuop_func op_01a0_11_ff; +extern cpuop_func op_01a8_11_nf; +extern cpuop_func op_01a8_11_ff; +extern cpuop_func op_01b0_11_nf; +extern cpuop_func op_01b0_11_ff; +extern cpuop_func op_01b8_11_nf; +extern cpuop_func op_01b8_11_ff; +extern cpuop_func op_01b9_11_nf; +extern cpuop_func op_01b9_11_ff; +extern cpuop_func op_01c0_11_nf; +extern cpuop_func op_01c0_11_ff; +extern cpuop_func op_01c8_11_nf; +extern cpuop_func op_01c8_11_ff; +extern cpuop_func op_01d0_11_nf; +extern cpuop_func op_01d0_11_ff; +extern cpuop_func op_01d8_11_nf; +extern cpuop_func op_01d8_11_ff; +extern cpuop_func op_01e0_11_nf; +extern cpuop_func op_01e0_11_ff; +extern cpuop_func op_01e8_11_nf; +extern cpuop_func op_01e8_11_ff; +extern cpuop_func op_01f0_11_nf; +extern cpuop_func op_01f0_11_ff; +extern cpuop_func op_01f8_11_nf; +extern cpuop_func op_01f8_11_ff; +extern cpuop_func op_01f9_11_nf; +extern cpuop_func op_01f9_11_ff; +extern cpuop_func op_0200_11_nf; +extern cpuop_func op_0200_11_ff; +extern cpuop_func op_0210_11_nf; +extern cpuop_func op_0210_11_ff; +extern cpuop_func op_0218_11_nf; +extern cpuop_func op_0218_11_ff; +extern cpuop_func op_0220_11_nf; +extern cpuop_func op_0220_11_ff; +extern cpuop_func op_0228_11_nf; +extern cpuop_func op_0228_11_ff; +extern cpuop_func op_0230_11_nf; +extern cpuop_func op_0230_11_ff; +extern cpuop_func op_0238_11_nf; +extern cpuop_func op_0238_11_ff; +extern cpuop_func op_0239_11_nf; +extern cpuop_func op_0239_11_ff; +extern cpuop_func op_023c_11_nf; +extern cpuop_func op_023c_11_ff; +extern cpuop_func op_0240_11_nf; +extern cpuop_func op_0240_11_ff; +extern cpuop_func op_0250_11_nf; +extern cpuop_func op_0250_11_ff; +extern cpuop_func op_0258_11_nf; +extern cpuop_func op_0258_11_ff; +extern cpuop_func op_0260_11_nf; +extern cpuop_func op_0260_11_ff; +extern cpuop_func op_0268_11_nf; +extern cpuop_func op_0268_11_ff; +extern cpuop_func op_0270_11_nf; +extern cpuop_func op_0270_11_ff; +extern cpuop_func op_0278_11_nf; +extern cpuop_func op_0278_11_ff; +extern cpuop_func op_0279_11_nf; +extern cpuop_func op_0279_11_ff; +extern cpuop_func op_027c_11_nf; +extern cpuop_func op_027c_11_ff; +extern cpuop_func op_0280_11_nf; +extern cpuop_func op_0280_11_ff; +extern cpuop_func op_0290_11_nf; +extern cpuop_func op_0290_11_ff; +extern cpuop_func op_0298_11_nf; +extern cpuop_func op_0298_11_ff; +extern cpuop_func op_02a0_11_nf; +extern cpuop_func op_02a0_11_ff; +extern cpuop_func op_02a8_11_nf; +extern cpuop_func op_02a8_11_ff; +extern cpuop_func op_02b0_11_nf; +extern cpuop_func op_02b0_11_ff; +extern cpuop_func op_02b8_11_nf; +extern cpuop_func op_02b8_11_ff; +extern cpuop_func op_02b9_11_nf; +extern cpuop_func op_02b9_11_ff; +extern cpuop_func op_0400_11_nf; +extern cpuop_func op_0400_11_ff; +extern cpuop_func op_0410_11_nf; +extern cpuop_func op_0410_11_ff; +extern cpuop_func op_0418_11_nf; +extern cpuop_func op_0418_11_ff; +extern cpuop_func op_0420_11_nf; +extern cpuop_func op_0420_11_ff; +extern cpuop_func op_0428_11_nf; +extern cpuop_func op_0428_11_ff; +extern cpuop_func op_0430_11_nf; +extern cpuop_func op_0430_11_ff; +extern cpuop_func op_0438_11_nf; +extern cpuop_func op_0438_11_ff; +extern cpuop_func op_0439_11_nf; +extern cpuop_func op_0439_11_ff; +extern cpuop_func op_0440_11_nf; +extern cpuop_func op_0440_11_ff; +extern cpuop_func op_0450_11_nf; +extern cpuop_func op_0450_11_ff; +extern cpuop_func op_0458_11_nf; +extern cpuop_func op_0458_11_ff; +extern cpuop_func op_0460_11_nf; +extern cpuop_func op_0460_11_ff; +extern cpuop_func op_0468_11_nf; +extern cpuop_func op_0468_11_ff; +extern cpuop_func op_0470_11_nf; +extern cpuop_func op_0470_11_ff; +extern cpuop_func op_0478_11_nf; +extern cpuop_func op_0478_11_ff; +extern cpuop_func op_0479_11_nf; +extern cpuop_func op_0479_11_ff; +extern cpuop_func op_0480_11_nf; +extern cpuop_func op_0480_11_ff; +extern cpuop_func op_0490_11_nf; +extern cpuop_func op_0490_11_ff; +extern cpuop_func op_0498_11_nf; +extern cpuop_func op_0498_11_ff; +extern cpuop_func op_04a0_11_nf; +extern cpuop_func op_04a0_11_ff; +extern cpuop_func op_04a8_11_nf; +extern cpuop_func op_04a8_11_ff; +extern cpuop_func op_04b0_11_nf; +extern cpuop_func op_04b0_11_ff; +extern cpuop_func op_04b8_11_nf; +extern cpuop_func op_04b8_11_ff; +extern cpuop_func op_04b9_11_nf; +extern cpuop_func op_04b9_11_ff; +extern cpuop_func op_0600_11_nf; +extern cpuop_func op_0600_11_ff; +extern cpuop_func op_0610_11_nf; +extern cpuop_func op_0610_11_ff; +extern cpuop_func op_0618_11_nf; +extern cpuop_func op_0618_11_ff; +extern cpuop_func op_0620_11_nf; +extern cpuop_func op_0620_11_ff; +extern cpuop_func op_0628_11_nf; +extern cpuop_func op_0628_11_ff; +extern cpuop_func op_0630_11_nf; +extern cpuop_func op_0630_11_ff; +extern cpuop_func op_0638_11_nf; +extern cpuop_func op_0638_11_ff; +extern cpuop_func op_0639_11_nf; +extern cpuop_func op_0639_11_ff; +extern cpuop_func op_0640_11_nf; +extern cpuop_func op_0640_11_ff; +extern cpuop_func op_0650_11_nf; +extern cpuop_func op_0650_11_ff; +extern cpuop_func op_0658_11_nf; +extern cpuop_func op_0658_11_ff; +extern cpuop_func op_0660_11_nf; +extern cpuop_func op_0660_11_ff; +extern cpuop_func op_0668_11_nf; +extern cpuop_func op_0668_11_ff; +extern cpuop_func op_0670_11_nf; +extern cpuop_func op_0670_11_ff; +extern cpuop_func op_0678_11_nf; +extern cpuop_func op_0678_11_ff; +extern cpuop_func op_0679_11_nf; +extern cpuop_func op_0679_11_ff; +extern cpuop_func op_0680_11_nf; +extern cpuop_func op_0680_11_ff; +extern cpuop_func op_0690_11_nf; +extern cpuop_func op_0690_11_ff; +extern cpuop_func op_0698_11_nf; +extern cpuop_func op_0698_11_ff; +extern cpuop_func op_06a0_11_nf; +extern cpuop_func op_06a0_11_ff; +extern cpuop_func op_06a8_11_nf; +extern cpuop_func op_06a8_11_ff; +extern cpuop_func op_06b0_11_nf; +extern cpuop_func op_06b0_11_ff; +extern cpuop_func op_06b8_11_nf; +extern cpuop_func op_06b8_11_ff; +extern cpuop_func op_06b9_11_nf; +extern cpuop_func op_06b9_11_ff; +extern cpuop_func op_0800_11_nf; +extern cpuop_func op_0800_11_ff; +extern cpuop_func op_0810_11_nf; +extern cpuop_func op_0810_11_ff; +extern cpuop_func op_0818_11_nf; +extern cpuop_func op_0818_11_ff; +extern cpuop_func op_0820_11_nf; +extern cpuop_func op_0820_11_ff; +extern cpuop_func op_0828_11_nf; +extern cpuop_func op_0828_11_ff; +extern cpuop_func op_0830_11_nf; +extern cpuop_func op_0830_11_ff; +extern cpuop_func op_0838_11_nf; +extern cpuop_func op_0838_11_ff; +extern cpuop_func op_0839_11_nf; +extern cpuop_func op_0839_11_ff; +extern cpuop_func op_083a_11_nf; +extern cpuop_func op_083a_11_ff; +extern cpuop_func op_083b_11_nf; +extern cpuop_func op_083b_11_ff; +extern cpuop_func op_0840_11_nf; +extern cpuop_func op_0840_11_ff; +extern cpuop_func op_0850_11_nf; +extern cpuop_func op_0850_11_ff; +extern cpuop_func op_0858_11_nf; +extern cpuop_func op_0858_11_ff; +extern cpuop_func op_0860_11_nf; +extern cpuop_func op_0860_11_ff; +extern cpuop_func op_0868_11_nf; +extern cpuop_func op_0868_11_ff; +extern cpuop_func op_0870_11_nf; +extern cpuop_func op_0870_11_ff; +extern cpuop_func op_0878_11_nf; +extern cpuop_func op_0878_11_ff; +extern cpuop_func op_0879_11_nf; +extern cpuop_func op_0879_11_ff; +extern cpuop_func op_0880_11_nf; +extern cpuop_func op_0880_11_ff; +extern cpuop_func op_0890_11_nf; +extern cpuop_func op_0890_11_ff; +extern cpuop_func op_0898_11_nf; +extern cpuop_func op_0898_11_ff; +extern cpuop_func op_08a0_11_nf; +extern cpuop_func op_08a0_11_ff; +extern cpuop_func op_08a8_11_nf; +extern cpuop_func op_08a8_11_ff; +extern cpuop_func op_08b0_11_nf; +extern cpuop_func op_08b0_11_ff; +extern cpuop_func op_08b8_11_nf; +extern cpuop_func op_08b8_11_ff; +extern cpuop_func op_08b9_11_nf; +extern cpuop_func op_08b9_11_ff; +extern cpuop_func op_08c0_11_nf; +extern cpuop_func op_08c0_11_ff; +extern cpuop_func op_08d0_11_nf; +extern cpuop_func op_08d0_11_ff; +extern cpuop_func op_08d8_11_nf; +extern cpuop_func op_08d8_11_ff; +extern cpuop_func op_08e0_11_nf; +extern cpuop_func op_08e0_11_ff; +extern cpuop_func op_08e8_11_nf; +extern cpuop_func op_08e8_11_ff; +extern cpuop_func op_08f0_11_nf; +extern cpuop_func op_08f0_11_ff; +extern cpuop_func op_08f8_11_nf; +extern cpuop_func op_08f8_11_ff; +extern cpuop_func op_08f9_11_nf; +extern cpuop_func op_08f9_11_ff; +extern cpuop_func op_0a00_11_nf; +extern cpuop_func op_0a00_11_ff; +extern cpuop_func op_0a10_11_nf; +extern cpuop_func op_0a10_11_ff; +extern cpuop_func op_0a18_11_nf; +extern cpuop_func op_0a18_11_ff; +extern cpuop_func op_0a20_11_nf; +extern cpuop_func op_0a20_11_ff; +extern cpuop_func op_0a28_11_nf; +extern cpuop_func op_0a28_11_ff; +extern cpuop_func op_0a30_11_nf; +extern cpuop_func op_0a30_11_ff; +extern cpuop_func op_0a38_11_nf; +extern cpuop_func op_0a38_11_ff; +extern cpuop_func op_0a39_11_nf; +extern cpuop_func op_0a39_11_ff; +extern cpuop_func op_0a3c_11_nf; +extern cpuop_func op_0a3c_11_ff; +extern cpuop_func op_0a40_11_nf; +extern cpuop_func op_0a40_11_ff; +extern cpuop_func op_0a50_11_nf; +extern cpuop_func op_0a50_11_ff; +extern cpuop_func op_0a58_11_nf; +extern cpuop_func op_0a58_11_ff; +extern cpuop_func op_0a60_11_nf; +extern cpuop_func op_0a60_11_ff; +extern cpuop_func op_0a68_11_nf; +extern cpuop_func op_0a68_11_ff; +extern cpuop_func op_0a70_11_nf; +extern cpuop_func op_0a70_11_ff; +extern cpuop_func op_0a78_11_nf; +extern cpuop_func op_0a78_11_ff; +extern cpuop_func op_0a79_11_nf; +extern cpuop_func op_0a79_11_ff; +extern cpuop_func op_0a7c_11_nf; +extern cpuop_func op_0a7c_11_ff; +extern cpuop_func op_0a80_11_nf; +extern cpuop_func op_0a80_11_ff; +extern cpuop_func op_0a90_11_nf; +extern cpuop_func op_0a90_11_ff; +extern cpuop_func op_0a98_11_nf; +extern cpuop_func op_0a98_11_ff; +extern cpuop_func op_0aa0_11_nf; +extern cpuop_func op_0aa0_11_ff; +extern cpuop_func op_0aa8_11_nf; +extern cpuop_func op_0aa8_11_ff; +extern cpuop_func op_0ab0_11_nf; +extern cpuop_func op_0ab0_11_ff; +extern cpuop_func op_0ab8_11_nf; +extern cpuop_func op_0ab8_11_ff; +extern cpuop_func op_0ab9_11_nf; +extern cpuop_func op_0ab9_11_ff; +extern cpuop_func op_0c00_11_nf; +extern cpuop_func op_0c00_11_ff; +extern cpuop_func op_0c10_11_nf; +extern cpuop_func op_0c10_11_ff; +extern cpuop_func op_0c18_11_nf; +extern cpuop_func op_0c18_11_ff; +extern cpuop_func op_0c20_11_nf; +extern cpuop_func op_0c20_11_ff; +extern cpuop_func op_0c28_11_nf; +extern cpuop_func op_0c28_11_ff; +extern cpuop_func op_0c30_11_nf; +extern cpuop_func op_0c30_11_ff; +extern cpuop_func op_0c38_11_nf; +extern cpuop_func op_0c38_11_ff; +extern cpuop_func op_0c39_11_nf; +extern cpuop_func op_0c39_11_ff; +extern cpuop_func op_0c40_11_nf; +extern cpuop_func op_0c40_11_ff; +extern cpuop_func op_0c50_11_nf; +extern cpuop_func op_0c50_11_ff; +extern cpuop_func op_0c58_11_nf; +extern cpuop_func op_0c58_11_ff; +extern cpuop_func op_0c60_11_nf; +extern cpuop_func op_0c60_11_ff; +extern cpuop_func op_0c68_11_nf; +extern cpuop_func op_0c68_11_ff; +extern cpuop_func op_0c70_11_nf; +extern cpuop_func op_0c70_11_ff; +extern cpuop_func op_0c78_11_nf; +extern cpuop_func op_0c78_11_ff; +extern cpuop_func op_0c79_11_nf; +extern cpuop_func op_0c79_11_ff; +extern cpuop_func op_0c80_11_nf; +extern cpuop_func op_0c80_11_ff; +extern cpuop_func op_0c90_11_nf; +extern cpuop_func op_0c90_11_ff; +extern cpuop_func op_0c98_11_nf; +extern cpuop_func op_0c98_11_ff; +extern cpuop_func op_0ca0_11_nf; +extern cpuop_func op_0ca0_11_ff; +extern cpuop_func op_0ca8_11_nf; +extern cpuop_func op_0ca8_11_ff; +extern cpuop_func op_0cb0_11_nf; +extern cpuop_func op_0cb0_11_ff; +extern cpuop_func op_0cb8_11_nf; +extern cpuop_func op_0cb8_11_ff; +extern cpuop_func op_0cb9_11_nf; +extern cpuop_func op_0cb9_11_ff; +extern cpuop_func op_0e10_11_nf; +extern cpuop_func op_0e10_11_ff; +extern cpuop_func op_0e18_11_nf; +extern cpuop_func op_0e18_11_ff; +extern cpuop_func op_0e20_11_nf; +extern cpuop_func op_0e20_11_ff; +extern cpuop_func op_0e28_11_nf; +extern cpuop_func op_0e28_11_ff; +extern cpuop_func op_0e30_11_nf; +extern cpuop_func op_0e30_11_ff; +extern cpuop_func op_0e38_11_nf; +extern cpuop_func op_0e38_11_ff; +extern cpuop_func op_0e39_11_nf; +extern cpuop_func op_0e39_11_ff; +extern cpuop_func op_0e50_11_nf; +extern cpuop_func op_0e50_11_ff; +extern cpuop_func op_0e58_11_nf; +extern cpuop_func op_0e58_11_ff; +extern cpuop_func op_0e60_11_nf; +extern cpuop_func op_0e60_11_ff; +extern cpuop_func op_0e68_11_nf; +extern cpuop_func op_0e68_11_ff; +extern cpuop_func op_0e70_11_nf; +extern cpuop_func op_0e70_11_ff; +extern cpuop_func op_0e78_11_nf; +extern cpuop_func op_0e78_11_ff; +extern cpuop_func op_0e79_11_nf; +extern cpuop_func op_0e79_11_ff; +extern cpuop_func op_0e90_11_nf; +extern cpuop_func op_0e90_11_ff; +extern cpuop_func op_0e98_11_nf; +extern cpuop_func op_0e98_11_ff; +extern cpuop_func op_0ea0_11_nf; +extern cpuop_func op_0ea0_11_ff; +extern cpuop_func op_0ea8_11_nf; +extern cpuop_func op_0ea8_11_ff; +extern cpuop_func op_0eb0_11_nf; +extern cpuop_func op_0eb0_11_ff; +extern cpuop_func op_0eb8_11_nf; +extern cpuop_func op_0eb8_11_ff; +extern cpuop_func op_0eb9_11_nf; +extern cpuop_func op_0eb9_11_ff; +extern cpuop_func op_1000_11_nf; +extern cpuop_func op_1000_11_ff; +extern cpuop_func op_1010_11_nf; +extern cpuop_func op_1010_11_ff; +extern cpuop_func op_1018_11_nf; +extern cpuop_func op_1018_11_ff; +extern cpuop_func op_1020_11_nf; +extern cpuop_func op_1020_11_ff; +extern cpuop_func op_1028_11_nf; +extern cpuop_func op_1028_11_ff; +extern cpuop_func op_1030_11_nf; +extern cpuop_func op_1030_11_ff; +extern cpuop_func op_1038_11_nf; +extern cpuop_func op_1038_11_ff; +extern cpuop_func op_1039_11_nf; +extern cpuop_func op_1039_11_ff; +extern cpuop_func op_103a_11_nf; +extern cpuop_func op_103a_11_ff; +extern cpuop_func op_103b_11_nf; +extern cpuop_func op_103b_11_ff; +extern cpuop_func op_103c_11_nf; +extern cpuop_func op_103c_11_ff; +extern cpuop_func op_1080_11_nf; +extern cpuop_func op_1080_11_ff; +extern cpuop_func op_1090_11_nf; +extern cpuop_func op_1090_11_ff; +extern cpuop_func op_1098_11_nf; +extern cpuop_func op_1098_11_ff; +extern cpuop_func op_10a0_11_nf; +extern cpuop_func op_10a0_11_ff; +extern cpuop_func op_10a8_11_nf; +extern cpuop_func op_10a8_11_ff; +extern cpuop_func op_10b0_11_nf; +extern cpuop_func op_10b0_11_ff; +extern cpuop_func op_10b8_11_nf; +extern cpuop_func op_10b8_11_ff; +extern cpuop_func op_10b9_11_nf; +extern cpuop_func op_10b9_11_ff; +extern cpuop_func op_10ba_11_nf; +extern cpuop_func op_10ba_11_ff; +extern cpuop_func op_10bb_11_nf; +extern cpuop_func op_10bb_11_ff; +extern cpuop_func op_10bc_11_nf; +extern cpuop_func op_10bc_11_ff; +extern cpuop_func op_10c0_11_nf; +extern cpuop_func op_10c0_11_ff; +extern cpuop_func op_10d0_11_nf; +extern cpuop_func op_10d0_11_ff; +extern cpuop_func op_10d8_11_nf; +extern cpuop_func op_10d8_11_ff; +extern cpuop_func op_10e0_11_nf; +extern cpuop_func op_10e0_11_ff; +extern cpuop_func op_10e8_11_nf; +extern cpuop_func op_10e8_11_ff; +extern cpuop_func op_10f0_11_nf; +extern cpuop_func op_10f0_11_ff; +extern cpuop_func op_10f8_11_nf; +extern cpuop_func op_10f8_11_ff; +extern cpuop_func op_10f9_11_nf; +extern cpuop_func op_10f9_11_ff; +extern cpuop_func op_10fa_11_nf; +extern cpuop_func op_10fa_11_ff; +extern cpuop_func op_10fb_11_nf; +extern cpuop_func op_10fb_11_ff; +extern cpuop_func op_10fc_11_nf; +extern cpuop_func op_10fc_11_ff; +extern cpuop_func op_1100_11_nf; +extern cpuop_func op_1100_11_ff; +extern cpuop_func op_1110_11_nf; +extern cpuop_func op_1110_11_ff; +extern cpuop_func op_1118_11_nf; +extern cpuop_func op_1118_11_ff; +extern cpuop_func op_1120_11_nf; +extern cpuop_func op_1120_11_ff; +extern cpuop_func op_1128_11_nf; +extern cpuop_func op_1128_11_ff; +extern cpuop_func op_1130_11_nf; +extern cpuop_func op_1130_11_ff; +extern cpuop_func op_1138_11_nf; +extern cpuop_func op_1138_11_ff; +extern cpuop_func op_1139_11_nf; +extern cpuop_func op_1139_11_ff; +extern cpuop_func op_113a_11_nf; +extern cpuop_func op_113a_11_ff; +extern cpuop_func op_113b_11_nf; +extern cpuop_func op_113b_11_ff; +extern cpuop_func op_113c_11_nf; +extern cpuop_func op_113c_11_ff; +extern cpuop_func op_1140_11_nf; +extern cpuop_func op_1140_11_ff; +extern cpuop_func op_1150_11_nf; +extern cpuop_func op_1150_11_ff; +extern cpuop_func op_1158_11_nf; +extern cpuop_func op_1158_11_ff; +extern cpuop_func op_1160_11_nf; +extern cpuop_func op_1160_11_ff; +extern cpuop_func op_1168_11_nf; +extern cpuop_func op_1168_11_ff; +extern cpuop_func op_1170_11_nf; +extern cpuop_func op_1170_11_ff; +extern cpuop_func op_1178_11_nf; +extern cpuop_func op_1178_11_ff; +extern cpuop_func op_1179_11_nf; +extern cpuop_func op_1179_11_ff; +extern cpuop_func op_117a_11_nf; +extern cpuop_func op_117a_11_ff; +extern cpuop_func op_117b_11_nf; +extern cpuop_func op_117b_11_ff; +extern cpuop_func op_117c_11_nf; +extern cpuop_func op_117c_11_ff; +extern cpuop_func op_1180_11_nf; +extern cpuop_func op_1180_11_ff; +extern cpuop_func op_1190_11_nf; +extern cpuop_func op_1190_11_ff; +extern cpuop_func op_1198_11_nf; +extern cpuop_func op_1198_11_ff; +extern cpuop_func op_11a0_11_nf; +extern cpuop_func op_11a0_11_ff; +extern cpuop_func op_11a8_11_nf; +extern cpuop_func op_11a8_11_ff; +extern cpuop_func op_11b0_11_nf; +extern cpuop_func op_11b0_11_ff; +extern cpuop_func op_11b8_11_nf; +extern cpuop_func op_11b8_11_ff; +extern cpuop_func op_11b9_11_nf; +extern cpuop_func op_11b9_11_ff; +extern cpuop_func op_11ba_11_nf; +extern cpuop_func op_11ba_11_ff; +extern cpuop_func op_11bb_11_nf; +extern cpuop_func op_11bb_11_ff; +extern cpuop_func op_11bc_11_nf; +extern cpuop_func op_11bc_11_ff; +extern cpuop_func op_11c0_11_nf; +extern cpuop_func op_11c0_11_ff; +extern cpuop_func op_11d0_11_nf; +extern cpuop_func op_11d0_11_ff; +extern cpuop_func op_11d8_11_nf; +extern cpuop_func op_11d8_11_ff; +extern cpuop_func op_11e0_11_nf; +extern cpuop_func op_11e0_11_ff; +extern cpuop_func op_11e8_11_nf; +extern cpuop_func op_11e8_11_ff; +extern cpuop_func op_11f0_11_nf; +extern cpuop_func op_11f0_11_ff; +extern cpuop_func op_11f8_11_nf; +extern cpuop_func op_11f8_11_ff; +extern cpuop_func op_11f9_11_nf; +extern cpuop_func op_11f9_11_ff; +extern cpuop_func op_11fa_11_nf; +extern cpuop_func op_11fa_11_ff; +extern cpuop_func op_11fb_11_nf; +extern cpuop_func op_11fb_11_ff; +extern cpuop_func op_11fc_11_nf; +extern cpuop_func op_11fc_11_ff; +extern cpuop_func op_13c0_11_nf; +extern cpuop_func op_13c0_11_ff; +extern cpuop_func op_13d0_11_nf; +extern cpuop_func op_13d0_11_ff; +extern cpuop_func op_13d8_11_nf; +extern cpuop_func op_13d8_11_ff; +extern cpuop_func op_13e0_11_nf; +extern cpuop_func op_13e0_11_ff; +extern cpuop_func op_13e8_11_nf; +extern cpuop_func op_13e8_11_ff; +extern cpuop_func op_13f0_11_nf; +extern cpuop_func op_13f0_11_ff; +extern cpuop_func op_13f8_11_nf; +extern cpuop_func op_13f8_11_ff; +extern cpuop_func op_13f9_11_nf; +extern cpuop_func op_13f9_11_ff; +extern cpuop_func op_13fa_11_nf; +extern cpuop_func op_13fa_11_ff; +extern cpuop_func op_13fb_11_nf; +extern cpuop_func op_13fb_11_ff; +extern cpuop_func op_13fc_11_nf; +extern cpuop_func op_13fc_11_ff; +extern cpuop_func op_2000_11_nf; +extern cpuop_func op_2000_11_ff; +extern cpuop_func op_2008_11_nf; +extern cpuop_func op_2008_11_ff; +extern cpuop_func op_2010_11_nf; +extern cpuop_func op_2010_11_ff; +extern cpuop_func op_2018_11_nf; +extern cpuop_func op_2018_11_ff; +extern cpuop_func op_2020_11_nf; +extern cpuop_func op_2020_11_ff; +extern cpuop_func op_2028_11_nf; +extern cpuop_func op_2028_11_ff; +extern cpuop_func op_2030_11_nf; +extern cpuop_func op_2030_11_ff; +extern cpuop_func op_2038_11_nf; +extern cpuop_func op_2038_11_ff; +extern cpuop_func op_2039_11_nf; +extern cpuop_func op_2039_11_ff; +extern cpuop_func op_203a_11_nf; +extern cpuop_func op_203a_11_ff; +extern cpuop_func op_203b_11_nf; +extern cpuop_func op_203b_11_ff; +extern cpuop_func op_203c_11_nf; +extern cpuop_func op_203c_11_ff; +extern cpuop_func op_2040_11_nf; +extern cpuop_func op_2040_11_ff; +extern cpuop_func op_2048_11_nf; +extern cpuop_func op_2048_11_ff; +extern cpuop_func op_2050_11_nf; +extern cpuop_func op_2050_11_ff; +extern cpuop_func op_2058_11_nf; +extern cpuop_func op_2058_11_ff; +extern cpuop_func op_2060_11_nf; +extern cpuop_func op_2060_11_ff; +extern cpuop_func op_2068_11_nf; +extern cpuop_func op_2068_11_ff; +extern cpuop_func op_2070_11_nf; +extern cpuop_func op_2070_11_ff; +extern cpuop_func op_2078_11_nf; +extern cpuop_func op_2078_11_ff; +extern cpuop_func op_2079_11_nf; +extern cpuop_func op_2079_11_ff; +extern cpuop_func op_207a_11_nf; +extern cpuop_func op_207a_11_ff; +extern cpuop_func op_207b_11_nf; +extern cpuop_func op_207b_11_ff; +extern cpuop_func op_207c_11_nf; +extern cpuop_func op_207c_11_ff; +extern cpuop_func op_2080_11_nf; +extern cpuop_func op_2080_11_ff; +extern cpuop_func op_2088_11_nf; +extern cpuop_func op_2088_11_ff; +extern cpuop_func op_2090_11_nf; +extern cpuop_func op_2090_11_ff; +extern cpuop_func op_2098_11_nf; +extern cpuop_func op_2098_11_ff; +extern cpuop_func op_20a0_11_nf; +extern cpuop_func op_20a0_11_ff; +extern cpuop_func op_20a8_11_nf; +extern cpuop_func op_20a8_11_ff; +extern cpuop_func op_20b0_11_nf; +extern cpuop_func op_20b0_11_ff; +extern cpuop_func op_20b8_11_nf; +extern cpuop_func op_20b8_11_ff; +extern cpuop_func op_20b9_11_nf; +extern cpuop_func op_20b9_11_ff; +extern cpuop_func op_20ba_11_nf; +extern cpuop_func op_20ba_11_ff; +extern cpuop_func op_20bb_11_nf; +extern cpuop_func op_20bb_11_ff; +extern cpuop_func op_20bc_11_nf; +extern cpuop_func op_20bc_11_ff; +extern cpuop_func op_20c0_11_nf; +extern cpuop_func op_20c0_11_ff; +extern cpuop_func op_20c8_11_nf; +extern cpuop_func op_20c8_11_ff; +extern cpuop_func op_20d0_11_nf; +extern cpuop_func op_20d0_11_ff; +extern cpuop_func op_20d8_11_nf; +extern cpuop_func op_20d8_11_ff; +extern cpuop_func op_20e0_11_nf; +extern cpuop_func op_20e0_11_ff; +extern cpuop_func op_20e8_11_nf; +extern cpuop_func op_20e8_11_ff; +extern cpuop_func op_20f0_11_nf; +extern cpuop_func op_20f0_11_ff; +extern cpuop_func op_20f8_11_nf; +extern cpuop_func op_20f8_11_ff; +extern cpuop_func op_20f9_11_nf; +extern cpuop_func op_20f9_11_ff; +extern cpuop_func op_20fa_11_nf; +extern cpuop_func op_20fa_11_ff; +extern cpuop_func op_20fb_11_nf; +extern cpuop_func op_20fb_11_ff; +extern cpuop_func op_20fc_11_nf; +extern cpuop_func op_20fc_11_ff; +extern cpuop_func op_2100_11_nf; +extern cpuop_func op_2100_11_ff; +extern cpuop_func op_2108_11_nf; +extern cpuop_func op_2108_11_ff; +extern cpuop_func op_2110_11_nf; +extern cpuop_func op_2110_11_ff; +extern cpuop_func op_2118_11_nf; +extern cpuop_func op_2118_11_ff; +extern cpuop_func op_2120_11_nf; +extern cpuop_func op_2120_11_ff; +extern cpuop_func op_2128_11_nf; +extern cpuop_func op_2128_11_ff; +extern cpuop_func op_2130_11_nf; +extern cpuop_func op_2130_11_ff; +extern cpuop_func op_2138_11_nf; +extern cpuop_func op_2138_11_ff; +extern cpuop_func op_2139_11_nf; +extern cpuop_func op_2139_11_ff; +extern cpuop_func op_213a_11_nf; +extern cpuop_func op_213a_11_ff; +extern cpuop_func op_213b_11_nf; +extern cpuop_func op_213b_11_ff; +extern cpuop_func op_213c_11_nf; +extern cpuop_func op_213c_11_ff; +extern cpuop_func op_2140_11_nf; +extern cpuop_func op_2140_11_ff; +extern cpuop_func op_2148_11_nf; +extern cpuop_func op_2148_11_ff; +extern cpuop_func op_2150_11_nf; +extern cpuop_func op_2150_11_ff; +extern cpuop_func op_2158_11_nf; +extern cpuop_func op_2158_11_ff; +extern cpuop_func op_2160_11_nf; +extern cpuop_func op_2160_11_ff; +extern cpuop_func op_2168_11_nf; +extern cpuop_func op_2168_11_ff; +extern cpuop_func op_2170_11_nf; +extern cpuop_func op_2170_11_ff; +extern cpuop_func op_2178_11_nf; +extern cpuop_func op_2178_11_ff; +extern cpuop_func op_2179_11_nf; +extern cpuop_func op_2179_11_ff; +extern cpuop_func op_217a_11_nf; +extern cpuop_func op_217a_11_ff; +extern cpuop_func op_217b_11_nf; +extern cpuop_func op_217b_11_ff; +extern cpuop_func op_217c_11_nf; +extern cpuop_func op_217c_11_ff; +extern cpuop_func op_2180_11_nf; +extern cpuop_func op_2180_11_ff; +extern cpuop_func op_2188_11_nf; +extern cpuop_func op_2188_11_ff; +extern cpuop_func op_2190_11_nf; +extern cpuop_func op_2190_11_ff; +extern cpuop_func op_2198_11_nf; +extern cpuop_func op_2198_11_ff; +extern cpuop_func op_21a0_11_nf; +extern cpuop_func op_21a0_11_ff; +extern cpuop_func op_21a8_11_nf; +extern cpuop_func op_21a8_11_ff; +extern cpuop_func op_21b0_11_nf; +extern cpuop_func op_21b0_11_ff; +extern cpuop_func op_21b8_11_nf; +extern cpuop_func op_21b8_11_ff; +extern cpuop_func op_21b9_11_nf; +extern cpuop_func op_21b9_11_ff; +extern cpuop_func op_21ba_11_nf; +extern cpuop_func op_21ba_11_ff; +extern cpuop_func op_21bb_11_nf; +extern cpuop_func op_21bb_11_ff; +extern cpuop_func op_21bc_11_nf; +extern cpuop_func op_21bc_11_ff; +extern cpuop_func op_21c0_11_nf; +extern cpuop_func op_21c0_11_ff; +extern cpuop_func op_21c8_11_nf; +extern cpuop_func op_21c8_11_ff; +extern cpuop_func op_21d0_11_nf; +extern cpuop_func op_21d0_11_ff; +extern cpuop_func op_21d8_11_nf; +extern cpuop_func op_21d8_11_ff; +extern cpuop_func op_21e0_11_nf; +extern cpuop_func op_21e0_11_ff; +extern cpuop_func op_21e8_11_nf; +extern cpuop_func op_21e8_11_ff; +extern cpuop_func op_21f0_11_nf; +extern cpuop_func op_21f0_11_ff; +extern cpuop_func op_21f8_11_nf; +extern cpuop_func op_21f8_11_ff; +extern cpuop_func op_21f9_11_nf; +extern cpuop_func op_21f9_11_ff; +extern cpuop_func op_21fa_11_nf; +extern cpuop_func op_21fa_11_ff; +extern cpuop_func op_21fb_11_nf; +extern cpuop_func op_21fb_11_ff; +extern cpuop_func op_21fc_11_nf; +extern cpuop_func op_21fc_11_ff; +extern cpuop_func op_23c0_11_nf; +extern cpuop_func op_23c0_11_ff; +extern cpuop_func op_23c8_11_nf; +extern cpuop_func op_23c8_11_ff; +extern cpuop_func op_23d0_11_nf; +extern cpuop_func op_23d0_11_ff; +extern cpuop_func op_23d8_11_nf; +extern cpuop_func op_23d8_11_ff; +extern cpuop_func op_23e0_11_nf; +extern cpuop_func op_23e0_11_ff; +extern cpuop_func op_23e8_11_nf; +extern cpuop_func op_23e8_11_ff; +extern cpuop_func op_23f0_11_nf; +extern cpuop_func op_23f0_11_ff; +extern cpuop_func op_23f8_11_nf; +extern cpuop_func op_23f8_11_ff; +extern cpuop_func op_23f9_11_nf; +extern cpuop_func op_23f9_11_ff; +extern cpuop_func op_23fa_11_nf; +extern cpuop_func op_23fa_11_ff; +extern cpuop_func op_23fb_11_nf; +extern cpuop_func op_23fb_11_ff; +extern cpuop_func op_23fc_11_nf; +extern cpuop_func op_23fc_11_ff; +extern cpuop_func op_3000_11_nf; +extern cpuop_func op_3000_11_ff; +extern cpuop_func op_3008_11_nf; +extern cpuop_func op_3008_11_ff; +extern cpuop_func op_3010_11_nf; +extern cpuop_func op_3010_11_ff; +extern cpuop_func op_3018_11_nf; +extern cpuop_func op_3018_11_ff; +extern cpuop_func op_3020_11_nf; +extern cpuop_func op_3020_11_ff; +extern cpuop_func op_3028_11_nf; +extern cpuop_func op_3028_11_ff; +extern cpuop_func op_3030_11_nf; +extern cpuop_func op_3030_11_ff; +extern cpuop_func op_3038_11_nf; +extern cpuop_func op_3038_11_ff; +extern cpuop_func op_3039_11_nf; +extern cpuop_func op_3039_11_ff; +extern cpuop_func op_303a_11_nf; +extern cpuop_func op_303a_11_ff; +extern cpuop_func op_303b_11_nf; +extern cpuop_func op_303b_11_ff; +extern cpuop_func op_303c_11_nf; +extern cpuop_func op_303c_11_ff; +extern cpuop_func op_3040_11_nf; +extern cpuop_func op_3040_11_ff; +extern cpuop_func op_3048_11_nf; +extern cpuop_func op_3048_11_ff; +extern cpuop_func op_3050_11_nf; +extern cpuop_func op_3050_11_ff; +extern cpuop_func op_3058_11_nf; +extern cpuop_func op_3058_11_ff; +extern cpuop_func op_3060_11_nf; +extern cpuop_func op_3060_11_ff; +extern cpuop_func op_3068_11_nf; +extern cpuop_func op_3068_11_ff; +extern cpuop_func op_3070_11_nf; +extern cpuop_func op_3070_11_ff; +extern cpuop_func op_3078_11_nf; +extern cpuop_func op_3078_11_ff; +extern cpuop_func op_3079_11_nf; +extern cpuop_func op_3079_11_ff; +extern cpuop_func op_307a_11_nf; +extern cpuop_func op_307a_11_ff; +extern cpuop_func op_307b_11_nf; +extern cpuop_func op_307b_11_ff; +extern cpuop_func op_307c_11_nf; +extern cpuop_func op_307c_11_ff; +extern cpuop_func op_3080_11_nf; +extern cpuop_func op_3080_11_ff; +extern cpuop_func op_3088_11_nf; +extern cpuop_func op_3088_11_ff; +extern cpuop_func op_3090_11_nf; +extern cpuop_func op_3090_11_ff; +extern cpuop_func op_3098_11_nf; +extern cpuop_func op_3098_11_ff; +extern cpuop_func op_30a0_11_nf; +extern cpuop_func op_30a0_11_ff; +extern cpuop_func op_30a8_11_nf; +extern cpuop_func op_30a8_11_ff; +extern cpuop_func op_30b0_11_nf; +extern cpuop_func op_30b0_11_ff; +extern cpuop_func op_30b8_11_nf; +extern cpuop_func op_30b8_11_ff; +extern cpuop_func op_30b9_11_nf; +extern cpuop_func op_30b9_11_ff; +extern cpuop_func op_30ba_11_nf; +extern cpuop_func op_30ba_11_ff; +extern cpuop_func op_30bb_11_nf; +extern cpuop_func op_30bb_11_ff; +extern cpuop_func op_30bc_11_nf; +extern cpuop_func op_30bc_11_ff; +extern cpuop_func op_30c0_11_nf; +extern cpuop_func op_30c0_11_ff; +extern cpuop_func op_30c8_11_nf; +extern cpuop_func op_30c8_11_ff; +extern cpuop_func op_30d0_11_nf; +extern cpuop_func op_30d0_11_ff; +extern cpuop_func op_30d8_11_nf; +extern cpuop_func op_30d8_11_ff; +extern cpuop_func op_30e0_11_nf; +extern cpuop_func op_30e0_11_ff; +extern cpuop_func op_30e8_11_nf; +extern cpuop_func op_30e8_11_ff; +extern cpuop_func op_30f0_11_nf; +extern cpuop_func op_30f0_11_ff; +extern cpuop_func op_30f8_11_nf; +extern cpuop_func op_30f8_11_ff; +extern cpuop_func op_30f9_11_nf; +extern cpuop_func op_30f9_11_ff; +extern cpuop_func op_30fa_11_nf; +extern cpuop_func op_30fa_11_ff; +extern cpuop_func op_30fb_11_nf; +extern cpuop_func op_30fb_11_ff; +extern cpuop_func op_30fc_11_nf; +extern cpuop_func op_30fc_11_ff; +extern cpuop_func op_3100_11_nf; +extern cpuop_func op_3100_11_ff; +extern cpuop_func op_3108_11_nf; +extern cpuop_func op_3108_11_ff; +extern cpuop_func op_3110_11_nf; +extern cpuop_func op_3110_11_ff; +extern cpuop_func op_3118_11_nf; +extern cpuop_func op_3118_11_ff; +extern cpuop_func op_3120_11_nf; +extern cpuop_func op_3120_11_ff; +extern cpuop_func op_3128_11_nf; +extern cpuop_func op_3128_11_ff; +extern cpuop_func op_3130_11_nf; +extern cpuop_func op_3130_11_ff; +extern cpuop_func op_3138_11_nf; +extern cpuop_func op_3138_11_ff; +extern cpuop_func op_3139_11_nf; +extern cpuop_func op_3139_11_ff; +extern cpuop_func op_313a_11_nf; +extern cpuop_func op_313a_11_ff; +extern cpuop_func op_313b_11_nf; +extern cpuop_func op_313b_11_ff; +extern cpuop_func op_313c_11_nf; +extern cpuop_func op_313c_11_ff; +extern cpuop_func op_3140_11_nf; +extern cpuop_func op_3140_11_ff; +extern cpuop_func op_3148_11_nf; +extern cpuop_func op_3148_11_ff; +extern cpuop_func op_3150_11_nf; +extern cpuop_func op_3150_11_ff; +extern cpuop_func op_3158_11_nf; +extern cpuop_func op_3158_11_ff; +extern cpuop_func op_3160_11_nf; +extern cpuop_func op_3160_11_ff; +extern cpuop_func op_3168_11_nf; +extern cpuop_func op_3168_11_ff; +extern cpuop_func op_3170_11_nf; +extern cpuop_func op_3170_11_ff; +extern cpuop_func op_3178_11_nf; +extern cpuop_func op_3178_11_ff; +extern cpuop_func op_3179_11_nf; +extern cpuop_func op_3179_11_ff; +extern cpuop_func op_317a_11_nf; +extern cpuop_func op_317a_11_ff; +extern cpuop_func op_317b_11_nf; +extern cpuop_func op_317b_11_ff; +extern cpuop_func op_317c_11_nf; +extern cpuop_func op_317c_11_ff; +extern cpuop_func op_3180_11_nf; +extern cpuop_func op_3180_11_ff; +extern cpuop_func op_3188_11_nf; +extern cpuop_func op_3188_11_ff; +extern cpuop_func op_3190_11_nf; +extern cpuop_func op_3190_11_ff; +extern cpuop_func op_3198_11_nf; +extern cpuop_func op_3198_11_ff; +extern cpuop_func op_31a0_11_nf; +extern cpuop_func op_31a0_11_ff; +extern cpuop_func op_31a8_11_nf; +extern cpuop_func op_31a8_11_ff; +extern cpuop_func op_31b0_11_nf; +extern cpuop_func op_31b0_11_ff; +extern cpuop_func op_31b8_11_nf; +extern cpuop_func op_31b8_11_ff; +extern cpuop_func op_31b9_11_nf; +extern cpuop_func op_31b9_11_ff; +extern cpuop_func op_31ba_11_nf; +extern cpuop_func op_31ba_11_ff; +extern cpuop_func op_31bb_11_nf; +extern cpuop_func op_31bb_11_ff; +extern cpuop_func op_31bc_11_nf; +extern cpuop_func op_31bc_11_ff; +extern cpuop_func op_31c0_11_nf; +extern cpuop_func op_31c0_11_ff; +extern cpuop_func op_31c8_11_nf; +extern cpuop_func op_31c8_11_ff; +extern cpuop_func op_31d0_11_nf; +extern cpuop_func op_31d0_11_ff; +extern cpuop_func op_31d8_11_nf; +extern cpuop_func op_31d8_11_ff; +extern cpuop_func op_31e0_11_nf; +extern cpuop_func op_31e0_11_ff; +extern cpuop_func op_31e8_11_nf; +extern cpuop_func op_31e8_11_ff; +extern cpuop_func op_31f0_11_nf; +extern cpuop_func op_31f0_11_ff; +extern cpuop_func op_31f8_11_nf; +extern cpuop_func op_31f8_11_ff; +extern cpuop_func op_31f9_11_nf; +extern cpuop_func op_31f9_11_ff; +extern cpuop_func op_31fa_11_nf; +extern cpuop_func op_31fa_11_ff; +extern cpuop_func op_31fb_11_nf; +extern cpuop_func op_31fb_11_ff; +extern cpuop_func op_31fc_11_nf; +extern cpuop_func op_31fc_11_ff; +extern cpuop_func op_33c0_11_nf; +extern cpuop_func op_33c0_11_ff; +extern cpuop_func op_33c8_11_nf; +extern cpuop_func op_33c8_11_ff; +extern cpuop_func op_33d0_11_nf; +extern cpuop_func op_33d0_11_ff; +extern cpuop_func op_33d8_11_nf; +extern cpuop_func op_33d8_11_ff; +extern cpuop_func op_33e0_11_nf; +extern cpuop_func op_33e0_11_ff; +extern cpuop_func op_33e8_11_nf; +extern cpuop_func op_33e8_11_ff; +extern cpuop_func op_33f0_11_nf; +extern cpuop_func op_33f0_11_ff; +extern cpuop_func op_33f8_11_nf; +extern cpuop_func op_33f8_11_ff; +extern cpuop_func op_33f9_11_nf; +extern cpuop_func op_33f9_11_ff; +extern cpuop_func op_33fa_11_nf; +extern cpuop_func op_33fa_11_ff; +extern cpuop_func op_33fb_11_nf; +extern cpuop_func op_33fb_11_ff; +extern cpuop_func op_33fc_11_nf; +extern cpuop_func op_33fc_11_ff; +extern cpuop_func op_4000_11_nf; +extern cpuop_func op_4000_11_ff; +extern cpuop_func op_4010_11_nf; +extern cpuop_func op_4010_11_ff; +extern cpuop_func op_4018_11_nf; +extern cpuop_func op_4018_11_ff; +extern cpuop_func op_4020_11_nf; +extern cpuop_func op_4020_11_ff; +extern cpuop_func op_4028_11_nf; +extern cpuop_func op_4028_11_ff; +extern cpuop_func op_4030_11_nf; +extern cpuop_func op_4030_11_ff; +extern cpuop_func op_4038_11_nf; +extern cpuop_func op_4038_11_ff; +extern cpuop_func op_4039_11_nf; +extern cpuop_func op_4039_11_ff; +extern cpuop_func op_4040_11_nf; +extern cpuop_func op_4040_11_ff; +extern cpuop_func op_4050_11_nf; +extern cpuop_func op_4050_11_ff; +extern cpuop_func op_4058_11_nf; +extern cpuop_func op_4058_11_ff; +extern cpuop_func op_4060_11_nf; +extern cpuop_func op_4060_11_ff; +extern cpuop_func op_4068_11_nf; +extern cpuop_func op_4068_11_ff; +extern cpuop_func op_4070_11_nf; +extern cpuop_func op_4070_11_ff; +extern cpuop_func op_4078_11_nf; +extern cpuop_func op_4078_11_ff; +extern cpuop_func op_4079_11_nf; +extern cpuop_func op_4079_11_ff; +extern cpuop_func op_4080_11_nf; +extern cpuop_func op_4080_11_ff; +extern cpuop_func op_4090_11_nf; +extern cpuop_func op_4090_11_ff; +extern cpuop_func op_4098_11_nf; +extern cpuop_func op_4098_11_ff; +extern cpuop_func op_40a0_11_nf; +extern cpuop_func op_40a0_11_ff; +extern cpuop_func op_40a8_11_nf; +extern cpuop_func op_40a8_11_ff; +extern cpuop_func op_40b0_11_nf; +extern cpuop_func op_40b0_11_ff; +extern cpuop_func op_40b8_11_nf; +extern cpuop_func op_40b8_11_ff; +extern cpuop_func op_40b9_11_nf; +extern cpuop_func op_40b9_11_ff; +extern cpuop_func op_40c0_11_nf; +extern cpuop_func op_40c0_11_ff; +extern cpuop_func op_40d0_11_nf; +extern cpuop_func op_40d0_11_ff; +extern cpuop_func op_40d8_11_nf; +extern cpuop_func op_40d8_11_ff; +extern cpuop_func op_40e0_11_nf; +extern cpuop_func op_40e0_11_ff; +extern cpuop_func op_40e8_11_nf; +extern cpuop_func op_40e8_11_ff; +extern cpuop_func op_40f0_11_nf; +extern cpuop_func op_40f0_11_ff; +extern cpuop_func op_40f8_11_nf; +extern cpuop_func op_40f8_11_ff; +extern cpuop_func op_40f9_11_nf; +extern cpuop_func op_40f9_11_ff; +extern cpuop_func op_4180_11_nf; +extern cpuop_func op_4180_11_ff; +extern cpuop_func op_4190_11_nf; +extern cpuop_func op_4190_11_ff; +extern cpuop_func op_4198_11_nf; +extern cpuop_func op_4198_11_ff; +extern cpuop_func op_41a0_11_nf; +extern cpuop_func op_41a0_11_ff; +extern cpuop_func op_41a8_11_nf; +extern cpuop_func op_41a8_11_ff; +extern cpuop_func op_41b0_11_nf; +extern cpuop_func op_41b0_11_ff; +extern cpuop_func op_41b8_11_nf; +extern cpuop_func op_41b8_11_ff; +extern cpuop_func op_41b9_11_nf; +extern cpuop_func op_41b9_11_ff; +extern cpuop_func op_41ba_11_nf; +extern cpuop_func op_41ba_11_ff; +extern cpuop_func op_41bb_11_nf; +extern cpuop_func op_41bb_11_ff; +extern cpuop_func op_41bc_11_nf; +extern cpuop_func op_41bc_11_ff; +extern cpuop_func op_41d0_11_nf; +extern cpuop_func op_41d0_11_ff; +extern cpuop_func op_41e8_11_nf; +extern cpuop_func op_41e8_11_ff; +extern cpuop_func op_41f0_11_nf; +extern cpuop_func op_41f0_11_ff; +extern cpuop_func op_41f8_11_nf; +extern cpuop_func op_41f8_11_ff; +extern cpuop_func op_41f9_11_nf; +extern cpuop_func op_41f9_11_ff; +extern cpuop_func op_41fa_11_nf; +extern cpuop_func op_41fa_11_ff; +extern cpuop_func op_41fb_11_nf; +extern cpuop_func op_41fb_11_ff; +extern cpuop_func op_4200_11_nf; +extern cpuop_func op_4200_11_ff; +extern cpuop_func op_4210_11_nf; +extern cpuop_func op_4210_11_ff; +extern cpuop_func op_4218_11_nf; +extern cpuop_func op_4218_11_ff; +extern cpuop_func op_4220_11_nf; +extern cpuop_func op_4220_11_ff; +extern cpuop_func op_4228_11_nf; +extern cpuop_func op_4228_11_ff; +extern cpuop_func op_4230_11_nf; +extern cpuop_func op_4230_11_ff; +extern cpuop_func op_4238_11_nf; +extern cpuop_func op_4238_11_ff; +extern cpuop_func op_4239_11_nf; +extern cpuop_func op_4239_11_ff; +extern cpuop_func op_4240_11_nf; +extern cpuop_func op_4240_11_ff; +extern cpuop_func op_4250_11_nf; +extern cpuop_func op_4250_11_ff; +extern cpuop_func op_4258_11_nf; +extern cpuop_func op_4258_11_ff; +extern cpuop_func op_4260_11_nf; +extern cpuop_func op_4260_11_ff; +extern cpuop_func op_4268_11_nf; +extern cpuop_func op_4268_11_ff; +extern cpuop_func op_4270_11_nf; +extern cpuop_func op_4270_11_ff; +extern cpuop_func op_4278_11_nf; +extern cpuop_func op_4278_11_ff; +extern cpuop_func op_4279_11_nf; +extern cpuop_func op_4279_11_ff; +extern cpuop_func op_4280_11_nf; +extern cpuop_func op_4280_11_ff; +extern cpuop_func op_4290_11_nf; +extern cpuop_func op_4290_11_ff; +extern cpuop_func op_4298_11_nf; +extern cpuop_func op_4298_11_ff; +extern cpuop_func op_42a0_11_nf; +extern cpuop_func op_42a0_11_ff; +extern cpuop_func op_42a8_11_nf; +extern cpuop_func op_42a8_11_ff; +extern cpuop_func op_42b0_11_nf; +extern cpuop_func op_42b0_11_ff; +extern cpuop_func op_42b8_11_nf; +extern cpuop_func op_42b8_11_ff; +extern cpuop_func op_42b9_11_nf; +extern cpuop_func op_42b9_11_ff; +extern cpuop_func op_42c0_11_nf; +extern cpuop_func op_42c0_11_ff; +extern cpuop_func op_42d0_11_nf; +extern cpuop_func op_42d0_11_ff; +extern cpuop_func op_42d8_11_nf; +extern cpuop_func op_42d8_11_ff; +extern cpuop_func op_42e0_11_nf; +extern cpuop_func op_42e0_11_ff; +extern cpuop_func op_42e8_11_nf; +extern cpuop_func op_42e8_11_ff; +extern cpuop_func op_42f0_11_nf; +extern cpuop_func op_42f0_11_ff; +extern cpuop_func op_42f8_11_nf; +extern cpuop_func op_42f8_11_ff; +extern cpuop_func op_42f9_11_nf; +extern cpuop_func op_42f9_11_ff; +extern cpuop_func op_4400_11_nf; +extern cpuop_func op_4400_11_ff; +extern cpuop_func op_4410_11_nf; +extern cpuop_func op_4410_11_ff; +extern cpuop_func op_4418_11_nf; +extern cpuop_func op_4418_11_ff; +extern cpuop_func op_4420_11_nf; +extern cpuop_func op_4420_11_ff; +extern cpuop_func op_4428_11_nf; +extern cpuop_func op_4428_11_ff; +extern cpuop_func op_4430_11_nf; +extern cpuop_func op_4430_11_ff; +extern cpuop_func op_4438_11_nf; +extern cpuop_func op_4438_11_ff; +extern cpuop_func op_4439_11_nf; +extern cpuop_func op_4439_11_ff; +extern cpuop_func op_4440_11_nf; +extern cpuop_func op_4440_11_ff; +extern cpuop_func op_4450_11_nf; +extern cpuop_func op_4450_11_ff; +extern cpuop_func op_4458_11_nf; +extern cpuop_func op_4458_11_ff; +extern cpuop_func op_4460_11_nf; +extern cpuop_func op_4460_11_ff; +extern cpuop_func op_4468_11_nf; +extern cpuop_func op_4468_11_ff; +extern cpuop_func op_4470_11_nf; +extern cpuop_func op_4470_11_ff; +extern cpuop_func op_4478_11_nf; +extern cpuop_func op_4478_11_ff; +extern cpuop_func op_4479_11_nf; +extern cpuop_func op_4479_11_ff; +extern cpuop_func op_4480_11_nf; +extern cpuop_func op_4480_11_ff; +extern cpuop_func op_4490_11_nf; +extern cpuop_func op_4490_11_ff; +extern cpuop_func op_4498_11_nf; +extern cpuop_func op_4498_11_ff; +extern cpuop_func op_44a0_11_nf; +extern cpuop_func op_44a0_11_ff; +extern cpuop_func op_44a8_11_nf; +extern cpuop_func op_44a8_11_ff; +extern cpuop_func op_44b0_11_nf; +extern cpuop_func op_44b0_11_ff; +extern cpuop_func op_44b8_11_nf; +extern cpuop_func op_44b8_11_ff; +extern cpuop_func op_44b9_11_nf; +extern cpuop_func op_44b9_11_ff; +extern cpuop_func op_44c0_11_nf; +extern cpuop_func op_44c0_11_ff; +extern cpuop_func op_44d0_11_nf; +extern cpuop_func op_44d0_11_ff; +extern cpuop_func op_44d8_11_nf; +extern cpuop_func op_44d8_11_ff; +extern cpuop_func op_44e0_11_nf; +extern cpuop_func op_44e0_11_ff; +extern cpuop_func op_44e8_11_nf; +extern cpuop_func op_44e8_11_ff; +extern cpuop_func op_44f0_11_nf; +extern cpuop_func op_44f0_11_ff; +extern cpuop_func op_44f8_11_nf; +extern cpuop_func op_44f8_11_ff; +extern cpuop_func op_44f9_11_nf; +extern cpuop_func op_44f9_11_ff; +extern cpuop_func op_44fa_11_nf; +extern cpuop_func op_44fa_11_ff; +extern cpuop_func op_44fb_11_nf; +extern cpuop_func op_44fb_11_ff; +extern cpuop_func op_44fc_11_nf; +extern cpuop_func op_44fc_11_ff; +extern cpuop_func op_4600_11_nf; +extern cpuop_func op_4600_11_ff; +extern cpuop_func op_4610_11_nf; +extern cpuop_func op_4610_11_ff; +extern cpuop_func op_4618_11_nf; +extern cpuop_func op_4618_11_ff; +extern cpuop_func op_4620_11_nf; +extern cpuop_func op_4620_11_ff; +extern cpuop_func op_4628_11_nf; +extern cpuop_func op_4628_11_ff; +extern cpuop_func op_4630_11_nf; +extern cpuop_func op_4630_11_ff; +extern cpuop_func op_4638_11_nf; +extern cpuop_func op_4638_11_ff; +extern cpuop_func op_4639_11_nf; +extern cpuop_func op_4639_11_ff; +extern cpuop_func op_4640_11_nf; +extern cpuop_func op_4640_11_ff; +extern cpuop_func op_4650_11_nf; +extern cpuop_func op_4650_11_ff; +extern cpuop_func op_4658_11_nf; +extern cpuop_func op_4658_11_ff; +extern cpuop_func op_4660_11_nf; +extern cpuop_func op_4660_11_ff; +extern cpuop_func op_4668_11_nf; +extern cpuop_func op_4668_11_ff; +extern cpuop_func op_4670_11_nf; +extern cpuop_func op_4670_11_ff; +extern cpuop_func op_4678_11_nf; +extern cpuop_func op_4678_11_ff; +extern cpuop_func op_4679_11_nf; +extern cpuop_func op_4679_11_ff; +extern cpuop_func op_4680_11_nf; +extern cpuop_func op_4680_11_ff; +extern cpuop_func op_4690_11_nf; +extern cpuop_func op_4690_11_ff; +extern cpuop_func op_4698_11_nf; +extern cpuop_func op_4698_11_ff; +extern cpuop_func op_46a0_11_nf; +extern cpuop_func op_46a0_11_ff; +extern cpuop_func op_46a8_11_nf; +extern cpuop_func op_46a8_11_ff; +extern cpuop_func op_46b0_11_nf; +extern cpuop_func op_46b0_11_ff; +extern cpuop_func op_46b8_11_nf; +extern cpuop_func op_46b8_11_ff; +extern cpuop_func op_46b9_11_nf; +extern cpuop_func op_46b9_11_ff; +extern cpuop_func op_46c0_11_nf; +extern cpuop_func op_46c0_11_ff; +extern cpuop_func op_46d0_11_nf; +extern cpuop_func op_46d0_11_ff; +extern cpuop_func op_46d8_11_nf; +extern cpuop_func op_46d8_11_ff; +extern cpuop_func op_46e0_11_nf; +extern cpuop_func op_46e0_11_ff; +extern cpuop_func op_46e8_11_nf; +extern cpuop_func op_46e8_11_ff; +extern cpuop_func op_46f0_11_nf; +extern cpuop_func op_46f0_11_ff; +extern cpuop_func op_46f8_11_nf; +extern cpuop_func op_46f8_11_ff; +extern cpuop_func op_46f9_11_nf; +extern cpuop_func op_46f9_11_ff; +extern cpuop_func op_46fa_11_nf; +extern cpuop_func op_46fa_11_ff; +extern cpuop_func op_46fb_11_nf; +extern cpuop_func op_46fb_11_ff; +extern cpuop_func op_46fc_11_nf; +extern cpuop_func op_46fc_11_ff; +extern cpuop_func op_4800_11_nf; +extern cpuop_func op_4800_11_ff; +extern cpuop_func op_4810_11_nf; +extern cpuop_func op_4810_11_ff; +extern cpuop_func op_4818_11_nf; +extern cpuop_func op_4818_11_ff; +extern cpuop_func op_4820_11_nf; +extern cpuop_func op_4820_11_ff; +extern cpuop_func op_4828_11_nf; +extern cpuop_func op_4828_11_ff; +extern cpuop_func op_4830_11_nf; +extern cpuop_func op_4830_11_ff; +extern cpuop_func op_4838_11_nf; +extern cpuop_func op_4838_11_ff; +extern cpuop_func op_4839_11_nf; +extern cpuop_func op_4839_11_ff; +extern cpuop_func op_4840_11_nf; +extern cpuop_func op_4840_11_ff; +extern cpuop_func op_4848_11_nf; +extern cpuop_func op_4848_11_ff; +extern cpuop_func op_4850_11_nf; +extern cpuop_func op_4850_11_ff; +extern cpuop_func op_4868_11_nf; +extern cpuop_func op_4868_11_ff; +extern cpuop_func op_4870_11_nf; +extern cpuop_func op_4870_11_ff; +extern cpuop_func op_4878_11_nf; +extern cpuop_func op_4878_11_ff; +extern cpuop_func op_4879_11_nf; +extern cpuop_func op_4879_11_ff; +extern cpuop_func op_487a_11_nf; +extern cpuop_func op_487a_11_ff; +extern cpuop_func op_487b_11_nf; +extern cpuop_func op_487b_11_ff; +extern cpuop_func op_4880_11_nf; +extern cpuop_func op_4880_11_ff; +extern cpuop_func op_4890_11_nf; +extern cpuop_func op_4890_11_ff; +extern cpuop_func op_48a0_11_nf; +extern cpuop_func op_48a0_11_ff; +extern cpuop_func op_48a8_11_nf; +extern cpuop_func op_48a8_11_ff; +extern cpuop_func op_48b0_11_nf; +extern cpuop_func op_48b0_11_ff; +extern cpuop_func op_48b8_11_nf; +extern cpuop_func op_48b8_11_ff; +extern cpuop_func op_48b9_11_nf; +extern cpuop_func op_48b9_11_ff; +extern cpuop_func op_48c0_11_nf; +extern cpuop_func op_48c0_11_ff; +extern cpuop_func op_48d0_11_nf; +extern cpuop_func op_48d0_11_ff; +extern cpuop_func op_48e0_11_nf; +extern cpuop_func op_48e0_11_ff; +extern cpuop_func op_48e8_11_nf; +extern cpuop_func op_48e8_11_ff; +extern cpuop_func op_48f0_11_nf; +extern cpuop_func op_48f0_11_ff; +extern cpuop_func op_48f8_11_nf; +extern cpuop_func op_48f8_11_ff; +extern cpuop_func op_48f9_11_nf; +extern cpuop_func op_48f9_11_ff; +extern cpuop_func op_4a00_11_nf; +extern cpuop_func op_4a00_11_ff; +extern cpuop_func op_4a10_11_nf; +extern cpuop_func op_4a10_11_ff; +extern cpuop_func op_4a18_11_nf; +extern cpuop_func op_4a18_11_ff; +extern cpuop_func op_4a20_11_nf; +extern cpuop_func op_4a20_11_ff; +extern cpuop_func op_4a28_11_nf; +extern cpuop_func op_4a28_11_ff; +extern cpuop_func op_4a30_11_nf; +extern cpuop_func op_4a30_11_ff; +extern cpuop_func op_4a38_11_nf; +extern cpuop_func op_4a38_11_ff; +extern cpuop_func op_4a39_11_nf; +extern cpuop_func op_4a39_11_ff; +extern cpuop_func op_4a40_11_nf; +extern cpuop_func op_4a40_11_ff; +extern cpuop_func op_4a50_11_nf; +extern cpuop_func op_4a50_11_ff; +extern cpuop_func op_4a58_11_nf; +extern cpuop_func op_4a58_11_ff; +extern cpuop_func op_4a60_11_nf; +extern cpuop_func op_4a60_11_ff; +extern cpuop_func op_4a68_11_nf; +extern cpuop_func op_4a68_11_ff; +extern cpuop_func op_4a70_11_nf; +extern cpuop_func op_4a70_11_ff; +extern cpuop_func op_4a78_11_nf; +extern cpuop_func op_4a78_11_ff; +extern cpuop_func op_4a79_11_nf; +extern cpuop_func op_4a79_11_ff; +extern cpuop_func op_4a80_11_nf; +extern cpuop_func op_4a80_11_ff; +extern cpuop_func op_4a90_11_nf; +extern cpuop_func op_4a90_11_ff; +extern cpuop_func op_4a98_11_nf; +extern cpuop_func op_4a98_11_ff; +extern cpuop_func op_4aa0_11_nf; +extern cpuop_func op_4aa0_11_ff; +extern cpuop_func op_4aa8_11_nf; +extern cpuop_func op_4aa8_11_ff; +extern cpuop_func op_4ab0_11_nf; +extern cpuop_func op_4ab0_11_ff; +extern cpuop_func op_4ab8_11_nf; +extern cpuop_func op_4ab8_11_ff; +extern cpuop_func op_4ab9_11_nf; +extern cpuop_func op_4ab9_11_ff; +extern cpuop_func op_4ac0_11_nf; +extern cpuop_func op_4ac0_11_ff; +extern cpuop_func op_4ad0_11_nf; +extern cpuop_func op_4ad0_11_ff; +extern cpuop_func op_4ad8_11_nf; +extern cpuop_func op_4ad8_11_ff; +extern cpuop_func op_4ae0_11_nf; +extern cpuop_func op_4ae0_11_ff; +extern cpuop_func op_4ae8_11_nf; +extern cpuop_func op_4ae8_11_ff; +extern cpuop_func op_4af0_11_nf; +extern cpuop_func op_4af0_11_ff; +extern cpuop_func op_4af8_11_nf; +extern cpuop_func op_4af8_11_ff; +extern cpuop_func op_4af9_11_nf; +extern cpuop_func op_4af9_11_ff; +extern cpuop_func op_4c90_11_nf; +extern cpuop_func op_4c90_11_ff; +extern cpuop_func op_4c98_11_nf; +extern cpuop_func op_4c98_11_ff; +extern cpuop_func op_4ca8_11_nf; +extern cpuop_func op_4ca8_11_ff; +extern cpuop_func op_4cb0_11_nf; +extern cpuop_func op_4cb0_11_ff; +extern cpuop_func op_4cb8_11_nf; +extern cpuop_func op_4cb8_11_ff; +extern cpuop_func op_4cb9_11_nf; +extern cpuop_func op_4cb9_11_ff; +extern cpuop_func op_4cba_11_nf; +extern cpuop_func op_4cba_11_ff; +extern cpuop_func op_4cbb_11_nf; +extern cpuop_func op_4cbb_11_ff; +extern cpuop_func op_4cd0_11_nf; +extern cpuop_func op_4cd0_11_ff; +extern cpuop_func op_4cd8_11_nf; +extern cpuop_func op_4cd8_11_ff; +extern cpuop_func op_4ce8_11_nf; +extern cpuop_func op_4ce8_11_ff; +extern cpuop_func op_4cf0_11_nf; +extern cpuop_func op_4cf0_11_ff; +extern cpuop_func op_4cf8_11_nf; +extern cpuop_func op_4cf8_11_ff; +extern cpuop_func op_4cf9_11_nf; +extern cpuop_func op_4cf9_11_ff; +extern cpuop_func op_4cfa_11_nf; +extern cpuop_func op_4cfa_11_ff; +extern cpuop_func op_4cfb_11_nf; +extern cpuop_func op_4cfb_11_ff; +extern cpuop_func op_4e40_11_nf; +extern cpuop_func op_4e40_11_ff; +extern cpuop_func op_4e50_11_nf; +extern cpuop_func op_4e50_11_ff; +extern cpuop_func op_4e58_11_nf; +extern cpuop_func op_4e58_11_ff; +extern cpuop_func op_4e60_11_nf; +extern cpuop_func op_4e60_11_ff; +extern cpuop_func op_4e68_11_nf; +extern cpuop_func op_4e68_11_ff; +extern cpuop_func op_4e70_11_nf; +extern cpuop_func op_4e70_11_ff; +extern cpuop_func op_4e71_11_nf; +extern cpuop_func op_4e71_11_ff; +extern cpuop_func op_4e72_11_nf; +extern cpuop_func op_4e72_11_ff; +extern cpuop_func op_4e73_11_nf; +extern cpuop_func op_4e73_11_ff; +extern cpuop_func op_4e74_11_nf; +extern cpuop_func op_4e74_11_ff; +extern cpuop_func op_4e75_11_nf; +extern cpuop_func op_4e75_11_ff; +extern cpuop_func op_4e76_11_nf; +extern cpuop_func op_4e76_11_ff; +extern cpuop_func op_4e77_11_nf; +extern cpuop_func op_4e77_11_ff; +extern cpuop_func op_4e7a_11_nf; +extern cpuop_func op_4e7a_11_ff; +extern cpuop_func op_4e7b_11_nf; +extern cpuop_func op_4e7b_11_ff; +extern cpuop_func op_4e90_11_nf; +extern cpuop_func op_4e90_11_ff; +extern cpuop_func op_4ea8_11_nf; +extern cpuop_func op_4ea8_11_ff; +extern cpuop_func op_4eb0_11_nf; +extern cpuop_func op_4eb0_11_ff; +extern cpuop_func op_4eb8_11_nf; +extern cpuop_func op_4eb8_11_ff; +extern cpuop_func op_4eb9_11_nf; +extern cpuop_func op_4eb9_11_ff; +extern cpuop_func op_4eba_11_nf; +extern cpuop_func op_4eba_11_ff; +extern cpuop_func op_4ebb_11_nf; +extern cpuop_func op_4ebb_11_ff; +extern cpuop_func op_4ed0_11_nf; +extern cpuop_func op_4ed0_11_ff; +extern cpuop_func op_4ee8_11_nf; +extern cpuop_func op_4ee8_11_ff; +extern cpuop_func op_4ef0_11_nf; +extern cpuop_func op_4ef0_11_ff; +extern cpuop_func op_4ef8_11_nf; +extern cpuop_func op_4ef8_11_ff; +extern cpuop_func op_4ef9_11_nf; +extern cpuop_func op_4ef9_11_ff; +extern cpuop_func op_4efa_11_nf; +extern cpuop_func op_4efa_11_ff; +extern cpuop_func op_4efb_11_nf; +extern cpuop_func op_4efb_11_ff; +extern cpuop_func op_5000_11_nf; +extern cpuop_func op_5000_11_ff; +extern cpuop_func op_5010_11_nf; +extern cpuop_func op_5010_11_ff; +extern cpuop_func op_5018_11_nf; +extern cpuop_func op_5018_11_ff; +extern cpuop_func op_5020_11_nf; +extern cpuop_func op_5020_11_ff; +extern cpuop_func op_5028_11_nf; +extern cpuop_func op_5028_11_ff; +extern cpuop_func op_5030_11_nf; +extern cpuop_func op_5030_11_ff; +extern cpuop_func op_5038_11_nf; +extern cpuop_func op_5038_11_ff; +extern cpuop_func op_5039_11_nf; +extern cpuop_func op_5039_11_ff; +extern cpuop_func op_5040_11_nf; +extern cpuop_func op_5040_11_ff; +extern cpuop_func op_5048_11_nf; +extern cpuop_func op_5048_11_ff; +extern cpuop_func op_5050_11_nf; +extern cpuop_func op_5050_11_ff; +extern cpuop_func op_5058_11_nf; +extern cpuop_func op_5058_11_ff; +extern cpuop_func op_5060_11_nf; +extern cpuop_func op_5060_11_ff; +extern cpuop_func op_5068_11_nf; +extern cpuop_func op_5068_11_ff; +extern cpuop_func op_5070_11_nf; +extern cpuop_func op_5070_11_ff; +extern cpuop_func op_5078_11_nf; +extern cpuop_func op_5078_11_ff; +extern cpuop_func op_5079_11_nf; +extern cpuop_func op_5079_11_ff; +extern cpuop_func op_5080_11_nf; +extern cpuop_func op_5080_11_ff; +extern cpuop_func op_5088_11_nf; +extern cpuop_func op_5088_11_ff; +extern cpuop_func op_5090_11_nf; +extern cpuop_func op_5090_11_ff; +extern cpuop_func op_5098_11_nf; +extern cpuop_func op_5098_11_ff; +extern cpuop_func op_50a0_11_nf; +extern cpuop_func op_50a0_11_ff; +extern cpuop_func op_50a8_11_nf; +extern cpuop_func op_50a8_11_ff; +extern cpuop_func op_50b0_11_nf; +extern cpuop_func op_50b0_11_ff; +extern cpuop_func op_50b8_11_nf; +extern cpuop_func op_50b8_11_ff; +extern cpuop_func op_50b9_11_nf; +extern cpuop_func op_50b9_11_ff; +extern cpuop_func op_50c0_11_nf; +extern cpuop_func op_50c0_11_ff; +extern cpuop_func op_50c8_11_nf; +extern cpuop_func op_50c8_11_ff; +extern cpuop_func op_50d0_11_nf; +extern cpuop_func op_50d0_11_ff; +extern cpuop_func op_50d8_11_nf; +extern cpuop_func op_50d8_11_ff; +extern cpuop_func op_50e0_11_nf; +extern cpuop_func op_50e0_11_ff; +extern cpuop_func op_50e8_11_nf; +extern cpuop_func op_50e8_11_ff; +extern cpuop_func op_50f0_11_nf; +extern cpuop_func op_50f0_11_ff; +extern cpuop_func op_50f8_11_nf; +extern cpuop_func op_50f8_11_ff; +extern cpuop_func op_50f9_11_nf; +extern cpuop_func op_50f9_11_ff; +extern cpuop_func op_5100_11_nf; +extern cpuop_func op_5100_11_ff; +extern cpuop_func op_5110_11_nf; +extern cpuop_func op_5110_11_ff; +extern cpuop_func op_5118_11_nf; +extern cpuop_func op_5118_11_ff; +extern cpuop_func op_5120_11_nf; +extern cpuop_func op_5120_11_ff; +extern cpuop_func op_5128_11_nf; +extern cpuop_func op_5128_11_ff; +extern cpuop_func op_5130_11_nf; +extern cpuop_func op_5130_11_ff; +extern cpuop_func op_5138_11_nf; +extern cpuop_func op_5138_11_ff; +extern cpuop_func op_5139_11_nf; +extern cpuop_func op_5139_11_ff; +extern cpuop_func op_5140_11_nf; +extern cpuop_func op_5140_11_ff; +extern cpuop_func op_5148_11_nf; +extern cpuop_func op_5148_11_ff; +extern cpuop_func op_5150_11_nf; +extern cpuop_func op_5150_11_ff; +extern cpuop_func op_5158_11_nf; +extern cpuop_func op_5158_11_ff; +extern cpuop_func op_5160_11_nf; +extern cpuop_func op_5160_11_ff; +extern cpuop_func op_5168_11_nf; +extern cpuop_func op_5168_11_ff; +extern cpuop_func op_5170_11_nf; +extern cpuop_func op_5170_11_ff; +extern cpuop_func op_5178_11_nf; +extern cpuop_func op_5178_11_ff; +extern cpuop_func op_5179_11_nf; +extern cpuop_func op_5179_11_ff; +extern cpuop_func op_5180_11_nf; +extern cpuop_func op_5180_11_ff; +extern cpuop_func op_5188_11_nf; +extern cpuop_func op_5188_11_ff; +extern cpuop_func op_5190_11_nf; +extern cpuop_func op_5190_11_ff; +extern cpuop_func op_5198_11_nf; +extern cpuop_func op_5198_11_ff; +extern cpuop_func op_51a0_11_nf; +extern cpuop_func op_51a0_11_ff; +extern cpuop_func op_51a8_11_nf; +extern cpuop_func op_51a8_11_ff; +extern cpuop_func op_51b0_11_nf; +extern cpuop_func op_51b0_11_ff; +extern cpuop_func op_51b8_11_nf; +extern cpuop_func op_51b8_11_ff; +extern cpuop_func op_51b9_11_nf; +extern cpuop_func op_51b9_11_ff; +extern cpuop_func op_51c0_11_nf; +extern cpuop_func op_51c0_11_ff; +extern cpuop_func op_51c8_11_nf; +extern cpuop_func op_51c8_11_ff; +extern cpuop_func op_51d0_11_nf; +extern cpuop_func op_51d0_11_ff; +extern cpuop_func op_51d8_11_nf; +extern cpuop_func op_51d8_11_ff; +extern cpuop_func op_51e0_11_nf; +extern cpuop_func op_51e0_11_ff; +extern cpuop_func op_51e8_11_nf; +extern cpuop_func op_51e8_11_ff; +extern cpuop_func op_51f0_11_nf; +extern cpuop_func op_51f0_11_ff; +extern cpuop_func op_51f8_11_nf; +extern cpuop_func op_51f8_11_ff; +extern cpuop_func op_51f9_11_nf; +extern cpuop_func op_51f9_11_ff; +extern cpuop_func op_52c0_11_nf; +extern cpuop_func op_52c0_11_ff; +extern cpuop_func op_52c8_11_nf; +extern cpuop_func op_52c8_11_ff; +extern cpuop_func op_52d0_11_nf; +extern cpuop_func op_52d0_11_ff; +extern cpuop_func op_52d8_11_nf; +extern cpuop_func op_52d8_11_ff; +extern cpuop_func op_52e0_11_nf; +extern cpuop_func op_52e0_11_ff; +extern cpuop_func op_52e8_11_nf; +extern cpuop_func op_52e8_11_ff; +extern cpuop_func op_52f0_11_nf; +extern cpuop_func op_52f0_11_ff; +extern cpuop_func op_52f8_11_nf; +extern cpuop_func op_52f8_11_ff; +extern cpuop_func op_52f9_11_nf; +extern cpuop_func op_52f9_11_ff; +extern cpuop_func op_53c0_11_nf; +extern cpuop_func op_53c0_11_ff; +extern cpuop_func op_53c8_11_nf; +extern cpuop_func op_53c8_11_ff; +extern cpuop_func op_53d0_11_nf; +extern cpuop_func op_53d0_11_ff; +extern cpuop_func op_53d8_11_nf; +extern cpuop_func op_53d8_11_ff; +extern cpuop_func op_53e0_11_nf; +extern cpuop_func op_53e0_11_ff; +extern cpuop_func op_53e8_11_nf; +extern cpuop_func op_53e8_11_ff; +extern cpuop_func op_53f0_11_nf; +extern cpuop_func op_53f0_11_ff; +extern cpuop_func op_53f8_11_nf; +extern cpuop_func op_53f8_11_ff; +extern cpuop_func op_53f9_11_nf; +extern cpuop_func op_53f9_11_ff; +extern cpuop_func op_54c0_11_nf; +extern cpuop_func op_54c0_11_ff; +extern cpuop_func op_54c8_11_nf; +extern cpuop_func op_54c8_11_ff; +extern cpuop_func op_54d0_11_nf; +extern cpuop_func op_54d0_11_ff; +extern cpuop_func op_54d8_11_nf; +extern cpuop_func op_54d8_11_ff; +extern cpuop_func op_54e0_11_nf; +extern cpuop_func op_54e0_11_ff; +extern cpuop_func op_54e8_11_nf; +extern cpuop_func op_54e8_11_ff; +extern cpuop_func op_54f0_11_nf; +extern cpuop_func op_54f0_11_ff; +extern cpuop_func op_54f8_11_nf; +extern cpuop_func op_54f8_11_ff; +extern cpuop_func op_54f9_11_nf; +extern cpuop_func op_54f9_11_ff; +extern cpuop_func op_55c0_11_nf; +extern cpuop_func op_55c0_11_ff; +extern cpuop_func op_55c8_11_nf; +extern cpuop_func op_55c8_11_ff; +extern cpuop_func op_55d0_11_nf; +extern cpuop_func op_55d0_11_ff; +extern cpuop_func op_55d8_11_nf; +extern cpuop_func op_55d8_11_ff; +extern cpuop_func op_55e0_11_nf; +extern cpuop_func op_55e0_11_ff; +extern cpuop_func op_55e8_11_nf; +extern cpuop_func op_55e8_11_ff; +extern cpuop_func op_55f0_11_nf; +extern cpuop_func op_55f0_11_ff; +extern cpuop_func op_55f8_11_nf; +extern cpuop_func op_55f8_11_ff; +extern cpuop_func op_55f9_11_nf; +extern cpuop_func op_55f9_11_ff; +extern cpuop_func op_56c0_11_nf; +extern cpuop_func op_56c0_11_ff; +extern cpuop_func op_56c8_11_nf; +extern cpuop_func op_56c8_11_ff; +extern cpuop_func op_56d0_11_nf; +extern cpuop_func op_56d0_11_ff; +extern cpuop_func op_56d8_11_nf; +extern cpuop_func op_56d8_11_ff; +extern cpuop_func op_56e0_11_nf; +extern cpuop_func op_56e0_11_ff; +extern cpuop_func op_56e8_11_nf; +extern cpuop_func op_56e8_11_ff; +extern cpuop_func op_56f0_11_nf; +extern cpuop_func op_56f0_11_ff; +extern cpuop_func op_56f8_11_nf; +extern cpuop_func op_56f8_11_ff; +extern cpuop_func op_56f9_11_nf; +extern cpuop_func op_56f9_11_ff; +extern cpuop_func op_57c0_11_nf; +extern cpuop_func op_57c0_11_ff; +extern cpuop_func op_57c8_11_nf; +extern cpuop_func op_57c8_11_ff; +extern cpuop_func op_57d0_11_nf; +extern cpuop_func op_57d0_11_ff; +extern cpuop_func op_57d8_11_nf; +extern cpuop_func op_57d8_11_ff; +extern cpuop_func op_57e0_11_nf; +extern cpuop_func op_57e0_11_ff; +extern cpuop_func op_57e8_11_nf; +extern cpuop_func op_57e8_11_ff; +extern cpuop_func op_57f0_11_nf; +extern cpuop_func op_57f0_11_ff; +extern cpuop_func op_57f8_11_nf; +extern cpuop_func op_57f8_11_ff; +extern cpuop_func op_57f9_11_nf; +extern cpuop_func op_57f9_11_ff; +extern cpuop_func op_58c0_11_nf; +extern cpuop_func op_58c0_11_ff; +extern cpuop_func op_58c8_11_nf; +extern cpuop_func op_58c8_11_ff; +extern cpuop_func op_58d0_11_nf; +extern cpuop_func op_58d0_11_ff; +extern cpuop_func op_58d8_11_nf; +extern cpuop_func op_58d8_11_ff; +extern cpuop_func op_58e0_11_nf; +extern cpuop_func op_58e0_11_ff; +extern cpuop_func op_58e8_11_nf; +extern cpuop_func op_58e8_11_ff; +extern cpuop_func op_58f0_11_nf; +extern cpuop_func op_58f0_11_ff; +extern cpuop_func op_58f8_11_nf; +extern cpuop_func op_58f8_11_ff; +extern cpuop_func op_58f9_11_nf; +extern cpuop_func op_58f9_11_ff; +extern cpuop_func op_59c0_11_nf; +extern cpuop_func op_59c0_11_ff; +extern cpuop_func op_59c8_11_nf; +extern cpuop_func op_59c8_11_ff; +extern cpuop_func op_59d0_11_nf; +extern cpuop_func op_59d0_11_ff; +extern cpuop_func op_59d8_11_nf; +extern cpuop_func op_59d8_11_ff; +extern cpuop_func op_59e0_11_nf; +extern cpuop_func op_59e0_11_ff; +extern cpuop_func op_59e8_11_nf; +extern cpuop_func op_59e8_11_ff; +extern cpuop_func op_59f0_11_nf; +extern cpuop_func op_59f0_11_ff; +extern cpuop_func op_59f8_11_nf; +extern cpuop_func op_59f8_11_ff; +extern cpuop_func op_59f9_11_nf; +extern cpuop_func op_59f9_11_ff; +extern cpuop_func op_5ac0_11_nf; +extern cpuop_func op_5ac0_11_ff; +extern cpuop_func op_5ac8_11_nf; +extern cpuop_func op_5ac8_11_ff; +extern cpuop_func op_5ad0_11_nf; +extern cpuop_func op_5ad0_11_ff; +extern cpuop_func op_5ad8_11_nf; +extern cpuop_func op_5ad8_11_ff; +extern cpuop_func op_5ae0_11_nf; +extern cpuop_func op_5ae0_11_ff; +extern cpuop_func op_5ae8_11_nf; +extern cpuop_func op_5ae8_11_ff; +extern cpuop_func op_5af0_11_nf; +extern cpuop_func op_5af0_11_ff; +extern cpuop_func op_5af8_11_nf; +extern cpuop_func op_5af8_11_ff; +extern cpuop_func op_5af9_11_nf; +extern cpuop_func op_5af9_11_ff; +extern cpuop_func op_5bc0_11_nf; +extern cpuop_func op_5bc0_11_ff; +extern cpuop_func op_5bc8_11_nf; +extern cpuop_func op_5bc8_11_ff; +extern cpuop_func op_5bd0_11_nf; +extern cpuop_func op_5bd0_11_ff; +extern cpuop_func op_5bd8_11_nf; +extern cpuop_func op_5bd8_11_ff; +extern cpuop_func op_5be0_11_nf; +extern cpuop_func op_5be0_11_ff; +extern cpuop_func op_5be8_11_nf; +extern cpuop_func op_5be8_11_ff; +extern cpuop_func op_5bf0_11_nf; +extern cpuop_func op_5bf0_11_ff; +extern cpuop_func op_5bf8_11_nf; +extern cpuop_func op_5bf8_11_ff; +extern cpuop_func op_5bf9_11_nf; +extern cpuop_func op_5bf9_11_ff; +extern cpuop_func op_5cc0_11_nf; +extern cpuop_func op_5cc0_11_ff; +extern cpuop_func op_5cc8_11_nf; +extern cpuop_func op_5cc8_11_ff; +extern cpuop_func op_5cd0_11_nf; +extern cpuop_func op_5cd0_11_ff; +extern cpuop_func op_5cd8_11_nf; +extern cpuop_func op_5cd8_11_ff; +extern cpuop_func op_5ce0_11_nf; +extern cpuop_func op_5ce0_11_ff; +extern cpuop_func op_5ce8_11_nf; +extern cpuop_func op_5ce8_11_ff; +extern cpuop_func op_5cf0_11_nf; +extern cpuop_func op_5cf0_11_ff; +extern cpuop_func op_5cf8_11_nf; +extern cpuop_func op_5cf8_11_ff; +extern cpuop_func op_5cf9_11_nf; +extern cpuop_func op_5cf9_11_ff; +extern cpuop_func op_5dc0_11_nf; +extern cpuop_func op_5dc0_11_ff; +extern cpuop_func op_5dc8_11_nf; +extern cpuop_func op_5dc8_11_ff; +extern cpuop_func op_5dd0_11_nf; +extern cpuop_func op_5dd0_11_ff; +extern cpuop_func op_5dd8_11_nf; +extern cpuop_func op_5dd8_11_ff; +extern cpuop_func op_5de0_11_nf; +extern cpuop_func op_5de0_11_ff; +extern cpuop_func op_5de8_11_nf; +extern cpuop_func op_5de8_11_ff; +extern cpuop_func op_5df0_11_nf; +extern cpuop_func op_5df0_11_ff; +extern cpuop_func op_5df8_11_nf; +extern cpuop_func op_5df8_11_ff; +extern cpuop_func op_5df9_11_nf; +extern cpuop_func op_5df9_11_ff; +extern cpuop_func op_5ec0_11_nf; +extern cpuop_func op_5ec0_11_ff; +extern cpuop_func op_5ec8_11_nf; +extern cpuop_func op_5ec8_11_ff; +extern cpuop_func op_5ed0_11_nf; +extern cpuop_func op_5ed0_11_ff; +extern cpuop_func op_5ed8_11_nf; +extern cpuop_func op_5ed8_11_ff; +extern cpuop_func op_5ee0_11_nf; +extern cpuop_func op_5ee0_11_ff; +extern cpuop_func op_5ee8_11_nf; +extern cpuop_func op_5ee8_11_ff; +extern cpuop_func op_5ef0_11_nf; +extern cpuop_func op_5ef0_11_ff; +extern cpuop_func op_5ef8_11_nf; +extern cpuop_func op_5ef8_11_ff; +extern cpuop_func op_5ef9_11_nf; +extern cpuop_func op_5ef9_11_ff; +extern cpuop_func op_5fc0_11_nf; +extern cpuop_func op_5fc0_11_ff; +extern cpuop_func op_5fc8_11_nf; +extern cpuop_func op_5fc8_11_ff; +extern cpuop_func op_5fd0_11_nf; +extern cpuop_func op_5fd0_11_ff; +extern cpuop_func op_5fd8_11_nf; +extern cpuop_func op_5fd8_11_ff; +extern cpuop_func op_5fe0_11_nf; +extern cpuop_func op_5fe0_11_ff; +extern cpuop_func op_5fe8_11_nf; +extern cpuop_func op_5fe8_11_ff; +extern cpuop_func op_5ff0_11_nf; +extern cpuop_func op_5ff0_11_ff; +extern cpuop_func op_5ff8_11_nf; +extern cpuop_func op_5ff8_11_ff; +extern cpuop_func op_5ff9_11_nf; +extern cpuop_func op_5ff9_11_ff; +extern cpuop_func op_6000_11_nf; +extern cpuop_func op_6000_11_ff; +extern cpuop_func op_6001_11_nf; +extern cpuop_func op_6001_11_ff; +extern cpuop_func op_60ff_11_nf; +extern cpuop_func op_60ff_11_ff; +extern cpuop_func op_6100_11_nf; +extern cpuop_func op_6100_11_ff; +extern cpuop_func op_6101_11_nf; +extern cpuop_func op_6101_11_ff; +extern cpuop_func op_61ff_11_nf; +extern cpuop_func op_61ff_11_ff; +extern cpuop_func op_6200_11_nf; +extern cpuop_func op_6200_11_ff; +extern cpuop_func op_6201_11_nf; +extern cpuop_func op_6201_11_ff; +extern cpuop_func op_62ff_11_nf; +extern cpuop_func op_62ff_11_ff; +extern cpuop_func op_6300_11_nf; +extern cpuop_func op_6300_11_ff; +extern cpuop_func op_6301_11_nf; +extern cpuop_func op_6301_11_ff; +extern cpuop_func op_63ff_11_nf; +extern cpuop_func op_63ff_11_ff; +extern cpuop_func op_6400_11_nf; +extern cpuop_func op_6400_11_ff; +extern cpuop_func op_6401_11_nf; +extern cpuop_func op_6401_11_ff; +extern cpuop_func op_64ff_11_nf; +extern cpuop_func op_64ff_11_ff; +extern cpuop_func op_6500_11_nf; +extern cpuop_func op_6500_11_ff; +extern cpuop_func op_6501_11_nf; +extern cpuop_func op_6501_11_ff; +extern cpuop_func op_65ff_11_nf; +extern cpuop_func op_65ff_11_ff; +extern cpuop_func op_6600_11_nf; +extern cpuop_func op_6600_11_ff; +extern cpuop_func op_6601_11_nf; +extern cpuop_func op_6601_11_ff; +extern cpuop_func op_66ff_11_nf; +extern cpuop_func op_66ff_11_ff; +extern cpuop_func op_6700_11_nf; +extern cpuop_func op_6700_11_ff; +extern cpuop_func op_6701_11_nf; +extern cpuop_func op_6701_11_ff; +extern cpuop_func op_67ff_11_nf; +extern cpuop_func op_67ff_11_ff; +extern cpuop_func op_6800_11_nf; +extern cpuop_func op_6800_11_ff; +extern cpuop_func op_6801_11_nf; +extern cpuop_func op_6801_11_ff; +extern cpuop_func op_68ff_11_nf; +extern cpuop_func op_68ff_11_ff; +extern cpuop_func op_6900_11_nf; +extern cpuop_func op_6900_11_ff; +extern cpuop_func op_6901_11_nf; +extern cpuop_func op_6901_11_ff; +extern cpuop_func op_69ff_11_nf; +extern cpuop_func op_69ff_11_ff; +extern cpuop_func op_6a00_11_nf; +extern cpuop_func op_6a00_11_ff; +extern cpuop_func op_6a01_11_nf; +extern cpuop_func op_6a01_11_ff; +extern cpuop_func op_6aff_11_nf; +extern cpuop_func op_6aff_11_ff; +extern cpuop_func op_6b00_11_nf; +extern cpuop_func op_6b00_11_ff; +extern cpuop_func op_6b01_11_nf; +extern cpuop_func op_6b01_11_ff; +extern cpuop_func op_6bff_11_nf; +extern cpuop_func op_6bff_11_ff; +extern cpuop_func op_6c00_11_nf; +extern cpuop_func op_6c00_11_ff; +extern cpuop_func op_6c01_11_nf; +extern cpuop_func op_6c01_11_ff; +extern cpuop_func op_6cff_11_nf; +extern cpuop_func op_6cff_11_ff; +extern cpuop_func op_6d00_11_nf; +extern cpuop_func op_6d00_11_ff; +extern cpuop_func op_6d01_11_nf; +extern cpuop_func op_6d01_11_ff; +extern cpuop_func op_6dff_11_nf; +extern cpuop_func op_6dff_11_ff; +extern cpuop_func op_6e00_11_nf; +extern cpuop_func op_6e00_11_ff; +extern cpuop_func op_6e01_11_nf; +extern cpuop_func op_6e01_11_ff; +extern cpuop_func op_6eff_11_nf; +extern cpuop_func op_6eff_11_ff; +extern cpuop_func op_6f00_11_nf; +extern cpuop_func op_6f00_11_ff; +extern cpuop_func op_6f01_11_nf; +extern cpuop_func op_6f01_11_ff; +extern cpuop_func op_6fff_11_nf; +extern cpuop_func op_6fff_11_ff; +extern cpuop_func op_7000_11_nf; +extern cpuop_func op_7000_11_ff; +extern cpuop_func op_8000_11_nf; +extern cpuop_func op_8000_11_ff; +extern cpuop_func op_8010_11_nf; +extern cpuop_func op_8010_11_ff; +extern cpuop_func op_8018_11_nf; +extern cpuop_func op_8018_11_ff; +extern cpuop_func op_8020_11_nf; +extern cpuop_func op_8020_11_ff; +extern cpuop_func op_8028_11_nf; +extern cpuop_func op_8028_11_ff; +extern cpuop_func op_8030_11_nf; +extern cpuop_func op_8030_11_ff; +extern cpuop_func op_8038_11_nf; +extern cpuop_func op_8038_11_ff; +extern cpuop_func op_8039_11_nf; +extern cpuop_func op_8039_11_ff; +extern cpuop_func op_803a_11_nf; +extern cpuop_func op_803a_11_ff; +extern cpuop_func op_803b_11_nf; +extern cpuop_func op_803b_11_ff; +extern cpuop_func op_803c_11_nf; +extern cpuop_func op_803c_11_ff; +extern cpuop_func op_8040_11_nf; +extern cpuop_func op_8040_11_ff; +extern cpuop_func op_8050_11_nf; +extern cpuop_func op_8050_11_ff; +extern cpuop_func op_8058_11_nf; +extern cpuop_func op_8058_11_ff; +extern cpuop_func op_8060_11_nf; +extern cpuop_func op_8060_11_ff; +extern cpuop_func op_8068_11_nf; +extern cpuop_func op_8068_11_ff; +extern cpuop_func op_8070_11_nf; +extern cpuop_func op_8070_11_ff; +extern cpuop_func op_8078_11_nf; +extern cpuop_func op_8078_11_ff; +extern cpuop_func op_8079_11_nf; +extern cpuop_func op_8079_11_ff; +extern cpuop_func op_807a_11_nf; +extern cpuop_func op_807a_11_ff; +extern cpuop_func op_807b_11_nf; +extern cpuop_func op_807b_11_ff; +extern cpuop_func op_807c_11_nf; +extern cpuop_func op_807c_11_ff; +extern cpuop_func op_8080_11_nf; +extern cpuop_func op_8080_11_ff; +extern cpuop_func op_8090_11_nf; +extern cpuop_func op_8090_11_ff; +extern cpuop_func op_8098_11_nf; +extern cpuop_func op_8098_11_ff; +extern cpuop_func op_80a0_11_nf; +extern cpuop_func op_80a0_11_ff; +extern cpuop_func op_80a8_11_nf; +extern cpuop_func op_80a8_11_ff; +extern cpuop_func op_80b0_11_nf; +extern cpuop_func op_80b0_11_ff; +extern cpuop_func op_80b8_11_nf; +extern cpuop_func op_80b8_11_ff; +extern cpuop_func op_80b9_11_nf; +extern cpuop_func op_80b9_11_ff; +extern cpuop_func op_80ba_11_nf; +extern cpuop_func op_80ba_11_ff; +extern cpuop_func op_80bb_11_nf; +extern cpuop_func op_80bb_11_ff; +extern cpuop_func op_80bc_11_nf; +extern cpuop_func op_80bc_11_ff; +extern cpuop_func op_80c0_11_nf; +extern cpuop_func op_80c0_11_ff; +extern cpuop_func op_80d0_11_nf; +extern cpuop_func op_80d0_11_ff; +extern cpuop_func op_80d8_11_nf; +extern cpuop_func op_80d8_11_ff; +extern cpuop_func op_80e0_11_nf; +extern cpuop_func op_80e0_11_ff; +extern cpuop_func op_80e8_11_nf; +extern cpuop_func op_80e8_11_ff; +extern cpuop_func op_80f0_11_nf; +extern cpuop_func op_80f0_11_ff; +extern cpuop_func op_80f8_11_nf; +extern cpuop_func op_80f8_11_ff; +extern cpuop_func op_80f9_11_nf; +extern cpuop_func op_80f9_11_ff; +extern cpuop_func op_80fa_11_nf; +extern cpuop_func op_80fa_11_ff; +extern cpuop_func op_80fb_11_nf; +extern cpuop_func op_80fb_11_ff; +extern cpuop_func op_80fc_11_nf; +extern cpuop_func op_80fc_11_ff; +extern cpuop_func op_8100_11_nf; +extern cpuop_func op_8100_11_ff; +extern cpuop_func op_8108_11_nf; +extern cpuop_func op_8108_11_ff; +extern cpuop_func op_8110_11_nf; +extern cpuop_func op_8110_11_ff; +extern cpuop_func op_8118_11_nf; +extern cpuop_func op_8118_11_ff; +extern cpuop_func op_8120_11_nf; +extern cpuop_func op_8120_11_ff; +extern cpuop_func op_8128_11_nf; +extern cpuop_func op_8128_11_ff; +extern cpuop_func op_8130_11_nf; +extern cpuop_func op_8130_11_ff; +extern cpuop_func op_8138_11_nf; +extern cpuop_func op_8138_11_ff; +extern cpuop_func op_8139_11_nf; +extern cpuop_func op_8139_11_ff; +extern cpuop_func op_8150_11_nf; +extern cpuop_func op_8150_11_ff; +extern cpuop_func op_8158_11_nf; +extern cpuop_func op_8158_11_ff; +extern cpuop_func op_8160_11_nf; +extern cpuop_func op_8160_11_ff; +extern cpuop_func op_8168_11_nf; +extern cpuop_func op_8168_11_ff; +extern cpuop_func op_8170_11_nf; +extern cpuop_func op_8170_11_ff; +extern cpuop_func op_8178_11_nf; +extern cpuop_func op_8178_11_ff; +extern cpuop_func op_8179_11_nf; +extern cpuop_func op_8179_11_ff; +extern cpuop_func op_8190_11_nf; +extern cpuop_func op_8190_11_ff; +extern cpuop_func op_8198_11_nf; +extern cpuop_func op_8198_11_ff; +extern cpuop_func op_81a0_11_nf; +extern cpuop_func op_81a0_11_ff; +extern cpuop_func op_81a8_11_nf; +extern cpuop_func op_81a8_11_ff; +extern cpuop_func op_81b0_11_nf; +extern cpuop_func op_81b0_11_ff; +extern cpuop_func op_81b8_11_nf; +extern cpuop_func op_81b8_11_ff; +extern cpuop_func op_81b9_11_nf; +extern cpuop_func op_81b9_11_ff; +extern cpuop_func op_81c0_11_nf; +extern cpuop_func op_81c0_11_ff; +extern cpuop_func op_81d0_11_nf; +extern cpuop_func op_81d0_11_ff; +extern cpuop_func op_81d8_11_nf; +extern cpuop_func op_81d8_11_ff; +extern cpuop_func op_81e0_11_nf; +extern cpuop_func op_81e0_11_ff; +extern cpuop_func op_81e8_11_nf; +extern cpuop_func op_81e8_11_ff; +extern cpuop_func op_81f0_11_nf; +extern cpuop_func op_81f0_11_ff; +extern cpuop_func op_81f8_11_nf; +extern cpuop_func op_81f8_11_ff; +extern cpuop_func op_81f9_11_nf; +extern cpuop_func op_81f9_11_ff; +extern cpuop_func op_81fa_11_nf; +extern cpuop_func op_81fa_11_ff; +extern cpuop_func op_81fb_11_nf; +extern cpuop_func op_81fb_11_ff; +extern cpuop_func op_81fc_11_nf; +extern cpuop_func op_81fc_11_ff; +extern cpuop_func op_9000_11_nf; +extern cpuop_func op_9000_11_ff; +extern cpuop_func op_9010_11_nf; +extern cpuop_func op_9010_11_ff; +extern cpuop_func op_9018_11_nf; +extern cpuop_func op_9018_11_ff; +extern cpuop_func op_9020_11_nf; +extern cpuop_func op_9020_11_ff; +extern cpuop_func op_9028_11_nf; +extern cpuop_func op_9028_11_ff; +extern cpuop_func op_9030_11_nf; +extern cpuop_func op_9030_11_ff; +extern cpuop_func op_9038_11_nf; +extern cpuop_func op_9038_11_ff; +extern cpuop_func op_9039_11_nf; +extern cpuop_func op_9039_11_ff; +extern cpuop_func op_903a_11_nf; +extern cpuop_func op_903a_11_ff; +extern cpuop_func op_903b_11_nf; +extern cpuop_func op_903b_11_ff; +extern cpuop_func op_903c_11_nf; +extern cpuop_func op_903c_11_ff; +extern cpuop_func op_9040_11_nf; +extern cpuop_func op_9040_11_ff; +extern cpuop_func op_9048_11_nf; +extern cpuop_func op_9048_11_ff; +extern cpuop_func op_9050_11_nf; +extern cpuop_func op_9050_11_ff; +extern cpuop_func op_9058_11_nf; +extern cpuop_func op_9058_11_ff; +extern cpuop_func op_9060_11_nf; +extern cpuop_func op_9060_11_ff; +extern cpuop_func op_9068_11_nf; +extern cpuop_func op_9068_11_ff; +extern cpuop_func op_9070_11_nf; +extern cpuop_func op_9070_11_ff; +extern cpuop_func op_9078_11_nf; +extern cpuop_func op_9078_11_ff; +extern cpuop_func op_9079_11_nf; +extern cpuop_func op_9079_11_ff; +extern cpuop_func op_907a_11_nf; +extern cpuop_func op_907a_11_ff; +extern cpuop_func op_907b_11_nf; +extern cpuop_func op_907b_11_ff; +extern cpuop_func op_907c_11_nf; +extern cpuop_func op_907c_11_ff; +extern cpuop_func op_9080_11_nf; +extern cpuop_func op_9080_11_ff; +extern cpuop_func op_9088_11_nf; +extern cpuop_func op_9088_11_ff; +extern cpuop_func op_9090_11_nf; +extern cpuop_func op_9090_11_ff; +extern cpuop_func op_9098_11_nf; +extern cpuop_func op_9098_11_ff; +extern cpuop_func op_90a0_11_nf; +extern cpuop_func op_90a0_11_ff; +extern cpuop_func op_90a8_11_nf; +extern cpuop_func op_90a8_11_ff; +extern cpuop_func op_90b0_11_nf; +extern cpuop_func op_90b0_11_ff; +extern cpuop_func op_90b8_11_nf; +extern cpuop_func op_90b8_11_ff; +extern cpuop_func op_90b9_11_nf; +extern cpuop_func op_90b9_11_ff; +extern cpuop_func op_90ba_11_nf; +extern cpuop_func op_90ba_11_ff; +extern cpuop_func op_90bb_11_nf; +extern cpuop_func op_90bb_11_ff; +extern cpuop_func op_90bc_11_nf; +extern cpuop_func op_90bc_11_ff; +extern cpuop_func op_90c0_11_nf; +extern cpuop_func op_90c0_11_ff; +extern cpuop_func op_90c8_11_nf; +extern cpuop_func op_90c8_11_ff; +extern cpuop_func op_90d0_11_nf; +extern cpuop_func op_90d0_11_ff; +extern cpuop_func op_90d8_11_nf; +extern cpuop_func op_90d8_11_ff; +extern cpuop_func op_90e0_11_nf; +extern cpuop_func op_90e0_11_ff; +extern cpuop_func op_90e8_11_nf; +extern cpuop_func op_90e8_11_ff; +extern cpuop_func op_90f0_11_nf; +extern cpuop_func op_90f0_11_ff; +extern cpuop_func op_90f8_11_nf; +extern cpuop_func op_90f8_11_ff; +extern cpuop_func op_90f9_11_nf; +extern cpuop_func op_90f9_11_ff; +extern cpuop_func op_90fa_11_nf; +extern cpuop_func op_90fa_11_ff; +extern cpuop_func op_90fb_11_nf; +extern cpuop_func op_90fb_11_ff; +extern cpuop_func op_90fc_11_nf; +extern cpuop_func op_90fc_11_ff; +extern cpuop_func op_9100_11_nf; +extern cpuop_func op_9100_11_ff; +extern cpuop_func op_9108_11_nf; +extern cpuop_func op_9108_11_ff; +extern cpuop_func op_9110_11_nf; +extern cpuop_func op_9110_11_ff; +extern cpuop_func op_9118_11_nf; +extern cpuop_func op_9118_11_ff; +extern cpuop_func op_9120_11_nf; +extern cpuop_func op_9120_11_ff; +extern cpuop_func op_9128_11_nf; +extern cpuop_func op_9128_11_ff; +extern cpuop_func op_9130_11_nf; +extern cpuop_func op_9130_11_ff; +extern cpuop_func op_9138_11_nf; +extern cpuop_func op_9138_11_ff; +extern cpuop_func op_9139_11_nf; +extern cpuop_func op_9139_11_ff; +extern cpuop_func op_9140_11_nf; +extern cpuop_func op_9140_11_ff; +extern cpuop_func op_9148_11_nf; +extern cpuop_func op_9148_11_ff; +extern cpuop_func op_9150_11_nf; +extern cpuop_func op_9150_11_ff; +extern cpuop_func op_9158_11_nf; +extern cpuop_func op_9158_11_ff; +extern cpuop_func op_9160_11_nf; +extern cpuop_func op_9160_11_ff; +extern cpuop_func op_9168_11_nf; +extern cpuop_func op_9168_11_ff; +extern cpuop_func op_9170_11_nf; +extern cpuop_func op_9170_11_ff; +extern cpuop_func op_9178_11_nf; +extern cpuop_func op_9178_11_ff; +extern cpuop_func op_9179_11_nf; +extern cpuop_func op_9179_11_ff; +extern cpuop_func op_9180_11_nf; +extern cpuop_func op_9180_11_ff; +extern cpuop_func op_9188_11_nf; +extern cpuop_func op_9188_11_ff; +extern cpuop_func op_9190_11_nf; +extern cpuop_func op_9190_11_ff; +extern cpuop_func op_9198_11_nf; +extern cpuop_func op_9198_11_ff; +extern cpuop_func op_91a0_11_nf; +extern cpuop_func op_91a0_11_ff; +extern cpuop_func op_91a8_11_nf; +extern cpuop_func op_91a8_11_ff; +extern cpuop_func op_91b0_11_nf; +extern cpuop_func op_91b0_11_ff; +extern cpuop_func op_91b8_11_nf; +extern cpuop_func op_91b8_11_ff; +extern cpuop_func op_91b9_11_nf; +extern cpuop_func op_91b9_11_ff; +extern cpuop_func op_91c0_11_nf; +extern cpuop_func op_91c0_11_ff; +extern cpuop_func op_91c8_11_nf; +extern cpuop_func op_91c8_11_ff; +extern cpuop_func op_91d0_11_nf; +extern cpuop_func op_91d0_11_ff; +extern cpuop_func op_91d8_11_nf; +extern cpuop_func op_91d8_11_ff; +extern cpuop_func op_91e0_11_nf; +extern cpuop_func op_91e0_11_ff; +extern cpuop_func op_91e8_11_nf; +extern cpuop_func op_91e8_11_ff; +extern cpuop_func op_91f0_11_nf; +extern cpuop_func op_91f0_11_ff; +extern cpuop_func op_91f8_11_nf; +extern cpuop_func op_91f8_11_ff; +extern cpuop_func op_91f9_11_nf; +extern cpuop_func op_91f9_11_ff; +extern cpuop_func op_91fa_11_nf; +extern cpuop_func op_91fa_11_ff; +extern cpuop_func op_91fb_11_nf; +extern cpuop_func op_91fb_11_ff; +extern cpuop_func op_91fc_11_nf; +extern cpuop_func op_91fc_11_ff; +extern cpuop_func op_b000_11_nf; +extern cpuop_func op_b000_11_ff; +extern cpuop_func op_b010_11_nf; +extern cpuop_func op_b010_11_ff; +extern cpuop_func op_b018_11_nf; +extern cpuop_func op_b018_11_ff; +extern cpuop_func op_b020_11_nf; +extern cpuop_func op_b020_11_ff; +extern cpuop_func op_b028_11_nf; +extern cpuop_func op_b028_11_ff; +extern cpuop_func op_b030_11_nf; +extern cpuop_func op_b030_11_ff; +extern cpuop_func op_b038_11_nf; +extern cpuop_func op_b038_11_ff; +extern cpuop_func op_b039_11_nf; +extern cpuop_func op_b039_11_ff; +extern cpuop_func op_b03a_11_nf; +extern cpuop_func op_b03a_11_ff; +extern cpuop_func op_b03b_11_nf; +extern cpuop_func op_b03b_11_ff; +extern cpuop_func op_b03c_11_nf; +extern cpuop_func op_b03c_11_ff; +extern cpuop_func op_b040_11_nf; +extern cpuop_func op_b040_11_ff; +extern cpuop_func op_b048_11_nf; +extern cpuop_func op_b048_11_ff; +extern cpuop_func op_b050_11_nf; +extern cpuop_func op_b050_11_ff; +extern cpuop_func op_b058_11_nf; +extern cpuop_func op_b058_11_ff; +extern cpuop_func op_b060_11_nf; +extern cpuop_func op_b060_11_ff; +extern cpuop_func op_b068_11_nf; +extern cpuop_func op_b068_11_ff; +extern cpuop_func op_b070_11_nf; +extern cpuop_func op_b070_11_ff; +extern cpuop_func op_b078_11_nf; +extern cpuop_func op_b078_11_ff; +extern cpuop_func op_b079_11_nf; +extern cpuop_func op_b079_11_ff; +extern cpuop_func op_b07a_11_nf; +extern cpuop_func op_b07a_11_ff; +extern cpuop_func op_b07b_11_nf; +extern cpuop_func op_b07b_11_ff; +extern cpuop_func op_b07c_11_nf; +extern cpuop_func op_b07c_11_ff; +extern cpuop_func op_b080_11_nf; +extern cpuop_func op_b080_11_ff; +extern cpuop_func op_b088_11_nf; +extern cpuop_func op_b088_11_ff; +extern cpuop_func op_b090_11_nf; +extern cpuop_func op_b090_11_ff; +extern cpuop_func op_b098_11_nf; +extern cpuop_func op_b098_11_ff; +extern cpuop_func op_b0a0_11_nf; +extern cpuop_func op_b0a0_11_ff; +extern cpuop_func op_b0a8_11_nf; +extern cpuop_func op_b0a8_11_ff; +extern cpuop_func op_b0b0_11_nf; +extern cpuop_func op_b0b0_11_ff; +extern cpuop_func op_b0b8_11_nf; +extern cpuop_func op_b0b8_11_ff; +extern cpuop_func op_b0b9_11_nf; +extern cpuop_func op_b0b9_11_ff; +extern cpuop_func op_b0ba_11_nf; +extern cpuop_func op_b0ba_11_ff; +extern cpuop_func op_b0bb_11_nf; +extern cpuop_func op_b0bb_11_ff; +extern cpuop_func op_b0bc_11_nf; +extern cpuop_func op_b0bc_11_ff; +extern cpuop_func op_b0c0_11_nf; +extern cpuop_func op_b0c0_11_ff; +extern cpuop_func op_b0c8_11_nf; +extern cpuop_func op_b0c8_11_ff; +extern cpuop_func op_b0d0_11_nf; +extern cpuop_func op_b0d0_11_ff; +extern cpuop_func op_b0d8_11_nf; +extern cpuop_func op_b0d8_11_ff; +extern cpuop_func op_b0e0_11_nf; +extern cpuop_func op_b0e0_11_ff; +extern cpuop_func op_b0e8_11_nf; +extern cpuop_func op_b0e8_11_ff; +extern cpuop_func op_b0f0_11_nf; +extern cpuop_func op_b0f0_11_ff; +extern cpuop_func op_b0f8_11_nf; +extern cpuop_func op_b0f8_11_ff; +extern cpuop_func op_b0f9_11_nf; +extern cpuop_func op_b0f9_11_ff; +extern cpuop_func op_b0fa_11_nf; +extern cpuop_func op_b0fa_11_ff; +extern cpuop_func op_b0fb_11_nf; +extern cpuop_func op_b0fb_11_ff; +extern cpuop_func op_b0fc_11_nf; +extern cpuop_func op_b0fc_11_ff; +extern cpuop_func op_b100_11_nf; +extern cpuop_func op_b100_11_ff; +extern cpuop_func op_b108_11_nf; +extern cpuop_func op_b108_11_ff; +extern cpuop_func op_b110_11_nf; +extern cpuop_func op_b110_11_ff; +extern cpuop_func op_b118_11_nf; +extern cpuop_func op_b118_11_ff; +extern cpuop_func op_b120_11_nf; +extern cpuop_func op_b120_11_ff; +extern cpuop_func op_b128_11_nf; +extern cpuop_func op_b128_11_ff; +extern cpuop_func op_b130_11_nf; +extern cpuop_func op_b130_11_ff; +extern cpuop_func op_b138_11_nf; +extern cpuop_func op_b138_11_ff; +extern cpuop_func op_b139_11_nf; +extern cpuop_func op_b139_11_ff; +extern cpuop_func op_b140_11_nf; +extern cpuop_func op_b140_11_ff; +extern cpuop_func op_b148_11_nf; +extern cpuop_func op_b148_11_ff; +extern cpuop_func op_b150_11_nf; +extern cpuop_func op_b150_11_ff; +extern cpuop_func op_b158_11_nf; +extern cpuop_func op_b158_11_ff; +extern cpuop_func op_b160_11_nf; +extern cpuop_func op_b160_11_ff; +extern cpuop_func op_b168_11_nf; +extern cpuop_func op_b168_11_ff; +extern cpuop_func op_b170_11_nf; +extern cpuop_func op_b170_11_ff; +extern cpuop_func op_b178_11_nf; +extern cpuop_func op_b178_11_ff; +extern cpuop_func op_b179_11_nf; +extern cpuop_func op_b179_11_ff; +extern cpuop_func op_b180_11_nf; +extern cpuop_func op_b180_11_ff; +extern cpuop_func op_b188_11_nf; +extern cpuop_func op_b188_11_ff; +extern cpuop_func op_b190_11_nf; +extern cpuop_func op_b190_11_ff; +extern cpuop_func op_b198_11_nf; +extern cpuop_func op_b198_11_ff; +extern cpuop_func op_b1a0_11_nf; +extern cpuop_func op_b1a0_11_ff; +extern cpuop_func op_b1a8_11_nf; +extern cpuop_func op_b1a8_11_ff; +extern cpuop_func op_b1b0_11_nf; +extern cpuop_func op_b1b0_11_ff; +extern cpuop_func op_b1b8_11_nf; +extern cpuop_func op_b1b8_11_ff; +extern cpuop_func op_b1b9_11_nf; +extern cpuop_func op_b1b9_11_ff; +extern cpuop_func op_b1c0_11_nf; +extern cpuop_func op_b1c0_11_ff; +extern cpuop_func op_b1c8_11_nf; +extern cpuop_func op_b1c8_11_ff; +extern cpuop_func op_b1d0_11_nf; +extern cpuop_func op_b1d0_11_ff; +extern cpuop_func op_b1d8_11_nf; +extern cpuop_func op_b1d8_11_ff; +extern cpuop_func op_b1e0_11_nf; +extern cpuop_func op_b1e0_11_ff; +extern cpuop_func op_b1e8_11_nf; +extern cpuop_func op_b1e8_11_ff; +extern cpuop_func op_b1f0_11_nf; +extern cpuop_func op_b1f0_11_ff; +extern cpuop_func op_b1f8_11_nf; +extern cpuop_func op_b1f8_11_ff; +extern cpuop_func op_b1f9_11_nf; +extern cpuop_func op_b1f9_11_ff; +extern cpuop_func op_b1fa_11_nf; +extern cpuop_func op_b1fa_11_ff; +extern cpuop_func op_b1fb_11_nf; +extern cpuop_func op_b1fb_11_ff; +extern cpuop_func op_b1fc_11_nf; +extern cpuop_func op_b1fc_11_ff; +extern cpuop_func op_c000_11_nf; +extern cpuop_func op_c000_11_ff; +extern cpuop_func op_c010_11_nf; +extern cpuop_func op_c010_11_ff; +extern cpuop_func op_c018_11_nf; +extern cpuop_func op_c018_11_ff; +extern cpuop_func op_c020_11_nf; +extern cpuop_func op_c020_11_ff; +extern cpuop_func op_c028_11_nf; +extern cpuop_func op_c028_11_ff; +extern cpuop_func op_c030_11_nf; +extern cpuop_func op_c030_11_ff; +extern cpuop_func op_c038_11_nf; +extern cpuop_func op_c038_11_ff; +extern cpuop_func op_c039_11_nf; +extern cpuop_func op_c039_11_ff; +extern cpuop_func op_c03a_11_nf; +extern cpuop_func op_c03a_11_ff; +extern cpuop_func op_c03b_11_nf; +extern cpuop_func op_c03b_11_ff; +extern cpuop_func op_c03c_11_nf; +extern cpuop_func op_c03c_11_ff; +extern cpuop_func op_c040_11_nf; +extern cpuop_func op_c040_11_ff; +extern cpuop_func op_c050_11_nf; +extern cpuop_func op_c050_11_ff; +extern cpuop_func op_c058_11_nf; +extern cpuop_func op_c058_11_ff; +extern cpuop_func op_c060_11_nf; +extern cpuop_func op_c060_11_ff; +extern cpuop_func op_c068_11_nf; +extern cpuop_func op_c068_11_ff; +extern cpuop_func op_c070_11_nf; +extern cpuop_func op_c070_11_ff; +extern cpuop_func op_c078_11_nf; +extern cpuop_func op_c078_11_ff; +extern cpuop_func op_c079_11_nf; +extern cpuop_func op_c079_11_ff; +extern cpuop_func op_c07a_11_nf; +extern cpuop_func op_c07a_11_ff; +extern cpuop_func op_c07b_11_nf; +extern cpuop_func op_c07b_11_ff; +extern cpuop_func op_c07c_11_nf; +extern cpuop_func op_c07c_11_ff; +extern cpuop_func op_c080_11_nf; +extern cpuop_func op_c080_11_ff; +extern cpuop_func op_c090_11_nf; +extern cpuop_func op_c090_11_ff; +extern cpuop_func op_c098_11_nf; +extern cpuop_func op_c098_11_ff; +extern cpuop_func op_c0a0_11_nf; +extern cpuop_func op_c0a0_11_ff; +extern cpuop_func op_c0a8_11_nf; +extern cpuop_func op_c0a8_11_ff; +extern cpuop_func op_c0b0_11_nf; +extern cpuop_func op_c0b0_11_ff; +extern cpuop_func op_c0b8_11_nf; +extern cpuop_func op_c0b8_11_ff; +extern cpuop_func op_c0b9_11_nf; +extern cpuop_func op_c0b9_11_ff; +extern cpuop_func op_c0ba_11_nf; +extern cpuop_func op_c0ba_11_ff; +extern cpuop_func op_c0bb_11_nf; +extern cpuop_func op_c0bb_11_ff; +extern cpuop_func op_c0bc_11_nf; +extern cpuop_func op_c0bc_11_ff; +extern cpuop_func op_c0c0_11_nf; +extern cpuop_func op_c0c0_11_ff; +extern cpuop_func op_c0d0_11_nf; +extern cpuop_func op_c0d0_11_ff; +extern cpuop_func op_c0d8_11_nf; +extern cpuop_func op_c0d8_11_ff; +extern cpuop_func op_c0e0_11_nf; +extern cpuop_func op_c0e0_11_ff; +extern cpuop_func op_c0e8_11_nf; +extern cpuop_func op_c0e8_11_ff; +extern cpuop_func op_c0f0_11_nf; +extern cpuop_func op_c0f0_11_ff; +extern cpuop_func op_c0f8_11_nf; +extern cpuop_func op_c0f8_11_ff; +extern cpuop_func op_c0f9_11_nf; +extern cpuop_func op_c0f9_11_ff; +extern cpuop_func op_c0fa_11_nf; +extern cpuop_func op_c0fa_11_ff; +extern cpuop_func op_c0fb_11_nf; +extern cpuop_func op_c0fb_11_ff; +extern cpuop_func op_c0fc_11_nf; +extern cpuop_func op_c0fc_11_ff; +extern cpuop_func op_c100_11_nf; +extern cpuop_func op_c100_11_ff; +extern cpuop_func op_c108_11_nf; +extern cpuop_func op_c108_11_ff; +extern cpuop_func op_c110_11_nf; +extern cpuop_func op_c110_11_ff; +extern cpuop_func op_c118_11_nf; +extern cpuop_func op_c118_11_ff; +extern cpuop_func op_c120_11_nf; +extern cpuop_func op_c120_11_ff; +extern cpuop_func op_c128_11_nf; +extern cpuop_func op_c128_11_ff; +extern cpuop_func op_c130_11_nf; +extern cpuop_func op_c130_11_ff; +extern cpuop_func op_c138_11_nf; +extern cpuop_func op_c138_11_ff; +extern cpuop_func op_c139_11_nf; +extern cpuop_func op_c139_11_ff; +extern cpuop_func op_c140_11_nf; +extern cpuop_func op_c140_11_ff; +extern cpuop_func op_c148_11_nf; +extern cpuop_func op_c148_11_ff; +extern cpuop_func op_c150_11_nf; +extern cpuop_func op_c150_11_ff; +extern cpuop_func op_c158_11_nf; +extern cpuop_func op_c158_11_ff; +extern cpuop_func op_c160_11_nf; +extern cpuop_func op_c160_11_ff; +extern cpuop_func op_c168_11_nf; +extern cpuop_func op_c168_11_ff; +extern cpuop_func op_c170_11_nf; +extern cpuop_func op_c170_11_ff; +extern cpuop_func op_c178_11_nf; +extern cpuop_func op_c178_11_ff; +extern cpuop_func op_c179_11_nf; +extern cpuop_func op_c179_11_ff; +extern cpuop_func op_c188_11_nf; +extern cpuop_func op_c188_11_ff; +extern cpuop_func op_c190_11_nf; +extern cpuop_func op_c190_11_ff; +extern cpuop_func op_c198_11_nf; +extern cpuop_func op_c198_11_ff; +extern cpuop_func op_c1a0_11_nf; +extern cpuop_func op_c1a0_11_ff; +extern cpuop_func op_c1a8_11_nf; +extern cpuop_func op_c1a8_11_ff; +extern cpuop_func op_c1b0_11_nf; +extern cpuop_func op_c1b0_11_ff; +extern cpuop_func op_c1b8_11_nf; +extern cpuop_func op_c1b8_11_ff; +extern cpuop_func op_c1b9_11_nf; +extern cpuop_func op_c1b9_11_ff; +extern cpuop_func op_c1c0_11_nf; +extern cpuop_func op_c1c0_11_ff; +extern cpuop_func op_c1d0_11_nf; +extern cpuop_func op_c1d0_11_ff; +extern cpuop_func op_c1d8_11_nf; +extern cpuop_func op_c1d8_11_ff; +extern cpuop_func op_c1e0_11_nf; +extern cpuop_func op_c1e0_11_ff; +extern cpuop_func op_c1e8_11_nf; +extern cpuop_func op_c1e8_11_ff; +extern cpuop_func op_c1f0_11_nf; +extern cpuop_func op_c1f0_11_ff; +extern cpuop_func op_c1f8_11_nf; +extern cpuop_func op_c1f8_11_ff; +extern cpuop_func op_c1f9_11_nf; +extern cpuop_func op_c1f9_11_ff; +extern cpuop_func op_c1fa_11_nf; +extern cpuop_func op_c1fa_11_ff; +extern cpuop_func op_c1fb_11_nf; +extern cpuop_func op_c1fb_11_ff; +extern cpuop_func op_c1fc_11_nf; +extern cpuop_func op_c1fc_11_ff; +extern cpuop_func op_d000_11_nf; +extern cpuop_func op_d000_11_ff; +extern cpuop_func op_d010_11_nf; +extern cpuop_func op_d010_11_ff; +extern cpuop_func op_d018_11_nf; +extern cpuop_func op_d018_11_ff; +extern cpuop_func op_d020_11_nf; +extern cpuop_func op_d020_11_ff; +extern cpuop_func op_d028_11_nf; +extern cpuop_func op_d028_11_ff; +extern cpuop_func op_d030_11_nf; +extern cpuop_func op_d030_11_ff; +extern cpuop_func op_d038_11_nf; +extern cpuop_func op_d038_11_ff; +extern cpuop_func op_d039_11_nf; +extern cpuop_func op_d039_11_ff; +extern cpuop_func op_d03a_11_nf; +extern cpuop_func op_d03a_11_ff; +extern cpuop_func op_d03b_11_nf; +extern cpuop_func op_d03b_11_ff; +extern cpuop_func op_d03c_11_nf; +extern cpuop_func op_d03c_11_ff; +extern cpuop_func op_d040_11_nf; +extern cpuop_func op_d040_11_ff; +extern cpuop_func op_d048_11_nf; +extern cpuop_func op_d048_11_ff; +extern cpuop_func op_d050_11_nf; +extern cpuop_func op_d050_11_ff; +extern cpuop_func op_d058_11_nf; +extern cpuop_func op_d058_11_ff; +extern cpuop_func op_d060_11_nf; +extern cpuop_func op_d060_11_ff; +extern cpuop_func op_d068_11_nf; +extern cpuop_func op_d068_11_ff; +extern cpuop_func op_d070_11_nf; +extern cpuop_func op_d070_11_ff; +extern cpuop_func op_d078_11_nf; +extern cpuop_func op_d078_11_ff; +extern cpuop_func op_d079_11_nf; +extern cpuop_func op_d079_11_ff; +extern cpuop_func op_d07a_11_nf; +extern cpuop_func op_d07a_11_ff; +extern cpuop_func op_d07b_11_nf; +extern cpuop_func op_d07b_11_ff; +extern cpuop_func op_d07c_11_nf; +extern cpuop_func op_d07c_11_ff; +extern cpuop_func op_d080_11_nf; +extern cpuop_func op_d080_11_ff; +extern cpuop_func op_d088_11_nf; +extern cpuop_func op_d088_11_ff; +extern cpuop_func op_d090_11_nf; +extern cpuop_func op_d090_11_ff; +extern cpuop_func op_d098_11_nf; +extern cpuop_func op_d098_11_ff; +extern cpuop_func op_d0a0_11_nf; +extern cpuop_func op_d0a0_11_ff; +extern cpuop_func op_d0a8_11_nf; +extern cpuop_func op_d0a8_11_ff; +extern cpuop_func op_d0b0_11_nf; +extern cpuop_func op_d0b0_11_ff; +extern cpuop_func op_d0b8_11_nf; +extern cpuop_func op_d0b8_11_ff; +extern cpuop_func op_d0b9_11_nf; +extern cpuop_func op_d0b9_11_ff; +extern cpuop_func op_d0ba_11_nf; +extern cpuop_func op_d0ba_11_ff; +extern cpuop_func op_d0bb_11_nf; +extern cpuop_func op_d0bb_11_ff; +extern cpuop_func op_d0bc_11_nf; +extern cpuop_func op_d0bc_11_ff; +extern cpuop_func op_d0c0_11_nf; +extern cpuop_func op_d0c0_11_ff; +extern cpuop_func op_d0c8_11_nf; +extern cpuop_func op_d0c8_11_ff; +extern cpuop_func op_d0d0_11_nf; +extern cpuop_func op_d0d0_11_ff; +extern cpuop_func op_d0d8_11_nf; +extern cpuop_func op_d0d8_11_ff; +extern cpuop_func op_d0e0_11_nf; +extern cpuop_func op_d0e0_11_ff; +extern cpuop_func op_d0e8_11_nf; +extern cpuop_func op_d0e8_11_ff; +extern cpuop_func op_d0f0_11_nf; +extern cpuop_func op_d0f0_11_ff; +extern cpuop_func op_d0f8_11_nf; +extern cpuop_func op_d0f8_11_ff; +extern cpuop_func op_d0f9_11_nf; +extern cpuop_func op_d0f9_11_ff; +extern cpuop_func op_d0fa_11_nf; +extern cpuop_func op_d0fa_11_ff; +extern cpuop_func op_d0fb_11_nf; +extern cpuop_func op_d0fb_11_ff; +extern cpuop_func op_d0fc_11_nf; +extern cpuop_func op_d0fc_11_ff; +extern cpuop_func op_d100_11_nf; +extern cpuop_func op_d100_11_ff; +extern cpuop_func op_d108_11_nf; +extern cpuop_func op_d108_11_ff; +extern cpuop_func op_d110_11_nf; +extern cpuop_func op_d110_11_ff; +extern cpuop_func op_d118_11_nf; +extern cpuop_func op_d118_11_ff; +extern cpuop_func op_d120_11_nf; +extern cpuop_func op_d120_11_ff; +extern cpuop_func op_d128_11_nf; +extern cpuop_func op_d128_11_ff; +extern cpuop_func op_d130_11_nf; +extern cpuop_func op_d130_11_ff; +extern cpuop_func op_d138_11_nf; +extern cpuop_func op_d138_11_ff; +extern cpuop_func op_d139_11_nf; +extern cpuop_func op_d139_11_ff; +extern cpuop_func op_d140_11_nf; +extern cpuop_func op_d140_11_ff; +extern cpuop_func op_d148_11_nf; +extern cpuop_func op_d148_11_ff; +extern cpuop_func op_d150_11_nf; +extern cpuop_func op_d150_11_ff; +extern cpuop_func op_d158_11_nf; +extern cpuop_func op_d158_11_ff; +extern cpuop_func op_d160_11_nf; +extern cpuop_func op_d160_11_ff; +extern cpuop_func op_d168_11_nf; +extern cpuop_func op_d168_11_ff; +extern cpuop_func op_d170_11_nf; +extern cpuop_func op_d170_11_ff; +extern cpuop_func op_d178_11_nf; +extern cpuop_func op_d178_11_ff; +extern cpuop_func op_d179_11_nf; +extern cpuop_func op_d179_11_ff; +extern cpuop_func op_d180_11_nf; +extern cpuop_func op_d180_11_ff; +extern cpuop_func op_d188_11_nf; +extern cpuop_func op_d188_11_ff; +extern cpuop_func op_d190_11_nf; +extern cpuop_func op_d190_11_ff; +extern cpuop_func op_d198_11_nf; +extern cpuop_func op_d198_11_ff; +extern cpuop_func op_d1a0_11_nf; +extern cpuop_func op_d1a0_11_ff; +extern cpuop_func op_d1a8_11_nf; +extern cpuop_func op_d1a8_11_ff; +extern cpuop_func op_d1b0_11_nf; +extern cpuop_func op_d1b0_11_ff; +extern cpuop_func op_d1b8_11_nf; +extern cpuop_func op_d1b8_11_ff; +extern cpuop_func op_d1b9_11_nf; +extern cpuop_func op_d1b9_11_ff; +extern cpuop_func op_d1c0_11_nf; +extern cpuop_func op_d1c0_11_ff; +extern cpuop_func op_d1c8_11_nf; +extern cpuop_func op_d1c8_11_ff; +extern cpuop_func op_d1d0_11_nf; +extern cpuop_func op_d1d0_11_ff; +extern cpuop_func op_d1d8_11_nf; +extern cpuop_func op_d1d8_11_ff; +extern cpuop_func op_d1e0_11_nf; +extern cpuop_func op_d1e0_11_ff; +extern cpuop_func op_d1e8_11_nf; +extern cpuop_func op_d1e8_11_ff; +extern cpuop_func op_d1f0_11_nf; +extern cpuop_func op_d1f0_11_ff; +extern cpuop_func op_d1f8_11_nf; +extern cpuop_func op_d1f8_11_ff; +extern cpuop_func op_d1f9_11_nf; +extern cpuop_func op_d1f9_11_ff; +extern cpuop_func op_d1fa_11_nf; +extern cpuop_func op_d1fa_11_ff; +extern cpuop_func op_d1fb_11_nf; +extern cpuop_func op_d1fb_11_ff; +extern cpuop_func op_d1fc_11_nf; +extern cpuop_func op_d1fc_11_ff; +extern cpuop_func op_e000_11_nf; +extern cpuop_func op_e000_11_ff; +extern cpuop_func op_e008_11_nf; +extern cpuop_func op_e008_11_ff; +extern cpuop_func op_e010_11_nf; +extern cpuop_func op_e010_11_ff; +extern cpuop_func op_e018_11_nf; +extern cpuop_func op_e018_11_ff; +extern cpuop_func op_e020_11_nf; +extern cpuop_func op_e020_11_ff; +extern cpuop_func op_e028_11_nf; +extern cpuop_func op_e028_11_ff; +extern cpuop_func op_e030_11_nf; +extern cpuop_func op_e030_11_ff; +extern cpuop_func op_e038_11_nf; +extern cpuop_func op_e038_11_ff; +extern cpuop_func op_e040_11_nf; +extern cpuop_func op_e040_11_ff; +extern cpuop_func op_e048_11_nf; +extern cpuop_func op_e048_11_ff; +extern cpuop_func op_e050_11_nf; +extern cpuop_func op_e050_11_ff; +extern cpuop_func op_e058_11_nf; +extern cpuop_func op_e058_11_ff; +extern cpuop_func op_e060_11_nf; +extern cpuop_func op_e060_11_ff; +extern cpuop_func op_e068_11_nf; +extern cpuop_func op_e068_11_ff; +extern cpuop_func op_e070_11_nf; +extern cpuop_func op_e070_11_ff; +extern cpuop_func op_e078_11_nf; +extern cpuop_func op_e078_11_ff; +extern cpuop_func op_e080_11_nf; +extern cpuop_func op_e080_11_ff; +extern cpuop_func op_e088_11_nf; +extern cpuop_func op_e088_11_ff; +extern cpuop_func op_e090_11_nf; +extern cpuop_func op_e090_11_ff; +extern cpuop_func op_e098_11_nf; +extern cpuop_func op_e098_11_ff; +extern cpuop_func op_e0a0_11_nf; +extern cpuop_func op_e0a0_11_ff; +extern cpuop_func op_e0a8_11_nf; +extern cpuop_func op_e0a8_11_ff; +extern cpuop_func op_e0b0_11_nf; +extern cpuop_func op_e0b0_11_ff; +extern cpuop_func op_e0b8_11_nf; +extern cpuop_func op_e0b8_11_ff; +extern cpuop_func op_e0d0_11_nf; +extern cpuop_func op_e0d0_11_ff; +extern cpuop_func op_e0d8_11_nf; +extern cpuop_func op_e0d8_11_ff; +extern cpuop_func op_e0e0_11_nf; +extern cpuop_func op_e0e0_11_ff; +extern cpuop_func op_e0e8_11_nf; +extern cpuop_func op_e0e8_11_ff; +extern cpuop_func op_e0f0_11_nf; +extern cpuop_func op_e0f0_11_ff; +extern cpuop_func op_e0f8_11_nf; +extern cpuop_func op_e0f8_11_ff; +extern cpuop_func op_e0f9_11_nf; +extern cpuop_func op_e0f9_11_ff; +extern cpuop_func op_e100_11_nf; +extern cpuop_func op_e100_11_ff; +extern cpuop_func op_e108_11_nf; +extern cpuop_func op_e108_11_ff; +extern cpuop_func op_e110_11_nf; +extern cpuop_func op_e110_11_ff; +extern cpuop_func op_e118_11_nf; +extern cpuop_func op_e118_11_ff; +extern cpuop_func op_e120_11_nf; +extern cpuop_func op_e120_11_ff; +extern cpuop_func op_e128_11_nf; +extern cpuop_func op_e128_11_ff; +extern cpuop_func op_e130_11_nf; +extern cpuop_func op_e130_11_ff; +extern cpuop_func op_e138_11_nf; +extern cpuop_func op_e138_11_ff; +extern cpuop_func op_e140_11_nf; +extern cpuop_func op_e140_11_ff; +extern cpuop_func op_e148_11_nf; +extern cpuop_func op_e148_11_ff; +extern cpuop_func op_e150_11_nf; +extern cpuop_func op_e150_11_ff; +extern cpuop_func op_e158_11_nf; +extern cpuop_func op_e158_11_ff; +extern cpuop_func op_e160_11_nf; +extern cpuop_func op_e160_11_ff; +extern cpuop_func op_e168_11_nf; +extern cpuop_func op_e168_11_ff; +extern cpuop_func op_e170_11_nf; +extern cpuop_func op_e170_11_ff; +extern cpuop_func op_e178_11_nf; +extern cpuop_func op_e178_11_ff; +extern cpuop_func op_e180_11_nf; +extern cpuop_func op_e180_11_ff; +extern cpuop_func op_e188_11_nf; +extern cpuop_func op_e188_11_ff; +extern cpuop_func op_e190_11_nf; +extern cpuop_func op_e190_11_ff; +extern cpuop_func op_e198_11_nf; +extern cpuop_func op_e198_11_ff; +extern cpuop_func op_e1a0_11_nf; +extern cpuop_func op_e1a0_11_ff; +extern cpuop_func op_e1a8_11_nf; +extern cpuop_func op_e1a8_11_ff; +extern cpuop_func op_e1b0_11_nf; +extern cpuop_func op_e1b0_11_ff; +extern cpuop_func op_e1b8_11_nf; +extern cpuop_func op_e1b8_11_ff; +extern cpuop_func op_e1d0_11_nf; +extern cpuop_func op_e1d0_11_ff; +extern cpuop_func op_e1d8_11_nf; +extern cpuop_func op_e1d8_11_ff; +extern cpuop_func op_e1e0_11_nf; +extern cpuop_func op_e1e0_11_ff; +extern cpuop_func op_e1e8_11_nf; +extern cpuop_func op_e1e8_11_ff; +extern cpuop_func op_e1f0_11_nf; +extern cpuop_func op_e1f0_11_ff; +extern cpuop_func op_e1f8_11_nf; +extern cpuop_func op_e1f8_11_ff; +extern cpuop_func op_e1f9_11_nf; +extern cpuop_func op_e1f9_11_ff; +extern cpuop_func op_e2d0_11_nf; +extern cpuop_func op_e2d0_11_ff; +extern cpuop_func op_e2d8_11_nf; +extern cpuop_func op_e2d8_11_ff; +extern cpuop_func op_e2e0_11_nf; +extern cpuop_func op_e2e0_11_ff; +extern cpuop_func op_e2e8_11_nf; +extern cpuop_func op_e2e8_11_ff; +extern cpuop_func op_e2f0_11_nf; +extern cpuop_func op_e2f0_11_ff; +extern cpuop_func op_e2f8_11_nf; +extern cpuop_func op_e2f8_11_ff; +extern cpuop_func op_e2f9_11_nf; +extern cpuop_func op_e2f9_11_ff; +extern cpuop_func op_e3d0_11_nf; +extern cpuop_func op_e3d0_11_ff; +extern cpuop_func op_e3d8_11_nf; +extern cpuop_func op_e3d8_11_ff; +extern cpuop_func op_e3e0_11_nf; +extern cpuop_func op_e3e0_11_ff; +extern cpuop_func op_e3e8_11_nf; +extern cpuop_func op_e3e8_11_ff; +extern cpuop_func op_e3f0_11_nf; +extern cpuop_func op_e3f0_11_ff; +extern cpuop_func op_e3f8_11_nf; +extern cpuop_func op_e3f8_11_ff; +extern cpuop_func op_e3f9_11_nf; +extern cpuop_func op_e3f9_11_ff; +extern cpuop_func op_e4d0_11_nf; +extern cpuop_func op_e4d0_11_ff; +extern cpuop_func op_e4d8_11_nf; +extern cpuop_func op_e4d8_11_ff; +extern cpuop_func op_e4e0_11_nf; +extern cpuop_func op_e4e0_11_ff; +extern cpuop_func op_e4e8_11_nf; +extern cpuop_func op_e4e8_11_ff; +extern cpuop_func op_e4f0_11_nf; +extern cpuop_func op_e4f0_11_ff; +extern cpuop_func op_e4f8_11_nf; +extern cpuop_func op_e4f8_11_ff; +extern cpuop_func op_e4f9_11_nf; +extern cpuop_func op_e4f9_11_ff; +extern cpuop_func op_e5d0_11_nf; +extern cpuop_func op_e5d0_11_ff; +extern cpuop_func op_e5d8_11_nf; +extern cpuop_func op_e5d8_11_ff; +extern cpuop_func op_e5e0_11_nf; +extern cpuop_func op_e5e0_11_ff; +extern cpuop_func op_e5e8_11_nf; +extern cpuop_func op_e5e8_11_ff; +extern cpuop_func op_e5f0_11_nf; +extern cpuop_func op_e5f0_11_ff; +extern cpuop_func op_e5f8_11_nf; +extern cpuop_func op_e5f8_11_ff; +extern cpuop_func op_e5f9_11_nf; +extern cpuop_func op_e5f9_11_ff; +extern cpuop_func op_e6d0_11_nf; +extern cpuop_func op_e6d0_11_ff; +extern cpuop_func op_e6d8_11_nf; +extern cpuop_func op_e6d8_11_ff; +extern cpuop_func op_e6e0_11_nf; +extern cpuop_func op_e6e0_11_ff; +extern cpuop_func op_e6e8_11_nf; +extern cpuop_func op_e6e8_11_ff; +extern cpuop_func op_e6f0_11_nf; +extern cpuop_func op_e6f0_11_ff; +extern cpuop_func op_e6f8_11_nf; +extern cpuop_func op_e6f8_11_ff; +extern cpuop_func op_e6f9_11_nf; +extern cpuop_func op_e6f9_11_ff; +extern cpuop_func op_e7d0_11_nf; +extern cpuop_func op_e7d0_11_ff; +extern cpuop_func op_e7d8_11_nf; +extern cpuop_func op_e7d8_11_ff; +extern cpuop_func op_e7e0_11_nf; +extern cpuop_func op_e7e0_11_ff; +extern cpuop_func op_e7e8_11_nf; +extern cpuop_func op_e7e8_11_ff; +extern cpuop_func op_e7f0_11_nf; +extern cpuop_func op_e7f0_11_ff; +extern cpuop_func op_e7f8_11_nf; +extern cpuop_func op_e7f8_11_ff; +extern cpuop_func op_e7f9_11_nf; +extern cpuop_func op_e7f9_11_ff; +extern cpuop_func op_0000_12_nf; +extern cpuop_func op_0000_12_ff; +extern cpuop_func op_0010_12_nf; +extern cpuop_func op_0010_12_ff; +extern cpuop_func op_0018_12_nf; +extern cpuop_func op_0018_12_ff; +extern cpuop_func op_0020_12_nf; +extern cpuop_func op_0020_12_ff; +extern cpuop_func op_0028_12_nf; +extern cpuop_func op_0028_12_ff; +extern cpuop_func op_0030_12_nf; +extern cpuop_func op_0030_12_ff; +extern cpuop_func op_0038_12_nf; +extern cpuop_func op_0038_12_ff; +extern cpuop_func op_0039_12_nf; +extern cpuop_func op_0039_12_ff; +extern cpuop_func op_003c_12_nf; +extern cpuop_func op_003c_12_ff; +extern cpuop_func op_0040_12_nf; +extern cpuop_func op_0040_12_ff; +extern cpuop_func op_0050_12_nf; +extern cpuop_func op_0050_12_ff; +extern cpuop_func op_0058_12_nf; +extern cpuop_func op_0058_12_ff; +extern cpuop_func op_0060_12_nf; +extern cpuop_func op_0060_12_ff; +extern cpuop_func op_0068_12_nf; +extern cpuop_func op_0068_12_ff; +extern cpuop_func op_0070_12_nf; +extern cpuop_func op_0070_12_ff; +extern cpuop_func op_0078_12_nf; +extern cpuop_func op_0078_12_ff; +extern cpuop_func op_0079_12_nf; +extern cpuop_func op_0079_12_ff; +extern cpuop_func op_007c_12_nf; +extern cpuop_func op_007c_12_ff; +extern cpuop_func op_0080_12_nf; +extern cpuop_func op_0080_12_ff; +extern cpuop_func op_0090_12_nf; +extern cpuop_func op_0090_12_ff; +extern cpuop_func op_0098_12_nf; +extern cpuop_func op_0098_12_ff; +extern cpuop_func op_00a0_12_nf; +extern cpuop_func op_00a0_12_ff; +extern cpuop_func op_00a8_12_nf; +extern cpuop_func op_00a8_12_ff; +extern cpuop_func op_00b0_12_nf; +extern cpuop_func op_00b0_12_ff; +extern cpuop_func op_00b8_12_nf; +extern cpuop_func op_00b8_12_ff; +extern cpuop_func op_00b9_12_nf; +extern cpuop_func op_00b9_12_ff; +extern cpuop_func op_0100_12_nf; +extern cpuop_func op_0100_12_ff; +extern cpuop_func op_0108_12_nf; +extern cpuop_func op_0108_12_ff; +extern cpuop_func op_0110_12_nf; +extern cpuop_func op_0110_12_ff; +extern cpuop_func op_0118_12_nf; +extern cpuop_func op_0118_12_ff; +extern cpuop_func op_0120_12_nf; +extern cpuop_func op_0120_12_ff; +extern cpuop_func op_0128_12_nf; +extern cpuop_func op_0128_12_ff; +extern cpuop_func op_0130_12_nf; +extern cpuop_func op_0130_12_ff; +extern cpuop_func op_0138_12_nf; +extern cpuop_func op_0138_12_ff; +extern cpuop_func op_0139_12_nf; +extern cpuop_func op_0139_12_ff; +extern cpuop_func op_013a_12_nf; +extern cpuop_func op_013a_12_ff; +extern cpuop_func op_013b_12_nf; +extern cpuop_func op_013b_12_ff; +extern cpuop_func op_013c_12_nf; +extern cpuop_func op_013c_12_ff; +extern cpuop_func op_0140_12_nf; +extern cpuop_func op_0140_12_ff; +extern cpuop_func op_0148_12_nf; +extern cpuop_func op_0148_12_ff; +extern cpuop_func op_0150_12_nf; +extern cpuop_func op_0150_12_ff; +extern cpuop_func op_0158_12_nf; +extern cpuop_func op_0158_12_ff; +extern cpuop_func op_0160_12_nf; +extern cpuop_func op_0160_12_ff; +extern cpuop_func op_0168_12_nf; +extern cpuop_func op_0168_12_ff; +extern cpuop_func op_0170_12_nf; +extern cpuop_func op_0170_12_ff; +extern cpuop_func op_0178_12_nf; +extern cpuop_func op_0178_12_ff; +extern cpuop_func op_0179_12_nf; +extern cpuop_func op_0179_12_ff; +extern cpuop_func op_0180_12_nf; +extern cpuop_func op_0180_12_ff; +extern cpuop_func op_0188_12_nf; +extern cpuop_func op_0188_12_ff; +extern cpuop_func op_0190_12_nf; +extern cpuop_func op_0190_12_ff; +extern cpuop_func op_0198_12_nf; +extern cpuop_func op_0198_12_ff; +extern cpuop_func op_01a0_12_nf; +extern cpuop_func op_01a0_12_ff; +extern cpuop_func op_01a8_12_nf; +extern cpuop_func op_01a8_12_ff; +extern cpuop_func op_01b0_12_nf; +extern cpuop_func op_01b0_12_ff; +extern cpuop_func op_01b8_12_nf; +extern cpuop_func op_01b8_12_ff; +extern cpuop_func op_01b9_12_nf; +extern cpuop_func op_01b9_12_ff; +extern cpuop_func op_01c0_12_nf; +extern cpuop_func op_01c0_12_ff; +extern cpuop_func op_01c8_12_nf; +extern cpuop_func op_01c8_12_ff; +extern cpuop_func op_01d0_12_nf; +extern cpuop_func op_01d0_12_ff; +extern cpuop_func op_01d8_12_nf; +extern cpuop_func op_01d8_12_ff; +extern cpuop_func op_01e0_12_nf; +extern cpuop_func op_01e0_12_ff; +extern cpuop_func op_01e8_12_nf; +extern cpuop_func op_01e8_12_ff; +extern cpuop_func op_01f0_12_nf; +extern cpuop_func op_01f0_12_ff; +extern cpuop_func op_01f8_12_nf; +extern cpuop_func op_01f8_12_ff; +extern cpuop_func op_01f9_12_nf; +extern cpuop_func op_01f9_12_ff; +extern cpuop_func op_0200_12_nf; +extern cpuop_func op_0200_12_ff; +extern cpuop_func op_0210_12_nf; +extern cpuop_func op_0210_12_ff; +extern cpuop_func op_0218_12_nf; +extern cpuop_func op_0218_12_ff; +extern cpuop_func op_0220_12_nf; +extern cpuop_func op_0220_12_ff; +extern cpuop_func op_0228_12_nf; +extern cpuop_func op_0228_12_ff; +extern cpuop_func op_0230_12_nf; +extern cpuop_func op_0230_12_ff; +extern cpuop_func op_0238_12_nf; +extern cpuop_func op_0238_12_ff; +extern cpuop_func op_0239_12_nf; +extern cpuop_func op_0239_12_ff; +extern cpuop_func op_023c_12_nf; +extern cpuop_func op_023c_12_ff; +extern cpuop_func op_0240_12_nf; +extern cpuop_func op_0240_12_ff; +extern cpuop_func op_0250_12_nf; +extern cpuop_func op_0250_12_ff; +extern cpuop_func op_0258_12_nf; +extern cpuop_func op_0258_12_ff; +extern cpuop_func op_0260_12_nf; +extern cpuop_func op_0260_12_ff; +extern cpuop_func op_0268_12_nf; +extern cpuop_func op_0268_12_ff; +extern cpuop_func op_0270_12_nf; +extern cpuop_func op_0270_12_ff; +extern cpuop_func op_0278_12_nf; +extern cpuop_func op_0278_12_ff; +extern cpuop_func op_0279_12_nf; +extern cpuop_func op_0279_12_ff; +extern cpuop_func op_027c_12_nf; +extern cpuop_func op_027c_12_ff; +extern cpuop_func op_0280_12_nf; +extern cpuop_func op_0280_12_ff; +extern cpuop_func op_0290_12_nf; +extern cpuop_func op_0290_12_ff; +extern cpuop_func op_0298_12_nf; +extern cpuop_func op_0298_12_ff; +extern cpuop_func op_02a0_12_nf; +extern cpuop_func op_02a0_12_ff; +extern cpuop_func op_02a8_12_nf; +extern cpuop_func op_02a8_12_ff; +extern cpuop_func op_02b0_12_nf; +extern cpuop_func op_02b0_12_ff; +extern cpuop_func op_02b8_12_nf; +extern cpuop_func op_02b8_12_ff; +extern cpuop_func op_02b9_12_nf; +extern cpuop_func op_02b9_12_ff; +extern cpuop_func op_0400_12_nf; +extern cpuop_func op_0400_12_ff; +extern cpuop_func op_0410_12_nf; +extern cpuop_func op_0410_12_ff; +extern cpuop_func op_0418_12_nf; +extern cpuop_func op_0418_12_ff; +extern cpuop_func op_0420_12_nf; +extern cpuop_func op_0420_12_ff; +extern cpuop_func op_0428_12_nf; +extern cpuop_func op_0428_12_ff; +extern cpuop_func op_0430_12_nf; +extern cpuop_func op_0430_12_ff; +extern cpuop_func op_0438_12_nf; +extern cpuop_func op_0438_12_ff; +extern cpuop_func op_0439_12_nf; +extern cpuop_func op_0439_12_ff; +extern cpuop_func op_0440_12_nf; +extern cpuop_func op_0440_12_ff; +extern cpuop_func op_0450_12_nf; +extern cpuop_func op_0450_12_ff; +extern cpuop_func op_0458_12_nf; +extern cpuop_func op_0458_12_ff; +extern cpuop_func op_0460_12_nf; +extern cpuop_func op_0460_12_ff; +extern cpuop_func op_0468_12_nf; +extern cpuop_func op_0468_12_ff; +extern cpuop_func op_0470_12_nf; +extern cpuop_func op_0470_12_ff; +extern cpuop_func op_0478_12_nf; +extern cpuop_func op_0478_12_ff; +extern cpuop_func op_0479_12_nf; +extern cpuop_func op_0479_12_ff; +extern cpuop_func op_0480_12_nf; +extern cpuop_func op_0480_12_ff; +extern cpuop_func op_0490_12_nf; +extern cpuop_func op_0490_12_ff; +extern cpuop_func op_0498_12_nf; +extern cpuop_func op_0498_12_ff; +extern cpuop_func op_04a0_12_nf; +extern cpuop_func op_04a0_12_ff; +extern cpuop_func op_04a8_12_nf; +extern cpuop_func op_04a8_12_ff; +extern cpuop_func op_04b0_12_nf; +extern cpuop_func op_04b0_12_ff; +extern cpuop_func op_04b8_12_nf; +extern cpuop_func op_04b8_12_ff; +extern cpuop_func op_04b9_12_nf; +extern cpuop_func op_04b9_12_ff; +extern cpuop_func op_0600_12_nf; +extern cpuop_func op_0600_12_ff; +extern cpuop_func op_0610_12_nf; +extern cpuop_func op_0610_12_ff; +extern cpuop_func op_0618_12_nf; +extern cpuop_func op_0618_12_ff; +extern cpuop_func op_0620_12_nf; +extern cpuop_func op_0620_12_ff; +extern cpuop_func op_0628_12_nf; +extern cpuop_func op_0628_12_ff; +extern cpuop_func op_0630_12_nf; +extern cpuop_func op_0630_12_ff; +extern cpuop_func op_0638_12_nf; +extern cpuop_func op_0638_12_ff; +extern cpuop_func op_0639_12_nf; +extern cpuop_func op_0639_12_ff; +extern cpuop_func op_0640_12_nf; +extern cpuop_func op_0640_12_ff; +extern cpuop_func op_0650_12_nf; +extern cpuop_func op_0650_12_ff; +extern cpuop_func op_0658_12_nf; +extern cpuop_func op_0658_12_ff; +extern cpuop_func op_0660_12_nf; +extern cpuop_func op_0660_12_ff; +extern cpuop_func op_0668_12_nf; +extern cpuop_func op_0668_12_ff; +extern cpuop_func op_0670_12_nf; +extern cpuop_func op_0670_12_ff; +extern cpuop_func op_0678_12_nf; +extern cpuop_func op_0678_12_ff; +extern cpuop_func op_0679_12_nf; +extern cpuop_func op_0679_12_ff; +extern cpuop_func op_0680_12_nf; +extern cpuop_func op_0680_12_ff; +extern cpuop_func op_0690_12_nf; +extern cpuop_func op_0690_12_ff; +extern cpuop_func op_0698_12_nf; +extern cpuop_func op_0698_12_ff; +extern cpuop_func op_06a0_12_nf; +extern cpuop_func op_06a0_12_ff; +extern cpuop_func op_06a8_12_nf; +extern cpuop_func op_06a8_12_ff; +extern cpuop_func op_06b0_12_nf; +extern cpuop_func op_06b0_12_ff; +extern cpuop_func op_06b8_12_nf; +extern cpuop_func op_06b8_12_ff; +extern cpuop_func op_06b9_12_nf; +extern cpuop_func op_06b9_12_ff; +extern cpuop_func op_0800_12_nf; +extern cpuop_func op_0800_12_ff; +extern cpuop_func op_0810_12_nf; +extern cpuop_func op_0810_12_ff; +extern cpuop_func op_0818_12_nf; +extern cpuop_func op_0818_12_ff; +extern cpuop_func op_0820_12_nf; +extern cpuop_func op_0820_12_ff; +extern cpuop_func op_0828_12_nf; +extern cpuop_func op_0828_12_ff; +extern cpuop_func op_0830_12_nf; +extern cpuop_func op_0830_12_ff; +extern cpuop_func op_0838_12_nf; +extern cpuop_func op_0838_12_ff; +extern cpuop_func op_0839_12_nf; +extern cpuop_func op_0839_12_ff; +extern cpuop_func op_083a_12_nf; +extern cpuop_func op_083a_12_ff; +extern cpuop_func op_083b_12_nf; +extern cpuop_func op_083b_12_ff; +extern cpuop_func op_0840_12_nf; +extern cpuop_func op_0840_12_ff; +extern cpuop_func op_0850_12_nf; +extern cpuop_func op_0850_12_ff; +extern cpuop_func op_0858_12_nf; +extern cpuop_func op_0858_12_ff; +extern cpuop_func op_0860_12_nf; +extern cpuop_func op_0860_12_ff; +extern cpuop_func op_0868_12_nf; +extern cpuop_func op_0868_12_ff; +extern cpuop_func op_0870_12_nf; +extern cpuop_func op_0870_12_ff; +extern cpuop_func op_0878_12_nf; +extern cpuop_func op_0878_12_ff; +extern cpuop_func op_0879_12_nf; +extern cpuop_func op_0879_12_ff; +extern cpuop_func op_0880_12_nf; +extern cpuop_func op_0880_12_ff; +extern cpuop_func op_0890_12_nf; +extern cpuop_func op_0890_12_ff; +extern cpuop_func op_0898_12_nf; +extern cpuop_func op_0898_12_ff; +extern cpuop_func op_08a0_12_nf; +extern cpuop_func op_08a0_12_ff; +extern cpuop_func op_08a8_12_nf; +extern cpuop_func op_08a8_12_ff; +extern cpuop_func op_08b0_12_nf; +extern cpuop_func op_08b0_12_ff; +extern cpuop_func op_08b8_12_nf; +extern cpuop_func op_08b8_12_ff; +extern cpuop_func op_08b9_12_nf; +extern cpuop_func op_08b9_12_ff; +extern cpuop_func op_08c0_12_nf; +extern cpuop_func op_08c0_12_ff; +extern cpuop_func op_08d0_12_nf; +extern cpuop_func op_08d0_12_ff; +extern cpuop_func op_08d8_12_nf; +extern cpuop_func op_08d8_12_ff; +extern cpuop_func op_08e0_12_nf; +extern cpuop_func op_08e0_12_ff; +extern cpuop_func op_08e8_12_nf; +extern cpuop_func op_08e8_12_ff; +extern cpuop_func op_08f0_12_nf; +extern cpuop_func op_08f0_12_ff; +extern cpuop_func op_08f8_12_nf; +extern cpuop_func op_08f8_12_ff; +extern cpuop_func op_08f9_12_nf; +extern cpuop_func op_08f9_12_ff; +extern cpuop_func op_0a00_12_nf; +extern cpuop_func op_0a00_12_ff; +extern cpuop_func op_0a10_12_nf; +extern cpuop_func op_0a10_12_ff; +extern cpuop_func op_0a18_12_nf; +extern cpuop_func op_0a18_12_ff; +extern cpuop_func op_0a20_12_nf; +extern cpuop_func op_0a20_12_ff; +extern cpuop_func op_0a28_12_nf; +extern cpuop_func op_0a28_12_ff; +extern cpuop_func op_0a30_12_nf; +extern cpuop_func op_0a30_12_ff; +extern cpuop_func op_0a38_12_nf; +extern cpuop_func op_0a38_12_ff; +extern cpuop_func op_0a39_12_nf; +extern cpuop_func op_0a39_12_ff; +extern cpuop_func op_0a3c_12_nf; +extern cpuop_func op_0a3c_12_ff; +extern cpuop_func op_0a40_12_nf; +extern cpuop_func op_0a40_12_ff; +extern cpuop_func op_0a50_12_nf; +extern cpuop_func op_0a50_12_ff; +extern cpuop_func op_0a58_12_nf; +extern cpuop_func op_0a58_12_ff; +extern cpuop_func op_0a60_12_nf; +extern cpuop_func op_0a60_12_ff; +extern cpuop_func op_0a68_12_nf; +extern cpuop_func op_0a68_12_ff; +extern cpuop_func op_0a70_12_nf; +extern cpuop_func op_0a70_12_ff; +extern cpuop_func op_0a78_12_nf; +extern cpuop_func op_0a78_12_ff; +extern cpuop_func op_0a79_12_nf; +extern cpuop_func op_0a79_12_ff; +extern cpuop_func op_0a7c_12_nf; +extern cpuop_func op_0a7c_12_ff; +extern cpuop_func op_0a80_12_nf; +extern cpuop_func op_0a80_12_ff; +extern cpuop_func op_0a90_12_nf; +extern cpuop_func op_0a90_12_ff; +extern cpuop_func op_0a98_12_nf; +extern cpuop_func op_0a98_12_ff; +extern cpuop_func op_0aa0_12_nf; +extern cpuop_func op_0aa0_12_ff; +extern cpuop_func op_0aa8_12_nf; +extern cpuop_func op_0aa8_12_ff; +extern cpuop_func op_0ab0_12_nf; +extern cpuop_func op_0ab0_12_ff; +extern cpuop_func op_0ab8_12_nf; +extern cpuop_func op_0ab8_12_ff; +extern cpuop_func op_0ab9_12_nf; +extern cpuop_func op_0ab9_12_ff; +extern cpuop_func op_0c00_12_nf; +extern cpuop_func op_0c00_12_ff; +extern cpuop_func op_0c10_12_nf; +extern cpuop_func op_0c10_12_ff; +extern cpuop_func op_0c18_12_nf; +extern cpuop_func op_0c18_12_ff; +extern cpuop_func op_0c20_12_nf; +extern cpuop_func op_0c20_12_ff; +extern cpuop_func op_0c28_12_nf; +extern cpuop_func op_0c28_12_ff; +extern cpuop_func op_0c30_12_nf; +extern cpuop_func op_0c30_12_ff; +extern cpuop_func op_0c38_12_nf; +extern cpuop_func op_0c38_12_ff; +extern cpuop_func op_0c39_12_nf; +extern cpuop_func op_0c39_12_ff; +extern cpuop_func op_0c40_12_nf; +extern cpuop_func op_0c40_12_ff; +extern cpuop_func op_0c50_12_nf; +extern cpuop_func op_0c50_12_ff; +extern cpuop_func op_0c58_12_nf; +extern cpuop_func op_0c58_12_ff; +extern cpuop_func op_0c60_12_nf; +extern cpuop_func op_0c60_12_ff; +extern cpuop_func op_0c68_12_nf; +extern cpuop_func op_0c68_12_ff; +extern cpuop_func op_0c70_12_nf; +extern cpuop_func op_0c70_12_ff; +extern cpuop_func op_0c78_12_nf; +extern cpuop_func op_0c78_12_ff; +extern cpuop_func op_0c79_12_nf; +extern cpuop_func op_0c79_12_ff; +extern cpuop_func op_0c80_12_nf; +extern cpuop_func op_0c80_12_ff; +extern cpuop_func op_0c90_12_nf; +extern cpuop_func op_0c90_12_ff; +extern cpuop_func op_0c98_12_nf; +extern cpuop_func op_0c98_12_ff; +extern cpuop_func op_0ca0_12_nf; +extern cpuop_func op_0ca0_12_ff; +extern cpuop_func op_0ca8_12_nf; +extern cpuop_func op_0ca8_12_ff; +extern cpuop_func op_0cb0_12_nf; +extern cpuop_func op_0cb0_12_ff; +extern cpuop_func op_0cb8_12_nf; +extern cpuop_func op_0cb8_12_ff; +extern cpuop_func op_0cb9_12_nf; +extern cpuop_func op_0cb9_12_ff; +extern cpuop_func op_1000_12_nf; +extern cpuop_func op_1000_12_ff; +extern cpuop_func op_1010_12_nf; +extern cpuop_func op_1010_12_ff; +extern cpuop_func op_1018_12_nf; +extern cpuop_func op_1018_12_ff; +extern cpuop_func op_1020_12_nf; +extern cpuop_func op_1020_12_ff; +extern cpuop_func op_1028_12_nf; +extern cpuop_func op_1028_12_ff; +extern cpuop_func op_1030_12_nf; +extern cpuop_func op_1030_12_ff; +extern cpuop_func op_1038_12_nf; +extern cpuop_func op_1038_12_ff; +extern cpuop_func op_1039_12_nf; +extern cpuop_func op_1039_12_ff; +extern cpuop_func op_103a_12_nf; +extern cpuop_func op_103a_12_ff; +extern cpuop_func op_103b_12_nf; +extern cpuop_func op_103b_12_ff; +extern cpuop_func op_103c_12_nf; +extern cpuop_func op_103c_12_ff; +extern cpuop_func op_1080_12_nf; +extern cpuop_func op_1080_12_ff; +extern cpuop_func op_1090_12_nf; +extern cpuop_func op_1090_12_ff; +extern cpuop_func op_1098_12_nf; +extern cpuop_func op_1098_12_ff; +extern cpuop_func op_10a0_12_nf; +extern cpuop_func op_10a0_12_ff; +extern cpuop_func op_10a8_12_nf; +extern cpuop_func op_10a8_12_ff; +extern cpuop_func op_10b0_12_nf; +extern cpuop_func op_10b0_12_ff; +extern cpuop_func op_10b8_12_nf; +extern cpuop_func op_10b8_12_ff; +extern cpuop_func op_10b9_12_nf; +extern cpuop_func op_10b9_12_ff; +extern cpuop_func op_10ba_12_nf; +extern cpuop_func op_10ba_12_ff; +extern cpuop_func op_10bb_12_nf; +extern cpuop_func op_10bb_12_ff; +extern cpuop_func op_10bc_12_nf; +extern cpuop_func op_10bc_12_ff; +extern cpuop_func op_10c0_12_nf; +extern cpuop_func op_10c0_12_ff; +extern cpuop_func op_10d0_12_nf; +extern cpuop_func op_10d0_12_ff; +extern cpuop_func op_10d8_12_nf; +extern cpuop_func op_10d8_12_ff; +extern cpuop_func op_10e0_12_nf; +extern cpuop_func op_10e0_12_ff; +extern cpuop_func op_10e8_12_nf; +extern cpuop_func op_10e8_12_ff; +extern cpuop_func op_10f0_12_nf; +extern cpuop_func op_10f0_12_ff; +extern cpuop_func op_10f8_12_nf; +extern cpuop_func op_10f8_12_ff; +extern cpuop_func op_10f9_12_nf; +extern cpuop_func op_10f9_12_ff; +extern cpuop_func op_10fa_12_nf; +extern cpuop_func op_10fa_12_ff; +extern cpuop_func op_10fb_12_nf; +extern cpuop_func op_10fb_12_ff; +extern cpuop_func op_10fc_12_nf; +extern cpuop_func op_10fc_12_ff; +extern cpuop_func op_1100_12_nf; +extern cpuop_func op_1100_12_ff; +extern cpuop_func op_1110_12_nf; +extern cpuop_func op_1110_12_ff; +extern cpuop_func op_1118_12_nf; +extern cpuop_func op_1118_12_ff; +extern cpuop_func op_1120_12_nf; +extern cpuop_func op_1120_12_ff; +extern cpuop_func op_1128_12_nf; +extern cpuop_func op_1128_12_ff; +extern cpuop_func op_1130_12_nf; +extern cpuop_func op_1130_12_ff; +extern cpuop_func op_1138_12_nf; +extern cpuop_func op_1138_12_ff; +extern cpuop_func op_1139_12_nf; +extern cpuop_func op_1139_12_ff; +extern cpuop_func op_113a_12_nf; +extern cpuop_func op_113a_12_ff; +extern cpuop_func op_113b_12_nf; +extern cpuop_func op_113b_12_ff; +extern cpuop_func op_113c_12_nf; +extern cpuop_func op_113c_12_ff; +extern cpuop_func op_1140_12_nf; +extern cpuop_func op_1140_12_ff; +extern cpuop_func op_1150_12_nf; +extern cpuop_func op_1150_12_ff; +extern cpuop_func op_1158_12_nf; +extern cpuop_func op_1158_12_ff; +extern cpuop_func op_1160_12_nf; +extern cpuop_func op_1160_12_ff; +extern cpuop_func op_1168_12_nf; +extern cpuop_func op_1168_12_ff; +extern cpuop_func op_1170_12_nf; +extern cpuop_func op_1170_12_ff; +extern cpuop_func op_1178_12_nf; +extern cpuop_func op_1178_12_ff; +extern cpuop_func op_1179_12_nf; +extern cpuop_func op_1179_12_ff; +extern cpuop_func op_117a_12_nf; +extern cpuop_func op_117a_12_ff; +extern cpuop_func op_117b_12_nf; +extern cpuop_func op_117b_12_ff; +extern cpuop_func op_117c_12_nf; +extern cpuop_func op_117c_12_ff; +extern cpuop_func op_1180_12_nf; +extern cpuop_func op_1180_12_ff; +extern cpuop_func op_1190_12_nf; +extern cpuop_func op_1190_12_ff; +extern cpuop_func op_1198_12_nf; +extern cpuop_func op_1198_12_ff; +extern cpuop_func op_11a0_12_nf; +extern cpuop_func op_11a0_12_ff; +extern cpuop_func op_11a8_12_nf; +extern cpuop_func op_11a8_12_ff; +extern cpuop_func op_11b0_12_nf; +extern cpuop_func op_11b0_12_ff; +extern cpuop_func op_11b8_12_nf; +extern cpuop_func op_11b8_12_ff; +extern cpuop_func op_11b9_12_nf; +extern cpuop_func op_11b9_12_ff; +extern cpuop_func op_11ba_12_nf; +extern cpuop_func op_11ba_12_ff; +extern cpuop_func op_11bb_12_nf; +extern cpuop_func op_11bb_12_ff; +extern cpuop_func op_11bc_12_nf; +extern cpuop_func op_11bc_12_ff; +extern cpuop_func op_11c0_12_nf; +extern cpuop_func op_11c0_12_ff; +extern cpuop_func op_11d0_12_nf; +extern cpuop_func op_11d0_12_ff; +extern cpuop_func op_11d8_12_nf; +extern cpuop_func op_11d8_12_ff; +extern cpuop_func op_11e0_12_nf; +extern cpuop_func op_11e0_12_ff; +extern cpuop_func op_11e8_12_nf; +extern cpuop_func op_11e8_12_ff; +extern cpuop_func op_11f0_12_nf; +extern cpuop_func op_11f0_12_ff; +extern cpuop_func op_11f8_12_nf; +extern cpuop_func op_11f8_12_ff; +extern cpuop_func op_11f9_12_nf; +extern cpuop_func op_11f9_12_ff; +extern cpuop_func op_11fa_12_nf; +extern cpuop_func op_11fa_12_ff; +extern cpuop_func op_11fb_12_nf; +extern cpuop_func op_11fb_12_ff; +extern cpuop_func op_11fc_12_nf; +extern cpuop_func op_11fc_12_ff; +extern cpuop_func op_13c0_12_nf; +extern cpuop_func op_13c0_12_ff; +extern cpuop_func op_13d0_12_nf; +extern cpuop_func op_13d0_12_ff; +extern cpuop_func op_13d8_12_nf; +extern cpuop_func op_13d8_12_ff; +extern cpuop_func op_13e0_12_nf; +extern cpuop_func op_13e0_12_ff; +extern cpuop_func op_13e8_12_nf; +extern cpuop_func op_13e8_12_ff; +extern cpuop_func op_13f0_12_nf; +extern cpuop_func op_13f0_12_ff; +extern cpuop_func op_13f8_12_nf; +extern cpuop_func op_13f8_12_ff; +extern cpuop_func op_13f9_12_nf; +extern cpuop_func op_13f9_12_ff; +extern cpuop_func op_13fa_12_nf; +extern cpuop_func op_13fa_12_ff; +extern cpuop_func op_13fb_12_nf; +extern cpuop_func op_13fb_12_ff; +extern cpuop_func op_13fc_12_nf; +extern cpuop_func op_13fc_12_ff; +extern cpuop_func op_2000_12_nf; +extern cpuop_func op_2000_12_ff; +extern cpuop_func op_2008_12_nf; +extern cpuop_func op_2008_12_ff; +extern cpuop_func op_2010_12_nf; +extern cpuop_func op_2010_12_ff; +extern cpuop_func op_2018_12_nf; +extern cpuop_func op_2018_12_ff; +extern cpuop_func op_2020_12_nf; +extern cpuop_func op_2020_12_ff; +extern cpuop_func op_2028_12_nf; +extern cpuop_func op_2028_12_ff; +extern cpuop_func op_2030_12_nf; +extern cpuop_func op_2030_12_ff; +extern cpuop_func op_2038_12_nf; +extern cpuop_func op_2038_12_ff; +extern cpuop_func op_2039_12_nf; +extern cpuop_func op_2039_12_ff; +extern cpuop_func op_203a_12_nf; +extern cpuop_func op_203a_12_ff; +extern cpuop_func op_203b_12_nf; +extern cpuop_func op_203b_12_ff; +extern cpuop_func op_203c_12_nf; +extern cpuop_func op_203c_12_ff; +extern cpuop_func op_2040_12_nf; +extern cpuop_func op_2040_12_ff; +extern cpuop_func op_2048_12_nf; +extern cpuop_func op_2048_12_ff; +extern cpuop_func op_2050_12_nf; +extern cpuop_func op_2050_12_ff; +extern cpuop_func op_2058_12_nf; +extern cpuop_func op_2058_12_ff; +extern cpuop_func op_2060_12_nf; +extern cpuop_func op_2060_12_ff; +extern cpuop_func op_2068_12_nf; +extern cpuop_func op_2068_12_ff; +extern cpuop_func op_2070_12_nf; +extern cpuop_func op_2070_12_ff; +extern cpuop_func op_2078_12_nf; +extern cpuop_func op_2078_12_ff; +extern cpuop_func op_2079_12_nf; +extern cpuop_func op_2079_12_ff; +extern cpuop_func op_207a_12_nf; +extern cpuop_func op_207a_12_ff; +extern cpuop_func op_207b_12_nf; +extern cpuop_func op_207b_12_ff; +extern cpuop_func op_207c_12_nf; +extern cpuop_func op_207c_12_ff; +extern cpuop_func op_2080_12_nf; +extern cpuop_func op_2080_12_ff; +extern cpuop_func op_2088_12_nf; +extern cpuop_func op_2088_12_ff; +extern cpuop_func op_2090_12_nf; +extern cpuop_func op_2090_12_ff; +extern cpuop_func op_2098_12_nf; +extern cpuop_func op_2098_12_ff; +extern cpuop_func op_20a0_12_nf; +extern cpuop_func op_20a0_12_ff; +extern cpuop_func op_20a8_12_nf; +extern cpuop_func op_20a8_12_ff; +extern cpuop_func op_20b0_12_nf; +extern cpuop_func op_20b0_12_ff; +extern cpuop_func op_20b8_12_nf; +extern cpuop_func op_20b8_12_ff; +extern cpuop_func op_20b9_12_nf; +extern cpuop_func op_20b9_12_ff; +extern cpuop_func op_20ba_12_nf; +extern cpuop_func op_20ba_12_ff; +extern cpuop_func op_20bb_12_nf; +extern cpuop_func op_20bb_12_ff; +extern cpuop_func op_20bc_12_nf; +extern cpuop_func op_20bc_12_ff; +extern cpuop_func op_20c0_12_nf; +extern cpuop_func op_20c0_12_ff; +extern cpuop_func op_20c8_12_nf; +extern cpuop_func op_20c8_12_ff; +extern cpuop_func op_20d0_12_nf; +extern cpuop_func op_20d0_12_ff; +extern cpuop_func op_20d8_12_nf; +extern cpuop_func op_20d8_12_ff; +extern cpuop_func op_20e0_12_nf; +extern cpuop_func op_20e0_12_ff; +extern cpuop_func op_20e8_12_nf; +extern cpuop_func op_20e8_12_ff; +extern cpuop_func op_20f0_12_nf; +extern cpuop_func op_20f0_12_ff; +extern cpuop_func op_20f8_12_nf; +extern cpuop_func op_20f8_12_ff; +extern cpuop_func op_20f9_12_nf; +extern cpuop_func op_20f9_12_ff; +extern cpuop_func op_20fa_12_nf; +extern cpuop_func op_20fa_12_ff; +extern cpuop_func op_20fb_12_nf; +extern cpuop_func op_20fb_12_ff; +extern cpuop_func op_20fc_12_nf; +extern cpuop_func op_20fc_12_ff; +extern cpuop_func op_2100_12_nf; +extern cpuop_func op_2100_12_ff; +extern cpuop_func op_2108_12_nf; +extern cpuop_func op_2108_12_ff; +extern cpuop_func op_2110_12_nf; +extern cpuop_func op_2110_12_ff; +extern cpuop_func op_2118_12_nf; +extern cpuop_func op_2118_12_ff; +extern cpuop_func op_2120_12_nf; +extern cpuop_func op_2120_12_ff; +extern cpuop_func op_2128_12_nf; +extern cpuop_func op_2128_12_ff; +extern cpuop_func op_2130_12_nf; +extern cpuop_func op_2130_12_ff; +extern cpuop_func op_2138_12_nf; +extern cpuop_func op_2138_12_ff; +extern cpuop_func op_2139_12_nf; +extern cpuop_func op_2139_12_ff; +extern cpuop_func op_213a_12_nf; +extern cpuop_func op_213a_12_ff; +extern cpuop_func op_213b_12_nf; +extern cpuop_func op_213b_12_ff; +extern cpuop_func op_213c_12_nf; +extern cpuop_func op_213c_12_ff; +extern cpuop_func op_2140_12_nf; +extern cpuop_func op_2140_12_ff; +extern cpuop_func op_2148_12_nf; +extern cpuop_func op_2148_12_ff; +extern cpuop_func op_2150_12_nf; +extern cpuop_func op_2150_12_ff; +extern cpuop_func op_2158_12_nf; +extern cpuop_func op_2158_12_ff; +extern cpuop_func op_2160_12_nf; +extern cpuop_func op_2160_12_ff; +extern cpuop_func op_2168_12_nf; +extern cpuop_func op_2168_12_ff; +extern cpuop_func op_2170_12_nf; +extern cpuop_func op_2170_12_ff; +extern cpuop_func op_2178_12_nf; +extern cpuop_func op_2178_12_ff; +extern cpuop_func op_2179_12_nf; +extern cpuop_func op_2179_12_ff; +extern cpuop_func op_217a_12_nf; +extern cpuop_func op_217a_12_ff; +extern cpuop_func op_217b_12_nf; +extern cpuop_func op_217b_12_ff; +extern cpuop_func op_217c_12_nf; +extern cpuop_func op_217c_12_ff; +extern cpuop_func op_2180_12_nf; +extern cpuop_func op_2180_12_ff; +extern cpuop_func op_2188_12_nf; +extern cpuop_func op_2188_12_ff; +extern cpuop_func op_2190_12_nf; +extern cpuop_func op_2190_12_ff; +extern cpuop_func op_2198_12_nf; +extern cpuop_func op_2198_12_ff; +extern cpuop_func op_21a0_12_nf; +extern cpuop_func op_21a0_12_ff; +extern cpuop_func op_21a8_12_nf; +extern cpuop_func op_21a8_12_ff; +extern cpuop_func op_21b0_12_nf; +extern cpuop_func op_21b0_12_ff; +extern cpuop_func op_21b8_12_nf; +extern cpuop_func op_21b8_12_ff; +extern cpuop_func op_21b9_12_nf; +extern cpuop_func op_21b9_12_ff; +extern cpuop_func op_21ba_12_nf; +extern cpuop_func op_21ba_12_ff; +extern cpuop_func op_21bb_12_nf; +extern cpuop_func op_21bb_12_ff; +extern cpuop_func op_21bc_12_nf; +extern cpuop_func op_21bc_12_ff; +extern cpuop_func op_21c0_12_nf; +extern cpuop_func op_21c0_12_ff; +extern cpuop_func op_21c8_12_nf; +extern cpuop_func op_21c8_12_ff; +extern cpuop_func op_21d0_12_nf; +extern cpuop_func op_21d0_12_ff; +extern cpuop_func op_21d8_12_nf; +extern cpuop_func op_21d8_12_ff; +extern cpuop_func op_21e0_12_nf; +extern cpuop_func op_21e0_12_ff; +extern cpuop_func op_21e8_12_nf; +extern cpuop_func op_21e8_12_ff; +extern cpuop_func op_21f0_12_nf; +extern cpuop_func op_21f0_12_ff; +extern cpuop_func op_21f8_12_nf; +extern cpuop_func op_21f8_12_ff; +extern cpuop_func op_21f9_12_nf; +extern cpuop_func op_21f9_12_ff; +extern cpuop_func op_21fa_12_nf; +extern cpuop_func op_21fa_12_ff; +extern cpuop_func op_21fb_12_nf; +extern cpuop_func op_21fb_12_ff; +extern cpuop_func op_21fc_12_nf; +extern cpuop_func op_21fc_12_ff; +extern cpuop_func op_23c0_12_nf; +extern cpuop_func op_23c0_12_ff; +extern cpuop_func op_23c8_12_nf; +extern cpuop_func op_23c8_12_ff; +extern cpuop_func op_23d0_12_nf; +extern cpuop_func op_23d0_12_ff; +extern cpuop_func op_23d8_12_nf; +extern cpuop_func op_23d8_12_ff; +extern cpuop_func op_23e0_12_nf; +extern cpuop_func op_23e0_12_ff; +extern cpuop_func op_23e8_12_nf; +extern cpuop_func op_23e8_12_ff; +extern cpuop_func op_23f0_12_nf; +extern cpuop_func op_23f0_12_ff; +extern cpuop_func op_23f8_12_nf; +extern cpuop_func op_23f8_12_ff; +extern cpuop_func op_23f9_12_nf; +extern cpuop_func op_23f9_12_ff; +extern cpuop_func op_23fa_12_nf; +extern cpuop_func op_23fa_12_ff; +extern cpuop_func op_23fb_12_nf; +extern cpuop_func op_23fb_12_ff; +extern cpuop_func op_23fc_12_nf; +extern cpuop_func op_23fc_12_ff; +extern cpuop_func op_3000_12_nf; +extern cpuop_func op_3000_12_ff; +extern cpuop_func op_3008_12_nf; +extern cpuop_func op_3008_12_ff; +extern cpuop_func op_3010_12_nf; +extern cpuop_func op_3010_12_ff; +extern cpuop_func op_3018_12_nf; +extern cpuop_func op_3018_12_ff; +extern cpuop_func op_3020_12_nf; +extern cpuop_func op_3020_12_ff; +extern cpuop_func op_3028_12_nf; +extern cpuop_func op_3028_12_ff; +extern cpuop_func op_3030_12_nf; +extern cpuop_func op_3030_12_ff; +extern cpuop_func op_3038_12_nf; +extern cpuop_func op_3038_12_ff; +extern cpuop_func op_3039_12_nf; +extern cpuop_func op_3039_12_ff; +extern cpuop_func op_303a_12_nf; +extern cpuop_func op_303a_12_ff; +extern cpuop_func op_303b_12_nf; +extern cpuop_func op_303b_12_ff; +extern cpuop_func op_303c_12_nf; +extern cpuop_func op_303c_12_ff; +extern cpuop_func op_3040_12_nf; +extern cpuop_func op_3040_12_ff; +extern cpuop_func op_3048_12_nf; +extern cpuop_func op_3048_12_ff; +extern cpuop_func op_3050_12_nf; +extern cpuop_func op_3050_12_ff; +extern cpuop_func op_3058_12_nf; +extern cpuop_func op_3058_12_ff; +extern cpuop_func op_3060_12_nf; +extern cpuop_func op_3060_12_ff; +extern cpuop_func op_3068_12_nf; +extern cpuop_func op_3068_12_ff; +extern cpuop_func op_3070_12_nf; +extern cpuop_func op_3070_12_ff; +extern cpuop_func op_3078_12_nf; +extern cpuop_func op_3078_12_ff; +extern cpuop_func op_3079_12_nf; +extern cpuop_func op_3079_12_ff; +extern cpuop_func op_307a_12_nf; +extern cpuop_func op_307a_12_ff; +extern cpuop_func op_307b_12_nf; +extern cpuop_func op_307b_12_ff; +extern cpuop_func op_307c_12_nf; +extern cpuop_func op_307c_12_ff; +extern cpuop_func op_3080_12_nf; +extern cpuop_func op_3080_12_ff; +extern cpuop_func op_3088_12_nf; +extern cpuop_func op_3088_12_ff; +extern cpuop_func op_3090_12_nf; +extern cpuop_func op_3090_12_ff; +extern cpuop_func op_3098_12_nf; +extern cpuop_func op_3098_12_ff; +extern cpuop_func op_30a0_12_nf; +extern cpuop_func op_30a0_12_ff; +extern cpuop_func op_30a8_12_nf; +extern cpuop_func op_30a8_12_ff; +extern cpuop_func op_30b0_12_nf; +extern cpuop_func op_30b0_12_ff; +extern cpuop_func op_30b8_12_nf; +extern cpuop_func op_30b8_12_ff; +extern cpuop_func op_30b9_12_nf; +extern cpuop_func op_30b9_12_ff; +extern cpuop_func op_30ba_12_nf; +extern cpuop_func op_30ba_12_ff; +extern cpuop_func op_30bb_12_nf; +extern cpuop_func op_30bb_12_ff; +extern cpuop_func op_30bc_12_nf; +extern cpuop_func op_30bc_12_ff; +extern cpuop_func op_30c0_12_nf; +extern cpuop_func op_30c0_12_ff; +extern cpuop_func op_30c8_12_nf; +extern cpuop_func op_30c8_12_ff; +extern cpuop_func op_30d0_12_nf; +extern cpuop_func op_30d0_12_ff; +extern cpuop_func op_30d8_12_nf; +extern cpuop_func op_30d8_12_ff; +extern cpuop_func op_30e0_12_nf; +extern cpuop_func op_30e0_12_ff; +extern cpuop_func op_30e8_12_nf; +extern cpuop_func op_30e8_12_ff; +extern cpuop_func op_30f0_12_nf; +extern cpuop_func op_30f0_12_ff; +extern cpuop_func op_30f8_12_nf; +extern cpuop_func op_30f8_12_ff; +extern cpuop_func op_30f9_12_nf; +extern cpuop_func op_30f9_12_ff; +extern cpuop_func op_30fa_12_nf; +extern cpuop_func op_30fa_12_ff; +extern cpuop_func op_30fb_12_nf; +extern cpuop_func op_30fb_12_ff; +extern cpuop_func op_30fc_12_nf; +extern cpuop_func op_30fc_12_ff; +extern cpuop_func op_3100_12_nf; +extern cpuop_func op_3100_12_ff; +extern cpuop_func op_3108_12_nf; +extern cpuop_func op_3108_12_ff; +extern cpuop_func op_3110_12_nf; +extern cpuop_func op_3110_12_ff; +extern cpuop_func op_3118_12_nf; +extern cpuop_func op_3118_12_ff; +extern cpuop_func op_3120_12_nf; +extern cpuop_func op_3120_12_ff; +extern cpuop_func op_3128_12_nf; +extern cpuop_func op_3128_12_ff; +extern cpuop_func op_3130_12_nf; +extern cpuop_func op_3130_12_ff; +extern cpuop_func op_3138_12_nf; +extern cpuop_func op_3138_12_ff; +extern cpuop_func op_3139_12_nf; +extern cpuop_func op_3139_12_ff; +extern cpuop_func op_313a_12_nf; +extern cpuop_func op_313a_12_ff; +extern cpuop_func op_313b_12_nf; +extern cpuop_func op_313b_12_ff; +extern cpuop_func op_313c_12_nf; +extern cpuop_func op_313c_12_ff; +extern cpuop_func op_3140_12_nf; +extern cpuop_func op_3140_12_ff; +extern cpuop_func op_3148_12_nf; +extern cpuop_func op_3148_12_ff; +extern cpuop_func op_3150_12_nf; +extern cpuop_func op_3150_12_ff; +extern cpuop_func op_3158_12_nf; +extern cpuop_func op_3158_12_ff; +extern cpuop_func op_3160_12_nf; +extern cpuop_func op_3160_12_ff; +extern cpuop_func op_3168_12_nf; +extern cpuop_func op_3168_12_ff; +extern cpuop_func op_3170_12_nf; +extern cpuop_func op_3170_12_ff; +extern cpuop_func op_3178_12_nf; +extern cpuop_func op_3178_12_ff; +extern cpuop_func op_3179_12_nf; +extern cpuop_func op_3179_12_ff; +extern cpuop_func op_317a_12_nf; +extern cpuop_func op_317a_12_ff; +extern cpuop_func op_317b_12_nf; +extern cpuop_func op_317b_12_ff; +extern cpuop_func op_317c_12_nf; +extern cpuop_func op_317c_12_ff; +extern cpuop_func op_3180_12_nf; +extern cpuop_func op_3180_12_ff; +extern cpuop_func op_3188_12_nf; +extern cpuop_func op_3188_12_ff; +extern cpuop_func op_3190_12_nf; +extern cpuop_func op_3190_12_ff; +extern cpuop_func op_3198_12_nf; +extern cpuop_func op_3198_12_ff; +extern cpuop_func op_31a0_12_nf; +extern cpuop_func op_31a0_12_ff; +extern cpuop_func op_31a8_12_nf; +extern cpuop_func op_31a8_12_ff; +extern cpuop_func op_31b0_12_nf; +extern cpuop_func op_31b0_12_ff; +extern cpuop_func op_31b8_12_nf; +extern cpuop_func op_31b8_12_ff; +extern cpuop_func op_31b9_12_nf; +extern cpuop_func op_31b9_12_ff; +extern cpuop_func op_31ba_12_nf; +extern cpuop_func op_31ba_12_ff; +extern cpuop_func op_31bb_12_nf; +extern cpuop_func op_31bb_12_ff; +extern cpuop_func op_31bc_12_nf; +extern cpuop_func op_31bc_12_ff; +extern cpuop_func op_31c0_12_nf; +extern cpuop_func op_31c0_12_ff; +extern cpuop_func op_31c8_12_nf; +extern cpuop_func op_31c8_12_ff; +extern cpuop_func op_31d0_12_nf; +extern cpuop_func op_31d0_12_ff; +extern cpuop_func op_31d8_12_nf; +extern cpuop_func op_31d8_12_ff; +extern cpuop_func op_31e0_12_nf; +extern cpuop_func op_31e0_12_ff; +extern cpuop_func op_31e8_12_nf; +extern cpuop_func op_31e8_12_ff; +extern cpuop_func op_31f0_12_nf; +extern cpuop_func op_31f0_12_ff; +extern cpuop_func op_31f8_12_nf; +extern cpuop_func op_31f8_12_ff; +extern cpuop_func op_31f9_12_nf; +extern cpuop_func op_31f9_12_ff; +extern cpuop_func op_31fa_12_nf; +extern cpuop_func op_31fa_12_ff; +extern cpuop_func op_31fb_12_nf; +extern cpuop_func op_31fb_12_ff; +extern cpuop_func op_31fc_12_nf; +extern cpuop_func op_31fc_12_ff; +extern cpuop_func op_33c0_12_nf; +extern cpuop_func op_33c0_12_ff; +extern cpuop_func op_33c8_12_nf; +extern cpuop_func op_33c8_12_ff; +extern cpuop_func op_33d0_12_nf; +extern cpuop_func op_33d0_12_ff; +extern cpuop_func op_33d8_12_nf; +extern cpuop_func op_33d8_12_ff; +extern cpuop_func op_33e0_12_nf; +extern cpuop_func op_33e0_12_ff; +extern cpuop_func op_33e8_12_nf; +extern cpuop_func op_33e8_12_ff; +extern cpuop_func op_33f0_12_nf; +extern cpuop_func op_33f0_12_ff; +extern cpuop_func op_33f8_12_nf; +extern cpuop_func op_33f8_12_ff; +extern cpuop_func op_33f9_12_nf; +extern cpuop_func op_33f9_12_ff; +extern cpuop_func op_33fa_12_nf; +extern cpuop_func op_33fa_12_ff; +extern cpuop_func op_33fb_12_nf; +extern cpuop_func op_33fb_12_ff; +extern cpuop_func op_33fc_12_nf; +extern cpuop_func op_33fc_12_ff; +extern cpuop_func op_4000_12_nf; +extern cpuop_func op_4000_12_ff; +extern cpuop_func op_4010_12_nf; +extern cpuop_func op_4010_12_ff; +extern cpuop_func op_4018_12_nf; +extern cpuop_func op_4018_12_ff; +extern cpuop_func op_4020_12_nf; +extern cpuop_func op_4020_12_ff; +extern cpuop_func op_4028_12_nf; +extern cpuop_func op_4028_12_ff; +extern cpuop_func op_4030_12_nf; +extern cpuop_func op_4030_12_ff; +extern cpuop_func op_4038_12_nf; +extern cpuop_func op_4038_12_ff; +extern cpuop_func op_4039_12_nf; +extern cpuop_func op_4039_12_ff; +extern cpuop_func op_4040_12_nf; +extern cpuop_func op_4040_12_ff; +extern cpuop_func op_4050_12_nf; +extern cpuop_func op_4050_12_ff; +extern cpuop_func op_4058_12_nf; +extern cpuop_func op_4058_12_ff; +extern cpuop_func op_4060_12_nf; +extern cpuop_func op_4060_12_ff; +extern cpuop_func op_4068_12_nf; +extern cpuop_func op_4068_12_ff; +extern cpuop_func op_4070_12_nf; +extern cpuop_func op_4070_12_ff; +extern cpuop_func op_4078_12_nf; +extern cpuop_func op_4078_12_ff; +extern cpuop_func op_4079_12_nf; +extern cpuop_func op_4079_12_ff; +extern cpuop_func op_4080_12_nf; +extern cpuop_func op_4080_12_ff; +extern cpuop_func op_4090_12_nf; +extern cpuop_func op_4090_12_ff; +extern cpuop_func op_4098_12_nf; +extern cpuop_func op_4098_12_ff; +extern cpuop_func op_40a0_12_nf; +extern cpuop_func op_40a0_12_ff; +extern cpuop_func op_40a8_12_nf; +extern cpuop_func op_40a8_12_ff; +extern cpuop_func op_40b0_12_nf; +extern cpuop_func op_40b0_12_ff; +extern cpuop_func op_40b8_12_nf; +extern cpuop_func op_40b8_12_ff; +extern cpuop_func op_40b9_12_nf; +extern cpuop_func op_40b9_12_ff; +extern cpuop_func op_40c0_12_nf; +extern cpuop_func op_40c0_12_ff; +extern cpuop_func op_40d0_12_nf; +extern cpuop_func op_40d0_12_ff; +extern cpuop_func op_40d8_12_nf; +extern cpuop_func op_40d8_12_ff; +extern cpuop_func op_40e0_12_nf; +extern cpuop_func op_40e0_12_ff; +extern cpuop_func op_40e8_12_nf; +extern cpuop_func op_40e8_12_ff; +extern cpuop_func op_40f0_12_nf; +extern cpuop_func op_40f0_12_ff; +extern cpuop_func op_40f8_12_nf; +extern cpuop_func op_40f8_12_ff; +extern cpuop_func op_40f9_12_nf; +extern cpuop_func op_40f9_12_ff; +extern cpuop_func op_4180_12_nf; +extern cpuop_func op_4180_12_ff; +extern cpuop_func op_4190_12_nf; +extern cpuop_func op_4190_12_ff; +extern cpuop_func op_4198_12_nf; +extern cpuop_func op_4198_12_ff; +extern cpuop_func op_41a0_12_nf; +extern cpuop_func op_41a0_12_ff; +extern cpuop_func op_41a8_12_nf; +extern cpuop_func op_41a8_12_ff; +extern cpuop_func op_41b0_12_nf; +extern cpuop_func op_41b0_12_ff; +extern cpuop_func op_41b8_12_nf; +extern cpuop_func op_41b8_12_ff; +extern cpuop_func op_41b9_12_nf; +extern cpuop_func op_41b9_12_ff; +extern cpuop_func op_41ba_12_nf; +extern cpuop_func op_41ba_12_ff; +extern cpuop_func op_41bb_12_nf; +extern cpuop_func op_41bb_12_ff; +extern cpuop_func op_41bc_12_nf; +extern cpuop_func op_41bc_12_ff; +extern cpuop_func op_41d0_12_nf; +extern cpuop_func op_41d0_12_ff; +extern cpuop_func op_41e8_12_nf; +extern cpuop_func op_41e8_12_ff; +extern cpuop_func op_41f0_12_nf; +extern cpuop_func op_41f0_12_ff; +extern cpuop_func op_41f8_12_nf; +extern cpuop_func op_41f8_12_ff; +extern cpuop_func op_41f9_12_nf; +extern cpuop_func op_41f9_12_ff; +extern cpuop_func op_41fa_12_nf; +extern cpuop_func op_41fa_12_ff; +extern cpuop_func op_41fb_12_nf; +extern cpuop_func op_41fb_12_ff; +extern cpuop_func op_4200_12_nf; +extern cpuop_func op_4200_12_ff; +extern cpuop_func op_4210_12_nf; +extern cpuop_func op_4210_12_ff; +extern cpuop_func op_4218_12_nf; +extern cpuop_func op_4218_12_ff; +extern cpuop_func op_4220_12_nf; +extern cpuop_func op_4220_12_ff; +extern cpuop_func op_4228_12_nf; +extern cpuop_func op_4228_12_ff; +extern cpuop_func op_4230_12_nf; +extern cpuop_func op_4230_12_ff; +extern cpuop_func op_4238_12_nf; +extern cpuop_func op_4238_12_ff; +extern cpuop_func op_4239_12_nf; +extern cpuop_func op_4239_12_ff; +extern cpuop_func op_4240_12_nf; +extern cpuop_func op_4240_12_ff; +extern cpuop_func op_4250_12_nf; +extern cpuop_func op_4250_12_ff; +extern cpuop_func op_4258_12_nf; +extern cpuop_func op_4258_12_ff; +extern cpuop_func op_4260_12_nf; +extern cpuop_func op_4260_12_ff; +extern cpuop_func op_4268_12_nf; +extern cpuop_func op_4268_12_ff; +extern cpuop_func op_4270_12_nf; +extern cpuop_func op_4270_12_ff; +extern cpuop_func op_4278_12_nf; +extern cpuop_func op_4278_12_ff; +extern cpuop_func op_4279_12_nf; +extern cpuop_func op_4279_12_ff; +extern cpuop_func op_4280_12_nf; +extern cpuop_func op_4280_12_ff; +extern cpuop_func op_4290_12_nf; +extern cpuop_func op_4290_12_ff; +extern cpuop_func op_4298_12_nf; +extern cpuop_func op_4298_12_ff; +extern cpuop_func op_42a0_12_nf; +extern cpuop_func op_42a0_12_ff; +extern cpuop_func op_42a8_12_nf; +extern cpuop_func op_42a8_12_ff; +extern cpuop_func op_42b0_12_nf; +extern cpuop_func op_42b0_12_ff; +extern cpuop_func op_42b8_12_nf; +extern cpuop_func op_42b8_12_ff; +extern cpuop_func op_42b9_12_nf; +extern cpuop_func op_42b9_12_ff; +extern cpuop_func op_4400_12_nf; +extern cpuop_func op_4400_12_ff; +extern cpuop_func op_4410_12_nf; +extern cpuop_func op_4410_12_ff; +extern cpuop_func op_4418_12_nf; +extern cpuop_func op_4418_12_ff; +extern cpuop_func op_4420_12_nf; +extern cpuop_func op_4420_12_ff; +extern cpuop_func op_4428_12_nf; +extern cpuop_func op_4428_12_ff; +extern cpuop_func op_4430_12_nf; +extern cpuop_func op_4430_12_ff; +extern cpuop_func op_4438_12_nf; +extern cpuop_func op_4438_12_ff; +extern cpuop_func op_4439_12_nf; +extern cpuop_func op_4439_12_ff; +extern cpuop_func op_4440_12_nf; +extern cpuop_func op_4440_12_ff; +extern cpuop_func op_4450_12_nf; +extern cpuop_func op_4450_12_ff; +extern cpuop_func op_4458_12_nf; +extern cpuop_func op_4458_12_ff; +extern cpuop_func op_4460_12_nf; +extern cpuop_func op_4460_12_ff; +extern cpuop_func op_4468_12_nf; +extern cpuop_func op_4468_12_ff; +extern cpuop_func op_4470_12_nf; +extern cpuop_func op_4470_12_ff; +extern cpuop_func op_4478_12_nf; +extern cpuop_func op_4478_12_ff; +extern cpuop_func op_4479_12_nf; +extern cpuop_func op_4479_12_ff; +extern cpuop_func op_4480_12_nf; +extern cpuop_func op_4480_12_ff; +extern cpuop_func op_4490_12_nf; +extern cpuop_func op_4490_12_ff; +extern cpuop_func op_4498_12_nf; +extern cpuop_func op_4498_12_ff; +extern cpuop_func op_44a0_12_nf; +extern cpuop_func op_44a0_12_ff; +extern cpuop_func op_44a8_12_nf; +extern cpuop_func op_44a8_12_ff; +extern cpuop_func op_44b0_12_nf; +extern cpuop_func op_44b0_12_ff; +extern cpuop_func op_44b8_12_nf; +extern cpuop_func op_44b8_12_ff; +extern cpuop_func op_44b9_12_nf; +extern cpuop_func op_44b9_12_ff; +extern cpuop_func op_44c0_12_nf; +extern cpuop_func op_44c0_12_ff; +extern cpuop_func op_44d0_12_nf; +extern cpuop_func op_44d0_12_ff; +extern cpuop_func op_44d8_12_nf; +extern cpuop_func op_44d8_12_ff; +extern cpuop_func op_44e0_12_nf; +extern cpuop_func op_44e0_12_ff; +extern cpuop_func op_44e8_12_nf; +extern cpuop_func op_44e8_12_ff; +extern cpuop_func op_44f0_12_nf; +extern cpuop_func op_44f0_12_ff; +extern cpuop_func op_44f8_12_nf; +extern cpuop_func op_44f8_12_ff; +extern cpuop_func op_44f9_12_nf; +extern cpuop_func op_44f9_12_ff; +extern cpuop_func op_44fa_12_nf; +extern cpuop_func op_44fa_12_ff; +extern cpuop_func op_44fb_12_nf; +extern cpuop_func op_44fb_12_ff; +extern cpuop_func op_44fc_12_nf; +extern cpuop_func op_44fc_12_ff; +extern cpuop_func op_4600_12_nf; +extern cpuop_func op_4600_12_ff; +extern cpuop_func op_4610_12_nf; +extern cpuop_func op_4610_12_ff; +extern cpuop_func op_4618_12_nf; +extern cpuop_func op_4618_12_ff; +extern cpuop_func op_4620_12_nf; +extern cpuop_func op_4620_12_ff; +extern cpuop_func op_4628_12_nf; +extern cpuop_func op_4628_12_ff; +extern cpuop_func op_4630_12_nf; +extern cpuop_func op_4630_12_ff; +extern cpuop_func op_4638_12_nf; +extern cpuop_func op_4638_12_ff; +extern cpuop_func op_4639_12_nf; +extern cpuop_func op_4639_12_ff; +extern cpuop_func op_4640_12_nf; +extern cpuop_func op_4640_12_ff; +extern cpuop_func op_4650_12_nf; +extern cpuop_func op_4650_12_ff; +extern cpuop_func op_4658_12_nf; +extern cpuop_func op_4658_12_ff; +extern cpuop_func op_4660_12_nf; +extern cpuop_func op_4660_12_ff; +extern cpuop_func op_4668_12_nf; +extern cpuop_func op_4668_12_ff; +extern cpuop_func op_4670_12_nf; +extern cpuop_func op_4670_12_ff; +extern cpuop_func op_4678_12_nf; +extern cpuop_func op_4678_12_ff; +extern cpuop_func op_4679_12_nf; +extern cpuop_func op_4679_12_ff; +extern cpuop_func op_4680_12_nf; +extern cpuop_func op_4680_12_ff; +extern cpuop_func op_4690_12_nf; +extern cpuop_func op_4690_12_ff; +extern cpuop_func op_4698_12_nf; +extern cpuop_func op_4698_12_ff; +extern cpuop_func op_46a0_12_nf; +extern cpuop_func op_46a0_12_ff; +extern cpuop_func op_46a8_12_nf; +extern cpuop_func op_46a8_12_ff; +extern cpuop_func op_46b0_12_nf; +extern cpuop_func op_46b0_12_ff; +extern cpuop_func op_46b8_12_nf; +extern cpuop_func op_46b8_12_ff; +extern cpuop_func op_46b9_12_nf; +extern cpuop_func op_46b9_12_ff; +extern cpuop_func op_46c0_12_nf; +extern cpuop_func op_46c0_12_ff; +extern cpuop_func op_46d0_12_nf; +extern cpuop_func op_46d0_12_ff; +extern cpuop_func op_46d8_12_nf; +extern cpuop_func op_46d8_12_ff; +extern cpuop_func op_46e0_12_nf; +extern cpuop_func op_46e0_12_ff; +extern cpuop_func op_46e8_12_nf; +extern cpuop_func op_46e8_12_ff; +extern cpuop_func op_46f0_12_nf; +extern cpuop_func op_46f0_12_ff; +extern cpuop_func op_46f8_12_nf; +extern cpuop_func op_46f8_12_ff; +extern cpuop_func op_46f9_12_nf; +extern cpuop_func op_46f9_12_ff; +extern cpuop_func op_46fa_12_nf; +extern cpuop_func op_46fa_12_ff; +extern cpuop_func op_46fb_12_nf; +extern cpuop_func op_46fb_12_ff; +extern cpuop_func op_46fc_12_nf; +extern cpuop_func op_46fc_12_ff; +extern cpuop_func op_4800_12_nf; +extern cpuop_func op_4800_12_ff; +extern cpuop_func op_4810_12_nf; +extern cpuop_func op_4810_12_ff; +extern cpuop_func op_4818_12_nf; +extern cpuop_func op_4818_12_ff; +extern cpuop_func op_4820_12_nf; +extern cpuop_func op_4820_12_ff; +extern cpuop_func op_4828_12_nf; +extern cpuop_func op_4828_12_ff; +extern cpuop_func op_4830_12_nf; +extern cpuop_func op_4830_12_ff; +extern cpuop_func op_4838_12_nf; +extern cpuop_func op_4838_12_ff; +extern cpuop_func op_4839_12_nf; +extern cpuop_func op_4839_12_ff; +extern cpuop_func op_4840_12_nf; +extern cpuop_func op_4840_12_ff; +extern cpuop_func op_4850_12_nf; +extern cpuop_func op_4850_12_ff; +extern cpuop_func op_4868_12_nf; +extern cpuop_func op_4868_12_ff; +extern cpuop_func op_4870_12_nf; +extern cpuop_func op_4870_12_ff; +extern cpuop_func op_4878_12_nf; +extern cpuop_func op_4878_12_ff; +extern cpuop_func op_4879_12_nf; +extern cpuop_func op_4879_12_ff; +extern cpuop_func op_487a_12_nf; +extern cpuop_func op_487a_12_ff; +extern cpuop_func op_487b_12_nf; +extern cpuop_func op_487b_12_ff; +extern cpuop_func op_4880_12_nf; +extern cpuop_func op_4880_12_ff; +extern cpuop_func op_4890_12_nf; +extern cpuop_func op_4890_12_ff; +extern cpuop_func op_48a0_12_nf; +extern cpuop_func op_48a0_12_ff; +extern cpuop_func op_48a8_12_nf; +extern cpuop_func op_48a8_12_ff; +extern cpuop_func op_48b0_12_nf; +extern cpuop_func op_48b0_12_ff; +extern cpuop_func op_48b8_12_nf; +extern cpuop_func op_48b8_12_ff; +extern cpuop_func op_48b9_12_nf; +extern cpuop_func op_48b9_12_ff; +extern cpuop_func op_48c0_12_nf; +extern cpuop_func op_48c0_12_ff; +extern cpuop_func op_48d0_12_nf; +extern cpuop_func op_48d0_12_ff; +extern cpuop_func op_48e0_12_nf; +extern cpuop_func op_48e0_12_ff; +extern cpuop_func op_48e8_12_nf; +extern cpuop_func op_48e8_12_ff; +extern cpuop_func op_48f0_12_nf; +extern cpuop_func op_48f0_12_ff; +extern cpuop_func op_48f8_12_nf; +extern cpuop_func op_48f8_12_ff; +extern cpuop_func op_48f9_12_nf; +extern cpuop_func op_48f9_12_ff; +extern cpuop_func op_4a00_12_nf; +extern cpuop_func op_4a00_12_ff; +extern cpuop_func op_4a10_12_nf; +extern cpuop_func op_4a10_12_ff; +extern cpuop_func op_4a18_12_nf; +extern cpuop_func op_4a18_12_ff; +extern cpuop_func op_4a20_12_nf; +extern cpuop_func op_4a20_12_ff; +extern cpuop_func op_4a28_12_nf; +extern cpuop_func op_4a28_12_ff; +extern cpuop_func op_4a30_12_nf; +extern cpuop_func op_4a30_12_ff; +extern cpuop_func op_4a38_12_nf; +extern cpuop_func op_4a38_12_ff; +extern cpuop_func op_4a39_12_nf; +extern cpuop_func op_4a39_12_ff; +extern cpuop_func op_4a40_12_nf; +extern cpuop_func op_4a40_12_ff; +extern cpuop_func op_4a50_12_nf; +extern cpuop_func op_4a50_12_ff; +extern cpuop_func op_4a58_12_nf; +extern cpuop_func op_4a58_12_ff; +extern cpuop_func op_4a60_12_nf; +extern cpuop_func op_4a60_12_ff; +extern cpuop_func op_4a68_12_nf; +extern cpuop_func op_4a68_12_ff; +extern cpuop_func op_4a70_12_nf; +extern cpuop_func op_4a70_12_ff; +extern cpuop_func op_4a78_12_nf; +extern cpuop_func op_4a78_12_ff; +extern cpuop_func op_4a79_12_nf; +extern cpuop_func op_4a79_12_ff; +extern cpuop_func op_4a80_12_nf; +extern cpuop_func op_4a80_12_ff; +extern cpuop_func op_4a90_12_nf; +extern cpuop_func op_4a90_12_ff; +extern cpuop_func op_4a98_12_nf; +extern cpuop_func op_4a98_12_ff; +extern cpuop_func op_4aa0_12_nf; +extern cpuop_func op_4aa0_12_ff; +extern cpuop_func op_4aa8_12_nf; +extern cpuop_func op_4aa8_12_ff; +extern cpuop_func op_4ab0_12_nf; +extern cpuop_func op_4ab0_12_ff; +extern cpuop_func op_4ab8_12_nf; +extern cpuop_func op_4ab8_12_ff; +extern cpuop_func op_4ab9_12_nf; +extern cpuop_func op_4ab9_12_ff; +extern cpuop_func op_4ac0_12_nf; +extern cpuop_func op_4ac0_12_ff; +extern cpuop_func op_4ad0_12_nf; +extern cpuop_func op_4ad0_12_ff; +extern cpuop_func op_4ad8_12_nf; +extern cpuop_func op_4ad8_12_ff; +extern cpuop_func op_4ae0_12_nf; +extern cpuop_func op_4ae0_12_ff; +extern cpuop_func op_4ae8_12_nf; +extern cpuop_func op_4ae8_12_ff; +extern cpuop_func op_4af0_12_nf; +extern cpuop_func op_4af0_12_ff; +extern cpuop_func op_4af8_12_nf; +extern cpuop_func op_4af8_12_ff; +extern cpuop_func op_4af9_12_nf; +extern cpuop_func op_4af9_12_ff; +extern cpuop_func op_4c90_12_nf; +extern cpuop_func op_4c90_12_ff; +extern cpuop_func op_4c98_12_nf; +extern cpuop_func op_4c98_12_ff; +extern cpuop_func op_4ca8_12_nf; +extern cpuop_func op_4ca8_12_ff; +extern cpuop_func op_4cb0_12_nf; +extern cpuop_func op_4cb0_12_ff; +extern cpuop_func op_4cb8_12_nf; +extern cpuop_func op_4cb8_12_ff; +extern cpuop_func op_4cb9_12_nf; +extern cpuop_func op_4cb9_12_ff; +extern cpuop_func op_4cba_12_nf; +extern cpuop_func op_4cba_12_ff; +extern cpuop_func op_4cbb_12_nf; +extern cpuop_func op_4cbb_12_ff; +extern cpuop_func op_4cd0_12_nf; +extern cpuop_func op_4cd0_12_ff; +extern cpuop_func op_4cd8_12_nf; +extern cpuop_func op_4cd8_12_ff; +extern cpuop_func op_4ce8_12_nf; +extern cpuop_func op_4ce8_12_ff; +extern cpuop_func op_4cf0_12_nf; +extern cpuop_func op_4cf0_12_ff; +extern cpuop_func op_4cf8_12_nf; +extern cpuop_func op_4cf8_12_ff; +extern cpuop_func op_4cf9_12_nf; +extern cpuop_func op_4cf9_12_ff; +extern cpuop_func op_4cfa_12_nf; +extern cpuop_func op_4cfa_12_ff; +extern cpuop_func op_4cfb_12_nf; +extern cpuop_func op_4cfb_12_ff; +extern cpuop_func op_4e50_12_nf; +extern cpuop_func op_4e50_12_ff; +extern cpuop_func op_4e58_12_nf; +extern cpuop_func op_4e58_12_ff; +extern cpuop_func op_4e60_12_nf; +extern cpuop_func op_4e60_12_ff; +extern cpuop_func op_4e68_12_nf; +extern cpuop_func op_4e68_12_ff; +extern cpuop_func op_4e70_12_nf; +extern cpuop_func op_4e70_12_ff; +extern cpuop_func op_4e71_12_nf; +extern cpuop_func op_4e71_12_ff; +extern cpuop_func op_4e72_12_nf; +extern cpuop_func op_4e72_12_ff; +extern cpuop_func op_4e73_12_nf; +extern cpuop_func op_4e73_12_ff; +extern cpuop_func op_4e75_12_nf; +extern cpuop_func op_4e75_12_ff; +extern cpuop_func op_4e76_12_nf; +extern cpuop_func op_4e76_12_ff; +extern cpuop_func op_4e77_12_nf; +extern cpuop_func op_4e77_12_ff; +extern cpuop_func op_4e90_12_nf; +extern cpuop_func op_4e90_12_ff; +extern cpuop_func op_4ea8_12_nf; +extern cpuop_func op_4ea8_12_ff; +extern cpuop_func op_4eb0_12_nf; +extern cpuop_func op_4eb0_12_ff; +extern cpuop_func op_4eb8_12_nf; +extern cpuop_func op_4eb8_12_ff; +extern cpuop_func op_4eb9_12_nf; +extern cpuop_func op_4eb9_12_ff; +extern cpuop_func op_4eba_12_nf; +extern cpuop_func op_4eba_12_ff; +extern cpuop_func op_4ebb_12_nf; +extern cpuop_func op_4ebb_12_ff; +extern cpuop_func op_4ed0_12_nf; +extern cpuop_func op_4ed0_12_ff; +extern cpuop_func op_4ee8_12_nf; +extern cpuop_func op_4ee8_12_ff; +extern cpuop_func op_4ef0_12_nf; +extern cpuop_func op_4ef0_12_ff; +extern cpuop_func op_4ef8_12_nf; +extern cpuop_func op_4ef8_12_ff; +extern cpuop_func op_4ef9_12_nf; +extern cpuop_func op_4ef9_12_ff; +extern cpuop_func op_4efa_12_nf; +extern cpuop_func op_4efa_12_ff; +extern cpuop_func op_4efb_12_nf; +extern cpuop_func op_4efb_12_ff; +extern cpuop_func op_5000_12_nf; +extern cpuop_func op_5000_12_ff; +extern cpuop_func op_5010_12_nf; +extern cpuop_func op_5010_12_ff; +extern cpuop_func op_5018_12_nf; +extern cpuop_func op_5018_12_ff; +extern cpuop_func op_5020_12_nf; +extern cpuop_func op_5020_12_ff; +extern cpuop_func op_5028_12_nf; +extern cpuop_func op_5028_12_ff; +extern cpuop_func op_5030_12_nf; +extern cpuop_func op_5030_12_ff; +extern cpuop_func op_5038_12_nf; +extern cpuop_func op_5038_12_ff; +extern cpuop_func op_5039_12_nf; +extern cpuop_func op_5039_12_ff; +extern cpuop_func op_5040_12_nf; +extern cpuop_func op_5040_12_ff; +extern cpuop_func op_5048_12_nf; +extern cpuop_func op_5048_12_ff; +extern cpuop_func op_5050_12_nf; +extern cpuop_func op_5050_12_ff; +extern cpuop_func op_5058_12_nf; +extern cpuop_func op_5058_12_ff; +extern cpuop_func op_5060_12_nf; +extern cpuop_func op_5060_12_ff; +extern cpuop_func op_5068_12_nf; +extern cpuop_func op_5068_12_ff; +extern cpuop_func op_5070_12_nf; +extern cpuop_func op_5070_12_ff; +extern cpuop_func op_5078_12_nf; +extern cpuop_func op_5078_12_ff; +extern cpuop_func op_5079_12_nf; +extern cpuop_func op_5079_12_ff; +extern cpuop_func op_5080_12_nf; +extern cpuop_func op_5080_12_ff; +extern cpuop_func op_5088_12_nf; +extern cpuop_func op_5088_12_ff; +extern cpuop_func op_5090_12_nf; +extern cpuop_func op_5090_12_ff; +extern cpuop_func op_5098_12_nf; +extern cpuop_func op_5098_12_ff; +extern cpuop_func op_50a0_12_nf; +extern cpuop_func op_50a0_12_ff; +extern cpuop_func op_50a8_12_nf; +extern cpuop_func op_50a8_12_ff; +extern cpuop_func op_50b0_12_nf; +extern cpuop_func op_50b0_12_ff; +extern cpuop_func op_50b8_12_nf; +extern cpuop_func op_50b8_12_ff; +extern cpuop_func op_50b9_12_nf; +extern cpuop_func op_50b9_12_ff; +extern cpuop_func op_50c0_12_nf; +extern cpuop_func op_50c0_12_ff; +extern cpuop_func op_50c8_12_nf; +extern cpuop_func op_50c8_12_ff; +extern cpuop_func op_50d0_12_nf; +extern cpuop_func op_50d0_12_ff; +extern cpuop_func op_50d8_12_nf; +extern cpuop_func op_50d8_12_ff; +extern cpuop_func op_50e0_12_nf; +extern cpuop_func op_50e0_12_ff; +extern cpuop_func op_50e8_12_nf; +extern cpuop_func op_50e8_12_ff; +extern cpuop_func op_50f0_12_nf; +extern cpuop_func op_50f0_12_ff; +extern cpuop_func op_50f8_12_nf; +extern cpuop_func op_50f8_12_ff; +extern cpuop_func op_50f9_12_nf; +extern cpuop_func op_50f9_12_ff; +extern cpuop_func op_5100_12_nf; +extern cpuop_func op_5100_12_ff; +extern cpuop_func op_5110_12_nf; +extern cpuop_func op_5110_12_ff; +extern cpuop_func op_5118_12_nf; +extern cpuop_func op_5118_12_ff; +extern cpuop_func op_5120_12_nf; +extern cpuop_func op_5120_12_ff; +extern cpuop_func op_5128_12_nf; +extern cpuop_func op_5128_12_ff; +extern cpuop_func op_5130_12_nf; +extern cpuop_func op_5130_12_ff; +extern cpuop_func op_5138_12_nf; +extern cpuop_func op_5138_12_ff; +extern cpuop_func op_5139_12_nf; +extern cpuop_func op_5139_12_ff; +extern cpuop_func op_5140_12_nf; +extern cpuop_func op_5140_12_ff; +extern cpuop_func op_5148_12_nf; +extern cpuop_func op_5148_12_ff; +extern cpuop_func op_5150_12_nf; +extern cpuop_func op_5150_12_ff; +extern cpuop_func op_5158_12_nf; +extern cpuop_func op_5158_12_ff; +extern cpuop_func op_5160_12_nf; +extern cpuop_func op_5160_12_ff; +extern cpuop_func op_5168_12_nf; +extern cpuop_func op_5168_12_ff; +extern cpuop_func op_5170_12_nf; +extern cpuop_func op_5170_12_ff; +extern cpuop_func op_5178_12_nf; +extern cpuop_func op_5178_12_ff; +extern cpuop_func op_5179_12_nf; +extern cpuop_func op_5179_12_ff; +extern cpuop_func op_5180_12_nf; +extern cpuop_func op_5180_12_ff; +extern cpuop_func op_5188_12_nf; +extern cpuop_func op_5188_12_ff; +extern cpuop_func op_5190_12_nf; +extern cpuop_func op_5190_12_ff; +extern cpuop_func op_5198_12_nf; +extern cpuop_func op_5198_12_ff; +extern cpuop_func op_51a0_12_nf; +extern cpuop_func op_51a0_12_ff; +extern cpuop_func op_51a8_12_nf; +extern cpuop_func op_51a8_12_ff; +extern cpuop_func op_51b0_12_nf; +extern cpuop_func op_51b0_12_ff; +extern cpuop_func op_51b8_12_nf; +extern cpuop_func op_51b8_12_ff; +extern cpuop_func op_51b9_12_nf; +extern cpuop_func op_51b9_12_ff; +extern cpuop_func op_51c0_12_nf; +extern cpuop_func op_51c0_12_ff; +extern cpuop_func op_51c8_12_nf; +extern cpuop_func op_51c8_12_ff; +extern cpuop_func op_51d0_12_nf; +extern cpuop_func op_51d0_12_ff; +extern cpuop_func op_51d8_12_nf; +extern cpuop_func op_51d8_12_ff; +extern cpuop_func op_51e0_12_nf; +extern cpuop_func op_51e0_12_ff; +extern cpuop_func op_51e8_12_nf; +extern cpuop_func op_51e8_12_ff; +extern cpuop_func op_51f0_12_nf; +extern cpuop_func op_51f0_12_ff; +extern cpuop_func op_51f8_12_nf; +extern cpuop_func op_51f8_12_ff; +extern cpuop_func op_51f9_12_nf; +extern cpuop_func op_51f9_12_ff; +extern cpuop_func op_52c0_12_nf; +extern cpuop_func op_52c0_12_ff; +extern cpuop_func op_52c8_12_nf; +extern cpuop_func op_52c8_12_ff; +extern cpuop_func op_52d0_12_nf; +extern cpuop_func op_52d0_12_ff; +extern cpuop_func op_52d8_12_nf; +extern cpuop_func op_52d8_12_ff; +extern cpuop_func op_52e0_12_nf; +extern cpuop_func op_52e0_12_ff; +extern cpuop_func op_52e8_12_nf; +extern cpuop_func op_52e8_12_ff; +extern cpuop_func op_52f0_12_nf; +extern cpuop_func op_52f0_12_ff; +extern cpuop_func op_52f8_12_nf; +extern cpuop_func op_52f8_12_ff; +extern cpuop_func op_52f9_12_nf; +extern cpuop_func op_52f9_12_ff; +extern cpuop_func op_53c0_12_nf; +extern cpuop_func op_53c0_12_ff; +extern cpuop_func op_53c8_12_nf; +extern cpuop_func op_53c8_12_ff; +extern cpuop_func op_53d0_12_nf; +extern cpuop_func op_53d0_12_ff; +extern cpuop_func op_53d8_12_nf; +extern cpuop_func op_53d8_12_ff; +extern cpuop_func op_53e0_12_nf; +extern cpuop_func op_53e0_12_ff; +extern cpuop_func op_53e8_12_nf; +extern cpuop_func op_53e8_12_ff; +extern cpuop_func op_53f0_12_nf; +extern cpuop_func op_53f0_12_ff; +extern cpuop_func op_53f8_12_nf; +extern cpuop_func op_53f8_12_ff; +extern cpuop_func op_53f9_12_nf; +extern cpuop_func op_53f9_12_ff; +extern cpuop_func op_54c0_12_nf; +extern cpuop_func op_54c0_12_ff; +extern cpuop_func op_54c8_12_nf; +extern cpuop_func op_54c8_12_ff; +extern cpuop_func op_54d0_12_nf; +extern cpuop_func op_54d0_12_ff; +extern cpuop_func op_54d8_12_nf; +extern cpuop_func op_54d8_12_ff; +extern cpuop_func op_54e0_12_nf; +extern cpuop_func op_54e0_12_ff; +extern cpuop_func op_54e8_12_nf; +extern cpuop_func op_54e8_12_ff; +extern cpuop_func op_54f0_12_nf; +extern cpuop_func op_54f0_12_ff; +extern cpuop_func op_54f8_12_nf; +extern cpuop_func op_54f8_12_ff; +extern cpuop_func op_54f9_12_nf; +extern cpuop_func op_54f9_12_ff; +extern cpuop_func op_55c0_12_nf; +extern cpuop_func op_55c0_12_ff; +extern cpuop_func op_55c8_12_nf; +extern cpuop_func op_55c8_12_ff; +extern cpuop_func op_55d0_12_nf; +extern cpuop_func op_55d0_12_ff; +extern cpuop_func op_55d8_12_nf; +extern cpuop_func op_55d8_12_ff; +extern cpuop_func op_55e0_12_nf; +extern cpuop_func op_55e0_12_ff; +extern cpuop_func op_55e8_12_nf; +extern cpuop_func op_55e8_12_ff; +extern cpuop_func op_55f0_12_nf; +extern cpuop_func op_55f0_12_ff; +extern cpuop_func op_55f8_12_nf; +extern cpuop_func op_55f8_12_ff; +extern cpuop_func op_55f9_12_nf; +extern cpuop_func op_55f9_12_ff; +extern cpuop_func op_56c0_12_nf; +extern cpuop_func op_56c0_12_ff; +extern cpuop_func op_56c8_12_nf; +extern cpuop_func op_56c8_12_ff; +extern cpuop_func op_56d0_12_nf; +extern cpuop_func op_56d0_12_ff; +extern cpuop_func op_56d8_12_nf; +extern cpuop_func op_56d8_12_ff; +extern cpuop_func op_56e0_12_nf; +extern cpuop_func op_56e0_12_ff; +extern cpuop_func op_56e8_12_nf; +extern cpuop_func op_56e8_12_ff; +extern cpuop_func op_56f0_12_nf; +extern cpuop_func op_56f0_12_ff; +extern cpuop_func op_56f8_12_nf; +extern cpuop_func op_56f8_12_ff; +extern cpuop_func op_56f9_12_nf; +extern cpuop_func op_56f9_12_ff; +extern cpuop_func op_57c0_12_nf; +extern cpuop_func op_57c0_12_ff; +extern cpuop_func op_57c8_12_nf; +extern cpuop_func op_57c8_12_ff; +extern cpuop_func op_57d0_12_nf; +extern cpuop_func op_57d0_12_ff; +extern cpuop_func op_57d8_12_nf; +extern cpuop_func op_57d8_12_ff; +extern cpuop_func op_57e0_12_nf; +extern cpuop_func op_57e0_12_ff; +extern cpuop_func op_57e8_12_nf; +extern cpuop_func op_57e8_12_ff; +extern cpuop_func op_57f0_12_nf; +extern cpuop_func op_57f0_12_ff; +extern cpuop_func op_57f8_12_nf; +extern cpuop_func op_57f8_12_ff; +extern cpuop_func op_57f9_12_nf; +extern cpuop_func op_57f9_12_ff; +extern cpuop_func op_58c0_12_nf; +extern cpuop_func op_58c0_12_ff; +extern cpuop_func op_58c8_12_nf; +extern cpuop_func op_58c8_12_ff; +extern cpuop_func op_58d0_12_nf; +extern cpuop_func op_58d0_12_ff; +extern cpuop_func op_58d8_12_nf; +extern cpuop_func op_58d8_12_ff; +extern cpuop_func op_58e0_12_nf; +extern cpuop_func op_58e0_12_ff; +extern cpuop_func op_58e8_12_nf; +extern cpuop_func op_58e8_12_ff; +extern cpuop_func op_58f0_12_nf; +extern cpuop_func op_58f0_12_ff; +extern cpuop_func op_58f8_12_nf; +extern cpuop_func op_58f8_12_ff; +extern cpuop_func op_58f9_12_nf; +extern cpuop_func op_58f9_12_ff; +extern cpuop_func op_59c0_12_nf; +extern cpuop_func op_59c0_12_ff; +extern cpuop_func op_59c8_12_nf; +extern cpuop_func op_59c8_12_ff; +extern cpuop_func op_59d0_12_nf; +extern cpuop_func op_59d0_12_ff; +extern cpuop_func op_59d8_12_nf; +extern cpuop_func op_59d8_12_ff; +extern cpuop_func op_59e0_12_nf; +extern cpuop_func op_59e0_12_ff; +extern cpuop_func op_59e8_12_nf; +extern cpuop_func op_59e8_12_ff; +extern cpuop_func op_59f0_12_nf; +extern cpuop_func op_59f0_12_ff; +extern cpuop_func op_59f8_12_nf; +extern cpuop_func op_59f8_12_ff; +extern cpuop_func op_59f9_12_nf; +extern cpuop_func op_59f9_12_ff; +extern cpuop_func op_5ac0_12_nf; +extern cpuop_func op_5ac0_12_ff; +extern cpuop_func op_5ac8_12_nf; +extern cpuop_func op_5ac8_12_ff; +extern cpuop_func op_5ad0_12_nf; +extern cpuop_func op_5ad0_12_ff; +extern cpuop_func op_5ad8_12_nf; +extern cpuop_func op_5ad8_12_ff; +extern cpuop_func op_5ae0_12_nf; +extern cpuop_func op_5ae0_12_ff; +extern cpuop_func op_5ae8_12_nf; +extern cpuop_func op_5ae8_12_ff; +extern cpuop_func op_5af0_12_nf; +extern cpuop_func op_5af0_12_ff; +extern cpuop_func op_5af8_12_nf; +extern cpuop_func op_5af8_12_ff; +extern cpuop_func op_5af9_12_nf; +extern cpuop_func op_5af9_12_ff; +extern cpuop_func op_5bc0_12_nf; +extern cpuop_func op_5bc0_12_ff; +extern cpuop_func op_5bc8_12_nf; +extern cpuop_func op_5bc8_12_ff; +extern cpuop_func op_5bd0_12_nf; +extern cpuop_func op_5bd0_12_ff; +extern cpuop_func op_5bd8_12_nf; +extern cpuop_func op_5bd8_12_ff; +extern cpuop_func op_5be0_12_nf; +extern cpuop_func op_5be0_12_ff; +extern cpuop_func op_5be8_12_nf; +extern cpuop_func op_5be8_12_ff; +extern cpuop_func op_5bf0_12_nf; +extern cpuop_func op_5bf0_12_ff; +extern cpuop_func op_5bf8_12_nf; +extern cpuop_func op_5bf8_12_ff; +extern cpuop_func op_5bf9_12_nf; +extern cpuop_func op_5bf9_12_ff; +extern cpuop_func op_5cc0_12_nf; +extern cpuop_func op_5cc0_12_ff; +extern cpuop_func op_5cc8_12_nf; +extern cpuop_func op_5cc8_12_ff; +extern cpuop_func op_5cd0_12_nf; +extern cpuop_func op_5cd0_12_ff; +extern cpuop_func op_5cd8_12_nf; +extern cpuop_func op_5cd8_12_ff; +extern cpuop_func op_5ce0_12_nf; +extern cpuop_func op_5ce0_12_ff; +extern cpuop_func op_5ce8_12_nf; +extern cpuop_func op_5ce8_12_ff; +extern cpuop_func op_5cf0_12_nf; +extern cpuop_func op_5cf0_12_ff; +extern cpuop_func op_5cf8_12_nf; +extern cpuop_func op_5cf8_12_ff; +extern cpuop_func op_5cf9_12_nf; +extern cpuop_func op_5cf9_12_ff; +extern cpuop_func op_5dc0_12_nf; +extern cpuop_func op_5dc0_12_ff; +extern cpuop_func op_5dc8_12_nf; +extern cpuop_func op_5dc8_12_ff; +extern cpuop_func op_5dd0_12_nf; +extern cpuop_func op_5dd0_12_ff; +extern cpuop_func op_5dd8_12_nf; +extern cpuop_func op_5dd8_12_ff; +extern cpuop_func op_5de0_12_nf; +extern cpuop_func op_5de0_12_ff; +extern cpuop_func op_5de8_12_nf; +extern cpuop_func op_5de8_12_ff; +extern cpuop_func op_5df0_12_nf; +extern cpuop_func op_5df0_12_ff; +extern cpuop_func op_5df8_12_nf; +extern cpuop_func op_5df8_12_ff; +extern cpuop_func op_5df9_12_nf; +extern cpuop_func op_5df9_12_ff; +extern cpuop_func op_5ec0_12_nf; +extern cpuop_func op_5ec0_12_ff; +extern cpuop_func op_5ec8_12_nf; +extern cpuop_func op_5ec8_12_ff; +extern cpuop_func op_5ed0_12_nf; +extern cpuop_func op_5ed0_12_ff; +extern cpuop_func op_5ed8_12_nf; +extern cpuop_func op_5ed8_12_ff; +extern cpuop_func op_5ee0_12_nf; +extern cpuop_func op_5ee0_12_ff; +extern cpuop_func op_5ee8_12_nf; +extern cpuop_func op_5ee8_12_ff; +extern cpuop_func op_5ef0_12_nf; +extern cpuop_func op_5ef0_12_ff; +extern cpuop_func op_5ef8_12_nf; +extern cpuop_func op_5ef8_12_ff; +extern cpuop_func op_5ef9_12_nf; +extern cpuop_func op_5ef9_12_ff; +extern cpuop_func op_5fc0_12_nf; +extern cpuop_func op_5fc0_12_ff; +extern cpuop_func op_5fc8_12_nf; +extern cpuop_func op_5fc8_12_ff; +extern cpuop_func op_5fd0_12_nf; +extern cpuop_func op_5fd0_12_ff; +extern cpuop_func op_5fd8_12_nf; +extern cpuop_func op_5fd8_12_ff; +extern cpuop_func op_5fe0_12_nf; +extern cpuop_func op_5fe0_12_ff; +extern cpuop_func op_5fe8_12_nf; +extern cpuop_func op_5fe8_12_ff; +extern cpuop_func op_5ff0_12_nf; +extern cpuop_func op_5ff0_12_ff; +extern cpuop_func op_5ff8_12_nf; +extern cpuop_func op_5ff8_12_ff; +extern cpuop_func op_5ff9_12_nf; +extern cpuop_func op_5ff9_12_ff; +extern cpuop_func op_6000_12_nf; +extern cpuop_func op_6000_12_ff; +extern cpuop_func op_6001_12_nf; +extern cpuop_func op_6001_12_ff; +extern cpuop_func op_60ff_12_nf; +extern cpuop_func op_60ff_12_ff; +extern cpuop_func op_6100_12_nf; +extern cpuop_func op_6100_12_ff; +extern cpuop_func op_6101_12_nf; +extern cpuop_func op_6101_12_ff; +extern cpuop_func op_61ff_12_nf; +extern cpuop_func op_61ff_12_ff; +extern cpuop_func op_6200_12_nf; +extern cpuop_func op_6200_12_ff; +extern cpuop_func op_6201_12_nf; +extern cpuop_func op_6201_12_ff; +extern cpuop_func op_62ff_12_nf; +extern cpuop_func op_62ff_12_ff; +extern cpuop_func op_6300_12_nf; +extern cpuop_func op_6300_12_ff; +extern cpuop_func op_6301_12_nf; +extern cpuop_func op_6301_12_ff; +extern cpuop_func op_63ff_12_nf; +extern cpuop_func op_63ff_12_ff; +extern cpuop_func op_6400_12_nf; +extern cpuop_func op_6400_12_ff; +extern cpuop_func op_6401_12_nf; +extern cpuop_func op_6401_12_ff; +extern cpuop_func op_64ff_12_nf; +extern cpuop_func op_64ff_12_ff; +extern cpuop_func op_6500_12_nf; +extern cpuop_func op_6500_12_ff; +extern cpuop_func op_6501_12_nf; +extern cpuop_func op_6501_12_ff; +extern cpuop_func op_65ff_12_nf; +extern cpuop_func op_65ff_12_ff; +extern cpuop_func op_6600_12_nf; +extern cpuop_func op_6600_12_ff; +extern cpuop_func op_6601_12_nf; +extern cpuop_func op_6601_12_ff; +extern cpuop_func op_66ff_12_nf; +extern cpuop_func op_66ff_12_ff; +extern cpuop_func op_6700_12_nf; +extern cpuop_func op_6700_12_ff; +extern cpuop_func op_6701_12_nf; +extern cpuop_func op_6701_12_ff; +extern cpuop_func op_67ff_12_nf; +extern cpuop_func op_67ff_12_ff; +extern cpuop_func op_6800_12_nf; +extern cpuop_func op_6800_12_ff; +extern cpuop_func op_6801_12_nf; +extern cpuop_func op_6801_12_ff; +extern cpuop_func op_68ff_12_nf; +extern cpuop_func op_68ff_12_ff; +extern cpuop_func op_6900_12_nf; +extern cpuop_func op_6900_12_ff; +extern cpuop_func op_6901_12_nf; +extern cpuop_func op_6901_12_ff; +extern cpuop_func op_69ff_12_nf; +extern cpuop_func op_69ff_12_ff; +extern cpuop_func op_6a00_12_nf; +extern cpuop_func op_6a00_12_ff; +extern cpuop_func op_6a01_12_nf; +extern cpuop_func op_6a01_12_ff; +extern cpuop_func op_6aff_12_nf; +extern cpuop_func op_6aff_12_ff; +extern cpuop_func op_6b00_12_nf; +extern cpuop_func op_6b00_12_ff; +extern cpuop_func op_6b01_12_nf; +extern cpuop_func op_6b01_12_ff; +extern cpuop_func op_6bff_12_nf; +extern cpuop_func op_6bff_12_ff; +extern cpuop_func op_6c00_12_nf; +extern cpuop_func op_6c00_12_ff; +extern cpuop_func op_6c01_12_nf; +extern cpuop_func op_6c01_12_ff; +extern cpuop_func op_6cff_12_nf; +extern cpuop_func op_6cff_12_ff; +extern cpuop_func op_6d00_12_nf; +extern cpuop_func op_6d00_12_ff; +extern cpuop_func op_6d01_12_nf; +extern cpuop_func op_6d01_12_ff; +extern cpuop_func op_6dff_12_nf; +extern cpuop_func op_6dff_12_ff; +extern cpuop_func op_6e00_12_nf; +extern cpuop_func op_6e00_12_ff; +extern cpuop_func op_6e01_12_nf; +extern cpuop_func op_6e01_12_ff; +extern cpuop_func op_6eff_12_nf; +extern cpuop_func op_6eff_12_ff; +extern cpuop_func op_6f00_12_nf; +extern cpuop_func op_6f00_12_ff; +extern cpuop_func op_6f01_12_nf; +extern cpuop_func op_6f01_12_ff; +extern cpuop_func op_6fff_12_nf; +extern cpuop_func op_6fff_12_ff; +extern cpuop_func op_7000_12_nf; +extern cpuop_func op_7000_12_ff; +extern cpuop_func op_8000_12_nf; +extern cpuop_func op_8000_12_ff; +extern cpuop_func op_8010_12_nf; +extern cpuop_func op_8010_12_ff; +extern cpuop_func op_8018_12_nf; +extern cpuop_func op_8018_12_ff; +extern cpuop_func op_8020_12_nf; +extern cpuop_func op_8020_12_ff; +extern cpuop_func op_8028_12_nf; +extern cpuop_func op_8028_12_ff; +extern cpuop_func op_8030_12_nf; +extern cpuop_func op_8030_12_ff; +extern cpuop_func op_8038_12_nf; +extern cpuop_func op_8038_12_ff; +extern cpuop_func op_8039_12_nf; +extern cpuop_func op_8039_12_ff; +extern cpuop_func op_803a_12_nf; +extern cpuop_func op_803a_12_ff; +extern cpuop_func op_803b_12_nf; +extern cpuop_func op_803b_12_ff; +extern cpuop_func op_803c_12_nf; +extern cpuop_func op_803c_12_ff; +extern cpuop_func op_8040_12_nf; +extern cpuop_func op_8040_12_ff; +extern cpuop_func op_8050_12_nf; +extern cpuop_func op_8050_12_ff; +extern cpuop_func op_8058_12_nf; +extern cpuop_func op_8058_12_ff; +extern cpuop_func op_8060_12_nf; +extern cpuop_func op_8060_12_ff; +extern cpuop_func op_8068_12_nf; +extern cpuop_func op_8068_12_ff; +extern cpuop_func op_8070_12_nf; +extern cpuop_func op_8070_12_ff; +extern cpuop_func op_8078_12_nf; +extern cpuop_func op_8078_12_ff; +extern cpuop_func op_8079_12_nf; +extern cpuop_func op_8079_12_ff; +extern cpuop_func op_807a_12_nf; +extern cpuop_func op_807a_12_ff; +extern cpuop_func op_807b_12_nf; +extern cpuop_func op_807b_12_ff; +extern cpuop_func op_807c_12_nf; +extern cpuop_func op_807c_12_ff; +extern cpuop_func op_8080_12_nf; +extern cpuop_func op_8080_12_ff; +extern cpuop_func op_8090_12_nf; +extern cpuop_func op_8090_12_ff; +extern cpuop_func op_8098_12_nf; +extern cpuop_func op_8098_12_ff; +extern cpuop_func op_80a0_12_nf; +extern cpuop_func op_80a0_12_ff; +extern cpuop_func op_80a8_12_nf; +extern cpuop_func op_80a8_12_ff; +extern cpuop_func op_80b0_12_nf; +extern cpuop_func op_80b0_12_ff; +extern cpuop_func op_80b8_12_nf; +extern cpuop_func op_80b8_12_ff; +extern cpuop_func op_80b9_12_nf; +extern cpuop_func op_80b9_12_ff; +extern cpuop_func op_80ba_12_nf; +extern cpuop_func op_80ba_12_ff; +extern cpuop_func op_80bb_12_nf; +extern cpuop_func op_80bb_12_ff; +extern cpuop_func op_80bc_12_nf; +extern cpuop_func op_80bc_12_ff; +extern cpuop_func op_80c0_12_nf; +extern cpuop_func op_80c0_12_ff; +extern cpuop_func op_80d0_12_nf; +extern cpuop_func op_80d0_12_ff; +extern cpuop_func op_80d8_12_nf; +extern cpuop_func op_80d8_12_ff; +extern cpuop_func op_80e0_12_nf; +extern cpuop_func op_80e0_12_ff; +extern cpuop_func op_80e8_12_nf; +extern cpuop_func op_80e8_12_ff; +extern cpuop_func op_80f0_12_nf; +extern cpuop_func op_80f0_12_ff; +extern cpuop_func op_80f8_12_nf; +extern cpuop_func op_80f8_12_ff; +extern cpuop_func op_80f9_12_nf; +extern cpuop_func op_80f9_12_ff; +extern cpuop_func op_80fa_12_nf; +extern cpuop_func op_80fa_12_ff; +extern cpuop_func op_80fb_12_nf; +extern cpuop_func op_80fb_12_ff; +extern cpuop_func op_80fc_12_nf; +extern cpuop_func op_80fc_12_ff; +extern cpuop_func op_8100_12_nf; +extern cpuop_func op_8100_12_ff; +extern cpuop_func op_8108_12_nf; +extern cpuop_func op_8108_12_ff; +extern cpuop_func op_8110_12_nf; +extern cpuop_func op_8110_12_ff; +extern cpuop_func op_8118_12_nf; +extern cpuop_func op_8118_12_ff; +extern cpuop_func op_8120_12_nf; +extern cpuop_func op_8120_12_ff; +extern cpuop_func op_8128_12_nf; +extern cpuop_func op_8128_12_ff; +extern cpuop_func op_8130_12_nf; +extern cpuop_func op_8130_12_ff; +extern cpuop_func op_8138_12_nf; +extern cpuop_func op_8138_12_ff; +extern cpuop_func op_8139_12_nf; +extern cpuop_func op_8139_12_ff; +extern cpuop_func op_8150_12_nf; +extern cpuop_func op_8150_12_ff; +extern cpuop_func op_8158_12_nf; +extern cpuop_func op_8158_12_ff; +extern cpuop_func op_8160_12_nf; +extern cpuop_func op_8160_12_ff; +extern cpuop_func op_8168_12_nf; +extern cpuop_func op_8168_12_ff; +extern cpuop_func op_8170_12_nf; +extern cpuop_func op_8170_12_ff; +extern cpuop_func op_8178_12_nf; +extern cpuop_func op_8178_12_ff; +extern cpuop_func op_8179_12_nf; +extern cpuop_func op_8179_12_ff; +extern cpuop_func op_8190_12_nf; +extern cpuop_func op_8190_12_ff; +extern cpuop_func op_8198_12_nf; +extern cpuop_func op_8198_12_ff; +extern cpuop_func op_81a0_12_nf; +extern cpuop_func op_81a0_12_ff; +extern cpuop_func op_81a8_12_nf; +extern cpuop_func op_81a8_12_ff; +extern cpuop_func op_81b0_12_nf; +extern cpuop_func op_81b0_12_ff; +extern cpuop_func op_81b8_12_nf; +extern cpuop_func op_81b8_12_ff; +extern cpuop_func op_81b9_12_nf; +extern cpuop_func op_81b9_12_ff; +extern cpuop_func op_81c0_12_nf; +extern cpuop_func op_81c0_12_ff; +extern cpuop_func op_81d0_12_nf; +extern cpuop_func op_81d0_12_ff; +extern cpuop_func op_81d8_12_nf; +extern cpuop_func op_81d8_12_ff; +extern cpuop_func op_81e0_12_nf; +extern cpuop_func op_81e0_12_ff; +extern cpuop_func op_81e8_12_nf; +extern cpuop_func op_81e8_12_ff; +extern cpuop_func op_81f0_12_nf; +extern cpuop_func op_81f0_12_ff; +extern cpuop_func op_81f8_12_nf; +extern cpuop_func op_81f8_12_ff; +extern cpuop_func op_81f9_12_nf; +extern cpuop_func op_81f9_12_ff; +extern cpuop_func op_81fa_12_nf; +extern cpuop_func op_81fa_12_ff; +extern cpuop_func op_81fb_12_nf; +extern cpuop_func op_81fb_12_ff; +extern cpuop_func op_81fc_12_nf; +extern cpuop_func op_81fc_12_ff; +extern cpuop_func op_9000_12_nf; +extern cpuop_func op_9000_12_ff; +extern cpuop_func op_9010_12_nf; +extern cpuop_func op_9010_12_ff; +extern cpuop_func op_9018_12_nf; +extern cpuop_func op_9018_12_ff; +extern cpuop_func op_9020_12_nf; +extern cpuop_func op_9020_12_ff; +extern cpuop_func op_9028_12_nf; +extern cpuop_func op_9028_12_ff; +extern cpuop_func op_9030_12_nf; +extern cpuop_func op_9030_12_ff; +extern cpuop_func op_9038_12_nf; +extern cpuop_func op_9038_12_ff; +extern cpuop_func op_9039_12_nf; +extern cpuop_func op_9039_12_ff; +extern cpuop_func op_903a_12_nf; +extern cpuop_func op_903a_12_ff; +extern cpuop_func op_903b_12_nf; +extern cpuop_func op_903b_12_ff; +extern cpuop_func op_903c_12_nf; +extern cpuop_func op_903c_12_ff; +extern cpuop_func op_9040_12_nf; +extern cpuop_func op_9040_12_ff; +extern cpuop_func op_9048_12_nf; +extern cpuop_func op_9048_12_ff; +extern cpuop_func op_9050_12_nf; +extern cpuop_func op_9050_12_ff; +extern cpuop_func op_9058_12_nf; +extern cpuop_func op_9058_12_ff; +extern cpuop_func op_9060_12_nf; +extern cpuop_func op_9060_12_ff; +extern cpuop_func op_9068_12_nf; +extern cpuop_func op_9068_12_ff; +extern cpuop_func op_9070_12_nf; +extern cpuop_func op_9070_12_ff; +extern cpuop_func op_9078_12_nf; +extern cpuop_func op_9078_12_ff; +extern cpuop_func op_9079_12_nf; +extern cpuop_func op_9079_12_ff; +extern cpuop_func op_907a_12_nf; +extern cpuop_func op_907a_12_ff; +extern cpuop_func op_907b_12_nf; +extern cpuop_func op_907b_12_ff; +extern cpuop_func op_907c_12_nf; +extern cpuop_func op_907c_12_ff; +extern cpuop_func op_9080_12_nf; +extern cpuop_func op_9080_12_ff; +extern cpuop_func op_9088_12_nf; +extern cpuop_func op_9088_12_ff; +extern cpuop_func op_9090_12_nf; +extern cpuop_func op_9090_12_ff; +extern cpuop_func op_9098_12_nf; +extern cpuop_func op_9098_12_ff; +extern cpuop_func op_90a0_12_nf; +extern cpuop_func op_90a0_12_ff; +extern cpuop_func op_90a8_12_nf; +extern cpuop_func op_90a8_12_ff; +extern cpuop_func op_90b0_12_nf; +extern cpuop_func op_90b0_12_ff; +extern cpuop_func op_90b8_12_nf; +extern cpuop_func op_90b8_12_ff; +extern cpuop_func op_90b9_12_nf; +extern cpuop_func op_90b9_12_ff; +extern cpuop_func op_90ba_12_nf; +extern cpuop_func op_90ba_12_ff; +extern cpuop_func op_90bb_12_nf; +extern cpuop_func op_90bb_12_ff; +extern cpuop_func op_90bc_12_nf; +extern cpuop_func op_90bc_12_ff; +extern cpuop_func op_90c0_12_nf; +extern cpuop_func op_90c0_12_ff; +extern cpuop_func op_90c8_12_nf; +extern cpuop_func op_90c8_12_ff; +extern cpuop_func op_90d0_12_nf; +extern cpuop_func op_90d0_12_ff; +extern cpuop_func op_90d8_12_nf; +extern cpuop_func op_90d8_12_ff; +extern cpuop_func op_90e0_12_nf; +extern cpuop_func op_90e0_12_ff; +extern cpuop_func op_90e8_12_nf; +extern cpuop_func op_90e8_12_ff; +extern cpuop_func op_90f0_12_nf; +extern cpuop_func op_90f0_12_ff; +extern cpuop_func op_90f8_12_nf; +extern cpuop_func op_90f8_12_ff; +extern cpuop_func op_90f9_12_nf; +extern cpuop_func op_90f9_12_ff; +extern cpuop_func op_90fa_12_nf; +extern cpuop_func op_90fa_12_ff; +extern cpuop_func op_90fb_12_nf; +extern cpuop_func op_90fb_12_ff; +extern cpuop_func op_90fc_12_nf; +extern cpuop_func op_90fc_12_ff; +extern cpuop_func op_9100_12_nf; +extern cpuop_func op_9100_12_ff; +extern cpuop_func op_9108_12_nf; +extern cpuop_func op_9108_12_ff; +extern cpuop_func op_9110_12_nf; +extern cpuop_func op_9110_12_ff; +extern cpuop_func op_9118_12_nf; +extern cpuop_func op_9118_12_ff; +extern cpuop_func op_9120_12_nf; +extern cpuop_func op_9120_12_ff; +extern cpuop_func op_9128_12_nf; +extern cpuop_func op_9128_12_ff; +extern cpuop_func op_9130_12_nf; +extern cpuop_func op_9130_12_ff; +extern cpuop_func op_9138_12_nf; +extern cpuop_func op_9138_12_ff; +extern cpuop_func op_9139_12_nf; +extern cpuop_func op_9139_12_ff; +extern cpuop_func op_9140_12_nf; +extern cpuop_func op_9140_12_ff; +extern cpuop_func op_9148_12_nf; +extern cpuop_func op_9148_12_ff; +extern cpuop_func op_9150_12_nf; +extern cpuop_func op_9150_12_ff; +extern cpuop_func op_9158_12_nf; +extern cpuop_func op_9158_12_ff; +extern cpuop_func op_9160_12_nf; +extern cpuop_func op_9160_12_ff; +extern cpuop_func op_9168_12_nf; +extern cpuop_func op_9168_12_ff; +extern cpuop_func op_9170_12_nf; +extern cpuop_func op_9170_12_ff; +extern cpuop_func op_9178_12_nf; +extern cpuop_func op_9178_12_ff; +extern cpuop_func op_9179_12_nf; +extern cpuop_func op_9179_12_ff; +extern cpuop_func op_9180_12_nf; +extern cpuop_func op_9180_12_ff; +extern cpuop_func op_9188_12_nf; +extern cpuop_func op_9188_12_ff; +extern cpuop_func op_9190_12_nf; +extern cpuop_func op_9190_12_ff; +extern cpuop_func op_9198_12_nf; +extern cpuop_func op_9198_12_ff; +extern cpuop_func op_91a0_12_nf; +extern cpuop_func op_91a0_12_ff; +extern cpuop_func op_91a8_12_nf; +extern cpuop_func op_91a8_12_ff; +extern cpuop_func op_91b0_12_nf; +extern cpuop_func op_91b0_12_ff; +extern cpuop_func op_91b8_12_nf; +extern cpuop_func op_91b8_12_ff; +extern cpuop_func op_91b9_12_nf; +extern cpuop_func op_91b9_12_ff; +extern cpuop_func op_91c0_12_nf; +extern cpuop_func op_91c0_12_ff; +extern cpuop_func op_91c8_12_nf; +extern cpuop_func op_91c8_12_ff; +extern cpuop_func op_91d0_12_nf; +extern cpuop_func op_91d0_12_ff; +extern cpuop_func op_91d8_12_nf; +extern cpuop_func op_91d8_12_ff; +extern cpuop_func op_91e0_12_nf; +extern cpuop_func op_91e0_12_ff; +extern cpuop_func op_91e8_12_nf; +extern cpuop_func op_91e8_12_ff; +extern cpuop_func op_91f0_12_nf; +extern cpuop_func op_91f0_12_ff; +extern cpuop_func op_91f8_12_nf; +extern cpuop_func op_91f8_12_ff; +extern cpuop_func op_91f9_12_nf; +extern cpuop_func op_91f9_12_ff; +extern cpuop_func op_91fa_12_nf; +extern cpuop_func op_91fa_12_ff; +extern cpuop_func op_91fb_12_nf; +extern cpuop_func op_91fb_12_ff; +extern cpuop_func op_91fc_12_nf; +extern cpuop_func op_91fc_12_ff; +extern cpuop_func op_b000_12_nf; +extern cpuop_func op_b000_12_ff; +extern cpuop_func op_b010_12_nf; +extern cpuop_func op_b010_12_ff; +extern cpuop_func op_b018_12_nf; +extern cpuop_func op_b018_12_ff; +extern cpuop_func op_b020_12_nf; +extern cpuop_func op_b020_12_ff; +extern cpuop_func op_b028_12_nf; +extern cpuop_func op_b028_12_ff; +extern cpuop_func op_b030_12_nf; +extern cpuop_func op_b030_12_ff; +extern cpuop_func op_b038_12_nf; +extern cpuop_func op_b038_12_ff; +extern cpuop_func op_b039_12_nf; +extern cpuop_func op_b039_12_ff; +extern cpuop_func op_b03a_12_nf; +extern cpuop_func op_b03a_12_ff; +extern cpuop_func op_b03b_12_nf; +extern cpuop_func op_b03b_12_ff; +extern cpuop_func op_b03c_12_nf; +extern cpuop_func op_b03c_12_ff; +extern cpuop_func op_b040_12_nf; +extern cpuop_func op_b040_12_ff; +extern cpuop_func op_b048_12_nf; +extern cpuop_func op_b048_12_ff; +extern cpuop_func op_b050_12_nf; +extern cpuop_func op_b050_12_ff; +extern cpuop_func op_b058_12_nf; +extern cpuop_func op_b058_12_ff; +extern cpuop_func op_b060_12_nf; +extern cpuop_func op_b060_12_ff; +extern cpuop_func op_b068_12_nf; +extern cpuop_func op_b068_12_ff; +extern cpuop_func op_b070_12_nf; +extern cpuop_func op_b070_12_ff; +extern cpuop_func op_b078_12_nf; +extern cpuop_func op_b078_12_ff; +extern cpuop_func op_b079_12_nf; +extern cpuop_func op_b079_12_ff; +extern cpuop_func op_b07a_12_nf; +extern cpuop_func op_b07a_12_ff; +extern cpuop_func op_b07b_12_nf; +extern cpuop_func op_b07b_12_ff; +extern cpuop_func op_b07c_12_nf; +extern cpuop_func op_b07c_12_ff; +extern cpuop_func op_b080_12_nf; +extern cpuop_func op_b080_12_ff; +extern cpuop_func op_b088_12_nf; +extern cpuop_func op_b088_12_ff; +extern cpuop_func op_b090_12_nf; +extern cpuop_func op_b090_12_ff; +extern cpuop_func op_b098_12_nf; +extern cpuop_func op_b098_12_ff; +extern cpuop_func op_b0a0_12_nf; +extern cpuop_func op_b0a0_12_ff; +extern cpuop_func op_b0a8_12_nf; +extern cpuop_func op_b0a8_12_ff; +extern cpuop_func op_b0b0_12_nf; +extern cpuop_func op_b0b0_12_ff; +extern cpuop_func op_b0b8_12_nf; +extern cpuop_func op_b0b8_12_ff; +extern cpuop_func op_b0b9_12_nf; +extern cpuop_func op_b0b9_12_ff; +extern cpuop_func op_b0ba_12_nf; +extern cpuop_func op_b0ba_12_ff; +extern cpuop_func op_b0bb_12_nf; +extern cpuop_func op_b0bb_12_ff; +extern cpuop_func op_b0bc_12_nf; +extern cpuop_func op_b0bc_12_ff; +extern cpuop_func op_b0c0_12_nf; +extern cpuop_func op_b0c0_12_ff; +extern cpuop_func op_b0c8_12_nf; +extern cpuop_func op_b0c8_12_ff; +extern cpuop_func op_b0d0_12_nf; +extern cpuop_func op_b0d0_12_ff; +extern cpuop_func op_b0d8_12_nf; +extern cpuop_func op_b0d8_12_ff; +extern cpuop_func op_b0e0_12_nf; +extern cpuop_func op_b0e0_12_ff; +extern cpuop_func op_b0e8_12_nf; +extern cpuop_func op_b0e8_12_ff; +extern cpuop_func op_b0f0_12_nf; +extern cpuop_func op_b0f0_12_ff; +extern cpuop_func op_b0f8_12_nf; +extern cpuop_func op_b0f8_12_ff; +extern cpuop_func op_b0f9_12_nf; +extern cpuop_func op_b0f9_12_ff; +extern cpuop_func op_b0fa_12_nf; +extern cpuop_func op_b0fa_12_ff; +extern cpuop_func op_b0fb_12_nf; +extern cpuop_func op_b0fb_12_ff; +extern cpuop_func op_b0fc_12_nf; +extern cpuop_func op_b0fc_12_ff; +extern cpuop_func op_b100_12_nf; +extern cpuop_func op_b100_12_ff; +extern cpuop_func op_b108_12_nf; +extern cpuop_func op_b108_12_ff; +extern cpuop_func op_b110_12_nf; +extern cpuop_func op_b110_12_ff; +extern cpuop_func op_b118_12_nf; +extern cpuop_func op_b118_12_ff; +extern cpuop_func op_b120_12_nf; +extern cpuop_func op_b120_12_ff; +extern cpuop_func op_b128_12_nf; +extern cpuop_func op_b128_12_ff; +extern cpuop_func op_b130_12_nf; +extern cpuop_func op_b130_12_ff; +extern cpuop_func op_b138_12_nf; +extern cpuop_func op_b138_12_ff; +extern cpuop_func op_b139_12_nf; +extern cpuop_func op_b139_12_ff; +extern cpuop_func op_b140_12_nf; +extern cpuop_func op_b140_12_ff; +extern cpuop_func op_b148_12_nf; +extern cpuop_func op_b148_12_ff; +extern cpuop_func op_b150_12_nf; +extern cpuop_func op_b150_12_ff; +extern cpuop_func op_b158_12_nf; +extern cpuop_func op_b158_12_ff; +extern cpuop_func op_b160_12_nf; +extern cpuop_func op_b160_12_ff; +extern cpuop_func op_b168_12_nf; +extern cpuop_func op_b168_12_ff; +extern cpuop_func op_b170_12_nf; +extern cpuop_func op_b170_12_ff; +extern cpuop_func op_b178_12_nf; +extern cpuop_func op_b178_12_ff; +extern cpuop_func op_b179_12_nf; +extern cpuop_func op_b179_12_ff; +extern cpuop_func op_b180_12_nf; +extern cpuop_func op_b180_12_ff; +extern cpuop_func op_b188_12_nf; +extern cpuop_func op_b188_12_ff; +extern cpuop_func op_b190_12_nf; +extern cpuop_func op_b190_12_ff; +extern cpuop_func op_b198_12_nf; +extern cpuop_func op_b198_12_ff; +extern cpuop_func op_b1a0_12_nf; +extern cpuop_func op_b1a0_12_ff; +extern cpuop_func op_b1a8_12_nf; +extern cpuop_func op_b1a8_12_ff; +extern cpuop_func op_b1b0_12_nf; +extern cpuop_func op_b1b0_12_ff; +extern cpuop_func op_b1b8_12_nf; +extern cpuop_func op_b1b8_12_ff; +extern cpuop_func op_b1b9_12_nf; +extern cpuop_func op_b1b9_12_ff; +extern cpuop_func op_b1c0_12_nf; +extern cpuop_func op_b1c0_12_ff; +extern cpuop_func op_b1c8_12_nf; +extern cpuop_func op_b1c8_12_ff; +extern cpuop_func op_b1d0_12_nf; +extern cpuop_func op_b1d0_12_ff; +extern cpuop_func op_b1d8_12_nf; +extern cpuop_func op_b1d8_12_ff; +extern cpuop_func op_b1e0_12_nf; +extern cpuop_func op_b1e0_12_ff; +extern cpuop_func op_b1e8_12_nf; +extern cpuop_func op_b1e8_12_ff; +extern cpuop_func op_b1f0_12_nf; +extern cpuop_func op_b1f0_12_ff; +extern cpuop_func op_b1f8_12_nf; +extern cpuop_func op_b1f8_12_ff; +extern cpuop_func op_b1f9_12_nf; +extern cpuop_func op_b1f9_12_ff; +extern cpuop_func op_b1fa_12_nf; +extern cpuop_func op_b1fa_12_ff; +extern cpuop_func op_b1fb_12_nf; +extern cpuop_func op_b1fb_12_ff; +extern cpuop_func op_b1fc_12_nf; +extern cpuop_func op_b1fc_12_ff; +extern cpuop_func op_c000_12_nf; +extern cpuop_func op_c000_12_ff; +extern cpuop_func op_c010_12_nf; +extern cpuop_func op_c010_12_ff; +extern cpuop_func op_c018_12_nf; +extern cpuop_func op_c018_12_ff; +extern cpuop_func op_c020_12_nf; +extern cpuop_func op_c020_12_ff; +extern cpuop_func op_c028_12_nf; +extern cpuop_func op_c028_12_ff; +extern cpuop_func op_c030_12_nf; +extern cpuop_func op_c030_12_ff; +extern cpuop_func op_c038_12_nf; +extern cpuop_func op_c038_12_ff; +extern cpuop_func op_c039_12_nf; +extern cpuop_func op_c039_12_ff; +extern cpuop_func op_c03a_12_nf; +extern cpuop_func op_c03a_12_ff; +extern cpuop_func op_c03b_12_nf; +extern cpuop_func op_c03b_12_ff; +extern cpuop_func op_c03c_12_nf; +extern cpuop_func op_c03c_12_ff; +extern cpuop_func op_c040_12_nf; +extern cpuop_func op_c040_12_ff; +extern cpuop_func op_c050_12_nf; +extern cpuop_func op_c050_12_ff; +extern cpuop_func op_c058_12_nf; +extern cpuop_func op_c058_12_ff; +extern cpuop_func op_c060_12_nf; +extern cpuop_func op_c060_12_ff; +extern cpuop_func op_c068_12_nf; +extern cpuop_func op_c068_12_ff; +extern cpuop_func op_c070_12_nf; +extern cpuop_func op_c070_12_ff; +extern cpuop_func op_c078_12_nf; +extern cpuop_func op_c078_12_ff; +extern cpuop_func op_c079_12_nf; +extern cpuop_func op_c079_12_ff; +extern cpuop_func op_c07a_12_nf; +extern cpuop_func op_c07a_12_ff; +extern cpuop_func op_c07b_12_nf; +extern cpuop_func op_c07b_12_ff; +extern cpuop_func op_c07c_12_nf; +extern cpuop_func op_c07c_12_ff; +extern cpuop_func op_c080_12_nf; +extern cpuop_func op_c080_12_ff; +extern cpuop_func op_c090_12_nf; +extern cpuop_func op_c090_12_ff; +extern cpuop_func op_c098_12_nf; +extern cpuop_func op_c098_12_ff; +extern cpuop_func op_c0a0_12_nf; +extern cpuop_func op_c0a0_12_ff; +extern cpuop_func op_c0a8_12_nf; +extern cpuop_func op_c0a8_12_ff; +extern cpuop_func op_c0b0_12_nf; +extern cpuop_func op_c0b0_12_ff; +extern cpuop_func op_c0b8_12_nf; +extern cpuop_func op_c0b8_12_ff; +extern cpuop_func op_c0b9_12_nf; +extern cpuop_func op_c0b9_12_ff; +extern cpuop_func op_c0ba_12_nf; +extern cpuop_func op_c0ba_12_ff; +extern cpuop_func op_c0bb_12_nf; +extern cpuop_func op_c0bb_12_ff; +extern cpuop_func op_c0bc_12_nf; +extern cpuop_func op_c0bc_12_ff; +extern cpuop_func op_c0c0_12_nf; +extern cpuop_func op_c0c0_12_ff; +extern cpuop_func op_c0d0_12_nf; +extern cpuop_func op_c0d0_12_ff; +extern cpuop_func op_c0d8_12_nf; +extern cpuop_func op_c0d8_12_ff; +extern cpuop_func op_c0e0_12_nf; +extern cpuop_func op_c0e0_12_ff; +extern cpuop_func op_c0e8_12_nf; +extern cpuop_func op_c0e8_12_ff; +extern cpuop_func op_c0f0_12_nf; +extern cpuop_func op_c0f0_12_ff; +extern cpuop_func op_c0f8_12_nf; +extern cpuop_func op_c0f8_12_ff; +extern cpuop_func op_c0f9_12_nf; +extern cpuop_func op_c0f9_12_ff; +extern cpuop_func op_c0fa_12_nf; +extern cpuop_func op_c0fa_12_ff; +extern cpuop_func op_c0fb_12_nf; +extern cpuop_func op_c0fb_12_ff; +extern cpuop_func op_c0fc_12_nf; +extern cpuop_func op_c0fc_12_ff; +extern cpuop_func op_c100_12_nf; +extern cpuop_func op_c100_12_ff; +extern cpuop_func op_c108_12_nf; +extern cpuop_func op_c108_12_ff; +extern cpuop_func op_c110_12_nf; +extern cpuop_func op_c110_12_ff; +extern cpuop_func op_c118_12_nf; +extern cpuop_func op_c118_12_ff; +extern cpuop_func op_c120_12_nf; +extern cpuop_func op_c120_12_ff; +extern cpuop_func op_c128_12_nf; +extern cpuop_func op_c128_12_ff; +extern cpuop_func op_c130_12_nf; +extern cpuop_func op_c130_12_ff; +extern cpuop_func op_c138_12_nf; +extern cpuop_func op_c138_12_ff; +extern cpuop_func op_c139_12_nf; +extern cpuop_func op_c139_12_ff; +extern cpuop_func op_c140_12_nf; +extern cpuop_func op_c140_12_ff; +extern cpuop_func op_c148_12_nf; +extern cpuop_func op_c148_12_ff; +extern cpuop_func op_c150_12_nf; +extern cpuop_func op_c150_12_ff; +extern cpuop_func op_c158_12_nf; +extern cpuop_func op_c158_12_ff; +extern cpuop_func op_c160_12_nf; +extern cpuop_func op_c160_12_ff; +extern cpuop_func op_c168_12_nf; +extern cpuop_func op_c168_12_ff; +extern cpuop_func op_c170_12_nf; +extern cpuop_func op_c170_12_ff; +extern cpuop_func op_c178_12_nf; +extern cpuop_func op_c178_12_ff; +extern cpuop_func op_c179_12_nf; +extern cpuop_func op_c179_12_ff; +extern cpuop_func op_c188_12_nf; +extern cpuop_func op_c188_12_ff; +extern cpuop_func op_c190_12_nf; +extern cpuop_func op_c190_12_ff; +extern cpuop_func op_c198_12_nf; +extern cpuop_func op_c198_12_ff; +extern cpuop_func op_c1a0_12_nf; +extern cpuop_func op_c1a0_12_ff; +extern cpuop_func op_c1a8_12_nf; +extern cpuop_func op_c1a8_12_ff; +extern cpuop_func op_c1b0_12_nf; +extern cpuop_func op_c1b0_12_ff; +extern cpuop_func op_c1b8_12_nf; +extern cpuop_func op_c1b8_12_ff; +extern cpuop_func op_c1b9_12_nf; +extern cpuop_func op_c1b9_12_ff; +extern cpuop_func op_c1c0_12_nf; +extern cpuop_func op_c1c0_12_ff; +extern cpuop_func op_c1d0_12_nf; +extern cpuop_func op_c1d0_12_ff; +extern cpuop_func op_c1d8_12_nf; +extern cpuop_func op_c1d8_12_ff; +extern cpuop_func op_c1e0_12_nf; +extern cpuop_func op_c1e0_12_ff; +extern cpuop_func op_c1e8_12_nf; +extern cpuop_func op_c1e8_12_ff; +extern cpuop_func op_c1f0_12_nf; +extern cpuop_func op_c1f0_12_ff; +extern cpuop_func op_c1f8_12_nf; +extern cpuop_func op_c1f8_12_ff; +extern cpuop_func op_c1f9_12_nf; +extern cpuop_func op_c1f9_12_ff; +extern cpuop_func op_c1fa_12_nf; +extern cpuop_func op_c1fa_12_ff; +extern cpuop_func op_c1fb_12_nf; +extern cpuop_func op_c1fb_12_ff; +extern cpuop_func op_c1fc_12_nf; +extern cpuop_func op_c1fc_12_ff; +extern cpuop_func op_d000_12_nf; +extern cpuop_func op_d000_12_ff; +extern cpuop_func op_d010_12_nf; +extern cpuop_func op_d010_12_ff; +extern cpuop_func op_d018_12_nf; +extern cpuop_func op_d018_12_ff; +extern cpuop_func op_d020_12_nf; +extern cpuop_func op_d020_12_ff; +extern cpuop_func op_d028_12_nf; +extern cpuop_func op_d028_12_ff; +extern cpuop_func op_d030_12_nf; +extern cpuop_func op_d030_12_ff; +extern cpuop_func op_d038_12_nf; +extern cpuop_func op_d038_12_ff; +extern cpuop_func op_d039_12_nf; +extern cpuop_func op_d039_12_ff; +extern cpuop_func op_d03a_12_nf; +extern cpuop_func op_d03a_12_ff; +extern cpuop_func op_d03b_12_nf; +extern cpuop_func op_d03b_12_ff; +extern cpuop_func op_d03c_12_nf; +extern cpuop_func op_d03c_12_ff; +extern cpuop_func op_d040_12_nf; +extern cpuop_func op_d040_12_ff; +extern cpuop_func op_d048_12_nf; +extern cpuop_func op_d048_12_ff; +extern cpuop_func op_d050_12_nf; +extern cpuop_func op_d050_12_ff; +extern cpuop_func op_d058_12_nf; +extern cpuop_func op_d058_12_ff; +extern cpuop_func op_d060_12_nf; +extern cpuop_func op_d060_12_ff; +extern cpuop_func op_d068_12_nf; +extern cpuop_func op_d068_12_ff; +extern cpuop_func op_d070_12_nf; +extern cpuop_func op_d070_12_ff; +extern cpuop_func op_d078_12_nf; +extern cpuop_func op_d078_12_ff; +extern cpuop_func op_d079_12_nf; +extern cpuop_func op_d079_12_ff; +extern cpuop_func op_d07a_12_nf; +extern cpuop_func op_d07a_12_ff; +extern cpuop_func op_d07b_12_nf; +extern cpuop_func op_d07b_12_ff; +extern cpuop_func op_d07c_12_nf; +extern cpuop_func op_d07c_12_ff; +extern cpuop_func op_d080_12_nf; +extern cpuop_func op_d080_12_ff; +extern cpuop_func op_d088_12_nf; +extern cpuop_func op_d088_12_ff; +extern cpuop_func op_d090_12_nf; +extern cpuop_func op_d090_12_ff; +extern cpuop_func op_d098_12_nf; +extern cpuop_func op_d098_12_ff; +extern cpuop_func op_d0a0_12_nf; +extern cpuop_func op_d0a0_12_ff; +extern cpuop_func op_d0a8_12_nf; +extern cpuop_func op_d0a8_12_ff; +extern cpuop_func op_d0b0_12_nf; +extern cpuop_func op_d0b0_12_ff; +extern cpuop_func op_d0b8_12_nf; +extern cpuop_func op_d0b8_12_ff; +extern cpuop_func op_d0b9_12_nf; +extern cpuop_func op_d0b9_12_ff; +extern cpuop_func op_d0ba_12_nf; +extern cpuop_func op_d0ba_12_ff; +extern cpuop_func op_d0bb_12_nf; +extern cpuop_func op_d0bb_12_ff; +extern cpuop_func op_d0bc_12_nf; +extern cpuop_func op_d0bc_12_ff; +extern cpuop_func op_d0c0_12_nf; +extern cpuop_func op_d0c0_12_ff; +extern cpuop_func op_d0c8_12_nf; +extern cpuop_func op_d0c8_12_ff; +extern cpuop_func op_d0d0_12_nf; +extern cpuop_func op_d0d0_12_ff; +extern cpuop_func op_d0d8_12_nf; +extern cpuop_func op_d0d8_12_ff; +extern cpuop_func op_d0e0_12_nf; +extern cpuop_func op_d0e0_12_ff; +extern cpuop_func op_d0e8_12_nf; +extern cpuop_func op_d0e8_12_ff; +extern cpuop_func op_d0f0_12_nf; +extern cpuop_func op_d0f0_12_ff; +extern cpuop_func op_d0f8_12_nf; +extern cpuop_func op_d0f8_12_ff; +extern cpuop_func op_d0f9_12_nf; +extern cpuop_func op_d0f9_12_ff; +extern cpuop_func op_d0fa_12_nf; +extern cpuop_func op_d0fa_12_ff; +extern cpuop_func op_d0fb_12_nf; +extern cpuop_func op_d0fb_12_ff; +extern cpuop_func op_d0fc_12_nf; +extern cpuop_func op_d0fc_12_ff; +extern cpuop_func op_d100_12_nf; +extern cpuop_func op_d100_12_ff; +extern cpuop_func op_d108_12_nf; +extern cpuop_func op_d108_12_ff; +extern cpuop_func op_d110_12_nf; +extern cpuop_func op_d110_12_ff; +extern cpuop_func op_d118_12_nf; +extern cpuop_func op_d118_12_ff; +extern cpuop_func op_d120_12_nf; +extern cpuop_func op_d120_12_ff; +extern cpuop_func op_d128_12_nf; +extern cpuop_func op_d128_12_ff; +extern cpuop_func op_d130_12_nf; +extern cpuop_func op_d130_12_ff; +extern cpuop_func op_d138_12_nf; +extern cpuop_func op_d138_12_ff; +extern cpuop_func op_d139_12_nf; +extern cpuop_func op_d139_12_ff; +extern cpuop_func op_d140_12_nf; +extern cpuop_func op_d140_12_ff; +extern cpuop_func op_d148_12_nf; +extern cpuop_func op_d148_12_ff; +extern cpuop_func op_d150_12_nf; +extern cpuop_func op_d150_12_ff; +extern cpuop_func op_d158_12_nf; +extern cpuop_func op_d158_12_ff; +extern cpuop_func op_d160_12_nf; +extern cpuop_func op_d160_12_ff; +extern cpuop_func op_d168_12_nf; +extern cpuop_func op_d168_12_ff; +extern cpuop_func op_d170_12_nf; +extern cpuop_func op_d170_12_ff; +extern cpuop_func op_d178_12_nf; +extern cpuop_func op_d178_12_ff; +extern cpuop_func op_d179_12_nf; +extern cpuop_func op_d179_12_ff; +extern cpuop_func op_d180_12_nf; +extern cpuop_func op_d180_12_ff; +extern cpuop_func op_d188_12_nf; +extern cpuop_func op_d188_12_ff; +extern cpuop_func op_d190_12_nf; +extern cpuop_func op_d190_12_ff; +extern cpuop_func op_d198_12_nf; +extern cpuop_func op_d198_12_ff; +extern cpuop_func op_d1a0_12_nf; +extern cpuop_func op_d1a0_12_ff; +extern cpuop_func op_d1a8_12_nf; +extern cpuop_func op_d1a8_12_ff; +extern cpuop_func op_d1b0_12_nf; +extern cpuop_func op_d1b0_12_ff; +extern cpuop_func op_d1b8_12_nf; +extern cpuop_func op_d1b8_12_ff; +extern cpuop_func op_d1b9_12_nf; +extern cpuop_func op_d1b9_12_ff; +extern cpuop_func op_d1c0_12_nf; +extern cpuop_func op_d1c0_12_ff; +extern cpuop_func op_d1c8_12_nf; +extern cpuop_func op_d1c8_12_ff; +extern cpuop_func op_d1d0_12_nf; +extern cpuop_func op_d1d0_12_ff; +extern cpuop_func op_d1d8_12_nf; +extern cpuop_func op_d1d8_12_ff; +extern cpuop_func op_d1e0_12_nf; +extern cpuop_func op_d1e0_12_ff; +extern cpuop_func op_d1e8_12_nf; +extern cpuop_func op_d1e8_12_ff; +extern cpuop_func op_d1f0_12_nf; +extern cpuop_func op_d1f0_12_ff; +extern cpuop_func op_d1f8_12_nf; +extern cpuop_func op_d1f8_12_ff; +extern cpuop_func op_d1f9_12_nf; +extern cpuop_func op_d1f9_12_ff; +extern cpuop_func op_d1fa_12_nf; +extern cpuop_func op_d1fa_12_ff; +extern cpuop_func op_d1fb_12_nf; +extern cpuop_func op_d1fb_12_ff; +extern cpuop_func op_d1fc_12_nf; +extern cpuop_func op_d1fc_12_ff; +extern cpuop_func op_e000_12_nf; +extern cpuop_func op_e000_12_ff; +extern cpuop_func op_e008_12_nf; +extern cpuop_func op_e008_12_ff; +extern cpuop_func op_e010_12_nf; +extern cpuop_func op_e010_12_ff; +extern cpuop_func op_e018_12_nf; +extern cpuop_func op_e018_12_ff; +extern cpuop_func op_e020_12_nf; +extern cpuop_func op_e020_12_ff; +extern cpuop_func op_e028_12_nf; +extern cpuop_func op_e028_12_ff; +extern cpuop_func op_e030_12_nf; +extern cpuop_func op_e030_12_ff; +extern cpuop_func op_e038_12_nf; +extern cpuop_func op_e038_12_ff; +extern cpuop_func op_e040_12_nf; +extern cpuop_func op_e040_12_ff; +extern cpuop_func op_e048_12_nf; +extern cpuop_func op_e048_12_ff; +extern cpuop_func op_e050_12_nf; +extern cpuop_func op_e050_12_ff; +extern cpuop_func op_e058_12_nf; +extern cpuop_func op_e058_12_ff; +extern cpuop_func op_e060_12_nf; +extern cpuop_func op_e060_12_ff; +extern cpuop_func op_e068_12_nf; +extern cpuop_func op_e068_12_ff; +extern cpuop_func op_e070_12_nf; +extern cpuop_func op_e070_12_ff; +extern cpuop_func op_e078_12_nf; +extern cpuop_func op_e078_12_ff; +extern cpuop_func op_e080_12_nf; +extern cpuop_func op_e080_12_ff; +extern cpuop_func op_e088_12_nf; +extern cpuop_func op_e088_12_ff; +extern cpuop_func op_e090_12_nf; +extern cpuop_func op_e090_12_ff; +extern cpuop_func op_e098_12_nf; +extern cpuop_func op_e098_12_ff; +extern cpuop_func op_e0a0_12_nf; +extern cpuop_func op_e0a0_12_ff; +extern cpuop_func op_e0a8_12_nf; +extern cpuop_func op_e0a8_12_ff; +extern cpuop_func op_e0b0_12_nf; +extern cpuop_func op_e0b0_12_ff; +extern cpuop_func op_e0b8_12_nf; +extern cpuop_func op_e0b8_12_ff; +extern cpuop_func op_e0d0_12_nf; +extern cpuop_func op_e0d0_12_ff; +extern cpuop_func op_e0d8_12_nf; +extern cpuop_func op_e0d8_12_ff; +extern cpuop_func op_e0e0_12_nf; +extern cpuop_func op_e0e0_12_ff; +extern cpuop_func op_e0e8_12_nf; +extern cpuop_func op_e0e8_12_ff; +extern cpuop_func op_e0f0_12_nf; +extern cpuop_func op_e0f0_12_ff; +extern cpuop_func op_e0f8_12_nf; +extern cpuop_func op_e0f8_12_ff; +extern cpuop_func op_e0f9_12_nf; +extern cpuop_func op_e0f9_12_ff; +extern cpuop_func op_e100_12_nf; +extern cpuop_func op_e100_12_ff; +extern cpuop_func op_e108_12_nf; +extern cpuop_func op_e108_12_ff; +extern cpuop_func op_e110_12_nf; +extern cpuop_func op_e110_12_ff; +extern cpuop_func op_e118_12_nf; +extern cpuop_func op_e118_12_ff; +extern cpuop_func op_e120_12_nf; +extern cpuop_func op_e120_12_ff; +extern cpuop_func op_e128_12_nf; +extern cpuop_func op_e128_12_ff; +extern cpuop_func op_e130_12_nf; +extern cpuop_func op_e130_12_ff; +extern cpuop_func op_e138_12_nf; +extern cpuop_func op_e138_12_ff; +extern cpuop_func op_e140_12_nf; +extern cpuop_func op_e140_12_ff; +extern cpuop_func op_e148_12_nf; +extern cpuop_func op_e148_12_ff; +extern cpuop_func op_e150_12_nf; +extern cpuop_func op_e150_12_ff; +extern cpuop_func op_e158_12_nf; +extern cpuop_func op_e158_12_ff; +extern cpuop_func op_e160_12_nf; +extern cpuop_func op_e160_12_ff; +extern cpuop_func op_e168_12_nf; +extern cpuop_func op_e168_12_ff; +extern cpuop_func op_e170_12_nf; +extern cpuop_func op_e170_12_ff; +extern cpuop_func op_e178_12_nf; +extern cpuop_func op_e178_12_ff; +extern cpuop_func op_e180_12_nf; +extern cpuop_func op_e180_12_ff; +extern cpuop_func op_e188_12_nf; +extern cpuop_func op_e188_12_ff; +extern cpuop_func op_e190_12_nf; +extern cpuop_func op_e190_12_ff; +extern cpuop_func op_e198_12_nf; +extern cpuop_func op_e198_12_ff; +extern cpuop_func op_e1a0_12_nf; +extern cpuop_func op_e1a0_12_ff; +extern cpuop_func op_e1a8_12_nf; +extern cpuop_func op_e1a8_12_ff; +extern cpuop_func op_e1b0_12_nf; +extern cpuop_func op_e1b0_12_ff; +extern cpuop_func op_e1b8_12_nf; +extern cpuop_func op_e1b8_12_ff; +extern cpuop_func op_e1d0_12_nf; +extern cpuop_func op_e1d0_12_ff; +extern cpuop_func op_e1d8_12_nf; +extern cpuop_func op_e1d8_12_ff; +extern cpuop_func op_e1e0_12_nf; +extern cpuop_func op_e1e0_12_ff; +extern cpuop_func op_e1e8_12_nf; +extern cpuop_func op_e1e8_12_ff; +extern cpuop_func op_e1f0_12_nf; +extern cpuop_func op_e1f0_12_ff; +extern cpuop_func op_e1f8_12_nf; +extern cpuop_func op_e1f8_12_ff; +extern cpuop_func op_e1f9_12_nf; +extern cpuop_func op_e1f9_12_ff; +extern cpuop_func op_e2d0_12_nf; +extern cpuop_func op_e2d0_12_ff; +extern cpuop_func op_e2d8_12_nf; +extern cpuop_func op_e2d8_12_ff; +extern cpuop_func op_e2e0_12_nf; +extern cpuop_func op_e2e0_12_ff; +extern cpuop_func op_e2e8_12_nf; +extern cpuop_func op_e2e8_12_ff; +extern cpuop_func op_e2f0_12_nf; +extern cpuop_func op_e2f0_12_ff; +extern cpuop_func op_e2f8_12_nf; +extern cpuop_func op_e2f8_12_ff; +extern cpuop_func op_e2f9_12_nf; +extern cpuop_func op_e2f9_12_ff; +extern cpuop_func op_e3d0_12_nf; +extern cpuop_func op_e3d0_12_ff; +extern cpuop_func op_e3d8_12_nf; +extern cpuop_func op_e3d8_12_ff; +extern cpuop_func op_e3e0_12_nf; +extern cpuop_func op_e3e0_12_ff; +extern cpuop_func op_e3e8_12_nf; +extern cpuop_func op_e3e8_12_ff; +extern cpuop_func op_e3f0_12_nf; +extern cpuop_func op_e3f0_12_ff; +extern cpuop_func op_e3f8_12_nf; +extern cpuop_func op_e3f8_12_ff; +extern cpuop_func op_e3f9_12_nf; +extern cpuop_func op_e3f9_12_ff; +extern cpuop_func op_e4d0_12_nf; +extern cpuop_func op_e4d0_12_ff; +extern cpuop_func op_e4d8_12_nf; +extern cpuop_func op_e4d8_12_ff; +extern cpuop_func op_e4e0_12_nf; +extern cpuop_func op_e4e0_12_ff; +extern cpuop_func op_e4e8_12_nf; +extern cpuop_func op_e4e8_12_ff; +extern cpuop_func op_e4f0_12_nf; +extern cpuop_func op_e4f0_12_ff; +extern cpuop_func op_e4f8_12_nf; +extern cpuop_func op_e4f8_12_ff; +extern cpuop_func op_e4f9_12_nf; +extern cpuop_func op_e4f9_12_ff; +extern cpuop_func op_e5d0_12_nf; +extern cpuop_func op_e5d0_12_ff; +extern cpuop_func op_e5d8_12_nf; +extern cpuop_func op_e5d8_12_ff; +extern cpuop_func op_e5e0_12_nf; +extern cpuop_func op_e5e0_12_ff; +extern cpuop_func op_e5e8_12_nf; +extern cpuop_func op_e5e8_12_ff; +extern cpuop_func op_e5f0_12_nf; +extern cpuop_func op_e5f0_12_ff; +extern cpuop_func op_e5f8_12_nf; +extern cpuop_func op_e5f8_12_ff; +extern cpuop_func op_e5f9_12_nf; +extern cpuop_func op_e5f9_12_ff; +extern cpuop_func op_e6d0_12_nf; +extern cpuop_func op_e6d0_12_ff; +extern cpuop_func op_e6d8_12_nf; +extern cpuop_func op_e6d8_12_ff; +extern cpuop_func op_e6e0_12_nf; +extern cpuop_func op_e6e0_12_ff; +extern cpuop_func op_e6e8_12_nf; +extern cpuop_func op_e6e8_12_ff; +extern cpuop_func op_e6f0_12_nf; +extern cpuop_func op_e6f0_12_ff; +extern cpuop_func op_e6f8_12_nf; +extern cpuop_func op_e6f8_12_ff; +extern cpuop_func op_e6f9_12_nf; +extern cpuop_func op_e6f9_12_ff; +extern cpuop_func op_e7d0_12_nf; +extern cpuop_func op_e7d0_12_ff; +extern cpuop_func op_e7d8_12_nf; +extern cpuop_func op_e7d8_12_ff; +extern cpuop_func op_e7e0_12_nf; +extern cpuop_func op_e7e0_12_ff; +extern cpuop_func op_e7e8_12_nf; +extern cpuop_func op_e7e8_12_ff; +extern cpuop_func op_e7f0_12_nf; +extern cpuop_func op_e7f0_12_ff; +extern cpuop_func op_e7f8_12_nf; +extern cpuop_func op_e7f8_12_ff; +extern cpuop_func op_e7f9_12_nf; +extern cpuop_func op_e7f9_12_ff; +extern cpuop_func_noret op_0000_13_nf; +extern cpuop_func_noret op_0000_13_ff; +extern cpuop_func_noret op_0010_13_nf; +extern cpuop_func_noret op_0010_13_ff; +extern cpuop_func_noret op_0018_13_nf; +extern cpuop_func_noret op_0018_13_ff; +extern cpuop_func_noret op_0020_13_nf; +extern cpuop_func_noret op_0020_13_ff; +extern cpuop_func_noret op_0028_13_nf; +extern cpuop_func_noret op_0028_13_ff; +extern cpuop_func_noret op_0030_13_nf; +extern cpuop_func_noret op_0030_13_ff; +extern cpuop_func_noret op_0038_13_nf; +extern cpuop_func_noret op_0038_13_ff; +extern cpuop_func_noret op_0039_13_nf; +extern cpuop_func_noret op_0039_13_ff; +extern cpuop_func_noret op_003c_13_nf; +extern cpuop_func_noret op_003c_13_ff; +extern cpuop_func_noret op_0040_13_nf; +extern cpuop_func_noret op_0040_13_ff; +extern cpuop_func_noret op_0050_13_nf; +extern cpuop_func_noret op_0050_13_ff; +extern cpuop_func_noret op_0058_13_nf; +extern cpuop_func_noret op_0058_13_ff; +extern cpuop_func_noret op_0060_13_nf; +extern cpuop_func_noret op_0060_13_ff; +extern cpuop_func_noret op_0068_13_nf; +extern cpuop_func_noret op_0068_13_ff; +extern cpuop_func_noret op_0070_13_nf; +extern cpuop_func_noret op_0070_13_ff; +extern cpuop_func_noret op_0078_13_nf; +extern cpuop_func_noret op_0078_13_ff; +extern cpuop_func_noret op_0079_13_nf; +extern cpuop_func_noret op_0079_13_ff; +extern cpuop_func_noret op_007c_13_nf; +extern cpuop_func_noret op_007c_13_ff; +extern cpuop_func_noret op_0080_13_nf; +extern cpuop_func_noret op_0080_13_ff; +extern cpuop_func_noret op_0090_13_nf; +extern cpuop_func_noret op_0090_13_ff; +extern cpuop_func_noret op_0098_13_nf; +extern cpuop_func_noret op_0098_13_ff; +extern cpuop_func_noret op_00a0_13_nf; +extern cpuop_func_noret op_00a0_13_ff; +extern cpuop_func_noret op_00a8_13_nf; +extern cpuop_func_noret op_00a8_13_ff; +extern cpuop_func_noret op_00b0_13_nf; +extern cpuop_func_noret op_00b0_13_ff; +extern cpuop_func_noret op_00b8_13_nf; +extern cpuop_func_noret op_00b8_13_ff; +extern cpuop_func_noret op_00b9_13_nf; +extern cpuop_func_noret op_00b9_13_ff; +extern cpuop_func_noret op_0100_13_nf; +extern cpuop_func_noret op_0100_13_ff; +extern cpuop_func_noret op_0108_13_nf; +extern cpuop_func_noret op_0108_13_ff; +extern cpuop_func_noret op_0110_13_nf; +extern cpuop_func_noret op_0110_13_ff; +extern cpuop_func_noret op_0118_13_nf; +extern cpuop_func_noret op_0118_13_ff; +extern cpuop_func_noret op_0120_13_nf; +extern cpuop_func_noret op_0120_13_ff; +extern cpuop_func_noret op_0128_13_nf; +extern cpuop_func_noret op_0128_13_ff; +extern cpuop_func_noret op_0130_13_nf; +extern cpuop_func_noret op_0130_13_ff; +extern cpuop_func_noret op_0138_13_nf; +extern cpuop_func_noret op_0138_13_ff; +extern cpuop_func_noret op_0139_13_nf; +extern cpuop_func_noret op_0139_13_ff; +extern cpuop_func_noret op_013a_13_nf; +extern cpuop_func_noret op_013a_13_ff; +extern cpuop_func_noret op_013b_13_nf; +extern cpuop_func_noret op_013b_13_ff; +extern cpuop_func_noret op_013c_13_nf; +extern cpuop_func_noret op_013c_13_ff; +extern cpuop_func_noret op_0140_13_nf; +extern cpuop_func_noret op_0140_13_ff; +extern cpuop_func_noret op_0148_13_nf; +extern cpuop_func_noret op_0148_13_ff; +extern cpuop_func_noret op_0150_13_nf; +extern cpuop_func_noret op_0150_13_ff; +extern cpuop_func_noret op_0158_13_nf; +extern cpuop_func_noret op_0158_13_ff; +extern cpuop_func_noret op_0160_13_nf; +extern cpuop_func_noret op_0160_13_ff; +extern cpuop_func_noret op_0168_13_nf; +extern cpuop_func_noret op_0168_13_ff; +extern cpuop_func_noret op_0170_13_nf; +extern cpuop_func_noret op_0170_13_ff; +extern cpuop_func_noret op_0178_13_nf; +extern cpuop_func_noret op_0178_13_ff; +extern cpuop_func_noret op_0179_13_nf; +extern cpuop_func_noret op_0179_13_ff; +extern cpuop_func_noret op_0180_13_nf; +extern cpuop_func_noret op_0180_13_ff; +extern cpuop_func_noret op_0188_13_nf; +extern cpuop_func_noret op_0188_13_ff; +extern cpuop_func_noret op_0190_13_nf; +extern cpuop_func_noret op_0190_13_ff; +extern cpuop_func_noret op_0198_13_nf; +extern cpuop_func_noret op_0198_13_ff; +extern cpuop_func_noret op_01a0_13_nf; +extern cpuop_func_noret op_01a0_13_ff; +extern cpuop_func_noret op_01a8_13_nf; +extern cpuop_func_noret op_01a8_13_ff; +extern cpuop_func_noret op_01b0_13_nf; +extern cpuop_func_noret op_01b0_13_ff; +extern cpuop_func_noret op_01b8_13_nf; +extern cpuop_func_noret op_01b8_13_ff; +extern cpuop_func_noret op_01b9_13_nf; +extern cpuop_func_noret op_01b9_13_ff; +extern cpuop_func_noret op_01c0_13_nf; +extern cpuop_func_noret op_01c0_13_ff; +extern cpuop_func_noret op_01c8_13_nf; +extern cpuop_func_noret op_01c8_13_ff; +extern cpuop_func_noret op_01d0_13_nf; +extern cpuop_func_noret op_01d0_13_ff; +extern cpuop_func_noret op_01d8_13_nf; +extern cpuop_func_noret op_01d8_13_ff; +extern cpuop_func_noret op_01e0_13_nf; +extern cpuop_func_noret op_01e0_13_ff; +extern cpuop_func_noret op_01e8_13_nf; +extern cpuop_func_noret op_01e8_13_ff; +extern cpuop_func_noret op_01f0_13_nf; +extern cpuop_func_noret op_01f0_13_ff; +extern cpuop_func_noret op_01f8_13_nf; +extern cpuop_func_noret op_01f8_13_ff; +extern cpuop_func_noret op_01f9_13_nf; +extern cpuop_func_noret op_01f9_13_ff; +extern cpuop_func_noret op_0200_13_nf; +extern cpuop_func_noret op_0200_13_ff; +extern cpuop_func_noret op_0210_13_nf; +extern cpuop_func_noret op_0210_13_ff; +extern cpuop_func_noret op_0218_13_nf; +extern cpuop_func_noret op_0218_13_ff; +extern cpuop_func_noret op_0220_13_nf; +extern cpuop_func_noret op_0220_13_ff; +extern cpuop_func_noret op_0228_13_nf; +extern cpuop_func_noret op_0228_13_ff; +extern cpuop_func_noret op_0230_13_nf; +extern cpuop_func_noret op_0230_13_ff; +extern cpuop_func_noret op_0238_13_nf; +extern cpuop_func_noret op_0238_13_ff; +extern cpuop_func_noret op_0239_13_nf; +extern cpuop_func_noret op_0239_13_ff; +extern cpuop_func_noret op_023c_13_nf; +extern cpuop_func_noret op_023c_13_ff; +extern cpuop_func_noret op_0240_13_nf; +extern cpuop_func_noret op_0240_13_ff; +extern cpuop_func_noret op_0250_13_nf; +extern cpuop_func_noret op_0250_13_ff; +extern cpuop_func_noret op_0258_13_nf; +extern cpuop_func_noret op_0258_13_ff; +extern cpuop_func_noret op_0260_13_nf; +extern cpuop_func_noret op_0260_13_ff; +extern cpuop_func_noret op_0268_13_nf; +extern cpuop_func_noret op_0268_13_ff; +extern cpuop_func_noret op_0270_13_nf; +extern cpuop_func_noret op_0270_13_ff; +extern cpuop_func_noret op_0278_13_nf; +extern cpuop_func_noret op_0278_13_ff; +extern cpuop_func_noret op_0279_13_nf; +extern cpuop_func_noret op_0279_13_ff; +extern cpuop_func_noret op_027c_13_nf; +extern cpuop_func_noret op_027c_13_ff; +extern cpuop_func_noret op_0280_13_nf; +extern cpuop_func_noret op_0280_13_ff; +extern cpuop_func_noret op_0290_13_nf; +extern cpuop_func_noret op_0290_13_ff; +extern cpuop_func_noret op_0298_13_nf; +extern cpuop_func_noret op_0298_13_ff; +extern cpuop_func_noret op_02a0_13_nf; +extern cpuop_func_noret op_02a0_13_ff; +extern cpuop_func_noret op_02a8_13_nf; +extern cpuop_func_noret op_02a8_13_ff; +extern cpuop_func_noret op_02b0_13_nf; +extern cpuop_func_noret op_02b0_13_ff; +extern cpuop_func_noret op_02b8_13_nf; +extern cpuop_func_noret op_02b8_13_ff; +extern cpuop_func_noret op_02b9_13_nf; +extern cpuop_func_noret op_02b9_13_ff; +extern cpuop_func_noret op_0400_13_nf; +extern cpuop_func_noret op_0400_13_ff; +extern cpuop_func_noret op_0410_13_nf; +extern cpuop_func_noret op_0410_13_ff; +extern cpuop_func_noret op_0418_13_nf; +extern cpuop_func_noret op_0418_13_ff; +extern cpuop_func_noret op_0420_13_nf; +extern cpuop_func_noret op_0420_13_ff; +extern cpuop_func_noret op_0428_13_nf; +extern cpuop_func_noret op_0428_13_ff; +extern cpuop_func_noret op_0430_13_nf; +extern cpuop_func_noret op_0430_13_ff; +extern cpuop_func_noret op_0438_13_nf; +extern cpuop_func_noret op_0438_13_ff; +extern cpuop_func_noret op_0439_13_nf; +extern cpuop_func_noret op_0439_13_ff; +extern cpuop_func_noret op_0440_13_nf; +extern cpuop_func_noret op_0440_13_ff; +extern cpuop_func_noret op_0450_13_nf; +extern cpuop_func_noret op_0450_13_ff; +extern cpuop_func_noret op_0458_13_nf; +extern cpuop_func_noret op_0458_13_ff; +extern cpuop_func_noret op_0460_13_nf; +extern cpuop_func_noret op_0460_13_ff; +extern cpuop_func_noret op_0468_13_nf; +extern cpuop_func_noret op_0468_13_ff; +extern cpuop_func_noret op_0470_13_nf; +extern cpuop_func_noret op_0470_13_ff; +extern cpuop_func_noret op_0478_13_nf; +extern cpuop_func_noret op_0478_13_ff; +extern cpuop_func_noret op_0479_13_nf; +extern cpuop_func_noret op_0479_13_ff; +extern cpuop_func_noret op_0480_13_nf; +extern cpuop_func_noret op_0480_13_ff; +extern cpuop_func_noret op_0490_13_nf; +extern cpuop_func_noret op_0490_13_ff; +extern cpuop_func_noret op_0498_13_nf; +extern cpuop_func_noret op_0498_13_ff; +extern cpuop_func_noret op_04a0_13_nf; +extern cpuop_func_noret op_04a0_13_ff; +extern cpuop_func_noret op_04a8_13_nf; +extern cpuop_func_noret op_04a8_13_ff; +extern cpuop_func_noret op_04b0_13_nf; +extern cpuop_func_noret op_04b0_13_ff; +extern cpuop_func_noret op_04b8_13_nf; +extern cpuop_func_noret op_04b8_13_ff; +extern cpuop_func_noret op_04b9_13_nf; +extern cpuop_func_noret op_04b9_13_ff; +extern cpuop_func_noret op_0600_13_nf; +extern cpuop_func_noret op_0600_13_ff; +extern cpuop_func_noret op_0610_13_nf; +extern cpuop_func_noret op_0610_13_ff; +extern cpuop_func_noret op_0618_13_nf; +extern cpuop_func_noret op_0618_13_ff; +extern cpuop_func_noret op_0620_13_nf; +extern cpuop_func_noret op_0620_13_ff; +extern cpuop_func_noret op_0628_13_nf; +extern cpuop_func_noret op_0628_13_ff; +extern cpuop_func_noret op_0630_13_nf; +extern cpuop_func_noret op_0630_13_ff; +extern cpuop_func_noret op_0638_13_nf; +extern cpuop_func_noret op_0638_13_ff; +extern cpuop_func_noret op_0639_13_nf; +extern cpuop_func_noret op_0639_13_ff; +extern cpuop_func_noret op_0640_13_nf; +extern cpuop_func_noret op_0640_13_ff; +extern cpuop_func_noret op_0650_13_nf; +extern cpuop_func_noret op_0650_13_ff; +extern cpuop_func_noret op_0658_13_nf; +extern cpuop_func_noret op_0658_13_ff; +extern cpuop_func_noret op_0660_13_nf; +extern cpuop_func_noret op_0660_13_ff; +extern cpuop_func_noret op_0668_13_nf; +extern cpuop_func_noret op_0668_13_ff; +extern cpuop_func_noret op_0670_13_nf; +extern cpuop_func_noret op_0670_13_ff; +extern cpuop_func_noret op_0678_13_nf; +extern cpuop_func_noret op_0678_13_ff; +extern cpuop_func_noret op_0679_13_nf; +extern cpuop_func_noret op_0679_13_ff; +extern cpuop_func_noret op_0680_13_nf; +extern cpuop_func_noret op_0680_13_ff; +extern cpuop_func_noret op_0690_13_nf; +extern cpuop_func_noret op_0690_13_ff; +extern cpuop_func_noret op_0698_13_nf; +extern cpuop_func_noret op_0698_13_ff; +extern cpuop_func_noret op_06a0_13_nf; +extern cpuop_func_noret op_06a0_13_ff; +extern cpuop_func_noret op_06a8_13_nf; +extern cpuop_func_noret op_06a8_13_ff; +extern cpuop_func_noret op_06b0_13_nf; +extern cpuop_func_noret op_06b0_13_ff; +extern cpuop_func_noret op_06b8_13_nf; +extern cpuop_func_noret op_06b8_13_ff; +extern cpuop_func_noret op_06b9_13_nf; +extern cpuop_func_noret op_06b9_13_ff; +extern cpuop_func_noret op_0800_13_nf; +extern cpuop_func_noret op_0800_13_ff; +extern cpuop_func_noret op_0810_13_nf; +extern cpuop_func_noret op_0810_13_ff; +extern cpuop_func_noret op_0818_13_nf; +extern cpuop_func_noret op_0818_13_ff; +extern cpuop_func_noret op_0820_13_nf; +extern cpuop_func_noret op_0820_13_ff; +extern cpuop_func_noret op_0828_13_nf; +extern cpuop_func_noret op_0828_13_ff; +extern cpuop_func_noret op_0830_13_nf; +extern cpuop_func_noret op_0830_13_ff; +extern cpuop_func_noret op_0838_13_nf; +extern cpuop_func_noret op_0838_13_ff; +extern cpuop_func_noret op_0839_13_nf; +extern cpuop_func_noret op_0839_13_ff; +extern cpuop_func_noret op_083a_13_nf; +extern cpuop_func_noret op_083a_13_ff; +extern cpuop_func_noret op_083b_13_nf; +extern cpuop_func_noret op_083b_13_ff; +extern cpuop_func_noret op_0840_13_nf; +extern cpuop_func_noret op_0840_13_ff; +extern cpuop_func_noret op_0850_13_nf; +extern cpuop_func_noret op_0850_13_ff; +extern cpuop_func_noret op_0858_13_nf; +extern cpuop_func_noret op_0858_13_ff; +extern cpuop_func_noret op_0860_13_nf; +extern cpuop_func_noret op_0860_13_ff; +extern cpuop_func_noret op_0868_13_nf; +extern cpuop_func_noret op_0868_13_ff; +extern cpuop_func_noret op_0870_13_nf; +extern cpuop_func_noret op_0870_13_ff; +extern cpuop_func_noret op_0878_13_nf; +extern cpuop_func_noret op_0878_13_ff; +extern cpuop_func_noret op_0879_13_nf; +extern cpuop_func_noret op_0879_13_ff; +extern cpuop_func_noret op_0880_13_nf; +extern cpuop_func_noret op_0880_13_ff; +extern cpuop_func_noret op_0890_13_nf; +extern cpuop_func_noret op_0890_13_ff; +extern cpuop_func_noret op_0898_13_nf; +extern cpuop_func_noret op_0898_13_ff; +extern cpuop_func_noret op_08a0_13_nf; +extern cpuop_func_noret op_08a0_13_ff; +extern cpuop_func_noret op_08a8_13_nf; +extern cpuop_func_noret op_08a8_13_ff; +extern cpuop_func_noret op_08b0_13_nf; +extern cpuop_func_noret op_08b0_13_ff; +extern cpuop_func_noret op_08b8_13_nf; +extern cpuop_func_noret op_08b8_13_ff; +extern cpuop_func_noret op_08b9_13_nf; +extern cpuop_func_noret op_08b9_13_ff; +extern cpuop_func_noret op_08c0_13_nf; +extern cpuop_func_noret op_08c0_13_ff; +extern cpuop_func_noret op_08d0_13_nf; +extern cpuop_func_noret op_08d0_13_ff; +extern cpuop_func_noret op_08d8_13_nf; +extern cpuop_func_noret op_08d8_13_ff; +extern cpuop_func_noret op_08e0_13_nf; +extern cpuop_func_noret op_08e0_13_ff; +extern cpuop_func_noret op_08e8_13_nf; +extern cpuop_func_noret op_08e8_13_ff; +extern cpuop_func_noret op_08f0_13_nf; +extern cpuop_func_noret op_08f0_13_ff; +extern cpuop_func_noret op_08f8_13_nf; +extern cpuop_func_noret op_08f8_13_ff; +extern cpuop_func_noret op_08f9_13_nf; +extern cpuop_func_noret op_08f9_13_ff; +extern cpuop_func_noret op_0a00_13_nf; +extern cpuop_func_noret op_0a00_13_ff; +extern cpuop_func_noret op_0a10_13_nf; +extern cpuop_func_noret op_0a10_13_ff; +extern cpuop_func_noret op_0a18_13_nf; +extern cpuop_func_noret op_0a18_13_ff; +extern cpuop_func_noret op_0a20_13_nf; +extern cpuop_func_noret op_0a20_13_ff; +extern cpuop_func_noret op_0a28_13_nf; +extern cpuop_func_noret op_0a28_13_ff; +extern cpuop_func_noret op_0a30_13_nf; +extern cpuop_func_noret op_0a30_13_ff; +extern cpuop_func_noret op_0a38_13_nf; +extern cpuop_func_noret op_0a38_13_ff; +extern cpuop_func_noret op_0a39_13_nf; +extern cpuop_func_noret op_0a39_13_ff; +extern cpuop_func_noret op_0a3c_13_nf; +extern cpuop_func_noret op_0a3c_13_ff; +extern cpuop_func_noret op_0a40_13_nf; +extern cpuop_func_noret op_0a40_13_ff; +extern cpuop_func_noret op_0a50_13_nf; +extern cpuop_func_noret op_0a50_13_ff; +extern cpuop_func_noret op_0a58_13_nf; +extern cpuop_func_noret op_0a58_13_ff; +extern cpuop_func_noret op_0a60_13_nf; +extern cpuop_func_noret op_0a60_13_ff; +extern cpuop_func_noret op_0a68_13_nf; +extern cpuop_func_noret op_0a68_13_ff; +extern cpuop_func_noret op_0a70_13_nf; +extern cpuop_func_noret op_0a70_13_ff; +extern cpuop_func_noret op_0a78_13_nf; +extern cpuop_func_noret op_0a78_13_ff; +extern cpuop_func_noret op_0a79_13_nf; +extern cpuop_func_noret op_0a79_13_ff; +extern cpuop_func_noret op_0a7c_13_nf; +extern cpuop_func_noret op_0a7c_13_ff; +extern cpuop_func_noret op_0a80_13_nf; +extern cpuop_func_noret op_0a80_13_ff; +extern cpuop_func_noret op_0a90_13_nf; +extern cpuop_func_noret op_0a90_13_ff; +extern cpuop_func_noret op_0a98_13_nf; +extern cpuop_func_noret op_0a98_13_ff; +extern cpuop_func_noret op_0aa0_13_nf; +extern cpuop_func_noret op_0aa0_13_ff; +extern cpuop_func_noret op_0aa8_13_nf; +extern cpuop_func_noret op_0aa8_13_ff; +extern cpuop_func_noret op_0ab0_13_nf; +extern cpuop_func_noret op_0ab0_13_ff; +extern cpuop_func_noret op_0ab8_13_nf; +extern cpuop_func_noret op_0ab8_13_ff; +extern cpuop_func_noret op_0ab9_13_nf; +extern cpuop_func_noret op_0ab9_13_ff; +extern cpuop_func_noret op_0c00_13_nf; +extern cpuop_func_noret op_0c00_13_ff; +extern cpuop_func_noret op_0c10_13_nf; +extern cpuop_func_noret op_0c10_13_ff; +extern cpuop_func_noret op_0c18_13_nf; +extern cpuop_func_noret op_0c18_13_ff; +extern cpuop_func_noret op_0c20_13_nf; +extern cpuop_func_noret op_0c20_13_ff; +extern cpuop_func_noret op_0c28_13_nf; +extern cpuop_func_noret op_0c28_13_ff; +extern cpuop_func_noret op_0c30_13_nf; +extern cpuop_func_noret op_0c30_13_ff; +extern cpuop_func_noret op_0c38_13_nf; +extern cpuop_func_noret op_0c38_13_ff; +extern cpuop_func_noret op_0c39_13_nf; +extern cpuop_func_noret op_0c39_13_ff; +extern cpuop_func_noret op_0c40_13_nf; +extern cpuop_func_noret op_0c40_13_ff; +extern cpuop_func_noret op_0c50_13_nf; +extern cpuop_func_noret op_0c50_13_ff; +extern cpuop_func_noret op_0c58_13_nf; +extern cpuop_func_noret op_0c58_13_ff; +extern cpuop_func_noret op_0c60_13_nf; +extern cpuop_func_noret op_0c60_13_ff; +extern cpuop_func_noret op_0c68_13_nf; +extern cpuop_func_noret op_0c68_13_ff; +extern cpuop_func_noret op_0c70_13_nf; +extern cpuop_func_noret op_0c70_13_ff; +extern cpuop_func_noret op_0c78_13_nf; +extern cpuop_func_noret op_0c78_13_ff; +extern cpuop_func_noret op_0c79_13_nf; +extern cpuop_func_noret op_0c79_13_ff; +extern cpuop_func_noret op_0c80_13_nf; +extern cpuop_func_noret op_0c80_13_ff; +extern cpuop_func_noret op_0c90_13_nf; +extern cpuop_func_noret op_0c90_13_ff; +extern cpuop_func_noret op_0c98_13_nf; +extern cpuop_func_noret op_0c98_13_ff; +extern cpuop_func_noret op_0ca0_13_nf; +extern cpuop_func_noret op_0ca0_13_ff; +extern cpuop_func_noret op_0ca8_13_nf; +extern cpuop_func_noret op_0ca8_13_ff; +extern cpuop_func_noret op_0cb0_13_nf; +extern cpuop_func_noret op_0cb0_13_ff; +extern cpuop_func_noret op_0cb8_13_nf; +extern cpuop_func_noret op_0cb8_13_ff; +extern cpuop_func_noret op_0cb9_13_nf; +extern cpuop_func_noret op_0cb9_13_ff; +extern cpuop_func_noret op_0e10_13_nf; +extern cpuop_func_noret op_0e10_13_ff; +extern cpuop_func_noret op_0e18_13_nf; +extern cpuop_func_noret op_0e18_13_ff; +extern cpuop_func_noret op_0e20_13_nf; +extern cpuop_func_noret op_0e20_13_ff; +extern cpuop_func_noret op_0e28_13_nf; +extern cpuop_func_noret op_0e28_13_ff; +extern cpuop_func_noret op_0e30_13_nf; +extern cpuop_func_noret op_0e30_13_ff; +extern cpuop_func_noret op_0e38_13_nf; +extern cpuop_func_noret op_0e38_13_ff; +extern cpuop_func_noret op_0e39_13_nf; +extern cpuop_func_noret op_0e39_13_ff; +extern cpuop_func_noret op_0e50_13_nf; +extern cpuop_func_noret op_0e50_13_ff; +extern cpuop_func_noret op_0e58_13_nf; +extern cpuop_func_noret op_0e58_13_ff; +extern cpuop_func_noret op_0e60_13_nf; +extern cpuop_func_noret op_0e60_13_ff; +extern cpuop_func_noret op_0e68_13_nf; +extern cpuop_func_noret op_0e68_13_ff; +extern cpuop_func_noret op_0e70_13_nf; +extern cpuop_func_noret op_0e70_13_ff; +extern cpuop_func_noret op_0e78_13_nf; +extern cpuop_func_noret op_0e78_13_ff; +extern cpuop_func_noret op_0e79_13_nf; +extern cpuop_func_noret op_0e79_13_ff; +extern cpuop_func_noret op_0e90_13_nf; +extern cpuop_func_noret op_0e90_13_ff; +extern cpuop_func_noret op_0e98_13_nf; +extern cpuop_func_noret op_0e98_13_ff; +extern cpuop_func_noret op_0ea0_13_nf; +extern cpuop_func_noret op_0ea0_13_ff; +extern cpuop_func_noret op_0ea8_13_nf; +extern cpuop_func_noret op_0ea8_13_ff; +extern cpuop_func_noret op_0eb0_13_nf; +extern cpuop_func_noret op_0eb0_13_ff; +extern cpuop_func_noret op_0eb8_13_nf; +extern cpuop_func_noret op_0eb8_13_ff; +extern cpuop_func_noret op_0eb9_13_nf; +extern cpuop_func_noret op_0eb9_13_ff; +extern cpuop_func_noret op_1000_13_nf; +extern cpuop_func_noret op_1000_13_ff; +extern cpuop_func_noret op_1010_13_nf; +extern cpuop_func_noret op_1010_13_ff; +extern cpuop_func_noret op_1018_13_nf; +extern cpuop_func_noret op_1018_13_ff; +extern cpuop_func_noret op_1020_13_nf; +extern cpuop_func_noret op_1020_13_ff; +extern cpuop_func_noret op_1028_13_nf; +extern cpuop_func_noret op_1028_13_ff; +extern cpuop_func_noret op_1030_13_nf; +extern cpuop_func_noret op_1030_13_ff; +extern cpuop_func_noret op_1038_13_nf; +extern cpuop_func_noret op_1038_13_ff; +extern cpuop_func_noret op_1039_13_nf; +extern cpuop_func_noret op_1039_13_ff; +extern cpuop_func_noret op_103a_13_nf; +extern cpuop_func_noret op_103a_13_ff; +extern cpuop_func_noret op_103b_13_nf; +extern cpuop_func_noret op_103b_13_ff; +extern cpuop_func_noret op_103c_13_nf; +extern cpuop_func_noret op_103c_13_ff; +extern cpuop_func_noret op_1080_13_nf; +extern cpuop_func_noret op_1080_13_ff; +extern cpuop_func_noret op_1090_13_nf; +extern cpuop_func_noret op_1090_13_ff; +extern cpuop_func_noret op_1098_13_nf; +extern cpuop_func_noret op_1098_13_ff; +extern cpuop_func_noret op_10a0_13_nf; +extern cpuop_func_noret op_10a0_13_ff; +extern cpuop_func_noret op_10a8_13_nf; +extern cpuop_func_noret op_10a8_13_ff; +extern cpuop_func_noret op_10b0_13_nf; +extern cpuop_func_noret op_10b0_13_ff; +extern cpuop_func_noret op_10b8_13_nf; +extern cpuop_func_noret op_10b8_13_ff; +extern cpuop_func_noret op_10b9_13_nf; +extern cpuop_func_noret op_10b9_13_ff; +extern cpuop_func_noret op_10ba_13_nf; +extern cpuop_func_noret op_10ba_13_ff; +extern cpuop_func_noret op_10bb_13_nf; +extern cpuop_func_noret op_10bb_13_ff; +extern cpuop_func_noret op_10bc_13_nf; +extern cpuop_func_noret op_10bc_13_ff; +extern cpuop_func_noret op_10c0_13_nf; +extern cpuop_func_noret op_10c0_13_ff; +extern cpuop_func_noret op_10d0_13_nf; +extern cpuop_func_noret op_10d0_13_ff; +extern cpuop_func_noret op_10d8_13_nf; +extern cpuop_func_noret op_10d8_13_ff; +extern cpuop_func_noret op_10e0_13_nf; +extern cpuop_func_noret op_10e0_13_ff; +extern cpuop_func_noret op_10e8_13_nf; +extern cpuop_func_noret op_10e8_13_ff; +extern cpuop_func_noret op_10f0_13_nf; +extern cpuop_func_noret op_10f0_13_ff; +extern cpuop_func_noret op_10f8_13_nf; +extern cpuop_func_noret op_10f8_13_ff; +extern cpuop_func_noret op_10f9_13_nf; +extern cpuop_func_noret op_10f9_13_ff; +extern cpuop_func_noret op_10fa_13_nf; +extern cpuop_func_noret op_10fa_13_ff; +extern cpuop_func_noret op_10fb_13_nf; +extern cpuop_func_noret op_10fb_13_ff; +extern cpuop_func_noret op_10fc_13_nf; +extern cpuop_func_noret op_10fc_13_ff; +extern cpuop_func_noret op_1100_13_nf; +extern cpuop_func_noret op_1100_13_ff; +extern cpuop_func_noret op_1110_13_nf; +extern cpuop_func_noret op_1110_13_ff; +extern cpuop_func_noret op_1118_13_nf; +extern cpuop_func_noret op_1118_13_ff; +extern cpuop_func_noret op_1120_13_nf; +extern cpuop_func_noret op_1120_13_ff; +extern cpuop_func_noret op_1128_13_nf; +extern cpuop_func_noret op_1128_13_ff; +extern cpuop_func_noret op_1130_13_nf; +extern cpuop_func_noret op_1130_13_ff; +extern cpuop_func_noret op_1138_13_nf; +extern cpuop_func_noret op_1138_13_ff; +extern cpuop_func_noret op_1139_13_nf; +extern cpuop_func_noret op_1139_13_ff; +extern cpuop_func_noret op_113a_13_nf; +extern cpuop_func_noret op_113a_13_ff; +extern cpuop_func_noret op_113b_13_nf; +extern cpuop_func_noret op_113b_13_ff; +extern cpuop_func_noret op_113c_13_nf; +extern cpuop_func_noret op_113c_13_ff; +extern cpuop_func_noret op_1140_13_nf; +extern cpuop_func_noret op_1140_13_ff; +extern cpuop_func_noret op_1150_13_nf; +extern cpuop_func_noret op_1150_13_ff; +extern cpuop_func_noret op_1158_13_nf; +extern cpuop_func_noret op_1158_13_ff; +extern cpuop_func_noret op_1160_13_nf; +extern cpuop_func_noret op_1160_13_ff; +extern cpuop_func_noret op_1168_13_nf; +extern cpuop_func_noret op_1168_13_ff; +extern cpuop_func_noret op_1170_13_nf; +extern cpuop_func_noret op_1170_13_ff; +extern cpuop_func_noret op_1178_13_nf; +extern cpuop_func_noret op_1178_13_ff; +extern cpuop_func_noret op_1179_13_nf; +extern cpuop_func_noret op_1179_13_ff; +extern cpuop_func_noret op_117a_13_nf; +extern cpuop_func_noret op_117a_13_ff; +extern cpuop_func_noret op_117b_13_nf; +extern cpuop_func_noret op_117b_13_ff; +extern cpuop_func_noret op_117c_13_nf; +extern cpuop_func_noret op_117c_13_ff; +extern cpuop_func_noret op_1180_13_nf; +extern cpuop_func_noret op_1180_13_ff; +extern cpuop_func_noret op_1190_13_nf; +extern cpuop_func_noret op_1190_13_ff; +extern cpuop_func_noret op_1198_13_nf; +extern cpuop_func_noret op_1198_13_ff; +extern cpuop_func_noret op_11a0_13_nf; +extern cpuop_func_noret op_11a0_13_ff; +extern cpuop_func_noret op_11a8_13_nf; +extern cpuop_func_noret op_11a8_13_ff; +extern cpuop_func_noret op_11b0_13_nf; +extern cpuop_func_noret op_11b0_13_ff; +extern cpuop_func_noret op_11b8_13_nf; +extern cpuop_func_noret op_11b8_13_ff; +extern cpuop_func_noret op_11b9_13_nf; +extern cpuop_func_noret op_11b9_13_ff; +extern cpuop_func_noret op_11ba_13_nf; +extern cpuop_func_noret op_11ba_13_ff; +extern cpuop_func_noret op_11bb_13_nf; +extern cpuop_func_noret op_11bb_13_ff; +extern cpuop_func_noret op_11bc_13_nf; +extern cpuop_func_noret op_11bc_13_ff; +extern cpuop_func_noret op_11c0_13_nf; +extern cpuop_func_noret op_11c0_13_ff; +extern cpuop_func_noret op_11d0_13_nf; +extern cpuop_func_noret op_11d0_13_ff; +extern cpuop_func_noret op_11d8_13_nf; +extern cpuop_func_noret op_11d8_13_ff; +extern cpuop_func_noret op_11e0_13_nf; +extern cpuop_func_noret op_11e0_13_ff; +extern cpuop_func_noret op_11e8_13_nf; +extern cpuop_func_noret op_11e8_13_ff; +extern cpuop_func_noret op_11f0_13_nf; +extern cpuop_func_noret op_11f0_13_ff; +extern cpuop_func_noret op_11f8_13_nf; +extern cpuop_func_noret op_11f8_13_ff; +extern cpuop_func_noret op_11f9_13_nf; +extern cpuop_func_noret op_11f9_13_ff; +extern cpuop_func_noret op_11fa_13_nf; +extern cpuop_func_noret op_11fa_13_ff; +extern cpuop_func_noret op_11fb_13_nf; +extern cpuop_func_noret op_11fb_13_ff; +extern cpuop_func_noret op_11fc_13_nf; +extern cpuop_func_noret op_11fc_13_ff; +extern cpuop_func_noret op_13c0_13_nf; +extern cpuop_func_noret op_13c0_13_ff; +extern cpuop_func_noret op_13d0_13_nf; +extern cpuop_func_noret op_13d0_13_ff; +extern cpuop_func_noret op_13d8_13_nf; +extern cpuop_func_noret op_13d8_13_ff; +extern cpuop_func_noret op_13e0_13_nf; +extern cpuop_func_noret op_13e0_13_ff; +extern cpuop_func_noret op_13e8_13_nf; +extern cpuop_func_noret op_13e8_13_ff; +extern cpuop_func_noret op_13f0_13_nf; +extern cpuop_func_noret op_13f0_13_ff; +extern cpuop_func_noret op_13f8_13_nf; +extern cpuop_func_noret op_13f8_13_ff; +extern cpuop_func_noret op_13f9_13_nf; +extern cpuop_func_noret op_13f9_13_ff; +extern cpuop_func_noret op_13fa_13_nf; +extern cpuop_func_noret op_13fa_13_ff; +extern cpuop_func_noret op_13fb_13_nf; +extern cpuop_func_noret op_13fb_13_ff; +extern cpuop_func_noret op_13fc_13_nf; +extern cpuop_func_noret op_13fc_13_ff; +extern cpuop_func_noret op_2000_13_nf; +extern cpuop_func_noret op_2000_13_ff; +extern cpuop_func_noret op_2008_13_nf; +extern cpuop_func_noret op_2008_13_ff; +extern cpuop_func_noret op_2010_13_nf; +extern cpuop_func_noret op_2010_13_ff; +extern cpuop_func_noret op_2018_13_nf; +extern cpuop_func_noret op_2018_13_ff; +extern cpuop_func_noret op_2020_13_nf; +extern cpuop_func_noret op_2020_13_ff; +extern cpuop_func_noret op_2028_13_nf; +extern cpuop_func_noret op_2028_13_ff; +extern cpuop_func_noret op_2030_13_nf; +extern cpuop_func_noret op_2030_13_ff; +extern cpuop_func_noret op_2038_13_nf; +extern cpuop_func_noret op_2038_13_ff; +extern cpuop_func_noret op_2039_13_nf; +extern cpuop_func_noret op_2039_13_ff; +extern cpuop_func_noret op_203a_13_nf; +extern cpuop_func_noret op_203a_13_ff; +extern cpuop_func_noret op_203b_13_nf; +extern cpuop_func_noret op_203b_13_ff; +extern cpuop_func_noret op_203c_13_nf; +extern cpuop_func_noret op_203c_13_ff; +extern cpuop_func_noret op_2040_13_nf; +extern cpuop_func_noret op_2040_13_ff; +extern cpuop_func_noret op_2048_13_nf; +extern cpuop_func_noret op_2048_13_ff; +extern cpuop_func_noret op_2050_13_nf; +extern cpuop_func_noret op_2050_13_ff; +extern cpuop_func_noret op_2058_13_nf; +extern cpuop_func_noret op_2058_13_ff; +extern cpuop_func_noret op_2060_13_nf; +extern cpuop_func_noret op_2060_13_ff; +extern cpuop_func_noret op_2068_13_nf; +extern cpuop_func_noret op_2068_13_ff; +extern cpuop_func_noret op_2070_13_nf; +extern cpuop_func_noret op_2070_13_ff; +extern cpuop_func_noret op_2078_13_nf; +extern cpuop_func_noret op_2078_13_ff; +extern cpuop_func_noret op_2079_13_nf; +extern cpuop_func_noret op_2079_13_ff; +extern cpuop_func_noret op_207a_13_nf; +extern cpuop_func_noret op_207a_13_ff; +extern cpuop_func_noret op_207b_13_nf; +extern cpuop_func_noret op_207b_13_ff; +extern cpuop_func_noret op_207c_13_nf; +extern cpuop_func_noret op_207c_13_ff; +extern cpuop_func_noret op_2080_13_nf; +extern cpuop_func_noret op_2080_13_ff; +extern cpuop_func_noret op_2088_13_nf; +extern cpuop_func_noret op_2088_13_ff; +extern cpuop_func_noret op_2090_13_nf; +extern cpuop_func_noret op_2090_13_ff; +extern cpuop_func_noret op_2098_13_nf; +extern cpuop_func_noret op_2098_13_ff; +extern cpuop_func_noret op_20a0_13_nf; +extern cpuop_func_noret op_20a0_13_ff; +extern cpuop_func_noret op_20a8_13_nf; +extern cpuop_func_noret op_20a8_13_ff; +extern cpuop_func_noret op_20b0_13_nf; +extern cpuop_func_noret op_20b0_13_ff; +extern cpuop_func_noret op_20b8_13_nf; +extern cpuop_func_noret op_20b8_13_ff; +extern cpuop_func_noret op_20b9_13_nf; +extern cpuop_func_noret op_20b9_13_ff; +extern cpuop_func_noret op_20ba_13_nf; +extern cpuop_func_noret op_20ba_13_ff; +extern cpuop_func_noret op_20bb_13_nf; +extern cpuop_func_noret op_20bb_13_ff; +extern cpuop_func_noret op_20bc_13_nf; +extern cpuop_func_noret op_20bc_13_ff; +extern cpuop_func_noret op_20c0_13_nf; +extern cpuop_func_noret op_20c0_13_ff; +extern cpuop_func_noret op_20c8_13_nf; +extern cpuop_func_noret op_20c8_13_ff; +extern cpuop_func_noret op_20d0_13_nf; +extern cpuop_func_noret op_20d0_13_ff; +extern cpuop_func_noret op_20d8_13_nf; +extern cpuop_func_noret op_20d8_13_ff; +extern cpuop_func_noret op_20e0_13_nf; +extern cpuop_func_noret op_20e0_13_ff; +extern cpuop_func_noret op_20e8_13_nf; +extern cpuop_func_noret op_20e8_13_ff; +extern cpuop_func_noret op_20f0_13_nf; +extern cpuop_func_noret op_20f0_13_ff; +extern cpuop_func_noret op_20f8_13_nf; +extern cpuop_func_noret op_20f8_13_ff; +extern cpuop_func_noret op_20f9_13_nf; +extern cpuop_func_noret op_20f9_13_ff; +extern cpuop_func_noret op_20fa_13_nf; +extern cpuop_func_noret op_20fa_13_ff; +extern cpuop_func_noret op_20fb_13_nf; +extern cpuop_func_noret op_20fb_13_ff; +extern cpuop_func_noret op_20fc_13_nf; +extern cpuop_func_noret op_20fc_13_ff; +extern cpuop_func_noret op_2100_13_nf; +extern cpuop_func_noret op_2100_13_ff; +extern cpuop_func_noret op_2108_13_nf; +extern cpuop_func_noret op_2108_13_ff; +extern cpuop_func_noret op_2110_13_nf; +extern cpuop_func_noret op_2110_13_ff; +extern cpuop_func_noret op_2118_13_nf; +extern cpuop_func_noret op_2118_13_ff; +extern cpuop_func_noret op_2120_13_nf; +extern cpuop_func_noret op_2120_13_ff; +extern cpuop_func_noret op_2128_13_nf; +extern cpuop_func_noret op_2128_13_ff; +extern cpuop_func_noret op_2130_13_nf; +extern cpuop_func_noret op_2130_13_ff; +extern cpuop_func_noret op_2138_13_nf; +extern cpuop_func_noret op_2138_13_ff; +extern cpuop_func_noret op_2139_13_nf; +extern cpuop_func_noret op_2139_13_ff; +extern cpuop_func_noret op_213a_13_nf; +extern cpuop_func_noret op_213a_13_ff; +extern cpuop_func_noret op_213b_13_nf; +extern cpuop_func_noret op_213b_13_ff; +extern cpuop_func_noret op_213c_13_nf; +extern cpuop_func_noret op_213c_13_ff; +extern cpuop_func_noret op_2140_13_nf; +extern cpuop_func_noret op_2140_13_ff; +extern cpuop_func_noret op_2148_13_nf; +extern cpuop_func_noret op_2148_13_ff; +extern cpuop_func_noret op_2150_13_nf; +extern cpuop_func_noret op_2150_13_ff; +extern cpuop_func_noret op_2158_13_nf; +extern cpuop_func_noret op_2158_13_ff; +extern cpuop_func_noret op_2160_13_nf; +extern cpuop_func_noret op_2160_13_ff; +extern cpuop_func_noret op_2168_13_nf; +extern cpuop_func_noret op_2168_13_ff; +extern cpuop_func_noret op_2170_13_nf; +extern cpuop_func_noret op_2170_13_ff; +extern cpuop_func_noret op_2178_13_nf; +extern cpuop_func_noret op_2178_13_ff; +extern cpuop_func_noret op_2179_13_nf; +extern cpuop_func_noret op_2179_13_ff; +extern cpuop_func_noret op_217a_13_nf; +extern cpuop_func_noret op_217a_13_ff; +extern cpuop_func_noret op_217b_13_nf; +extern cpuop_func_noret op_217b_13_ff; +extern cpuop_func_noret op_217c_13_nf; +extern cpuop_func_noret op_217c_13_ff; +extern cpuop_func_noret op_2180_13_nf; +extern cpuop_func_noret op_2180_13_ff; +extern cpuop_func_noret op_2188_13_nf; +extern cpuop_func_noret op_2188_13_ff; +extern cpuop_func_noret op_2190_13_nf; +extern cpuop_func_noret op_2190_13_ff; +extern cpuop_func_noret op_2198_13_nf; +extern cpuop_func_noret op_2198_13_ff; +extern cpuop_func_noret op_21a0_13_nf; +extern cpuop_func_noret op_21a0_13_ff; +extern cpuop_func_noret op_21a8_13_nf; +extern cpuop_func_noret op_21a8_13_ff; +extern cpuop_func_noret op_21b0_13_nf; +extern cpuop_func_noret op_21b0_13_ff; +extern cpuop_func_noret op_21b8_13_nf; +extern cpuop_func_noret op_21b8_13_ff; +extern cpuop_func_noret op_21b9_13_nf; +extern cpuop_func_noret op_21b9_13_ff; +extern cpuop_func_noret op_21ba_13_nf; +extern cpuop_func_noret op_21ba_13_ff; +extern cpuop_func_noret op_21bb_13_nf; +extern cpuop_func_noret op_21bb_13_ff; +extern cpuop_func_noret op_21bc_13_nf; +extern cpuop_func_noret op_21bc_13_ff; +extern cpuop_func_noret op_21c0_13_nf; +extern cpuop_func_noret op_21c0_13_ff; +extern cpuop_func_noret op_21c8_13_nf; +extern cpuop_func_noret op_21c8_13_ff; +extern cpuop_func_noret op_21d0_13_nf; +extern cpuop_func_noret op_21d0_13_ff; +extern cpuop_func_noret op_21d8_13_nf; +extern cpuop_func_noret op_21d8_13_ff; +extern cpuop_func_noret op_21e0_13_nf; +extern cpuop_func_noret op_21e0_13_ff; +extern cpuop_func_noret op_21e8_13_nf; +extern cpuop_func_noret op_21e8_13_ff; +extern cpuop_func_noret op_21f0_13_nf; +extern cpuop_func_noret op_21f0_13_ff; +extern cpuop_func_noret op_21f8_13_nf; +extern cpuop_func_noret op_21f8_13_ff; +extern cpuop_func_noret op_21f9_13_nf; +extern cpuop_func_noret op_21f9_13_ff; +extern cpuop_func_noret op_21fa_13_nf; +extern cpuop_func_noret op_21fa_13_ff; +extern cpuop_func_noret op_21fb_13_nf; +extern cpuop_func_noret op_21fb_13_ff; +extern cpuop_func_noret op_21fc_13_nf; +extern cpuop_func_noret op_21fc_13_ff; +extern cpuop_func_noret op_23c0_13_nf; +extern cpuop_func_noret op_23c0_13_ff; +extern cpuop_func_noret op_23c8_13_nf; +extern cpuop_func_noret op_23c8_13_ff; +extern cpuop_func_noret op_23d0_13_nf; +extern cpuop_func_noret op_23d0_13_ff; +extern cpuop_func_noret op_23d8_13_nf; +extern cpuop_func_noret op_23d8_13_ff; +extern cpuop_func_noret op_23e0_13_nf; +extern cpuop_func_noret op_23e0_13_ff; +extern cpuop_func_noret op_23e8_13_nf; +extern cpuop_func_noret op_23e8_13_ff; +extern cpuop_func_noret op_23f0_13_nf; +extern cpuop_func_noret op_23f0_13_ff; +extern cpuop_func_noret op_23f8_13_nf; +extern cpuop_func_noret op_23f8_13_ff; +extern cpuop_func_noret op_23f9_13_nf; +extern cpuop_func_noret op_23f9_13_ff; +extern cpuop_func_noret op_23fa_13_nf; +extern cpuop_func_noret op_23fa_13_ff; +extern cpuop_func_noret op_23fb_13_nf; +extern cpuop_func_noret op_23fb_13_ff; +extern cpuop_func_noret op_23fc_13_nf; +extern cpuop_func_noret op_23fc_13_ff; +extern cpuop_func_noret op_3000_13_nf; +extern cpuop_func_noret op_3000_13_ff; +extern cpuop_func_noret op_3008_13_nf; +extern cpuop_func_noret op_3008_13_ff; +extern cpuop_func_noret op_3010_13_nf; +extern cpuop_func_noret op_3010_13_ff; +extern cpuop_func_noret op_3018_13_nf; +extern cpuop_func_noret op_3018_13_ff; +extern cpuop_func_noret op_3020_13_nf; +extern cpuop_func_noret op_3020_13_ff; +extern cpuop_func_noret op_3028_13_nf; +extern cpuop_func_noret op_3028_13_ff; +extern cpuop_func_noret op_3030_13_nf; +extern cpuop_func_noret op_3030_13_ff; +extern cpuop_func_noret op_3038_13_nf; +extern cpuop_func_noret op_3038_13_ff; +extern cpuop_func_noret op_3039_13_nf; +extern cpuop_func_noret op_3039_13_ff; +extern cpuop_func_noret op_303a_13_nf; +extern cpuop_func_noret op_303a_13_ff; +extern cpuop_func_noret op_303b_13_nf; +extern cpuop_func_noret op_303b_13_ff; +extern cpuop_func_noret op_303c_13_nf; +extern cpuop_func_noret op_303c_13_ff; +extern cpuop_func_noret op_3040_13_nf; +extern cpuop_func_noret op_3040_13_ff; +extern cpuop_func_noret op_3048_13_nf; +extern cpuop_func_noret op_3048_13_ff; +extern cpuop_func_noret op_3050_13_nf; +extern cpuop_func_noret op_3050_13_ff; +extern cpuop_func_noret op_3058_13_nf; +extern cpuop_func_noret op_3058_13_ff; +extern cpuop_func_noret op_3060_13_nf; +extern cpuop_func_noret op_3060_13_ff; +extern cpuop_func_noret op_3068_13_nf; +extern cpuop_func_noret op_3068_13_ff; +extern cpuop_func_noret op_3070_13_nf; +extern cpuop_func_noret op_3070_13_ff; +extern cpuop_func_noret op_3078_13_nf; +extern cpuop_func_noret op_3078_13_ff; +extern cpuop_func_noret op_3079_13_nf; +extern cpuop_func_noret op_3079_13_ff; +extern cpuop_func_noret op_307a_13_nf; +extern cpuop_func_noret op_307a_13_ff; +extern cpuop_func_noret op_307b_13_nf; +extern cpuop_func_noret op_307b_13_ff; +extern cpuop_func_noret op_307c_13_nf; +extern cpuop_func_noret op_307c_13_ff; +extern cpuop_func_noret op_3080_13_nf; +extern cpuop_func_noret op_3080_13_ff; +extern cpuop_func_noret op_3088_13_nf; +extern cpuop_func_noret op_3088_13_ff; +extern cpuop_func_noret op_3090_13_nf; +extern cpuop_func_noret op_3090_13_ff; +extern cpuop_func_noret op_3098_13_nf; +extern cpuop_func_noret op_3098_13_ff; +extern cpuop_func_noret op_30a0_13_nf; +extern cpuop_func_noret op_30a0_13_ff; +extern cpuop_func_noret op_30a8_13_nf; +extern cpuop_func_noret op_30a8_13_ff; +extern cpuop_func_noret op_30b0_13_nf; +extern cpuop_func_noret op_30b0_13_ff; +extern cpuop_func_noret op_30b8_13_nf; +extern cpuop_func_noret op_30b8_13_ff; +extern cpuop_func_noret op_30b9_13_nf; +extern cpuop_func_noret op_30b9_13_ff; +extern cpuop_func_noret op_30ba_13_nf; +extern cpuop_func_noret op_30ba_13_ff; +extern cpuop_func_noret op_30bb_13_nf; +extern cpuop_func_noret op_30bb_13_ff; +extern cpuop_func_noret op_30bc_13_nf; +extern cpuop_func_noret op_30bc_13_ff; +extern cpuop_func_noret op_30c0_13_nf; +extern cpuop_func_noret op_30c0_13_ff; +extern cpuop_func_noret op_30c8_13_nf; +extern cpuop_func_noret op_30c8_13_ff; +extern cpuop_func_noret op_30d0_13_nf; +extern cpuop_func_noret op_30d0_13_ff; +extern cpuop_func_noret op_30d8_13_nf; +extern cpuop_func_noret op_30d8_13_ff; +extern cpuop_func_noret op_30e0_13_nf; +extern cpuop_func_noret op_30e0_13_ff; +extern cpuop_func_noret op_30e8_13_nf; +extern cpuop_func_noret op_30e8_13_ff; +extern cpuop_func_noret op_30f0_13_nf; +extern cpuop_func_noret op_30f0_13_ff; +extern cpuop_func_noret op_30f8_13_nf; +extern cpuop_func_noret op_30f8_13_ff; +extern cpuop_func_noret op_30f9_13_nf; +extern cpuop_func_noret op_30f9_13_ff; +extern cpuop_func_noret op_30fa_13_nf; +extern cpuop_func_noret op_30fa_13_ff; +extern cpuop_func_noret op_30fb_13_nf; +extern cpuop_func_noret op_30fb_13_ff; +extern cpuop_func_noret op_30fc_13_nf; +extern cpuop_func_noret op_30fc_13_ff; +extern cpuop_func_noret op_3100_13_nf; +extern cpuop_func_noret op_3100_13_ff; +extern cpuop_func_noret op_3108_13_nf; +extern cpuop_func_noret op_3108_13_ff; +extern cpuop_func_noret op_3110_13_nf; +extern cpuop_func_noret op_3110_13_ff; +extern cpuop_func_noret op_3118_13_nf; +extern cpuop_func_noret op_3118_13_ff; +extern cpuop_func_noret op_3120_13_nf; +extern cpuop_func_noret op_3120_13_ff; +extern cpuop_func_noret op_3128_13_nf; +extern cpuop_func_noret op_3128_13_ff; +extern cpuop_func_noret op_3130_13_nf; +extern cpuop_func_noret op_3130_13_ff; +extern cpuop_func_noret op_3138_13_nf; +extern cpuop_func_noret op_3138_13_ff; +extern cpuop_func_noret op_3139_13_nf; +extern cpuop_func_noret op_3139_13_ff; +extern cpuop_func_noret op_313a_13_nf; +extern cpuop_func_noret op_313a_13_ff; +extern cpuop_func_noret op_313b_13_nf; +extern cpuop_func_noret op_313b_13_ff; +extern cpuop_func_noret op_313c_13_nf; +extern cpuop_func_noret op_313c_13_ff; +extern cpuop_func_noret op_3140_13_nf; +extern cpuop_func_noret op_3140_13_ff; +extern cpuop_func_noret op_3148_13_nf; +extern cpuop_func_noret op_3148_13_ff; +extern cpuop_func_noret op_3150_13_nf; +extern cpuop_func_noret op_3150_13_ff; +extern cpuop_func_noret op_3158_13_nf; +extern cpuop_func_noret op_3158_13_ff; +extern cpuop_func_noret op_3160_13_nf; +extern cpuop_func_noret op_3160_13_ff; +extern cpuop_func_noret op_3168_13_nf; +extern cpuop_func_noret op_3168_13_ff; +extern cpuop_func_noret op_3170_13_nf; +extern cpuop_func_noret op_3170_13_ff; +extern cpuop_func_noret op_3178_13_nf; +extern cpuop_func_noret op_3178_13_ff; +extern cpuop_func_noret op_3179_13_nf; +extern cpuop_func_noret op_3179_13_ff; +extern cpuop_func_noret op_317a_13_nf; +extern cpuop_func_noret op_317a_13_ff; +extern cpuop_func_noret op_317b_13_nf; +extern cpuop_func_noret op_317b_13_ff; +extern cpuop_func_noret op_317c_13_nf; +extern cpuop_func_noret op_317c_13_ff; +extern cpuop_func_noret op_3180_13_nf; +extern cpuop_func_noret op_3180_13_ff; +extern cpuop_func_noret op_3188_13_nf; +extern cpuop_func_noret op_3188_13_ff; +extern cpuop_func_noret op_3190_13_nf; +extern cpuop_func_noret op_3190_13_ff; +extern cpuop_func_noret op_3198_13_nf; +extern cpuop_func_noret op_3198_13_ff; +extern cpuop_func_noret op_31a0_13_nf; +extern cpuop_func_noret op_31a0_13_ff; +extern cpuop_func_noret op_31a8_13_nf; +extern cpuop_func_noret op_31a8_13_ff; +extern cpuop_func_noret op_31b0_13_nf; +extern cpuop_func_noret op_31b0_13_ff; +extern cpuop_func_noret op_31b8_13_nf; +extern cpuop_func_noret op_31b8_13_ff; +extern cpuop_func_noret op_31b9_13_nf; +extern cpuop_func_noret op_31b9_13_ff; +extern cpuop_func_noret op_31ba_13_nf; +extern cpuop_func_noret op_31ba_13_ff; +extern cpuop_func_noret op_31bb_13_nf; +extern cpuop_func_noret op_31bb_13_ff; +extern cpuop_func_noret op_31bc_13_nf; +extern cpuop_func_noret op_31bc_13_ff; +extern cpuop_func_noret op_31c0_13_nf; +extern cpuop_func_noret op_31c0_13_ff; +extern cpuop_func_noret op_31c8_13_nf; +extern cpuop_func_noret op_31c8_13_ff; +extern cpuop_func_noret op_31d0_13_nf; +extern cpuop_func_noret op_31d0_13_ff; +extern cpuop_func_noret op_31d8_13_nf; +extern cpuop_func_noret op_31d8_13_ff; +extern cpuop_func_noret op_31e0_13_nf; +extern cpuop_func_noret op_31e0_13_ff; +extern cpuop_func_noret op_31e8_13_nf; +extern cpuop_func_noret op_31e8_13_ff; +extern cpuop_func_noret op_31f0_13_nf; +extern cpuop_func_noret op_31f0_13_ff; +extern cpuop_func_noret op_31f8_13_nf; +extern cpuop_func_noret op_31f8_13_ff; +extern cpuop_func_noret op_31f9_13_nf; +extern cpuop_func_noret op_31f9_13_ff; +extern cpuop_func_noret op_31fa_13_nf; +extern cpuop_func_noret op_31fa_13_ff; +extern cpuop_func_noret op_31fb_13_nf; +extern cpuop_func_noret op_31fb_13_ff; +extern cpuop_func_noret op_31fc_13_nf; +extern cpuop_func_noret op_31fc_13_ff; +extern cpuop_func_noret op_33c0_13_nf; +extern cpuop_func_noret op_33c0_13_ff; +extern cpuop_func_noret op_33c8_13_nf; +extern cpuop_func_noret op_33c8_13_ff; +extern cpuop_func_noret op_33d0_13_nf; +extern cpuop_func_noret op_33d0_13_ff; +extern cpuop_func_noret op_33d8_13_nf; +extern cpuop_func_noret op_33d8_13_ff; +extern cpuop_func_noret op_33e0_13_nf; +extern cpuop_func_noret op_33e0_13_ff; +extern cpuop_func_noret op_33e8_13_nf; +extern cpuop_func_noret op_33e8_13_ff; +extern cpuop_func_noret op_33f0_13_nf; +extern cpuop_func_noret op_33f0_13_ff; +extern cpuop_func_noret op_33f8_13_nf; +extern cpuop_func_noret op_33f8_13_ff; +extern cpuop_func_noret op_33f9_13_nf; +extern cpuop_func_noret op_33f9_13_ff; +extern cpuop_func_noret op_33fa_13_nf; +extern cpuop_func_noret op_33fa_13_ff; +extern cpuop_func_noret op_33fb_13_nf; +extern cpuop_func_noret op_33fb_13_ff; +extern cpuop_func_noret op_33fc_13_nf; +extern cpuop_func_noret op_33fc_13_ff; +extern cpuop_func_noret op_4000_13_nf; +extern cpuop_func_noret op_4000_13_ff; +extern cpuop_func_noret op_4010_13_nf; +extern cpuop_func_noret op_4010_13_ff; +extern cpuop_func_noret op_4018_13_nf; +extern cpuop_func_noret op_4018_13_ff; +extern cpuop_func_noret op_4020_13_nf; +extern cpuop_func_noret op_4020_13_ff; +extern cpuop_func_noret op_4028_13_nf; +extern cpuop_func_noret op_4028_13_ff; +extern cpuop_func_noret op_4030_13_nf; +extern cpuop_func_noret op_4030_13_ff; +extern cpuop_func_noret op_4038_13_nf; +extern cpuop_func_noret op_4038_13_ff; +extern cpuop_func_noret op_4039_13_nf; +extern cpuop_func_noret op_4039_13_ff; +extern cpuop_func_noret op_4040_13_nf; +extern cpuop_func_noret op_4040_13_ff; +extern cpuop_func_noret op_4050_13_nf; +extern cpuop_func_noret op_4050_13_ff; +extern cpuop_func_noret op_4058_13_nf; +extern cpuop_func_noret op_4058_13_ff; +extern cpuop_func_noret op_4060_13_nf; +extern cpuop_func_noret op_4060_13_ff; +extern cpuop_func_noret op_4068_13_nf; +extern cpuop_func_noret op_4068_13_ff; +extern cpuop_func_noret op_4070_13_nf; +extern cpuop_func_noret op_4070_13_ff; +extern cpuop_func_noret op_4078_13_nf; +extern cpuop_func_noret op_4078_13_ff; +extern cpuop_func_noret op_4079_13_nf; +extern cpuop_func_noret op_4079_13_ff; +extern cpuop_func_noret op_4080_13_nf; +extern cpuop_func_noret op_4080_13_ff; +extern cpuop_func_noret op_4090_13_nf; +extern cpuop_func_noret op_4090_13_ff; +extern cpuop_func_noret op_4098_13_nf; +extern cpuop_func_noret op_4098_13_ff; +extern cpuop_func_noret op_40a0_13_nf; +extern cpuop_func_noret op_40a0_13_ff; +extern cpuop_func_noret op_40a8_13_nf; +extern cpuop_func_noret op_40a8_13_ff; +extern cpuop_func_noret op_40b0_13_nf; +extern cpuop_func_noret op_40b0_13_ff; +extern cpuop_func_noret op_40b8_13_nf; +extern cpuop_func_noret op_40b8_13_ff; +extern cpuop_func_noret op_40b9_13_nf; +extern cpuop_func_noret op_40b9_13_ff; +extern cpuop_func_noret op_40c0_13_nf; +extern cpuop_func_noret op_40c0_13_ff; +extern cpuop_func_noret op_40d0_13_nf; +extern cpuop_func_noret op_40d0_13_ff; +extern cpuop_func_noret op_40d8_13_nf; +extern cpuop_func_noret op_40d8_13_ff; +extern cpuop_func_noret op_40e0_13_nf; +extern cpuop_func_noret op_40e0_13_ff; +extern cpuop_func_noret op_40e8_13_nf; +extern cpuop_func_noret op_40e8_13_ff; +extern cpuop_func_noret op_40f0_13_nf; +extern cpuop_func_noret op_40f0_13_ff; +extern cpuop_func_noret op_40f8_13_nf; +extern cpuop_func_noret op_40f8_13_ff; +extern cpuop_func_noret op_40f9_13_nf; +extern cpuop_func_noret op_40f9_13_ff; +extern cpuop_func_noret op_4180_13_nf; +extern cpuop_func_noret op_4180_13_ff; +extern cpuop_func_noret op_4190_13_nf; +extern cpuop_func_noret op_4190_13_ff; +extern cpuop_func_noret op_4198_13_nf; +extern cpuop_func_noret op_4198_13_ff; +extern cpuop_func_noret op_41a0_13_nf; +extern cpuop_func_noret op_41a0_13_ff; +extern cpuop_func_noret op_41a8_13_nf; +extern cpuop_func_noret op_41a8_13_ff; +extern cpuop_func_noret op_41b0_13_nf; +extern cpuop_func_noret op_41b0_13_ff; +extern cpuop_func_noret op_41b8_13_nf; +extern cpuop_func_noret op_41b8_13_ff; +extern cpuop_func_noret op_41b9_13_nf; +extern cpuop_func_noret op_41b9_13_ff; +extern cpuop_func_noret op_41ba_13_nf; +extern cpuop_func_noret op_41ba_13_ff; +extern cpuop_func_noret op_41bb_13_nf; +extern cpuop_func_noret op_41bb_13_ff; +extern cpuop_func_noret op_41bc_13_nf; +extern cpuop_func_noret op_41bc_13_ff; +extern cpuop_func_noret op_41d0_13_nf; +extern cpuop_func_noret op_41d0_13_ff; +extern cpuop_func_noret op_41e8_13_nf; +extern cpuop_func_noret op_41e8_13_ff; +extern cpuop_func_noret op_41f0_13_nf; +extern cpuop_func_noret op_41f0_13_ff; +extern cpuop_func_noret op_41f8_13_nf; +extern cpuop_func_noret op_41f8_13_ff; +extern cpuop_func_noret op_41f9_13_nf; +extern cpuop_func_noret op_41f9_13_ff; +extern cpuop_func_noret op_41fa_13_nf; +extern cpuop_func_noret op_41fa_13_ff; +extern cpuop_func_noret op_41fb_13_nf; +extern cpuop_func_noret op_41fb_13_ff; +extern cpuop_func_noret op_4200_13_nf; +extern cpuop_func_noret op_4200_13_ff; +extern cpuop_func_noret op_4210_13_nf; +extern cpuop_func_noret op_4210_13_ff; +extern cpuop_func_noret op_4218_13_nf; +extern cpuop_func_noret op_4218_13_ff; +extern cpuop_func_noret op_4220_13_nf; +extern cpuop_func_noret op_4220_13_ff; +extern cpuop_func_noret op_4228_13_nf; +extern cpuop_func_noret op_4228_13_ff; +extern cpuop_func_noret op_4230_13_nf; +extern cpuop_func_noret op_4230_13_ff; +extern cpuop_func_noret op_4238_13_nf; +extern cpuop_func_noret op_4238_13_ff; +extern cpuop_func_noret op_4239_13_nf; +extern cpuop_func_noret op_4239_13_ff; +extern cpuop_func_noret op_4240_13_nf; +extern cpuop_func_noret op_4240_13_ff; +extern cpuop_func_noret op_4250_13_nf; +extern cpuop_func_noret op_4250_13_ff; +extern cpuop_func_noret op_4258_13_nf; +extern cpuop_func_noret op_4258_13_ff; +extern cpuop_func_noret op_4260_13_nf; +extern cpuop_func_noret op_4260_13_ff; +extern cpuop_func_noret op_4268_13_nf; +extern cpuop_func_noret op_4268_13_ff; +extern cpuop_func_noret op_4270_13_nf; +extern cpuop_func_noret op_4270_13_ff; +extern cpuop_func_noret op_4278_13_nf; +extern cpuop_func_noret op_4278_13_ff; +extern cpuop_func_noret op_4279_13_nf; +extern cpuop_func_noret op_4279_13_ff; +extern cpuop_func_noret op_4280_13_nf; +extern cpuop_func_noret op_4280_13_ff; +extern cpuop_func_noret op_4290_13_nf; +extern cpuop_func_noret op_4290_13_ff; +extern cpuop_func_noret op_4298_13_nf; +extern cpuop_func_noret op_4298_13_ff; +extern cpuop_func_noret op_42a0_13_nf; +extern cpuop_func_noret op_42a0_13_ff; +extern cpuop_func_noret op_42a8_13_nf; +extern cpuop_func_noret op_42a8_13_ff; +extern cpuop_func_noret op_42b0_13_nf; +extern cpuop_func_noret op_42b0_13_ff; +extern cpuop_func_noret op_42b8_13_nf; +extern cpuop_func_noret op_42b8_13_ff; +extern cpuop_func_noret op_42b9_13_nf; +extern cpuop_func_noret op_42b9_13_ff; +extern cpuop_func_noret op_42c0_13_nf; +extern cpuop_func_noret op_42c0_13_ff; +extern cpuop_func_noret op_42d0_13_nf; +extern cpuop_func_noret op_42d0_13_ff; +extern cpuop_func_noret op_42d8_13_nf; +extern cpuop_func_noret op_42d8_13_ff; +extern cpuop_func_noret op_42e0_13_nf; +extern cpuop_func_noret op_42e0_13_ff; +extern cpuop_func_noret op_42e8_13_nf; +extern cpuop_func_noret op_42e8_13_ff; +extern cpuop_func_noret op_42f0_13_nf; +extern cpuop_func_noret op_42f0_13_ff; +extern cpuop_func_noret op_42f8_13_nf; +extern cpuop_func_noret op_42f8_13_ff; +extern cpuop_func_noret op_42f9_13_nf; +extern cpuop_func_noret op_42f9_13_ff; +extern cpuop_func_noret op_4400_13_nf; +extern cpuop_func_noret op_4400_13_ff; +extern cpuop_func_noret op_4410_13_nf; +extern cpuop_func_noret op_4410_13_ff; +extern cpuop_func_noret op_4418_13_nf; +extern cpuop_func_noret op_4418_13_ff; +extern cpuop_func_noret op_4420_13_nf; +extern cpuop_func_noret op_4420_13_ff; +extern cpuop_func_noret op_4428_13_nf; +extern cpuop_func_noret op_4428_13_ff; +extern cpuop_func_noret op_4430_13_nf; +extern cpuop_func_noret op_4430_13_ff; +extern cpuop_func_noret op_4438_13_nf; +extern cpuop_func_noret op_4438_13_ff; +extern cpuop_func_noret op_4439_13_nf; +extern cpuop_func_noret op_4439_13_ff; +extern cpuop_func_noret op_4440_13_nf; +extern cpuop_func_noret op_4440_13_ff; +extern cpuop_func_noret op_4450_13_nf; +extern cpuop_func_noret op_4450_13_ff; +extern cpuop_func_noret op_4458_13_nf; +extern cpuop_func_noret op_4458_13_ff; +extern cpuop_func_noret op_4460_13_nf; +extern cpuop_func_noret op_4460_13_ff; +extern cpuop_func_noret op_4468_13_nf; +extern cpuop_func_noret op_4468_13_ff; +extern cpuop_func_noret op_4470_13_nf; +extern cpuop_func_noret op_4470_13_ff; +extern cpuop_func_noret op_4478_13_nf; +extern cpuop_func_noret op_4478_13_ff; +extern cpuop_func_noret op_4479_13_nf; +extern cpuop_func_noret op_4479_13_ff; +extern cpuop_func_noret op_4480_13_nf; +extern cpuop_func_noret op_4480_13_ff; +extern cpuop_func_noret op_4490_13_nf; +extern cpuop_func_noret op_4490_13_ff; +extern cpuop_func_noret op_4498_13_nf; +extern cpuop_func_noret op_4498_13_ff; +extern cpuop_func_noret op_44a0_13_nf; +extern cpuop_func_noret op_44a0_13_ff; +extern cpuop_func_noret op_44a8_13_nf; +extern cpuop_func_noret op_44a8_13_ff; +extern cpuop_func_noret op_44b0_13_nf; +extern cpuop_func_noret op_44b0_13_ff; +extern cpuop_func_noret op_44b8_13_nf; +extern cpuop_func_noret op_44b8_13_ff; +extern cpuop_func_noret op_44b9_13_nf; +extern cpuop_func_noret op_44b9_13_ff; +extern cpuop_func_noret op_44c0_13_nf; +extern cpuop_func_noret op_44c0_13_ff; +extern cpuop_func_noret op_44d0_13_nf; +extern cpuop_func_noret op_44d0_13_ff; +extern cpuop_func_noret op_44d8_13_nf; +extern cpuop_func_noret op_44d8_13_ff; +extern cpuop_func_noret op_44e0_13_nf; +extern cpuop_func_noret op_44e0_13_ff; +extern cpuop_func_noret op_44e8_13_nf; +extern cpuop_func_noret op_44e8_13_ff; +extern cpuop_func_noret op_44f0_13_nf; +extern cpuop_func_noret op_44f0_13_ff; +extern cpuop_func_noret op_44f8_13_nf; +extern cpuop_func_noret op_44f8_13_ff; +extern cpuop_func_noret op_44f9_13_nf; +extern cpuop_func_noret op_44f9_13_ff; +extern cpuop_func_noret op_44fa_13_nf; +extern cpuop_func_noret op_44fa_13_ff; +extern cpuop_func_noret op_44fb_13_nf; +extern cpuop_func_noret op_44fb_13_ff; +extern cpuop_func_noret op_44fc_13_nf; +extern cpuop_func_noret op_44fc_13_ff; +extern cpuop_func_noret op_4600_13_nf; +extern cpuop_func_noret op_4600_13_ff; +extern cpuop_func_noret op_4610_13_nf; +extern cpuop_func_noret op_4610_13_ff; +extern cpuop_func_noret op_4618_13_nf; +extern cpuop_func_noret op_4618_13_ff; +extern cpuop_func_noret op_4620_13_nf; +extern cpuop_func_noret op_4620_13_ff; +extern cpuop_func_noret op_4628_13_nf; +extern cpuop_func_noret op_4628_13_ff; +extern cpuop_func_noret op_4630_13_nf; +extern cpuop_func_noret op_4630_13_ff; +extern cpuop_func_noret op_4638_13_nf; +extern cpuop_func_noret op_4638_13_ff; +extern cpuop_func_noret op_4639_13_nf; +extern cpuop_func_noret op_4639_13_ff; +extern cpuop_func_noret op_4640_13_nf; +extern cpuop_func_noret op_4640_13_ff; +extern cpuop_func_noret op_4650_13_nf; +extern cpuop_func_noret op_4650_13_ff; +extern cpuop_func_noret op_4658_13_nf; +extern cpuop_func_noret op_4658_13_ff; +extern cpuop_func_noret op_4660_13_nf; +extern cpuop_func_noret op_4660_13_ff; +extern cpuop_func_noret op_4668_13_nf; +extern cpuop_func_noret op_4668_13_ff; +extern cpuop_func_noret op_4670_13_nf; +extern cpuop_func_noret op_4670_13_ff; +extern cpuop_func_noret op_4678_13_nf; +extern cpuop_func_noret op_4678_13_ff; +extern cpuop_func_noret op_4679_13_nf; +extern cpuop_func_noret op_4679_13_ff; +extern cpuop_func_noret op_4680_13_nf; +extern cpuop_func_noret op_4680_13_ff; +extern cpuop_func_noret op_4690_13_nf; +extern cpuop_func_noret op_4690_13_ff; +extern cpuop_func_noret op_4698_13_nf; +extern cpuop_func_noret op_4698_13_ff; +extern cpuop_func_noret op_46a0_13_nf; +extern cpuop_func_noret op_46a0_13_ff; +extern cpuop_func_noret op_46a8_13_nf; +extern cpuop_func_noret op_46a8_13_ff; +extern cpuop_func_noret op_46b0_13_nf; +extern cpuop_func_noret op_46b0_13_ff; +extern cpuop_func_noret op_46b8_13_nf; +extern cpuop_func_noret op_46b8_13_ff; +extern cpuop_func_noret op_46b9_13_nf; +extern cpuop_func_noret op_46b9_13_ff; +extern cpuop_func_noret op_46c0_13_nf; +extern cpuop_func_noret op_46c0_13_ff; +extern cpuop_func_noret op_46d0_13_nf; +extern cpuop_func_noret op_46d0_13_ff; +extern cpuop_func_noret op_46d8_13_nf; +extern cpuop_func_noret op_46d8_13_ff; +extern cpuop_func_noret op_46e0_13_nf; +extern cpuop_func_noret op_46e0_13_ff; +extern cpuop_func_noret op_46e8_13_nf; +extern cpuop_func_noret op_46e8_13_ff; +extern cpuop_func_noret op_46f0_13_nf; +extern cpuop_func_noret op_46f0_13_ff; +extern cpuop_func_noret op_46f8_13_nf; +extern cpuop_func_noret op_46f8_13_ff; +extern cpuop_func_noret op_46f9_13_nf; +extern cpuop_func_noret op_46f9_13_ff; +extern cpuop_func_noret op_46fa_13_nf; +extern cpuop_func_noret op_46fa_13_ff; +extern cpuop_func_noret op_46fb_13_nf; +extern cpuop_func_noret op_46fb_13_ff; +extern cpuop_func_noret op_46fc_13_nf; +extern cpuop_func_noret op_46fc_13_ff; +extern cpuop_func_noret op_4800_13_nf; +extern cpuop_func_noret op_4800_13_ff; +extern cpuop_func_noret op_4810_13_nf; +extern cpuop_func_noret op_4810_13_ff; +extern cpuop_func_noret op_4818_13_nf; +extern cpuop_func_noret op_4818_13_ff; +extern cpuop_func_noret op_4820_13_nf; +extern cpuop_func_noret op_4820_13_ff; +extern cpuop_func_noret op_4828_13_nf; +extern cpuop_func_noret op_4828_13_ff; +extern cpuop_func_noret op_4830_13_nf; +extern cpuop_func_noret op_4830_13_ff; +extern cpuop_func_noret op_4838_13_nf; +extern cpuop_func_noret op_4838_13_ff; +extern cpuop_func_noret op_4839_13_nf; +extern cpuop_func_noret op_4839_13_ff; +extern cpuop_func_noret op_4840_13_nf; +extern cpuop_func_noret op_4840_13_ff; +extern cpuop_func_noret op_4848_13_nf; +extern cpuop_func_noret op_4848_13_ff; +extern cpuop_func_noret op_4850_13_nf; +extern cpuop_func_noret op_4850_13_ff; +extern cpuop_func_noret op_4868_13_nf; +extern cpuop_func_noret op_4868_13_ff; +extern cpuop_func_noret op_4870_13_nf; +extern cpuop_func_noret op_4870_13_ff; +extern cpuop_func_noret op_4878_13_nf; +extern cpuop_func_noret op_4878_13_ff; +extern cpuop_func_noret op_4879_13_nf; +extern cpuop_func_noret op_4879_13_ff; +extern cpuop_func_noret op_487a_13_nf; +extern cpuop_func_noret op_487a_13_ff; +extern cpuop_func_noret op_487b_13_nf; +extern cpuop_func_noret op_487b_13_ff; +extern cpuop_func_noret op_4880_13_nf; +extern cpuop_func_noret op_4880_13_ff; +extern cpuop_func_noret op_4890_13_nf; +extern cpuop_func_noret op_4890_13_ff; +extern cpuop_func_noret op_48a0_13_nf; +extern cpuop_func_noret op_48a0_13_ff; +extern cpuop_func_noret op_48a8_13_nf; +extern cpuop_func_noret op_48a8_13_ff; +extern cpuop_func_noret op_48b0_13_nf; +extern cpuop_func_noret op_48b0_13_ff; +extern cpuop_func_noret op_48b8_13_nf; +extern cpuop_func_noret op_48b8_13_ff; +extern cpuop_func_noret op_48b9_13_nf; +extern cpuop_func_noret op_48b9_13_ff; +extern cpuop_func_noret op_48c0_13_nf; +extern cpuop_func_noret op_48c0_13_ff; +extern cpuop_func_noret op_48d0_13_nf; +extern cpuop_func_noret op_48d0_13_ff; +extern cpuop_func_noret op_48e0_13_nf; +extern cpuop_func_noret op_48e0_13_ff; +extern cpuop_func_noret op_48e8_13_nf; +extern cpuop_func_noret op_48e8_13_ff; +extern cpuop_func_noret op_48f0_13_nf; +extern cpuop_func_noret op_48f0_13_ff; +extern cpuop_func_noret op_48f8_13_nf; +extern cpuop_func_noret op_48f8_13_ff; +extern cpuop_func_noret op_48f9_13_nf; +extern cpuop_func_noret op_48f9_13_ff; +extern cpuop_func_noret op_4a00_13_nf; +extern cpuop_func_noret op_4a00_13_ff; +extern cpuop_func_noret op_4a10_13_nf; +extern cpuop_func_noret op_4a10_13_ff; +extern cpuop_func_noret op_4a18_13_nf; +extern cpuop_func_noret op_4a18_13_ff; +extern cpuop_func_noret op_4a20_13_nf; +extern cpuop_func_noret op_4a20_13_ff; +extern cpuop_func_noret op_4a28_13_nf; +extern cpuop_func_noret op_4a28_13_ff; +extern cpuop_func_noret op_4a30_13_nf; +extern cpuop_func_noret op_4a30_13_ff; +extern cpuop_func_noret op_4a38_13_nf; +extern cpuop_func_noret op_4a38_13_ff; +extern cpuop_func_noret op_4a39_13_nf; +extern cpuop_func_noret op_4a39_13_ff; +extern cpuop_func_noret op_4a40_13_nf; +extern cpuop_func_noret op_4a40_13_ff; +extern cpuop_func_noret op_4a50_13_nf; +extern cpuop_func_noret op_4a50_13_ff; +extern cpuop_func_noret op_4a58_13_nf; +extern cpuop_func_noret op_4a58_13_ff; +extern cpuop_func_noret op_4a60_13_nf; +extern cpuop_func_noret op_4a60_13_ff; +extern cpuop_func_noret op_4a68_13_nf; +extern cpuop_func_noret op_4a68_13_ff; +extern cpuop_func_noret op_4a70_13_nf; +extern cpuop_func_noret op_4a70_13_ff; +extern cpuop_func_noret op_4a78_13_nf; +extern cpuop_func_noret op_4a78_13_ff; +extern cpuop_func_noret op_4a79_13_nf; +extern cpuop_func_noret op_4a79_13_ff; +extern cpuop_func_noret op_4a80_13_nf; +extern cpuop_func_noret op_4a80_13_ff; +extern cpuop_func_noret op_4a90_13_nf; +extern cpuop_func_noret op_4a90_13_ff; +extern cpuop_func_noret op_4a98_13_nf; +extern cpuop_func_noret op_4a98_13_ff; +extern cpuop_func_noret op_4aa0_13_nf; +extern cpuop_func_noret op_4aa0_13_ff; +extern cpuop_func_noret op_4aa8_13_nf; +extern cpuop_func_noret op_4aa8_13_ff; +extern cpuop_func_noret op_4ab0_13_nf; +extern cpuop_func_noret op_4ab0_13_ff; +extern cpuop_func_noret op_4ab8_13_nf; +extern cpuop_func_noret op_4ab8_13_ff; +extern cpuop_func_noret op_4ab9_13_nf; +extern cpuop_func_noret op_4ab9_13_ff; +extern cpuop_func_noret op_4ac0_13_nf; +extern cpuop_func_noret op_4ac0_13_ff; +extern cpuop_func_noret op_4ad0_13_nf; +extern cpuop_func_noret op_4ad0_13_ff; +extern cpuop_func_noret op_4ad8_13_nf; +extern cpuop_func_noret op_4ad8_13_ff; +extern cpuop_func_noret op_4ae0_13_nf; +extern cpuop_func_noret op_4ae0_13_ff; +extern cpuop_func_noret op_4ae8_13_nf; +extern cpuop_func_noret op_4ae8_13_ff; +extern cpuop_func_noret op_4af0_13_nf; +extern cpuop_func_noret op_4af0_13_ff; +extern cpuop_func_noret op_4af8_13_nf; +extern cpuop_func_noret op_4af8_13_ff; +extern cpuop_func_noret op_4af9_13_nf; +extern cpuop_func_noret op_4af9_13_ff; +extern cpuop_func_noret op_4c90_13_nf; +extern cpuop_func_noret op_4c90_13_ff; +extern cpuop_func_noret op_4c98_13_nf; +extern cpuop_func_noret op_4c98_13_ff; +extern cpuop_func_noret op_4ca8_13_nf; +extern cpuop_func_noret op_4ca8_13_ff; +extern cpuop_func_noret op_4cb0_13_nf; +extern cpuop_func_noret op_4cb0_13_ff; +extern cpuop_func_noret op_4cb8_13_nf; +extern cpuop_func_noret op_4cb8_13_ff; +extern cpuop_func_noret op_4cb9_13_nf; +extern cpuop_func_noret op_4cb9_13_ff; +extern cpuop_func_noret op_4cba_13_nf; +extern cpuop_func_noret op_4cba_13_ff; +extern cpuop_func_noret op_4cbb_13_nf; +extern cpuop_func_noret op_4cbb_13_ff; +extern cpuop_func_noret op_4cd0_13_nf; +extern cpuop_func_noret op_4cd0_13_ff; +extern cpuop_func_noret op_4cd8_13_nf; +extern cpuop_func_noret op_4cd8_13_ff; +extern cpuop_func_noret op_4ce8_13_nf; +extern cpuop_func_noret op_4ce8_13_ff; +extern cpuop_func_noret op_4cf0_13_nf; +extern cpuop_func_noret op_4cf0_13_ff; +extern cpuop_func_noret op_4cf8_13_nf; +extern cpuop_func_noret op_4cf8_13_ff; +extern cpuop_func_noret op_4cf9_13_nf; +extern cpuop_func_noret op_4cf9_13_ff; +extern cpuop_func_noret op_4cfa_13_nf; +extern cpuop_func_noret op_4cfa_13_ff; +extern cpuop_func_noret op_4cfb_13_nf; +extern cpuop_func_noret op_4cfb_13_ff; +extern cpuop_func_noret op_4e40_13_nf; +extern cpuop_func_noret op_4e40_13_ff; +extern cpuop_func_noret op_4e50_13_nf; +extern cpuop_func_noret op_4e50_13_ff; +extern cpuop_func_noret op_4e58_13_nf; +extern cpuop_func_noret op_4e58_13_ff; +extern cpuop_func_noret op_4e60_13_nf; +extern cpuop_func_noret op_4e60_13_ff; +extern cpuop_func_noret op_4e68_13_nf; +extern cpuop_func_noret op_4e68_13_ff; +extern cpuop_func_noret op_4e70_13_nf; +extern cpuop_func_noret op_4e70_13_ff; +extern cpuop_func_noret op_4e71_13_nf; +extern cpuop_func_noret op_4e71_13_ff; +extern cpuop_func_noret op_4e72_13_nf; +extern cpuop_func_noret op_4e72_13_ff; +extern cpuop_func_noret op_4e73_13_nf; +extern cpuop_func_noret op_4e73_13_ff; +extern cpuop_func_noret op_4e74_13_nf; +extern cpuop_func_noret op_4e74_13_ff; +extern cpuop_func_noret op_4e75_13_nf; +extern cpuop_func_noret op_4e75_13_ff; +extern cpuop_func_noret op_4e76_13_nf; +extern cpuop_func_noret op_4e76_13_ff; +extern cpuop_func_noret op_4e77_13_nf; +extern cpuop_func_noret op_4e77_13_ff; +extern cpuop_func_noret op_4e7a_13_nf; +extern cpuop_func_noret op_4e7a_13_ff; +extern cpuop_func_noret op_4e7b_13_nf; +extern cpuop_func_noret op_4e7b_13_ff; +extern cpuop_func_noret op_4e90_13_nf; +extern cpuop_func_noret op_4e90_13_ff; +extern cpuop_func_noret op_4ea8_13_nf; +extern cpuop_func_noret op_4ea8_13_ff; +extern cpuop_func_noret op_4eb0_13_nf; +extern cpuop_func_noret op_4eb0_13_ff; +extern cpuop_func_noret op_4eb8_13_nf; +extern cpuop_func_noret op_4eb8_13_ff; +extern cpuop_func_noret op_4eb9_13_nf; +extern cpuop_func_noret op_4eb9_13_ff; +extern cpuop_func_noret op_4eba_13_nf; +extern cpuop_func_noret op_4eba_13_ff; +extern cpuop_func_noret op_4ebb_13_nf; +extern cpuop_func_noret op_4ebb_13_ff; +extern cpuop_func_noret op_4ed0_13_nf; +extern cpuop_func_noret op_4ed0_13_ff; +extern cpuop_func_noret op_4ee8_13_nf; +extern cpuop_func_noret op_4ee8_13_ff; +extern cpuop_func_noret op_4ef0_13_nf; +extern cpuop_func_noret op_4ef0_13_ff; +extern cpuop_func_noret op_4ef8_13_nf; +extern cpuop_func_noret op_4ef8_13_ff; +extern cpuop_func_noret op_4ef9_13_nf; +extern cpuop_func_noret op_4ef9_13_ff; +extern cpuop_func_noret op_4efa_13_nf; +extern cpuop_func_noret op_4efa_13_ff; +extern cpuop_func_noret op_4efb_13_nf; +extern cpuop_func_noret op_4efb_13_ff; +extern cpuop_func_noret op_5000_13_nf; +extern cpuop_func_noret op_5000_13_ff; +extern cpuop_func_noret op_5010_13_nf; +extern cpuop_func_noret op_5010_13_ff; +extern cpuop_func_noret op_5018_13_nf; +extern cpuop_func_noret op_5018_13_ff; +extern cpuop_func_noret op_5020_13_nf; +extern cpuop_func_noret op_5020_13_ff; +extern cpuop_func_noret op_5028_13_nf; +extern cpuop_func_noret op_5028_13_ff; +extern cpuop_func_noret op_5030_13_nf; +extern cpuop_func_noret op_5030_13_ff; +extern cpuop_func_noret op_5038_13_nf; +extern cpuop_func_noret op_5038_13_ff; +extern cpuop_func_noret op_5039_13_nf; +extern cpuop_func_noret op_5039_13_ff; +extern cpuop_func_noret op_5040_13_nf; +extern cpuop_func_noret op_5040_13_ff; +extern cpuop_func_noret op_5048_13_nf; +extern cpuop_func_noret op_5048_13_ff; +extern cpuop_func_noret op_5050_13_nf; +extern cpuop_func_noret op_5050_13_ff; +extern cpuop_func_noret op_5058_13_nf; +extern cpuop_func_noret op_5058_13_ff; +extern cpuop_func_noret op_5060_13_nf; +extern cpuop_func_noret op_5060_13_ff; +extern cpuop_func_noret op_5068_13_nf; +extern cpuop_func_noret op_5068_13_ff; +extern cpuop_func_noret op_5070_13_nf; +extern cpuop_func_noret op_5070_13_ff; +extern cpuop_func_noret op_5078_13_nf; +extern cpuop_func_noret op_5078_13_ff; +extern cpuop_func_noret op_5079_13_nf; +extern cpuop_func_noret op_5079_13_ff; +extern cpuop_func_noret op_5080_13_nf; +extern cpuop_func_noret op_5080_13_ff; +extern cpuop_func_noret op_5088_13_nf; +extern cpuop_func_noret op_5088_13_ff; +extern cpuop_func_noret op_5090_13_nf; +extern cpuop_func_noret op_5090_13_ff; +extern cpuop_func_noret op_5098_13_nf; +extern cpuop_func_noret op_5098_13_ff; +extern cpuop_func_noret op_50a0_13_nf; +extern cpuop_func_noret op_50a0_13_ff; +extern cpuop_func_noret op_50a8_13_nf; +extern cpuop_func_noret op_50a8_13_ff; +extern cpuop_func_noret op_50b0_13_nf; +extern cpuop_func_noret op_50b0_13_ff; +extern cpuop_func_noret op_50b8_13_nf; +extern cpuop_func_noret op_50b8_13_ff; +extern cpuop_func_noret op_50b9_13_nf; +extern cpuop_func_noret op_50b9_13_ff; +extern cpuop_func_noret op_50c0_13_nf; +extern cpuop_func_noret op_50c0_13_ff; +extern cpuop_func_noret op_50c8_13_nf; +extern cpuop_func_noret op_50c8_13_ff; +extern cpuop_func_noret op_50d0_13_nf; +extern cpuop_func_noret op_50d0_13_ff; +extern cpuop_func_noret op_50d8_13_nf; +extern cpuop_func_noret op_50d8_13_ff; +extern cpuop_func_noret op_50e0_13_nf; +extern cpuop_func_noret op_50e0_13_ff; +extern cpuop_func_noret op_50e8_13_nf; +extern cpuop_func_noret op_50e8_13_ff; +extern cpuop_func_noret op_50f0_13_nf; +extern cpuop_func_noret op_50f0_13_ff; +extern cpuop_func_noret op_50f8_13_nf; +extern cpuop_func_noret op_50f8_13_ff; +extern cpuop_func_noret op_50f9_13_nf; +extern cpuop_func_noret op_50f9_13_ff; +extern cpuop_func_noret op_5100_13_nf; +extern cpuop_func_noret op_5100_13_ff; +extern cpuop_func_noret op_5110_13_nf; +extern cpuop_func_noret op_5110_13_ff; +extern cpuop_func_noret op_5118_13_nf; +extern cpuop_func_noret op_5118_13_ff; +extern cpuop_func_noret op_5120_13_nf; +extern cpuop_func_noret op_5120_13_ff; +extern cpuop_func_noret op_5128_13_nf; +extern cpuop_func_noret op_5128_13_ff; +extern cpuop_func_noret op_5130_13_nf; +extern cpuop_func_noret op_5130_13_ff; +extern cpuop_func_noret op_5138_13_nf; +extern cpuop_func_noret op_5138_13_ff; +extern cpuop_func_noret op_5139_13_nf; +extern cpuop_func_noret op_5139_13_ff; +extern cpuop_func_noret op_5140_13_nf; +extern cpuop_func_noret op_5140_13_ff; +extern cpuop_func_noret op_5148_13_nf; +extern cpuop_func_noret op_5148_13_ff; +extern cpuop_func_noret op_5150_13_nf; +extern cpuop_func_noret op_5150_13_ff; +extern cpuop_func_noret op_5158_13_nf; +extern cpuop_func_noret op_5158_13_ff; +extern cpuop_func_noret op_5160_13_nf; +extern cpuop_func_noret op_5160_13_ff; +extern cpuop_func_noret op_5168_13_nf; +extern cpuop_func_noret op_5168_13_ff; +extern cpuop_func_noret op_5170_13_nf; +extern cpuop_func_noret op_5170_13_ff; +extern cpuop_func_noret op_5178_13_nf; +extern cpuop_func_noret op_5178_13_ff; +extern cpuop_func_noret op_5179_13_nf; +extern cpuop_func_noret op_5179_13_ff; +extern cpuop_func_noret op_5180_13_nf; +extern cpuop_func_noret op_5180_13_ff; +extern cpuop_func_noret op_5188_13_nf; +extern cpuop_func_noret op_5188_13_ff; +extern cpuop_func_noret op_5190_13_nf; +extern cpuop_func_noret op_5190_13_ff; +extern cpuop_func_noret op_5198_13_nf; +extern cpuop_func_noret op_5198_13_ff; +extern cpuop_func_noret op_51a0_13_nf; +extern cpuop_func_noret op_51a0_13_ff; +extern cpuop_func_noret op_51a8_13_nf; +extern cpuop_func_noret op_51a8_13_ff; +extern cpuop_func_noret op_51b0_13_nf; +extern cpuop_func_noret op_51b0_13_ff; +extern cpuop_func_noret op_51b8_13_nf; +extern cpuop_func_noret op_51b8_13_ff; +extern cpuop_func_noret op_51b9_13_nf; +extern cpuop_func_noret op_51b9_13_ff; +extern cpuop_func_noret op_51c0_13_nf; +extern cpuop_func_noret op_51c0_13_ff; +extern cpuop_func_noret op_51c8_13_nf; +extern cpuop_func_noret op_51c8_13_ff; +extern cpuop_func_noret op_51d0_13_nf; +extern cpuop_func_noret op_51d0_13_ff; +extern cpuop_func_noret op_51d8_13_nf; +extern cpuop_func_noret op_51d8_13_ff; +extern cpuop_func_noret op_51e0_13_nf; +extern cpuop_func_noret op_51e0_13_ff; +extern cpuop_func_noret op_51e8_13_nf; +extern cpuop_func_noret op_51e8_13_ff; +extern cpuop_func_noret op_51f0_13_nf; +extern cpuop_func_noret op_51f0_13_ff; +extern cpuop_func_noret op_51f8_13_nf; +extern cpuop_func_noret op_51f8_13_ff; +extern cpuop_func_noret op_51f9_13_nf; +extern cpuop_func_noret op_51f9_13_ff; +extern cpuop_func_noret op_52c0_13_nf; +extern cpuop_func_noret op_52c0_13_ff; +extern cpuop_func_noret op_52c8_13_nf; +extern cpuop_func_noret op_52c8_13_ff; +extern cpuop_func_noret op_52d0_13_nf; +extern cpuop_func_noret op_52d0_13_ff; +extern cpuop_func_noret op_52d8_13_nf; +extern cpuop_func_noret op_52d8_13_ff; +extern cpuop_func_noret op_52e0_13_nf; +extern cpuop_func_noret op_52e0_13_ff; +extern cpuop_func_noret op_52e8_13_nf; +extern cpuop_func_noret op_52e8_13_ff; +extern cpuop_func_noret op_52f0_13_nf; +extern cpuop_func_noret op_52f0_13_ff; +extern cpuop_func_noret op_52f8_13_nf; +extern cpuop_func_noret op_52f8_13_ff; +extern cpuop_func_noret op_52f9_13_nf; +extern cpuop_func_noret op_52f9_13_ff; +extern cpuop_func_noret op_53c0_13_nf; +extern cpuop_func_noret op_53c0_13_ff; +extern cpuop_func_noret op_53c8_13_nf; +extern cpuop_func_noret op_53c8_13_ff; +extern cpuop_func_noret op_53d0_13_nf; +extern cpuop_func_noret op_53d0_13_ff; +extern cpuop_func_noret op_53d8_13_nf; +extern cpuop_func_noret op_53d8_13_ff; +extern cpuop_func_noret op_53e0_13_nf; +extern cpuop_func_noret op_53e0_13_ff; +extern cpuop_func_noret op_53e8_13_nf; +extern cpuop_func_noret op_53e8_13_ff; +extern cpuop_func_noret op_53f0_13_nf; +extern cpuop_func_noret op_53f0_13_ff; +extern cpuop_func_noret op_53f8_13_nf; +extern cpuop_func_noret op_53f8_13_ff; +extern cpuop_func_noret op_53f9_13_nf; +extern cpuop_func_noret op_53f9_13_ff; +extern cpuop_func_noret op_54c0_13_nf; +extern cpuop_func_noret op_54c0_13_ff; +extern cpuop_func_noret op_54c8_13_nf; +extern cpuop_func_noret op_54c8_13_ff; +extern cpuop_func_noret op_54d0_13_nf; +extern cpuop_func_noret op_54d0_13_ff; +extern cpuop_func_noret op_54d8_13_nf; +extern cpuop_func_noret op_54d8_13_ff; +extern cpuop_func_noret op_54e0_13_nf; +extern cpuop_func_noret op_54e0_13_ff; +extern cpuop_func_noret op_54e8_13_nf; +extern cpuop_func_noret op_54e8_13_ff; +extern cpuop_func_noret op_54f0_13_nf; +extern cpuop_func_noret op_54f0_13_ff; +extern cpuop_func_noret op_54f8_13_nf; +extern cpuop_func_noret op_54f8_13_ff; +extern cpuop_func_noret op_54f9_13_nf; +extern cpuop_func_noret op_54f9_13_ff; +extern cpuop_func_noret op_55c0_13_nf; +extern cpuop_func_noret op_55c0_13_ff; +extern cpuop_func_noret op_55c8_13_nf; +extern cpuop_func_noret op_55c8_13_ff; +extern cpuop_func_noret op_55d0_13_nf; +extern cpuop_func_noret op_55d0_13_ff; +extern cpuop_func_noret op_55d8_13_nf; +extern cpuop_func_noret op_55d8_13_ff; +extern cpuop_func_noret op_55e0_13_nf; +extern cpuop_func_noret op_55e0_13_ff; +extern cpuop_func_noret op_55e8_13_nf; +extern cpuop_func_noret op_55e8_13_ff; +extern cpuop_func_noret op_55f0_13_nf; +extern cpuop_func_noret op_55f0_13_ff; +extern cpuop_func_noret op_55f8_13_nf; +extern cpuop_func_noret op_55f8_13_ff; +extern cpuop_func_noret op_55f9_13_nf; +extern cpuop_func_noret op_55f9_13_ff; +extern cpuop_func_noret op_56c0_13_nf; +extern cpuop_func_noret op_56c0_13_ff; +extern cpuop_func_noret op_56c8_13_nf; +extern cpuop_func_noret op_56c8_13_ff; +extern cpuop_func_noret op_56d0_13_nf; +extern cpuop_func_noret op_56d0_13_ff; +extern cpuop_func_noret op_56d8_13_nf; +extern cpuop_func_noret op_56d8_13_ff; +extern cpuop_func_noret op_56e0_13_nf; +extern cpuop_func_noret op_56e0_13_ff; +extern cpuop_func_noret op_56e8_13_nf; +extern cpuop_func_noret op_56e8_13_ff; +extern cpuop_func_noret op_56f0_13_nf; +extern cpuop_func_noret op_56f0_13_ff; +extern cpuop_func_noret op_56f8_13_nf; +extern cpuop_func_noret op_56f8_13_ff; +extern cpuop_func_noret op_56f9_13_nf; +extern cpuop_func_noret op_56f9_13_ff; +extern cpuop_func_noret op_57c0_13_nf; +extern cpuop_func_noret op_57c0_13_ff; +extern cpuop_func_noret op_57c8_13_nf; +extern cpuop_func_noret op_57c8_13_ff; +extern cpuop_func_noret op_57d0_13_nf; +extern cpuop_func_noret op_57d0_13_ff; +extern cpuop_func_noret op_57d8_13_nf; +extern cpuop_func_noret op_57d8_13_ff; +extern cpuop_func_noret op_57e0_13_nf; +extern cpuop_func_noret op_57e0_13_ff; +extern cpuop_func_noret op_57e8_13_nf; +extern cpuop_func_noret op_57e8_13_ff; +extern cpuop_func_noret op_57f0_13_nf; +extern cpuop_func_noret op_57f0_13_ff; +extern cpuop_func_noret op_57f8_13_nf; +extern cpuop_func_noret op_57f8_13_ff; +extern cpuop_func_noret op_57f9_13_nf; +extern cpuop_func_noret op_57f9_13_ff; +extern cpuop_func_noret op_58c0_13_nf; +extern cpuop_func_noret op_58c0_13_ff; +extern cpuop_func_noret op_58c8_13_nf; +extern cpuop_func_noret op_58c8_13_ff; +extern cpuop_func_noret op_58d0_13_nf; +extern cpuop_func_noret op_58d0_13_ff; +extern cpuop_func_noret op_58d8_13_nf; +extern cpuop_func_noret op_58d8_13_ff; +extern cpuop_func_noret op_58e0_13_nf; +extern cpuop_func_noret op_58e0_13_ff; +extern cpuop_func_noret op_58e8_13_nf; +extern cpuop_func_noret op_58e8_13_ff; +extern cpuop_func_noret op_58f0_13_nf; +extern cpuop_func_noret op_58f0_13_ff; +extern cpuop_func_noret op_58f8_13_nf; +extern cpuop_func_noret op_58f8_13_ff; +extern cpuop_func_noret op_58f9_13_nf; +extern cpuop_func_noret op_58f9_13_ff; +extern cpuop_func_noret op_59c0_13_nf; +extern cpuop_func_noret op_59c0_13_ff; +extern cpuop_func_noret op_59c8_13_nf; +extern cpuop_func_noret op_59c8_13_ff; +extern cpuop_func_noret op_59d0_13_nf; +extern cpuop_func_noret op_59d0_13_ff; +extern cpuop_func_noret op_59d8_13_nf; +extern cpuop_func_noret op_59d8_13_ff; +extern cpuop_func_noret op_59e0_13_nf; +extern cpuop_func_noret op_59e0_13_ff; +extern cpuop_func_noret op_59e8_13_nf; +extern cpuop_func_noret op_59e8_13_ff; +extern cpuop_func_noret op_59f0_13_nf; +extern cpuop_func_noret op_59f0_13_ff; +extern cpuop_func_noret op_59f8_13_nf; +extern cpuop_func_noret op_59f8_13_ff; +extern cpuop_func_noret op_59f9_13_nf; +extern cpuop_func_noret op_59f9_13_ff; +extern cpuop_func_noret op_5ac0_13_nf; +extern cpuop_func_noret op_5ac0_13_ff; +extern cpuop_func_noret op_5ac8_13_nf; +extern cpuop_func_noret op_5ac8_13_ff; +extern cpuop_func_noret op_5ad0_13_nf; +extern cpuop_func_noret op_5ad0_13_ff; +extern cpuop_func_noret op_5ad8_13_nf; +extern cpuop_func_noret op_5ad8_13_ff; +extern cpuop_func_noret op_5ae0_13_nf; +extern cpuop_func_noret op_5ae0_13_ff; +extern cpuop_func_noret op_5ae8_13_nf; +extern cpuop_func_noret op_5ae8_13_ff; +extern cpuop_func_noret op_5af0_13_nf; +extern cpuop_func_noret op_5af0_13_ff; +extern cpuop_func_noret op_5af8_13_nf; +extern cpuop_func_noret op_5af8_13_ff; +extern cpuop_func_noret op_5af9_13_nf; +extern cpuop_func_noret op_5af9_13_ff; +extern cpuop_func_noret op_5bc0_13_nf; +extern cpuop_func_noret op_5bc0_13_ff; +extern cpuop_func_noret op_5bc8_13_nf; +extern cpuop_func_noret op_5bc8_13_ff; +extern cpuop_func_noret op_5bd0_13_nf; +extern cpuop_func_noret op_5bd0_13_ff; +extern cpuop_func_noret op_5bd8_13_nf; +extern cpuop_func_noret op_5bd8_13_ff; +extern cpuop_func_noret op_5be0_13_nf; +extern cpuop_func_noret op_5be0_13_ff; +extern cpuop_func_noret op_5be8_13_nf; +extern cpuop_func_noret op_5be8_13_ff; +extern cpuop_func_noret op_5bf0_13_nf; +extern cpuop_func_noret op_5bf0_13_ff; +extern cpuop_func_noret op_5bf8_13_nf; +extern cpuop_func_noret op_5bf8_13_ff; +extern cpuop_func_noret op_5bf9_13_nf; +extern cpuop_func_noret op_5bf9_13_ff; +extern cpuop_func_noret op_5cc0_13_nf; +extern cpuop_func_noret op_5cc0_13_ff; +extern cpuop_func_noret op_5cc8_13_nf; +extern cpuop_func_noret op_5cc8_13_ff; +extern cpuop_func_noret op_5cd0_13_nf; +extern cpuop_func_noret op_5cd0_13_ff; +extern cpuop_func_noret op_5cd8_13_nf; +extern cpuop_func_noret op_5cd8_13_ff; +extern cpuop_func_noret op_5ce0_13_nf; +extern cpuop_func_noret op_5ce0_13_ff; +extern cpuop_func_noret op_5ce8_13_nf; +extern cpuop_func_noret op_5ce8_13_ff; +extern cpuop_func_noret op_5cf0_13_nf; +extern cpuop_func_noret op_5cf0_13_ff; +extern cpuop_func_noret op_5cf8_13_nf; +extern cpuop_func_noret op_5cf8_13_ff; +extern cpuop_func_noret op_5cf9_13_nf; +extern cpuop_func_noret op_5cf9_13_ff; +extern cpuop_func_noret op_5dc0_13_nf; +extern cpuop_func_noret op_5dc0_13_ff; +extern cpuop_func_noret op_5dc8_13_nf; +extern cpuop_func_noret op_5dc8_13_ff; +extern cpuop_func_noret op_5dd0_13_nf; +extern cpuop_func_noret op_5dd0_13_ff; +extern cpuop_func_noret op_5dd8_13_nf; +extern cpuop_func_noret op_5dd8_13_ff; +extern cpuop_func_noret op_5de0_13_nf; +extern cpuop_func_noret op_5de0_13_ff; +extern cpuop_func_noret op_5de8_13_nf; +extern cpuop_func_noret op_5de8_13_ff; +extern cpuop_func_noret op_5df0_13_nf; +extern cpuop_func_noret op_5df0_13_ff; +extern cpuop_func_noret op_5df8_13_nf; +extern cpuop_func_noret op_5df8_13_ff; +extern cpuop_func_noret op_5df9_13_nf; +extern cpuop_func_noret op_5df9_13_ff; +extern cpuop_func_noret op_5ec0_13_nf; +extern cpuop_func_noret op_5ec0_13_ff; +extern cpuop_func_noret op_5ec8_13_nf; +extern cpuop_func_noret op_5ec8_13_ff; +extern cpuop_func_noret op_5ed0_13_nf; +extern cpuop_func_noret op_5ed0_13_ff; +extern cpuop_func_noret op_5ed8_13_nf; +extern cpuop_func_noret op_5ed8_13_ff; +extern cpuop_func_noret op_5ee0_13_nf; +extern cpuop_func_noret op_5ee0_13_ff; +extern cpuop_func_noret op_5ee8_13_nf; +extern cpuop_func_noret op_5ee8_13_ff; +extern cpuop_func_noret op_5ef0_13_nf; +extern cpuop_func_noret op_5ef0_13_ff; +extern cpuop_func_noret op_5ef8_13_nf; +extern cpuop_func_noret op_5ef8_13_ff; +extern cpuop_func_noret op_5ef9_13_nf; +extern cpuop_func_noret op_5ef9_13_ff; +extern cpuop_func_noret op_5fc0_13_nf; +extern cpuop_func_noret op_5fc0_13_ff; +extern cpuop_func_noret op_5fc8_13_nf; +extern cpuop_func_noret op_5fc8_13_ff; +extern cpuop_func_noret op_5fd0_13_nf; +extern cpuop_func_noret op_5fd0_13_ff; +extern cpuop_func_noret op_5fd8_13_nf; +extern cpuop_func_noret op_5fd8_13_ff; +extern cpuop_func_noret op_5fe0_13_nf; +extern cpuop_func_noret op_5fe0_13_ff; +extern cpuop_func_noret op_5fe8_13_nf; +extern cpuop_func_noret op_5fe8_13_ff; +extern cpuop_func_noret op_5ff0_13_nf; +extern cpuop_func_noret op_5ff0_13_ff; +extern cpuop_func_noret op_5ff8_13_nf; +extern cpuop_func_noret op_5ff8_13_ff; +extern cpuop_func_noret op_5ff9_13_nf; +extern cpuop_func_noret op_5ff9_13_ff; +extern cpuop_func_noret op_6000_13_nf; +extern cpuop_func_noret op_6000_13_ff; +extern cpuop_func_noret op_6001_13_nf; +extern cpuop_func_noret op_6001_13_ff; +extern cpuop_func_noret op_60ff_13_nf; +extern cpuop_func_noret op_60ff_13_ff; +extern cpuop_func_noret op_6100_13_nf; +extern cpuop_func_noret op_6100_13_ff; +extern cpuop_func_noret op_6101_13_nf; +extern cpuop_func_noret op_6101_13_ff; +extern cpuop_func_noret op_61ff_13_nf; +extern cpuop_func_noret op_61ff_13_ff; +extern cpuop_func_noret op_6200_13_nf; +extern cpuop_func_noret op_6200_13_ff; +extern cpuop_func_noret op_6201_13_nf; +extern cpuop_func_noret op_6201_13_ff; +extern cpuop_func_noret op_62ff_13_nf; +extern cpuop_func_noret op_62ff_13_ff; +extern cpuop_func_noret op_6300_13_nf; +extern cpuop_func_noret op_6300_13_ff; +extern cpuop_func_noret op_6301_13_nf; +extern cpuop_func_noret op_6301_13_ff; +extern cpuop_func_noret op_63ff_13_nf; +extern cpuop_func_noret op_63ff_13_ff; +extern cpuop_func_noret op_6400_13_nf; +extern cpuop_func_noret op_6400_13_ff; +extern cpuop_func_noret op_6401_13_nf; +extern cpuop_func_noret op_6401_13_ff; +extern cpuop_func_noret op_64ff_13_nf; +extern cpuop_func_noret op_64ff_13_ff; +extern cpuop_func_noret op_6500_13_nf; +extern cpuop_func_noret op_6500_13_ff; +extern cpuop_func_noret op_6501_13_nf; +extern cpuop_func_noret op_6501_13_ff; +extern cpuop_func_noret op_65ff_13_nf; +extern cpuop_func_noret op_65ff_13_ff; +extern cpuop_func_noret op_6600_13_nf; +extern cpuop_func_noret op_6600_13_ff; +extern cpuop_func_noret op_6601_13_nf; +extern cpuop_func_noret op_6601_13_ff; +extern cpuop_func_noret op_66ff_13_nf; +extern cpuop_func_noret op_66ff_13_ff; +extern cpuop_func_noret op_6700_13_nf; +extern cpuop_func_noret op_6700_13_ff; +extern cpuop_func_noret op_6701_13_nf; +extern cpuop_func_noret op_6701_13_ff; +extern cpuop_func_noret op_67ff_13_nf; +extern cpuop_func_noret op_67ff_13_ff; +extern cpuop_func_noret op_6800_13_nf; +extern cpuop_func_noret op_6800_13_ff; +extern cpuop_func_noret op_6801_13_nf; +extern cpuop_func_noret op_6801_13_ff; +extern cpuop_func_noret op_68ff_13_nf; +extern cpuop_func_noret op_68ff_13_ff; +extern cpuop_func_noret op_6900_13_nf; +extern cpuop_func_noret op_6900_13_ff; +extern cpuop_func_noret op_6901_13_nf; +extern cpuop_func_noret op_6901_13_ff; +extern cpuop_func_noret op_69ff_13_nf; +extern cpuop_func_noret op_69ff_13_ff; +extern cpuop_func_noret op_6a00_13_nf; +extern cpuop_func_noret op_6a00_13_ff; +extern cpuop_func_noret op_6a01_13_nf; +extern cpuop_func_noret op_6a01_13_ff; +extern cpuop_func_noret op_6aff_13_nf; +extern cpuop_func_noret op_6aff_13_ff; +extern cpuop_func_noret op_6b00_13_nf; +extern cpuop_func_noret op_6b00_13_ff; +extern cpuop_func_noret op_6b01_13_nf; +extern cpuop_func_noret op_6b01_13_ff; +extern cpuop_func_noret op_6bff_13_nf; +extern cpuop_func_noret op_6bff_13_ff; +extern cpuop_func_noret op_6c00_13_nf; +extern cpuop_func_noret op_6c00_13_ff; +extern cpuop_func_noret op_6c01_13_nf; +extern cpuop_func_noret op_6c01_13_ff; +extern cpuop_func_noret op_6cff_13_nf; +extern cpuop_func_noret op_6cff_13_ff; +extern cpuop_func_noret op_6d00_13_nf; +extern cpuop_func_noret op_6d00_13_ff; +extern cpuop_func_noret op_6d01_13_nf; +extern cpuop_func_noret op_6d01_13_ff; +extern cpuop_func_noret op_6dff_13_nf; +extern cpuop_func_noret op_6dff_13_ff; +extern cpuop_func_noret op_6e00_13_nf; +extern cpuop_func_noret op_6e00_13_ff; +extern cpuop_func_noret op_6e01_13_nf; +extern cpuop_func_noret op_6e01_13_ff; +extern cpuop_func_noret op_6eff_13_nf; +extern cpuop_func_noret op_6eff_13_ff; +extern cpuop_func_noret op_6f00_13_nf; +extern cpuop_func_noret op_6f00_13_ff; +extern cpuop_func_noret op_6f01_13_nf; +extern cpuop_func_noret op_6f01_13_ff; +extern cpuop_func_noret op_6fff_13_nf; +extern cpuop_func_noret op_6fff_13_ff; +extern cpuop_func_noret op_7000_13_nf; +extern cpuop_func_noret op_7000_13_ff; +extern cpuop_func_noret op_8000_13_nf; +extern cpuop_func_noret op_8000_13_ff; +extern cpuop_func_noret op_8010_13_nf; +extern cpuop_func_noret op_8010_13_ff; +extern cpuop_func_noret op_8018_13_nf; +extern cpuop_func_noret op_8018_13_ff; +extern cpuop_func_noret op_8020_13_nf; +extern cpuop_func_noret op_8020_13_ff; +extern cpuop_func_noret op_8028_13_nf; +extern cpuop_func_noret op_8028_13_ff; +extern cpuop_func_noret op_8030_13_nf; +extern cpuop_func_noret op_8030_13_ff; +extern cpuop_func_noret op_8038_13_nf; +extern cpuop_func_noret op_8038_13_ff; +extern cpuop_func_noret op_8039_13_nf; +extern cpuop_func_noret op_8039_13_ff; +extern cpuop_func_noret op_803a_13_nf; +extern cpuop_func_noret op_803a_13_ff; +extern cpuop_func_noret op_803b_13_nf; +extern cpuop_func_noret op_803b_13_ff; +extern cpuop_func_noret op_803c_13_nf; +extern cpuop_func_noret op_803c_13_ff; +extern cpuop_func_noret op_8040_13_nf; +extern cpuop_func_noret op_8040_13_ff; +extern cpuop_func_noret op_8050_13_nf; +extern cpuop_func_noret op_8050_13_ff; +extern cpuop_func_noret op_8058_13_nf; +extern cpuop_func_noret op_8058_13_ff; +extern cpuop_func_noret op_8060_13_nf; +extern cpuop_func_noret op_8060_13_ff; +extern cpuop_func_noret op_8068_13_nf; +extern cpuop_func_noret op_8068_13_ff; +extern cpuop_func_noret op_8070_13_nf; +extern cpuop_func_noret op_8070_13_ff; +extern cpuop_func_noret op_8078_13_nf; +extern cpuop_func_noret op_8078_13_ff; +extern cpuop_func_noret op_8079_13_nf; +extern cpuop_func_noret op_8079_13_ff; +extern cpuop_func_noret op_807a_13_nf; +extern cpuop_func_noret op_807a_13_ff; +extern cpuop_func_noret op_807b_13_nf; +extern cpuop_func_noret op_807b_13_ff; +extern cpuop_func_noret op_807c_13_nf; +extern cpuop_func_noret op_807c_13_ff; +extern cpuop_func_noret op_8080_13_nf; +extern cpuop_func_noret op_8080_13_ff; +extern cpuop_func_noret op_8090_13_nf; +extern cpuop_func_noret op_8090_13_ff; +extern cpuop_func_noret op_8098_13_nf; +extern cpuop_func_noret op_8098_13_ff; +extern cpuop_func_noret op_80a0_13_nf; +extern cpuop_func_noret op_80a0_13_ff; +extern cpuop_func_noret op_80a8_13_nf; +extern cpuop_func_noret op_80a8_13_ff; +extern cpuop_func_noret op_80b0_13_nf; +extern cpuop_func_noret op_80b0_13_ff; +extern cpuop_func_noret op_80b8_13_nf; +extern cpuop_func_noret op_80b8_13_ff; +extern cpuop_func_noret op_80b9_13_nf; +extern cpuop_func_noret op_80b9_13_ff; +extern cpuop_func_noret op_80ba_13_nf; +extern cpuop_func_noret op_80ba_13_ff; +extern cpuop_func_noret op_80bb_13_nf; +extern cpuop_func_noret op_80bb_13_ff; +extern cpuop_func_noret op_80bc_13_nf; +extern cpuop_func_noret op_80bc_13_ff; +extern cpuop_func_noret op_80c0_13_nf; +extern cpuop_func_noret op_80c0_13_ff; +extern cpuop_func_noret op_80d0_13_nf; +extern cpuop_func_noret op_80d0_13_ff; +extern cpuop_func_noret op_80d8_13_nf; +extern cpuop_func_noret op_80d8_13_ff; +extern cpuop_func_noret op_80e0_13_nf; +extern cpuop_func_noret op_80e0_13_ff; +extern cpuop_func_noret op_80e8_13_nf; +extern cpuop_func_noret op_80e8_13_ff; +extern cpuop_func_noret op_80f0_13_nf; +extern cpuop_func_noret op_80f0_13_ff; +extern cpuop_func_noret op_80f8_13_nf; +extern cpuop_func_noret op_80f8_13_ff; +extern cpuop_func_noret op_80f9_13_nf; +extern cpuop_func_noret op_80f9_13_ff; +extern cpuop_func_noret op_80fa_13_nf; +extern cpuop_func_noret op_80fa_13_ff; +extern cpuop_func_noret op_80fb_13_nf; +extern cpuop_func_noret op_80fb_13_ff; +extern cpuop_func_noret op_80fc_13_nf; +extern cpuop_func_noret op_80fc_13_ff; +extern cpuop_func_noret op_8100_13_nf; +extern cpuop_func_noret op_8100_13_ff; +extern cpuop_func_noret op_8108_13_nf; +extern cpuop_func_noret op_8108_13_ff; +extern cpuop_func_noret op_8110_13_nf; +extern cpuop_func_noret op_8110_13_ff; +extern cpuop_func_noret op_8118_13_nf; +extern cpuop_func_noret op_8118_13_ff; +extern cpuop_func_noret op_8120_13_nf; +extern cpuop_func_noret op_8120_13_ff; +extern cpuop_func_noret op_8128_13_nf; +extern cpuop_func_noret op_8128_13_ff; +extern cpuop_func_noret op_8130_13_nf; +extern cpuop_func_noret op_8130_13_ff; +extern cpuop_func_noret op_8138_13_nf; +extern cpuop_func_noret op_8138_13_ff; +extern cpuop_func_noret op_8139_13_nf; +extern cpuop_func_noret op_8139_13_ff; +extern cpuop_func_noret op_8150_13_nf; +extern cpuop_func_noret op_8150_13_ff; +extern cpuop_func_noret op_8158_13_nf; +extern cpuop_func_noret op_8158_13_ff; +extern cpuop_func_noret op_8160_13_nf; +extern cpuop_func_noret op_8160_13_ff; +extern cpuop_func_noret op_8168_13_nf; +extern cpuop_func_noret op_8168_13_ff; +extern cpuop_func_noret op_8170_13_nf; +extern cpuop_func_noret op_8170_13_ff; +extern cpuop_func_noret op_8178_13_nf; +extern cpuop_func_noret op_8178_13_ff; +extern cpuop_func_noret op_8179_13_nf; +extern cpuop_func_noret op_8179_13_ff; +extern cpuop_func_noret op_8190_13_nf; +extern cpuop_func_noret op_8190_13_ff; +extern cpuop_func_noret op_8198_13_nf; +extern cpuop_func_noret op_8198_13_ff; +extern cpuop_func_noret op_81a0_13_nf; +extern cpuop_func_noret op_81a0_13_ff; +extern cpuop_func_noret op_81a8_13_nf; +extern cpuop_func_noret op_81a8_13_ff; +extern cpuop_func_noret op_81b0_13_nf; +extern cpuop_func_noret op_81b0_13_ff; +extern cpuop_func_noret op_81b8_13_nf; +extern cpuop_func_noret op_81b8_13_ff; +extern cpuop_func_noret op_81b9_13_nf; +extern cpuop_func_noret op_81b9_13_ff; +extern cpuop_func_noret op_81c0_13_nf; +extern cpuop_func_noret op_81c0_13_ff; +extern cpuop_func_noret op_81d0_13_nf; +extern cpuop_func_noret op_81d0_13_ff; +extern cpuop_func_noret op_81d8_13_nf; +extern cpuop_func_noret op_81d8_13_ff; +extern cpuop_func_noret op_81e0_13_nf; +extern cpuop_func_noret op_81e0_13_ff; +extern cpuop_func_noret op_81e8_13_nf; +extern cpuop_func_noret op_81e8_13_ff; +extern cpuop_func_noret op_81f0_13_nf; +extern cpuop_func_noret op_81f0_13_ff; +extern cpuop_func_noret op_81f8_13_nf; +extern cpuop_func_noret op_81f8_13_ff; +extern cpuop_func_noret op_81f9_13_nf; +extern cpuop_func_noret op_81f9_13_ff; +extern cpuop_func_noret op_81fa_13_nf; +extern cpuop_func_noret op_81fa_13_ff; +extern cpuop_func_noret op_81fb_13_nf; +extern cpuop_func_noret op_81fb_13_ff; +extern cpuop_func_noret op_81fc_13_nf; +extern cpuop_func_noret op_81fc_13_ff; +extern cpuop_func_noret op_9000_13_nf; +extern cpuop_func_noret op_9000_13_ff; +extern cpuop_func_noret op_9010_13_nf; +extern cpuop_func_noret op_9010_13_ff; +extern cpuop_func_noret op_9018_13_nf; +extern cpuop_func_noret op_9018_13_ff; +extern cpuop_func_noret op_9020_13_nf; +extern cpuop_func_noret op_9020_13_ff; +extern cpuop_func_noret op_9028_13_nf; +extern cpuop_func_noret op_9028_13_ff; +extern cpuop_func_noret op_9030_13_nf; +extern cpuop_func_noret op_9030_13_ff; +extern cpuop_func_noret op_9038_13_nf; +extern cpuop_func_noret op_9038_13_ff; +extern cpuop_func_noret op_9039_13_nf; +extern cpuop_func_noret op_9039_13_ff; +extern cpuop_func_noret op_903a_13_nf; +extern cpuop_func_noret op_903a_13_ff; +extern cpuop_func_noret op_903b_13_nf; +extern cpuop_func_noret op_903b_13_ff; +extern cpuop_func_noret op_903c_13_nf; +extern cpuop_func_noret op_903c_13_ff; +extern cpuop_func_noret op_9040_13_nf; +extern cpuop_func_noret op_9040_13_ff; +extern cpuop_func_noret op_9048_13_nf; +extern cpuop_func_noret op_9048_13_ff; +extern cpuop_func_noret op_9050_13_nf; +extern cpuop_func_noret op_9050_13_ff; +extern cpuop_func_noret op_9058_13_nf; +extern cpuop_func_noret op_9058_13_ff; +extern cpuop_func_noret op_9060_13_nf; +extern cpuop_func_noret op_9060_13_ff; +extern cpuop_func_noret op_9068_13_nf; +extern cpuop_func_noret op_9068_13_ff; +extern cpuop_func_noret op_9070_13_nf; +extern cpuop_func_noret op_9070_13_ff; +extern cpuop_func_noret op_9078_13_nf; +extern cpuop_func_noret op_9078_13_ff; +extern cpuop_func_noret op_9079_13_nf; +extern cpuop_func_noret op_9079_13_ff; +extern cpuop_func_noret op_907a_13_nf; +extern cpuop_func_noret op_907a_13_ff; +extern cpuop_func_noret op_907b_13_nf; +extern cpuop_func_noret op_907b_13_ff; +extern cpuop_func_noret op_907c_13_nf; +extern cpuop_func_noret op_907c_13_ff; +extern cpuop_func_noret op_9080_13_nf; +extern cpuop_func_noret op_9080_13_ff; +extern cpuop_func_noret op_9088_13_nf; +extern cpuop_func_noret op_9088_13_ff; +extern cpuop_func_noret op_9090_13_nf; +extern cpuop_func_noret op_9090_13_ff; +extern cpuop_func_noret op_9098_13_nf; +extern cpuop_func_noret op_9098_13_ff; +extern cpuop_func_noret op_90a0_13_nf; +extern cpuop_func_noret op_90a0_13_ff; +extern cpuop_func_noret op_90a8_13_nf; +extern cpuop_func_noret op_90a8_13_ff; +extern cpuop_func_noret op_90b0_13_nf; +extern cpuop_func_noret op_90b0_13_ff; +extern cpuop_func_noret op_90b8_13_nf; +extern cpuop_func_noret op_90b8_13_ff; +extern cpuop_func_noret op_90b9_13_nf; +extern cpuop_func_noret op_90b9_13_ff; +extern cpuop_func_noret op_90ba_13_nf; +extern cpuop_func_noret op_90ba_13_ff; +extern cpuop_func_noret op_90bb_13_nf; +extern cpuop_func_noret op_90bb_13_ff; +extern cpuop_func_noret op_90bc_13_nf; +extern cpuop_func_noret op_90bc_13_ff; +extern cpuop_func_noret op_90c0_13_nf; +extern cpuop_func_noret op_90c0_13_ff; +extern cpuop_func_noret op_90c8_13_nf; +extern cpuop_func_noret op_90c8_13_ff; +extern cpuop_func_noret op_90d0_13_nf; +extern cpuop_func_noret op_90d0_13_ff; +extern cpuop_func_noret op_90d8_13_nf; +extern cpuop_func_noret op_90d8_13_ff; +extern cpuop_func_noret op_90e0_13_nf; +extern cpuop_func_noret op_90e0_13_ff; +extern cpuop_func_noret op_90e8_13_nf; +extern cpuop_func_noret op_90e8_13_ff; +extern cpuop_func_noret op_90f0_13_nf; +extern cpuop_func_noret op_90f0_13_ff; +extern cpuop_func_noret op_90f8_13_nf; +extern cpuop_func_noret op_90f8_13_ff; +extern cpuop_func_noret op_90f9_13_nf; +extern cpuop_func_noret op_90f9_13_ff; +extern cpuop_func_noret op_90fa_13_nf; +extern cpuop_func_noret op_90fa_13_ff; +extern cpuop_func_noret op_90fb_13_nf; +extern cpuop_func_noret op_90fb_13_ff; +extern cpuop_func_noret op_90fc_13_nf; +extern cpuop_func_noret op_90fc_13_ff; +extern cpuop_func_noret op_9100_13_nf; +extern cpuop_func_noret op_9100_13_ff; +extern cpuop_func_noret op_9108_13_nf; +extern cpuop_func_noret op_9108_13_ff; +extern cpuop_func_noret op_9110_13_nf; +extern cpuop_func_noret op_9110_13_ff; +extern cpuop_func_noret op_9118_13_nf; +extern cpuop_func_noret op_9118_13_ff; +extern cpuop_func_noret op_9120_13_nf; +extern cpuop_func_noret op_9120_13_ff; +extern cpuop_func_noret op_9128_13_nf; +extern cpuop_func_noret op_9128_13_ff; +extern cpuop_func_noret op_9130_13_nf; +extern cpuop_func_noret op_9130_13_ff; +extern cpuop_func_noret op_9138_13_nf; +extern cpuop_func_noret op_9138_13_ff; +extern cpuop_func_noret op_9139_13_nf; +extern cpuop_func_noret op_9139_13_ff; +extern cpuop_func_noret op_9140_13_nf; +extern cpuop_func_noret op_9140_13_ff; +extern cpuop_func_noret op_9148_13_nf; +extern cpuop_func_noret op_9148_13_ff; +extern cpuop_func_noret op_9150_13_nf; +extern cpuop_func_noret op_9150_13_ff; +extern cpuop_func_noret op_9158_13_nf; +extern cpuop_func_noret op_9158_13_ff; +extern cpuop_func_noret op_9160_13_nf; +extern cpuop_func_noret op_9160_13_ff; +extern cpuop_func_noret op_9168_13_nf; +extern cpuop_func_noret op_9168_13_ff; +extern cpuop_func_noret op_9170_13_nf; +extern cpuop_func_noret op_9170_13_ff; +extern cpuop_func_noret op_9178_13_nf; +extern cpuop_func_noret op_9178_13_ff; +extern cpuop_func_noret op_9179_13_nf; +extern cpuop_func_noret op_9179_13_ff; +extern cpuop_func_noret op_9180_13_nf; +extern cpuop_func_noret op_9180_13_ff; +extern cpuop_func_noret op_9188_13_nf; +extern cpuop_func_noret op_9188_13_ff; +extern cpuop_func_noret op_9190_13_nf; +extern cpuop_func_noret op_9190_13_ff; +extern cpuop_func_noret op_9198_13_nf; +extern cpuop_func_noret op_9198_13_ff; +extern cpuop_func_noret op_91a0_13_nf; +extern cpuop_func_noret op_91a0_13_ff; +extern cpuop_func_noret op_91a8_13_nf; +extern cpuop_func_noret op_91a8_13_ff; +extern cpuop_func_noret op_91b0_13_nf; +extern cpuop_func_noret op_91b0_13_ff; +extern cpuop_func_noret op_91b8_13_nf; +extern cpuop_func_noret op_91b8_13_ff; +extern cpuop_func_noret op_91b9_13_nf; +extern cpuop_func_noret op_91b9_13_ff; +extern cpuop_func_noret op_91c0_13_nf; +extern cpuop_func_noret op_91c0_13_ff; +extern cpuop_func_noret op_91c8_13_nf; +extern cpuop_func_noret op_91c8_13_ff; +extern cpuop_func_noret op_91d0_13_nf; +extern cpuop_func_noret op_91d0_13_ff; +extern cpuop_func_noret op_91d8_13_nf; +extern cpuop_func_noret op_91d8_13_ff; +extern cpuop_func_noret op_91e0_13_nf; +extern cpuop_func_noret op_91e0_13_ff; +extern cpuop_func_noret op_91e8_13_nf; +extern cpuop_func_noret op_91e8_13_ff; +extern cpuop_func_noret op_91f0_13_nf; +extern cpuop_func_noret op_91f0_13_ff; +extern cpuop_func_noret op_91f8_13_nf; +extern cpuop_func_noret op_91f8_13_ff; +extern cpuop_func_noret op_91f9_13_nf; +extern cpuop_func_noret op_91f9_13_ff; +extern cpuop_func_noret op_91fa_13_nf; +extern cpuop_func_noret op_91fa_13_ff; +extern cpuop_func_noret op_91fb_13_nf; +extern cpuop_func_noret op_91fb_13_ff; +extern cpuop_func_noret op_91fc_13_nf; +extern cpuop_func_noret op_91fc_13_ff; +extern cpuop_func_noret op_b000_13_nf; +extern cpuop_func_noret op_b000_13_ff; +extern cpuop_func_noret op_b010_13_nf; +extern cpuop_func_noret op_b010_13_ff; +extern cpuop_func_noret op_b018_13_nf; +extern cpuop_func_noret op_b018_13_ff; +extern cpuop_func_noret op_b020_13_nf; +extern cpuop_func_noret op_b020_13_ff; +extern cpuop_func_noret op_b028_13_nf; +extern cpuop_func_noret op_b028_13_ff; +extern cpuop_func_noret op_b030_13_nf; +extern cpuop_func_noret op_b030_13_ff; +extern cpuop_func_noret op_b038_13_nf; +extern cpuop_func_noret op_b038_13_ff; +extern cpuop_func_noret op_b039_13_nf; +extern cpuop_func_noret op_b039_13_ff; +extern cpuop_func_noret op_b03a_13_nf; +extern cpuop_func_noret op_b03a_13_ff; +extern cpuop_func_noret op_b03b_13_nf; +extern cpuop_func_noret op_b03b_13_ff; +extern cpuop_func_noret op_b03c_13_nf; +extern cpuop_func_noret op_b03c_13_ff; +extern cpuop_func_noret op_b040_13_nf; +extern cpuop_func_noret op_b040_13_ff; +extern cpuop_func_noret op_b048_13_nf; +extern cpuop_func_noret op_b048_13_ff; +extern cpuop_func_noret op_b050_13_nf; +extern cpuop_func_noret op_b050_13_ff; +extern cpuop_func_noret op_b058_13_nf; +extern cpuop_func_noret op_b058_13_ff; +extern cpuop_func_noret op_b060_13_nf; +extern cpuop_func_noret op_b060_13_ff; +extern cpuop_func_noret op_b068_13_nf; +extern cpuop_func_noret op_b068_13_ff; +extern cpuop_func_noret op_b070_13_nf; +extern cpuop_func_noret op_b070_13_ff; +extern cpuop_func_noret op_b078_13_nf; +extern cpuop_func_noret op_b078_13_ff; +extern cpuop_func_noret op_b079_13_nf; +extern cpuop_func_noret op_b079_13_ff; +extern cpuop_func_noret op_b07a_13_nf; +extern cpuop_func_noret op_b07a_13_ff; +extern cpuop_func_noret op_b07b_13_nf; +extern cpuop_func_noret op_b07b_13_ff; +extern cpuop_func_noret op_b07c_13_nf; +extern cpuop_func_noret op_b07c_13_ff; +extern cpuop_func_noret op_b080_13_nf; +extern cpuop_func_noret op_b080_13_ff; +extern cpuop_func_noret op_b088_13_nf; +extern cpuop_func_noret op_b088_13_ff; +extern cpuop_func_noret op_b090_13_nf; +extern cpuop_func_noret op_b090_13_ff; +extern cpuop_func_noret op_b098_13_nf; +extern cpuop_func_noret op_b098_13_ff; +extern cpuop_func_noret op_b0a0_13_nf; +extern cpuop_func_noret op_b0a0_13_ff; +extern cpuop_func_noret op_b0a8_13_nf; +extern cpuop_func_noret op_b0a8_13_ff; +extern cpuop_func_noret op_b0b0_13_nf; +extern cpuop_func_noret op_b0b0_13_ff; +extern cpuop_func_noret op_b0b8_13_nf; +extern cpuop_func_noret op_b0b8_13_ff; +extern cpuop_func_noret op_b0b9_13_nf; +extern cpuop_func_noret op_b0b9_13_ff; +extern cpuop_func_noret op_b0ba_13_nf; +extern cpuop_func_noret op_b0ba_13_ff; +extern cpuop_func_noret op_b0bb_13_nf; +extern cpuop_func_noret op_b0bb_13_ff; +extern cpuop_func_noret op_b0bc_13_nf; +extern cpuop_func_noret op_b0bc_13_ff; +extern cpuop_func_noret op_b0c0_13_nf; +extern cpuop_func_noret op_b0c0_13_ff; +extern cpuop_func_noret op_b0c8_13_nf; +extern cpuop_func_noret op_b0c8_13_ff; +extern cpuop_func_noret op_b0d0_13_nf; +extern cpuop_func_noret op_b0d0_13_ff; +extern cpuop_func_noret op_b0d8_13_nf; +extern cpuop_func_noret op_b0d8_13_ff; +extern cpuop_func_noret op_b0e0_13_nf; +extern cpuop_func_noret op_b0e0_13_ff; +extern cpuop_func_noret op_b0e8_13_nf; +extern cpuop_func_noret op_b0e8_13_ff; +extern cpuop_func_noret op_b0f0_13_nf; +extern cpuop_func_noret op_b0f0_13_ff; +extern cpuop_func_noret op_b0f8_13_nf; +extern cpuop_func_noret op_b0f8_13_ff; +extern cpuop_func_noret op_b0f9_13_nf; +extern cpuop_func_noret op_b0f9_13_ff; +extern cpuop_func_noret op_b0fa_13_nf; +extern cpuop_func_noret op_b0fa_13_ff; +extern cpuop_func_noret op_b0fb_13_nf; +extern cpuop_func_noret op_b0fb_13_ff; +extern cpuop_func_noret op_b0fc_13_nf; +extern cpuop_func_noret op_b0fc_13_ff; +extern cpuop_func_noret op_b100_13_nf; +extern cpuop_func_noret op_b100_13_ff; +extern cpuop_func_noret op_b108_13_nf; +extern cpuop_func_noret op_b108_13_ff; +extern cpuop_func_noret op_b110_13_nf; +extern cpuop_func_noret op_b110_13_ff; +extern cpuop_func_noret op_b118_13_nf; +extern cpuop_func_noret op_b118_13_ff; +extern cpuop_func_noret op_b120_13_nf; +extern cpuop_func_noret op_b120_13_ff; +extern cpuop_func_noret op_b128_13_nf; +extern cpuop_func_noret op_b128_13_ff; +extern cpuop_func_noret op_b130_13_nf; +extern cpuop_func_noret op_b130_13_ff; +extern cpuop_func_noret op_b138_13_nf; +extern cpuop_func_noret op_b138_13_ff; +extern cpuop_func_noret op_b139_13_nf; +extern cpuop_func_noret op_b139_13_ff; +extern cpuop_func_noret op_b140_13_nf; +extern cpuop_func_noret op_b140_13_ff; +extern cpuop_func_noret op_b148_13_nf; +extern cpuop_func_noret op_b148_13_ff; +extern cpuop_func_noret op_b150_13_nf; +extern cpuop_func_noret op_b150_13_ff; +extern cpuop_func_noret op_b158_13_nf; +extern cpuop_func_noret op_b158_13_ff; +extern cpuop_func_noret op_b160_13_nf; +extern cpuop_func_noret op_b160_13_ff; +extern cpuop_func_noret op_b168_13_nf; +extern cpuop_func_noret op_b168_13_ff; +extern cpuop_func_noret op_b170_13_nf; +extern cpuop_func_noret op_b170_13_ff; +extern cpuop_func_noret op_b178_13_nf; +extern cpuop_func_noret op_b178_13_ff; +extern cpuop_func_noret op_b179_13_nf; +extern cpuop_func_noret op_b179_13_ff; +extern cpuop_func_noret op_b180_13_nf; +extern cpuop_func_noret op_b180_13_ff; +extern cpuop_func_noret op_b188_13_nf; +extern cpuop_func_noret op_b188_13_ff; +extern cpuop_func_noret op_b190_13_nf; +extern cpuop_func_noret op_b190_13_ff; +extern cpuop_func_noret op_b198_13_nf; +extern cpuop_func_noret op_b198_13_ff; +extern cpuop_func_noret op_b1a0_13_nf; +extern cpuop_func_noret op_b1a0_13_ff; +extern cpuop_func_noret op_b1a8_13_nf; +extern cpuop_func_noret op_b1a8_13_ff; +extern cpuop_func_noret op_b1b0_13_nf; +extern cpuop_func_noret op_b1b0_13_ff; +extern cpuop_func_noret op_b1b8_13_nf; +extern cpuop_func_noret op_b1b8_13_ff; +extern cpuop_func_noret op_b1b9_13_nf; +extern cpuop_func_noret op_b1b9_13_ff; +extern cpuop_func_noret op_b1c0_13_nf; +extern cpuop_func_noret op_b1c0_13_ff; +extern cpuop_func_noret op_b1c8_13_nf; +extern cpuop_func_noret op_b1c8_13_ff; +extern cpuop_func_noret op_b1d0_13_nf; +extern cpuop_func_noret op_b1d0_13_ff; +extern cpuop_func_noret op_b1d8_13_nf; +extern cpuop_func_noret op_b1d8_13_ff; +extern cpuop_func_noret op_b1e0_13_nf; +extern cpuop_func_noret op_b1e0_13_ff; +extern cpuop_func_noret op_b1e8_13_nf; +extern cpuop_func_noret op_b1e8_13_ff; +extern cpuop_func_noret op_b1f0_13_nf; +extern cpuop_func_noret op_b1f0_13_ff; +extern cpuop_func_noret op_b1f8_13_nf; +extern cpuop_func_noret op_b1f8_13_ff; +extern cpuop_func_noret op_b1f9_13_nf; +extern cpuop_func_noret op_b1f9_13_ff; +extern cpuop_func_noret op_b1fa_13_nf; +extern cpuop_func_noret op_b1fa_13_ff; +extern cpuop_func_noret op_b1fb_13_nf; +extern cpuop_func_noret op_b1fb_13_ff; +extern cpuop_func_noret op_b1fc_13_nf; +extern cpuop_func_noret op_b1fc_13_ff; +extern cpuop_func_noret op_c000_13_nf; +extern cpuop_func_noret op_c000_13_ff; +extern cpuop_func_noret op_c010_13_nf; +extern cpuop_func_noret op_c010_13_ff; +extern cpuop_func_noret op_c018_13_nf; +extern cpuop_func_noret op_c018_13_ff; +extern cpuop_func_noret op_c020_13_nf; +extern cpuop_func_noret op_c020_13_ff; +extern cpuop_func_noret op_c028_13_nf; +extern cpuop_func_noret op_c028_13_ff; +extern cpuop_func_noret op_c030_13_nf; +extern cpuop_func_noret op_c030_13_ff; +extern cpuop_func_noret op_c038_13_nf; +extern cpuop_func_noret op_c038_13_ff; +extern cpuop_func_noret op_c039_13_nf; +extern cpuop_func_noret op_c039_13_ff; +extern cpuop_func_noret op_c03a_13_nf; +extern cpuop_func_noret op_c03a_13_ff; +extern cpuop_func_noret op_c03b_13_nf; +extern cpuop_func_noret op_c03b_13_ff; +extern cpuop_func_noret op_c03c_13_nf; +extern cpuop_func_noret op_c03c_13_ff; +extern cpuop_func_noret op_c040_13_nf; +extern cpuop_func_noret op_c040_13_ff; +extern cpuop_func_noret op_c050_13_nf; +extern cpuop_func_noret op_c050_13_ff; +extern cpuop_func_noret op_c058_13_nf; +extern cpuop_func_noret op_c058_13_ff; +extern cpuop_func_noret op_c060_13_nf; +extern cpuop_func_noret op_c060_13_ff; +extern cpuop_func_noret op_c068_13_nf; +extern cpuop_func_noret op_c068_13_ff; +extern cpuop_func_noret op_c070_13_nf; +extern cpuop_func_noret op_c070_13_ff; +extern cpuop_func_noret op_c078_13_nf; +extern cpuop_func_noret op_c078_13_ff; +extern cpuop_func_noret op_c079_13_nf; +extern cpuop_func_noret op_c079_13_ff; +extern cpuop_func_noret op_c07a_13_nf; +extern cpuop_func_noret op_c07a_13_ff; +extern cpuop_func_noret op_c07b_13_nf; +extern cpuop_func_noret op_c07b_13_ff; +extern cpuop_func_noret op_c07c_13_nf; +extern cpuop_func_noret op_c07c_13_ff; +extern cpuop_func_noret op_c080_13_nf; +extern cpuop_func_noret op_c080_13_ff; +extern cpuop_func_noret op_c090_13_nf; +extern cpuop_func_noret op_c090_13_ff; +extern cpuop_func_noret op_c098_13_nf; +extern cpuop_func_noret op_c098_13_ff; +extern cpuop_func_noret op_c0a0_13_nf; +extern cpuop_func_noret op_c0a0_13_ff; +extern cpuop_func_noret op_c0a8_13_nf; +extern cpuop_func_noret op_c0a8_13_ff; +extern cpuop_func_noret op_c0b0_13_nf; +extern cpuop_func_noret op_c0b0_13_ff; +extern cpuop_func_noret op_c0b8_13_nf; +extern cpuop_func_noret op_c0b8_13_ff; +extern cpuop_func_noret op_c0b9_13_nf; +extern cpuop_func_noret op_c0b9_13_ff; +extern cpuop_func_noret op_c0ba_13_nf; +extern cpuop_func_noret op_c0ba_13_ff; +extern cpuop_func_noret op_c0bb_13_nf; +extern cpuop_func_noret op_c0bb_13_ff; +extern cpuop_func_noret op_c0bc_13_nf; +extern cpuop_func_noret op_c0bc_13_ff; +extern cpuop_func_noret op_c0c0_13_nf; +extern cpuop_func_noret op_c0c0_13_ff; +extern cpuop_func_noret op_c0d0_13_nf; +extern cpuop_func_noret op_c0d0_13_ff; +extern cpuop_func_noret op_c0d8_13_nf; +extern cpuop_func_noret op_c0d8_13_ff; +extern cpuop_func_noret op_c0e0_13_nf; +extern cpuop_func_noret op_c0e0_13_ff; +extern cpuop_func_noret op_c0e8_13_nf; +extern cpuop_func_noret op_c0e8_13_ff; +extern cpuop_func_noret op_c0f0_13_nf; +extern cpuop_func_noret op_c0f0_13_ff; +extern cpuop_func_noret op_c0f8_13_nf; +extern cpuop_func_noret op_c0f8_13_ff; +extern cpuop_func_noret op_c0f9_13_nf; +extern cpuop_func_noret op_c0f9_13_ff; +extern cpuop_func_noret op_c0fa_13_nf; +extern cpuop_func_noret op_c0fa_13_ff; +extern cpuop_func_noret op_c0fb_13_nf; +extern cpuop_func_noret op_c0fb_13_ff; +extern cpuop_func_noret op_c0fc_13_nf; +extern cpuop_func_noret op_c0fc_13_ff; +extern cpuop_func_noret op_c100_13_nf; +extern cpuop_func_noret op_c100_13_ff; +extern cpuop_func_noret op_c108_13_nf; +extern cpuop_func_noret op_c108_13_ff; +extern cpuop_func_noret op_c110_13_nf; +extern cpuop_func_noret op_c110_13_ff; +extern cpuop_func_noret op_c118_13_nf; +extern cpuop_func_noret op_c118_13_ff; +extern cpuop_func_noret op_c120_13_nf; +extern cpuop_func_noret op_c120_13_ff; +extern cpuop_func_noret op_c128_13_nf; +extern cpuop_func_noret op_c128_13_ff; +extern cpuop_func_noret op_c130_13_nf; +extern cpuop_func_noret op_c130_13_ff; +extern cpuop_func_noret op_c138_13_nf; +extern cpuop_func_noret op_c138_13_ff; +extern cpuop_func_noret op_c139_13_nf; +extern cpuop_func_noret op_c139_13_ff; +extern cpuop_func_noret op_c140_13_nf; +extern cpuop_func_noret op_c140_13_ff; +extern cpuop_func_noret op_c148_13_nf; +extern cpuop_func_noret op_c148_13_ff; +extern cpuop_func_noret op_c150_13_nf; +extern cpuop_func_noret op_c150_13_ff; +extern cpuop_func_noret op_c158_13_nf; +extern cpuop_func_noret op_c158_13_ff; +extern cpuop_func_noret op_c160_13_nf; +extern cpuop_func_noret op_c160_13_ff; +extern cpuop_func_noret op_c168_13_nf; +extern cpuop_func_noret op_c168_13_ff; +extern cpuop_func_noret op_c170_13_nf; +extern cpuop_func_noret op_c170_13_ff; +extern cpuop_func_noret op_c178_13_nf; +extern cpuop_func_noret op_c178_13_ff; +extern cpuop_func_noret op_c179_13_nf; +extern cpuop_func_noret op_c179_13_ff; +extern cpuop_func_noret op_c188_13_nf; +extern cpuop_func_noret op_c188_13_ff; +extern cpuop_func_noret op_c190_13_nf; +extern cpuop_func_noret op_c190_13_ff; +extern cpuop_func_noret op_c198_13_nf; +extern cpuop_func_noret op_c198_13_ff; +extern cpuop_func_noret op_c1a0_13_nf; +extern cpuop_func_noret op_c1a0_13_ff; +extern cpuop_func_noret op_c1a8_13_nf; +extern cpuop_func_noret op_c1a8_13_ff; +extern cpuop_func_noret op_c1b0_13_nf; +extern cpuop_func_noret op_c1b0_13_ff; +extern cpuop_func_noret op_c1b8_13_nf; +extern cpuop_func_noret op_c1b8_13_ff; +extern cpuop_func_noret op_c1b9_13_nf; +extern cpuop_func_noret op_c1b9_13_ff; +extern cpuop_func_noret op_c1c0_13_nf; +extern cpuop_func_noret op_c1c0_13_ff; +extern cpuop_func_noret op_c1d0_13_nf; +extern cpuop_func_noret op_c1d0_13_ff; +extern cpuop_func_noret op_c1d8_13_nf; +extern cpuop_func_noret op_c1d8_13_ff; +extern cpuop_func_noret op_c1e0_13_nf; +extern cpuop_func_noret op_c1e0_13_ff; +extern cpuop_func_noret op_c1e8_13_nf; +extern cpuop_func_noret op_c1e8_13_ff; +extern cpuop_func_noret op_c1f0_13_nf; +extern cpuop_func_noret op_c1f0_13_ff; +extern cpuop_func_noret op_c1f8_13_nf; +extern cpuop_func_noret op_c1f8_13_ff; +extern cpuop_func_noret op_c1f9_13_nf; +extern cpuop_func_noret op_c1f9_13_ff; +extern cpuop_func_noret op_c1fa_13_nf; +extern cpuop_func_noret op_c1fa_13_ff; +extern cpuop_func_noret op_c1fb_13_nf; +extern cpuop_func_noret op_c1fb_13_ff; +extern cpuop_func_noret op_c1fc_13_nf; +extern cpuop_func_noret op_c1fc_13_ff; +extern cpuop_func_noret op_d000_13_nf; +extern cpuop_func_noret op_d000_13_ff; +extern cpuop_func_noret op_d010_13_nf; +extern cpuop_func_noret op_d010_13_ff; +extern cpuop_func_noret op_d018_13_nf; +extern cpuop_func_noret op_d018_13_ff; +extern cpuop_func_noret op_d020_13_nf; +extern cpuop_func_noret op_d020_13_ff; +extern cpuop_func_noret op_d028_13_nf; +extern cpuop_func_noret op_d028_13_ff; +extern cpuop_func_noret op_d030_13_nf; +extern cpuop_func_noret op_d030_13_ff; +extern cpuop_func_noret op_d038_13_nf; +extern cpuop_func_noret op_d038_13_ff; +extern cpuop_func_noret op_d039_13_nf; +extern cpuop_func_noret op_d039_13_ff; +extern cpuop_func_noret op_d03a_13_nf; +extern cpuop_func_noret op_d03a_13_ff; +extern cpuop_func_noret op_d03b_13_nf; +extern cpuop_func_noret op_d03b_13_ff; +extern cpuop_func_noret op_d03c_13_nf; +extern cpuop_func_noret op_d03c_13_ff; +extern cpuop_func_noret op_d040_13_nf; +extern cpuop_func_noret op_d040_13_ff; +extern cpuop_func_noret op_d048_13_nf; +extern cpuop_func_noret op_d048_13_ff; +extern cpuop_func_noret op_d050_13_nf; +extern cpuop_func_noret op_d050_13_ff; +extern cpuop_func_noret op_d058_13_nf; +extern cpuop_func_noret op_d058_13_ff; +extern cpuop_func_noret op_d060_13_nf; +extern cpuop_func_noret op_d060_13_ff; +extern cpuop_func_noret op_d068_13_nf; +extern cpuop_func_noret op_d068_13_ff; +extern cpuop_func_noret op_d070_13_nf; +extern cpuop_func_noret op_d070_13_ff; +extern cpuop_func_noret op_d078_13_nf; +extern cpuop_func_noret op_d078_13_ff; +extern cpuop_func_noret op_d079_13_nf; +extern cpuop_func_noret op_d079_13_ff; +extern cpuop_func_noret op_d07a_13_nf; +extern cpuop_func_noret op_d07a_13_ff; +extern cpuop_func_noret op_d07b_13_nf; +extern cpuop_func_noret op_d07b_13_ff; +extern cpuop_func_noret op_d07c_13_nf; +extern cpuop_func_noret op_d07c_13_ff; +extern cpuop_func_noret op_d080_13_nf; +extern cpuop_func_noret op_d080_13_ff; +extern cpuop_func_noret op_d088_13_nf; +extern cpuop_func_noret op_d088_13_ff; +extern cpuop_func_noret op_d090_13_nf; +extern cpuop_func_noret op_d090_13_ff; +extern cpuop_func_noret op_d098_13_nf; +extern cpuop_func_noret op_d098_13_ff; +extern cpuop_func_noret op_d0a0_13_nf; +extern cpuop_func_noret op_d0a0_13_ff; +extern cpuop_func_noret op_d0a8_13_nf; +extern cpuop_func_noret op_d0a8_13_ff; +extern cpuop_func_noret op_d0b0_13_nf; +extern cpuop_func_noret op_d0b0_13_ff; +extern cpuop_func_noret op_d0b8_13_nf; +extern cpuop_func_noret op_d0b8_13_ff; +extern cpuop_func_noret op_d0b9_13_nf; +extern cpuop_func_noret op_d0b9_13_ff; +extern cpuop_func_noret op_d0ba_13_nf; +extern cpuop_func_noret op_d0ba_13_ff; +extern cpuop_func_noret op_d0bb_13_nf; +extern cpuop_func_noret op_d0bb_13_ff; +extern cpuop_func_noret op_d0bc_13_nf; +extern cpuop_func_noret op_d0bc_13_ff; +extern cpuop_func_noret op_d0c0_13_nf; +extern cpuop_func_noret op_d0c0_13_ff; +extern cpuop_func_noret op_d0c8_13_nf; +extern cpuop_func_noret op_d0c8_13_ff; +extern cpuop_func_noret op_d0d0_13_nf; +extern cpuop_func_noret op_d0d0_13_ff; +extern cpuop_func_noret op_d0d8_13_nf; +extern cpuop_func_noret op_d0d8_13_ff; +extern cpuop_func_noret op_d0e0_13_nf; +extern cpuop_func_noret op_d0e0_13_ff; +extern cpuop_func_noret op_d0e8_13_nf; +extern cpuop_func_noret op_d0e8_13_ff; +extern cpuop_func_noret op_d0f0_13_nf; +extern cpuop_func_noret op_d0f0_13_ff; +extern cpuop_func_noret op_d0f8_13_nf; +extern cpuop_func_noret op_d0f8_13_ff; +extern cpuop_func_noret op_d0f9_13_nf; +extern cpuop_func_noret op_d0f9_13_ff; +extern cpuop_func_noret op_d0fa_13_nf; +extern cpuop_func_noret op_d0fa_13_ff; +extern cpuop_func_noret op_d0fb_13_nf; +extern cpuop_func_noret op_d0fb_13_ff; +extern cpuop_func_noret op_d0fc_13_nf; +extern cpuop_func_noret op_d0fc_13_ff; +extern cpuop_func_noret op_d100_13_nf; +extern cpuop_func_noret op_d100_13_ff; +extern cpuop_func_noret op_d108_13_nf; +extern cpuop_func_noret op_d108_13_ff; +extern cpuop_func_noret op_d110_13_nf; +extern cpuop_func_noret op_d110_13_ff; +extern cpuop_func_noret op_d118_13_nf; +extern cpuop_func_noret op_d118_13_ff; +extern cpuop_func_noret op_d120_13_nf; +extern cpuop_func_noret op_d120_13_ff; +extern cpuop_func_noret op_d128_13_nf; +extern cpuop_func_noret op_d128_13_ff; +extern cpuop_func_noret op_d130_13_nf; +extern cpuop_func_noret op_d130_13_ff; +extern cpuop_func_noret op_d138_13_nf; +extern cpuop_func_noret op_d138_13_ff; +extern cpuop_func_noret op_d139_13_nf; +extern cpuop_func_noret op_d139_13_ff; +extern cpuop_func_noret op_d140_13_nf; +extern cpuop_func_noret op_d140_13_ff; +extern cpuop_func_noret op_d148_13_nf; +extern cpuop_func_noret op_d148_13_ff; +extern cpuop_func_noret op_d150_13_nf; +extern cpuop_func_noret op_d150_13_ff; +extern cpuop_func_noret op_d158_13_nf; +extern cpuop_func_noret op_d158_13_ff; +extern cpuop_func_noret op_d160_13_nf; +extern cpuop_func_noret op_d160_13_ff; +extern cpuop_func_noret op_d168_13_nf; +extern cpuop_func_noret op_d168_13_ff; +extern cpuop_func_noret op_d170_13_nf; +extern cpuop_func_noret op_d170_13_ff; +extern cpuop_func_noret op_d178_13_nf; +extern cpuop_func_noret op_d178_13_ff; +extern cpuop_func_noret op_d179_13_nf; +extern cpuop_func_noret op_d179_13_ff; +extern cpuop_func_noret op_d180_13_nf; +extern cpuop_func_noret op_d180_13_ff; +extern cpuop_func_noret op_d188_13_nf; +extern cpuop_func_noret op_d188_13_ff; +extern cpuop_func_noret op_d190_13_nf; +extern cpuop_func_noret op_d190_13_ff; +extern cpuop_func_noret op_d198_13_nf; +extern cpuop_func_noret op_d198_13_ff; +extern cpuop_func_noret op_d1a0_13_nf; +extern cpuop_func_noret op_d1a0_13_ff; +extern cpuop_func_noret op_d1a8_13_nf; +extern cpuop_func_noret op_d1a8_13_ff; +extern cpuop_func_noret op_d1b0_13_nf; +extern cpuop_func_noret op_d1b0_13_ff; +extern cpuop_func_noret op_d1b8_13_nf; +extern cpuop_func_noret op_d1b8_13_ff; +extern cpuop_func_noret op_d1b9_13_nf; +extern cpuop_func_noret op_d1b9_13_ff; +extern cpuop_func_noret op_d1c0_13_nf; +extern cpuop_func_noret op_d1c0_13_ff; +extern cpuop_func_noret op_d1c8_13_nf; +extern cpuop_func_noret op_d1c8_13_ff; +extern cpuop_func_noret op_d1d0_13_nf; +extern cpuop_func_noret op_d1d0_13_ff; +extern cpuop_func_noret op_d1d8_13_nf; +extern cpuop_func_noret op_d1d8_13_ff; +extern cpuop_func_noret op_d1e0_13_nf; +extern cpuop_func_noret op_d1e0_13_ff; +extern cpuop_func_noret op_d1e8_13_nf; +extern cpuop_func_noret op_d1e8_13_ff; +extern cpuop_func_noret op_d1f0_13_nf; +extern cpuop_func_noret op_d1f0_13_ff; +extern cpuop_func_noret op_d1f8_13_nf; +extern cpuop_func_noret op_d1f8_13_ff; +extern cpuop_func_noret op_d1f9_13_nf; +extern cpuop_func_noret op_d1f9_13_ff; +extern cpuop_func_noret op_d1fa_13_nf; +extern cpuop_func_noret op_d1fa_13_ff; +extern cpuop_func_noret op_d1fb_13_nf; +extern cpuop_func_noret op_d1fb_13_ff; +extern cpuop_func_noret op_d1fc_13_nf; +extern cpuop_func_noret op_d1fc_13_ff; +extern cpuop_func_noret op_e000_13_nf; +extern cpuop_func_noret op_e000_13_ff; +extern cpuop_func_noret op_e008_13_nf; +extern cpuop_func_noret op_e008_13_ff; +extern cpuop_func_noret op_e010_13_nf; +extern cpuop_func_noret op_e010_13_ff; +extern cpuop_func_noret op_e018_13_nf; +extern cpuop_func_noret op_e018_13_ff; +extern cpuop_func_noret op_e020_13_nf; +extern cpuop_func_noret op_e020_13_ff; +extern cpuop_func_noret op_e028_13_nf; +extern cpuop_func_noret op_e028_13_ff; +extern cpuop_func_noret op_e030_13_nf; +extern cpuop_func_noret op_e030_13_ff; +extern cpuop_func_noret op_e038_13_nf; +extern cpuop_func_noret op_e038_13_ff; +extern cpuop_func_noret op_e040_13_nf; +extern cpuop_func_noret op_e040_13_ff; +extern cpuop_func_noret op_e048_13_nf; +extern cpuop_func_noret op_e048_13_ff; +extern cpuop_func_noret op_e050_13_nf; +extern cpuop_func_noret op_e050_13_ff; +extern cpuop_func_noret op_e058_13_nf; +extern cpuop_func_noret op_e058_13_ff; +extern cpuop_func_noret op_e060_13_nf; +extern cpuop_func_noret op_e060_13_ff; +extern cpuop_func_noret op_e068_13_nf; +extern cpuop_func_noret op_e068_13_ff; +extern cpuop_func_noret op_e070_13_nf; +extern cpuop_func_noret op_e070_13_ff; +extern cpuop_func_noret op_e078_13_nf; +extern cpuop_func_noret op_e078_13_ff; +extern cpuop_func_noret op_e080_13_nf; +extern cpuop_func_noret op_e080_13_ff; +extern cpuop_func_noret op_e088_13_nf; +extern cpuop_func_noret op_e088_13_ff; +extern cpuop_func_noret op_e090_13_nf; +extern cpuop_func_noret op_e090_13_ff; +extern cpuop_func_noret op_e098_13_nf; +extern cpuop_func_noret op_e098_13_ff; +extern cpuop_func_noret op_e0a0_13_nf; +extern cpuop_func_noret op_e0a0_13_ff; +extern cpuop_func_noret op_e0a8_13_nf; +extern cpuop_func_noret op_e0a8_13_ff; +extern cpuop_func_noret op_e0b0_13_nf; +extern cpuop_func_noret op_e0b0_13_ff; +extern cpuop_func_noret op_e0b8_13_nf; +extern cpuop_func_noret op_e0b8_13_ff; +extern cpuop_func_noret op_e0d0_13_nf; +extern cpuop_func_noret op_e0d0_13_ff; +extern cpuop_func_noret op_e0d8_13_nf; +extern cpuop_func_noret op_e0d8_13_ff; +extern cpuop_func_noret op_e0e0_13_nf; +extern cpuop_func_noret op_e0e0_13_ff; +extern cpuop_func_noret op_e0e8_13_nf; +extern cpuop_func_noret op_e0e8_13_ff; +extern cpuop_func_noret op_e0f0_13_nf; +extern cpuop_func_noret op_e0f0_13_ff; +extern cpuop_func_noret op_e0f8_13_nf; +extern cpuop_func_noret op_e0f8_13_ff; +extern cpuop_func_noret op_e0f9_13_nf; +extern cpuop_func_noret op_e0f9_13_ff; +extern cpuop_func_noret op_e100_13_nf; +extern cpuop_func_noret op_e100_13_ff; +extern cpuop_func_noret op_e108_13_nf; +extern cpuop_func_noret op_e108_13_ff; +extern cpuop_func_noret op_e110_13_nf; +extern cpuop_func_noret op_e110_13_ff; +extern cpuop_func_noret op_e118_13_nf; +extern cpuop_func_noret op_e118_13_ff; +extern cpuop_func_noret op_e120_13_nf; +extern cpuop_func_noret op_e120_13_ff; +extern cpuop_func_noret op_e128_13_nf; +extern cpuop_func_noret op_e128_13_ff; +extern cpuop_func_noret op_e130_13_nf; +extern cpuop_func_noret op_e130_13_ff; +extern cpuop_func_noret op_e138_13_nf; +extern cpuop_func_noret op_e138_13_ff; +extern cpuop_func_noret op_e140_13_nf; +extern cpuop_func_noret op_e140_13_ff; +extern cpuop_func_noret op_e148_13_nf; +extern cpuop_func_noret op_e148_13_ff; +extern cpuop_func_noret op_e150_13_nf; +extern cpuop_func_noret op_e150_13_ff; +extern cpuop_func_noret op_e158_13_nf; +extern cpuop_func_noret op_e158_13_ff; +extern cpuop_func_noret op_e160_13_nf; +extern cpuop_func_noret op_e160_13_ff; +extern cpuop_func_noret op_e168_13_nf; +extern cpuop_func_noret op_e168_13_ff; +extern cpuop_func_noret op_e170_13_nf; +extern cpuop_func_noret op_e170_13_ff; +extern cpuop_func_noret op_e178_13_nf; +extern cpuop_func_noret op_e178_13_ff; +extern cpuop_func_noret op_e180_13_nf; +extern cpuop_func_noret op_e180_13_ff; +extern cpuop_func_noret op_e188_13_nf; +extern cpuop_func_noret op_e188_13_ff; +extern cpuop_func_noret op_e190_13_nf; +extern cpuop_func_noret op_e190_13_ff; +extern cpuop_func_noret op_e198_13_nf; +extern cpuop_func_noret op_e198_13_ff; +extern cpuop_func_noret op_e1a0_13_nf; +extern cpuop_func_noret op_e1a0_13_ff; +extern cpuop_func_noret op_e1a8_13_nf; +extern cpuop_func_noret op_e1a8_13_ff; +extern cpuop_func_noret op_e1b0_13_nf; +extern cpuop_func_noret op_e1b0_13_ff; +extern cpuop_func_noret op_e1b8_13_nf; +extern cpuop_func_noret op_e1b8_13_ff; +extern cpuop_func_noret op_e1d0_13_nf; +extern cpuop_func_noret op_e1d0_13_ff; +extern cpuop_func_noret op_e1d8_13_nf; +extern cpuop_func_noret op_e1d8_13_ff; +extern cpuop_func_noret op_e1e0_13_nf; +extern cpuop_func_noret op_e1e0_13_ff; +extern cpuop_func_noret op_e1e8_13_nf; +extern cpuop_func_noret op_e1e8_13_ff; +extern cpuop_func_noret op_e1f0_13_nf; +extern cpuop_func_noret op_e1f0_13_ff; +extern cpuop_func_noret op_e1f8_13_nf; +extern cpuop_func_noret op_e1f8_13_ff; +extern cpuop_func_noret op_e1f9_13_nf; +extern cpuop_func_noret op_e1f9_13_ff; +extern cpuop_func_noret op_e2d0_13_nf; +extern cpuop_func_noret op_e2d0_13_ff; +extern cpuop_func_noret op_e2d8_13_nf; +extern cpuop_func_noret op_e2d8_13_ff; +extern cpuop_func_noret op_e2e0_13_nf; +extern cpuop_func_noret op_e2e0_13_ff; +extern cpuop_func_noret op_e2e8_13_nf; +extern cpuop_func_noret op_e2e8_13_ff; +extern cpuop_func_noret op_e2f0_13_nf; +extern cpuop_func_noret op_e2f0_13_ff; +extern cpuop_func_noret op_e2f8_13_nf; +extern cpuop_func_noret op_e2f8_13_ff; +extern cpuop_func_noret op_e2f9_13_nf; +extern cpuop_func_noret op_e2f9_13_ff; +extern cpuop_func_noret op_e3d0_13_nf; +extern cpuop_func_noret op_e3d0_13_ff; +extern cpuop_func_noret op_e3d8_13_nf; +extern cpuop_func_noret op_e3d8_13_ff; +extern cpuop_func_noret op_e3e0_13_nf; +extern cpuop_func_noret op_e3e0_13_ff; +extern cpuop_func_noret op_e3e8_13_nf; +extern cpuop_func_noret op_e3e8_13_ff; +extern cpuop_func_noret op_e3f0_13_nf; +extern cpuop_func_noret op_e3f0_13_ff; +extern cpuop_func_noret op_e3f8_13_nf; +extern cpuop_func_noret op_e3f8_13_ff; +extern cpuop_func_noret op_e3f9_13_nf; +extern cpuop_func_noret op_e3f9_13_ff; +extern cpuop_func_noret op_e4d0_13_nf; +extern cpuop_func_noret op_e4d0_13_ff; +extern cpuop_func_noret op_e4d8_13_nf; +extern cpuop_func_noret op_e4d8_13_ff; +extern cpuop_func_noret op_e4e0_13_nf; +extern cpuop_func_noret op_e4e0_13_ff; +extern cpuop_func_noret op_e4e8_13_nf; +extern cpuop_func_noret op_e4e8_13_ff; +extern cpuop_func_noret op_e4f0_13_nf; +extern cpuop_func_noret op_e4f0_13_ff; +extern cpuop_func_noret op_e4f8_13_nf; +extern cpuop_func_noret op_e4f8_13_ff; +extern cpuop_func_noret op_e4f9_13_nf; +extern cpuop_func_noret op_e4f9_13_ff; +extern cpuop_func_noret op_e5d0_13_nf; +extern cpuop_func_noret op_e5d0_13_ff; +extern cpuop_func_noret op_e5d8_13_nf; +extern cpuop_func_noret op_e5d8_13_ff; +extern cpuop_func_noret op_e5e0_13_nf; +extern cpuop_func_noret op_e5e0_13_ff; +extern cpuop_func_noret op_e5e8_13_nf; +extern cpuop_func_noret op_e5e8_13_ff; +extern cpuop_func_noret op_e5f0_13_nf; +extern cpuop_func_noret op_e5f0_13_ff; +extern cpuop_func_noret op_e5f8_13_nf; +extern cpuop_func_noret op_e5f8_13_ff; +extern cpuop_func_noret op_e5f9_13_nf; +extern cpuop_func_noret op_e5f9_13_ff; +extern cpuop_func_noret op_e6d0_13_nf; +extern cpuop_func_noret op_e6d0_13_ff; +extern cpuop_func_noret op_e6d8_13_nf; +extern cpuop_func_noret op_e6d8_13_ff; +extern cpuop_func_noret op_e6e0_13_nf; +extern cpuop_func_noret op_e6e0_13_ff; +extern cpuop_func_noret op_e6e8_13_nf; +extern cpuop_func_noret op_e6e8_13_ff; +extern cpuop_func_noret op_e6f0_13_nf; +extern cpuop_func_noret op_e6f0_13_ff; +extern cpuop_func_noret op_e6f8_13_nf; +extern cpuop_func_noret op_e6f8_13_ff; +extern cpuop_func_noret op_e6f9_13_nf; +extern cpuop_func_noret op_e6f9_13_ff; +extern cpuop_func_noret op_e7d0_13_nf; +extern cpuop_func_noret op_e7d0_13_ff; +extern cpuop_func_noret op_e7d8_13_nf; +extern cpuop_func_noret op_e7d8_13_ff; +extern cpuop_func_noret op_e7e0_13_nf; +extern cpuop_func_noret op_e7e0_13_ff; +extern cpuop_func_noret op_e7e8_13_nf; +extern cpuop_func_noret op_e7e8_13_ff; +extern cpuop_func_noret op_e7f0_13_nf; +extern cpuop_func_noret op_e7f0_13_ff; +extern cpuop_func_noret op_e7f8_13_nf; +extern cpuop_func_noret op_e7f8_13_ff; +extern cpuop_func_noret op_e7f9_13_nf; +extern cpuop_func_noret op_e7f9_13_ff; +extern cpuop_func_noret op_0000_14_nf; +extern cpuop_func_noret op_0000_14_ff; +extern cpuop_func_noret op_0010_14_nf; +extern cpuop_func_noret op_0010_14_ff; +extern cpuop_func_noret op_0018_14_nf; +extern cpuop_func_noret op_0018_14_ff; +extern cpuop_func_noret op_0020_14_nf; +extern cpuop_func_noret op_0020_14_ff; +extern cpuop_func_noret op_0028_14_nf; +extern cpuop_func_noret op_0028_14_ff; +extern cpuop_func_noret op_0030_14_nf; +extern cpuop_func_noret op_0030_14_ff; +extern cpuop_func_noret op_0038_14_nf; +extern cpuop_func_noret op_0038_14_ff; +extern cpuop_func_noret op_0039_14_nf; +extern cpuop_func_noret op_0039_14_ff; +extern cpuop_func_noret op_003c_14_nf; +extern cpuop_func_noret op_003c_14_ff; +extern cpuop_func_noret op_0040_14_nf; +extern cpuop_func_noret op_0040_14_ff; +extern cpuop_func_noret op_0050_14_nf; +extern cpuop_func_noret op_0050_14_ff; +extern cpuop_func_noret op_0058_14_nf; +extern cpuop_func_noret op_0058_14_ff; +extern cpuop_func_noret op_0060_14_nf; +extern cpuop_func_noret op_0060_14_ff; +extern cpuop_func_noret op_0068_14_nf; +extern cpuop_func_noret op_0068_14_ff; +extern cpuop_func_noret op_0070_14_nf; +extern cpuop_func_noret op_0070_14_ff; +extern cpuop_func_noret op_0078_14_nf; +extern cpuop_func_noret op_0078_14_ff; +extern cpuop_func_noret op_0079_14_nf; +extern cpuop_func_noret op_0079_14_ff; +extern cpuop_func_noret op_007c_14_nf; +extern cpuop_func_noret op_007c_14_ff; +extern cpuop_func_noret op_0080_14_nf; +extern cpuop_func_noret op_0080_14_ff; +extern cpuop_func_noret op_0090_14_nf; +extern cpuop_func_noret op_0090_14_ff; +extern cpuop_func_noret op_0098_14_nf; +extern cpuop_func_noret op_0098_14_ff; +extern cpuop_func_noret op_00a0_14_nf; +extern cpuop_func_noret op_00a0_14_ff; +extern cpuop_func_noret op_00a8_14_nf; +extern cpuop_func_noret op_00a8_14_ff; +extern cpuop_func_noret op_00b0_14_nf; +extern cpuop_func_noret op_00b0_14_ff; +extern cpuop_func_noret op_00b8_14_nf; +extern cpuop_func_noret op_00b8_14_ff; +extern cpuop_func_noret op_00b9_14_nf; +extern cpuop_func_noret op_00b9_14_ff; +extern cpuop_func_noret op_0100_14_nf; +extern cpuop_func_noret op_0100_14_ff; +extern cpuop_func_noret op_0108_14_nf; +extern cpuop_func_noret op_0108_14_ff; +extern cpuop_func_noret op_0110_14_nf; +extern cpuop_func_noret op_0110_14_ff; +extern cpuop_func_noret op_0118_14_nf; +extern cpuop_func_noret op_0118_14_ff; +extern cpuop_func_noret op_0120_14_nf; +extern cpuop_func_noret op_0120_14_ff; +extern cpuop_func_noret op_0128_14_nf; +extern cpuop_func_noret op_0128_14_ff; +extern cpuop_func_noret op_0130_14_nf; +extern cpuop_func_noret op_0130_14_ff; +extern cpuop_func_noret op_0138_14_nf; +extern cpuop_func_noret op_0138_14_ff; +extern cpuop_func_noret op_0139_14_nf; +extern cpuop_func_noret op_0139_14_ff; +extern cpuop_func_noret op_013a_14_nf; +extern cpuop_func_noret op_013a_14_ff; +extern cpuop_func_noret op_013b_14_nf; +extern cpuop_func_noret op_013b_14_ff; +extern cpuop_func_noret op_013c_14_nf; +extern cpuop_func_noret op_013c_14_ff; +extern cpuop_func_noret op_0140_14_nf; +extern cpuop_func_noret op_0140_14_ff; +extern cpuop_func_noret op_0148_14_nf; +extern cpuop_func_noret op_0148_14_ff; +extern cpuop_func_noret op_0150_14_nf; +extern cpuop_func_noret op_0150_14_ff; +extern cpuop_func_noret op_0158_14_nf; +extern cpuop_func_noret op_0158_14_ff; +extern cpuop_func_noret op_0160_14_nf; +extern cpuop_func_noret op_0160_14_ff; +extern cpuop_func_noret op_0168_14_nf; +extern cpuop_func_noret op_0168_14_ff; +extern cpuop_func_noret op_0170_14_nf; +extern cpuop_func_noret op_0170_14_ff; +extern cpuop_func_noret op_0178_14_nf; +extern cpuop_func_noret op_0178_14_ff; +extern cpuop_func_noret op_0179_14_nf; +extern cpuop_func_noret op_0179_14_ff; +extern cpuop_func_noret op_0180_14_nf; +extern cpuop_func_noret op_0180_14_ff; +extern cpuop_func_noret op_0188_14_nf; +extern cpuop_func_noret op_0188_14_ff; +extern cpuop_func_noret op_0190_14_nf; +extern cpuop_func_noret op_0190_14_ff; +extern cpuop_func_noret op_0198_14_nf; +extern cpuop_func_noret op_0198_14_ff; +extern cpuop_func_noret op_01a0_14_nf; +extern cpuop_func_noret op_01a0_14_ff; +extern cpuop_func_noret op_01a8_14_nf; +extern cpuop_func_noret op_01a8_14_ff; +extern cpuop_func_noret op_01b0_14_nf; +extern cpuop_func_noret op_01b0_14_ff; +extern cpuop_func_noret op_01b8_14_nf; +extern cpuop_func_noret op_01b8_14_ff; +extern cpuop_func_noret op_01b9_14_nf; +extern cpuop_func_noret op_01b9_14_ff; +extern cpuop_func_noret op_01c0_14_nf; +extern cpuop_func_noret op_01c0_14_ff; +extern cpuop_func_noret op_01c8_14_nf; +extern cpuop_func_noret op_01c8_14_ff; +extern cpuop_func_noret op_01d0_14_nf; +extern cpuop_func_noret op_01d0_14_ff; +extern cpuop_func_noret op_01d8_14_nf; +extern cpuop_func_noret op_01d8_14_ff; +extern cpuop_func_noret op_01e0_14_nf; +extern cpuop_func_noret op_01e0_14_ff; +extern cpuop_func_noret op_01e8_14_nf; +extern cpuop_func_noret op_01e8_14_ff; +extern cpuop_func_noret op_01f0_14_nf; +extern cpuop_func_noret op_01f0_14_ff; +extern cpuop_func_noret op_01f8_14_nf; +extern cpuop_func_noret op_01f8_14_ff; +extern cpuop_func_noret op_01f9_14_nf; +extern cpuop_func_noret op_01f9_14_ff; +extern cpuop_func_noret op_0200_14_nf; +extern cpuop_func_noret op_0200_14_ff; +extern cpuop_func_noret op_0210_14_nf; +extern cpuop_func_noret op_0210_14_ff; +extern cpuop_func_noret op_0218_14_nf; +extern cpuop_func_noret op_0218_14_ff; +extern cpuop_func_noret op_0220_14_nf; +extern cpuop_func_noret op_0220_14_ff; +extern cpuop_func_noret op_0228_14_nf; +extern cpuop_func_noret op_0228_14_ff; +extern cpuop_func_noret op_0230_14_nf; +extern cpuop_func_noret op_0230_14_ff; +extern cpuop_func_noret op_0238_14_nf; +extern cpuop_func_noret op_0238_14_ff; +extern cpuop_func_noret op_0239_14_nf; +extern cpuop_func_noret op_0239_14_ff; +extern cpuop_func_noret op_023c_14_nf; +extern cpuop_func_noret op_023c_14_ff; +extern cpuop_func_noret op_0240_14_nf; +extern cpuop_func_noret op_0240_14_ff; +extern cpuop_func_noret op_0250_14_nf; +extern cpuop_func_noret op_0250_14_ff; +extern cpuop_func_noret op_0258_14_nf; +extern cpuop_func_noret op_0258_14_ff; +extern cpuop_func_noret op_0260_14_nf; +extern cpuop_func_noret op_0260_14_ff; +extern cpuop_func_noret op_0268_14_nf; +extern cpuop_func_noret op_0268_14_ff; +extern cpuop_func_noret op_0270_14_nf; +extern cpuop_func_noret op_0270_14_ff; +extern cpuop_func_noret op_0278_14_nf; +extern cpuop_func_noret op_0278_14_ff; +extern cpuop_func_noret op_0279_14_nf; +extern cpuop_func_noret op_0279_14_ff; +extern cpuop_func_noret op_027c_14_nf; +extern cpuop_func_noret op_027c_14_ff; +extern cpuop_func_noret op_0280_14_nf; +extern cpuop_func_noret op_0280_14_ff; +extern cpuop_func_noret op_0290_14_nf; +extern cpuop_func_noret op_0290_14_ff; +extern cpuop_func_noret op_0298_14_nf; +extern cpuop_func_noret op_0298_14_ff; +extern cpuop_func_noret op_02a0_14_nf; +extern cpuop_func_noret op_02a0_14_ff; +extern cpuop_func_noret op_02a8_14_nf; +extern cpuop_func_noret op_02a8_14_ff; +extern cpuop_func_noret op_02b0_14_nf; +extern cpuop_func_noret op_02b0_14_ff; +extern cpuop_func_noret op_02b8_14_nf; +extern cpuop_func_noret op_02b8_14_ff; +extern cpuop_func_noret op_02b9_14_nf; +extern cpuop_func_noret op_02b9_14_ff; +extern cpuop_func_noret op_0400_14_nf; +extern cpuop_func_noret op_0400_14_ff; +extern cpuop_func_noret op_0410_14_nf; +extern cpuop_func_noret op_0410_14_ff; +extern cpuop_func_noret op_0418_14_nf; +extern cpuop_func_noret op_0418_14_ff; +extern cpuop_func_noret op_0420_14_nf; +extern cpuop_func_noret op_0420_14_ff; +extern cpuop_func_noret op_0428_14_nf; +extern cpuop_func_noret op_0428_14_ff; +extern cpuop_func_noret op_0430_14_nf; +extern cpuop_func_noret op_0430_14_ff; +extern cpuop_func_noret op_0438_14_nf; +extern cpuop_func_noret op_0438_14_ff; +extern cpuop_func_noret op_0439_14_nf; +extern cpuop_func_noret op_0439_14_ff; +extern cpuop_func_noret op_0440_14_nf; +extern cpuop_func_noret op_0440_14_ff; +extern cpuop_func_noret op_0450_14_nf; +extern cpuop_func_noret op_0450_14_ff; +extern cpuop_func_noret op_0458_14_nf; +extern cpuop_func_noret op_0458_14_ff; +extern cpuop_func_noret op_0460_14_nf; +extern cpuop_func_noret op_0460_14_ff; +extern cpuop_func_noret op_0468_14_nf; +extern cpuop_func_noret op_0468_14_ff; +extern cpuop_func_noret op_0470_14_nf; +extern cpuop_func_noret op_0470_14_ff; +extern cpuop_func_noret op_0478_14_nf; +extern cpuop_func_noret op_0478_14_ff; +extern cpuop_func_noret op_0479_14_nf; +extern cpuop_func_noret op_0479_14_ff; +extern cpuop_func_noret op_0480_14_nf; +extern cpuop_func_noret op_0480_14_ff; +extern cpuop_func_noret op_0490_14_nf; +extern cpuop_func_noret op_0490_14_ff; +extern cpuop_func_noret op_0498_14_nf; +extern cpuop_func_noret op_0498_14_ff; +extern cpuop_func_noret op_04a0_14_nf; +extern cpuop_func_noret op_04a0_14_ff; +extern cpuop_func_noret op_04a8_14_nf; +extern cpuop_func_noret op_04a8_14_ff; +extern cpuop_func_noret op_04b0_14_nf; +extern cpuop_func_noret op_04b0_14_ff; +extern cpuop_func_noret op_04b8_14_nf; +extern cpuop_func_noret op_04b8_14_ff; +extern cpuop_func_noret op_04b9_14_nf; +extern cpuop_func_noret op_04b9_14_ff; +extern cpuop_func_noret op_0600_14_nf; +extern cpuop_func_noret op_0600_14_ff; +extern cpuop_func_noret op_0610_14_nf; +extern cpuop_func_noret op_0610_14_ff; +extern cpuop_func_noret op_0618_14_nf; +extern cpuop_func_noret op_0618_14_ff; +extern cpuop_func_noret op_0620_14_nf; +extern cpuop_func_noret op_0620_14_ff; +extern cpuop_func_noret op_0628_14_nf; +extern cpuop_func_noret op_0628_14_ff; +extern cpuop_func_noret op_0630_14_nf; +extern cpuop_func_noret op_0630_14_ff; +extern cpuop_func_noret op_0638_14_nf; +extern cpuop_func_noret op_0638_14_ff; +extern cpuop_func_noret op_0639_14_nf; +extern cpuop_func_noret op_0639_14_ff; +extern cpuop_func_noret op_0640_14_nf; +extern cpuop_func_noret op_0640_14_ff; +extern cpuop_func_noret op_0650_14_nf; +extern cpuop_func_noret op_0650_14_ff; +extern cpuop_func_noret op_0658_14_nf; +extern cpuop_func_noret op_0658_14_ff; +extern cpuop_func_noret op_0660_14_nf; +extern cpuop_func_noret op_0660_14_ff; +extern cpuop_func_noret op_0668_14_nf; +extern cpuop_func_noret op_0668_14_ff; +extern cpuop_func_noret op_0670_14_nf; +extern cpuop_func_noret op_0670_14_ff; +extern cpuop_func_noret op_0678_14_nf; +extern cpuop_func_noret op_0678_14_ff; +extern cpuop_func_noret op_0679_14_nf; +extern cpuop_func_noret op_0679_14_ff; +extern cpuop_func_noret op_0680_14_nf; +extern cpuop_func_noret op_0680_14_ff; +extern cpuop_func_noret op_0690_14_nf; +extern cpuop_func_noret op_0690_14_ff; +extern cpuop_func_noret op_0698_14_nf; +extern cpuop_func_noret op_0698_14_ff; +extern cpuop_func_noret op_06a0_14_nf; +extern cpuop_func_noret op_06a0_14_ff; +extern cpuop_func_noret op_06a8_14_nf; +extern cpuop_func_noret op_06a8_14_ff; +extern cpuop_func_noret op_06b0_14_nf; +extern cpuop_func_noret op_06b0_14_ff; +extern cpuop_func_noret op_06b8_14_nf; +extern cpuop_func_noret op_06b8_14_ff; +extern cpuop_func_noret op_06b9_14_nf; +extern cpuop_func_noret op_06b9_14_ff; +extern cpuop_func_noret op_0800_14_nf; +extern cpuop_func_noret op_0800_14_ff; +extern cpuop_func_noret op_0810_14_nf; +extern cpuop_func_noret op_0810_14_ff; +extern cpuop_func_noret op_0818_14_nf; +extern cpuop_func_noret op_0818_14_ff; +extern cpuop_func_noret op_0820_14_nf; +extern cpuop_func_noret op_0820_14_ff; +extern cpuop_func_noret op_0828_14_nf; +extern cpuop_func_noret op_0828_14_ff; +extern cpuop_func_noret op_0830_14_nf; +extern cpuop_func_noret op_0830_14_ff; +extern cpuop_func_noret op_0838_14_nf; +extern cpuop_func_noret op_0838_14_ff; +extern cpuop_func_noret op_0839_14_nf; +extern cpuop_func_noret op_0839_14_ff; +extern cpuop_func_noret op_083a_14_nf; +extern cpuop_func_noret op_083a_14_ff; +extern cpuop_func_noret op_083b_14_nf; +extern cpuop_func_noret op_083b_14_ff; +extern cpuop_func_noret op_0840_14_nf; +extern cpuop_func_noret op_0840_14_ff; +extern cpuop_func_noret op_0850_14_nf; +extern cpuop_func_noret op_0850_14_ff; +extern cpuop_func_noret op_0858_14_nf; +extern cpuop_func_noret op_0858_14_ff; +extern cpuop_func_noret op_0860_14_nf; +extern cpuop_func_noret op_0860_14_ff; +extern cpuop_func_noret op_0868_14_nf; +extern cpuop_func_noret op_0868_14_ff; +extern cpuop_func_noret op_0870_14_nf; +extern cpuop_func_noret op_0870_14_ff; +extern cpuop_func_noret op_0878_14_nf; +extern cpuop_func_noret op_0878_14_ff; +extern cpuop_func_noret op_0879_14_nf; +extern cpuop_func_noret op_0879_14_ff; +extern cpuop_func_noret op_0880_14_nf; +extern cpuop_func_noret op_0880_14_ff; +extern cpuop_func_noret op_0890_14_nf; +extern cpuop_func_noret op_0890_14_ff; +extern cpuop_func_noret op_0898_14_nf; +extern cpuop_func_noret op_0898_14_ff; +extern cpuop_func_noret op_08a0_14_nf; +extern cpuop_func_noret op_08a0_14_ff; +extern cpuop_func_noret op_08a8_14_nf; +extern cpuop_func_noret op_08a8_14_ff; +extern cpuop_func_noret op_08b0_14_nf; +extern cpuop_func_noret op_08b0_14_ff; +extern cpuop_func_noret op_08b8_14_nf; +extern cpuop_func_noret op_08b8_14_ff; +extern cpuop_func_noret op_08b9_14_nf; +extern cpuop_func_noret op_08b9_14_ff; +extern cpuop_func_noret op_08c0_14_nf; +extern cpuop_func_noret op_08c0_14_ff; +extern cpuop_func_noret op_08d0_14_nf; +extern cpuop_func_noret op_08d0_14_ff; +extern cpuop_func_noret op_08d8_14_nf; +extern cpuop_func_noret op_08d8_14_ff; +extern cpuop_func_noret op_08e0_14_nf; +extern cpuop_func_noret op_08e0_14_ff; +extern cpuop_func_noret op_08e8_14_nf; +extern cpuop_func_noret op_08e8_14_ff; +extern cpuop_func_noret op_08f0_14_nf; +extern cpuop_func_noret op_08f0_14_ff; +extern cpuop_func_noret op_08f8_14_nf; +extern cpuop_func_noret op_08f8_14_ff; +extern cpuop_func_noret op_08f9_14_nf; +extern cpuop_func_noret op_08f9_14_ff; +extern cpuop_func_noret op_0a00_14_nf; +extern cpuop_func_noret op_0a00_14_ff; +extern cpuop_func_noret op_0a10_14_nf; +extern cpuop_func_noret op_0a10_14_ff; +extern cpuop_func_noret op_0a18_14_nf; +extern cpuop_func_noret op_0a18_14_ff; +extern cpuop_func_noret op_0a20_14_nf; +extern cpuop_func_noret op_0a20_14_ff; +extern cpuop_func_noret op_0a28_14_nf; +extern cpuop_func_noret op_0a28_14_ff; +extern cpuop_func_noret op_0a30_14_nf; +extern cpuop_func_noret op_0a30_14_ff; +extern cpuop_func_noret op_0a38_14_nf; +extern cpuop_func_noret op_0a38_14_ff; +extern cpuop_func_noret op_0a39_14_nf; +extern cpuop_func_noret op_0a39_14_ff; +extern cpuop_func_noret op_0a3c_14_nf; +extern cpuop_func_noret op_0a3c_14_ff; +extern cpuop_func_noret op_0a40_14_nf; +extern cpuop_func_noret op_0a40_14_ff; +extern cpuop_func_noret op_0a50_14_nf; +extern cpuop_func_noret op_0a50_14_ff; +extern cpuop_func_noret op_0a58_14_nf; +extern cpuop_func_noret op_0a58_14_ff; +extern cpuop_func_noret op_0a60_14_nf; +extern cpuop_func_noret op_0a60_14_ff; +extern cpuop_func_noret op_0a68_14_nf; +extern cpuop_func_noret op_0a68_14_ff; +extern cpuop_func_noret op_0a70_14_nf; +extern cpuop_func_noret op_0a70_14_ff; +extern cpuop_func_noret op_0a78_14_nf; +extern cpuop_func_noret op_0a78_14_ff; +extern cpuop_func_noret op_0a79_14_nf; +extern cpuop_func_noret op_0a79_14_ff; +extern cpuop_func_noret op_0a7c_14_nf; +extern cpuop_func_noret op_0a7c_14_ff; +extern cpuop_func_noret op_0a80_14_nf; +extern cpuop_func_noret op_0a80_14_ff; +extern cpuop_func_noret op_0a90_14_nf; +extern cpuop_func_noret op_0a90_14_ff; +extern cpuop_func_noret op_0a98_14_nf; +extern cpuop_func_noret op_0a98_14_ff; +extern cpuop_func_noret op_0aa0_14_nf; +extern cpuop_func_noret op_0aa0_14_ff; +extern cpuop_func_noret op_0aa8_14_nf; +extern cpuop_func_noret op_0aa8_14_ff; +extern cpuop_func_noret op_0ab0_14_nf; +extern cpuop_func_noret op_0ab0_14_ff; +extern cpuop_func_noret op_0ab8_14_nf; +extern cpuop_func_noret op_0ab8_14_ff; +extern cpuop_func_noret op_0ab9_14_nf; +extern cpuop_func_noret op_0ab9_14_ff; +extern cpuop_func_noret op_0c00_14_nf; +extern cpuop_func_noret op_0c00_14_ff; +extern cpuop_func_noret op_0c10_14_nf; +extern cpuop_func_noret op_0c10_14_ff; +extern cpuop_func_noret op_0c18_14_nf; +extern cpuop_func_noret op_0c18_14_ff; +extern cpuop_func_noret op_0c20_14_nf; +extern cpuop_func_noret op_0c20_14_ff; +extern cpuop_func_noret op_0c28_14_nf; +extern cpuop_func_noret op_0c28_14_ff; +extern cpuop_func_noret op_0c30_14_nf; +extern cpuop_func_noret op_0c30_14_ff; +extern cpuop_func_noret op_0c38_14_nf; +extern cpuop_func_noret op_0c38_14_ff; +extern cpuop_func_noret op_0c39_14_nf; +extern cpuop_func_noret op_0c39_14_ff; +extern cpuop_func_noret op_0c40_14_nf; +extern cpuop_func_noret op_0c40_14_ff; +extern cpuop_func_noret op_0c50_14_nf; +extern cpuop_func_noret op_0c50_14_ff; +extern cpuop_func_noret op_0c58_14_nf; +extern cpuop_func_noret op_0c58_14_ff; +extern cpuop_func_noret op_0c60_14_nf; +extern cpuop_func_noret op_0c60_14_ff; +extern cpuop_func_noret op_0c68_14_nf; +extern cpuop_func_noret op_0c68_14_ff; +extern cpuop_func_noret op_0c70_14_nf; +extern cpuop_func_noret op_0c70_14_ff; +extern cpuop_func_noret op_0c78_14_nf; +extern cpuop_func_noret op_0c78_14_ff; +extern cpuop_func_noret op_0c79_14_nf; +extern cpuop_func_noret op_0c79_14_ff; +extern cpuop_func_noret op_0c80_14_nf; +extern cpuop_func_noret op_0c80_14_ff; +extern cpuop_func_noret op_0c90_14_nf; +extern cpuop_func_noret op_0c90_14_ff; +extern cpuop_func_noret op_0c98_14_nf; +extern cpuop_func_noret op_0c98_14_ff; +extern cpuop_func_noret op_0ca0_14_nf; +extern cpuop_func_noret op_0ca0_14_ff; +extern cpuop_func_noret op_0ca8_14_nf; +extern cpuop_func_noret op_0ca8_14_ff; +extern cpuop_func_noret op_0cb0_14_nf; +extern cpuop_func_noret op_0cb0_14_ff; +extern cpuop_func_noret op_0cb8_14_nf; +extern cpuop_func_noret op_0cb8_14_ff; +extern cpuop_func_noret op_0cb9_14_nf; +extern cpuop_func_noret op_0cb9_14_ff; +extern cpuop_func_noret op_1000_14_nf; +extern cpuop_func_noret op_1000_14_ff; +extern cpuop_func_noret op_1010_14_nf; +extern cpuop_func_noret op_1010_14_ff; +extern cpuop_func_noret op_1018_14_nf; +extern cpuop_func_noret op_1018_14_ff; +extern cpuop_func_noret op_1020_14_nf; +extern cpuop_func_noret op_1020_14_ff; +extern cpuop_func_noret op_1028_14_nf; +extern cpuop_func_noret op_1028_14_ff; +extern cpuop_func_noret op_1030_14_nf; +extern cpuop_func_noret op_1030_14_ff; +extern cpuop_func_noret op_1038_14_nf; +extern cpuop_func_noret op_1038_14_ff; +extern cpuop_func_noret op_1039_14_nf; +extern cpuop_func_noret op_1039_14_ff; +extern cpuop_func_noret op_103a_14_nf; +extern cpuop_func_noret op_103a_14_ff; +extern cpuop_func_noret op_103b_14_nf; +extern cpuop_func_noret op_103b_14_ff; +extern cpuop_func_noret op_103c_14_nf; +extern cpuop_func_noret op_103c_14_ff; +extern cpuop_func_noret op_1080_14_nf; +extern cpuop_func_noret op_1080_14_ff; +extern cpuop_func_noret op_1090_14_nf; +extern cpuop_func_noret op_1090_14_ff; +extern cpuop_func_noret op_1098_14_nf; +extern cpuop_func_noret op_1098_14_ff; +extern cpuop_func_noret op_10a0_14_nf; +extern cpuop_func_noret op_10a0_14_ff; +extern cpuop_func_noret op_10a8_14_nf; +extern cpuop_func_noret op_10a8_14_ff; +extern cpuop_func_noret op_10b0_14_nf; +extern cpuop_func_noret op_10b0_14_ff; +extern cpuop_func_noret op_10b8_14_nf; +extern cpuop_func_noret op_10b8_14_ff; +extern cpuop_func_noret op_10b9_14_nf; +extern cpuop_func_noret op_10b9_14_ff; +extern cpuop_func_noret op_10ba_14_nf; +extern cpuop_func_noret op_10ba_14_ff; +extern cpuop_func_noret op_10bb_14_nf; +extern cpuop_func_noret op_10bb_14_ff; +extern cpuop_func_noret op_10bc_14_nf; +extern cpuop_func_noret op_10bc_14_ff; +extern cpuop_func_noret op_10c0_14_nf; +extern cpuop_func_noret op_10c0_14_ff; +extern cpuop_func_noret op_10d0_14_nf; +extern cpuop_func_noret op_10d0_14_ff; +extern cpuop_func_noret op_10d8_14_nf; +extern cpuop_func_noret op_10d8_14_ff; +extern cpuop_func_noret op_10e0_14_nf; +extern cpuop_func_noret op_10e0_14_ff; +extern cpuop_func_noret op_10e8_14_nf; +extern cpuop_func_noret op_10e8_14_ff; +extern cpuop_func_noret op_10f0_14_nf; +extern cpuop_func_noret op_10f0_14_ff; +extern cpuop_func_noret op_10f8_14_nf; +extern cpuop_func_noret op_10f8_14_ff; +extern cpuop_func_noret op_10f9_14_nf; +extern cpuop_func_noret op_10f9_14_ff; +extern cpuop_func_noret op_10fa_14_nf; +extern cpuop_func_noret op_10fa_14_ff; +extern cpuop_func_noret op_10fb_14_nf; +extern cpuop_func_noret op_10fb_14_ff; +extern cpuop_func_noret op_10fc_14_nf; +extern cpuop_func_noret op_10fc_14_ff; +extern cpuop_func_noret op_1100_14_nf; +extern cpuop_func_noret op_1100_14_ff; +extern cpuop_func_noret op_1110_14_nf; +extern cpuop_func_noret op_1110_14_ff; +extern cpuop_func_noret op_1118_14_nf; +extern cpuop_func_noret op_1118_14_ff; +extern cpuop_func_noret op_1120_14_nf; +extern cpuop_func_noret op_1120_14_ff; +extern cpuop_func_noret op_1128_14_nf; +extern cpuop_func_noret op_1128_14_ff; +extern cpuop_func_noret op_1130_14_nf; +extern cpuop_func_noret op_1130_14_ff; +extern cpuop_func_noret op_1138_14_nf; +extern cpuop_func_noret op_1138_14_ff; +extern cpuop_func_noret op_1139_14_nf; +extern cpuop_func_noret op_1139_14_ff; +extern cpuop_func_noret op_113a_14_nf; +extern cpuop_func_noret op_113a_14_ff; +extern cpuop_func_noret op_113b_14_nf; +extern cpuop_func_noret op_113b_14_ff; +extern cpuop_func_noret op_113c_14_nf; +extern cpuop_func_noret op_113c_14_ff; +extern cpuop_func_noret op_1140_14_nf; +extern cpuop_func_noret op_1140_14_ff; +extern cpuop_func_noret op_1150_14_nf; +extern cpuop_func_noret op_1150_14_ff; +extern cpuop_func_noret op_1158_14_nf; +extern cpuop_func_noret op_1158_14_ff; +extern cpuop_func_noret op_1160_14_nf; +extern cpuop_func_noret op_1160_14_ff; +extern cpuop_func_noret op_1168_14_nf; +extern cpuop_func_noret op_1168_14_ff; +extern cpuop_func_noret op_1170_14_nf; +extern cpuop_func_noret op_1170_14_ff; +extern cpuop_func_noret op_1178_14_nf; +extern cpuop_func_noret op_1178_14_ff; +extern cpuop_func_noret op_1179_14_nf; +extern cpuop_func_noret op_1179_14_ff; +extern cpuop_func_noret op_117a_14_nf; +extern cpuop_func_noret op_117a_14_ff; +extern cpuop_func_noret op_117b_14_nf; +extern cpuop_func_noret op_117b_14_ff; +extern cpuop_func_noret op_117c_14_nf; +extern cpuop_func_noret op_117c_14_ff; +extern cpuop_func_noret op_1180_14_nf; +extern cpuop_func_noret op_1180_14_ff; +extern cpuop_func_noret op_1190_14_nf; +extern cpuop_func_noret op_1190_14_ff; +extern cpuop_func_noret op_1198_14_nf; +extern cpuop_func_noret op_1198_14_ff; +extern cpuop_func_noret op_11a0_14_nf; +extern cpuop_func_noret op_11a0_14_ff; +extern cpuop_func_noret op_11a8_14_nf; +extern cpuop_func_noret op_11a8_14_ff; +extern cpuop_func_noret op_11b0_14_nf; +extern cpuop_func_noret op_11b0_14_ff; +extern cpuop_func_noret op_11b8_14_nf; +extern cpuop_func_noret op_11b8_14_ff; +extern cpuop_func_noret op_11b9_14_nf; +extern cpuop_func_noret op_11b9_14_ff; +extern cpuop_func_noret op_11ba_14_nf; +extern cpuop_func_noret op_11ba_14_ff; +extern cpuop_func_noret op_11bb_14_nf; +extern cpuop_func_noret op_11bb_14_ff; +extern cpuop_func_noret op_11bc_14_nf; +extern cpuop_func_noret op_11bc_14_ff; +extern cpuop_func_noret op_11c0_14_nf; +extern cpuop_func_noret op_11c0_14_ff; +extern cpuop_func_noret op_11d0_14_nf; +extern cpuop_func_noret op_11d0_14_ff; +extern cpuop_func_noret op_11d8_14_nf; +extern cpuop_func_noret op_11d8_14_ff; +extern cpuop_func_noret op_11e0_14_nf; +extern cpuop_func_noret op_11e0_14_ff; +extern cpuop_func_noret op_11e8_14_nf; +extern cpuop_func_noret op_11e8_14_ff; +extern cpuop_func_noret op_11f0_14_nf; +extern cpuop_func_noret op_11f0_14_ff; +extern cpuop_func_noret op_11f8_14_nf; +extern cpuop_func_noret op_11f8_14_ff; +extern cpuop_func_noret op_11f9_14_nf; +extern cpuop_func_noret op_11f9_14_ff; +extern cpuop_func_noret op_11fa_14_nf; +extern cpuop_func_noret op_11fa_14_ff; +extern cpuop_func_noret op_11fb_14_nf; +extern cpuop_func_noret op_11fb_14_ff; +extern cpuop_func_noret op_11fc_14_nf; +extern cpuop_func_noret op_11fc_14_ff; +extern cpuop_func_noret op_13c0_14_nf; +extern cpuop_func_noret op_13c0_14_ff; +extern cpuop_func_noret op_13d0_14_nf; +extern cpuop_func_noret op_13d0_14_ff; +extern cpuop_func_noret op_13d8_14_nf; +extern cpuop_func_noret op_13d8_14_ff; +extern cpuop_func_noret op_13e0_14_nf; +extern cpuop_func_noret op_13e0_14_ff; +extern cpuop_func_noret op_13e8_14_nf; +extern cpuop_func_noret op_13e8_14_ff; +extern cpuop_func_noret op_13f0_14_nf; +extern cpuop_func_noret op_13f0_14_ff; +extern cpuop_func_noret op_13f8_14_nf; +extern cpuop_func_noret op_13f8_14_ff; +extern cpuop_func_noret op_13f9_14_nf; +extern cpuop_func_noret op_13f9_14_ff; +extern cpuop_func_noret op_13fa_14_nf; +extern cpuop_func_noret op_13fa_14_ff; +extern cpuop_func_noret op_13fb_14_nf; +extern cpuop_func_noret op_13fb_14_ff; +extern cpuop_func_noret op_13fc_14_nf; +extern cpuop_func_noret op_13fc_14_ff; +extern cpuop_func_noret op_2000_14_nf; +extern cpuop_func_noret op_2000_14_ff; +extern cpuop_func_noret op_2008_14_nf; +extern cpuop_func_noret op_2008_14_ff; +extern cpuop_func_noret op_2010_14_nf; +extern cpuop_func_noret op_2010_14_ff; +extern cpuop_func_noret op_2018_14_nf; +extern cpuop_func_noret op_2018_14_ff; +extern cpuop_func_noret op_2020_14_nf; +extern cpuop_func_noret op_2020_14_ff; +extern cpuop_func_noret op_2028_14_nf; +extern cpuop_func_noret op_2028_14_ff; +extern cpuop_func_noret op_2030_14_nf; +extern cpuop_func_noret op_2030_14_ff; +extern cpuop_func_noret op_2038_14_nf; +extern cpuop_func_noret op_2038_14_ff; +extern cpuop_func_noret op_2039_14_nf; +extern cpuop_func_noret op_2039_14_ff; +extern cpuop_func_noret op_203a_14_nf; +extern cpuop_func_noret op_203a_14_ff; +extern cpuop_func_noret op_203b_14_nf; +extern cpuop_func_noret op_203b_14_ff; +extern cpuop_func_noret op_203c_14_nf; +extern cpuop_func_noret op_203c_14_ff; +extern cpuop_func_noret op_2040_14_nf; +extern cpuop_func_noret op_2040_14_ff; +extern cpuop_func_noret op_2048_14_nf; +extern cpuop_func_noret op_2048_14_ff; +extern cpuop_func_noret op_2050_14_nf; +extern cpuop_func_noret op_2050_14_ff; +extern cpuop_func_noret op_2058_14_nf; +extern cpuop_func_noret op_2058_14_ff; +extern cpuop_func_noret op_2060_14_nf; +extern cpuop_func_noret op_2060_14_ff; +extern cpuop_func_noret op_2068_14_nf; +extern cpuop_func_noret op_2068_14_ff; +extern cpuop_func_noret op_2070_14_nf; +extern cpuop_func_noret op_2070_14_ff; +extern cpuop_func_noret op_2078_14_nf; +extern cpuop_func_noret op_2078_14_ff; +extern cpuop_func_noret op_2079_14_nf; +extern cpuop_func_noret op_2079_14_ff; +extern cpuop_func_noret op_207a_14_nf; +extern cpuop_func_noret op_207a_14_ff; +extern cpuop_func_noret op_207b_14_nf; +extern cpuop_func_noret op_207b_14_ff; +extern cpuop_func_noret op_207c_14_nf; +extern cpuop_func_noret op_207c_14_ff; +extern cpuop_func_noret op_2080_14_nf; +extern cpuop_func_noret op_2080_14_ff; +extern cpuop_func_noret op_2088_14_nf; +extern cpuop_func_noret op_2088_14_ff; +extern cpuop_func_noret op_2090_14_nf; +extern cpuop_func_noret op_2090_14_ff; +extern cpuop_func_noret op_2098_14_nf; +extern cpuop_func_noret op_2098_14_ff; +extern cpuop_func_noret op_20a0_14_nf; +extern cpuop_func_noret op_20a0_14_ff; +extern cpuop_func_noret op_20a8_14_nf; +extern cpuop_func_noret op_20a8_14_ff; +extern cpuop_func_noret op_20b0_14_nf; +extern cpuop_func_noret op_20b0_14_ff; +extern cpuop_func_noret op_20b8_14_nf; +extern cpuop_func_noret op_20b8_14_ff; +extern cpuop_func_noret op_20b9_14_nf; +extern cpuop_func_noret op_20b9_14_ff; +extern cpuop_func_noret op_20ba_14_nf; +extern cpuop_func_noret op_20ba_14_ff; +extern cpuop_func_noret op_20bb_14_nf; +extern cpuop_func_noret op_20bb_14_ff; +extern cpuop_func_noret op_20bc_14_nf; +extern cpuop_func_noret op_20bc_14_ff; +extern cpuop_func_noret op_20c0_14_nf; +extern cpuop_func_noret op_20c0_14_ff; +extern cpuop_func_noret op_20c8_14_nf; +extern cpuop_func_noret op_20c8_14_ff; +extern cpuop_func_noret op_20d0_14_nf; +extern cpuop_func_noret op_20d0_14_ff; +extern cpuop_func_noret op_20d8_14_nf; +extern cpuop_func_noret op_20d8_14_ff; +extern cpuop_func_noret op_20e0_14_nf; +extern cpuop_func_noret op_20e0_14_ff; +extern cpuop_func_noret op_20e8_14_nf; +extern cpuop_func_noret op_20e8_14_ff; +extern cpuop_func_noret op_20f0_14_nf; +extern cpuop_func_noret op_20f0_14_ff; +extern cpuop_func_noret op_20f8_14_nf; +extern cpuop_func_noret op_20f8_14_ff; +extern cpuop_func_noret op_20f9_14_nf; +extern cpuop_func_noret op_20f9_14_ff; +extern cpuop_func_noret op_20fa_14_nf; +extern cpuop_func_noret op_20fa_14_ff; +extern cpuop_func_noret op_20fb_14_nf; +extern cpuop_func_noret op_20fb_14_ff; +extern cpuop_func_noret op_20fc_14_nf; +extern cpuop_func_noret op_20fc_14_ff; +extern cpuop_func_noret op_2100_14_nf; +extern cpuop_func_noret op_2100_14_ff; +extern cpuop_func_noret op_2108_14_nf; +extern cpuop_func_noret op_2108_14_ff; +extern cpuop_func_noret op_2110_14_nf; +extern cpuop_func_noret op_2110_14_ff; +extern cpuop_func_noret op_2118_14_nf; +extern cpuop_func_noret op_2118_14_ff; +extern cpuop_func_noret op_2120_14_nf; +extern cpuop_func_noret op_2120_14_ff; +extern cpuop_func_noret op_2128_14_nf; +extern cpuop_func_noret op_2128_14_ff; +extern cpuop_func_noret op_2130_14_nf; +extern cpuop_func_noret op_2130_14_ff; +extern cpuop_func_noret op_2138_14_nf; +extern cpuop_func_noret op_2138_14_ff; +extern cpuop_func_noret op_2139_14_nf; +extern cpuop_func_noret op_2139_14_ff; +extern cpuop_func_noret op_213a_14_nf; +extern cpuop_func_noret op_213a_14_ff; +extern cpuop_func_noret op_213b_14_nf; +extern cpuop_func_noret op_213b_14_ff; +extern cpuop_func_noret op_213c_14_nf; +extern cpuop_func_noret op_213c_14_ff; +extern cpuop_func_noret op_2140_14_nf; +extern cpuop_func_noret op_2140_14_ff; +extern cpuop_func_noret op_2148_14_nf; +extern cpuop_func_noret op_2148_14_ff; +extern cpuop_func_noret op_2150_14_nf; +extern cpuop_func_noret op_2150_14_ff; +extern cpuop_func_noret op_2158_14_nf; +extern cpuop_func_noret op_2158_14_ff; +extern cpuop_func_noret op_2160_14_nf; +extern cpuop_func_noret op_2160_14_ff; +extern cpuop_func_noret op_2168_14_nf; +extern cpuop_func_noret op_2168_14_ff; +extern cpuop_func_noret op_2170_14_nf; +extern cpuop_func_noret op_2170_14_ff; +extern cpuop_func_noret op_2178_14_nf; +extern cpuop_func_noret op_2178_14_ff; +extern cpuop_func_noret op_2179_14_nf; +extern cpuop_func_noret op_2179_14_ff; +extern cpuop_func_noret op_217a_14_nf; +extern cpuop_func_noret op_217a_14_ff; +extern cpuop_func_noret op_217b_14_nf; +extern cpuop_func_noret op_217b_14_ff; +extern cpuop_func_noret op_217c_14_nf; +extern cpuop_func_noret op_217c_14_ff; +extern cpuop_func_noret op_2180_14_nf; +extern cpuop_func_noret op_2180_14_ff; +extern cpuop_func_noret op_2188_14_nf; +extern cpuop_func_noret op_2188_14_ff; +extern cpuop_func_noret op_2190_14_nf; +extern cpuop_func_noret op_2190_14_ff; +extern cpuop_func_noret op_2198_14_nf; +extern cpuop_func_noret op_2198_14_ff; +extern cpuop_func_noret op_21a0_14_nf; +extern cpuop_func_noret op_21a0_14_ff; +extern cpuop_func_noret op_21a8_14_nf; +extern cpuop_func_noret op_21a8_14_ff; +extern cpuop_func_noret op_21b0_14_nf; +extern cpuop_func_noret op_21b0_14_ff; +extern cpuop_func_noret op_21b8_14_nf; +extern cpuop_func_noret op_21b8_14_ff; +extern cpuop_func_noret op_21b9_14_nf; +extern cpuop_func_noret op_21b9_14_ff; +extern cpuop_func_noret op_21ba_14_nf; +extern cpuop_func_noret op_21ba_14_ff; +extern cpuop_func_noret op_21bb_14_nf; +extern cpuop_func_noret op_21bb_14_ff; +extern cpuop_func_noret op_21bc_14_nf; +extern cpuop_func_noret op_21bc_14_ff; +extern cpuop_func_noret op_21c0_14_nf; +extern cpuop_func_noret op_21c0_14_ff; +extern cpuop_func_noret op_21c8_14_nf; +extern cpuop_func_noret op_21c8_14_ff; +extern cpuop_func_noret op_21d0_14_nf; +extern cpuop_func_noret op_21d0_14_ff; +extern cpuop_func_noret op_21d8_14_nf; +extern cpuop_func_noret op_21d8_14_ff; +extern cpuop_func_noret op_21e0_14_nf; +extern cpuop_func_noret op_21e0_14_ff; +extern cpuop_func_noret op_21e8_14_nf; +extern cpuop_func_noret op_21e8_14_ff; +extern cpuop_func_noret op_21f0_14_nf; +extern cpuop_func_noret op_21f0_14_ff; +extern cpuop_func_noret op_21f8_14_nf; +extern cpuop_func_noret op_21f8_14_ff; +extern cpuop_func_noret op_21f9_14_nf; +extern cpuop_func_noret op_21f9_14_ff; +extern cpuop_func_noret op_21fa_14_nf; +extern cpuop_func_noret op_21fa_14_ff; +extern cpuop_func_noret op_21fb_14_nf; +extern cpuop_func_noret op_21fb_14_ff; +extern cpuop_func_noret op_21fc_14_nf; +extern cpuop_func_noret op_21fc_14_ff; +extern cpuop_func_noret op_23c0_14_nf; +extern cpuop_func_noret op_23c0_14_ff; +extern cpuop_func_noret op_23c8_14_nf; +extern cpuop_func_noret op_23c8_14_ff; +extern cpuop_func_noret op_23d0_14_nf; +extern cpuop_func_noret op_23d0_14_ff; +extern cpuop_func_noret op_23d8_14_nf; +extern cpuop_func_noret op_23d8_14_ff; +extern cpuop_func_noret op_23e0_14_nf; +extern cpuop_func_noret op_23e0_14_ff; +extern cpuop_func_noret op_23e8_14_nf; +extern cpuop_func_noret op_23e8_14_ff; +extern cpuop_func_noret op_23f0_14_nf; +extern cpuop_func_noret op_23f0_14_ff; +extern cpuop_func_noret op_23f8_14_nf; +extern cpuop_func_noret op_23f8_14_ff; +extern cpuop_func_noret op_23f9_14_nf; +extern cpuop_func_noret op_23f9_14_ff; +extern cpuop_func_noret op_23fa_14_nf; +extern cpuop_func_noret op_23fa_14_ff; +extern cpuop_func_noret op_23fb_14_nf; +extern cpuop_func_noret op_23fb_14_ff; +extern cpuop_func_noret op_23fc_14_nf; +extern cpuop_func_noret op_23fc_14_ff; +extern cpuop_func_noret op_3000_14_nf; +extern cpuop_func_noret op_3000_14_ff; +extern cpuop_func_noret op_3008_14_nf; +extern cpuop_func_noret op_3008_14_ff; +extern cpuop_func_noret op_3010_14_nf; +extern cpuop_func_noret op_3010_14_ff; +extern cpuop_func_noret op_3018_14_nf; +extern cpuop_func_noret op_3018_14_ff; +extern cpuop_func_noret op_3020_14_nf; +extern cpuop_func_noret op_3020_14_ff; +extern cpuop_func_noret op_3028_14_nf; +extern cpuop_func_noret op_3028_14_ff; +extern cpuop_func_noret op_3030_14_nf; +extern cpuop_func_noret op_3030_14_ff; +extern cpuop_func_noret op_3038_14_nf; +extern cpuop_func_noret op_3038_14_ff; +extern cpuop_func_noret op_3039_14_nf; +extern cpuop_func_noret op_3039_14_ff; +extern cpuop_func_noret op_303a_14_nf; +extern cpuop_func_noret op_303a_14_ff; +extern cpuop_func_noret op_303b_14_nf; +extern cpuop_func_noret op_303b_14_ff; +extern cpuop_func_noret op_303c_14_nf; +extern cpuop_func_noret op_303c_14_ff; +extern cpuop_func_noret op_3040_14_nf; +extern cpuop_func_noret op_3040_14_ff; +extern cpuop_func_noret op_3048_14_nf; +extern cpuop_func_noret op_3048_14_ff; +extern cpuop_func_noret op_3050_14_nf; +extern cpuop_func_noret op_3050_14_ff; +extern cpuop_func_noret op_3058_14_nf; +extern cpuop_func_noret op_3058_14_ff; +extern cpuop_func_noret op_3060_14_nf; +extern cpuop_func_noret op_3060_14_ff; +extern cpuop_func_noret op_3068_14_nf; +extern cpuop_func_noret op_3068_14_ff; +extern cpuop_func_noret op_3070_14_nf; +extern cpuop_func_noret op_3070_14_ff; +extern cpuop_func_noret op_3078_14_nf; +extern cpuop_func_noret op_3078_14_ff; +extern cpuop_func_noret op_3079_14_nf; +extern cpuop_func_noret op_3079_14_ff; +extern cpuop_func_noret op_307a_14_nf; +extern cpuop_func_noret op_307a_14_ff; +extern cpuop_func_noret op_307b_14_nf; +extern cpuop_func_noret op_307b_14_ff; +extern cpuop_func_noret op_307c_14_nf; +extern cpuop_func_noret op_307c_14_ff; +extern cpuop_func_noret op_3080_14_nf; +extern cpuop_func_noret op_3080_14_ff; +extern cpuop_func_noret op_3088_14_nf; +extern cpuop_func_noret op_3088_14_ff; +extern cpuop_func_noret op_3090_14_nf; +extern cpuop_func_noret op_3090_14_ff; +extern cpuop_func_noret op_3098_14_nf; +extern cpuop_func_noret op_3098_14_ff; +extern cpuop_func_noret op_30a0_14_nf; +extern cpuop_func_noret op_30a0_14_ff; +extern cpuop_func_noret op_30a8_14_nf; +extern cpuop_func_noret op_30a8_14_ff; +extern cpuop_func_noret op_30b0_14_nf; +extern cpuop_func_noret op_30b0_14_ff; +extern cpuop_func_noret op_30b8_14_nf; +extern cpuop_func_noret op_30b8_14_ff; +extern cpuop_func_noret op_30b9_14_nf; +extern cpuop_func_noret op_30b9_14_ff; +extern cpuop_func_noret op_30ba_14_nf; +extern cpuop_func_noret op_30ba_14_ff; +extern cpuop_func_noret op_30bb_14_nf; +extern cpuop_func_noret op_30bb_14_ff; +extern cpuop_func_noret op_30bc_14_nf; +extern cpuop_func_noret op_30bc_14_ff; +extern cpuop_func_noret op_30c0_14_nf; +extern cpuop_func_noret op_30c0_14_ff; +extern cpuop_func_noret op_30c8_14_nf; +extern cpuop_func_noret op_30c8_14_ff; +extern cpuop_func_noret op_30d0_14_nf; +extern cpuop_func_noret op_30d0_14_ff; +extern cpuop_func_noret op_30d8_14_nf; +extern cpuop_func_noret op_30d8_14_ff; +extern cpuop_func_noret op_30e0_14_nf; +extern cpuop_func_noret op_30e0_14_ff; +extern cpuop_func_noret op_30e8_14_nf; +extern cpuop_func_noret op_30e8_14_ff; +extern cpuop_func_noret op_30f0_14_nf; +extern cpuop_func_noret op_30f0_14_ff; +extern cpuop_func_noret op_30f8_14_nf; +extern cpuop_func_noret op_30f8_14_ff; +extern cpuop_func_noret op_30f9_14_nf; +extern cpuop_func_noret op_30f9_14_ff; +extern cpuop_func_noret op_30fa_14_nf; +extern cpuop_func_noret op_30fa_14_ff; +extern cpuop_func_noret op_30fb_14_nf; +extern cpuop_func_noret op_30fb_14_ff; +extern cpuop_func_noret op_30fc_14_nf; +extern cpuop_func_noret op_30fc_14_ff; +extern cpuop_func_noret op_3100_14_nf; +extern cpuop_func_noret op_3100_14_ff; +extern cpuop_func_noret op_3108_14_nf; +extern cpuop_func_noret op_3108_14_ff; +extern cpuop_func_noret op_3110_14_nf; +extern cpuop_func_noret op_3110_14_ff; +extern cpuop_func_noret op_3118_14_nf; +extern cpuop_func_noret op_3118_14_ff; +extern cpuop_func_noret op_3120_14_nf; +extern cpuop_func_noret op_3120_14_ff; +extern cpuop_func_noret op_3128_14_nf; +extern cpuop_func_noret op_3128_14_ff; +extern cpuop_func_noret op_3130_14_nf; +extern cpuop_func_noret op_3130_14_ff; +extern cpuop_func_noret op_3138_14_nf; +extern cpuop_func_noret op_3138_14_ff; +extern cpuop_func_noret op_3139_14_nf; +extern cpuop_func_noret op_3139_14_ff; +extern cpuop_func_noret op_313a_14_nf; +extern cpuop_func_noret op_313a_14_ff; +extern cpuop_func_noret op_313b_14_nf; +extern cpuop_func_noret op_313b_14_ff; +extern cpuop_func_noret op_313c_14_nf; +extern cpuop_func_noret op_313c_14_ff; +extern cpuop_func_noret op_3140_14_nf; +extern cpuop_func_noret op_3140_14_ff; +extern cpuop_func_noret op_3148_14_nf; +extern cpuop_func_noret op_3148_14_ff; +extern cpuop_func_noret op_3150_14_nf; +extern cpuop_func_noret op_3150_14_ff; +extern cpuop_func_noret op_3158_14_nf; +extern cpuop_func_noret op_3158_14_ff; +extern cpuop_func_noret op_3160_14_nf; +extern cpuop_func_noret op_3160_14_ff; +extern cpuop_func_noret op_3168_14_nf; +extern cpuop_func_noret op_3168_14_ff; +extern cpuop_func_noret op_3170_14_nf; +extern cpuop_func_noret op_3170_14_ff; +extern cpuop_func_noret op_3178_14_nf; +extern cpuop_func_noret op_3178_14_ff; +extern cpuop_func_noret op_3179_14_nf; +extern cpuop_func_noret op_3179_14_ff; +extern cpuop_func_noret op_317a_14_nf; +extern cpuop_func_noret op_317a_14_ff; +extern cpuop_func_noret op_317b_14_nf; +extern cpuop_func_noret op_317b_14_ff; +extern cpuop_func_noret op_317c_14_nf; +extern cpuop_func_noret op_317c_14_ff; +extern cpuop_func_noret op_3180_14_nf; +extern cpuop_func_noret op_3180_14_ff; +extern cpuop_func_noret op_3188_14_nf; +extern cpuop_func_noret op_3188_14_ff; +extern cpuop_func_noret op_3190_14_nf; +extern cpuop_func_noret op_3190_14_ff; +extern cpuop_func_noret op_3198_14_nf; +extern cpuop_func_noret op_3198_14_ff; +extern cpuop_func_noret op_31a0_14_nf; +extern cpuop_func_noret op_31a0_14_ff; +extern cpuop_func_noret op_31a8_14_nf; +extern cpuop_func_noret op_31a8_14_ff; +extern cpuop_func_noret op_31b0_14_nf; +extern cpuop_func_noret op_31b0_14_ff; +extern cpuop_func_noret op_31b8_14_nf; +extern cpuop_func_noret op_31b8_14_ff; +extern cpuop_func_noret op_31b9_14_nf; +extern cpuop_func_noret op_31b9_14_ff; +extern cpuop_func_noret op_31ba_14_nf; +extern cpuop_func_noret op_31ba_14_ff; +extern cpuop_func_noret op_31bb_14_nf; +extern cpuop_func_noret op_31bb_14_ff; +extern cpuop_func_noret op_31bc_14_nf; +extern cpuop_func_noret op_31bc_14_ff; +extern cpuop_func_noret op_31c0_14_nf; +extern cpuop_func_noret op_31c0_14_ff; +extern cpuop_func_noret op_31c8_14_nf; +extern cpuop_func_noret op_31c8_14_ff; +extern cpuop_func_noret op_31d0_14_nf; +extern cpuop_func_noret op_31d0_14_ff; +extern cpuop_func_noret op_31d8_14_nf; +extern cpuop_func_noret op_31d8_14_ff; +extern cpuop_func_noret op_31e0_14_nf; +extern cpuop_func_noret op_31e0_14_ff; +extern cpuop_func_noret op_31e8_14_nf; +extern cpuop_func_noret op_31e8_14_ff; +extern cpuop_func_noret op_31f0_14_nf; +extern cpuop_func_noret op_31f0_14_ff; +extern cpuop_func_noret op_31f8_14_nf; +extern cpuop_func_noret op_31f8_14_ff; +extern cpuop_func_noret op_31f9_14_nf; +extern cpuop_func_noret op_31f9_14_ff; +extern cpuop_func_noret op_31fa_14_nf; +extern cpuop_func_noret op_31fa_14_ff; +extern cpuop_func_noret op_31fb_14_nf; +extern cpuop_func_noret op_31fb_14_ff; +extern cpuop_func_noret op_31fc_14_nf; +extern cpuop_func_noret op_31fc_14_ff; +extern cpuop_func_noret op_33c0_14_nf; +extern cpuop_func_noret op_33c0_14_ff; +extern cpuop_func_noret op_33c8_14_nf; +extern cpuop_func_noret op_33c8_14_ff; +extern cpuop_func_noret op_33d0_14_nf; +extern cpuop_func_noret op_33d0_14_ff; +extern cpuop_func_noret op_33d8_14_nf; +extern cpuop_func_noret op_33d8_14_ff; +extern cpuop_func_noret op_33e0_14_nf; +extern cpuop_func_noret op_33e0_14_ff; +extern cpuop_func_noret op_33e8_14_nf; +extern cpuop_func_noret op_33e8_14_ff; +extern cpuop_func_noret op_33f0_14_nf; +extern cpuop_func_noret op_33f0_14_ff; +extern cpuop_func_noret op_33f8_14_nf; +extern cpuop_func_noret op_33f8_14_ff; +extern cpuop_func_noret op_33f9_14_nf; +extern cpuop_func_noret op_33f9_14_ff; +extern cpuop_func_noret op_33fa_14_nf; +extern cpuop_func_noret op_33fa_14_ff; +extern cpuop_func_noret op_33fb_14_nf; +extern cpuop_func_noret op_33fb_14_ff; +extern cpuop_func_noret op_33fc_14_nf; +extern cpuop_func_noret op_33fc_14_ff; +extern cpuop_func_noret op_4000_14_nf; +extern cpuop_func_noret op_4000_14_ff; +extern cpuop_func_noret op_4010_14_nf; +extern cpuop_func_noret op_4010_14_ff; +extern cpuop_func_noret op_4018_14_nf; +extern cpuop_func_noret op_4018_14_ff; +extern cpuop_func_noret op_4020_14_nf; +extern cpuop_func_noret op_4020_14_ff; +extern cpuop_func_noret op_4028_14_nf; +extern cpuop_func_noret op_4028_14_ff; +extern cpuop_func_noret op_4030_14_nf; +extern cpuop_func_noret op_4030_14_ff; +extern cpuop_func_noret op_4038_14_nf; +extern cpuop_func_noret op_4038_14_ff; +extern cpuop_func_noret op_4039_14_nf; +extern cpuop_func_noret op_4039_14_ff; +extern cpuop_func_noret op_4040_14_nf; +extern cpuop_func_noret op_4040_14_ff; +extern cpuop_func_noret op_4050_14_nf; +extern cpuop_func_noret op_4050_14_ff; +extern cpuop_func_noret op_4058_14_nf; +extern cpuop_func_noret op_4058_14_ff; +extern cpuop_func_noret op_4060_14_nf; +extern cpuop_func_noret op_4060_14_ff; +extern cpuop_func_noret op_4068_14_nf; +extern cpuop_func_noret op_4068_14_ff; +extern cpuop_func_noret op_4070_14_nf; +extern cpuop_func_noret op_4070_14_ff; +extern cpuop_func_noret op_4078_14_nf; +extern cpuop_func_noret op_4078_14_ff; +extern cpuop_func_noret op_4079_14_nf; +extern cpuop_func_noret op_4079_14_ff; +extern cpuop_func_noret op_4080_14_nf; +extern cpuop_func_noret op_4080_14_ff; +extern cpuop_func_noret op_4090_14_nf; +extern cpuop_func_noret op_4090_14_ff; +extern cpuop_func_noret op_4098_14_nf; +extern cpuop_func_noret op_4098_14_ff; +extern cpuop_func_noret op_40a0_14_nf; +extern cpuop_func_noret op_40a0_14_ff; +extern cpuop_func_noret op_40a8_14_nf; +extern cpuop_func_noret op_40a8_14_ff; +extern cpuop_func_noret op_40b0_14_nf; +extern cpuop_func_noret op_40b0_14_ff; +extern cpuop_func_noret op_40b8_14_nf; +extern cpuop_func_noret op_40b8_14_ff; +extern cpuop_func_noret op_40b9_14_nf; +extern cpuop_func_noret op_40b9_14_ff; +extern cpuop_func_noret op_40c0_14_nf; +extern cpuop_func_noret op_40c0_14_ff; +extern cpuop_func_noret op_40d0_14_nf; +extern cpuop_func_noret op_40d0_14_ff; +extern cpuop_func_noret op_40d8_14_nf; +extern cpuop_func_noret op_40d8_14_ff; +extern cpuop_func_noret op_40e0_14_nf; +extern cpuop_func_noret op_40e0_14_ff; +extern cpuop_func_noret op_40e8_14_nf; +extern cpuop_func_noret op_40e8_14_ff; +extern cpuop_func_noret op_40f0_14_nf; +extern cpuop_func_noret op_40f0_14_ff; +extern cpuop_func_noret op_40f8_14_nf; +extern cpuop_func_noret op_40f8_14_ff; +extern cpuop_func_noret op_40f9_14_nf; +extern cpuop_func_noret op_40f9_14_ff; +extern cpuop_func_noret op_4180_14_nf; +extern cpuop_func_noret op_4180_14_ff; +extern cpuop_func_noret op_4190_14_nf; +extern cpuop_func_noret op_4190_14_ff; +extern cpuop_func_noret op_4198_14_nf; +extern cpuop_func_noret op_4198_14_ff; +extern cpuop_func_noret op_41a0_14_nf; +extern cpuop_func_noret op_41a0_14_ff; +extern cpuop_func_noret op_41a8_14_nf; +extern cpuop_func_noret op_41a8_14_ff; +extern cpuop_func_noret op_41b0_14_nf; +extern cpuop_func_noret op_41b0_14_ff; +extern cpuop_func_noret op_41b8_14_nf; +extern cpuop_func_noret op_41b8_14_ff; +extern cpuop_func_noret op_41b9_14_nf; +extern cpuop_func_noret op_41b9_14_ff; +extern cpuop_func_noret op_41ba_14_nf; +extern cpuop_func_noret op_41ba_14_ff; +extern cpuop_func_noret op_41bb_14_nf; +extern cpuop_func_noret op_41bb_14_ff; +extern cpuop_func_noret op_41bc_14_nf; +extern cpuop_func_noret op_41bc_14_ff; +extern cpuop_func_noret op_41d0_14_nf; +extern cpuop_func_noret op_41d0_14_ff; +extern cpuop_func_noret op_41e8_14_nf; +extern cpuop_func_noret op_41e8_14_ff; +extern cpuop_func_noret op_41f0_14_nf; +extern cpuop_func_noret op_41f0_14_ff; +extern cpuop_func_noret op_41f8_14_nf; +extern cpuop_func_noret op_41f8_14_ff; +extern cpuop_func_noret op_41f9_14_nf; +extern cpuop_func_noret op_41f9_14_ff; +extern cpuop_func_noret op_41fa_14_nf; +extern cpuop_func_noret op_41fa_14_ff; +extern cpuop_func_noret op_41fb_14_nf; +extern cpuop_func_noret op_41fb_14_ff; +extern cpuop_func_noret op_4200_14_nf; +extern cpuop_func_noret op_4200_14_ff; +extern cpuop_func_noret op_4210_14_nf; +extern cpuop_func_noret op_4210_14_ff; +extern cpuop_func_noret op_4218_14_nf; +extern cpuop_func_noret op_4218_14_ff; +extern cpuop_func_noret op_4220_14_nf; +extern cpuop_func_noret op_4220_14_ff; +extern cpuop_func_noret op_4228_14_nf; +extern cpuop_func_noret op_4228_14_ff; +extern cpuop_func_noret op_4230_14_nf; +extern cpuop_func_noret op_4230_14_ff; +extern cpuop_func_noret op_4238_14_nf; +extern cpuop_func_noret op_4238_14_ff; +extern cpuop_func_noret op_4239_14_nf; +extern cpuop_func_noret op_4239_14_ff; +extern cpuop_func_noret op_4240_14_nf; +extern cpuop_func_noret op_4240_14_ff; +extern cpuop_func_noret op_4250_14_nf; +extern cpuop_func_noret op_4250_14_ff; +extern cpuop_func_noret op_4258_14_nf; +extern cpuop_func_noret op_4258_14_ff; +extern cpuop_func_noret op_4260_14_nf; +extern cpuop_func_noret op_4260_14_ff; +extern cpuop_func_noret op_4268_14_nf; +extern cpuop_func_noret op_4268_14_ff; +extern cpuop_func_noret op_4270_14_nf; +extern cpuop_func_noret op_4270_14_ff; +extern cpuop_func_noret op_4278_14_nf; +extern cpuop_func_noret op_4278_14_ff; +extern cpuop_func_noret op_4279_14_nf; +extern cpuop_func_noret op_4279_14_ff; +extern cpuop_func_noret op_4280_14_nf; +extern cpuop_func_noret op_4280_14_ff; +extern cpuop_func_noret op_4290_14_nf; +extern cpuop_func_noret op_4290_14_ff; +extern cpuop_func_noret op_4298_14_nf; +extern cpuop_func_noret op_4298_14_ff; +extern cpuop_func_noret op_42a0_14_nf; +extern cpuop_func_noret op_42a0_14_ff; +extern cpuop_func_noret op_42a8_14_nf; +extern cpuop_func_noret op_42a8_14_ff; +extern cpuop_func_noret op_42b0_14_nf; +extern cpuop_func_noret op_42b0_14_ff; +extern cpuop_func_noret op_42b8_14_nf; +extern cpuop_func_noret op_42b8_14_ff; +extern cpuop_func_noret op_42b9_14_nf; +extern cpuop_func_noret op_42b9_14_ff; +extern cpuop_func_noret op_4400_14_nf; +extern cpuop_func_noret op_4400_14_ff; +extern cpuop_func_noret op_4410_14_nf; +extern cpuop_func_noret op_4410_14_ff; +extern cpuop_func_noret op_4418_14_nf; +extern cpuop_func_noret op_4418_14_ff; +extern cpuop_func_noret op_4420_14_nf; +extern cpuop_func_noret op_4420_14_ff; +extern cpuop_func_noret op_4428_14_nf; +extern cpuop_func_noret op_4428_14_ff; +extern cpuop_func_noret op_4430_14_nf; +extern cpuop_func_noret op_4430_14_ff; +extern cpuop_func_noret op_4438_14_nf; +extern cpuop_func_noret op_4438_14_ff; +extern cpuop_func_noret op_4439_14_nf; +extern cpuop_func_noret op_4439_14_ff; +extern cpuop_func_noret op_4440_14_nf; +extern cpuop_func_noret op_4440_14_ff; +extern cpuop_func_noret op_4450_14_nf; +extern cpuop_func_noret op_4450_14_ff; +extern cpuop_func_noret op_4458_14_nf; +extern cpuop_func_noret op_4458_14_ff; +extern cpuop_func_noret op_4460_14_nf; +extern cpuop_func_noret op_4460_14_ff; +extern cpuop_func_noret op_4468_14_nf; +extern cpuop_func_noret op_4468_14_ff; +extern cpuop_func_noret op_4470_14_nf; +extern cpuop_func_noret op_4470_14_ff; +extern cpuop_func_noret op_4478_14_nf; +extern cpuop_func_noret op_4478_14_ff; +extern cpuop_func_noret op_4479_14_nf; +extern cpuop_func_noret op_4479_14_ff; +extern cpuop_func_noret op_4480_14_nf; +extern cpuop_func_noret op_4480_14_ff; +extern cpuop_func_noret op_4490_14_nf; +extern cpuop_func_noret op_4490_14_ff; +extern cpuop_func_noret op_4498_14_nf; +extern cpuop_func_noret op_4498_14_ff; +extern cpuop_func_noret op_44a0_14_nf; +extern cpuop_func_noret op_44a0_14_ff; +extern cpuop_func_noret op_44a8_14_nf; +extern cpuop_func_noret op_44a8_14_ff; +extern cpuop_func_noret op_44b0_14_nf; +extern cpuop_func_noret op_44b0_14_ff; +extern cpuop_func_noret op_44b8_14_nf; +extern cpuop_func_noret op_44b8_14_ff; +extern cpuop_func_noret op_44b9_14_nf; +extern cpuop_func_noret op_44b9_14_ff; +extern cpuop_func_noret op_44c0_14_nf; +extern cpuop_func_noret op_44c0_14_ff; +extern cpuop_func_noret op_44d0_14_nf; +extern cpuop_func_noret op_44d0_14_ff; +extern cpuop_func_noret op_44d8_14_nf; +extern cpuop_func_noret op_44d8_14_ff; +extern cpuop_func_noret op_44e0_14_nf; +extern cpuop_func_noret op_44e0_14_ff; +extern cpuop_func_noret op_44e8_14_nf; +extern cpuop_func_noret op_44e8_14_ff; +extern cpuop_func_noret op_44f0_14_nf; +extern cpuop_func_noret op_44f0_14_ff; +extern cpuop_func_noret op_44f8_14_nf; +extern cpuop_func_noret op_44f8_14_ff; +extern cpuop_func_noret op_44f9_14_nf; +extern cpuop_func_noret op_44f9_14_ff; +extern cpuop_func_noret op_44fa_14_nf; +extern cpuop_func_noret op_44fa_14_ff; +extern cpuop_func_noret op_44fb_14_nf; +extern cpuop_func_noret op_44fb_14_ff; +extern cpuop_func_noret op_44fc_14_nf; +extern cpuop_func_noret op_44fc_14_ff; +extern cpuop_func_noret op_4600_14_nf; +extern cpuop_func_noret op_4600_14_ff; +extern cpuop_func_noret op_4610_14_nf; +extern cpuop_func_noret op_4610_14_ff; +extern cpuop_func_noret op_4618_14_nf; +extern cpuop_func_noret op_4618_14_ff; +extern cpuop_func_noret op_4620_14_nf; +extern cpuop_func_noret op_4620_14_ff; +extern cpuop_func_noret op_4628_14_nf; +extern cpuop_func_noret op_4628_14_ff; +extern cpuop_func_noret op_4630_14_nf; +extern cpuop_func_noret op_4630_14_ff; +extern cpuop_func_noret op_4638_14_nf; +extern cpuop_func_noret op_4638_14_ff; +extern cpuop_func_noret op_4639_14_nf; +extern cpuop_func_noret op_4639_14_ff; +extern cpuop_func_noret op_4640_14_nf; +extern cpuop_func_noret op_4640_14_ff; +extern cpuop_func_noret op_4650_14_nf; +extern cpuop_func_noret op_4650_14_ff; +extern cpuop_func_noret op_4658_14_nf; +extern cpuop_func_noret op_4658_14_ff; +extern cpuop_func_noret op_4660_14_nf; +extern cpuop_func_noret op_4660_14_ff; +extern cpuop_func_noret op_4668_14_nf; +extern cpuop_func_noret op_4668_14_ff; +extern cpuop_func_noret op_4670_14_nf; +extern cpuop_func_noret op_4670_14_ff; +extern cpuop_func_noret op_4678_14_nf; +extern cpuop_func_noret op_4678_14_ff; +extern cpuop_func_noret op_4679_14_nf; +extern cpuop_func_noret op_4679_14_ff; +extern cpuop_func_noret op_4680_14_nf; +extern cpuop_func_noret op_4680_14_ff; +extern cpuop_func_noret op_4690_14_nf; +extern cpuop_func_noret op_4690_14_ff; +extern cpuop_func_noret op_4698_14_nf; +extern cpuop_func_noret op_4698_14_ff; +extern cpuop_func_noret op_46a0_14_nf; +extern cpuop_func_noret op_46a0_14_ff; +extern cpuop_func_noret op_46a8_14_nf; +extern cpuop_func_noret op_46a8_14_ff; +extern cpuop_func_noret op_46b0_14_nf; +extern cpuop_func_noret op_46b0_14_ff; +extern cpuop_func_noret op_46b8_14_nf; +extern cpuop_func_noret op_46b8_14_ff; +extern cpuop_func_noret op_46b9_14_nf; +extern cpuop_func_noret op_46b9_14_ff; +extern cpuop_func_noret op_46c0_14_nf; +extern cpuop_func_noret op_46c0_14_ff; +extern cpuop_func_noret op_46d0_14_nf; +extern cpuop_func_noret op_46d0_14_ff; +extern cpuop_func_noret op_46d8_14_nf; +extern cpuop_func_noret op_46d8_14_ff; +extern cpuop_func_noret op_46e0_14_nf; +extern cpuop_func_noret op_46e0_14_ff; +extern cpuop_func_noret op_46e8_14_nf; +extern cpuop_func_noret op_46e8_14_ff; +extern cpuop_func_noret op_46f0_14_nf; +extern cpuop_func_noret op_46f0_14_ff; +extern cpuop_func_noret op_46f8_14_nf; +extern cpuop_func_noret op_46f8_14_ff; +extern cpuop_func_noret op_46f9_14_nf; +extern cpuop_func_noret op_46f9_14_ff; +extern cpuop_func_noret op_46fa_14_nf; +extern cpuop_func_noret op_46fa_14_ff; +extern cpuop_func_noret op_46fb_14_nf; +extern cpuop_func_noret op_46fb_14_ff; +extern cpuop_func_noret op_46fc_14_nf; +extern cpuop_func_noret op_46fc_14_ff; +extern cpuop_func_noret op_4800_14_nf; +extern cpuop_func_noret op_4800_14_ff; +extern cpuop_func_noret op_4810_14_nf; +extern cpuop_func_noret op_4810_14_ff; +extern cpuop_func_noret op_4818_14_nf; +extern cpuop_func_noret op_4818_14_ff; +extern cpuop_func_noret op_4820_14_nf; +extern cpuop_func_noret op_4820_14_ff; +extern cpuop_func_noret op_4828_14_nf; +extern cpuop_func_noret op_4828_14_ff; +extern cpuop_func_noret op_4830_14_nf; +extern cpuop_func_noret op_4830_14_ff; +extern cpuop_func_noret op_4838_14_nf; +extern cpuop_func_noret op_4838_14_ff; +extern cpuop_func_noret op_4839_14_nf; +extern cpuop_func_noret op_4839_14_ff; +extern cpuop_func_noret op_4840_14_nf; +extern cpuop_func_noret op_4840_14_ff; +extern cpuop_func_noret op_4850_14_nf; +extern cpuop_func_noret op_4850_14_ff; +extern cpuop_func_noret op_4868_14_nf; +extern cpuop_func_noret op_4868_14_ff; +extern cpuop_func_noret op_4870_14_nf; +extern cpuop_func_noret op_4870_14_ff; +extern cpuop_func_noret op_4878_14_nf; +extern cpuop_func_noret op_4878_14_ff; +extern cpuop_func_noret op_4879_14_nf; +extern cpuop_func_noret op_4879_14_ff; +extern cpuop_func_noret op_487a_14_nf; +extern cpuop_func_noret op_487a_14_ff; +extern cpuop_func_noret op_487b_14_nf; +extern cpuop_func_noret op_487b_14_ff; +extern cpuop_func_noret op_4880_14_nf; +extern cpuop_func_noret op_4880_14_ff; +extern cpuop_func_noret op_4890_14_nf; +extern cpuop_func_noret op_4890_14_ff; +extern cpuop_func_noret op_48a0_14_nf; +extern cpuop_func_noret op_48a0_14_ff; +extern cpuop_func_noret op_48a8_14_nf; +extern cpuop_func_noret op_48a8_14_ff; +extern cpuop_func_noret op_48b0_14_nf; +extern cpuop_func_noret op_48b0_14_ff; +extern cpuop_func_noret op_48b8_14_nf; +extern cpuop_func_noret op_48b8_14_ff; +extern cpuop_func_noret op_48b9_14_nf; +extern cpuop_func_noret op_48b9_14_ff; +extern cpuop_func_noret op_48c0_14_nf; +extern cpuop_func_noret op_48c0_14_ff; +extern cpuop_func_noret op_48d0_14_nf; +extern cpuop_func_noret op_48d0_14_ff; +extern cpuop_func_noret op_48e0_14_nf; +extern cpuop_func_noret op_48e0_14_ff; +extern cpuop_func_noret op_48e8_14_nf; +extern cpuop_func_noret op_48e8_14_ff; +extern cpuop_func_noret op_48f0_14_nf; +extern cpuop_func_noret op_48f0_14_ff; +extern cpuop_func_noret op_48f8_14_nf; +extern cpuop_func_noret op_48f8_14_ff; +extern cpuop_func_noret op_48f9_14_nf; +extern cpuop_func_noret op_48f9_14_ff; +extern cpuop_func_noret op_4a00_14_nf; +extern cpuop_func_noret op_4a00_14_ff; +extern cpuop_func_noret op_4a10_14_nf; +extern cpuop_func_noret op_4a10_14_ff; +extern cpuop_func_noret op_4a18_14_nf; +extern cpuop_func_noret op_4a18_14_ff; +extern cpuop_func_noret op_4a20_14_nf; +extern cpuop_func_noret op_4a20_14_ff; +extern cpuop_func_noret op_4a28_14_nf; +extern cpuop_func_noret op_4a28_14_ff; +extern cpuop_func_noret op_4a30_14_nf; +extern cpuop_func_noret op_4a30_14_ff; +extern cpuop_func_noret op_4a38_14_nf; +extern cpuop_func_noret op_4a38_14_ff; +extern cpuop_func_noret op_4a39_14_nf; +extern cpuop_func_noret op_4a39_14_ff; +extern cpuop_func_noret op_4a40_14_nf; +extern cpuop_func_noret op_4a40_14_ff; +extern cpuop_func_noret op_4a50_14_nf; +extern cpuop_func_noret op_4a50_14_ff; +extern cpuop_func_noret op_4a58_14_nf; +extern cpuop_func_noret op_4a58_14_ff; +extern cpuop_func_noret op_4a60_14_nf; +extern cpuop_func_noret op_4a60_14_ff; +extern cpuop_func_noret op_4a68_14_nf; +extern cpuop_func_noret op_4a68_14_ff; +extern cpuop_func_noret op_4a70_14_nf; +extern cpuop_func_noret op_4a70_14_ff; +extern cpuop_func_noret op_4a78_14_nf; +extern cpuop_func_noret op_4a78_14_ff; +extern cpuop_func_noret op_4a79_14_nf; +extern cpuop_func_noret op_4a79_14_ff; +extern cpuop_func_noret op_4a80_14_nf; +extern cpuop_func_noret op_4a80_14_ff; +extern cpuop_func_noret op_4a90_14_nf; +extern cpuop_func_noret op_4a90_14_ff; +extern cpuop_func_noret op_4a98_14_nf; +extern cpuop_func_noret op_4a98_14_ff; +extern cpuop_func_noret op_4aa0_14_nf; +extern cpuop_func_noret op_4aa0_14_ff; +extern cpuop_func_noret op_4aa8_14_nf; +extern cpuop_func_noret op_4aa8_14_ff; +extern cpuop_func_noret op_4ab0_14_nf; +extern cpuop_func_noret op_4ab0_14_ff; +extern cpuop_func_noret op_4ab8_14_nf; +extern cpuop_func_noret op_4ab8_14_ff; +extern cpuop_func_noret op_4ab9_14_nf; +extern cpuop_func_noret op_4ab9_14_ff; +extern cpuop_func_noret op_4ac0_14_nf; +extern cpuop_func_noret op_4ac0_14_ff; +extern cpuop_func_noret op_4ad0_14_nf; +extern cpuop_func_noret op_4ad0_14_ff; +extern cpuop_func_noret op_4ad8_14_nf; +extern cpuop_func_noret op_4ad8_14_ff; +extern cpuop_func_noret op_4ae0_14_nf; +extern cpuop_func_noret op_4ae0_14_ff; +extern cpuop_func_noret op_4ae8_14_nf; +extern cpuop_func_noret op_4ae8_14_ff; +extern cpuop_func_noret op_4af0_14_nf; +extern cpuop_func_noret op_4af0_14_ff; +extern cpuop_func_noret op_4af8_14_nf; +extern cpuop_func_noret op_4af8_14_ff; +extern cpuop_func_noret op_4af9_14_nf; +extern cpuop_func_noret op_4af9_14_ff; +extern cpuop_func_noret op_4c90_14_nf; +extern cpuop_func_noret op_4c90_14_ff; +extern cpuop_func_noret op_4c98_14_nf; +extern cpuop_func_noret op_4c98_14_ff; +extern cpuop_func_noret op_4ca8_14_nf; +extern cpuop_func_noret op_4ca8_14_ff; +extern cpuop_func_noret op_4cb0_14_nf; +extern cpuop_func_noret op_4cb0_14_ff; +extern cpuop_func_noret op_4cb8_14_nf; +extern cpuop_func_noret op_4cb8_14_ff; +extern cpuop_func_noret op_4cb9_14_nf; +extern cpuop_func_noret op_4cb9_14_ff; +extern cpuop_func_noret op_4cba_14_nf; +extern cpuop_func_noret op_4cba_14_ff; +extern cpuop_func_noret op_4cbb_14_nf; +extern cpuop_func_noret op_4cbb_14_ff; +extern cpuop_func_noret op_4cd0_14_nf; +extern cpuop_func_noret op_4cd0_14_ff; +extern cpuop_func_noret op_4cd8_14_nf; +extern cpuop_func_noret op_4cd8_14_ff; +extern cpuop_func_noret op_4ce8_14_nf; +extern cpuop_func_noret op_4ce8_14_ff; +extern cpuop_func_noret op_4cf0_14_nf; +extern cpuop_func_noret op_4cf0_14_ff; +extern cpuop_func_noret op_4cf8_14_nf; +extern cpuop_func_noret op_4cf8_14_ff; +extern cpuop_func_noret op_4cf9_14_nf; +extern cpuop_func_noret op_4cf9_14_ff; +extern cpuop_func_noret op_4cfa_14_nf; +extern cpuop_func_noret op_4cfa_14_ff; +extern cpuop_func_noret op_4cfb_14_nf; +extern cpuop_func_noret op_4cfb_14_ff; +extern cpuop_func_noret op_4e50_14_nf; +extern cpuop_func_noret op_4e50_14_ff; +extern cpuop_func_noret op_4e58_14_nf; +extern cpuop_func_noret op_4e58_14_ff; +extern cpuop_func_noret op_4e60_14_nf; +extern cpuop_func_noret op_4e60_14_ff; +extern cpuop_func_noret op_4e68_14_nf; +extern cpuop_func_noret op_4e68_14_ff; +extern cpuop_func_noret op_4e70_14_nf; +extern cpuop_func_noret op_4e70_14_ff; +extern cpuop_func_noret op_4e71_14_nf; +extern cpuop_func_noret op_4e71_14_ff; +extern cpuop_func_noret op_4e72_14_nf; +extern cpuop_func_noret op_4e72_14_ff; +extern cpuop_func_noret op_4e73_14_nf; +extern cpuop_func_noret op_4e73_14_ff; +extern cpuop_func_noret op_4e75_14_nf; +extern cpuop_func_noret op_4e75_14_ff; +extern cpuop_func_noret op_4e76_14_nf; +extern cpuop_func_noret op_4e76_14_ff; +extern cpuop_func_noret op_4e77_14_nf; +extern cpuop_func_noret op_4e77_14_ff; +extern cpuop_func_noret op_4e90_14_nf; +extern cpuop_func_noret op_4e90_14_ff; +extern cpuop_func_noret op_4ea8_14_nf; +extern cpuop_func_noret op_4ea8_14_ff; +extern cpuop_func_noret op_4eb0_14_nf; +extern cpuop_func_noret op_4eb0_14_ff; +extern cpuop_func_noret op_4eb8_14_nf; +extern cpuop_func_noret op_4eb8_14_ff; +extern cpuop_func_noret op_4eb9_14_nf; +extern cpuop_func_noret op_4eb9_14_ff; +extern cpuop_func_noret op_4eba_14_nf; +extern cpuop_func_noret op_4eba_14_ff; +extern cpuop_func_noret op_4ebb_14_nf; +extern cpuop_func_noret op_4ebb_14_ff; +extern cpuop_func_noret op_4ed0_14_nf; +extern cpuop_func_noret op_4ed0_14_ff; +extern cpuop_func_noret op_4ee8_14_nf; +extern cpuop_func_noret op_4ee8_14_ff; +extern cpuop_func_noret op_4ef0_14_nf; +extern cpuop_func_noret op_4ef0_14_ff; +extern cpuop_func_noret op_4ef8_14_nf; +extern cpuop_func_noret op_4ef8_14_ff; +extern cpuop_func_noret op_4ef9_14_nf; +extern cpuop_func_noret op_4ef9_14_ff; +extern cpuop_func_noret op_4efa_14_nf; +extern cpuop_func_noret op_4efa_14_ff; +extern cpuop_func_noret op_4efb_14_nf; +extern cpuop_func_noret op_4efb_14_ff; +extern cpuop_func_noret op_5000_14_nf; +extern cpuop_func_noret op_5000_14_ff; +extern cpuop_func_noret op_5010_14_nf; +extern cpuop_func_noret op_5010_14_ff; +extern cpuop_func_noret op_5018_14_nf; +extern cpuop_func_noret op_5018_14_ff; +extern cpuop_func_noret op_5020_14_nf; +extern cpuop_func_noret op_5020_14_ff; +extern cpuop_func_noret op_5028_14_nf; +extern cpuop_func_noret op_5028_14_ff; +extern cpuop_func_noret op_5030_14_nf; +extern cpuop_func_noret op_5030_14_ff; +extern cpuop_func_noret op_5038_14_nf; +extern cpuop_func_noret op_5038_14_ff; +extern cpuop_func_noret op_5039_14_nf; +extern cpuop_func_noret op_5039_14_ff; +extern cpuop_func_noret op_5040_14_nf; +extern cpuop_func_noret op_5040_14_ff; +extern cpuop_func_noret op_5048_14_nf; +extern cpuop_func_noret op_5048_14_ff; +extern cpuop_func_noret op_5050_14_nf; +extern cpuop_func_noret op_5050_14_ff; +extern cpuop_func_noret op_5058_14_nf; +extern cpuop_func_noret op_5058_14_ff; +extern cpuop_func_noret op_5060_14_nf; +extern cpuop_func_noret op_5060_14_ff; +extern cpuop_func_noret op_5068_14_nf; +extern cpuop_func_noret op_5068_14_ff; +extern cpuop_func_noret op_5070_14_nf; +extern cpuop_func_noret op_5070_14_ff; +extern cpuop_func_noret op_5078_14_nf; +extern cpuop_func_noret op_5078_14_ff; +extern cpuop_func_noret op_5079_14_nf; +extern cpuop_func_noret op_5079_14_ff; +extern cpuop_func_noret op_5080_14_nf; +extern cpuop_func_noret op_5080_14_ff; +extern cpuop_func_noret op_5088_14_nf; +extern cpuop_func_noret op_5088_14_ff; +extern cpuop_func_noret op_5090_14_nf; +extern cpuop_func_noret op_5090_14_ff; +extern cpuop_func_noret op_5098_14_nf; +extern cpuop_func_noret op_5098_14_ff; +extern cpuop_func_noret op_50a0_14_nf; +extern cpuop_func_noret op_50a0_14_ff; +extern cpuop_func_noret op_50a8_14_nf; +extern cpuop_func_noret op_50a8_14_ff; +extern cpuop_func_noret op_50b0_14_nf; +extern cpuop_func_noret op_50b0_14_ff; +extern cpuop_func_noret op_50b8_14_nf; +extern cpuop_func_noret op_50b8_14_ff; +extern cpuop_func_noret op_50b9_14_nf; +extern cpuop_func_noret op_50b9_14_ff; +extern cpuop_func_noret op_50c0_14_nf; +extern cpuop_func_noret op_50c0_14_ff; +extern cpuop_func_noret op_50c8_14_nf; +extern cpuop_func_noret op_50c8_14_ff; +extern cpuop_func_noret op_50d0_14_nf; +extern cpuop_func_noret op_50d0_14_ff; +extern cpuop_func_noret op_50d8_14_nf; +extern cpuop_func_noret op_50d8_14_ff; +extern cpuop_func_noret op_50e0_14_nf; +extern cpuop_func_noret op_50e0_14_ff; +extern cpuop_func_noret op_50e8_14_nf; +extern cpuop_func_noret op_50e8_14_ff; +extern cpuop_func_noret op_50f0_14_nf; +extern cpuop_func_noret op_50f0_14_ff; +extern cpuop_func_noret op_50f8_14_nf; +extern cpuop_func_noret op_50f8_14_ff; +extern cpuop_func_noret op_50f9_14_nf; +extern cpuop_func_noret op_50f9_14_ff; +extern cpuop_func_noret op_5100_14_nf; +extern cpuop_func_noret op_5100_14_ff; +extern cpuop_func_noret op_5110_14_nf; +extern cpuop_func_noret op_5110_14_ff; +extern cpuop_func_noret op_5118_14_nf; +extern cpuop_func_noret op_5118_14_ff; +extern cpuop_func_noret op_5120_14_nf; +extern cpuop_func_noret op_5120_14_ff; +extern cpuop_func_noret op_5128_14_nf; +extern cpuop_func_noret op_5128_14_ff; +extern cpuop_func_noret op_5130_14_nf; +extern cpuop_func_noret op_5130_14_ff; +extern cpuop_func_noret op_5138_14_nf; +extern cpuop_func_noret op_5138_14_ff; +extern cpuop_func_noret op_5139_14_nf; +extern cpuop_func_noret op_5139_14_ff; +extern cpuop_func_noret op_5140_14_nf; +extern cpuop_func_noret op_5140_14_ff; +extern cpuop_func_noret op_5148_14_nf; +extern cpuop_func_noret op_5148_14_ff; +extern cpuop_func_noret op_5150_14_nf; +extern cpuop_func_noret op_5150_14_ff; +extern cpuop_func_noret op_5158_14_nf; +extern cpuop_func_noret op_5158_14_ff; +extern cpuop_func_noret op_5160_14_nf; +extern cpuop_func_noret op_5160_14_ff; +extern cpuop_func_noret op_5168_14_nf; +extern cpuop_func_noret op_5168_14_ff; +extern cpuop_func_noret op_5170_14_nf; +extern cpuop_func_noret op_5170_14_ff; +extern cpuop_func_noret op_5178_14_nf; +extern cpuop_func_noret op_5178_14_ff; +extern cpuop_func_noret op_5179_14_nf; +extern cpuop_func_noret op_5179_14_ff; +extern cpuop_func_noret op_5180_14_nf; +extern cpuop_func_noret op_5180_14_ff; +extern cpuop_func_noret op_5188_14_nf; +extern cpuop_func_noret op_5188_14_ff; +extern cpuop_func_noret op_5190_14_nf; +extern cpuop_func_noret op_5190_14_ff; +extern cpuop_func_noret op_5198_14_nf; +extern cpuop_func_noret op_5198_14_ff; +extern cpuop_func_noret op_51a0_14_nf; +extern cpuop_func_noret op_51a0_14_ff; +extern cpuop_func_noret op_51a8_14_nf; +extern cpuop_func_noret op_51a8_14_ff; +extern cpuop_func_noret op_51b0_14_nf; +extern cpuop_func_noret op_51b0_14_ff; +extern cpuop_func_noret op_51b8_14_nf; +extern cpuop_func_noret op_51b8_14_ff; +extern cpuop_func_noret op_51b9_14_nf; +extern cpuop_func_noret op_51b9_14_ff; +extern cpuop_func_noret op_51c0_14_nf; +extern cpuop_func_noret op_51c0_14_ff; +extern cpuop_func_noret op_51c8_14_nf; +extern cpuop_func_noret op_51c8_14_ff; +extern cpuop_func_noret op_51d0_14_nf; +extern cpuop_func_noret op_51d0_14_ff; +extern cpuop_func_noret op_51d8_14_nf; +extern cpuop_func_noret op_51d8_14_ff; +extern cpuop_func_noret op_51e0_14_nf; +extern cpuop_func_noret op_51e0_14_ff; +extern cpuop_func_noret op_51e8_14_nf; +extern cpuop_func_noret op_51e8_14_ff; +extern cpuop_func_noret op_51f0_14_nf; +extern cpuop_func_noret op_51f0_14_ff; +extern cpuop_func_noret op_51f8_14_nf; +extern cpuop_func_noret op_51f8_14_ff; +extern cpuop_func_noret op_51f9_14_nf; +extern cpuop_func_noret op_51f9_14_ff; +extern cpuop_func_noret op_52c0_14_nf; +extern cpuop_func_noret op_52c0_14_ff; +extern cpuop_func_noret op_52c8_14_nf; +extern cpuop_func_noret op_52c8_14_ff; +extern cpuop_func_noret op_52d0_14_nf; +extern cpuop_func_noret op_52d0_14_ff; +extern cpuop_func_noret op_52d8_14_nf; +extern cpuop_func_noret op_52d8_14_ff; +extern cpuop_func_noret op_52e0_14_nf; +extern cpuop_func_noret op_52e0_14_ff; +extern cpuop_func_noret op_52e8_14_nf; +extern cpuop_func_noret op_52e8_14_ff; +extern cpuop_func_noret op_52f0_14_nf; +extern cpuop_func_noret op_52f0_14_ff; +extern cpuop_func_noret op_52f8_14_nf; +extern cpuop_func_noret op_52f8_14_ff; +extern cpuop_func_noret op_52f9_14_nf; +extern cpuop_func_noret op_52f9_14_ff; +extern cpuop_func_noret op_53c0_14_nf; +extern cpuop_func_noret op_53c0_14_ff; +extern cpuop_func_noret op_53c8_14_nf; +extern cpuop_func_noret op_53c8_14_ff; +extern cpuop_func_noret op_53d0_14_nf; +extern cpuop_func_noret op_53d0_14_ff; +extern cpuop_func_noret op_53d8_14_nf; +extern cpuop_func_noret op_53d8_14_ff; +extern cpuop_func_noret op_53e0_14_nf; +extern cpuop_func_noret op_53e0_14_ff; +extern cpuop_func_noret op_53e8_14_nf; +extern cpuop_func_noret op_53e8_14_ff; +extern cpuop_func_noret op_53f0_14_nf; +extern cpuop_func_noret op_53f0_14_ff; +extern cpuop_func_noret op_53f8_14_nf; +extern cpuop_func_noret op_53f8_14_ff; +extern cpuop_func_noret op_53f9_14_nf; +extern cpuop_func_noret op_53f9_14_ff; +extern cpuop_func_noret op_54c0_14_nf; +extern cpuop_func_noret op_54c0_14_ff; +extern cpuop_func_noret op_54c8_14_nf; +extern cpuop_func_noret op_54c8_14_ff; +extern cpuop_func_noret op_54d0_14_nf; +extern cpuop_func_noret op_54d0_14_ff; +extern cpuop_func_noret op_54d8_14_nf; +extern cpuop_func_noret op_54d8_14_ff; +extern cpuop_func_noret op_54e0_14_nf; +extern cpuop_func_noret op_54e0_14_ff; +extern cpuop_func_noret op_54e8_14_nf; +extern cpuop_func_noret op_54e8_14_ff; +extern cpuop_func_noret op_54f0_14_nf; +extern cpuop_func_noret op_54f0_14_ff; +extern cpuop_func_noret op_54f8_14_nf; +extern cpuop_func_noret op_54f8_14_ff; +extern cpuop_func_noret op_54f9_14_nf; +extern cpuop_func_noret op_54f9_14_ff; +extern cpuop_func_noret op_55c0_14_nf; +extern cpuop_func_noret op_55c0_14_ff; +extern cpuop_func_noret op_55c8_14_nf; +extern cpuop_func_noret op_55c8_14_ff; +extern cpuop_func_noret op_55d0_14_nf; +extern cpuop_func_noret op_55d0_14_ff; +extern cpuop_func_noret op_55d8_14_nf; +extern cpuop_func_noret op_55d8_14_ff; +extern cpuop_func_noret op_55e0_14_nf; +extern cpuop_func_noret op_55e0_14_ff; +extern cpuop_func_noret op_55e8_14_nf; +extern cpuop_func_noret op_55e8_14_ff; +extern cpuop_func_noret op_55f0_14_nf; +extern cpuop_func_noret op_55f0_14_ff; +extern cpuop_func_noret op_55f8_14_nf; +extern cpuop_func_noret op_55f8_14_ff; +extern cpuop_func_noret op_55f9_14_nf; +extern cpuop_func_noret op_55f9_14_ff; +extern cpuop_func_noret op_56c0_14_nf; +extern cpuop_func_noret op_56c0_14_ff; +extern cpuop_func_noret op_56c8_14_nf; +extern cpuop_func_noret op_56c8_14_ff; +extern cpuop_func_noret op_56d0_14_nf; +extern cpuop_func_noret op_56d0_14_ff; +extern cpuop_func_noret op_56d8_14_nf; +extern cpuop_func_noret op_56d8_14_ff; +extern cpuop_func_noret op_56e0_14_nf; +extern cpuop_func_noret op_56e0_14_ff; +extern cpuop_func_noret op_56e8_14_nf; +extern cpuop_func_noret op_56e8_14_ff; +extern cpuop_func_noret op_56f0_14_nf; +extern cpuop_func_noret op_56f0_14_ff; +extern cpuop_func_noret op_56f8_14_nf; +extern cpuop_func_noret op_56f8_14_ff; +extern cpuop_func_noret op_56f9_14_nf; +extern cpuop_func_noret op_56f9_14_ff; +extern cpuop_func_noret op_57c0_14_nf; +extern cpuop_func_noret op_57c0_14_ff; +extern cpuop_func_noret op_57c8_14_nf; +extern cpuop_func_noret op_57c8_14_ff; +extern cpuop_func_noret op_57d0_14_nf; +extern cpuop_func_noret op_57d0_14_ff; +extern cpuop_func_noret op_57d8_14_nf; +extern cpuop_func_noret op_57d8_14_ff; +extern cpuop_func_noret op_57e0_14_nf; +extern cpuop_func_noret op_57e0_14_ff; +extern cpuop_func_noret op_57e8_14_nf; +extern cpuop_func_noret op_57e8_14_ff; +extern cpuop_func_noret op_57f0_14_nf; +extern cpuop_func_noret op_57f0_14_ff; +extern cpuop_func_noret op_57f8_14_nf; +extern cpuop_func_noret op_57f8_14_ff; +extern cpuop_func_noret op_57f9_14_nf; +extern cpuop_func_noret op_57f9_14_ff; +extern cpuop_func_noret op_58c0_14_nf; +extern cpuop_func_noret op_58c0_14_ff; +extern cpuop_func_noret op_58c8_14_nf; +extern cpuop_func_noret op_58c8_14_ff; +extern cpuop_func_noret op_58d0_14_nf; +extern cpuop_func_noret op_58d0_14_ff; +extern cpuop_func_noret op_58d8_14_nf; +extern cpuop_func_noret op_58d8_14_ff; +extern cpuop_func_noret op_58e0_14_nf; +extern cpuop_func_noret op_58e0_14_ff; +extern cpuop_func_noret op_58e8_14_nf; +extern cpuop_func_noret op_58e8_14_ff; +extern cpuop_func_noret op_58f0_14_nf; +extern cpuop_func_noret op_58f0_14_ff; +extern cpuop_func_noret op_58f8_14_nf; +extern cpuop_func_noret op_58f8_14_ff; +extern cpuop_func_noret op_58f9_14_nf; +extern cpuop_func_noret op_58f9_14_ff; +extern cpuop_func_noret op_59c0_14_nf; +extern cpuop_func_noret op_59c0_14_ff; +extern cpuop_func_noret op_59c8_14_nf; +extern cpuop_func_noret op_59c8_14_ff; +extern cpuop_func_noret op_59d0_14_nf; +extern cpuop_func_noret op_59d0_14_ff; +extern cpuop_func_noret op_59d8_14_nf; +extern cpuop_func_noret op_59d8_14_ff; +extern cpuop_func_noret op_59e0_14_nf; +extern cpuop_func_noret op_59e0_14_ff; +extern cpuop_func_noret op_59e8_14_nf; +extern cpuop_func_noret op_59e8_14_ff; +extern cpuop_func_noret op_59f0_14_nf; +extern cpuop_func_noret op_59f0_14_ff; +extern cpuop_func_noret op_59f8_14_nf; +extern cpuop_func_noret op_59f8_14_ff; +extern cpuop_func_noret op_59f9_14_nf; +extern cpuop_func_noret op_59f9_14_ff; +extern cpuop_func_noret op_5ac0_14_nf; +extern cpuop_func_noret op_5ac0_14_ff; +extern cpuop_func_noret op_5ac8_14_nf; +extern cpuop_func_noret op_5ac8_14_ff; +extern cpuop_func_noret op_5ad0_14_nf; +extern cpuop_func_noret op_5ad0_14_ff; +extern cpuop_func_noret op_5ad8_14_nf; +extern cpuop_func_noret op_5ad8_14_ff; +extern cpuop_func_noret op_5ae0_14_nf; +extern cpuop_func_noret op_5ae0_14_ff; +extern cpuop_func_noret op_5ae8_14_nf; +extern cpuop_func_noret op_5ae8_14_ff; +extern cpuop_func_noret op_5af0_14_nf; +extern cpuop_func_noret op_5af0_14_ff; +extern cpuop_func_noret op_5af8_14_nf; +extern cpuop_func_noret op_5af8_14_ff; +extern cpuop_func_noret op_5af9_14_nf; +extern cpuop_func_noret op_5af9_14_ff; +extern cpuop_func_noret op_5bc0_14_nf; +extern cpuop_func_noret op_5bc0_14_ff; +extern cpuop_func_noret op_5bc8_14_nf; +extern cpuop_func_noret op_5bc8_14_ff; +extern cpuop_func_noret op_5bd0_14_nf; +extern cpuop_func_noret op_5bd0_14_ff; +extern cpuop_func_noret op_5bd8_14_nf; +extern cpuop_func_noret op_5bd8_14_ff; +extern cpuop_func_noret op_5be0_14_nf; +extern cpuop_func_noret op_5be0_14_ff; +extern cpuop_func_noret op_5be8_14_nf; +extern cpuop_func_noret op_5be8_14_ff; +extern cpuop_func_noret op_5bf0_14_nf; +extern cpuop_func_noret op_5bf0_14_ff; +extern cpuop_func_noret op_5bf8_14_nf; +extern cpuop_func_noret op_5bf8_14_ff; +extern cpuop_func_noret op_5bf9_14_nf; +extern cpuop_func_noret op_5bf9_14_ff; +extern cpuop_func_noret op_5cc0_14_nf; +extern cpuop_func_noret op_5cc0_14_ff; +extern cpuop_func_noret op_5cc8_14_nf; +extern cpuop_func_noret op_5cc8_14_ff; +extern cpuop_func_noret op_5cd0_14_nf; +extern cpuop_func_noret op_5cd0_14_ff; +extern cpuop_func_noret op_5cd8_14_nf; +extern cpuop_func_noret op_5cd8_14_ff; +extern cpuop_func_noret op_5ce0_14_nf; +extern cpuop_func_noret op_5ce0_14_ff; +extern cpuop_func_noret op_5ce8_14_nf; +extern cpuop_func_noret op_5ce8_14_ff; +extern cpuop_func_noret op_5cf0_14_nf; +extern cpuop_func_noret op_5cf0_14_ff; +extern cpuop_func_noret op_5cf8_14_nf; +extern cpuop_func_noret op_5cf8_14_ff; +extern cpuop_func_noret op_5cf9_14_nf; +extern cpuop_func_noret op_5cf9_14_ff; +extern cpuop_func_noret op_5dc0_14_nf; +extern cpuop_func_noret op_5dc0_14_ff; +extern cpuop_func_noret op_5dc8_14_nf; +extern cpuop_func_noret op_5dc8_14_ff; +extern cpuop_func_noret op_5dd0_14_nf; +extern cpuop_func_noret op_5dd0_14_ff; +extern cpuop_func_noret op_5dd8_14_nf; +extern cpuop_func_noret op_5dd8_14_ff; +extern cpuop_func_noret op_5de0_14_nf; +extern cpuop_func_noret op_5de0_14_ff; +extern cpuop_func_noret op_5de8_14_nf; +extern cpuop_func_noret op_5de8_14_ff; +extern cpuop_func_noret op_5df0_14_nf; +extern cpuop_func_noret op_5df0_14_ff; +extern cpuop_func_noret op_5df8_14_nf; +extern cpuop_func_noret op_5df8_14_ff; +extern cpuop_func_noret op_5df9_14_nf; +extern cpuop_func_noret op_5df9_14_ff; +extern cpuop_func_noret op_5ec0_14_nf; +extern cpuop_func_noret op_5ec0_14_ff; +extern cpuop_func_noret op_5ec8_14_nf; +extern cpuop_func_noret op_5ec8_14_ff; +extern cpuop_func_noret op_5ed0_14_nf; +extern cpuop_func_noret op_5ed0_14_ff; +extern cpuop_func_noret op_5ed8_14_nf; +extern cpuop_func_noret op_5ed8_14_ff; +extern cpuop_func_noret op_5ee0_14_nf; +extern cpuop_func_noret op_5ee0_14_ff; +extern cpuop_func_noret op_5ee8_14_nf; +extern cpuop_func_noret op_5ee8_14_ff; +extern cpuop_func_noret op_5ef0_14_nf; +extern cpuop_func_noret op_5ef0_14_ff; +extern cpuop_func_noret op_5ef8_14_nf; +extern cpuop_func_noret op_5ef8_14_ff; +extern cpuop_func_noret op_5ef9_14_nf; +extern cpuop_func_noret op_5ef9_14_ff; +extern cpuop_func_noret op_5fc0_14_nf; +extern cpuop_func_noret op_5fc0_14_ff; +extern cpuop_func_noret op_5fc8_14_nf; +extern cpuop_func_noret op_5fc8_14_ff; +extern cpuop_func_noret op_5fd0_14_nf; +extern cpuop_func_noret op_5fd0_14_ff; +extern cpuop_func_noret op_5fd8_14_nf; +extern cpuop_func_noret op_5fd8_14_ff; +extern cpuop_func_noret op_5fe0_14_nf; +extern cpuop_func_noret op_5fe0_14_ff; +extern cpuop_func_noret op_5fe8_14_nf; +extern cpuop_func_noret op_5fe8_14_ff; +extern cpuop_func_noret op_5ff0_14_nf; +extern cpuop_func_noret op_5ff0_14_ff; +extern cpuop_func_noret op_5ff8_14_nf; +extern cpuop_func_noret op_5ff8_14_ff; +extern cpuop_func_noret op_5ff9_14_nf; +extern cpuop_func_noret op_5ff9_14_ff; +extern cpuop_func_noret op_6000_14_nf; +extern cpuop_func_noret op_6000_14_ff; +extern cpuop_func_noret op_6001_14_nf; +extern cpuop_func_noret op_6001_14_ff; +extern cpuop_func_noret op_60ff_14_nf; +extern cpuop_func_noret op_60ff_14_ff; +extern cpuop_func_noret op_6100_14_nf; +extern cpuop_func_noret op_6100_14_ff; +extern cpuop_func_noret op_6101_14_nf; +extern cpuop_func_noret op_6101_14_ff; +extern cpuop_func_noret op_61ff_14_nf; +extern cpuop_func_noret op_61ff_14_ff; +extern cpuop_func_noret op_6200_14_nf; +extern cpuop_func_noret op_6200_14_ff; +extern cpuop_func_noret op_6201_14_nf; +extern cpuop_func_noret op_6201_14_ff; +extern cpuop_func_noret op_62ff_14_nf; +extern cpuop_func_noret op_62ff_14_ff; +extern cpuop_func_noret op_6300_14_nf; +extern cpuop_func_noret op_6300_14_ff; +extern cpuop_func_noret op_6301_14_nf; +extern cpuop_func_noret op_6301_14_ff; +extern cpuop_func_noret op_63ff_14_nf; +extern cpuop_func_noret op_63ff_14_ff; +extern cpuop_func_noret op_6400_14_nf; +extern cpuop_func_noret op_6400_14_ff; +extern cpuop_func_noret op_6401_14_nf; +extern cpuop_func_noret op_6401_14_ff; +extern cpuop_func_noret op_64ff_14_nf; +extern cpuop_func_noret op_64ff_14_ff; +extern cpuop_func_noret op_6500_14_nf; +extern cpuop_func_noret op_6500_14_ff; +extern cpuop_func_noret op_6501_14_nf; +extern cpuop_func_noret op_6501_14_ff; +extern cpuop_func_noret op_65ff_14_nf; +extern cpuop_func_noret op_65ff_14_ff; +extern cpuop_func_noret op_6600_14_nf; +extern cpuop_func_noret op_6600_14_ff; +extern cpuop_func_noret op_6601_14_nf; +extern cpuop_func_noret op_6601_14_ff; +extern cpuop_func_noret op_66ff_14_nf; +extern cpuop_func_noret op_66ff_14_ff; +extern cpuop_func_noret op_6700_14_nf; +extern cpuop_func_noret op_6700_14_ff; +extern cpuop_func_noret op_6701_14_nf; +extern cpuop_func_noret op_6701_14_ff; +extern cpuop_func_noret op_67ff_14_nf; +extern cpuop_func_noret op_67ff_14_ff; +extern cpuop_func_noret op_6800_14_nf; +extern cpuop_func_noret op_6800_14_ff; +extern cpuop_func_noret op_6801_14_nf; +extern cpuop_func_noret op_6801_14_ff; +extern cpuop_func_noret op_68ff_14_nf; +extern cpuop_func_noret op_68ff_14_ff; +extern cpuop_func_noret op_6900_14_nf; +extern cpuop_func_noret op_6900_14_ff; +extern cpuop_func_noret op_6901_14_nf; +extern cpuop_func_noret op_6901_14_ff; +extern cpuop_func_noret op_69ff_14_nf; +extern cpuop_func_noret op_69ff_14_ff; +extern cpuop_func_noret op_6a00_14_nf; +extern cpuop_func_noret op_6a00_14_ff; +extern cpuop_func_noret op_6a01_14_nf; +extern cpuop_func_noret op_6a01_14_ff; +extern cpuop_func_noret op_6aff_14_nf; +extern cpuop_func_noret op_6aff_14_ff; +extern cpuop_func_noret op_6b00_14_nf; +extern cpuop_func_noret op_6b00_14_ff; +extern cpuop_func_noret op_6b01_14_nf; +extern cpuop_func_noret op_6b01_14_ff; +extern cpuop_func_noret op_6bff_14_nf; +extern cpuop_func_noret op_6bff_14_ff; +extern cpuop_func_noret op_6c00_14_nf; +extern cpuop_func_noret op_6c00_14_ff; +extern cpuop_func_noret op_6c01_14_nf; +extern cpuop_func_noret op_6c01_14_ff; +extern cpuop_func_noret op_6cff_14_nf; +extern cpuop_func_noret op_6cff_14_ff; +extern cpuop_func_noret op_6d00_14_nf; +extern cpuop_func_noret op_6d00_14_ff; +extern cpuop_func_noret op_6d01_14_nf; +extern cpuop_func_noret op_6d01_14_ff; +extern cpuop_func_noret op_6dff_14_nf; +extern cpuop_func_noret op_6dff_14_ff; +extern cpuop_func_noret op_6e00_14_nf; +extern cpuop_func_noret op_6e00_14_ff; +extern cpuop_func_noret op_6e01_14_nf; +extern cpuop_func_noret op_6e01_14_ff; +extern cpuop_func_noret op_6eff_14_nf; +extern cpuop_func_noret op_6eff_14_ff; +extern cpuop_func_noret op_6f00_14_nf; +extern cpuop_func_noret op_6f00_14_ff; +extern cpuop_func_noret op_6f01_14_nf; +extern cpuop_func_noret op_6f01_14_ff; +extern cpuop_func_noret op_6fff_14_nf; +extern cpuop_func_noret op_6fff_14_ff; +extern cpuop_func_noret op_7000_14_nf; +extern cpuop_func_noret op_7000_14_ff; +extern cpuop_func_noret op_8000_14_nf; +extern cpuop_func_noret op_8000_14_ff; +extern cpuop_func_noret op_8010_14_nf; +extern cpuop_func_noret op_8010_14_ff; +extern cpuop_func_noret op_8018_14_nf; +extern cpuop_func_noret op_8018_14_ff; +extern cpuop_func_noret op_8020_14_nf; +extern cpuop_func_noret op_8020_14_ff; +extern cpuop_func_noret op_8028_14_nf; +extern cpuop_func_noret op_8028_14_ff; +extern cpuop_func_noret op_8030_14_nf; +extern cpuop_func_noret op_8030_14_ff; +extern cpuop_func_noret op_8038_14_nf; +extern cpuop_func_noret op_8038_14_ff; +extern cpuop_func_noret op_8039_14_nf; +extern cpuop_func_noret op_8039_14_ff; +extern cpuop_func_noret op_803a_14_nf; +extern cpuop_func_noret op_803a_14_ff; +extern cpuop_func_noret op_803b_14_nf; +extern cpuop_func_noret op_803b_14_ff; +extern cpuop_func_noret op_803c_14_nf; +extern cpuop_func_noret op_803c_14_ff; +extern cpuop_func_noret op_8040_14_nf; +extern cpuop_func_noret op_8040_14_ff; +extern cpuop_func_noret op_8050_14_nf; +extern cpuop_func_noret op_8050_14_ff; +extern cpuop_func_noret op_8058_14_nf; +extern cpuop_func_noret op_8058_14_ff; +extern cpuop_func_noret op_8060_14_nf; +extern cpuop_func_noret op_8060_14_ff; +extern cpuop_func_noret op_8068_14_nf; +extern cpuop_func_noret op_8068_14_ff; +extern cpuop_func_noret op_8070_14_nf; +extern cpuop_func_noret op_8070_14_ff; +extern cpuop_func_noret op_8078_14_nf; +extern cpuop_func_noret op_8078_14_ff; +extern cpuop_func_noret op_8079_14_nf; +extern cpuop_func_noret op_8079_14_ff; +extern cpuop_func_noret op_807a_14_nf; +extern cpuop_func_noret op_807a_14_ff; +extern cpuop_func_noret op_807b_14_nf; +extern cpuop_func_noret op_807b_14_ff; +extern cpuop_func_noret op_807c_14_nf; +extern cpuop_func_noret op_807c_14_ff; +extern cpuop_func_noret op_8080_14_nf; +extern cpuop_func_noret op_8080_14_ff; +extern cpuop_func_noret op_8090_14_nf; +extern cpuop_func_noret op_8090_14_ff; +extern cpuop_func_noret op_8098_14_nf; +extern cpuop_func_noret op_8098_14_ff; +extern cpuop_func_noret op_80a0_14_nf; +extern cpuop_func_noret op_80a0_14_ff; +extern cpuop_func_noret op_80a8_14_nf; +extern cpuop_func_noret op_80a8_14_ff; +extern cpuop_func_noret op_80b0_14_nf; +extern cpuop_func_noret op_80b0_14_ff; +extern cpuop_func_noret op_80b8_14_nf; +extern cpuop_func_noret op_80b8_14_ff; +extern cpuop_func_noret op_80b9_14_nf; +extern cpuop_func_noret op_80b9_14_ff; +extern cpuop_func_noret op_80ba_14_nf; +extern cpuop_func_noret op_80ba_14_ff; +extern cpuop_func_noret op_80bb_14_nf; +extern cpuop_func_noret op_80bb_14_ff; +extern cpuop_func_noret op_80bc_14_nf; +extern cpuop_func_noret op_80bc_14_ff; +extern cpuop_func_noret op_80c0_14_nf; +extern cpuop_func_noret op_80c0_14_ff; +extern cpuop_func_noret op_80d0_14_nf; +extern cpuop_func_noret op_80d0_14_ff; +extern cpuop_func_noret op_80d8_14_nf; +extern cpuop_func_noret op_80d8_14_ff; +extern cpuop_func_noret op_80e0_14_nf; +extern cpuop_func_noret op_80e0_14_ff; +extern cpuop_func_noret op_80e8_14_nf; +extern cpuop_func_noret op_80e8_14_ff; +extern cpuop_func_noret op_80f0_14_nf; +extern cpuop_func_noret op_80f0_14_ff; +extern cpuop_func_noret op_80f8_14_nf; +extern cpuop_func_noret op_80f8_14_ff; +extern cpuop_func_noret op_80f9_14_nf; +extern cpuop_func_noret op_80f9_14_ff; +extern cpuop_func_noret op_80fa_14_nf; +extern cpuop_func_noret op_80fa_14_ff; +extern cpuop_func_noret op_80fb_14_nf; +extern cpuop_func_noret op_80fb_14_ff; +extern cpuop_func_noret op_80fc_14_nf; +extern cpuop_func_noret op_80fc_14_ff; +extern cpuop_func_noret op_8100_14_nf; +extern cpuop_func_noret op_8100_14_ff; +extern cpuop_func_noret op_8108_14_nf; +extern cpuop_func_noret op_8108_14_ff; +extern cpuop_func_noret op_8110_14_nf; +extern cpuop_func_noret op_8110_14_ff; +extern cpuop_func_noret op_8118_14_nf; +extern cpuop_func_noret op_8118_14_ff; +extern cpuop_func_noret op_8120_14_nf; +extern cpuop_func_noret op_8120_14_ff; +extern cpuop_func_noret op_8128_14_nf; +extern cpuop_func_noret op_8128_14_ff; +extern cpuop_func_noret op_8130_14_nf; +extern cpuop_func_noret op_8130_14_ff; +extern cpuop_func_noret op_8138_14_nf; +extern cpuop_func_noret op_8138_14_ff; +extern cpuop_func_noret op_8139_14_nf; +extern cpuop_func_noret op_8139_14_ff; +extern cpuop_func_noret op_8150_14_nf; +extern cpuop_func_noret op_8150_14_ff; +extern cpuop_func_noret op_8158_14_nf; +extern cpuop_func_noret op_8158_14_ff; +extern cpuop_func_noret op_8160_14_nf; +extern cpuop_func_noret op_8160_14_ff; +extern cpuop_func_noret op_8168_14_nf; +extern cpuop_func_noret op_8168_14_ff; +extern cpuop_func_noret op_8170_14_nf; +extern cpuop_func_noret op_8170_14_ff; +extern cpuop_func_noret op_8178_14_nf; +extern cpuop_func_noret op_8178_14_ff; +extern cpuop_func_noret op_8179_14_nf; +extern cpuop_func_noret op_8179_14_ff; +extern cpuop_func_noret op_8190_14_nf; +extern cpuop_func_noret op_8190_14_ff; +extern cpuop_func_noret op_8198_14_nf; +extern cpuop_func_noret op_8198_14_ff; +extern cpuop_func_noret op_81a0_14_nf; +extern cpuop_func_noret op_81a0_14_ff; +extern cpuop_func_noret op_81a8_14_nf; +extern cpuop_func_noret op_81a8_14_ff; +extern cpuop_func_noret op_81b0_14_nf; +extern cpuop_func_noret op_81b0_14_ff; +extern cpuop_func_noret op_81b8_14_nf; +extern cpuop_func_noret op_81b8_14_ff; +extern cpuop_func_noret op_81b9_14_nf; +extern cpuop_func_noret op_81b9_14_ff; +extern cpuop_func_noret op_81c0_14_nf; +extern cpuop_func_noret op_81c0_14_ff; +extern cpuop_func_noret op_81d0_14_nf; +extern cpuop_func_noret op_81d0_14_ff; +extern cpuop_func_noret op_81d8_14_nf; +extern cpuop_func_noret op_81d8_14_ff; +extern cpuop_func_noret op_81e0_14_nf; +extern cpuop_func_noret op_81e0_14_ff; +extern cpuop_func_noret op_81e8_14_nf; +extern cpuop_func_noret op_81e8_14_ff; +extern cpuop_func_noret op_81f0_14_nf; +extern cpuop_func_noret op_81f0_14_ff; +extern cpuop_func_noret op_81f8_14_nf; +extern cpuop_func_noret op_81f8_14_ff; +extern cpuop_func_noret op_81f9_14_nf; +extern cpuop_func_noret op_81f9_14_ff; +extern cpuop_func_noret op_81fa_14_nf; +extern cpuop_func_noret op_81fa_14_ff; +extern cpuop_func_noret op_81fb_14_nf; +extern cpuop_func_noret op_81fb_14_ff; +extern cpuop_func_noret op_81fc_14_nf; +extern cpuop_func_noret op_81fc_14_ff; +extern cpuop_func_noret op_9000_14_nf; +extern cpuop_func_noret op_9000_14_ff; +extern cpuop_func_noret op_9010_14_nf; +extern cpuop_func_noret op_9010_14_ff; +extern cpuop_func_noret op_9018_14_nf; +extern cpuop_func_noret op_9018_14_ff; +extern cpuop_func_noret op_9020_14_nf; +extern cpuop_func_noret op_9020_14_ff; +extern cpuop_func_noret op_9028_14_nf; +extern cpuop_func_noret op_9028_14_ff; +extern cpuop_func_noret op_9030_14_nf; +extern cpuop_func_noret op_9030_14_ff; +extern cpuop_func_noret op_9038_14_nf; +extern cpuop_func_noret op_9038_14_ff; +extern cpuop_func_noret op_9039_14_nf; +extern cpuop_func_noret op_9039_14_ff; +extern cpuop_func_noret op_903a_14_nf; +extern cpuop_func_noret op_903a_14_ff; +extern cpuop_func_noret op_903b_14_nf; +extern cpuop_func_noret op_903b_14_ff; +extern cpuop_func_noret op_903c_14_nf; +extern cpuop_func_noret op_903c_14_ff; +extern cpuop_func_noret op_9040_14_nf; +extern cpuop_func_noret op_9040_14_ff; +extern cpuop_func_noret op_9048_14_nf; +extern cpuop_func_noret op_9048_14_ff; +extern cpuop_func_noret op_9050_14_nf; +extern cpuop_func_noret op_9050_14_ff; +extern cpuop_func_noret op_9058_14_nf; +extern cpuop_func_noret op_9058_14_ff; +extern cpuop_func_noret op_9060_14_nf; +extern cpuop_func_noret op_9060_14_ff; +extern cpuop_func_noret op_9068_14_nf; +extern cpuop_func_noret op_9068_14_ff; +extern cpuop_func_noret op_9070_14_nf; +extern cpuop_func_noret op_9070_14_ff; +extern cpuop_func_noret op_9078_14_nf; +extern cpuop_func_noret op_9078_14_ff; +extern cpuop_func_noret op_9079_14_nf; +extern cpuop_func_noret op_9079_14_ff; +extern cpuop_func_noret op_907a_14_nf; +extern cpuop_func_noret op_907a_14_ff; +extern cpuop_func_noret op_907b_14_nf; +extern cpuop_func_noret op_907b_14_ff; +extern cpuop_func_noret op_907c_14_nf; +extern cpuop_func_noret op_907c_14_ff; +extern cpuop_func_noret op_9080_14_nf; +extern cpuop_func_noret op_9080_14_ff; +extern cpuop_func_noret op_9088_14_nf; +extern cpuop_func_noret op_9088_14_ff; +extern cpuop_func_noret op_9090_14_nf; +extern cpuop_func_noret op_9090_14_ff; +extern cpuop_func_noret op_9098_14_nf; +extern cpuop_func_noret op_9098_14_ff; +extern cpuop_func_noret op_90a0_14_nf; +extern cpuop_func_noret op_90a0_14_ff; +extern cpuop_func_noret op_90a8_14_nf; +extern cpuop_func_noret op_90a8_14_ff; +extern cpuop_func_noret op_90b0_14_nf; +extern cpuop_func_noret op_90b0_14_ff; +extern cpuop_func_noret op_90b8_14_nf; +extern cpuop_func_noret op_90b8_14_ff; +extern cpuop_func_noret op_90b9_14_nf; +extern cpuop_func_noret op_90b9_14_ff; +extern cpuop_func_noret op_90ba_14_nf; +extern cpuop_func_noret op_90ba_14_ff; +extern cpuop_func_noret op_90bb_14_nf; +extern cpuop_func_noret op_90bb_14_ff; +extern cpuop_func_noret op_90bc_14_nf; +extern cpuop_func_noret op_90bc_14_ff; +extern cpuop_func_noret op_90c0_14_nf; +extern cpuop_func_noret op_90c0_14_ff; +extern cpuop_func_noret op_90c8_14_nf; +extern cpuop_func_noret op_90c8_14_ff; +extern cpuop_func_noret op_90d0_14_nf; +extern cpuop_func_noret op_90d0_14_ff; +extern cpuop_func_noret op_90d8_14_nf; +extern cpuop_func_noret op_90d8_14_ff; +extern cpuop_func_noret op_90e0_14_nf; +extern cpuop_func_noret op_90e0_14_ff; +extern cpuop_func_noret op_90e8_14_nf; +extern cpuop_func_noret op_90e8_14_ff; +extern cpuop_func_noret op_90f0_14_nf; +extern cpuop_func_noret op_90f0_14_ff; +extern cpuop_func_noret op_90f8_14_nf; +extern cpuop_func_noret op_90f8_14_ff; +extern cpuop_func_noret op_90f9_14_nf; +extern cpuop_func_noret op_90f9_14_ff; +extern cpuop_func_noret op_90fa_14_nf; +extern cpuop_func_noret op_90fa_14_ff; +extern cpuop_func_noret op_90fb_14_nf; +extern cpuop_func_noret op_90fb_14_ff; +extern cpuop_func_noret op_90fc_14_nf; +extern cpuop_func_noret op_90fc_14_ff; +extern cpuop_func_noret op_9100_14_nf; +extern cpuop_func_noret op_9100_14_ff; +extern cpuop_func_noret op_9108_14_nf; +extern cpuop_func_noret op_9108_14_ff; +extern cpuop_func_noret op_9110_14_nf; +extern cpuop_func_noret op_9110_14_ff; +extern cpuop_func_noret op_9118_14_nf; +extern cpuop_func_noret op_9118_14_ff; +extern cpuop_func_noret op_9120_14_nf; +extern cpuop_func_noret op_9120_14_ff; +extern cpuop_func_noret op_9128_14_nf; +extern cpuop_func_noret op_9128_14_ff; +extern cpuop_func_noret op_9130_14_nf; +extern cpuop_func_noret op_9130_14_ff; +extern cpuop_func_noret op_9138_14_nf; +extern cpuop_func_noret op_9138_14_ff; +extern cpuop_func_noret op_9139_14_nf; +extern cpuop_func_noret op_9139_14_ff; +extern cpuop_func_noret op_9140_14_nf; +extern cpuop_func_noret op_9140_14_ff; +extern cpuop_func_noret op_9148_14_nf; +extern cpuop_func_noret op_9148_14_ff; +extern cpuop_func_noret op_9150_14_nf; +extern cpuop_func_noret op_9150_14_ff; +extern cpuop_func_noret op_9158_14_nf; +extern cpuop_func_noret op_9158_14_ff; +extern cpuop_func_noret op_9160_14_nf; +extern cpuop_func_noret op_9160_14_ff; +extern cpuop_func_noret op_9168_14_nf; +extern cpuop_func_noret op_9168_14_ff; +extern cpuop_func_noret op_9170_14_nf; +extern cpuop_func_noret op_9170_14_ff; +extern cpuop_func_noret op_9178_14_nf; +extern cpuop_func_noret op_9178_14_ff; +extern cpuop_func_noret op_9179_14_nf; +extern cpuop_func_noret op_9179_14_ff; +extern cpuop_func_noret op_9180_14_nf; +extern cpuop_func_noret op_9180_14_ff; +extern cpuop_func_noret op_9188_14_nf; +extern cpuop_func_noret op_9188_14_ff; +extern cpuop_func_noret op_9190_14_nf; +extern cpuop_func_noret op_9190_14_ff; +extern cpuop_func_noret op_9198_14_nf; +extern cpuop_func_noret op_9198_14_ff; +extern cpuop_func_noret op_91a0_14_nf; +extern cpuop_func_noret op_91a0_14_ff; +extern cpuop_func_noret op_91a8_14_nf; +extern cpuop_func_noret op_91a8_14_ff; +extern cpuop_func_noret op_91b0_14_nf; +extern cpuop_func_noret op_91b0_14_ff; +extern cpuop_func_noret op_91b8_14_nf; +extern cpuop_func_noret op_91b8_14_ff; +extern cpuop_func_noret op_91b9_14_nf; +extern cpuop_func_noret op_91b9_14_ff; +extern cpuop_func_noret op_91c0_14_nf; +extern cpuop_func_noret op_91c0_14_ff; +extern cpuop_func_noret op_91c8_14_nf; +extern cpuop_func_noret op_91c8_14_ff; +extern cpuop_func_noret op_91d0_14_nf; +extern cpuop_func_noret op_91d0_14_ff; +extern cpuop_func_noret op_91d8_14_nf; +extern cpuop_func_noret op_91d8_14_ff; +extern cpuop_func_noret op_91e0_14_nf; +extern cpuop_func_noret op_91e0_14_ff; +extern cpuop_func_noret op_91e8_14_nf; +extern cpuop_func_noret op_91e8_14_ff; +extern cpuop_func_noret op_91f0_14_nf; +extern cpuop_func_noret op_91f0_14_ff; +extern cpuop_func_noret op_91f8_14_nf; +extern cpuop_func_noret op_91f8_14_ff; +extern cpuop_func_noret op_91f9_14_nf; +extern cpuop_func_noret op_91f9_14_ff; +extern cpuop_func_noret op_91fa_14_nf; +extern cpuop_func_noret op_91fa_14_ff; +extern cpuop_func_noret op_91fb_14_nf; +extern cpuop_func_noret op_91fb_14_ff; +extern cpuop_func_noret op_91fc_14_nf; +extern cpuop_func_noret op_91fc_14_ff; +extern cpuop_func_noret op_b000_14_nf; +extern cpuop_func_noret op_b000_14_ff; +extern cpuop_func_noret op_b010_14_nf; +extern cpuop_func_noret op_b010_14_ff; +extern cpuop_func_noret op_b018_14_nf; +extern cpuop_func_noret op_b018_14_ff; +extern cpuop_func_noret op_b020_14_nf; +extern cpuop_func_noret op_b020_14_ff; +extern cpuop_func_noret op_b028_14_nf; +extern cpuop_func_noret op_b028_14_ff; +extern cpuop_func_noret op_b030_14_nf; +extern cpuop_func_noret op_b030_14_ff; +extern cpuop_func_noret op_b038_14_nf; +extern cpuop_func_noret op_b038_14_ff; +extern cpuop_func_noret op_b039_14_nf; +extern cpuop_func_noret op_b039_14_ff; +extern cpuop_func_noret op_b03a_14_nf; +extern cpuop_func_noret op_b03a_14_ff; +extern cpuop_func_noret op_b03b_14_nf; +extern cpuop_func_noret op_b03b_14_ff; +extern cpuop_func_noret op_b03c_14_nf; +extern cpuop_func_noret op_b03c_14_ff; +extern cpuop_func_noret op_b040_14_nf; +extern cpuop_func_noret op_b040_14_ff; +extern cpuop_func_noret op_b048_14_nf; +extern cpuop_func_noret op_b048_14_ff; +extern cpuop_func_noret op_b050_14_nf; +extern cpuop_func_noret op_b050_14_ff; +extern cpuop_func_noret op_b058_14_nf; +extern cpuop_func_noret op_b058_14_ff; +extern cpuop_func_noret op_b060_14_nf; +extern cpuop_func_noret op_b060_14_ff; +extern cpuop_func_noret op_b068_14_nf; +extern cpuop_func_noret op_b068_14_ff; +extern cpuop_func_noret op_b070_14_nf; +extern cpuop_func_noret op_b070_14_ff; +extern cpuop_func_noret op_b078_14_nf; +extern cpuop_func_noret op_b078_14_ff; +extern cpuop_func_noret op_b079_14_nf; +extern cpuop_func_noret op_b079_14_ff; +extern cpuop_func_noret op_b07a_14_nf; +extern cpuop_func_noret op_b07a_14_ff; +extern cpuop_func_noret op_b07b_14_nf; +extern cpuop_func_noret op_b07b_14_ff; +extern cpuop_func_noret op_b07c_14_nf; +extern cpuop_func_noret op_b07c_14_ff; +extern cpuop_func_noret op_b080_14_nf; +extern cpuop_func_noret op_b080_14_ff; +extern cpuop_func_noret op_b088_14_nf; +extern cpuop_func_noret op_b088_14_ff; +extern cpuop_func_noret op_b090_14_nf; +extern cpuop_func_noret op_b090_14_ff; +extern cpuop_func_noret op_b098_14_nf; +extern cpuop_func_noret op_b098_14_ff; +extern cpuop_func_noret op_b0a0_14_nf; +extern cpuop_func_noret op_b0a0_14_ff; +extern cpuop_func_noret op_b0a8_14_nf; +extern cpuop_func_noret op_b0a8_14_ff; +extern cpuop_func_noret op_b0b0_14_nf; +extern cpuop_func_noret op_b0b0_14_ff; +extern cpuop_func_noret op_b0b8_14_nf; +extern cpuop_func_noret op_b0b8_14_ff; +extern cpuop_func_noret op_b0b9_14_nf; +extern cpuop_func_noret op_b0b9_14_ff; +extern cpuop_func_noret op_b0ba_14_nf; +extern cpuop_func_noret op_b0ba_14_ff; +extern cpuop_func_noret op_b0bb_14_nf; +extern cpuop_func_noret op_b0bb_14_ff; +extern cpuop_func_noret op_b0bc_14_nf; +extern cpuop_func_noret op_b0bc_14_ff; +extern cpuop_func_noret op_b0c0_14_nf; +extern cpuop_func_noret op_b0c0_14_ff; +extern cpuop_func_noret op_b0c8_14_nf; +extern cpuop_func_noret op_b0c8_14_ff; +extern cpuop_func_noret op_b0d0_14_nf; +extern cpuop_func_noret op_b0d0_14_ff; +extern cpuop_func_noret op_b0d8_14_nf; +extern cpuop_func_noret op_b0d8_14_ff; +extern cpuop_func_noret op_b0e0_14_nf; +extern cpuop_func_noret op_b0e0_14_ff; +extern cpuop_func_noret op_b0e8_14_nf; +extern cpuop_func_noret op_b0e8_14_ff; +extern cpuop_func_noret op_b0f0_14_nf; +extern cpuop_func_noret op_b0f0_14_ff; +extern cpuop_func_noret op_b0f8_14_nf; +extern cpuop_func_noret op_b0f8_14_ff; +extern cpuop_func_noret op_b0f9_14_nf; +extern cpuop_func_noret op_b0f9_14_ff; +extern cpuop_func_noret op_b0fa_14_nf; +extern cpuop_func_noret op_b0fa_14_ff; +extern cpuop_func_noret op_b0fb_14_nf; +extern cpuop_func_noret op_b0fb_14_ff; +extern cpuop_func_noret op_b0fc_14_nf; +extern cpuop_func_noret op_b0fc_14_ff; +extern cpuop_func_noret op_b100_14_nf; +extern cpuop_func_noret op_b100_14_ff; +extern cpuop_func_noret op_b108_14_nf; +extern cpuop_func_noret op_b108_14_ff; +extern cpuop_func_noret op_b110_14_nf; +extern cpuop_func_noret op_b110_14_ff; +extern cpuop_func_noret op_b118_14_nf; +extern cpuop_func_noret op_b118_14_ff; +extern cpuop_func_noret op_b120_14_nf; +extern cpuop_func_noret op_b120_14_ff; +extern cpuop_func_noret op_b128_14_nf; +extern cpuop_func_noret op_b128_14_ff; +extern cpuop_func_noret op_b130_14_nf; +extern cpuop_func_noret op_b130_14_ff; +extern cpuop_func_noret op_b138_14_nf; +extern cpuop_func_noret op_b138_14_ff; +extern cpuop_func_noret op_b139_14_nf; +extern cpuop_func_noret op_b139_14_ff; +extern cpuop_func_noret op_b140_14_nf; +extern cpuop_func_noret op_b140_14_ff; +extern cpuop_func_noret op_b148_14_nf; +extern cpuop_func_noret op_b148_14_ff; +extern cpuop_func_noret op_b150_14_nf; +extern cpuop_func_noret op_b150_14_ff; +extern cpuop_func_noret op_b158_14_nf; +extern cpuop_func_noret op_b158_14_ff; +extern cpuop_func_noret op_b160_14_nf; +extern cpuop_func_noret op_b160_14_ff; +extern cpuop_func_noret op_b168_14_nf; +extern cpuop_func_noret op_b168_14_ff; +extern cpuop_func_noret op_b170_14_nf; +extern cpuop_func_noret op_b170_14_ff; +extern cpuop_func_noret op_b178_14_nf; +extern cpuop_func_noret op_b178_14_ff; +extern cpuop_func_noret op_b179_14_nf; +extern cpuop_func_noret op_b179_14_ff; +extern cpuop_func_noret op_b180_14_nf; +extern cpuop_func_noret op_b180_14_ff; +extern cpuop_func_noret op_b188_14_nf; +extern cpuop_func_noret op_b188_14_ff; +extern cpuop_func_noret op_b190_14_nf; +extern cpuop_func_noret op_b190_14_ff; +extern cpuop_func_noret op_b198_14_nf; +extern cpuop_func_noret op_b198_14_ff; +extern cpuop_func_noret op_b1a0_14_nf; +extern cpuop_func_noret op_b1a0_14_ff; +extern cpuop_func_noret op_b1a8_14_nf; +extern cpuop_func_noret op_b1a8_14_ff; +extern cpuop_func_noret op_b1b0_14_nf; +extern cpuop_func_noret op_b1b0_14_ff; +extern cpuop_func_noret op_b1b8_14_nf; +extern cpuop_func_noret op_b1b8_14_ff; +extern cpuop_func_noret op_b1b9_14_nf; +extern cpuop_func_noret op_b1b9_14_ff; +extern cpuop_func_noret op_b1c0_14_nf; +extern cpuop_func_noret op_b1c0_14_ff; +extern cpuop_func_noret op_b1c8_14_nf; +extern cpuop_func_noret op_b1c8_14_ff; +extern cpuop_func_noret op_b1d0_14_nf; +extern cpuop_func_noret op_b1d0_14_ff; +extern cpuop_func_noret op_b1d8_14_nf; +extern cpuop_func_noret op_b1d8_14_ff; +extern cpuop_func_noret op_b1e0_14_nf; +extern cpuop_func_noret op_b1e0_14_ff; +extern cpuop_func_noret op_b1e8_14_nf; +extern cpuop_func_noret op_b1e8_14_ff; +extern cpuop_func_noret op_b1f0_14_nf; +extern cpuop_func_noret op_b1f0_14_ff; +extern cpuop_func_noret op_b1f8_14_nf; +extern cpuop_func_noret op_b1f8_14_ff; +extern cpuop_func_noret op_b1f9_14_nf; +extern cpuop_func_noret op_b1f9_14_ff; +extern cpuop_func_noret op_b1fa_14_nf; +extern cpuop_func_noret op_b1fa_14_ff; +extern cpuop_func_noret op_b1fb_14_nf; +extern cpuop_func_noret op_b1fb_14_ff; +extern cpuop_func_noret op_b1fc_14_nf; +extern cpuop_func_noret op_b1fc_14_ff; +extern cpuop_func_noret op_c000_14_nf; +extern cpuop_func_noret op_c000_14_ff; +extern cpuop_func_noret op_c010_14_nf; +extern cpuop_func_noret op_c010_14_ff; +extern cpuop_func_noret op_c018_14_nf; +extern cpuop_func_noret op_c018_14_ff; +extern cpuop_func_noret op_c020_14_nf; +extern cpuop_func_noret op_c020_14_ff; +extern cpuop_func_noret op_c028_14_nf; +extern cpuop_func_noret op_c028_14_ff; +extern cpuop_func_noret op_c030_14_nf; +extern cpuop_func_noret op_c030_14_ff; +extern cpuop_func_noret op_c038_14_nf; +extern cpuop_func_noret op_c038_14_ff; +extern cpuop_func_noret op_c039_14_nf; +extern cpuop_func_noret op_c039_14_ff; +extern cpuop_func_noret op_c03a_14_nf; +extern cpuop_func_noret op_c03a_14_ff; +extern cpuop_func_noret op_c03b_14_nf; +extern cpuop_func_noret op_c03b_14_ff; +extern cpuop_func_noret op_c03c_14_nf; +extern cpuop_func_noret op_c03c_14_ff; +extern cpuop_func_noret op_c040_14_nf; +extern cpuop_func_noret op_c040_14_ff; +extern cpuop_func_noret op_c050_14_nf; +extern cpuop_func_noret op_c050_14_ff; +extern cpuop_func_noret op_c058_14_nf; +extern cpuop_func_noret op_c058_14_ff; +extern cpuop_func_noret op_c060_14_nf; +extern cpuop_func_noret op_c060_14_ff; +extern cpuop_func_noret op_c068_14_nf; +extern cpuop_func_noret op_c068_14_ff; +extern cpuop_func_noret op_c070_14_nf; +extern cpuop_func_noret op_c070_14_ff; +extern cpuop_func_noret op_c078_14_nf; +extern cpuop_func_noret op_c078_14_ff; +extern cpuop_func_noret op_c079_14_nf; +extern cpuop_func_noret op_c079_14_ff; +extern cpuop_func_noret op_c07a_14_nf; +extern cpuop_func_noret op_c07a_14_ff; +extern cpuop_func_noret op_c07b_14_nf; +extern cpuop_func_noret op_c07b_14_ff; +extern cpuop_func_noret op_c07c_14_nf; +extern cpuop_func_noret op_c07c_14_ff; +extern cpuop_func_noret op_c080_14_nf; +extern cpuop_func_noret op_c080_14_ff; +extern cpuop_func_noret op_c090_14_nf; +extern cpuop_func_noret op_c090_14_ff; +extern cpuop_func_noret op_c098_14_nf; +extern cpuop_func_noret op_c098_14_ff; +extern cpuop_func_noret op_c0a0_14_nf; +extern cpuop_func_noret op_c0a0_14_ff; +extern cpuop_func_noret op_c0a8_14_nf; +extern cpuop_func_noret op_c0a8_14_ff; +extern cpuop_func_noret op_c0b0_14_nf; +extern cpuop_func_noret op_c0b0_14_ff; +extern cpuop_func_noret op_c0b8_14_nf; +extern cpuop_func_noret op_c0b8_14_ff; +extern cpuop_func_noret op_c0b9_14_nf; +extern cpuop_func_noret op_c0b9_14_ff; +extern cpuop_func_noret op_c0ba_14_nf; +extern cpuop_func_noret op_c0ba_14_ff; +extern cpuop_func_noret op_c0bb_14_nf; +extern cpuop_func_noret op_c0bb_14_ff; +extern cpuop_func_noret op_c0bc_14_nf; +extern cpuop_func_noret op_c0bc_14_ff; +extern cpuop_func_noret op_c0c0_14_nf; +extern cpuop_func_noret op_c0c0_14_ff; +extern cpuop_func_noret op_c0d0_14_nf; +extern cpuop_func_noret op_c0d0_14_ff; +extern cpuop_func_noret op_c0d8_14_nf; +extern cpuop_func_noret op_c0d8_14_ff; +extern cpuop_func_noret op_c0e0_14_nf; +extern cpuop_func_noret op_c0e0_14_ff; +extern cpuop_func_noret op_c0e8_14_nf; +extern cpuop_func_noret op_c0e8_14_ff; +extern cpuop_func_noret op_c0f0_14_nf; +extern cpuop_func_noret op_c0f0_14_ff; +extern cpuop_func_noret op_c0f8_14_nf; +extern cpuop_func_noret op_c0f8_14_ff; +extern cpuop_func_noret op_c0f9_14_nf; +extern cpuop_func_noret op_c0f9_14_ff; +extern cpuop_func_noret op_c0fa_14_nf; +extern cpuop_func_noret op_c0fa_14_ff; +extern cpuop_func_noret op_c0fb_14_nf; +extern cpuop_func_noret op_c0fb_14_ff; +extern cpuop_func_noret op_c0fc_14_nf; +extern cpuop_func_noret op_c0fc_14_ff; +extern cpuop_func_noret op_c100_14_nf; +extern cpuop_func_noret op_c100_14_ff; +extern cpuop_func_noret op_c108_14_nf; +extern cpuop_func_noret op_c108_14_ff; +extern cpuop_func_noret op_c110_14_nf; +extern cpuop_func_noret op_c110_14_ff; +extern cpuop_func_noret op_c118_14_nf; +extern cpuop_func_noret op_c118_14_ff; +extern cpuop_func_noret op_c120_14_nf; +extern cpuop_func_noret op_c120_14_ff; +extern cpuop_func_noret op_c128_14_nf; +extern cpuop_func_noret op_c128_14_ff; +extern cpuop_func_noret op_c130_14_nf; +extern cpuop_func_noret op_c130_14_ff; +extern cpuop_func_noret op_c138_14_nf; +extern cpuop_func_noret op_c138_14_ff; +extern cpuop_func_noret op_c139_14_nf; +extern cpuop_func_noret op_c139_14_ff; +extern cpuop_func_noret op_c140_14_nf; +extern cpuop_func_noret op_c140_14_ff; +extern cpuop_func_noret op_c148_14_nf; +extern cpuop_func_noret op_c148_14_ff; +extern cpuop_func_noret op_c150_14_nf; +extern cpuop_func_noret op_c150_14_ff; +extern cpuop_func_noret op_c158_14_nf; +extern cpuop_func_noret op_c158_14_ff; +extern cpuop_func_noret op_c160_14_nf; +extern cpuop_func_noret op_c160_14_ff; +extern cpuop_func_noret op_c168_14_nf; +extern cpuop_func_noret op_c168_14_ff; +extern cpuop_func_noret op_c170_14_nf; +extern cpuop_func_noret op_c170_14_ff; +extern cpuop_func_noret op_c178_14_nf; +extern cpuop_func_noret op_c178_14_ff; +extern cpuop_func_noret op_c179_14_nf; +extern cpuop_func_noret op_c179_14_ff; +extern cpuop_func_noret op_c188_14_nf; +extern cpuop_func_noret op_c188_14_ff; +extern cpuop_func_noret op_c190_14_nf; +extern cpuop_func_noret op_c190_14_ff; +extern cpuop_func_noret op_c198_14_nf; +extern cpuop_func_noret op_c198_14_ff; +extern cpuop_func_noret op_c1a0_14_nf; +extern cpuop_func_noret op_c1a0_14_ff; +extern cpuop_func_noret op_c1a8_14_nf; +extern cpuop_func_noret op_c1a8_14_ff; +extern cpuop_func_noret op_c1b0_14_nf; +extern cpuop_func_noret op_c1b0_14_ff; +extern cpuop_func_noret op_c1b8_14_nf; +extern cpuop_func_noret op_c1b8_14_ff; +extern cpuop_func_noret op_c1b9_14_nf; +extern cpuop_func_noret op_c1b9_14_ff; +extern cpuop_func_noret op_c1c0_14_nf; +extern cpuop_func_noret op_c1c0_14_ff; +extern cpuop_func_noret op_c1d0_14_nf; +extern cpuop_func_noret op_c1d0_14_ff; +extern cpuop_func_noret op_c1d8_14_nf; +extern cpuop_func_noret op_c1d8_14_ff; +extern cpuop_func_noret op_c1e0_14_nf; +extern cpuop_func_noret op_c1e0_14_ff; +extern cpuop_func_noret op_c1e8_14_nf; +extern cpuop_func_noret op_c1e8_14_ff; +extern cpuop_func_noret op_c1f0_14_nf; +extern cpuop_func_noret op_c1f0_14_ff; +extern cpuop_func_noret op_c1f8_14_nf; +extern cpuop_func_noret op_c1f8_14_ff; +extern cpuop_func_noret op_c1f9_14_nf; +extern cpuop_func_noret op_c1f9_14_ff; +extern cpuop_func_noret op_c1fa_14_nf; +extern cpuop_func_noret op_c1fa_14_ff; +extern cpuop_func_noret op_c1fb_14_nf; +extern cpuop_func_noret op_c1fb_14_ff; +extern cpuop_func_noret op_c1fc_14_nf; +extern cpuop_func_noret op_c1fc_14_ff; +extern cpuop_func_noret op_d000_14_nf; +extern cpuop_func_noret op_d000_14_ff; +extern cpuop_func_noret op_d010_14_nf; +extern cpuop_func_noret op_d010_14_ff; +extern cpuop_func_noret op_d018_14_nf; +extern cpuop_func_noret op_d018_14_ff; +extern cpuop_func_noret op_d020_14_nf; +extern cpuop_func_noret op_d020_14_ff; +extern cpuop_func_noret op_d028_14_nf; +extern cpuop_func_noret op_d028_14_ff; +extern cpuop_func_noret op_d030_14_nf; +extern cpuop_func_noret op_d030_14_ff; +extern cpuop_func_noret op_d038_14_nf; +extern cpuop_func_noret op_d038_14_ff; +extern cpuop_func_noret op_d039_14_nf; +extern cpuop_func_noret op_d039_14_ff; +extern cpuop_func_noret op_d03a_14_nf; +extern cpuop_func_noret op_d03a_14_ff; +extern cpuop_func_noret op_d03b_14_nf; +extern cpuop_func_noret op_d03b_14_ff; +extern cpuop_func_noret op_d03c_14_nf; +extern cpuop_func_noret op_d03c_14_ff; +extern cpuop_func_noret op_d040_14_nf; +extern cpuop_func_noret op_d040_14_ff; +extern cpuop_func_noret op_d048_14_nf; +extern cpuop_func_noret op_d048_14_ff; +extern cpuop_func_noret op_d050_14_nf; +extern cpuop_func_noret op_d050_14_ff; +extern cpuop_func_noret op_d058_14_nf; +extern cpuop_func_noret op_d058_14_ff; +extern cpuop_func_noret op_d060_14_nf; +extern cpuop_func_noret op_d060_14_ff; +extern cpuop_func_noret op_d068_14_nf; +extern cpuop_func_noret op_d068_14_ff; +extern cpuop_func_noret op_d070_14_nf; +extern cpuop_func_noret op_d070_14_ff; +extern cpuop_func_noret op_d078_14_nf; +extern cpuop_func_noret op_d078_14_ff; +extern cpuop_func_noret op_d079_14_nf; +extern cpuop_func_noret op_d079_14_ff; +extern cpuop_func_noret op_d07a_14_nf; +extern cpuop_func_noret op_d07a_14_ff; +extern cpuop_func_noret op_d07b_14_nf; +extern cpuop_func_noret op_d07b_14_ff; +extern cpuop_func_noret op_d07c_14_nf; +extern cpuop_func_noret op_d07c_14_ff; +extern cpuop_func_noret op_d080_14_nf; +extern cpuop_func_noret op_d080_14_ff; +extern cpuop_func_noret op_d088_14_nf; +extern cpuop_func_noret op_d088_14_ff; +extern cpuop_func_noret op_d090_14_nf; +extern cpuop_func_noret op_d090_14_ff; +extern cpuop_func_noret op_d098_14_nf; +extern cpuop_func_noret op_d098_14_ff; +extern cpuop_func_noret op_d0a0_14_nf; +extern cpuop_func_noret op_d0a0_14_ff; +extern cpuop_func_noret op_d0a8_14_nf; +extern cpuop_func_noret op_d0a8_14_ff; +extern cpuop_func_noret op_d0b0_14_nf; +extern cpuop_func_noret op_d0b0_14_ff; +extern cpuop_func_noret op_d0b8_14_nf; +extern cpuop_func_noret op_d0b8_14_ff; +extern cpuop_func_noret op_d0b9_14_nf; +extern cpuop_func_noret op_d0b9_14_ff; +extern cpuop_func_noret op_d0ba_14_nf; +extern cpuop_func_noret op_d0ba_14_ff; +extern cpuop_func_noret op_d0bb_14_nf; +extern cpuop_func_noret op_d0bb_14_ff; +extern cpuop_func_noret op_d0bc_14_nf; +extern cpuop_func_noret op_d0bc_14_ff; +extern cpuop_func_noret op_d0c0_14_nf; +extern cpuop_func_noret op_d0c0_14_ff; +extern cpuop_func_noret op_d0c8_14_nf; +extern cpuop_func_noret op_d0c8_14_ff; +extern cpuop_func_noret op_d0d0_14_nf; +extern cpuop_func_noret op_d0d0_14_ff; +extern cpuop_func_noret op_d0d8_14_nf; +extern cpuop_func_noret op_d0d8_14_ff; +extern cpuop_func_noret op_d0e0_14_nf; +extern cpuop_func_noret op_d0e0_14_ff; +extern cpuop_func_noret op_d0e8_14_nf; +extern cpuop_func_noret op_d0e8_14_ff; +extern cpuop_func_noret op_d0f0_14_nf; +extern cpuop_func_noret op_d0f0_14_ff; +extern cpuop_func_noret op_d0f8_14_nf; +extern cpuop_func_noret op_d0f8_14_ff; +extern cpuop_func_noret op_d0f9_14_nf; +extern cpuop_func_noret op_d0f9_14_ff; +extern cpuop_func_noret op_d0fa_14_nf; +extern cpuop_func_noret op_d0fa_14_ff; +extern cpuop_func_noret op_d0fb_14_nf; +extern cpuop_func_noret op_d0fb_14_ff; +extern cpuop_func_noret op_d0fc_14_nf; +extern cpuop_func_noret op_d0fc_14_ff; +extern cpuop_func_noret op_d100_14_nf; +extern cpuop_func_noret op_d100_14_ff; +extern cpuop_func_noret op_d108_14_nf; +extern cpuop_func_noret op_d108_14_ff; +extern cpuop_func_noret op_d110_14_nf; +extern cpuop_func_noret op_d110_14_ff; +extern cpuop_func_noret op_d118_14_nf; +extern cpuop_func_noret op_d118_14_ff; +extern cpuop_func_noret op_d120_14_nf; +extern cpuop_func_noret op_d120_14_ff; +extern cpuop_func_noret op_d128_14_nf; +extern cpuop_func_noret op_d128_14_ff; +extern cpuop_func_noret op_d130_14_nf; +extern cpuop_func_noret op_d130_14_ff; +extern cpuop_func_noret op_d138_14_nf; +extern cpuop_func_noret op_d138_14_ff; +extern cpuop_func_noret op_d139_14_nf; +extern cpuop_func_noret op_d139_14_ff; +extern cpuop_func_noret op_d140_14_nf; +extern cpuop_func_noret op_d140_14_ff; +extern cpuop_func_noret op_d148_14_nf; +extern cpuop_func_noret op_d148_14_ff; +extern cpuop_func_noret op_d150_14_nf; +extern cpuop_func_noret op_d150_14_ff; +extern cpuop_func_noret op_d158_14_nf; +extern cpuop_func_noret op_d158_14_ff; +extern cpuop_func_noret op_d160_14_nf; +extern cpuop_func_noret op_d160_14_ff; +extern cpuop_func_noret op_d168_14_nf; +extern cpuop_func_noret op_d168_14_ff; +extern cpuop_func_noret op_d170_14_nf; +extern cpuop_func_noret op_d170_14_ff; +extern cpuop_func_noret op_d178_14_nf; +extern cpuop_func_noret op_d178_14_ff; +extern cpuop_func_noret op_d179_14_nf; +extern cpuop_func_noret op_d179_14_ff; +extern cpuop_func_noret op_d180_14_nf; +extern cpuop_func_noret op_d180_14_ff; +extern cpuop_func_noret op_d188_14_nf; +extern cpuop_func_noret op_d188_14_ff; +extern cpuop_func_noret op_d190_14_nf; +extern cpuop_func_noret op_d190_14_ff; +extern cpuop_func_noret op_d198_14_nf; +extern cpuop_func_noret op_d198_14_ff; +extern cpuop_func_noret op_d1a0_14_nf; +extern cpuop_func_noret op_d1a0_14_ff; +extern cpuop_func_noret op_d1a8_14_nf; +extern cpuop_func_noret op_d1a8_14_ff; +extern cpuop_func_noret op_d1b0_14_nf; +extern cpuop_func_noret op_d1b0_14_ff; +extern cpuop_func_noret op_d1b8_14_nf; +extern cpuop_func_noret op_d1b8_14_ff; +extern cpuop_func_noret op_d1b9_14_nf; +extern cpuop_func_noret op_d1b9_14_ff; +extern cpuop_func_noret op_d1c0_14_nf; +extern cpuop_func_noret op_d1c0_14_ff; +extern cpuop_func_noret op_d1c8_14_nf; +extern cpuop_func_noret op_d1c8_14_ff; +extern cpuop_func_noret op_d1d0_14_nf; +extern cpuop_func_noret op_d1d0_14_ff; +extern cpuop_func_noret op_d1d8_14_nf; +extern cpuop_func_noret op_d1d8_14_ff; +extern cpuop_func_noret op_d1e0_14_nf; +extern cpuop_func_noret op_d1e0_14_ff; +extern cpuop_func_noret op_d1e8_14_nf; +extern cpuop_func_noret op_d1e8_14_ff; +extern cpuop_func_noret op_d1f0_14_nf; +extern cpuop_func_noret op_d1f0_14_ff; +extern cpuop_func_noret op_d1f8_14_nf; +extern cpuop_func_noret op_d1f8_14_ff; +extern cpuop_func_noret op_d1f9_14_nf; +extern cpuop_func_noret op_d1f9_14_ff; +extern cpuop_func_noret op_d1fa_14_nf; +extern cpuop_func_noret op_d1fa_14_ff; +extern cpuop_func_noret op_d1fb_14_nf; +extern cpuop_func_noret op_d1fb_14_ff; +extern cpuop_func_noret op_d1fc_14_nf; +extern cpuop_func_noret op_d1fc_14_ff; +extern cpuop_func_noret op_e000_14_nf; +extern cpuop_func_noret op_e000_14_ff; +extern cpuop_func_noret op_e008_14_nf; +extern cpuop_func_noret op_e008_14_ff; +extern cpuop_func_noret op_e010_14_nf; +extern cpuop_func_noret op_e010_14_ff; +extern cpuop_func_noret op_e018_14_nf; +extern cpuop_func_noret op_e018_14_ff; +extern cpuop_func_noret op_e020_14_nf; +extern cpuop_func_noret op_e020_14_ff; +extern cpuop_func_noret op_e028_14_nf; +extern cpuop_func_noret op_e028_14_ff; +extern cpuop_func_noret op_e030_14_nf; +extern cpuop_func_noret op_e030_14_ff; +extern cpuop_func_noret op_e038_14_nf; +extern cpuop_func_noret op_e038_14_ff; +extern cpuop_func_noret op_e040_14_nf; +extern cpuop_func_noret op_e040_14_ff; +extern cpuop_func_noret op_e048_14_nf; +extern cpuop_func_noret op_e048_14_ff; +extern cpuop_func_noret op_e050_14_nf; +extern cpuop_func_noret op_e050_14_ff; +extern cpuop_func_noret op_e058_14_nf; +extern cpuop_func_noret op_e058_14_ff; +extern cpuop_func_noret op_e060_14_nf; +extern cpuop_func_noret op_e060_14_ff; +extern cpuop_func_noret op_e068_14_nf; +extern cpuop_func_noret op_e068_14_ff; +extern cpuop_func_noret op_e070_14_nf; +extern cpuop_func_noret op_e070_14_ff; +extern cpuop_func_noret op_e078_14_nf; +extern cpuop_func_noret op_e078_14_ff; +extern cpuop_func_noret op_e080_14_nf; +extern cpuop_func_noret op_e080_14_ff; +extern cpuop_func_noret op_e088_14_nf; +extern cpuop_func_noret op_e088_14_ff; +extern cpuop_func_noret op_e090_14_nf; +extern cpuop_func_noret op_e090_14_ff; +extern cpuop_func_noret op_e098_14_nf; +extern cpuop_func_noret op_e098_14_ff; +extern cpuop_func_noret op_e0a0_14_nf; +extern cpuop_func_noret op_e0a0_14_ff; +extern cpuop_func_noret op_e0a8_14_nf; +extern cpuop_func_noret op_e0a8_14_ff; +extern cpuop_func_noret op_e0b0_14_nf; +extern cpuop_func_noret op_e0b0_14_ff; +extern cpuop_func_noret op_e0b8_14_nf; +extern cpuop_func_noret op_e0b8_14_ff; +extern cpuop_func_noret op_e0d0_14_nf; +extern cpuop_func_noret op_e0d0_14_ff; +extern cpuop_func_noret op_e0d8_14_nf; +extern cpuop_func_noret op_e0d8_14_ff; +extern cpuop_func_noret op_e0e0_14_nf; +extern cpuop_func_noret op_e0e0_14_ff; +extern cpuop_func_noret op_e0e8_14_nf; +extern cpuop_func_noret op_e0e8_14_ff; +extern cpuop_func_noret op_e0f0_14_nf; +extern cpuop_func_noret op_e0f0_14_ff; +extern cpuop_func_noret op_e0f8_14_nf; +extern cpuop_func_noret op_e0f8_14_ff; +extern cpuop_func_noret op_e0f9_14_nf; +extern cpuop_func_noret op_e0f9_14_ff; +extern cpuop_func_noret op_e100_14_nf; +extern cpuop_func_noret op_e100_14_ff; +extern cpuop_func_noret op_e108_14_nf; +extern cpuop_func_noret op_e108_14_ff; +extern cpuop_func_noret op_e110_14_nf; +extern cpuop_func_noret op_e110_14_ff; +extern cpuop_func_noret op_e118_14_nf; +extern cpuop_func_noret op_e118_14_ff; +extern cpuop_func_noret op_e120_14_nf; +extern cpuop_func_noret op_e120_14_ff; +extern cpuop_func_noret op_e128_14_nf; +extern cpuop_func_noret op_e128_14_ff; +extern cpuop_func_noret op_e130_14_nf; +extern cpuop_func_noret op_e130_14_ff; +extern cpuop_func_noret op_e138_14_nf; +extern cpuop_func_noret op_e138_14_ff; +extern cpuop_func_noret op_e140_14_nf; +extern cpuop_func_noret op_e140_14_ff; +extern cpuop_func_noret op_e148_14_nf; +extern cpuop_func_noret op_e148_14_ff; +extern cpuop_func_noret op_e150_14_nf; +extern cpuop_func_noret op_e150_14_ff; +extern cpuop_func_noret op_e158_14_nf; +extern cpuop_func_noret op_e158_14_ff; +extern cpuop_func_noret op_e160_14_nf; +extern cpuop_func_noret op_e160_14_ff; +extern cpuop_func_noret op_e168_14_nf; +extern cpuop_func_noret op_e168_14_ff; +extern cpuop_func_noret op_e170_14_nf; +extern cpuop_func_noret op_e170_14_ff; +extern cpuop_func_noret op_e178_14_nf; +extern cpuop_func_noret op_e178_14_ff; +extern cpuop_func_noret op_e180_14_nf; +extern cpuop_func_noret op_e180_14_ff; +extern cpuop_func_noret op_e188_14_nf; +extern cpuop_func_noret op_e188_14_ff; +extern cpuop_func_noret op_e190_14_nf; +extern cpuop_func_noret op_e190_14_ff; +extern cpuop_func_noret op_e198_14_nf; +extern cpuop_func_noret op_e198_14_ff; +extern cpuop_func_noret op_e1a0_14_nf; +extern cpuop_func_noret op_e1a0_14_ff; +extern cpuop_func_noret op_e1a8_14_nf; +extern cpuop_func_noret op_e1a8_14_ff; +extern cpuop_func_noret op_e1b0_14_nf; +extern cpuop_func_noret op_e1b0_14_ff; +extern cpuop_func_noret op_e1b8_14_nf; +extern cpuop_func_noret op_e1b8_14_ff; +extern cpuop_func_noret op_e1d0_14_nf; +extern cpuop_func_noret op_e1d0_14_ff; +extern cpuop_func_noret op_e1d8_14_nf; +extern cpuop_func_noret op_e1d8_14_ff; +extern cpuop_func_noret op_e1e0_14_nf; +extern cpuop_func_noret op_e1e0_14_ff; +extern cpuop_func_noret op_e1e8_14_nf; +extern cpuop_func_noret op_e1e8_14_ff; +extern cpuop_func_noret op_e1f0_14_nf; +extern cpuop_func_noret op_e1f0_14_ff; +extern cpuop_func_noret op_e1f8_14_nf; +extern cpuop_func_noret op_e1f8_14_ff; +extern cpuop_func_noret op_e1f9_14_nf; +extern cpuop_func_noret op_e1f9_14_ff; +extern cpuop_func_noret op_e2d0_14_nf; +extern cpuop_func_noret op_e2d0_14_ff; +extern cpuop_func_noret op_e2d8_14_nf; +extern cpuop_func_noret op_e2d8_14_ff; +extern cpuop_func_noret op_e2e0_14_nf; +extern cpuop_func_noret op_e2e0_14_ff; +extern cpuop_func_noret op_e2e8_14_nf; +extern cpuop_func_noret op_e2e8_14_ff; +extern cpuop_func_noret op_e2f0_14_nf; +extern cpuop_func_noret op_e2f0_14_ff; +extern cpuop_func_noret op_e2f8_14_nf; +extern cpuop_func_noret op_e2f8_14_ff; +extern cpuop_func_noret op_e2f9_14_nf; +extern cpuop_func_noret op_e2f9_14_ff; +extern cpuop_func_noret op_e3d0_14_nf; +extern cpuop_func_noret op_e3d0_14_ff; +extern cpuop_func_noret op_e3d8_14_nf; +extern cpuop_func_noret op_e3d8_14_ff; +extern cpuop_func_noret op_e3e0_14_nf; +extern cpuop_func_noret op_e3e0_14_ff; +extern cpuop_func_noret op_e3e8_14_nf; +extern cpuop_func_noret op_e3e8_14_ff; +extern cpuop_func_noret op_e3f0_14_nf; +extern cpuop_func_noret op_e3f0_14_ff; +extern cpuop_func_noret op_e3f8_14_nf; +extern cpuop_func_noret op_e3f8_14_ff; +extern cpuop_func_noret op_e3f9_14_nf; +extern cpuop_func_noret op_e3f9_14_ff; +extern cpuop_func_noret op_e4d0_14_nf; +extern cpuop_func_noret op_e4d0_14_ff; +extern cpuop_func_noret op_e4d8_14_nf; +extern cpuop_func_noret op_e4d8_14_ff; +extern cpuop_func_noret op_e4e0_14_nf; +extern cpuop_func_noret op_e4e0_14_ff; +extern cpuop_func_noret op_e4e8_14_nf; +extern cpuop_func_noret op_e4e8_14_ff; +extern cpuop_func_noret op_e4f0_14_nf; +extern cpuop_func_noret op_e4f0_14_ff; +extern cpuop_func_noret op_e4f8_14_nf; +extern cpuop_func_noret op_e4f8_14_ff; +extern cpuop_func_noret op_e4f9_14_nf; +extern cpuop_func_noret op_e4f9_14_ff; +extern cpuop_func_noret op_e5d0_14_nf; +extern cpuop_func_noret op_e5d0_14_ff; +extern cpuop_func_noret op_e5d8_14_nf; +extern cpuop_func_noret op_e5d8_14_ff; +extern cpuop_func_noret op_e5e0_14_nf; +extern cpuop_func_noret op_e5e0_14_ff; +extern cpuop_func_noret op_e5e8_14_nf; +extern cpuop_func_noret op_e5e8_14_ff; +extern cpuop_func_noret op_e5f0_14_nf; +extern cpuop_func_noret op_e5f0_14_ff; +extern cpuop_func_noret op_e5f8_14_nf; +extern cpuop_func_noret op_e5f8_14_ff; +extern cpuop_func_noret op_e5f9_14_nf; +extern cpuop_func_noret op_e5f9_14_ff; +extern cpuop_func_noret op_e6d0_14_nf; +extern cpuop_func_noret op_e6d0_14_ff; +extern cpuop_func_noret op_e6d8_14_nf; +extern cpuop_func_noret op_e6d8_14_ff; +extern cpuop_func_noret op_e6e0_14_nf; +extern cpuop_func_noret op_e6e0_14_ff; +extern cpuop_func_noret op_e6e8_14_nf; +extern cpuop_func_noret op_e6e8_14_ff; +extern cpuop_func_noret op_e6f0_14_nf; +extern cpuop_func_noret op_e6f0_14_ff; +extern cpuop_func_noret op_e6f8_14_nf; +extern cpuop_func_noret op_e6f8_14_ff; +extern cpuop_func_noret op_e6f9_14_nf; +extern cpuop_func_noret op_e6f9_14_ff; +extern cpuop_func_noret op_e7d0_14_nf; +extern cpuop_func_noret op_e7d0_14_ff; +extern cpuop_func_noret op_e7d8_14_nf; +extern cpuop_func_noret op_e7d8_14_ff; +extern cpuop_func_noret op_e7e0_14_nf; +extern cpuop_func_noret op_e7e0_14_ff; +extern cpuop_func_noret op_e7e8_14_nf; +extern cpuop_func_noret op_e7e8_14_ff; +extern cpuop_func_noret op_e7f0_14_nf; +extern cpuop_func_noret op_e7f0_14_ff; +extern cpuop_func_noret op_e7f8_14_nf; +extern cpuop_func_noret op_e7f8_14_ff; +extern cpuop_func_noret op_e7f9_14_nf; +extern cpuop_func_noret op_e7f9_14_ff; +extern cpuop_func op_0000_20_nf; +extern cpuop_func op_0000_20_ff; +extern cpuop_func op_0010_20_nf; +extern cpuop_func op_0010_20_ff; +extern cpuop_func op_0018_20_nf; +extern cpuop_func op_0018_20_ff; +extern cpuop_func op_0020_20_nf; +extern cpuop_func op_0020_20_ff; +extern cpuop_func op_0028_20_nf; +extern cpuop_func op_0028_20_ff; +extern cpuop_func op_0030_20_nf; +extern cpuop_func op_0030_20_ff; +extern cpuop_func op_0038_20_nf; +extern cpuop_func op_0038_20_ff; +extern cpuop_func op_0039_20_nf; +extern cpuop_func op_0039_20_ff; +extern cpuop_func op_003c_20_nf; +extern cpuop_func op_003c_20_ff; +extern cpuop_func op_0040_20_nf; +extern cpuop_func op_0040_20_ff; +extern cpuop_func op_0050_20_nf; +extern cpuop_func op_0050_20_ff; +extern cpuop_func op_0058_20_nf; +extern cpuop_func op_0058_20_ff; +extern cpuop_func op_0060_20_nf; +extern cpuop_func op_0060_20_ff; +extern cpuop_func op_0068_20_nf; +extern cpuop_func op_0068_20_ff; +extern cpuop_func op_0070_20_nf; +extern cpuop_func op_0070_20_ff; +extern cpuop_func op_0078_20_nf; +extern cpuop_func op_0078_20_ff; +extern cpuop_func op_0079_20_nf; +extern cpuop_func op_0079_20_ff; +extern cpuop_func op_007c_20_nf; +extern cpuop_func op_007c_20_ff; +extern cpuop_func op_0080_20_nf; +extern cpuop_func op_0080_20_ff; +extern cpuop_func op_0090_20_nf; +extern cpuop_func op_0090_20_ff; +extern cpuop_func op_0098_20_nf; +extern cpuop_func op_0098_20_ff; +extern cpuop_func op_00a0_20_nf; +extern cpuop_func op_00a0_20_ff; +extern cpuop_func op_00a8_20_nf; +extern cpuop_func op_00a8_20_ff; +extern cpuop_func op_00b0_20_nf; +extern cpuop_func op_00b0_20_ff; +extern cpuop_func op_00b8_20_nf; +extern cpuop_func op_00b8_20_ff; +extern cpuop_func op_00b9_20_nf; +extern cpuop_func op_00b9_20_ff; +extern cpuop_func op_00d0_20_nf; +extern cpuop_func op_00d0_20_ff; +extern cpuop_func op_00e8_20_nf; +extern cpuop_func op_00e8_20_ff; +extern cpuop_func op_00f0_20_nf; +extern cpuop_func op_00f0_20_ff; +extern cpuop_func op_00f8_20_nf; +extern cpuop_func op_00f8_20_ff; +extern cpuop_func op_00f9_20_nf; +extern cpuop_func op_00f9_20_ff; +extern cpuop_func op_00fa_20_nf; +extern cpuop_func op_00fa_20_ff; +extern cpuop_func op_00fb_20_nf; +extern cpuop_func op_00fb_20_ff; +extern cpuop_func op_0100_20_nf; +extern cpuop_func op_0100_20_ff; +extern cpuop_func op_0108_20_nf; +extern cpuop_func op_0108_20_ff; +extern cpuop_func op_0110_20_nf; +extern cpuop_func op_0110_20_ff; +extern cpuop_func op_0118_20_nf; +extern cpuop_func op_0118_20_ff; +extern cpuop_func op_0120_20_nf; +extern cpuop_func op_0120_20_ff; +extern cpuop_func op_0128_20_nf; +extern cpuop_func op_0128_20_ff; +extern cpuop_func op_0130_20_nf; +extern cpuop_func op_0130_20_ff; +extern cpuop_func op_0138_20_nf; +extern cpuop_func op_0138_20_ff; +extern cpuop_func op_0139_20_nf; +extern cpuop_func op_0139_20_ff; +extern cpuop_func op_013a_20_nf; +extern cpuop_func op_013a_20_ff; +extern cpuop_func op_013b_20_nf; +extern cpuop_func op_013b_20_ff; +extern cpuop_func op_013c_20_nf; +extern cpuop_func op_013c_20_ff; +extern cpuop_func op_0140_20_nf; +extern cpuop_func op_0140_20_ff; +extern cpuop_func op_0148_20_nf; +extern cpuop_func op_0148_20_ff; +extern cpuop_func op_0150_20_nf; +extern cpuop_func op_0150_20_ff; +extern cpuop_func op_0158_20_nf; +extern cpuop_func op_0158_20_ff; +extern cpuop_func op_0160_20_nf; +extern cpuop_func op_0160_20_ff; +extern cpuop_func op_0168_20_nf; +extern cpuop_func op_0168_20_ff; +extern cpuop_func op_0170_20_nf; +extern cpuop_func op_0170_20_ff; +extern cpuop_func op_0178_20_nf; +extern cpuop_func op_0178_20_ff; +extern cpuop_func op_0179_20_nf; +extern cpuop_func op_0179_20_ff; +extern cpuop_func op_0180_20_nf; +extern cpuop_func op_0180_20_ff; +extern cpuop_func op_0188_20_nf; +extern cpuop_func op_0188_20_ff; +extern cpuop_func op_0190_20_nf; +extern cpuop_func op_0190_20_ff; +extern cpuop_func op_0198_20_nf; +extern cpuop_func op_0198_20_ff; +extern cpuop_func op_01a0_20_nf; +extern cpuop_func op_01a0_20_ff; +extern cpuop_func op_01a8_20_nf; +extern cpuop_func op_01a8_20_ff; +extern cpuop_func op_01b0_20_nf; +extern cpuop_func op_01b0_20_ff; +extern cpuop_func op_01b8_20_nf; +extern cpuop_func op_01b8_20_ff; +extern cpuop_func op_01b9_20_nf; +extern cpuop_func op_01b9_20_ff; +extern cpuop_func op_01c0_20_nf; +extern cpuop_func op_01c0_20_ff; +extern cpuop_func op_01c8_20_nf; +extern cpuop_func op_01c8_20_ff; +extern cpuop_func op_01d0_20_nf; +extern cpuop_func op_01d0_20_ff; +extern cpuop_func op_01d8_20_nf; +extern cpuop_func op_01d8_20_ff; +extern cpuop_func op_01e0_20_nf; +extern cpuop_func op_01e0_20_ff; +extern cpuop_func op_01e8_20_nf; +extern cpuop_func op_01e8_20_ff; +extern cpuop_func op_01f0_20_nf; +extern cpuop_func op_01f0_20_ff; +extern cpuop_func op_01f8_20_nf; +extern cpuop_func op_01f8_20_ff; +extern cpuop_func op_01f9_20_nf; +extern cpuop_func op_01f9_20_ff; +extern cpuop_func op_0200_20_nf; +extern cpuop_func op_0200_20_ff; +extern cpuop_func op_0210_20_nf; +extern cpuop_func op_0210_20_ff; +extern cpuop_func op_0218_20_nf; +extern cpuop_func op_0218_20_ff; +extern cpuop_func op_0220_20_nf; +extern cpuop_func op_0220_20_ff; +extern cpuop_func op_0228_20_nf; +extern cpuop_func op_0228_20_ff; +extern cpuop_func op_0230_20_nf; +extern cpuop_func op_0230_20_ff; +extern cpuop_func op_0238_20_nf; +extern cpuop_func op_0238_20_ff; +extern cpuop_func op_0239_20_nf; +extern cpuop_func op_0239_20_ff; +extern cpuop_func op_023c_20_nf; +extern cpuop_func op_023c_20_ff; +extern cpuop_func op_0240_20_nf; +extern cpuop_func op_0240_20_ff; +extern cpuop_func op_0250_20_nf; +extern cpuop_func op_0250_20_ff; +extern cpuop_func op_0258_20_nf; +extern cpuop_func op_0258_20_ff; +extern cpuop_func op_0260_20_nf; +extern cpuop_func op_0260_20_ff; +extern cpuop_func op_0268_20_nf; +extern cpuop_func op_0268_20_ff; +extern cpuop_func op_0270_20_nf; +extern cpuop_func op_0270_20_ff; +extern cpuop_func op_0278_20_nf; +extern cpuop_func op_0278_20_ff; +extern cpuop_func op_0279_20_nf; +extern cpuop_func op_0279_20_ff; +extern cpuop_func op_027c_20_nf; +extern cpuop_func op_027c_20_ff; +extern cpuop_func op_0280_20_nf; +extern cpuop_func op_0280_20_ff; +extern cpuop_func op_0290_20_nf; +extern cpuop_func op_0290_20_ff; +extern cpuop_func op_0298_20_nf; +extern cpuop_func op_0298_20_ff; +extern cpuop_func op_02a0_20_nf; +extern cpuop_func op_02a0_20_ff; +extern cpuop_func op_02a8_20_nf; +extern cpuop_func op_02a8_20_ff; +extern cpuop_func op_02b0_20_nf; +extern cpuop_func op_02b0_20_ff; +extern cpuop_func op_02b8_20_nf; +extern cpuop_func op_02b8_20_ff; +extern cpuop_func op_02b9_20_nf; +extern cpuop_func op_02b9_20_ff; +extern cpuop_func op_02d0_20_nf; +extern cpuop_func op_02d0_20_ff; +extern cpuop_func op_02e8_20_nf; +extern cpuop_func op_02e8_20_ff; +extern cpuop_func op_02f0_20_nf; +extern cpuop_func op_02f0_20_ff; +extern cpuop_func op_02f8_20_nf; +extern cpuop_func op_02f8_20_ff; +extern cpuop_func op_02f9_20_nf; +extern cpuop_func op_02f9_20_ff; +extern cpuop_func op_02fa_20_nf; +extern cpuop_func op_02fa_20_ff; +extern cpuop_func op_02fb_20_nf; +extern cpuop_func op_02fb_20_ff; +extern cpuop_func op_0400_20_nf; +extern cpuop_func op_0400_20_ff; +extern cpuop_func op_0410_20_nf; +extern cpuop_func op_0410_20_ff; +extern cpuop_func op_0418_20_nf; +extern cpuop_func op_0418_20_ff; +extern cpuop_func op_0420_20_nf; +extern cpuop_func op_0420_20_ff; +extern cpuop_func op_0428_20_nf; +extern cpuop_func op_0428_20_ff; +extern cpuop_func op_0430_20_nf; +extern cpuop_func op_0430_20_ff; +extern cpuop_func op_0438_20_nf; +extern cpuop_func op_0438_20_ff; +extern cpuop_func op_0439_20_nf; +extern cpuop_func op_0439_20_ff; +extern cpuop_func op_0440_20_nf; +extern cpuop_func op_0440_20_ff; +extern cpuop_func op_0450_20_nf; +extern cpuop_func op_0450_20_ff; +extern cpuop_func op_0458_20_nf; +extern cpuop_func op_0458_20_ff; +extern cpuop_func op_0460_20_nf; +extern cpuop_func op_0460_20_ff; +extern cpuop_func op_0468_20_nf; +extern cpuop_func op_0468_20_ff; +extern cpuop_func op_0470_20_nf; +extern cpuop_func op_0470_20_ff; +extern cpuop_func op_0478_20_nf; +extern cpuop_func op_0478_20_ff; +extern cpuop_func op_0479_20_nf; +extern cpuop_func op_0479_20_ff; +extern cpuop_func op_0480_20_nf; +extern cpuop_func op_0480_20_ff; +extern cpuop_func op_0490_20_nf; +extern cpuop_func op_0490_20_ff; +extern cpuop_func op_0498_20_nf; +extern cpuop_func op_0498_20_ff; +extern cpuop_func op_04a0_20_nf; +extern cpuop_func op_04a0_20_ff; +extern cpuop_func op_04a8_20_nf; +extern cpuop_func op_04a8_20_ff; +extern cpuop_func op_04b0_20_nf; +extern cpuop_func op_04b0_20_ff; +extern cpuop_func op_04b8_20_nf; +extern cpuop_func op_04b8_20_ff; +extern cpuop_func op_04b9_20_nf; +extern cpuop_func op_04b9_20_ff; +extern cpuop_func op_04d0_20_nf; +extern cpuop_func op_04d0_20_ff; +extern cpuop_func op_04e8_20_nf; +extern cpuop_func op_04e8_20_ff; +extern cpuop_func op_04f0_20_nf; +extern cpuop_func op_04f0_20_ff; +extern cpuop_func op_04f8_20_nf; +extern cpuop_func op_04f8_20_ff; +extern cpuop_func op_04f9_20_nf; +extern cpuop_func op_04f9_20_ff; +extern cpuop_func op_04fa_20_nf; +extern cpuop_func op_04fa_20_ff; +extern cpuop_func op_04fb_20_nf; +extern cpuop_func op_04fb_20_ff; +extern cpuop_func op_0600_20_nf; +extern cpuop_func op_0600_20_ff; +extern cpuop_func op_0610_20_nf; +extern cpuop_func op_0610_20_ff; +extern cpuop_func op_0618_20_nf; +extern cpuop_func op_0618_20_ff; +extern cpuop_func op_0620_20_nf; +extern cpuop_func op_0620_20_ff; +extern cpuop_func op_0628_20_nf; +extern cpuop_func op_0628_20_ff; +extern cpuop_func op_0630_20_nf; +extern cpuop_func op_0630_20_ff; +extern cpuop_func op_0638_20_nf; +extern cpuop_func op_0638_20_ff; +extern cpuop_func op_0639_20_nf; +extern cpuop_func op_0639_20_ff; +extern cpuop_func op_0640_20_nf; +extern cpuop_func op_0640_20_ff; +extern cpuop_func op_0650_20_nf; +extern cpuop_func op_0650_20_ff; +extern cpuop_func op_0658_20_nf; +extern cpuop_func op_0658_20_ff; +extern cpuop_func op_0660_20_nf; +extern cpuop_func op_0660_20_ff; +extern cpuop_func op_0668_20_nf; +extern cpuop_func op_0668_20_ff; +extern cpuop_func op_0670_20_nf; +extern cpuop_func op_0670_20_ff; +extern cpuop_func op_0678_20_nf; +extern cpuop_func op_0678_20_ff; +extern cpuop_func op_0679_20_nf; +extern cpuop_func op_0679_20_ff; +extern cpuop_func op_0680_20_nf; +extern cpuop_func op_0680_20_ff; +extern cpuop_func op_0690_20_nf; +extern cpuop_func op_0690_20_ff; +extern cpuop_func op_0698_20_nf; +extern cpuop_func op_0698_20_ff; +extern cpuop_func op_06a0_20_nf; +extern cpuop_func op_06a0_20_ff; +extern cpuop_func op_06a8_20_nf; +extern cpuop_func op_06a8_20_ff; +extern cpuop_func op_06b0_20_nf; +extern cpuop_func op_06b0_20_ff; +extern cpuop_func op_06b8_20_nf; +extern cpuop_func op_06b8_20_ff; +extern cpuop_func op_06b9_20_nf; +extern cpuop_func op_06b9_20_ff; +extern cpuop_func op_06c0_20_nf; +extern cpuop_func op_06c0_20_ff; +extern cpuop_func op_06c8_20_nf; +extern cpuop_func op_06c8_20_ff; +extern cpuop_func op_06d0_20_nf; +extern cpuop_func op_06d0_20_ff; +extern cpuop_func op_06e8_20_nf; +extern cpuop_func op_06e8_20_ff; +extern cpuop_func op_06f0_20_nf; +extern cpuop_func op_06f0_20_ff; +extern cpuop_func op_06f8_20_nf; +extern cpuop_func op_06f8_20_ff; +extern cpuop_func op_06f9_20_nf; +extern cpuop_func op_06f9_20_ff; +extern cpuop_func op_06fa_20_nf; +extern cpuop_func op_06fa_20_ff; +extern cpuop_func op_06fb_20_nf; +extern cpuop_func op_06fb_20_ff; +extern cpuop_func op_0800_20_nf; +extern cpuop_func op_0800_20_ff; +extern cpuop_func op_0810_20_nf; +extern cpuop_func op_0810_20_ff; +extern cpuop_func op_0818_20_nf; +extern cpuop_func op_0818_20_ff; +extern cpuop_func op_0820_20_nf; +extern cpuop_func op_0820_20_ff; +extern cpuop_func op_0828_20_nf; +extern cpuop_func op_0828_20_ff; +extern cpuop_func op_0830_20_nf; +extern cpuop_func op_0830_20_ff; +extern cpuop_func op_0838_20_nf; +extern cpuop_func op_0838_20_ff; +extern cpuop_func op_0839_20_nf; +extern cpuop_func op_0839_20_ff; +extern cpuop_func op_083a_20_nf; +extern cpuop_func op_083a_20_ff; +extern cpuop_func op_083b_20_nf; +extern cpuop_func op_083b_20_ff; +extern cpuop_func op_0840_20_nf; +extern cpuop_func op_0840_20_ff; +extern cpuop_func op_0850_20_nf; +extern cpuop_func op_0850_20_ff; +extern cpuop_func op_0858_20_nf; +extern cpuop_func op_0858_20_ff; +extern cpuop_func op_0860_20_nf; +extern cpuop_func op_0860_20_ff; +extern cpuop_func op_0868_20_nf; +extern cpuop_func op_0868_20_ff; +extern cpuop_func op_0870_20_nf; +extern cpuop_func op_0870_20_ff; +extern cpuop_func op_0878_20_nf; +extern cpuop_func op_0878_20_ff; +extern cpuop_func op_0879_20_nf; +extern cpuop_func op_0879_20_ff; +extern cpuop_func op_0880_20_nf; +extern cpuop_func op_0880_20_ff; +extern cpuop_func op_0890_20_nf; +extern cpuop_func op_0890_20_ff; +extern cpuop_func op_0898_20_nf; +extern cpuop_func op_0898_20_ff; +extern cpuop_func op_08a0_20_nf; +extern cpuop_func op_08a0_20_ff; +extern cpuop_func op_08a8_20_nf; +extern cpuop_func op_08a8_20_ff; +extern cpuop_func op_08b0_20_nf; +extern cpuop_func op_08b0_20_ff; +extern cpuop_func op_08b8_20_nf; +extern cpuop_func op_08b8_20_ff; +extern cpuop_func op_08b9_20_nf; +extern cpuop_func op_08b9_20_ff; +extern cpuop_func op_08c0_20_nf; +extern cpuop_func op_08c0_20_ff; +extern cpuop_func op_08d0_20_nf; +extern cpuop_func op_08d0_20_ff; +extern cpuop_func op_08d8_20_nf; +extern cpuop_func op_08d8_20_ff; +extern cpuop_func op_08e0_20_nf; +extern cpuop_func op_08e0_20_ff; +extern cpuop_func op_08e8_20_nf; +extern cpuop_func op_08e8_20_ff; +extern cpuop_func op_08f0_20_nf; +extern cpuop_func op_08f0_20_ff; +extern cpuop_func op_08f8_20_nf; +extern cpuop_func op_08f8_20_ff; +extern cpuop_func op_08f9_20_nf; +extern cpuop_func op_08f9_20_ff; +extern cpuop_func op_0a00_20_nf; +extern cpuop_func op_0a00_20_ff; +extern cpuop_func op_0a10_20_nf; +extern cpuop_func op_0a10_20_ff; +extern cpuop_func op_0a18_20_nf; +extern cpuop_func op_0a18_20_ff; +extern cpuop_func op_0a20_20_nf; +extern cpuop_func op_0a20_20_ff; +extern cpuop_func op_0a28_20_nf; +extern cpuop_func op_0a28_20_ff; +extern cpuop_func op_0a30_20_nf; +extern cpuop_func op_0a30_20_ff; +extern cpuop_func op_0a38_20_nf; +extern cpuop_func op_0a38_20_ff; +extern cpuop_func op_0a39_20_nf; +extern cpuop_func op_0a39_20_ff; +extern cpuop_func op_0a3c_20_nf; +extern cpuop_func op_0a3c_20_ff; +extern cpuop_func op_0a40_20_nf; +extern cpuop_func op_0a40_20_ff; +extern cpuop_func op_0a50_20_nf; +extern cpuop_func op_0a50_20_ff; +extern cpuop_func op_0a58_20_nf; +extern cpuop_func op_0a58_20_ff; +extern cpuop_func op_0a60_20_nf; +extern cpuop_func op_0a60_20_ff; +extern cpuop_func op_0a68_20_nf; +extern cpuop_func op_0a68_20_ff; +extern cpuop_func op_0a70_20_nf; +extern cpuop_func op_0a70_20_ff; +extern cpuop_func op_0a78_20_nf; +extern cpuop_func op_0a78_20_ff; +extern cpuop_func op_0a79_20_nf; +extern cpuop_func op_0a79_20_ff; +extern cpuop_func op_0a7c_20_nf; +extern cpuop_func op_0a7c_20_ff; +extern cpuop_func op_0a80_20_nf; +extern cpuop_func op_0a80_20_ff; +extern cpuop_func op_0a90_20_nf; +extern cpuop_func op_0a90_20_ff; +extern cpuop_func op_0a98_20_nf; +extern cpuop_func op_0a98_20_ff; +extern cpuop_func op_0aa0_20_nf; +extern cpuop_func op_0aa0_20_ff; +extern cpuop_func op_0aa8_20_nf; +extern cpuop_func op_0aa8_20_ff; +extern cpuop_func op_0ab0_20_nf; +extern cpuop_func op_0ab0_20_ff; +extern cpuop_func op_0ab8_20_nf; +extern cpuop_func op_0ab8_20_ff; +extern cpuop_func op_0ab9_20_nf; +extern cpuop_func op_0ab9_20_ff; +extern cpuop_func op_0ad0_20_nf; +extern cpuop_func op_0ad0_20_ff; +extern cpuop_func op_0ad8_20_nf; +extern cpuop_func op_0ad8_20_ff; +extern cpuop_func op_0ae0_20_nf; +extern cpuop_func op_0ae0_20_ff; +extern cpuop_func op_0ae8_20_nf; +extern cpuop_func op_0ae8_20_ff; +extern cpuop_func op_0af0_20_nf; +extern cpuop_func op_0af0_20_ff; +extern cpuop_func op_0af8_20_nf; +extern cpuop_func op_0af8_20_ff; +extern cpuop_func op_0af9_20_nf; +extern cpuop_func op_0af9_20_ff; +extern cpuop_func op_0c00_20_nf; +extern cpuop_func op_0c00_20_ff; +extern cpuop_func op_0c10_20_nf; +extern cpuop_func op_0c10_20_ff; +extern cpuop_func op_0c18_20_nf; +extern cpuop_func op_0c18_20_ff; +extern cpuop_func op_0c20_20_nf; +extern cpuop_func op_0c20_20_ff; +extern cpuop_func op_0c28_20_nf; +extern cpuop_func op_0c28_20_ff; +extern cpuop_func op_0c30_20_nf; +extern cpuop_func op_0c30_20_ff; +extern cpuop_func op_0c38_20_nf; +extern cpuop_func op_0c38_20_ff; +extern cpuop_func op_0c39_20_nf; +extern cpuop_func op_0c39_20_ff; +extern cpuop_func op_0c3a_20_nf; +extern cpuop_func op_0c3a_20_ff; +extern cpuop_func op_0c3b_20_nf; +extern cpuop_func op_0c3b_20_ff; +extern cpuop_func op_0c40_20_nf; +extern cpuop_func op_0c40_20_ff; +extern cpuop_func op_0c50_20_nf; +extern cpuop_func op_0c50_20_ff; +extern cpuop_func op_0c58_20_nf; +extern cpuop_func op_0c58_20_ff; +extern cpuop_func op_0c60_20_nf; +extern cpuop_func op_0c60_20_ff; +extern cpuop_func op_0c68_20_nf; +extern cpuop_func op_0c68_20_ff; +extern cpuop_func op_0c70_20_nf; +extern cpuop_func op_0c70_20_ff; +extern cpuop_func op_0c78_20_nf; +extern cpuop_func op_0c78_20_ff; +extern cpuop_func op_0c79_20_nf; +extern cpuop_func op_0c79_20_ff; +extern cpuop_func op_0c7a_20_nf; +extern cpuop_func op_0c7a_20_ff; +extern cpuop_func op_0c7b_20_nf; +extern cpuop_func op_0c7b_20_ff; +extern cpuop_func op_0c80_20_nf; +extern cpuop_func op_0c80_20_ff; +extern cpuop_func op_0c90_20_nf; +extern cpuop_func op_0c90_20_ff; +extern cpuop_func op_0c98_20_nf; +extern cpuop_func op_0c98_20_ff; +extern cpuop_func op_0ca0_20_nf; +extern cpuop_func op_0ca0_20_ff; +extern cpuop_func op_0ca8_20_nf; +extern cpuop_func op_0ca8_20_ff; +extern cpuop_func op_0cb0_20_nf; +extern cpuop_func op_0cb0_20_ff; +extern cpuop_func op_0cb8_20_nf; +extern cpuop_func op_0cb8_20_ff; +extern cpuop_func op_0cb9_20_nf; +extern cpuop_func op_0cb9_20_ff; +extern cpuop_func op_0cba_20_nf; +extern cpuop_func op_0cba_20_ff; +extern cpuop_func op_0cbb_20_nf; +extern cpuop_func op_0cbb_20_ff; +extern cpuop_func op_0cd0_20_nf; +extern cpuop_func op_0cd0_20_ff; +extern cpuop_func op_0cd8_20_nf; +extern cpuop_func op_0cd8_20_ff; +extern cpuop_func op_0ce0_20_nf; +extern cpuop_func op_0ce0_20_ff; +extern cpuop_func op_0ce8_20_nf; +extern cpuop_func op_0ce8_20_ff; +extern cpuop_func op_0cf0_20_nf; +extern cpuop_func op_0cf0_20_ff; +extern cpuop_func op_0cf8_20_nf; +extern cpuop_func op_0cf8_20_ff; +extern cpuop_func op_0cf9_20_nf; +extern cpuop_func op_0cf9_20_ff; +extern cpuop_func op_0cfc_20_nf; +extern cpuop_func op_0cfc_20_ff; +extern cpuop_func op_0e10_20_nf; +extern cpuop_func op_0e10_20_ff; +extern cpuop_func op_0e18_20_nf; +extern cpuop_func op_0e18_20_ff; +extern cpuop_func op_0e20_20_nf; +extern cpuop_func op_0e20_20_ff; +extern cpuop_func op_0e28_20_nf; +extern cpuop_func op_0e28_20_ff; +extern cpuop_func op_0e30_20_nf; +extern cpuop_func op_0e30_20_ff; +extern cpuop_func op_0e38_20_nf; +extern cpuop_func op_0e38_20_ff; +extern cpuop_func op_0e39_20_nf; +extern cpuop_func op_0e39_20_ff; +extern cpuop_func op_0e50_20_nf; +extern cpuop_func op_0e50_20_ff; +extern cpuop_func op_0e58_20_nf; +extern cpuop_func op_0e58_20_ff; +extern cpuop_func op_0e60_20_nf; +extern cpuop_func op_0e60_20_ff; +extern cpuop_func op_0e68_20_nf; +extern cpuop_func op_0e68_20_ff; +extern cpuop_func op_0e70_20_nf; +extern cpuop_func op_0e70_20_ff; +extern cpuop_func op_0e78_20_nf; +extern cpuop_func op_0e78_20_ff; +extern cpuop_func op_0e79_20_nf; +extern cpuop_func op_0e79_20_ff; +extern cpuop_func op_0e90_20_nf; +extern cpuop_func op_0e90_20_ff; +extern cpuop_func op_0e98_20_nf; +extern cpuop_func op_0e98_20_ff; +extern cpuop_func op_0ea0_20_nf; +extern cpuop_func op_0ea0_20_ff; +extern cpuop_func op_0ea8_20_nf; +extern cpuop_func op_0ea8_20_ff; +extern cpuop_func op_0eb0_20_nf; +extern cpuop_func op_0eb0_20_ff; +extern cpuop_func op_0eb8_20_nf; +extern cpuop_func op_0eb8_20_ff; +extern cpuop_func op_0eb9_20_nf; +extern cpuop_func op_0eb9_20_ff; +extern cpuop_func op_0ed0_20_nf; +extern cpuop_func op_0ed0_20_ff; +extern cpuop_func op_0ed8_20_nf; +extern cpuop_func op_0ed8_20_ff; +extern cpuop_func op_0ee0_20_nf; +extern cpuop_func op_0ee0_20_ff; +extern cpuop_func op_0ee8_20_nf; +extern cpuop_func op_0ee8_20_ff; +extern cpuop_func op_0ef0_20_nf; +extern cpuop_func op_0ef0_20_ff; +extern cpuop_func op_0ef8_20_nf; +extern cpuop_func op_0ef8_20_ff; +extern cpuop_func op_0ef9_20_nf; +extern cpuop_func op_0ef9_20_ff; +extern cpuop_func op_0efc_20_nf; +extern cpuop_func op_0efc_20_ff; +extern cpuop_func op_1000_20_nf; +extern cpuop_func op_1000_20_ff; +extern cpuop_func op_1010_20_nf; +extern cpuop_func op_1010_20_ff; +extern cpuop_func op_1018_20_nf; +extern cpuop_func op_1018_20_ff; +extern cpuop_func op_1020_20_nf; +extern cpuop_func op_1020_20_ff; +extern cpuop_func op_1028_20_nf; +extern cpuop_func op_1028_20_ff; +extern cpuop_func op_1030_20_nf; +extern cpuop_func op_1030_20_ff; +extern cpuop_func op_1038_20_nf; +extern cpuop_func op_1038_20_ff; +extern cpuop_func op_1039_20_nf; +extern cpuop_func op_1039_20_ff; +extern cpuop_func op_103a_20_nf; +extern cpuop_func op_103a_20_ff; +extern cpuop_func op_103b_20_nf; +extern cpuop_func op_103b_20_ff; +extern cpuop_func op_103c_20_nf; +extern cpuop_func op_103c_20_ff; +extern cpuop_func op_1080_20_nf; +extern cpuop_func op_1080_20_ff; +extern cpuop_func op_1090_20_nf; +extern cpuop_func op_1090_20_ff; +extern cpuop_func op_1098_20_nf; +extern cpuop_func op_1098_20_ff; +extern cpuop_func op_10a0_20_nf; +extern cpuop_func op_10a0_20_ff; +extern cpuop_func op_10a8_20_nf; +extern cpuop_func op_10a8_20_ff; +extern cpuop_func op_10b0_20_nf; +extern cpuop_func op_10b0_20_ff; +extern cpuop_func op_10b8_20_nf; +extern cpuop_func op_10b8_20_ff; +extern cpuop_func op_10b9_20_nf; +extern cpuop_func op_10b9_20_ff; +extern cpuop_func op_10ba_20_nf; +extern cpuop_func op_10ba_20_ff; +extern cpuop_func op_10bb_20_nf; +extern cpuop_func op_10bb_20_ff; +extern cpuop_func op_10bc_20_nf; +extern cpuop_func op_10bc_20_ff; +extern cpuop_func op_10c0_20_nf; +extern cpuop_func op_10c0_20_ff; +extern cpuop_func op_10d0_20_nf; +extern cpuop_func op_10d0_20_ff; +extern cpuop_func op_10d8_20_nf; +extern cpuop_func op_10d8_20_ff; +extern cpuop_func op_10e0_20_nf; +extern cpuop_func op_10e0_20_ff; +extern cpuop_func op_10e8_20_nf; +extern cpuop_func op_10e8_20_ff; +extern cpuop_func op_10f0_20_nf; +extern cpuop_func op_10f0_20_ff; +extern cpuop_func op_10f8_20_nf; +extern cpuop_func op_10f8_20_ff; +extern cpuop_func op_10f9_20_nf; +extern cpuop_func op_10f9_20_ff; +extern cpuop_func op_10fa_20_nf; +extern cpuop_func op_10fa_20_ff; +extern cpuop_func op_10fb_20_nf; +extern cpuop_func op_10fb_20_ff; +extern cpuop_func op_10fc_20_nf; +extern cpuop_func op_10fc_20_ff; +extern cpuop_func op_1100_20_nf; +extern cpuop_func op_1100_20_ff; +extern cpuop_func op_1110_20_nf; +extern cpuop_func op_1110_20_ff; +extern cpuop_func op_1118_20_nf; +extern cpuop_func op_1118_20_ff; +extern cpuop_func op_1120_20_nf; +extern cpuop_func op_1120_20_ff; +extern cpuop_func op_1128_20_nf; +extern cpuop_func op_1128_20_ff; +extern cpuop_func op_1130_20_nf; +extern cpuop_func op_1130_20_ff; +extern cpuop_func op_1138_20_nf; +extern cpuop_func op_1138_20_ff; +extern cpuop_func op_1139_20_nf; +extern cpuop_func op_1139_20_ff; +extern cpuop_func op_113a_20_nf; +extern cpuop_func op_113a_20_ff; +extern cpuop_func op_113b_20_nf; +extern cpuop_func op_113b_20_ff; +extern cpuop_func op_113c_20_nf; +extern cpuop_func op_113c_20_ff; +extern cpuop_func op_1140_20_nf; +extern cpuop_func op_1140_20_ff; +extern cpuop_func op_1150_20_nf; +extern cpuop_func op_1150_20_ff; +extern cpuop_func op_1158_20_nf; +extern cpuop_func op_1158_20_ff; +extern cpuop_func op_1160_20_nf; +extern cpuop_func op_1160_20_ff; +extern cpuop_func op_1168_20_nf; +extern cpuop_func op_1168_20_ff; +extern cpuop_func op_1170_20_nf; +extern cpuop_func op_1170_20_ff; +extern cpuop_func op_1178_20_nf; +extern cpuop_func op_1178_20_ff; +extern cpuop_func op_1179_20_nf; +extern cpuop_func op_1179_20_ff; +extern cpuop_func op_117a_20_nf; +extern cpuop_func op_117a_20_ff; +extern cpuop_func op_117b_20_nf; +extern cpuop_func op_117b_20_ff; +extern cpuop_func op_117c_20_nf; +extern cpuop_func op_117c_20_ff; +extern cpuop_func op_1180_20_nf; +extern cpuop_func op_1180_20_ff; +extern cpuop_func op_1190_20_nf; +extern cpuop_func op_1190_20_ff; +extern cpuop_func op_1198_20_nf; +extern cpuop_func op_1198_20_ff; +extern cpuop_func op_11a0_20_nf; +extern cpuop_func op_11a0_20_ff; +extern cpuop_func op_11a8_20_nf; +extern cpuop_func op_11a8_20_ff; +extern cpuop_func op_11b0_20_nf; +extern cpuop_func op_11b0_20_ff; +extern cpuop_func op_11b8_20_nf; +extern cpuop_func op_11b8_20_ff; +extern cpuop_func op_11b9_20_nf; +extern cpuop_func op_11b9_20_ff; +extern cpuop_func op_11ba_20_nf; +extern cpuop_func op_11ba_20_ff; +extern cpuop_func op_11bb_20_nf; +extern cpuop_func op_11bb_20_ff; +extern cpuop_func op_11bc_20_nf; +extern cpuop_func op_11bc_20_ff; +extern cpuop_func op_11c0_20_nf; +extern cpuop_func op_11c0_20_ff; +extern cpuop_func op_11d0_20_nf; +extern cpuop_func op_11d0_20_ff; +extern cpuop_func op_11d8_20_nf; +extern cpuop_func op_11d8_20_ff; +extern cpuop_func op_11e0_20_nf; +extern cpuop_func op_11e0_20_ff; +extern cpuop_func op_11e8_20_nf; +extern cpuop_func op_11e8_20_ff; +extern cpuop_func op_11f0_20_nf; +extern cpuop_func op_11f0_20_ff; +extern cpuop_func op_11f8_20_nf; +extern cpuop_func op_11f8_20_ff; +extern cpuop_func op_11f9_20_nf; +extern cpuop_func op_11f9_20_ff; +extern cpuop_func op_11fa_20_nf; +extern cpuop_func op_11fa_20_ff; +extern cpuop_func op_11fb_20_nf; +extern cpuop_func op_11fb_20_ff; +extern cpuop_func op_11fc_20_nf; +extern cpuop_func op_11fc_20_ff; +extern cpuop_func op_13c0_20_nf; +extern cpuop_func op_13c0_20_ff; +extern cpuop_func op_13d0_20_nf; +extern cpuop_func op_13d0_20_ff; +extern cpuop_func op_13d8_20_nf; +extern cpuop_func op_13d8_20_ff; +extern cpuop_func op_13e0_20_nf; +extern cpuop_func op_13e0_20_ff; +extern cpuop_func op_13e8_20_nf; +extern cpuop_func op_13e8_20_ff; +extern cpuop_func op_13f0_20_nf; +extern cpuop_func op_13f0_20_ff; +extern cpuop_func op_13f8_20_nf; +extern cpuop_func op_13f8_20_ff; +extern cpuop_func op_13f9_20_nf; +extern cpuop_func op_13f9_20_ff; +extern cpuop_func op_13fa_20_nf; +extern cpuop_func op_13fa_20_ff; +extern cpuop_func op_13fb_20_nf; +extern cpuop_func op_13fb_20_ff; +extern cpuop_func op_13fc_20_nf; +extern cpuop_func op_13fc_20_ff; +extern cpuop_func op_2000_20_nf; +extern cpuop_func op_2000_20_ff; +extern cpuop_func op_2008_20_nf; +extern cpuop_func op_2008_20_ff; +extern cpuop_func op_2010_20_nf; +extern cpuop_func op_2010_20_ff; +extern cpuop_func op_2018_20_nf; +extern cpuop_func op_2018_20_ff; +extern cpuop_func op_2020_20_nf; +extern cpuop_func op_2020_20_ff; +extern cpuop_func op_2028_20_nf; +extern cpuop_func op_2028_20_ff; +extern cpuop_func op_2030_20_nf; +extern cpuop_func op_2030_20_ff; +extern cpuop_func op_2038_20_nf; +extern cpuop_func op_2038_20_ff; +extern cpuop_func op_2039_20_nf; +extern cpuop_func op_2039_20_ff; +extern cpuop_func op_203a_20_nf; +extern cpuop_func op_203a_20_ff; +extern cpuop_func op_203b_20_nf; +extern cpuop_func op_203b_20_ff; +extern cpuop_func op_203c_20_nf; +extern cpuop_func op_203c_20_ff; +extern cpuop_func op_2040_20_nf; +extern cpuop_func op_2040_20_ff; +extern cpuop_func op_2048_20_nf; +extern cpuop_func op_2048_20_ff; +extern cpuop_func op_2050_20_nf; +extern cpuop_func op_2050_20_ff; +extern cpuop_func op_2058_20_nf; +extern cpuop_func op_2058_20_ff; +extern cpuop_func op_2060_20_nf; +extern cpuop_func op_2060_20_ff; +extern cpuop_func op_2068_20_nf; +extern cpuop_func op_2068_20_ff; +extern cpuop_func op_2070_20_nf; +extern cpuop_func op_2070_20_ff; +extern cpuop_func op_2078_20_nf; +extern cpuop_func op_2078_20_ff; +extern cpuop_func op_2079_20_nf; +extern cpuop_func op_2079_20_ff; +extern cpuop_func op_207a_20_nf; +extern cpuop_func op_207a_20_ff; +extern cpuop_func op_207b_20_nf; +extern cpuop_func op_207b_20_ff; +extern cpuop_func op_207c_20_nf; +extern cpuop_func op_207c_20_ff; +extern cpuop_func op_2080_20_nf; +extern cpuop_func op_2080_20_ff; +extern cpuop_func op_2088_20_nf; +extern cpuop_func op_2088_20_ff; +extern cpuop_func op_2090_20_nf; +extern cpuop_func op_2090_20_ff; +extern cpuop_func op_2098_20_nf; +extern cpuop_func op_2098_20_ff; +extern cpuop_func op_20a0_20_nf; +extern cpuop_func op_20a0_20_ff; +extern cpuop_func op_20a8_20_nf; +extern cpuop_func op_20a8_20_ff; +extern cpuop_func op_20b0_20_nf; +extern cpuop_func op_20b0_20_ff; +extern cpuop_func op_20b8_20_nf; +extern cpuop_func op_20b8_20_ff; +extern cpuop_func op_20b9_20_nf; +extern cpuop_func op_20b9_20_ff; +extern cpuop_func op_20ba_20_nf; +extern cpuop_func op_20ba_20_ff; +extern cpuop_func op_20bb_20_nf; +extern cpuop_func op_20bb_20_ff; +extern cpuop_func op_20bc_20_nf; +extern cpuop_func op_20bc_20_ff; +extern cpuop_func op_20c0_20_nf; +extern cpuop_func op_20c0_20_ff; +extern cpuop_func op_20c8_20_nf; +extern cpuop_func op_20c8_20_ff; +extern cpuop_func op_20d0_20_nf; +extern cpuop_func op_20d0_20_ff; +extern cpuop_func op_20d8_20_nf; +extern cpuop_func op_20d8_20_ff; +extern cpuop_func op_20e0_20_nf; +extern cpuop_func op_20e0_20_ff; +extern cpuop_func op_20e8_20_nf; +extern cpuop_func op_20e8_20_ff; +extern cpuop_func op_20f0_20_nf; +extern cpuop_func op_20f0_20_ff; +extern cpuop_func op_20f8_20_nf; +extern cpuop_func op_20f8_20_ff; +extern cpuop_func op_20f9_20_nf; +extern cpuop_func op_20f9_20_ff; +extern cpuop_func op_20fa_20_nf; +extern cpuop_func op_20fa_20_ff; +extern cpuop_func op_20fb_20_nf; +extern cpuop_func op_20fb_20_ff; +extern cpuop_func op_20fc_20_nf; +extern cpuop_func op_20fc_20_ff; +extern cpuop_func op_2100_20_nf; +extern cpuop_func op_2100_20_ff; +extern cpuop_func op_2108_20_nf; +extern cpuop_func op_2108_20_ff; +extern cpuop_func op_2110_20_nf; +extern cpuop_func op_2110_20_ff; +extern cpuop_func op_2118_20_nf; +extern cpuop_func op_2118_20_ff; +extern cpuop_func op_2120_20_nf; +extern cpuop_func op_2120_20_ff; +extern cpuop_func op_2128_20_nf; +extern cpuop_func op_2128_20_ff; +extern cpuop_func op_2130_20_nf; +extern cpuop_func op_2130_20_ff; +extern cpuop_func op_2138_20_nf; +extern cpuop_func op_2138_20_ff; +extern cpuop_func op_2139_20_nf; +extern cpuop_func op_2139_20_ff; +extern cpuop_func op_213a_20_nf; +extern cpuop_func op_213a_20_ff; +extern cpuop_func op_213b_20_nf; +extern cpuop_func op_213b_20_ff; +extern cpuop_func op_213c_20_nf; +extern cpuop_func op_213c_20_ff; +extern cpuop_func op_2140_20_nf; +extern cpuop_func op_2140_20_ff; +extern cpuop_func op_2148_20_nf; +extern cpuop_func op_2148_20_ff; +extern cpuop_func op_2150_20_nf; +extern cpuop_func op_2150_20_ff; +extern cpuop_func op_2158_20_nf; +extern cpuop_func op_2158_20_ff; +extern cpuop_func op_2160_20_nf; +extern cpuop_func op_2160_20_ff; +extern cpuop_func op_2168_20_nf; +extern cpuop_func op_2168_20_ff; +extern cpuop_func op_2170_20_nf; +extern cpuop_func op_2170_20_ff; +extern cpuop_func op_2178_20_nf; +extern cpuop_func op_2178_20_ff; +extern cpuop_func op_2179_20_nf; +extern cpuop_func op_2179_20_ff; +extern cpuop_func op_217a_20_nf; +extern cpuop_func op_217a_20_ff; +extern cpuop_func op_217b_20_nf; +extern cpuop_func op_217b_20_ff; +extern cpuop_func op_217c_20_nf; +extern cpuop_func op_217c_20_ff; +extern cpuop_func op_2180_20_nf; +extern cpuop_func op_2180_20_ff; +extern cpuop_func op_2188_20_nf; +extern cpuop_func op_2188_20_ff; +extern cpuop_func op_2190_20_nf; +extern cpuop_func op_2190_20_ff; +extern cpuop_func op_2198_20_nf; +extern cpuop_func op_2198_20_ff; +extern cpuop_func op_21a0_20_nf; +extern cpuop_func op_21a0_20_ff; +extern cpuop_func op_21a8_20_nf; +extern cpuop_func op_21a8_20_ff; +extern cpuop_func op_21b0_20_nf; +extern cpuop_func op_21b0_20_ff; +extern cpuop_func op_21b8_20_nf; +extern cpuop_func op_21b8_20_ff; +extern cpuop_func op_21b9_20_nf; +extern cpuop_func op_21b9_20_ff; +extern cpuop_func op_21ba_20_nf; +extern cpuop_func op_21ba_20_ff; +extern cpuop_func op_21bb_20_nf; +extern cpuop_func op_21bb_20_ff; +extern cpuop_func op_21bc_20_nf; +extern cpuop_func op_21bc_20_ff; +extern cpuop_func op_21c0_20_nf; +extern cpuop_func op_21c0_20_ff; +extern cpuop_func op_21c8_20_nf; +extern cpuop_func op_21c8_20_ff; +extern cpuop_func op_21d0_20_nf; +extern cpuop_func op_21d0_20_ff; +extern cpuop_func op_21d8_20_nf; +extern cpuop_func op_21d8_20_ff; +extern cpuop_func op_21e0_20_nf; +extern cpuop_func op_21e0_20_ff; +extern cpuop_func op_21e8_20_nf; +extern cpuop_func op_21e8_20_ff; +extern cpuop_func op_21f0_20_nf; +extern cpuop_func op_21f0_20_ff; +extern cpuop_func op_21f8_20_nf; +extern cpuop_func op_21f8_20_ff; +extern cpuop_func op_21f9_20_nf; +extern cpuop_func op_21f9_20_ff; +extern cpuop_func op_21fa_20_nf; +extern cpuop_func op_21fa_20_ff; +extern cpuop_func op_21fb_20_nf; +extern cpuop_func op_21fb_20_ff; +extern cpuop_func op_21fc_20_nf; +extern cpuop_func op_21fc_20_ff; +extern cpuop_func op_23c0_20_nf; +extern cpuop_func op_23c0_20_ff; +extern cpuop_func op_23c8_20_nf; +extern cpuop_func op_23c8_20_ff; +extern cpuop_func op_23d0_20_nf; +extern cpuop_func op_23d0_20_ff; +extern cpuop_func op_23d8_20_nf; +extern cpuop_func op_23d8_20_ff; +extern cpuop_func op_23e0_20_nf; +extern cpuop_func op_23e0_20_ff; +extern cpuop_func op_23e8_20_nf; +extern cpuop_func op_23e8_20_ff; +extern cpuop_func op_23f0_20_nf; +extern cpuop_func op_23f0_20_ff; +extern cpuop_func op_23f8_20_nf; +extern cpuop_func op_23f8_20_ff; +extern cpuop_func op_23f9_20_nf; +extern cpuop_func op_23f9_20_ff; +extern cpuop_func op_23fa_20_nf; +extern cpuop_func op_23fa_20_ff; +extern cpuop_func op_23fb_20_nf; +extern cpuop_func op_23fb_20_ff; +extern cpuop_func op_23fc_20_nf; +extern cpuop_func op_23fc_20_ff; +extern cpuop_func op_3000_20_nf; +extern cpuop_func op_3000_20_ff; +extern cpuop_func op_3008_20_nf; +extern cpuop_func op_3008_20_ff; +extern cpuop_func op_3010_20_nf; +extern cpuop_func op_3010_20_ff; +extern cpuop_func op_3018_20_nf; +extern cpuop_func op_3018_20_ff; +extern cpuop_func op_3020_20_nf; +extern cpuop_func op_3020_20_ff; +extern cpuop_func op_3028_20_nf; +extern cpuop_func op_3028_20_ff; +extern cpuop_func op_3030_20_nf; +extern cpuop_func op_3030_20_ff; +extern cpuop_func op_3038_20_nf; +extern cpuop_func op_3038_20_ff; +extern cpuop_func op_3039_20_nf; +extern cpuop_func op_3039_20_ff; +extern cpuop_func op_303a_20_nf; +extern cpuop_func op_303a_20_ff; +extern cpuop_func op_303b_20_nf; +extern cpuop_func op_303b_20_ff; +extern cpuop_func op_303c_20_nf; +extern cpuop_func op_303c_20_ff; +extern cpuop_func op_3040_20_nf; +extern cpuop_func op_3040_20_ff; +extern cpuop_func op_3048_20_nf; +extern cpuop_func op_3048_20_ff; +extern cpuop_func op_3050_20_nf; +extern cpuop_func op_3050_20_ff; +extern cpuop_func op_3058_20_nf; +extern cpuop_func op_3058_20_ff; +extern cpuop_func op_3060_20_nf; +extern cpuop_func op_3060_20_ff; +extern cpuop_func op_3068_20_nf; +extern cpuop_func op_3068_20_ff; +extern cpuop_func op_3070_20_nf; +extern cpuop_func op_3070_20_ff; +extern cpuop_func op_3078_20_nf; +extern cpuop_func op_3078_20_ff; +extern cpuop_func op_3079_20_nf; +extern cpuop_func op_3079_20_ff; +extern cpuop_func op_307a_20_nf; +extern cpuop_func op_307a_20_ff; +extern cpuop_func op_307b_20_nf; +extern cpuop_func op_307b_20_ff; +extern cpuop_func op_307c_20_nf; +extern cpuop_func op_307c_20_ff; +extern cpuop_func op_3080_20_nf; +extern cpuop_func op_3080_20_ff; +extern cpuop_func op_3088_20_nf; +extern cpuop_func op_3088_20_ff; +extern cpuop_func op_3090_20_nf; +extern cpuop_func op_3090_20_ff; +extern cpuop_func op_3098_20_nf; +extern cpuop_func op_3098_20_ff; +extern cpuop_func op_30a0_20_nf; +extern cpuop_func op_30a0_20_ff; +extern cpuop_func op_30a8_20_nf; +extern cpuop_func op_30a8_20_ff; +extern cpuop_func op_30b0_20_nf; +extern cpuop_func op_30b0_20_ff; +extern cpuop_func op_30b8_20_nf; +extern cpuop_func op_30b8_20_ff; +extern cpuop_func op_30b9_20_nf; +extern cpuop_func op_30b9_20_ff; +extern cpuop_func op_30ba_20_nf; +extern cpuop_func op_30ba_20_ff; +extern cpuop_func op_30bb_20_nf; +extern cpuop_func op_30bb_20_ff; +extern cpuop_func op_30bc_20_nf; +extern cpuop_func op_30bc_20_ff; +extern cpuop_func op_30c0_20_nf; +extern cpuop_func op_30c0_20_ff; +extern cpuop_func op_30c8_20_nf; +extern cpuop_func op_30c8_20_ff; +extern cpuop_func op_30d0_20_nf; +extern cpuop_func op_30d0_20_ff; +extern cpuop_func op_30d8_20_nf; +extern cpuop_func op_30d8_20_ff; +extern cpuop_func op_30e0_20_nf; +extern cpuop_func op_30e0_20_ff; +extern cpuop_func op_30e8_20_nf; +extern cpuop_func op_30e8_20_ff; +extern cpuop_func op_30f0_20_nf; +extern cpuop_func op_30f0_20_ff; +extern cpuop_func op_30f8_20_nf; +extern cpuop_func op_30f8_20_ff; +extern cpuop_func op_30f9_20_nf; +extern cpuop_func op_30f9_20_ff; +extern cpuop_func op_30fa_20_nf; +extern cpuop_func op_30fa_20_ff; +extern cpuop_func op_30fb_20_nf; +extern cpuop_func op_30fb_20_ff; +extern cpuop_func op_30fc_20_nf; +extern cpuop_func op_30fc_20_ff; +extern cpuop_func op_3100_20_nf; +extern cpuop_func op_3100_20_ff; +extern cpuop_func op_3108_20_nf; +extern cpuop_func op_3108_20_ff; +extern cpuop_func op_3110_20_nf; +extern cpuop_func op_3110_20_ff; +extern cpuop_func op_3118_20_nf; +extern cpuop_func op_3118_20_ff; +extern cpuop_func op_3120_20_nf; +extern cpuop_func op_3120_20_ff; +extern cpuop_func op_3128_20_nf; +extern cpuop_func op_3128_20_ff; +extern cpuop_func op_3130_20_nf; +extern cpuop_func op_3130_20_ff; +extern cpuop_func op_3138_20_nf; +extern cpuop_func op_3138_20_ff; +extern cpuop_func op_3139_20_nf; +extern cpuop_func op_3139_20_ff; +extern cpuop_func op_313a_20_nf; +extern cpuop_func op_313a_20_ff; +extern cpuop_func op_313b_20_nf; +extern cpuop_func op_313b_20_ff; +extern cpuop_func op_313c_20_nf; +extern cpuop_func op_313c_20_ff; +extern cpuop_func op_3140_20_nf; +extern cpuop_func op_3140_20_ff; +extern cpuop_func op_3148_20_nf; +extern cpuop_func op_3148_20_ff; +extern cpuop_func op_3150_20_nf; +extern cpuop_func op_3150_20_ff; +extern cpuop_func op_3158_20_nf; +extern cpuop_func op_3158_20_ff; +extern cpuop_func op_3160_20_nf; +extern cpuop_func op_3160_20_ff; +extern cpuop_func op_3168_20_nf; +extern cpuop_func op_3168_20_ff; +extern cpuop_func op_3170_20_nf; +extern cpuop_func op_3170_20_ff; +extern cpuop_func op_3178_20_nf; +extern cpuop_func op_3178_20_ff; +extern cpuop_func op_3179_20_nf; +extern cpuop_func op_3179_20_ff; +extern cpuop_func op_317a_20_nf; +extern cpuop_func op_317a_20_ff; +extern cpuop_func op_317b_20_nf; +extern cpuop_func op_317b_20_ff; +extern cpuop_func op_317c_20_nf; +extern cpuop_func op_317c_20_ff; +extern cpuop_func op_3180_20_nf; +extern cpuop_func op_3180_20_ff; +extern cpuop_func op_3188_20_nf; +extern cpuop_func op_3188_20_ff; +extern cpuop_func op_3190_20_nf; +extern cpuop_func op_3190_20_ff; +extern cpuop_func op_3198_20_nf; +extern cpuop_func op_3198_20_ff; +extern cpuop_func op_31a0_20_nf; +extern cpuop_func op_31a0_20_ff; +extern cpuop_func op_31a8_20_nf; +extern cpuop_func op_31a8_20_ff; +extern cpuop_func op_31b0_20_nf; +extern cpuop_func op_31b0_20_ff; +extern cpuop_func op_31b8_20_nf; +extern cpuop_func op_31b8_20_ff; +extern cpuop_func op_31b9_20_nf; +extern cpuop_func op_31b9_20_ff; +extern cpuop_func op_31ba_20_nf; +extern cpuop_func op_31ba_20_ff; +extern cpuop_func op_31bb_20_nf; +extern cpuop_func op_31bb_20_ff; +extern cpuop_func op_31bc_20_nf; +extern cpuop_func op_31bc_20_ff; +extern cpuop_func op_31c0_20_nf; +extern cpuop_func op_31c0_20_ff; +extern cpuop_func op_31c8_20_nf; +extern cpuop_func op_31c8_20_ff; +extern cpuop_func op_31d0_20_nf; +extern cpuop_func op_31d0_20_ff; +extern cpuop_func op_31d8_20_nf; +extern cpuop_func op_31d8_20_ff; +extern cpuop_func op_31e0_20_nf; +extern cpuop_func op_31e0_20_ff; +extern cpuop_func op_31e8_20_nf; +extern cpuop_func op_31e8_20_ff; +extern cpuop_func op_31f0_20_nf; +extern cpuop_func op_31f0_20_ff; +extern cpuop_func op_31f8_20_nf; +extern cpuop_func op_31f8_20_ff; +extern cpuop_func op_31f9_20_nf; +extern cpuop_func op_31f9_20_ff; +extern cpuop_func op_31fa_20_nf; +extern cpuop_func op_31fa_20_ff; +extern cpuop_func op_31fb_20_nf; +extern cpuop_func op_31fb_20_ff; +extern cpuop_func op_31fc_20_nf; +extern cpuop_func op_31fc_20_ff; +extern cpuop_func op_33c0_20_nf; +extern cpuop_func op_33c0_20_ff; +extern cpuop_func op_33c8_20_nf; +extern cpuop_func op_33c8_20_ff; +extern cpuop_func op_33d0_20_nf; +extern cpuop_func op_33d0_20_ff; +extern cpuop_func op_33d8_20_nf; +extern cpuop_func op_33d8_20_ff; +extern cpuop_func op_33e0_20_nf; +extern cpuop_func op_33e0_20_ff; +extern cpuop_func op_33e8_20_nf; +extern cpuop_func op_33e8_20_ff; +extern cpuop_func op_33f0_20_nf; +extern cpuop_func op_33f0_20_ff; +extern cpuop_func op_33f8_20_nf; +extern cpuop_func op_33f8_20_ff; +extern cpuop_func op_33f9_20_nf; +extern cpuop_func op_33f9_20_ff; +extern cpuop_func op_33fa_20_nf; +extern cpuop_func op_33fa_20_ff; +extern cpuop_func op_33fb_20_nf; +extern cpuop_func op_33fb_20_ff; +extern cpuop_func op_33fc_20_nf; +extern cpuop_func op_33fc_20_ff; +extern cpuop_func op_4000_20_nf; +extern cpuop_func op_4000_20_ff; +extern cpuop_func op_4010_20_nf; +extern cpuop_func op_4010_20_ff; +extern cpuop_func op_4018_20_nf; +extern cpuop_func op_4018_20_ff; +extern cpuop_func op_4020_20_nf; +extern cpuop_func op_4020_20_ff; +extern cpuop_func op_4028_20_nf; +extern cpuop_func op_4028_20_ff; +extern cpuop_func op_4030_20_nf; +extern cpuop_func op_4030_20_ff; +extern cpuop_func op_4038_20_nf; +extern cpuop_func op_4038_20_ff; +extern cpuop_func op_4039_20_nf; +extern cpuop_func op_4039_20_ff; +extern cpuop_func op_4040_20_nf; +extern cpuop_func op_4040_20_ff; +extern cpuop_func op_4050_20_nf; +extern cpuop_func op_4050_20_ff; +extern cpuop_func op_4058_20_nf; +extern cpuop_func op_4058_20_ff; +extern cpuop_func op_4060_20_nf; +extern cpuop_func op_4060_20_ff; +extern cpuop_func op_4068_20_nf; +extern cpuop_func op_4068_20_ff; +extern cpuop_func op_4070_20_nf; +extern cpuop_func op_4070_20_ff; +extern cpuop_func op_4078_20_nf; +extern cpuop_func op_4078_20_ff; +extern cpuop_func op_4079_20_nf; +extern cpuop_func op_4079_20_ff; +extern cpuop_func op_4080_20_nf; +extern cpuop_func op_4080_20_ff; +extern cpuop_func op_4090_20_nf; +extern cpuop_func op_4090_20_ff; +extern cpuop_func op_4098_20_nf; +extern cpuop_func op_4098_20_ff; +extern cpuop_func op_40a0_20_nf; +extern cpuop_func op_40a0_20_ff; +extern cpuop_func op_40a8_20_nf; +extern cpuop_func op_40a8_20_ff; +extern cpuop_func op_40b0_20_nf; +extern cpuop_func op_40b0_20_ff; +extern cpuop_func op_40b8_20_nf; +extern cpuop_func op_40b8_20_ff; +extern cpuop_func op_40b9_20_nf; +extern cpuop_func op_40b9_20_ff; +extern cpuop_func op_40c0_20_nf; +extern cpuop_func op_40c0_20_ff; +extern cpuop_func op_40d0_20_nf; +extern cpuop_func op_40d0_20_ff; +extern cpuop_func op_40d8_20_nf; +extern cpuop_func op_40d8_20_ff; +extern cpuop_func op_40e0_20_nf; +extern cpuop_func op_40e0_20_ff; +extern cpuop_func op_40e8_20_nf; +extern cpuop_func op_40e8_20_ff; +extern cpuop_func op_40f0_20_nf; +extern cpuop_func op_40f0_20_ff; +extern cpuop_func op_40f8_20_nf; +extern cpuop_func op_40f8_20_ff; +extern cpuop_func op_40f9_20_nf; +extern cpuop_func op_40f9_20_ff; +extern cpuop_func op_4100_20_nf; +extern cpuop_func op_4100_20_ff; +extern cpuop_func op_4110_20_nf; +extern cpuop_func op_4110_20_ff; +extern cpuop_func op_4118_20_nf; +extern cpuop_func op_4118_20_ff; +extern cpuop_func op_4120_20_nf; +extern cpuop_func op_4120_20_ff; +extern cpuop_func op_4128_20_nf; +extern cpuop_func op_4128_20_ff; +extern cpuop_func op_4130_20_nf; +extern cpuop_func op_4130_20_ff; +extern cpuop_func op_4138_20_nf; +extern cpuop_func op_4138_20_ff; +extern cpuop_func op_4139_20_nf; +extern cpuop_func op_4139_20_ff; +extern cpuop_func op_413a_20_nf; +extern cpuop_func op_413a_20_ff; +extern cpuop_func op_413b_20_nf; +extern cpuop_func op_413b_20_ff; +extern cpuop_func op_413c_20_nf; +extern cpuop_func op_413c_20_ff; +extern cpuop_func op_4180_20_nf; +extern cpuop_func op_4180_20_ff; +extern cpuop_func op_4190_20_nf; +extern cpuop_func op_4190_20_ff; +extern cpuop_func op_4198_20_nf; +extern cpuop_func op_4198_20_ff; +extern cpuop_func op_41a0_20_nf; +extern cpuop_func op_41a0_20_ff; +extern cpuop_func op_41a8_20_nf; +extern cpuop_func op_41a8_20_ff; +extern cpuop_func op_41b0_20_nf; +extern cpuop_func op_41b0_20_ff; +extern cpuop_func op_41b8_20_nf; +extern cpuop_func op_41b8_20_ff; +extern cpuop_func op_41b9_20_nf; +extern cpuop_func op_41b9_20_ff; +extern cpuop_func op_41ba_20_nf; +extern cpuop_func op_41ba_20_ff; +extern cpuop_func op_41bb_20_nf; +extern cpuop_func op_41bb_20_ff; +extern cpuop_func op_41bc_20_nf; +extern cpuop_func op_41bc_20_ff; +extern cpuop_func op_41d0_20_nf; +extern cpuop_func op_41d0_20_ff; +extern cpuop_func op_41e8_20_nf; +extern cpuop_func op_41e8_20_ff; +extern cpuop_func op_41f0_20_nf; +extern cpuop_func op_41f0_20_ff; +extern cpuop_func op_41f8_20_nf; +extern cpuop_func op_41f8_20_ff; +extern cpuop_func op_41f9_20_nf; +extern cpuop_func op_41f9_20_ff; +extern cpuop_func op_41fa_20_nf; +extern cpuop_func op_41fa_20_ff; +extern cpuop_func op_41fb_20_nf; +extern cpuop_func op_41fb_20_ff; +extern cpuop_func op_4200_20_nf; +extern cpuop_func op_4200_20_ff; +extern cpuop_func op_4210_20_nf; +extern cpuop_func op_4210_20_ff; +extern cpuop_func op_4218_20_nf; +extern cpuop_func op_4218_20_ff; +extern cpuop_func op_4220_20_nf; +extern cpuop_func op_4220_20_ff; +extern cpuop_func op_4228_20_nf; +extern cpuop_func op_4228_20_ff; +extern cpuop_func op_4230_20_nf; +extern cpuop_func op_4230_20_ff; +extern cpuop_func op_4238_20_nf; +extern cpuop_func op_4238_20_ff; +extern cpuop_func op_4239_20_nf; +extern cpuop_func op_4239_20_ff; +extern cpuop_func op_4240_20_nf; +extern cpuop_func op_4240_20_ff; +extern cpuop_func op_4250_20_nf; +extern cpuop_func op_4250_20_ff; +extern cpuop_func op_4258_20_nf; +extern cpuop_func op_4258_20_ff; +extern cpuop_func op_4260_20_nf; +extern cpuop_func op_4260_20_ff; +extern cpuop_func op_4268_20_nf; +extern cpuop_func op_4268_20_ff; +extern cpuop_func op_4270_20_nf; +extern cpuop_func op_4270_20_ff; +extern cpuop_func op_4278_20_nf; +extern cpuop_func op_4278_20_ff; +extern cpuop_func op_4279_20_nf; +extern cpuop_func op_4279_20_ff; +extern cpuop_func op_4280_20_nf; +extern cpuop_func op_4280_20_ff; +extern cpuop_func op_4290_20_nf; +extern cpuop_func op_4290_20_ff; +extern cpuop_func op_4298_20_nf; +extern cpuop_func op_4298_20_ff; +extern cpuop_func op_42a0_20_nf; +extern cpuop_func op_42a0_20_ff; +extern cpuop_func op_42a8_20_nf; +extern cpuop_func op_42a8_20_ff; +extern cpuop_func op_42b0_20_nf; +extern cpuop_func op_42b0_20_ff; +extern cpuop_func op_42b8_20_nf; +extern cpuop_func op_42b8_20_ff; +extern cpuop_func op_42b9_20_nf; +extern cpuop_func op_42b9_20_ff; +extern cpuop_func op_42c0_20_nf; +extern cpuop_func op_42c0_20_ff; +extern cpuop_func op_42d0_20_nf; +extern cpuop_func op_42d0_20_ff; +extern cpuop_func op_42d8_20_nf; +extern cpuop_func op_42d8_20_ff; +extern cpuop_func op_42e0_20_nf; +extern cpuop_func op_42e0_20_ff; +extern cpuop_func op_42e8_20_nf; +extern cpuop_func op_42e8_20_ff; +extern cpuop_func op_42f0_20_nf; +extern cpuop_func op_42f0_20_ff; +extern cpuop_func op_42f8_20_nf; +extern cpuop_func op_42f8_20_ff; +extern cpuop_func op_42f9_20_nf; +extern cpuop_func op_42f9_20_ff; +extern cpuop_func op_4400_20_nf; +extern cpuop_func op_4400_20_ff; +extern cpuop_func op_4410_20_nf; +extern cpuop_func op_4410_20_ff; +extern cpuop_func op_4418_20_nf; +extern cpuop_func op_4418_20_ff; +extern cpuop_func op_4420_20_nf; +extern cpuop_func op_4420_20_ff; +extern cpuop_func op_4428_20_nf; +extern cpuop_func op_4428_20_ff; +extern cpuop_func op_4430_20_nf; +extern cpuop_func op_4430_20_ff; +extern cpuop_func op_4438_20_nf; +extern cpuop_func op_4438_20_ff; +extern cpuop_func op_4439_20_nf; +extern cpuop_func op_4439_20_ff; +extern cpuop_func op_4440_20_nf; +extern cpuop_func op_4440_20_ff; +extern cpuop_func op_4450_20_nf; +extern cpuop_func op_4450_20_ff; +extern cpuop_func op_4458_20_nf; +extern cpuop_func op_4458_20_ff; +extern cpuop_func op_4460_20_nf; +extern cpuop_func op_4460_20_ff; +extern cpuop_func op_4468_20_nf; +extern cpuop_func op_4468_20_ff; +extern cpuop_func op_4470_20_nf; +extern cpuop_func op_4470_20_ff; +extern cpuop_func op_4478_20_nf; +extern cpuop_func op_4478_20_ff; +extern cpuop_func op_4479_20_nf; +extern cpuop_func op_4479_20_ff; +extern cpuop_func op_4480_20_nf; +extern cpuop_func op_4480_20_ff; +extern cpuop_func op_4490_20_nf; +extern cpuop_func op_4490_20_ff; +extern cpuop_func op_4498_20_nf; +extern cpuop_func op_4498_20_ff; +extern cpuop_func op_44a0_20_nf; +extern cpuop_func op_44a0_20_ff; +extern cpuop_func op_44a8_20_nf; +extern cpuop_func op_44a8_20_ff; +extern cpuop_func op_44b0_20_nf; +extern cpuop_func op_44b0_20_ff; +extern cpuop_func op_44b8_20_nf; +extern cpuop_func op_44b8_20_ff; +extern cpuop_func op_44b9_20_nf; +extern cpuop_func op_44b9_20_ff; +extern cpuop_func op_44c0_20_nf; +extern cpuop_func op_44c0_20_ff; +extern cpuop_func op_44d0_20_nf; +extern cpuop_func op_44d0_20_ff; +extern cpuop_func op_44d8_20_nf; +extern cpuop_func op_44d8_20_ff; +extern cpuop_func op_44e0_20_nf; +extern cpuop_func op_44e0_20_ff; +extern cpuop_func op_44e8_20_nf; +extern cpuop_func op_44e8_20_ff; +extern cpuop_func op_44f0_20_nf; +extern cpuop_func op_44f0_20_ff; +extern cpuop_func op_44f8_20_nf; +extern cpuop_func op_44f8_20_ff; +extern cpuop_func op_44f9_20_nf; +extern cpuop_func op_44f9_20_ff; +extern cpuop_func op_44fa_20_nf; +extern cpuop_func op_44fa_20_ff; +extern cpuop_func op_44fb_20_nf; +extern cpuop_func op_44fb_20_ff; +extern cpuop_func op_44fc_20_nf; +extern cpuop_func op_44fc_20_ff; +extern cpuop_func op_4600_20_nf; +extern cpuop_func op_4600_20_ff; +extern cpuop_func op_4610_20_nf; +extern cpuop_func op_4610_20_ff; +extern cpuop_func op_4618_20_nf; +extern cpuop_func op_4618_20_ff; +extern cpuop_func op_4620_20_nf; +extern cpuop_func op_4620_20_ff; +extern cpuop_func op_4628_20_nf; +extern cpuop_func op_4628_20_ff; +extern cpuop_func op_4630_20_nf; +extern cpuop_func op_4630_20_ff; +extern cpuop_func op_4638_20_nf; +extern cpuop_func op_4638_20_ff; +extern cpuop_func op_4639_20_nf; +extern cpuop_func op_4639_20_ff; +extern cpuop_func op_4640_20_nf; +extern cpuop_func op_4640_20_ff; +extern cpuop_func op_4650_20_nf; +extern cpuop_func op_4650_20_ff; +extern cpuop_func op_4658_20_nf; +extern cpuop_func op_4658_20_ff; +extern cpuop_func op_4660_20_nf; +extern cpuop_func op_4660_20_ff; +extern cpuop_func op_4668_20_nf; +extern cpuop_func op_4668_20_ff; +extern cpuop_func op_4670_20_nf; +extern cpuop_func op_4670_20_ff; +extern cpuop_func op_4678_20_nf; +extern cpuop_func op_4678_20_ff; +extern cpuop_func op_4679_20_nf; +extern cpuop_func op_4679_20_ff; +extern cpuop_func op_4680_20_nf; +extern cpuop_func op_4680_20_ff; +extern cpuop_func op_4690_20_nf; +extern cpuop_func op_4690_20_ff; +extern cpuop_func op_4698_20_nf; +extern cpuop_func op_4698_20_ff; +extern cpuop_func op_46a0_20_nf; +extern cpuop_func op_46a0_20_ff; +extern cpuop_func op_46a8_20_nf; +extern cpuop_func op_46a8_20_ff; +extern cpuop_func op_46b0_20_nf; +extern cpuop_func op_46b0_20_ff; +extern cpuop_func op_46b8_20_nf; +extern cpuop_func op_46b8_20_ff; +extern cpuop_func op_46b9_20_nf; +extern cpuop_func op_46b9_20_ff; +extern cpuop_func op_46c0_20_nf; +extern cpuop_func op_46c0_20_ff; +extern cpuop_func op_46d0_20_nf; +extern cpuop_func op_46d0_20_ff; +extern cpuop_func op_46d8_20_nf; +extern cpuop_func op_46d8_20_ff; +extern cpuop_func op_46e0_20_nf; +extern cpuop_func op_46e0_20_ff; +extern cpuop_func op_46e8_20_nf; +extern cpuop_func op_46e8_20_ff; +extern cpuop_func op_46f0_20_nf; +extern cpuop_func op_46f0_20_ff; +extern cpuop_func op_46f8_20_nf; +extern cpuop_func op_46f8_20_ff; +extern cpuop_func op_46f9_20_nf; +extern cpuop_func op_46f9_20_ff; +extern cpuop_func op_46fa_20_nf; +extern cpuop_func op_46fa_20_ff; +extern cpuop_func op_46fb_20_nf; +extern cpuop_func op_46fb_20_ff; +extern cpuop_func op_46fc_20_nf; +extern cpuop_func op_46fc_20_ff; +extern cpuop_func op_4800_20_nf; +extern cpuop_func op_4800_20_ff; +extern cpuop_func op_4808_20_nf; +extern cpuop_func op_4808_20_ff; +extern cpuop_func op_4810_20_nf; +extern cpuop_func op_4810_20_ff; +extern cpuop_func op_4818_20_nf; +extern cpuop_func op_4818_20_ff; +extern cpuop_func op_4820_20_nf; +extern cpuop_func op_4820_20_ff; +extern cpuop_func op_4828_20_nf; +extern cpuop_func op_4828_20_ff; +extern cpuop_func op_4830_20_nf; +extern cpuop_func op_4830_20_ff; +extern cpuop_func op_4838_20_nf; +extern cpuop_func op_4838_20_ff; +extern cpuop_func op_4839_20_nf; +extern cpuop_func op_4839_20_ff; +extern cpuop_func op_4840_20_nf; +extern cpuop_func op_4840_20_ff; +extern cpuop_func op_4848_20_nf; +extern cpuop_func op_4848_20_ff; +extern cpuop_func op_4850_20_nf; +extern cpuop_func op_4850_20_ff; +extern cpuop_func op_4868_20_nf; +extern cpuop_func op_4868_20_ff; +extern cpuop_func op_4870_20_nf; +extern cpuop_func op_4870_20_ff; +extern cpuop_func op_4878_20_nf; +extern cpuop_func op_4878_20_ff; +extern cpuop_func op_4879_20_nf; +extern cpuop_func op_4879_20_ff; +extern cpuop_func op_487a_20_nf; +extern cpuop_func op_487a_20_ff; +extern cpuop_func op_487b_20_nf; +extern cpuop_func op_487b_20_ff; +extern cpuop_func op_4880_20_nf; +extern cpuop_func op_4880_20_ff; +extern cpuop_func op_4890_20_nf; +extern cpuop_func op_4890_20_ff; +extern cpuop_func op_48a0_20_nf; +extern cpuop_func op_48a0_20_ff; +extern cpuop_func op_48a8_20_nf; +extern cpuop_func op_48a8_20_ff; +extern cpuop_func op_48b0_20_nf; +extern cpuop_func op_48b0_20_ff; +extern cpuop_func op_48b8_20_nf; +extern cpuop_func op_48b8_20_ff; +extern cpuop_func op_48b9_20_nf; +extern cpuop_func op_48b9_20_ff; +extern cpuop_func op_48c0_20_nf; +extern cpuop_func op_48c0_20_ff; +extern cpuop_func op_48d0_20_nf; +extern cpuop_func op_48d0_20_ff; +extern cpuop_func op_48e0_20_nf; +extern cpuop_func op_48e0_20_ff; +extern cpuop_func op_48e8_20_nf; +extern cpuop_func op_48e8_20_ff; +extern cpuop_func op_48f0_20_nf; +extern cpuop_func op_48f0_20_ff; +extern cpuop_func op_48f8_20_nf; +extern cpuop_func op_48f8_20_ff; +extern cpuop_func op_48f9_20_nf; +extern cpuop_func op_48f9_20_ff; +extern cpuop_func op_49c0_20_nf; +extern cpuop_func op_49c0_20_ff; +extern cpuop_func op_4a00_20_nf; +extern cpuop_func op_4a00_20_ff; +extern cpuop_func op_4a10_20_nf; +extern cpuop_func op_4a10_20_ff; +extern cpuop_func op_4a18_20_nf; +extern cpuop_func op_4a18_20_ff; +extern cpuop_func op_4a20_20_nf; +extern cpuop_func op_4a20_20_ff; +extern cpuop_func op_4a28_20_nf; +extern cpuop_func op_4a28_20_ff; +extern cpuop_func op_4a30_20_nf; +extern cpuop_func op_4a30_20_ff; +extern cpuop_func op_4a38_20_nf; +extern cpuop_func op_4a38_20_ff; +extern cpuop_func op_4a39_20_nf; +extern cpuop_func op_4a39_20_ff; +extern cpuop_func op_4a3a_20_nf; +extern cpuop_func op_4a3a_20_ff; +extern cpuop_func op_4a3b_20_nf; +extern cpuop_func op_4a3b_20_ff; +extern cpuop_func op_4a3c_20_nf; +extern cpuop_func op_4a3c_20_ff; +extern cpuop_func op_4a40_20_nf; +extern cpuop_func op_4a40_20_ff; +extern cpuop_func op_4a48_20_nf; +extern cpuop_func op_4a48_20_ff; +extern cpuop_func op_4a50_20_nf; +extern cpuop_func op_4a50_20_ff; +extern cpuop_func op_4a58_20_nf; +extern cpuop_func op_4a58_20_ff; +extern cpuop_func op_4a60_20_nf; +extern cpuop_func op_4a60_20_ff; +extern cpuop_func op_4a68_20_nf; +extern cpuop_func op_4a68_20_ff; +extern cpuop_func op_4a70_20_nf; +extern cpuop_func op_4a70_20_ff; +extern cpuop_func op_4a78_20_nf; +extern cpuop_func op_4a78_20_ff; +extern cpuop_func op_4a79_20_nf; +extern cpuop_func op_4a79_20_ff; +extern cpuop_func op_4a7a_20_nf; +extern cpuop_func op_4a7a_20_ff; +extern cpuop_func op_4a7b_20_nf; +extern cpuop_func op_4a7b_20_ff; +extern cpuop_func op_4a7c_20_nf; +extern cpuop_func op_4a7c_20_ff; +extern cpuop_func op_4a80_20_nf; +extern cpuop_func op_4a80_20_ff; +extern cpuop_func op_4a88_20_nf; +extern cpuop_func op_4a88_20_ff; +extern cpuop_func op_4a90_20_nf; +extern cpuop_func op_4a90_20_ff; +extern cpuop_func op_4a98_20_nf; +extern cpuop_func op_4a98_20_ff; +extern cpuop_func op_4aa0_20_nf; +extern cpuop_func op_4aa0_20_ff; +extern cpuop_func op_4aa8_20_nf; +extern cpuop_func op_4aa8_20_ff; +extern cpuop_func op_4ab0_20_nf; +extern cpuop_func op_4ab0_20_ff; +extern cpuop_func op_4ab8_20_nf; +extern cpuop_func op_4ab8_20_ff; +extern cpuop_func op_4ab9_20_nf; +extern cpuop_func op_4ab9_20_ff; +extern cpuop_func op_4aba_20_nf; +extern cpuop_func op_4aba_20_ff; +extern cpuop_func op_4abb_20_nf; +extern cpuop_func op_4abb_20_ff; +extern cpuop_func op_4abc_20_nf; +extern cpuop_func op_4abc_20_ff; +extern cpuop_func op_4ac0_20_nf; +extern cpuop_func op_4ac0_20_ff; +extern cpuop_func op_4ad0_20_nf; +extern cpuop_func op_4ad0_20_ff; +extern cpuop_func op_4ad8_20_nf; +extern cpuop_func op_4ad8_20_ff; +extern cpuop_func op_4ae0_20_nf; +extern cpuop_func op_4ae0_20_ff; +extern cpuop_func op_4ae8_20_nf; +extern cpuop_func op_4ae8_20_ff; +extern cpuop_func op_4af0_20_nf; +extern cpuop_func op_4af0_20_ff; +extern cpuop_func op_4af8_20_nf; +extern cpuop_func op_4af8_20_ff; +extern cpuop_func op_4af9_20_nf; +extern cpuop_func op_4af9_20_ff; +extern cpuop_func op_4c00_20_nf; +extern cpuop_func op_4c00_20_ff; +extern cpuop_func op_4c10_20_nf; +extern cpuop_func op_4c10_20_ff; +extern cpuop_func op_4c18_20_nf; +extern cpuop_func op_4c18_20_ff; +extern cpuop_func op_4c20_20_nf; +extern cpuop_func op_4c20_20_ff; +extern cpuop_func op_4c28_20_nf; +extern cpuop_func op_4c28_20_ff; +extern cpuop_func op_4c30_20_nf; +extern cpuop_func op_4c30_20_ff; +extern cpuop_func op_4c38_20_nf; +extern cpuop_func op_4c38_20_ff; +extern cpuop_func op_4c39_20_nf; +extern cpuop_func op_4c39_20_ff; +extern cpuop_func op_4c3a_20_nf; +extern cpuop_func op_4c3a_20_ff; +extern cpuop_func op_4c3b_20_nf; +extern cpuop_func op_4c3b_20_ff; +extern cpuop_func op_4c3c_20_nf; +extern cpuop_func op_4c3c_20_ff; +extern cpuop_func op_4c40_20_nf; +extern cpuop_func op_4c40_20_ff; +extern cpuop_func op_4c50_20_nf; +extern cpuop_func op_4c50_20_ff; +extern cpuop_func op_4c58_20_nf; +extern cpuop_func op_4c58_20_ff; +extern cpuop_func op_4c60_20_nf; +extern cpuop_func op_4c60_20_ff; +extern cpuop_func op_4c68_20_nf; +extern cpuop_func op_4c68_20_ff; +extern cpuop_func op_4c70_20_nf; +extern cpuop_func op_4c70_20_ff; +extern cpuop_func op_4c78_20_nf; +extern cpuop_func op_4c78_20_ff; +extern cpuop_func op_4c79_20_nf; +extern cpuop_func op_4c79_20_ff; +extern cpuop_func op_4c7a_20_nf; +extern cpuop_func op_4c7a_20_ff; +extern cpuop_func op_4c7b_20_nf; +extern cpuop_func op_4c7b_20_ff; +extern cpuop_func op_4c7c_20_nf; +extern cpuop_func op_4c7c_20_ff; +extern cpuop_func op_4c90_20_nf; +extern cpuop_func op_4c90_20_ff; +extern cpuop_func op_4c98_20_nf; +extern cpuop_func op_4c98_20_ff; +extern cpuop_func op_4ca8_20_nf; +extern cpuop_func op_4ca8_20_ff; +extern cpuop_func op_4cb0_20_nf; +extern cpuop_func op_4cb0_20_ff; +extern cpuop_func op_4cb8_20_nf; +extern cpuop_func op_4cb8_20_ff; +extern cpuop_func op_4cb9_20_nf; +extern cpuop_func op_4cb9_20_ff; +extern cpuop_func op_4cba_20_nf; +extern cpuop_func op_4cba_20_ff; +extern cpuop_func op_4cbb_20_nf; +extern cpuop_func op_4cbb_20_ff; +extern cpuop_func op_4cd0_20_nf; +extern cpuop_func op_4cd0_20_ff; +extern cpuop_func op_4cd8_20_nf; +extern cpuop_func op_4cd8_20_ff; +extern cpuop_func op_4ce8_20_nf; +extern cpuop_func op_4ce8_20_ff; +extern cpuop_func op_4cf0_20_nf; +extern cpuop_func op_4cf0_20_ff; +extern cpuop_func op_4cf8_20_nf; +extern cpuop_func op_4cf8_20_ff; +extern cpuop_func op_4cf9_20_nf; +extern cpuop_func op_4cf9_20_ff; +extern cpuop_func op_4cfa_20_nf; +extern cpuop_func op_4cfa_20_ff; +extern cpuop_func op_4cfb_20_nf; +extern cpuop_func op_4cfb_20_ff; +extern cpuop_func op_4e40_20_nf; +extern cpuop_func op_4e40_20_ff; +extern cpuop_func op_4e50_20_nf; +extern cpuop_func op_4e50_20_ff; +extern cpuop_func op_4e58_20_nf; +extern cpuop_func op_4e58_20_ff; +extern cpuop_func op_4e60_20_nf; +extern cpuop_func op_4e60_20_ff; +extern cpuop_func op_4e68_20_nf; +extern cpuop_func op_4e68_20_ff; +extern cpuop_func op_4e70_20_nf; +extern cpuop_func op_4e70_20_ff; +extern cpuop_func op_4e71_20_nf; +extern cpuop_func op_4e71_20_ff; +extern cpuop_func op_4e72_20_nf; +extern cpuop_func op_4e72_20_ff; +extern cpuop_func op_4e73_20_nf; +extern cpuop_func op_4e73_20_ff; +extern cpuop_func op_4e74_20_nf; +extern cpuop_func op_4e74_20_ff; +extern cpuop_func op_4e75_20_nf; +extern cpuop_func op_4e75_20_ff; +extern cpuop_func op_4e76_20_nf; +extern cpuop_func op_4e76_20_ff; +extern cpuop_func op_4e77_20_nf; +extern cpuop_func op_4e77_20_ff; +extern cpuop_func op_4e7a_20_nf; +extern cpuop_func op_4e7a_20_ff; +extern cpuop_func op_4e7b_20_nf; +extern cpuop_func op_4e7b_20_ff; +extern cpuop_func op_4e90_20_nf; +extern cpuop_func op_4e90_20_ff; +extern cpuop_func op_4ea8_20_nf; +extern cpuop_func op_4ea8_20_ff; +extern cpuop_func op_4eb0_20_nf; +extern cpuop_func op_4eb0_20_ff; +extern cpuop_func op_4eb8_20_nf; +extern cpuop_func op_4eb8_20_ff; +extern cpuop_func op_4eb9_20_nf; +extern cpuop_func op_4eb9_20_ff; +extern cpuop_func op_4eba_20_nf; +extern cpuop_func op_4eba_20_ff; +extern cpuop_func op_4ebb_20_nf; +extern cpuop_func op_4ebb_20_ff; +extern cpuop_func op_4ed0_20_nf; +extern cpuop_func op_4ed0_20_ff; +extern cpuop_func op_4ee8_20_nf; +extern cpuop_func op_4ee8_20_ff; +extern cpuop_func op_4ef0_20_nf; +extern cpuop_func op_4ef0_20_ff; +extern cpuop_func op_4ef8_20_nf; +extern cpuop_func op_4ef8_20_ff; +extern cpuop_func op_4ef9_20_nf; +extern cpuop_func op_4ef9_20_ff; +extern cpuop_func op_4efa_20_nf; +extern cpuop_func op_4efa_20_ff; +extern cpuop_func op_4efb_20_nf; +extern cpuop_func op_4efb_20_ff; +extern cpuop_func op_5000_20_nf; +extern cpuop_func op_5000_20_ff; +extern cpuop_func op_5010_20_nf; +extern cpuop_func op_5010_20_ff; +extern cpuop_func op_5018_20_nf; +extern cpuop_func op_5018_20_ff; +extern cpuop_func op_5020_20_nf; +extern cpuop_func op_5020_20_ff; +extern cpuop_func op_5028_20_nf; +extern cpuop_func op_5028_20_ff; +extern cpuop_func op_5030_20_nf; +extern cpuop_func op_5030_20_ff; +extern cpuop_func op_5038_20_nf; +extern cpuop_func op_5038_20_ff; +extern cpuop_func op_5039_20_nf; +extern cpuop_func op_5039_20_ff; +extern cpuop_func op_5040_20_nf; +extern cpuop_func op_5040_20_ff; +extern cpuop_func op_5048_20_nf; +extern cpuop_func op_5048_20_ff; +extern cpuop_func op_5050_20_nf; +extern cpuop_func op_5050_20_ff; +extern cpuop_func op_5058_20_nf; +extern cpuop_func op_5058_20_ff; +extern cpuop_func op_5060_20_nf; +extern cpuop_func op_5060_20_ff; +extern cpuop_func op_5068_20_nf; +extern cpuop_func op_5068_20_ff; +extern cpuop_func op_5070_20_nf; +extern cpuop_func op_5070_20_ff; +extern cpuop_func op_5078_20_nf; +extern cpuop_func op_5078_20_ff; +extern cpuop_func op_5079_20_nf; +extern cpuop_func op_5079_20_ff; +extern cpuop_func op_5080_20_nf; +extern cpuop_func op_5080_20_ff; +extern cpuop_func op_5088_20_nf; +extern cpuop_func op_5088_20_ff; +extern cpuop_func op_5090_20_nf; +extern cpuop_func op_5090_20_ff; +extern cpuop_func op_5098_20_nf; +extern cpuop_func op_5098_20_ff; +extern cpuop_func op_50a0_20_nf; +extern cpuop_func op_50a0_20_ff; +extern cpuop_func op_50a8_20_nf; +extern cpuop_func op_50a8_20_ff; +extern cpuop_func op_50b0_20_nf; +extern cpuop_func op_50b0_20_ff; +extern cpuop_func op_50b8_20_nf; +extern cpuop_func op_50b8_20_ff; +extern cpuop_func op_50b9_20_nf; +extern cpuop_func op_50b9_20_ff; +extern cpuop_func op_50c0_20_nf; +extern cpuop_func op_50c0_20_ff; +extern cpuop_func op_50c8_20_nf; +extern cpuop_func op_50c8_20_ff; +extern cpuop_func op_50d0_20_nf; +extern cpuop_func op_50d0_20_ff; +extern cpuop_func op_50d8_20_nf; +extern cpuop_func op_50d8_20_ff; +extern cpuop_func op_50e0_20_nf; +extern cpuop_func op_50e0_20_ff; +extern cpuop_func op_50e8_20_nf; +extern cpuop_func op_50e8_20_ff; +extern cpuop_func op_50f0_20_nf; +extern cpuop_func op_50f0_20_ff; +extern cpuop_func op_50f8_20_nf; +extern cpuop_func op_50f8_20_ff; +extern cpuop_func op_50f9_20_nf; +extern cpuop_func op_50f9_20_ff; +extern cpuop_func op_50fa_20_nf; +extern cpuop_func op_50fa_20_ff; +extern cpuop_func op_50fb_20_nf; +extern cpuop_func op_50fb_20_ff; +extern cpuop_func op_50fc_20_nf; +extern cpuop_func op_50fc_20_ff; +extern cpuop_func op_5100_20_nf; +extern cpuop_func op_5100_20_ff; +extern cpuop_func op_5110_20_nf; +extern cpuop_func op_5110_20_ff; +extern cpuop_func op_5118_20_nf; +extern cpuop_func op_5118_20_ff; +extern cpuop_func op_5120_20_nf; +extern cpuop_func op_5120_20_ff; +extern cpuop_func op_5128_20_nf; +extern cpuop_func op_5128_20_ff; +extern cpuop_func op_5130_20_nf; +extern cpuop_func op_5130_20_ff; +extern cpuop_func op_5138_20_nf; +extern cpuop_func op_5138_20_ff; +extern cpuop_func op_5139_20_nf; +extern cpuop_func op_5139_20_ff; +extern cpuop_func op_5140_20_nf; +extern cpuop_func op_5140_20_ff; +extern cpuop_func op_5148_20_nf; +extern cpuop_func op_5148_20_ff; +extern cpuop_func op_5150_20_nf; +extern cpuop_func op_5150_20_ff; +extern cpuop_func op_5158_20_nf; +extern cpuop_func op_5158_20_ff; +extern cpuop_func op_5160_20_nf; +extern cpuop_func op_5160_20_ff; +extern cpuop_func op_5168_20_nf; +extern cpuop_func op_5168_20_ff; +extern cpuop_func op_5170_20_nf; +extern cpuop_func op_5170_20_ff; +extern cpuop_func op_5178_20_nf; +extern cpuop_func op_5178_20_ff; +extern cpuop_func op_5179_20_nf; +extern cpuop_func op_5179_20_ff; +extern cpuop_func op_5180_20_nf; +extern cpuop_func op_5180_20_ff; +extern cpuop_func op_5188_20_nf; +extern cpuop_func op_5188_20_ff; +extern cpuop_func op_5190_20_nf; +extern cpuop_func op_5190_20_ff; +extern cpuop_func op_5198_20_nf; +extern cpuop_func op_5198_20_ff; +extern cpuop_func op_51a0_20_nf; +extern cpuop_func op_51a0_20_ff; +extern cpuop_func op_51a8_20_nf; +extern cpuop_func op_51a8_20_ff; +extern cpuop_func op_51b0_20_nf; +extern cpuop_func op_51b0_20_ff; +extern cpuop_func op_51b8_20_nf; +extern cpuop_func op_51b8_20_ff; +extern cpuop_func op_51b9_20_nf; +extern cpuop_func op_51b9_20_ff; +extern cpuop_func op_51c0_20_nf; +extern cpuop_func op_51c0_20_ff; +extern cpuop_func op_51c8_20_nf; +extern cpuop_func op_51c8_20_ff; +extern cpuop_func op_51d0_20_nf; +extern cpuop_func op_51d0_20_ff; +extern cpuop_func op_51d8_20_nf; +extern cpuop_func op_51d8_20_ff; +extern cpuop_func op_51e0_20_nf; +extern cpuop_func op_51e0_20_ff; +extern cpuop_func op_51e8_20_nf; +extern cpuop_func op_51e8_20_ff; +extern cpuop_func op_51f0_20_nf; +extern cpuop_func op_51f0_20_ff; +extern cpuop_func op_51f8_20_nf; +extern cpuop_func op_51f8_20_ff; +extern cpuop_func op_51f9_20_nf; +extern cpuop_func op_51f9_20_ff; +extern cpuop_func op_51fa_20_nf; +extern cpuop_func op_51fa_20_ff; +extern cpuop_func op_51fb_20_nf; +extern cpuop_func op_51fb_20_ff; +extern cpuop_func op_51fc_20_nf; +extern cpuop_func op_51fc_20_ff; +extern cpuop_func op_52c0_20_nf; +extern cpuop_func op_52c0_20_ff; +extern cpuop_func op_52c8_20_nf; +extern cpuop_func op_52c8_20_ff; +extern cpuop_func op_52d0_20_nf; +extern cpuop_func op_52d0_20_ff; +extern cpuop_func op_52d8_20_nf; +extern cpuop_func op_52d8_20_ff; +extern cpuop_func op_52e0_20_nf; +extern cpuop_func op_52e0_20_ff; +extern cpuop_func op_52e8_20_nf; +extern cpuop_func op_52e8_20_ff; +extern cpuop_func op_52f0_20_nf; +extern cpuop_func op_52f0_20_ff; +extern cpuop_func op_52f8_20_nf; +extern cpuop_func op_52f8_20_ff; +extern cpuop_func op_52f9_20_nf; +extern cpuop_func op_52f9_20_ff; +extern cpuop_func op_52fa_20_nf; +extern cpuop_func op_52fa_20_ff; +extern cpuop_func op_52fb_20_nf; +extern cpuop_func op_52fb_20_ff; +extern cpuop_func op_52fc_20_nf; +extern cpuop_func op_52fc_20_ff; +extern cpuop_func op_53c0_20_nf; +extern cpuop_func op_53c0_20_ff; +extern cpuop_func op_53c8_20_nf; +extern cpuop_func op_53c8_20_ff; +extern cpuop_func op_53d0_20_nf; +extern cpuop_func op_53d0_20_ff; +extern cpuop_func op_53d8_20_nf; +extern cpuop_func op_53d8_20_ff; +extern cpuop_func op_53e0_20_nf; +extern cpuop_func op_53e0_20_ff; +extern cpuop_func op_53e8_20_nf; +extern cpuop_func op_53e8_20_ff; +extern cpuop_func op_53f0_20_nf; +extern cpuop_func op_53f0_20_ff; +extern cpuop_func op_53f8_20_nf; +extern cpuop_func op_53f8_20_ff; +extern cpuop_func op_53f9_20_nf; +extern cpuop_func op_53f9_20_ff; +extern cpuop_func op_53fa_20_nf; +extern cpuop_func op_53fa_20_ff; +extern cpuop_func op_53fb_20_nf; +extern cpuop_func op_53fb_20_ff; +extern cpuop_func op_53fc_20_nf; +extern cpuop_func op_53fc_20_ff; +extern cpuop_func op_54c0_20_nf; +extern cpuop_func op_54c0_20_ff; +extern cpuop_func op_54c8_20_nf; +extern cpuop_func op_54c8_20_ff; +extern cpuop_func op_54d0_20_nf; +extern cpuop_func op_54d0_20_ff; +extern cpuop_func op_54d8_20_nf; +extern cpuop_func op_54d8_20_ff; +extern cpuop_func op_54e0_20_nf; +extern cpuop_func op_54e0_20_ff; +extern cpuop_func op_54e8_20_nf; +extern cpuop_func op_54e8_20_ff; +extern cpuop_func op_54f0_20_nf; +extern cpuop_func op_54f0_20_ff; +extern cpuop_func op_54f8_20_nf; +extern cpuop_func op_54f8_20_ff; +extern cpuop_func op_54f9_20_nf; +extern cpuop_func op_54f9_20_ff; +extern cpuop_func op_54fa_20_nf; +extern cpuop_func op_54fa_20_ff; +extern cpuop_func op_54fb_20_nf; +extern cpuop_func op_54fb_20_ff; +extern cpuop_func op_54fc_20_nf; +extern cpuop_func op_54fc_20_ff; +extern cpuop_func op_55c0_20_nf; +extern cpuop_func op_55c0_20_ff; +extern cpuop_func op_55c8_20_nf; +extern cpuop_func op_55c8_20_ff; +extern cpuop_func op_55d0_20_nf; +extern cpuop_func op_55d0_20_ff; +extern cpuop_func op_55d8_20_nf; +extern cpuop_func op_55d8_20_ff; +extern cpuop_func op_55e0_20_nf; +extern cpuop_func op_55e0_20_ff; +extern cpuop_func op_55e8_20_nf; +extern cpuop_func op_55e8_20_ff; +extern cpuop_func op_55f0_20_nf; +extern cpuop_func op_55f0_20_ff; +extern cpuop_func op_55f8_20_nf; +extern cpuop_func op_55f8_20_ff; +extern cpuop_func op_55f9_20_nf; +extern cpuop_func op_55f9_20_ff; +extern cpuop_func op_55fa_20_nf; +extern cpuop_func op_55fa_20_ff; +extern cpuop_func op_55fb_20_nf; +extern cpuop_func op_55fb_20_ff; +extern cpuop_func op_55fc_20_nf; +extern cpuop_func op_55fc_20_ff; +extern cpuop_func op_56c0_20_nf; +extern cpuop_func op_56c0_20_ff; +extern cpuop_func op_56c8_20_nf; +extern cpuop_func op_56c8_20_ff; +extern cpuop_func op_56d0_20_nf; +extern cpuop_func op_56d0_20_ff; +extern cpuop_func op_56d8_20_nf; +extern cpuop_func op_56d8_20_ff; +extern cpuop_func op_56e0_20_nf; +extern cpuop_func op_56e0_20_ff; +extern cpuop_func op_56e8_20_nf; +extern cpuop_func op_56e8_20_ff; +extern cpuop_func op_56f0_20_nf; +extern cpuop_func op_56f0_20_ff; +extern cpuop_func op_56f8_20_nf; +extern cpuop_func op_56f8_20_ff; +extern cpuop_func op_56f9_20_nf; +extern cpuop_func op_56f9_20_ff; +extern cpuop_func op_56fa_20_nf; +extern cpuop_func op_56fa_20_ff; +extern cpuop_func op_56fb_20_nf; +extern cpuop_func op_56fb_20_ff; +extern cpuop_func op_56fc_20_nf; +extern cpuop_func op_56fc_20_ff; +extern cpuop_func op_57c0_20_nf; +extern cpuop_func op_57c0_20_ff; +extern cpuop_func op_57c8_20_nf; +extern cpuop_func op_57c8_20_ff; +extern cpuop_func op_57d0_20_nf; +extern cpuop_func op_57d0_20_ff; +extern cpuop_func op_57d8_20_nf; +extern cpuop_func op_57d8_20_ff; +extern cpuop_func op_57e0_20_nf; +extern cpuop_func op_57e0_20_ff; +extern cpuop_func op_57e8_20_nf; +extern cpuop_func op_57e8_20_ff; +extern cpuop_func op_57f0_20_nf; +extern cpuop_func op_57f0_20_ff; +extern cpuop_func op_57f8_20_nf; +extern cpuop_func op_57f8_20_ff; +extern cpuop_func op_57f9_20_nf; +extern cpuop_func op_57f9_20_ff; +extern cpuop_func op_57fa_20_nf; +extern cpuop_func op_57fa_20_ff; +extern cpuop_func op_57fb_20_nf; +extern cpuop_func op_57fb_20_ff; +extern cpuop_func op_57fc_20_nf; +extern cpuop_func op_57fc_20_ff; +extern cpuop_func op_58c0_20_nf; +extern cpuop_func op_58c0_20_ff; +extern cpuop_func op_58c8_20_nf; +extern cpuop_func op_58c8_20_ff; +extern cpuop_func op_58d0_20_nf; +extern cpuop_func op_58d0_20_ff; +extern cpuop_func op_58d8_20_nf; +extern cpuop_func op_58d8_20_ff; +extern cpuop_func op_58e0_20_nf; +extern cpuop_func op_58e0_20_ff; +extern cpuop_func op_58e8_20_nf; +extern cpuop_func op_58e8_20_ff; +extern cpuop_func op_58f0_20_nf; +extern cpuop_func op_58f0_20_ff; +extern cpuop_func op_58f8_20_nf; +extern cpuop_func op_58f8_20_ff; +extern cpuop_func op_58f9_20_nf; +extern cpuop_func op_58f9_20_ff; +extern cpuop_func op_58fa_20_nf; +extern cpuop_func op_58fa_20_ff; +extern cpuop_func op_58fb_20_nf; +extern cpuop_func op_58fb_20_ff; +extern cpuop_func op_58fc_20_nf; +extern cpuop_func op_58fc_20_ff; +extern cpuop_func op_59c0_20_nf; +extern cpuop_func op_59c0_20_ff; +extern cpuop_func op_59c8_20_nf; +extern cpuop_func op_59c8_20_ff; +extern cpuop_func op_59d0_20_nf; +extern cpuop_func op_59d0_20_ff; +extern cpuop_func op_59d8_20_nf; +extern cpuop_func op_59d8_20_ff; +extern cpuop_func op_59e0_20_nf; +extern cpuop_func op_59e0_20_ff; +extern cpuop_func op_59e8_20_nf; +extern cpuop_func op_59e8_20_ff; +extern cpuop_func op_59f0_20_nf; +extern cpuop_func op_59f0_20_ff; +extern cpuop_func op_59f8_20_nf; +extern cpuop_func op_59f8_20_ff; +extern cpuop_func op_59f9_20_nf; +extern cpuop_func op_59f9_20_ff; +extern cpuop_func op_59fa_20_nf; +extern cpuop_func op_59fa_20_ff; +extern cpuop_func op_59fb_20_nf; +extern cpuop_func op_59fb_20_ff; +extern cpuop_func op_59fc_20_nf; +extern cpuop_func op_59fc_20_ff; +extern cpuop_func op_5ac0_20_nf; +extern cpuop_func op_5ac0_20_ff; +extern cpuop_func op_5ac8_20_nf; +extern cpuop_func op_5ac8_20_ff; +extern cpuop_func op_5ad0_20_nf; +extern cpuop_func op_5ad0_20_ff; +extern cpuop_func op_5ad8_20_nf; +extern cpuop_func op_5ad8_20_ff; +extern cpuop_func op_5ae0_20_nf; +extern cpuop_func op_5ae0_20_ff; +extern cpuop_func op_5ae8_20_nf; +extern cpuop_func op_5ae8_20_ff; +extern cpuop_func op_5af0_20_nf; +extern cpuop_func op_5af0_20_ff; +extern cpuop_func op_5af8_20_nf; +extern cpuop_func op_5af8_20_ff; +extern cpuop_func op_5af9_20_nf; +extern cpuop_func op_5af9_20_ff; +extern cpuop_func op_5afa_20_nf; +extern cpuop_func op_5afa_20_ff; +extern cpuop_func op_5afb_20_nf; +extern cpuop_func op_5afb_20_ff; +extern cpuop_func op_5afc_20_nf; +extern cpuop_func op_5afc_20_ff; +extern cpuop_func op_5bc0_20_nf; +extern cpuop_func op_5bc0_20_ff; +extern cpuop_func op_5bc8_20_nf; +extern cpuop_func op_5bc8_20_ff; +extern cpuop_func op_5bd0_20_nf; +extern cpuop_func op_5bd0_20_ff; +extern cpuop_func op_5bd8_20_nf; +extern cpuop_func op_5bd8_20_ff; +extern cpuop_func op_5be0_20_nf; +extern cpuop_func op_5be0_20_ff; +extern cpuop_func op_5be8_20_nf; +extern cpuop_func op_5be8_20_ff; +extern cpuop_func op_5bf0_20_nf; +extern cpuop_func op_5bf0_20_ff; +extern cpuop_func op_5bf8_20_nf; +extern cpuop_func op_5bf8_20_ff; +extern cpuop_func op_5bf9_20_nf; +extern cpuop_func op_5bf9_20_ff; +extern cpuop_func op_5bfa_20_nf; +extern cpuop_func op_5bfa_20_ff; +extern cpuop_func op_5bfb_20_nf; +extern cpuop_func op_5bfb_20_ff; +extern cpuop_func op_5bfc_20_nf; +extern cpuop_func op_5bfc_20_ff; +extern cpuop_func op_5cc0_20_nf; +extern cpuop_func op_5cc0_20_ff; +extern cpuop_func op_5cc8_20_nf; +extern cpuop_func op_5cc8_20_ff; +extern cpuop_func op_5cd0_20_nf; +extern cpuop_func op_5cd0_20_ff; +extern cpuop_func op_5cd8_20_nf; +extern cpuop_func op_5cd8_20_ff; +extern cpuop_func op_5ce0_20_nf; +extern cpuop_func op_5ce0_20_ff; +extern cpuop_func op_5ce8_20_nf; +extern cpuop_func op_5ce8_20_ff; +extern cpuop_func op_5cf0_20_nf; +extern cpuop_func op_5cf0_20_ff; +extern cpuop_func op_5cf8_20_nf; +extern cpuop_func op_5cf8_20_ff; +extern cpuop_func op_5cf9_20_nf; +extern cpuop_func op_5cf9_20_ff; +extern cpuop_func op_5cfa_20_nf; +extern cpuop_func op_5cfa_20_ff; +extern cpuop_func op_5cfb_20_nf; +extern cpuop_func op_5cfb_20_ff; +extern cpuop_func op_5cfc_20_nf; +extern cpuop_func op_5cfc_20_ff; +extern cpuop_func op_5dc0_20_nf; +extern cpuop_func op_5dc0_20_ff; +extern cpuop_func op_5dc8_20_nf; +extern cpuop_func op_5dc8_20_ff; +extern cpuop_func op_5dd0_20_nf; +extern cpuop_func op_5dd0_20_ff; +extern cpuop_func op_5dd8_20_nf; +extern cpuop_func op_5dd8_20_ff; +extern cpuop_func op_5de0_20_nf; +extern cpuop_func op_5de0_20_ff; +extern cpuop_func op_5de8_20_nf; +extern cpuop_func op_5de8_20_ff; +extern cpuop_func op_5df0_20_nf; +extern cpuop_func op_5df0_20_ff; +extern cpuop_func op_5df8_20_nf; +extern cpuop_func op_5df8_20_ff; +extern cpuop_func op_5df9_20_nf; +extern cpuop_func op_5df9_20_ff; +extern cpuop_func op_5dfa_20_nf; +extern cpuop_func op_5dfa_20_ff; +extern cpuop_func op_5dfb_20_nf; +extern cpuop_func op_5dfb_20_ff; +extern cpuop_func op_5dfc_20_nf; +extern cpuop_func op_5dfc_20_ff; +extern cpuop_func op_5ec0_20_nf; +extern cpuop_func op_5ec0_20_ff; +extern cpuop_func op_5ec8_20_nf; +extern cpuop_func op_5ec8_20_ff; +extern cpuop_func op_5ed0_20_nf; +extern cpuop_func op_5ed0_20_ff; +extern cpuop_func op_5ed8_20_nf; +extern cpuop_func op_5ed8_20_ff; +extern cpuop_func op_5ee0_20_nf; +extern cpuop_func op_5ee0_20_ff; +extern cpuop_func op_5ee8_20_nf; +extern cpuop_func op_5ee8_20_ff; +extern cpuop_func op_5ef0_20_nf; +extern cpuop_func op_5ef0_20_ff; +extern cpuop_func op_5ef8_20_nf; +extern cpuop_func op_5ef8_20_ff; +extern cpuop_func op_5ef9_20_nf; +extern cpuop_func op_5ef9_20_ff; +extern cpuop_func op_5efa_20_nf; +extern cpuop_func op_5efa_20_ff; +extern cpuop_func op_5efb_20_nf; +extern cpuop_func op_5efb_20_ff; +extern cpuop_func op_5efc_20_nf; +extern cpuop_func op_5efc_20_ff; +extern cpuop_func op_5fc0_20_nf; +extern cpuop_func op_5fc0_20_ff; +extern cpuop_func op_5fc8_20_nf; +extern cpuop_func op_5fc8_20_ff; +extern cpuop_func op_5fd0_20_nf; +extern cpuop_func op_5fd0_20_ff; +extern cpuop_func op_5fd8_20_nf; +extern cpuop_func op_5fd8_20_ff; +extern cpuop_func op_5fe0_20_nf; +extern cpuop_func op_5fe0_20_ff; +extern cpuop_func op_5fe8_20_nf; +extern cpuop_func op_5fe8_20_ff; +extern cpuop_func op_5ff0_20_nf; +extern cpuop_func op_5ff0_20_ff; +extern cpuop_func op_5ff8_20_nf; +extern cpuop_func op_5ff8_20_ff; +extern cpuop_func op_5ff9_20_nf; +extern cpuop_func op_5ff9_20_ff; +extern cpuop_func op_5ffa_20_nf; +extern cpuop_func op_5ffa_20_ff; +extern cpuop_func op_5ffb_20_nf; +extern cpuop_func op_5ffb_20_ff; +extern cpuop_func op_5ffc_20_nf; +extern cpuop_func op_5ffc_20_ff; +extern cpuop_func op_6000_20_nf; +extern cpuop_func op_6000_20_ff; +extern cpuop_func op_6001_20_nf; +extern cpuop_func op_6001_20_ff; +extern cpuop_func op_60ff_20_nf; +extern cpuop_func op_60ff_20_ff; +extern cpuop_func op_6100_20_nf; +extern cpuop_func op_6100_20_ff; +extern cpuop_func op_6101_20_nf; +extern cpuop_func op_6101_20_ff; +extern cpuop_func op_61ff_20_nf; +extern cpuop_func op_61ff_20_ff; +extern cpuop_func op_6200_20_nf; +extern cpuop_func op_6200_20_ff; +extern cpuop_func op_6201_20_nf; +extern cpuop_func op_6201_20_ff; +extern cpuop_func op_62ff_20_nf; +extern cpuop_func op_62ff_20_ff; +extern cpuop_func op_6300_20_nf; +extern cpuop_func op_6300_20_ff; +extern cpuop_func op_6301_20_nf; +extern cpuop_func op_6301_20_ff; +extern cpuop_func op_63ff_20_nf; +extern cpuop_func op_63ff_20_ff; +extern cpuop_func op_6400_20_nf; +extern cpuop_func op_6400_20_ff; +extern cpuop_func op_6401_20_nf; +extern cpuop_func op_6401_20_ff; +extern cpuop_func op_64ff_20_nf; +extern cpuop_func op_64ff_20_ff; +extern cpuop_func op_6500_20_nf; +extern cpuop_func op_6500_20_ff; +extern cpuop_func op_6501_20_nf; +extern cpuop_func op_6501_20_ff; +extern cpuop_func op_65ff_20_nf; +extern cpuop_func op_65ff_20_ff; +extern cpuop_func op_6600_20_nf; +extern cpuop_func op_6600_20_ff; +extern cpuop_func op_6601_20_nf; +extern cpuop_func op_6601_20_ff; +extern cpuop_func op_66ff_20_nf; +extern cpuop_func op_66ff_20_ff; +extern cpuop_func op_6700_20_nf; +extern cpuop_func op_6700_20_ff; +extern cpuop_func op_6701_20_nf; +extern cpuop_func op_6701_20_ff; +extern cpuop_func op_67ff_20_nf; +extern cpuop_func op_67ff_20_ff; +extern cpuop_func op_6800_20_nf; +extern cpuop_func op_6800_20_ff; +extern cpuop_func op_6801_20_nf; +extern cpuop_func op_6801_20_ff; +extern cpuop_func op_68ff_20_nf; +extern cpuop_func op_68ff_20_ff; +extern cpuop_func op_6900_20_nf; +extern cpuop_func op_6900_20_ff; +extern cpuop_func op_6901_20_nf; +extern cpuop_func op_6901_20_ff; +extern cpuop_func op_69ff_20_nf; +extern cpuop_func op_69ff_20_ff; +extern cpuop_func op_6a00_20_nf; +extern cpuop_func op_6a00_20_ff; +extern cpuop_func op_6a01_20_nf; +extern cpuop_func op_6a01_20_ff; +extern cpuop_func op_6aff_20_nf; +extern cpuop_func op_6aff_20_ff; +extern cpuop_func op_6b00_20_nf; +extern cpuop_func op_6b00_20_ff; +extern cpuop_func op_6b01_20_nf; +extern cpuop_func op_6b01_20_ff; +extern cpuop_func op_6bff_20_nf; +extern cpuop_func op_6bff_20_ff; +extern cpuop_func op_6c00_20_nf; +extern cpuop_func op_6c00_20_ff; +extern cpuop_func op_6c01_20_nf; +extern cpuop_func op_6c01_20_ff; +extern cpuop_func op_6cff_20_nf; +extern cpuop_func op_6cff_20_ff; +extern cpuop_func op_6d00_20_nf; +extern cpuop_func op_6d00_20_ff; +extern cpuop_func op_6d01_20_nf; +extern cpuop_func op_6d01_20_ff; +extern cpuop_func op_6dff_20_nf; +extern cpuop_func op_6dff_20_ff; +extern cpuop_func op_6e00_20_nf; +extern cpuop_func op_6e00_20_ff; +extern cpuop_func op_6e01_20_nf; +extern cpuop_func op_6e01_20_ff; +extern cpuop_func op_6eff_20_nf; +extern cpuop_func op_6eff_20_ff; +extern cpuop_func op_6f00_20_nf; +extern cpuop_func op_6f00_20_ff; +extern cpuop_func op_6f01_20_nf; +extern cpuop_func op_6f01_20_ff; +extern cpuop_func op_6fff_20_nf; +extern cpuop_func op_6fff_20_ff; +extern cpuop_func op_7000_20_nf; +extern cpuop_func op_7000_20_ff; +extern cpuop_func op_8000_20_nf; +extern cpuop_func op_8000_20_ff; +extern cpuop_func op_8010_20_nf; +extern cpuop_func op_8010_20_ff; +extern cpuop_func op_8018_20_nf; +extern cpuop_func op_8018_20_ff; +extern cpuop_func op_8020_20_nf; +extern cpuop_func op_8020_20_ff; +extern cpuop_func op_8028_20_nf; +extern cpuop_func op_8028_20_ff; +extern cpuop_func op_8030_20_nf; +extern cpuop_func op_8030_20_ff; +extern cpuop_func op_8038_20_nf; +extern cpuop_func op_8038_20_ff; +extern cpuop_func op_8039_20_nf; +extern cpuop_func op_8039_20_ff; +extern cpuop_func op_803a_20_nf; +extern cpuop_func op_803a_20_ff; +extern cpuop_func op_803b_20_nf; +extern cpuop_func op_803b_20_ff; +extern cpuop_func op_803c_20_nf; +extern cpuop_func op_803c_20_ff; +extern cpuop_func op_8040_20_nf; +extern cpuop_func op_8040_20_ff; +extern cpuop_func op_8050_20_nf; +extern cpuop_func op_8050_20_ff; +extern cpuop_func op_8058_20_nf; +extern cpuop_func op_8058_20_ff; +extern cpuop_func op_8060_20_nf; +extern cpuop_func op_8060_20_ff; +extern cpuop_func op_8068_20_nf; +extern cpuop_func op_8068_20_ff; +extern cpuop_func op_8070_20_nf; +extern cpuop_func op_8070_20_ff; +extern cpuop_func op_8078_20_nf; +extern cpuop_func op_8078_20_ff; +extern cpuop_func op_8079_20_nf; +extern cpuop_func op_8079_20_ff; +extern cpuop_func op_807a_20_nf; +extern cpuop_func op_807a_20_ff; +extern cpuop_func op_807b_20_nf; +extern cpuop_func op_807b_20_ff; +extern cpuop_func op_807c_20_nf; +extern cpuop_func op_807c_20_ff; +extern cpuop_func op_8080_20_nf; +extern cpuop_func op_8080_20_ff; +extern cpuop_func op_8090_20_nf; +extern cpuop_func op_8090_20_ff; +extern cpuop_func op_8098_20_nf; +extern cpuop_func op_8098_20_ff; +extern cpuop_func op_80a0_20_nf; +extern cpuop_func op_80a0_20_ff; +extern cpuop_func op_80a8_20_nf; +extern cpuop_func op_80a8_20_ff; +extern cpuop_func op_80b0_20_nf; +extern cpuop_func op_80b0_20_ff; +extern cpuop_func op_80b8_20_nf; +extern cpuop_func op_80b8_20_ff; +extern cpuop_func op_80b9_20_nf; +extern cpuop_func op_80b9_20_ff; +extern cpuop_func op_80ba_20_nf; +extern cpuop_func op_80ba_20_ff; +extern cpuop_func op_80bb_20_nf; +extern cpuop_func op_80bb_20_ff; +extern cpuop_func op_80bc_20_nf; +extern cpuop_func op_80bc_20_ff; +extern cpuop_func op_80c0_20_nf; +extern cpuop_func op_80c0_20_ff; +extern cpuop_func op_80d0_20_nf; +extern cpuop_func op_80d0_20_ff; +extern cpuop_func op_80d8_20_nf; +extern cpuop_func op_80d8_20_ff; +extern cpuop_func op_80e0_20_nf; +extern cpuop_func op_80e0_20_ff; +extern cpuop_func op_80e8_20_nf; +extern cpuop_func op_80e8_20_ff; +extern cpuop_func op_80f0_20_nf; +extern cpuop_func op_80f0_20_ff; +extern cpuop_func op_80f8_20_nf; +extern cpuop_func op_80f8_20_ff; +extern cpuop_func op_80f9_20_nf; +extern cpuop_func op_80f9_20_ff; +extern cpuop_func op_80fa_20_nf; +extern cpuop_func op_80fa_20_ff; +extern cpuop_func op_80fb_20_nf; +extern cpuop_func op_80fb_20_ff; +extern cpuop_func op_80fc_20_nf; +extern cpuop_func op_80fc_20_ff; +extern cpuop_func op_8100_20_nf; +extern cpuop_func op_8100_20_ff; +extern cpuop_func op_8108_20_nf; +extern cpuop_func op_8108_20_ff; +extern cpuop_func op_8110_20_nf; +extern cpuop_func op_8110_20_ff; +extern cpuop_func op_8118_20_nf; +extern cpuop_func op_8118_20_ff; +extern cpuop_func op_8120_20_nf; +extern cpuop_func op_8120_20_ff; +extern cpuop_func op_8128_20_nf; +extern cpuop_func op_8128_20_ff; +extern cpuop_func op_8130_20_nf; +extern cpuop_func op_8130_20_ff; +extern cpuop_func op_8138_20_nf; +extern cpuop_func op_8138_20_ff; +extern cpuop_func op_8139_20_nf; +extern cpuop_func op_8139_20_ff; +extern cpuop_func op_8140_20_nf; +extern cpuop_func op_8140_20_ff; +extern cpuop_func op_8148_20_nf; +extern cpuop_func op_8148_20_ff; +extern cpuop_func op_8150_20_nf; +extern cpuop_func op_8150_20_ff; +extern cpuop_func op_8158_20_nf; +extern cpuop_func op_8158_20_ff; +extern cpuop_func op_8160_20_nf; +extern cpuop_func op_8160_20_ff; +extern cpuop_func op_8168_20_nf; +extern cpuop_func op_8168_20_ff; +extern cpuop_func op_8170_20_nf; +extern cpuop_func op_8170_20_ff; +extern cpuop_func op_8178_20_nf; +extern cpuop_func op_8178_20_ff; +extern cpuop_func op_8179_20_nf; +extern cpuop_func op_8179_20_ff; +extern cpuop_func op_8180_20_nf; +extern cpuop_func op_8180_20_ff; +extern cpuop_func op_8188_20_nf; +extern cpuop_func op_8188_20_ff; +extern cpuop_func op_8190_20_nf; +extern cpuop_func op_8190_20_ff; +extern cpuop_func op_8198_20_nf; +extern cpuop_func op_8198_20_ff; +extern cpuop_func op_81a0_20_nf; +extern cpuop_func op_81a0_20_ff; +extern cpuop_func op_81a8_20_nf; +extern cpuop_func op_81a8_20_ff; +extern cpuop_func op_81b0_20_nf; +extern cpuop_func op_81b0_20_ff; +extern cpuop_func op_81b8_20_nf; +extern cpuop_func op_81b8_20_ff; +extern cpuop_func op_81b9_20_nf; +extern cpuop_func op_81b9_20_ff; +extern cpuop_func op_81c0_20_nf; +extern cpuop_func op_81c0_20_ff; +extern cpuop_func op_81d0_20_nf; +extern cpuop_func op_81d0_20_ff; +extern cpuop_func op_81d8_20_nf; +extern cpuop_func op_81d8_20_ff; +extern cpuop_func op_81e0_20_nf; +extern cpuop_func op_81e0_20_ff; +extern cpuop_func op_81e8_20_nf; +extern cpuop_func op_81e8_20_ff; +extern cpuop_func op_81f0_20_nf; +extern cpuop_func op_81f0_20_ff; +extern cpuop_func op_81f8_20_nf; +extern cpuop_func op_81f8_20_ff; +extern cpuop_func op_81f9_20_nf; +extern cpuop_func op_81f9_20_ff; +extern cpuop_func op_81fa_20_nf; +extern cpuop_func op_81fa_20_ff; +extern cpuop_func op_81fb_20_nf; +extern cpuop_func op_81fb_20_ff; +extern cpuop_func op_81fc_20_nf; +extern cpuop_func op_81fc_20_ff; +extern cpuop_func op_9000_20_nf; +extern cpuop_func op_9000_20_ff; +extern cpuop_func op_9010_20_nf; +extern cpuop_func op_9010_20_ff; +extern cpuop_func op_9018_20_nf; +extern cpuop_func op_9018_20_ff; +extern cpuop_func op_9020_20_nf; +extern cpuop_func op_9020_20_ff; +extern cpuop_func op_9028_20_nf; +extern cpuop_func op_9028_20_ff; +extern cpuop_func op_9030_20_nf; +extern cpuop_func op_9030_20_ff; +extern cpuop_func op_9038_20_nf; +extern cpuop_func op_9038_20_ff; +extern cpuop_func op_9039_20_nf; +extern cpuop_func op_9039_20_ff; +extern cpuop_func op_903a_20_nf; +extern cpuop_func op_903a_20_ff; +extern cpuop_func op_903b_20_nf; +extern cpuop_func op_903b_20_ff; +extern cpuop_func op_903c_20_nf; +extern cpuop_func op_903c_20_ff; +extern cpuop_func op_9040_20_nf; +extern cpuop_func op_9040_20_ff; +extern cpuop_func op_9048_20_nf; +extern cpuop_func op_9048_20_ff; +extern cpuop_func op_9050_20_nf; +extern cpuop_func op_9050_20_ff; +extern cpuop_func op_9058_20_nf; +extern cpuop_func op_9058_20_ff; +extern cpuop_func op_9060_20_nf; +extern cpuop_func op_9060_20_ff; +extern cpuop_func op_9068_20_nf; +extern cpuop_func op_9068_20_ff; +extern cpuop_func op_9070_20_nf; +extern cpuop_func op_9070_20_ff; +extern cpuop_func op_9078_20_nf; +extern cpuop_func op_9078_20_ff; +extern cpuop_func op_9079_20_nf; +extern cpuop_func op_9079_20_ff; +extern cpuop_func op_907a_20_nf; +extern cpuop_func op_907a_20_ff; +extern cpuop_func op_907b_20_nf; +extern cpuop_func op_907b_20_ff; +extern cpuop_func op_907c_20_nf; +extern cpuop_func op_907c_20_ff; +extern cpuop_func op_9080_20_nf; +extern cpuop_func op_9080_20_ff; +extern cpuop_func op_9088_20_nf; +extern cpuop_func op_9088_20_ff; +extern cpuop_func op_9090_20_nf; +extern cpuop_func op_9090_20_ff; +extern cpuop_func op_9098_20_nf; +extern cpuop_func op_9098_20_ff; +extern cpuop_func op_90a0_20_nf; +extern cpuop_func op_90a0_20_ff; +extern cpuop_func op_90a8_20_nf; +extern cpuop_func op_90a8_20_ff; +extern cpuop_func op_90b0_20_nf; +extern cpuop_func op_90b0_20_ff; +extern cpuop_func op_90b8_20_nf; +extern cpuop_func op_90b8_20_ff; +extern cpuop_func op_90b9_20_nf; +extern cpuop_func op_90b9_20_ff; +extern cpuop_func op_90ba_20_nf; +extern cpuop_func op_90ba_20_ff; +extern cpuop_func op_90bb_20_nf; +extern cpuop_func op_90bb_20_ff; +extern cpuop_func op_90bc_20_nf; +extern cpuop_func op_90bc_20_ff; +extern cpuop_func op_90c0_20_nf; +extern cpuop_func op_90c0_20_ff; +extern cpuop_func op_90c8_20_nf; +extern cpuop_func op_90c8_20_ff; +extern cpuop_func op_90d0_20_nf; +extern cpuop_func op_90d0_20_ff; +extern cpuop_func op_90d8_20_nf; +extern cpuop_func op_90d8_20_ff; +extern cpuop_func op_90e0_20_nf; +extern cpuop_func op_90e0_20_ff; +extern cpuop_func op_90e8_20_nf; +extern cpuop_func op_90e8_20_ff; +extern cpuop_func op_90f0_20_nf; +extern cpuop_func op_90f0_20_ff; +extern cpuop_func op_90f8_20_nf; +extern cpuop_func op_90f8_20_ff; +extern cpuop_func op_90f9_20_nf; +extern cpuop_func op_90f9_20_ff; +extern cpuop_func op_90fa_20_nf; +extern cpuop_func op_90fa_20_ff; +extern cpuop_func op_90fb_20_nf; +extern cpuop_func op_90fb_20_ff; +extern cpuop_func op_90fc_20_nf; +extern cpuop_func op_90fc_20_ff; +extern cpuop_func op_9100_20_nf; +extern cpuop_func op_9100_20_ff; +extern cpuop_func op_9108_20_nf; +extern cpuop_func op_9108_20_ff; +extern cpuop_func op_9110_20_nf; +extern cpuop_func op_9110_20_ff; +extern cpuop_func op_9118_20_nf; +extern cpuop_func op_9118_20_ff; +extern cpuop_func op_9120_20_nf; +extern cpuop_func op_9120_20_ff; +extern cpuop_func op_9128_20_nf; +extern cpuop_func op_9128_20_ff; +extern cpuop_func op_9130_20_nf; +extern cpuop_func op_9130_20_ff; +extern cpuop_func op_9138_20_nf; +extern cpuop_func op_9138_20_ff; +extern cpuop_func op_9139_20_nf; +extern cpuop_func op_9139_20_ff; +extern cpuop_func op_9140_20_nf; +extern cpuop_func op_9140_20_ff; +extern cpuop_func op_9148_20_nf; +extern cpuop_func op_9148_20_ff; +extern cpuop_func op_9150_20_nf; +extern cpuop_func op_9150_20_ff; +extern cpuop_func op_9158_20_nf; +extern cpuop_func op_9158_20_ff; +extern cpuop_func op_9160_20_nf; +extern cpuop_func op_9160_20_ff; +extern cpuop_func op_9168_20_nf; +extern cpuop_func op_9168_20_ff; +extern cpuop_func op_9170_20_nf; +extern cpuop_func op_9170_20_ff; +extern cpuop_func op_9178_20_nf; +extern cpuop_func op_9178_20_ff; +extern cpuop_func op_9179_20_nf; +extern cpuop_func op_9179_20_ff; +extern cpuop_func op_9180_20_nf; +extern cpuop_func op_9180_20_ff; +extern cpuop_func op_9188_20_nf; +extern cpuop_func op_9188_20_ff; +extern cpuop_func op_9190_20_nf; +extern cpuop_func op_9190_20_ff; +extern cpuop_func op_9198_20_nf; +extern cpuop_func op_9198_20_ff; +extern cpuop_func op_91a0_20_nf; +extern cpuop_func op_91a0_20_ff; +extern cpuop_func op_91a8_20_nf; +extern cpuop_func op_91a8_20_ff; +extern cpuop_func op_91b0_20_nf; +extern cpuop_func op_91b0_20_ff; +extern cpuop_func op_91b8_20_nf; +extern cpuop_func op_91b8_20_ff; +extern cpuop_func op_91b9_20_nf; +extern cpuop_func op_91b9_20_ff; +extern cpuop_func op_91c0_20_nf; +extern cpuop_func op_91c0_20_ff; +extern cpuop_func op_91c8_20_nf; +extern cpuop_func op_91c8_20_ff; +extern cpuop_func op_91d0_20_nf; +extern cpuop_func op_91d0_20_ff; +extern cpuop_func op_91d8_20_nf; +extern cpuop_func op_91d8_20_ff; +extern cpuop_func op_91e0_20_nf; +extern cpuop_func op_91e0_20_ff; +extern cpuop_func op_91e8_20_nf; +extern cpuop_func op_91e8_20_ff; +extern cpuop_func op_91f0_20_nf; +extern cpuop_func op_91f0_20_ff; +extern cpuop_func op_91f8_20_nf; +extern cpuop_func op_91f8_20_ff; +extern cpuop_func op_91f9_20_nf; +extern cpuop_func op_91f9_20_ff; +extern cpuop_func op_91fa_20_nf; +extern cpuop_func op_91fa_20_ff; +extern cpuop_func op_91fb_20_nf; +extern cpuop_func op_91fb_20_ff; +extern cpuop_func op_91fc_20_nf; +extern cpuop_func op_91fc_20_ff; +extern cpuop_func op_b000_20_nf; +extern cpuop_func op_b000_20_ff; +extern cpuop_func op_b010_20_nf; +extern cpuop_func op_b010_20_ff; +extern cpuop_func op_b018_20_nf; +extern cpuop_func op_b018_20_ff; +extern cpuop_func op_b020_20_nf; +extern cpuop_func op_b020_20_ff; +extern cpuop_func op_b028_20_nf; +extern cpuop_func op_b028_20_ff; +extern cpuop_func op_b030_20_nf; +extern cpuop_func op_b030_20_ff; +extern cpuop_func op_b038_20_nf; +extern cpuop_func op_b038_20_ff; +extern cpuop_func op_b039_20_nf; +extern cpuop_func op_b039_20_ff; +extern cpuop_func op_b03a_20_nf; +extern cpuop_func op_b03a_20_ff; +extern cpuop_func op_b03b_20_nf; +extern cpuop_func op_b03b_20_ff; +extern cpuop_func op_b03c_20_nf; +extern cpuop_func op_b03c_20_ff; +extern cpuop_func op_b040_20_nf; +extern cpuop_func op_b040_20_ff; +extern cpuop_func op_b048_20_nf; +extern cpuop_func op_b048_20_ff; +extern cpuop_func op_b050_20_nf; +extern cpuop_func op_b050_20_ff; +extern cpuop_func op_b058_20_nf; +extern cpuop_func op_b058_20_ff; +extern cpuop_func op_b060_20_nf; +extern cpuop_func op_b060_20_ff; +extern cpuop_func op_b068_20_nf; +extern cpuop_func op_b068_20_ff; +extern cpuop_func op_b070_20_nf; +extern cpuop_func op_b070_20_ff; +extern cpuop_func op_b078_20_nf; +extern cpuop_func op_b078_20_ff; +extern cpuop_func op_b079_20_nf; +extern cpuop_func op_b079_20_ff; +extern cpuop_func op_b07a_20_nf; +extern cpuop_func op_b07a_20_ff; +extern cpuop_func op_b07b_20_nf; +extern cpuop_func op_b07b_20_ff; +extern cpuop_func op_b07c_20_nf; +extern cpuop_func op_b07c_20_ff; +extern cpuop_func op_b080_20_nf; +extern cpuop_func op_b080_20_ff; +extern cpuop_func op_b088_20_nf; +extern cpuop_func op_b088_20_ff; +extern cpuop_func op_b090_20_nf; +extern cpuop_func op_b090_20_ff; +extern cpuop_func op_b098_20_nf; +extern cpuop_func op_b098_20_ff; +extern cpuop_func op_b0a0_20_nf; +extern cpuop_func op_b0a0_20_ff; +extern cpuop_func op_b0a8_20_nf; +extern cpuop_func op_b0a8_20_ff; +extern cpuop_func op_b0b0_20_nf; +extern cpuop_func op_b0b0_20_ff; +extern cpuop_func op_b0b8_20_nf; +extern cpuop_func op_b0b8_20_ff; +extern cpuop_func op_b0b9_20_nf; +extern cpuop_func op_b0b9_20_ff; +extern cpuop_func op_b0ba_20_nf; +extern cpuop_func op_b0ba_20_ff; +extern cpuop_func op_b0bb_20_nf; +extern cpuop_func op_b0bb_20_ff; +extern cpuop_func op_b0bc_20_nf; +extern cpuop_func op_b0bc_20_ff; +extern cpuop_func op_b0c0_20_nf; +extern cpuop_func op_b0c0_20_ff; +extern cpuop_func op_b0c8_20_nf; +extern cpuop_func op_b0c8_20_ff; +extern cpuop_func op_b0d0_20_nf; +extern cpuop_func op_b0d0_20_ff; +extern cpuop_func op_b0d8_20_nf; +extern cpuop_func op_b0d8_20_ff; +extern cpuop_func op_b0e0_20_nf; +extern cpuop_func op_b0e0_20_ff; +extern cpuop_func op_b0e8_20_nf; +extern cpuop_func op_b0e8_20_ff; +extern cpuop_func op_b0f0_20_nf; +extern cpuop_func op_b0f0_20_ff; +extern cpuop_func op_b0f8_20_nf; +extern cpuop_func op_b0f8_20_ff; +extern cpuop_func op_b0f9_20_nf; +extern cpuop_func op_b0f9_20_ff; +extern cpuop_func op_b0fa_20_nf; +extern cpuop_func op_b0fa_20_ff; +extern cpuop_func op_b0fb_20_nf; +extern cpuop_func op_b0fb_20_ff; +extern cpuop_func op_b0fc_20_nf; +extern cpuop_func op_b0fc_20_ff; +extern cpuop_func op_b100_20_nf; +extern cpuop_func op_b100_20_ff; +extern cpuop_func op_b108_20_nf; +extern cpuop_func op_b108_20_ff; +extern cpuop_func op_b110_20_nf; +extern cpuop_func op_b110_20_ff; +extern cpuop_func op_b118_20_nf; +extern cpuop_func op_b118_20_ff; +extern cpuop_func op_b120_20_nf; +extern cpuop_func op_b120_20_ff; +extern cpuop_func op_b128_20_nf; +extern cpuop_func op_b128_20_ff; +extern cpuop_func op_b130_20_nf; +extern cpuop_func op_b130_20_ff; +extern cpuop_func op_b138_20_nf; +extern cpuop_func op_b138_20_ff; +extern cpuop_func op_b139_20_nf; +extern cpuop_func op_b139_20_ff; +extern cpuop_func op_b140_20_nf; +extern cpuop_func op_b140_20_ff; +extern cpuop_func op_b148_20_nf; +extern cpuop_func op_b148_20_ff; +extern cpuop_func op_b150_20_nf; +extern cpuop_func op_b150_20_ff; +extern cpuop_func op_b158_20_nf; +extern cpuop_func op_b158_20_ff; +extern cpuop_func op_b160_20_nf; +extern cpuop_func op_b160_20_ff; +extern cpuop_func op_b168_20_nf; +extern cpuop_func op_b168_20_ff; +extern cpuop_func op_b170_20_nf; +extern cpuop_func op_b170_20_ff; +extern cpuop_func op_b178_20_nf; +extern cpuop_func op_b178_20_ff; +extern cpuop_func op_b179_20_nf; +extern cpuop_func op_b179_20_ff; +extern cpuop_func op_b180_20_nf; +extern cpuop_func op_b180_20_ff; +extern cpuop_func op_b188_20_nf; +extern cpuop_func op_b188_20_ff; +extern cpuop_func op_b190_20_nf; +extern cpuop_func op_b190_20_ff; +extern cpuop_func op_b198_20_nf; +extern cpuop_func op_b198_20_ff; +extern cpuop_func op_b1a0_20_nf; +extern cpuop_func op_b1a0_20_ff; +extern cpuop_func op_b1a8_20_nf; +extern cpuop_func op_b1a8_20_ff; +extern cpuop_func op_b1b0_20_nf; +extern cpuop_func op_b1b0_20_ff; +extern cpuop_func op_b1b8_20_nf; +extern cpuop_func op_b1b8_20_ff; +extern cpuop_func op_b1b9_20_nf; +extern cpuop_func op_b1b9_20_ff; +extern cpuop_func op_b1c0_20_nf; +extern cpuop_func op_b1c0_20_ff; +extern cpuop_func op_b1c8_20_nf; +extern cpuop_func op_b1c8_20_ff; +extern cpuop_func op_b1d0_20_nf; +extern cpuop_func op_b1d0_20_ff; +extern cpuop_func op_b1d8_20_nf; +extern cpuop_func op_b1d8_20_ff; +extern cpuop_func op_b1e0_20_nf; +extern cpuop_func op_b1e0_20_ff; +extern cpuop_func op_b1e8_20_nf; +extern cpuop_func op_b1e8_20_ff; +extern cpuop_func op_b1f0_20_nf; +extern cpuop_func op_b1f0_20_ff; +extern cpuop_func op_b1f8_20_nf; +extern cpuop_func op_b1f8_20_ff; +extern cpuop_func op_b1f9_20_nf; +extern cpuop_func op_b1f9_20_ff; +extern cpuop_func op_b1fa_20_nf; +extern cpuop_func op_b1fa_20_ff; +extern cpuop_func op_b1fb_20_nf; +extern cpuop_func op_b1fb_20_ff; +extern cpuop_func op_b1fc_20_nf; +extern cpuop_func op_b1fc_20_ff; +extern cpuop_func op_c000_20_nf; +extern cpuop_func op_c000_20_ff; +extern cpuop_func op_c010_20_nf; +extern cpuop_func op_c010_20_ff; +extern cpuop_func op_c018_20_nf; +extern cpuop_func op_c018_20_ff; +extern cpuop_func op_c020_20_nf; +extern cpuop_func op_c020_20_ff; +extern cpuop_func op_c028_20_nf; +extern cpuop_func op_c028_20_ff; +extern cpuop_func op_c030_20_nf; +extern cpuop_func op_c030_20_ff; +extern cpuop_func op_c038_20_nf; +extern cpuop_func op_c038_20_ff; +extern cpuop_func op_c039_20_nf; +extern cpuop_func op_c039_20_ff; +extern cpuop_func op_c03a_20_nf; +extern cpuop_func op_c03a_20_ff; +extern cpuop_func op_c03b_20_nf; +extern cpuop_func op_c03b_20_ff; +extern cpuop_func op_c03c_20_nf; +extern cpuop_func op_c03c_20_ff; +extern cpuop_func op_c040_20_nf; +extern cpuop_func op_c040_20_ff; +extern cpuop_func op_c050_20_nf; +extern cpuop_func op_c050_20_ff; +extern cpuop_func op_c058_20_nf; +extern cpuop_func op_c058_20_ff; +extern cpuop_func op_c060_20_nf; +extern cpuop_func op_c060_20_ff; +extern cpuop_func op_c068_20_nf; +extern cpuop_func op_c068_20_ff; +extern cpuop_func op_c070_20_nf; +extern cpuop_func op_c070_20_ff; +extern cpuop_func op_c078_20_nf; +extern cpuop_func op_c078_20_ff; +extern cpuop_func op_c079_20_nf; +extern cpuop_func op_c079_20_ff; +extern cpuop_func op_c07a_20_nf; +extern cpuop_func op_c07a_20_ff; +extern cpuop_func op_c07b_20_nf; +extern cpuop_func op_c07b_20_ff; +extern cpuop_func op_c07c_20_nf; +extern cpuop_func op_c07c_20_ff; +extern cpuop_func op_c080_20_nf; +extern cpuop_func op_c080_20_ff; +extern cpuop_func op_c090_20_nf; +extern cpuop_func op_c090_20_ff; +extern cpuop_func op_c098_20_nf; +extern cpuop_func op_c098_20_ff; +extern cpuop_func op_c0a0_20_nf; +extern cpuop_func op_c0a0_20_ff; +extern cpuop_func op_c0a8_20_nf; +extern cpuop_func op_c0a8_20_ff; +extern cpuop_func op_c0b0_20_nf; +extern cpuop_func op_c0b0_20_ff; +extern cpuop_func op_c0b8_20_nf; +extern cpuop_func op_c0b8_20_ff; +extern cpuop_func op_c0b9_20_nf; +extern cpuop_func op_c0b9_20_ff; +extern cpuop_func op_c0ba_20_nf; +extern cpuop_func op_c0ba_20_ff; +extern cpuop_func op_c0bb_20_nf; +extern cpuop_func op_c0bb_20_ff; +extern cpuop_func op_c0bc_20_nf; +extern cpuop_func op_c0bc_20_ff; +extern cpuop_func op_c0c0_20_nf; +extern cpuop_func op_c0c0_20_ff; +extern cpuop_func op_c0d0_20_nf; +extern cpuop_func op_c0d0_20_ff; +extern cpuop_func op_c0d8_20_nf; +extern cpuop_func op_c0d8_20_ff; +extern cpuop_func op_c0e0_20_nf; +extern cpuop_func op_c0e0_20_ff; +extern cpuop_func op_c0e8_20_nf; +extern cpuop_func op_c0e8_20_ff; +extern cpuop_func op_c0f0_20_nf; +extern cpuop_func op_c0f0_20_ff; +extern cpuop_func op_c0f8_20_nf; +extern cpuop_func op_c0f8_20_ff; +extern cpuop_func op_c0f9_20_nf; +extern cpuop_func op_c0f9_20_ff; +extern cpuop_func op_c0fa_20_nf; +extern cpuop_func op_c0fa_20_ff; +extern cpuop_func op_c0fb_20_nf; +extern cpuop_func op_c0fb_20_ff; +extern cpuop_func op_c0fc_20_nf; +extern cpuop_func op_c0fc_20_ff; +extern cpuop_func op_c100_20_nf; +extern cpuop_func op_c100_20_ff; +extern cpuop_func op_c108_20_nf; +extern cpuop_func op_c108_20_ff; +extern cpuop_func op_c110_20_nf; +extern cpuop_func op_c110_20_ff; +extern cpuop_func op_c118_20_nf; +extern cpuop_func op_c118_20_ff; +extern cpuop_func op_c120_20_nf; +extern cpuop_func op_c120_20_ff; +extern cpuop_func op_c128_20_nf; +extern cpuop_func op_c128_20_ff; +extern cpuop_func op_c130_20_nf; +extern cpuop_func op_c130_20_ff; +extern cpuop_func op_c138_20_nf; +extern cpuop_func op_c138_20_ff; +extern cpuop_func op_c139_20_nf; +extern cpuop_func op_c139_20_ff; +extern cpuop_func op_c140_20_nf; +extern cpuop_func op_c140_20_ff; +extern cpuop_func op_c148_20_nf; +extern cpuop_func op_c148_20_ff; +extern cpuop_func op_c150_20_nf; +extern cpuop_func op_c150_20_ff; +extern cpuop_func op_c158_20_nf; +extern cpuop_func op_c158_20_ff; +extern cpuop_func op_c160_20_nf; +extern cpuop_func op_c160_20_ff; +extern cpuop_func op_c168_20_nf; +extern cpuop_func op_c168_20_ff; +extern cpuop_func op_c170_20_nf; +extern cpuop_func op_c170_20_ff; +extern cpuop_func op_c178_20_nf; +extern cpuop_func op_c178_20_ff; +extern cpuop_func op_c179_20_nf; +extern cpuop_func op_c179_20_ff; +extern cpuop_func op_c188_20_nf; +extern cpuop_func op_c188_20_ff; +extern cpuop_func op_c190_20_nf; +extern cpuop_func op_c190_20_ff; +extern cpuop_func op_c198_20_nf; +extern cpuop_func op_c198_20_ff; +extern cpuop_func op_c1a0_20_nf; +extern cpuop_func op_c1a0_20_ff; +extern cpuop_func op_c1a8_20_nf; +extern cpuop_func op_c1a8_20_ff; +extern cpuop_func op_c1b0_20_nf; +extern cpuop_func op_c1b0_20_ff; +extern cpuop_func op_c1b8_20_nf; +extern cpuop_func op_c1b8_20_ff; +extern cpuop_func op_c1b9_20_nf; +extern cpuop_func op_c1b9_20_ff; +extern cpuop_func op_c1c0_20_nf; +extern cpuop_func op_c1c0_20_ff; +extern cpuop_func op_c1d0_20_nf; +extern cpuop_func op_c1d0_20_ff; +extern cpuop_func op_c1d8_20_nf; +extern cpuop_func op_c1d8_20_ff; +extern cpuop_func op_c1e0_20_nf; +extern cpuop_func op_c1e0_20_ff; +extern cpuop_func op_c1e8_20_nf; +extern cpuop_func op_c1e8_20_ff; +extern cpuop_func op_c1f0_20_nf; +extern cpuop_func op_c1f0_20_ff; +extern cpuop_func op_c1f8_20_nf; +extern cpuop_func op_c1f8_20_ff; +extern cpuop_func op_c1f9_20_nf; +extern cpuop_func op_c1f9_20_ff; +extern cpuop_func op_c1fa_20_nf; +extern cpuop_func op_c1fa_20_ff; +extern cpuop_func op_c1fb_20_nf; +extern cpuop_func op_c1fb_20_ff; +extern cpuop_func op_c1fc_20_nf; +extern cpuop_func op_c1fc_20_ff; +extern cpuop_func op_d000_20_nf; +extern cpuop_func op_d000_20_ff; +extern cpuop_func op_d010_20_nf; +extern cpuop_func op_d010_20_ff; +extern cpuop_func op_d018_20_nf; +extern cpuop_func op_d018_20_ff; +extern cpuop_func op_d020_20_nf; +extern cpuop_func op_d020_20_ff; +extern cpuop_func op_d028_20_nf; +extern cpuop_func op_d028_20_ff; +extern cpuop_func op_d030_20_nf; +extern cpuop_func op_d030_20_ff; +extern cpuop_func op_d038_20_nf; +extern cpuop_func op_d038_20_ff; +extern cpuop_func op_d039_20_nf; +extern cpuop_func op_d039_20_ff; +extern cpuop_func op_d03a_20_nf; +extern cpuop_func op_d03a_20_ff; +extern cpuop_func op_d03b_20_nf; +extern cpuop_func op_d03b_20_ff; +extern cpuop_func op_d03c_20_nf; +extern cpuop_func op_d03c_20_ff; +extern cpuop_func op_d040_20_nf; +extern cpuop_func op_d040_20_ff; +extern cpuop_func op_d048_20_nf; +extern cpuop_func op_d048_20_ff; +extern cpuop_func op_d050_20_nf; +extern cpuop_func op_d050_20_ff; +extern cpuop_func op_d058_20_nf; +extern cpuop_func op_d058_20_ff; +extern cpuop_func op_d060_20_nf; +extern cpuop_func op_d060_20_ff; +extern cpuop_func op_d068_20_nf; +extern cpuop_func op_d068_20_ff; +extern cpuop_func op_d070_20_nf; +extern cpuop_func op_d070_20_ff; +extern cpuop_func op_d078_20_nf; +extern cpuop_func op_d078_20_ff; +extern cpuop_func op_d079_20_nf; +extern cpuop_func op_d079_20_ff; +extern cpuop_func op_d07a_20_nf; +extern cpuop_func op_d07a_20_ff; +extern cpuop_func op_d07b_20_nf; +extern cpuop_func op_d07b_20_ff; +extern cpuop_func op_d07c_20_nf; +extern cpuop_func op_d07c_20_ff; +extern cpuop_func op_d080_20_nf; +extern cpuop_func op_d080_20_ff; +extern cpuop_func op_d088_20_nf; +extern cpuop_func op_d088_20_ff; +extern cpuop_func op_d090_20_nf; +extern cpuop_func op_d090_20_ff; +extern cpuop_func op_d098_20_nf; +extern cpuop_func op_d098_20_ff; +extern cpuop_func op_d0a0_20_nf; +extern cpuop_func op_d0a0_20_ff; +extern cpuop_func op_d0a8_20_nf; +extern cpuop_func op_d0a8_20_ff; +extern cpuop_func op_d0b0_20_nf; +extern cpuop_func op_d0b0_20_ff; +extern cpuop_func op_d0b8_20_nf; +extern cpuop_func op_d0b8_20_ff; +extern cpuop_func op_d0b9_20_nf; +extern cpuop_func op_d0b9_20_ff; +extern cpuop_func op_d0ba_20_nf; +extern cpuop_func op_d0ba_20_ff; +extern cpuop_func op_d0bb_20_nf; +extern cpuop_func op_d0bb_20_ff; +extern cpuop_func op_d0bc_20_nf; +extern cpuop_func op_d0bc_20_ff; +extern cpuop_func op_d0c0_20_nf; +extern cpuop_func op_d0c0_20_ff; +extern cpuop_func op_d0c8_20_nf; +extern cpuop_func op_d0c8_20_ff; +extern cpuop_func op_d0d0_20_nf; +extern cpuop_func op_d0d0_20_ff; +extern cpuop_func op_d0d8_20_nf; +extern cpuop_func op_d0d8_20_ff; +extern cpuop_func op_d0e0_20_nf; +extern cpuop_func op_d0e0_20_ff; +extern cpuop_func op_d0e8_20_nf; +extern cpuop_func op_d0e8_20_ff; +extern cpuop_func op_d0f0_20_nf; +extern cpuop_func op_d0f0_20_ff; +extern cpuop_func op_d0f8_20_nf; +extern cpuop_func op_d0f8_20_ff; +extern cpuop_func op_d0f9_20_nf; +extern cpuop_func op_d0f9_20_ff; +extern cpuop_func op_d0fa_20_nf; +extern cpuop_func op_d0fa_20_ff; +extern cpuop_func op_d0fb_20_nf; +extern cpuop_func op_d0fb_20_ff; +extern cpuop_func op_d0fc_20_nf; +extern cpuop_func op_d0fc_20_ff; +extern cpuop_func op_d100_20_nf; +extern cpuop_func op_d100_20_ff; +extern cpuop_func op_d108_20_nf; +extern cpuop_func op_d108_20_ff; +extern cpuop_func op_d110_20_nf; +extern cpuop_func op_d110_20_ff; +extern cpuop_func op_d118_20_nf; +extern cpuop_func op_d118_20_ff; +extern cpuop_func op_d120_20_nf; +extern cpuop_func op_d120_20_ff; +extern cpuop_func op_d128_20_nf; +extern cpuop_func op_d128_20_ff; +extern cpuop_func op_d130_20_nf; +extern cpuop_func op_d130_20_ff; +extern cpuop_func op_d138_20_nf; +extern cpuop_func op_d138_20_ff; +extern cpuop_func op_d139_20_nf; +extern cpuop_func op_d139_20_ff; +extern cpuop_func op_d140_20_nf; +extern cpuop_func op_d140_20_ff; +extern cpuop_func op_d148_20_nf; +extern cpuop_func op_d148_20_ff; +extern cpuop_func op_d150_20_nf; +extern cpuop_func op_d150_20_ff; +extern cpuop_func op_d158_20_nf; +extern cpuop_func op_d158_20_ff; +extern cpuop_func op_d160_20_nf; +extern cpuop_func op_d160_20_ff; +extern cpuop_func op_d168_20_nf; +extern cpuop_func op_d168_20_ff; +extern cpuop_func op_d170_20_nf; +extern cpuop_func op_d170_20_ff; +extern cpuop_func op_d178_20_nf; +extern cpuop_func op_d178_20_ff; +extern cpuop_func op_d179_20_nf; +extern cpuop_func op_d179_20_ff; +extern cpuop_func op_d180_20_nf; +extern cpuop_func op_d180_20_ff; +extern cpuop_func op_d188_20_nf; +extern cpuop_func op_d188_20_ff; +extern cpuop_func op_d190_20_nf; +extern cpuop_func op_d190_20_ff; +extern cpuop_func op_d198_20_nf; +extern cpuop_func op_d198_20_ff; +extern cpuop_func op_d1a0_20_nf; +extern cpuop_func op_d1a0_20_ff; +extern cpuop_func op_d1a8_20_nf; +extern cpuop_func op_d1a8_20_ff; +extern cpuop_func op_d1b0_20_nf; +extern cpuop_func op_d1b0_20_ff; +extern cpuop_func op_d1b8_20_nf; +extern cpuop_func op_d1b8_20_ff; +extern cpuop_func op_d1b9_20_nf; +extern cpuop_func op_d1b9_20_ff; +extern cpuop_func op_d1c0_20_nf; +extern cpuop_func op_d1c0_20_ff; +extern cpuop_func op_d1c8_20_nf; +extern cpuop_func op_d1c8_20_ff; +extern cpuop_func op_d1d0_20_nf; +extern cpuop_func op_d1d0_20_ff; +extern cpuop_func op_d1d8_20_nf; +extern cpuop_func op_d1d8_20_ff; +extern cpuop_func op_d1e0_20_nf; +extern cpuop_func op_d1e0_20_ff; +extern cpuop_func op_d1e8_20_nf; +extern cpuop_func op_d1e8_20_ff; +extern cpuop_func op_d1f0_20_nf; +extern cpuop_func op_d1f0_20_ff; +extern cpuop_func op_d1f8_20_nf; +extern cpuop_func op_d1f8_20_ff; +extern cpuop_func op_d1f9_20_nf; +extern cpuop_func op_d1f9_20_ff; +extern cpuop_func op_d1fa_20_nf; +extern cpuop_func op_d1fa_20_ff; +extern cpuop_func op_d1fb_20_nf; +extern cpuop_func op_d1fb_20_ff; +extern cpuop_func op_d1fc_20_nf; +extern cpuop_func op_d1fc_20_ff; +extern cpuop_func op_e000_20_nf; +extern cpuop_func op_e000_20_ff; +extern cpuop_func op_e008_20_nf; +extern cpuop_func op_e008_20_ff; +extern cpuop_func op_e010_20_nf; +extern cpuop_func op_e010_20_ff; +extern cpuop_func op_e018_20_nf; +extern cpuop_func op_e018_20_ff; +extern cpuop_func op_e020_20_nf; +extern cpuop_func op_e020_20_ff; +extern cpuop_func op_e028_20_nf; +extern cpuop_func op_e028_20_ff; +extern cpuop_func op_e030_20_nf; +extern cpuop_func op_e030_20_ff; +extern cpuop_func op_e038_20_nf; +extern cpuop_func op_e038_20_ff; +extern cpuop_func op_e040_20_nf; +extern cpuop_func op_e040_20_ff; +extern cpuop_func op_e048_20_nf; +extern cpuop_func op_e048_20_ff; +extern cpuop_func op_e050_20_nf; +extern cpuop_func op_e050_20_ff; +extern cpuop_func op_e058_20_nf; +extern cpuop_func op_e058_20_ff; +extern cpuop_func op_e060_20_nf; +extern cpuop_func op_e060_20_ff; +extern cpuop_func op_e068_20_nf; +extern cpuop_func op_e068_20_ff; +extern cpuop_func op_e070_20_nf; +extern cpuop_func op_e070_20_ff; +extern cpuop_func op_e078_20_nf; +extern cpuop_func op_e078_20_ff; +extern cpuop_func op_e080_20_nf; +extern cpuop_func op_e080_20_ff; +extern cpuop_func op_e088_20_nf; +extern cpuop_func op_e088_20_ff; +extern cpuop_func op_e090_20_nf; +extern cpuop_func op_e090_20_ff; +extern cpuop_func op_e098_20_nf; +extern cpuop_func op_e098_20_ff; +extern cpuop_func op_e0a0_20_nf; +extern cpuop_func op_e0a0_20_ff; +extern cpuop_func op_e0a8_20_nf; +extern cpuop_func op_e0a8_20_ff; +extern cpuop_func op_e0b0_20_nf; +extern cpuop_func op_e0b0_20_ff; +extern cpuop_func op_e0b8_20_nf; +extern cpuop_func op_e0b8_20_ff; +extern cpuop_func op_e0d0_20_nf; +extern cpuop_func op_e0d0_20_ff; +extern cpuop_func op_e0d8_20_nf; +extern cpuop_func op_e0d8_20_ff; +extern cpuop_func op_e0e0_20_nf; +extern cpuop_func op_e0e0_20_ff; +extern cpuop_func op_e0e8_20_nf; +extern cpuop_func op_e0e8_20_ff; +extern cpuop_func op_e0f0_20_nf; +extern cpuop_func op_e0f0_20_ff; +extern cpuop_func op_e0f8_20_nf; +extern cpuop_func op_e0f8_20_ff; +extern cpuop_func op_e0f9_20_nf; +extern cpuop_func op_e0f9_20_ff; +extern cpuop_func op_e100_20_nf; +extern cpuop_func op_e100_20_ff; +extern cpuop_func op_e108_20_nf; +extern cpuop_func op_e108_20_ff; +extern cpuop_func op_e110_20_nf; +extern cpuop_func op_e110_20_ff; +extern cpuop_func op_e118_20_nf; +extern cpuop_func op_e118_20_ff; +extern cpuop_func op_e120_20_nf; +extern cpuop_func op_e120_20_ff; +extern cpuop_func op_e128_20_nf; +extern cpuop_func op_e128_20_ff; +extern cpuop_func op_e130_20_nf; +extern cpuop_func op_e130_20_ff; +extern cpuop_func op_e138_20_nf; +extern cpuop_func op_e138_20_ff; +extern cpuop_func op_e140_20_nf; +extern cpuop_func op_e140_20_ff; +extern cpuop_func op_e148_20_nf; +extern cpuop_func op_e148_20_ff; +extern cpuop_func op_e150_20_nf; +extern cpuop_func op_e150_20_ff; +extern cpuop_func op_e158_20_nf; +extern cpuop_func op_e158_20_ff; +extern cpuop_func op_e160_20_nf; +extern cpuop_func op_e160_20_ff; +extern cpuop_func op_e168_20_nf; +extern cpuop_func op_e168_20_ff; +extern cpuop_func op_e170_20_nf; +extern cpuop_func op_e170_20_ff; +extern cpuop_func op_e178_20_nf; +extern cpuop_func op_e178_20_ff; +extern cpuop_func op_e180_20_nf; +extern cpuop_func op_e180_20_ff; +extern cpuop_func op_e188_20_nf; +extern cpuop_func op_e188_20_ff; +extern cpuop_func op_e190_20_nf; +extern cpuop_func op_e190_20_ff; +extern cpuop_func op_e198_20_nf; +extern cpuop_func op_e198_20_ff; +extern cpuop_func op_e1a0_20_nf; +extern cpuop_func op_e1a0_20_ff; +extern cpuop_func op_e1a8_20_nf; +extern cpuop_func op_e1a8_20_ff; +extern cpuop_func op_e1b0_20_nf; +extern cpuop_func op_e1b0_20_ff; +extern cpuop_func op_e1b8_20_nf; +extern cpuop_func op_e1b8_20_ff; +extern cpuop_func op_e1d0_20_nf; +extern cpuop_func op_e1d0_20_ff; +extern cpuop_func op_e1d8_20_nf; +extern cpuop_func op_e1d8_20_ff; +extern cpuop_func op_e1e0_20_nf; +extern cpuop_func op_e1e0_20_ff; +extern cpuop_func op_e1e8_20_nf; +extern cpuop_func op_e1e8_20_ff; +extern cpuop_func op_e1f0_20_nf; +extern cpuop_func op_e1f0_20_ff; +extern cpuop_func op_e1f8_20_nf; +extern cpuop_func op_e1f8_20_ff; +extern cpuop_func op_e1f9_20_nf; +extern cpuop_func op_e1f9_20_ff; +extern cpuop_func op_e2d0_20_nf; +extern cpuop_func op_e2d0_20_ff; +extern cpuop_func op_e2d8_20_nf; +extern cpuop_func op_e2d8_20_ff; +extern cpuop_func op_e2e0_20_nf; +extern cpuop_func op_e2e0_20_ff; +extern cpuop_func op_e2e8_20_nf; +extern cpuop_func op_e2e8_20_ff; +extern cpuop_func op_e2f0_20_nf; +extern cpuop_func op_e2f0_20_ff; +extern cpuop_func op_e2f8_20_nf; +extern cpuop_func op_e2f8_20_ff; +extern cpuop_func op_e2f9_20_nf; +extern cpuop_func op_e2f9_20_ff; +extern cpuop_func op_e3d0_20_nf; +extern cpuop_func op_e3d0_20_ff; +extern cpuop_func op_e3d8_20_nf; +extern cpuop_func op_e3d8_20_ff; +extern cpuop_func op_e3e0_20_nf; +extern cpuop_func op_e3e0_20_ff; +extern cpuop_func op_e3e8_20_nf; +extern cpuop_func op_e3e8_20_ff; +extern cpuop_func op_e3f0_20_nf; +extern cpuop_func op_e3f0_20_ff; +extern cpuop_func op_e3f8_20_nf; +extern cpuop_func op_e3f8_20_ff; +extern cpuop_func op_e3f9_20_nf; +extern cpuop_func op_e3f9_20_ff; +extern cpuop_func op_e4d0_20_nf; +extern cpuop_func op_e4d0_20_ff; +extern cpuop_func op_e4d8_20_nf; +extern cpuop_func op_e4d8_20_ff; +extern cpuop_func op_e4e0_20_nf; +extern cpuop_func op_e4e0_20_ff; +extern cpuop_func op_e4e8_20_nf; +extern cpuop_func op_e4e8_20_ff; +extern cpuop_func op_e4f0_20_nf; +extern cpuop_func op_e4f0_20_ff; +extern cpuop_func op_e4f8_20_nf; +extern cpuop_func op_e4f8_20_ff; +extern cpuop_func op_e4f9_20_nf; +extern cpuop_func op_e4f9_20_ff; +extern cpuop_func op_e5d0_20_nf; +extern cpuop_func op_e5d0_20_ff; +extern cpuop_func op_e5d8_20_nf; +extern cpuop_func op_e5d8_20_ff; +extern cpuop_func op_e5e0_20_nf; +extern cpuop_func op_e5e0_20_ff; +extern cpuop_func op_e5e8_20_nf; +extern cpuop_func op_e5e8_20_ff; +extern cpuop_func op_e5f0_20_nf; +extern cpuop_func op_e5f0_20_ff; +extern cpuop_func op_e5f8_20_nf; +extern cpuop_func op_e5f8_20_ff; +extern cpuop_func op_e5f9_20_nf; +extern cpuop_func op_e5f9_20_ff; +extern cpuop_func op_e6d0_20_nf; +extern cpuop_func op_e6d0_20_ff; +extern cpuop_func op_e6d8_20_nf; +extern cpuop_func op_e6d8_20_ff; +extern cpuop_func op_e6e0_20_nf; +extern cpuop_func op_e6e0_20_ff; +extern cpuop_func op_e6e8_20_nf; +extern cpuop_func op_e6e8_20_ff; +extern cpuop_func op_e6f0_20_nf; +extern cpuop_func op_e6f0_20_ff; +extern cpuop_func op_e6f8_20_nf; +extern cpuop_func op_e6f8_20_ff; +extern cpuop_func op_e6f9_20_nf; +extern cpuop_func op_e6f9_20_ff; +extern cpuop_func op_e7d0_20_nf; +extern cpuop_func op_e7d0_20_ff; +extern cpuop_func op_e7d8_20_nf; +extern cpuop_func op_e7d8_20_ff; +extern cpuop_func op_e7e0_20_nf; +extern cpuop_func op_e7e0_20_ff; +extern cpuop_func op_e7e8_20_nf; +extern cpuop_func op_e7e8_20_ff; +extern cpuop_func op_e7f0_20_nf; +extern cpuop_func op_e7f0_20_ff; +extern cpuop_func op_e7f8_20_nf; +extern cpuop_func op_e7f8_20_ff; +extern cpuop_func op_e7f9_20_nf; +extern cpuop_func op_e7f9_20_ff; +extern cpuop_func op_e8c0_20_nf; +extern cpuop_func op_e8c0_20_ff; +extern cpuop_func op_e8d0_20_nf; +extern cpuop_func op_e8d0_20_ff; +extern cpuop_func op_e8e8_20_nf; +extern cpuop_func op_e8e8_20_ff; +extern cpuop_func op_e8f0_20_nf; +extern cpuop_func op_e8f0_20_ff; +extern cpuop_func op_e8f8_20_nf; +extern cpuop_func op_e8f8_20_ff; +extern cpuop_func op_e8f9_20_nf; +extern cpuop_func op_e8f9_20_ff; +extern cpuop_func op_e8fa_20_nf; +extern cpuop_func op_e8fa_20_ff; +extern cpuop_func op_e8fb_20_nf; +extern cpuop_func op_e8fb_20_ff; +extern cpuop_func op_e9c0_20_nf; +extern cpuop_func op_e9c0_20_ff; +extern cpuop_func op_e9d0_20_nf; +extern cpuop_func op_e9d0_20_ff; +extern cpuop_func op_e9e8_20_nf; +extern cpuop_func op_e9e8_20_ff; +extern cpuop_func op_e9f0_20_nf; +extern cpuop_func op_e9f0_20_ff; +extern cpuop_func op_e9f8_20_nf; +extern cpuop_func op_e9f8_20_ff; +extern cpuop_func op_e9f9_20_nf; +extern cpuop_func op_e9f9_20_ff; +extern cpuop_func op_e9fa_20_nf; +extern cpuop_func op_e9fa_20_ff; +extern cpuop_func op_e9fb_20_nf; +extern cpuop_func op_e9fb_20_ff; +extern cpuop_func op_eac0_20_nf; +extern cpuop_func op_eac0_20_ff; +extern cpuop_func op_ead0_20_nf; +extern cpuop_func op_ead0_20_ff; +extern cpuop_func op_eae8_20_nf; +extern cpuop_func op_eae8_20_ff; +extern cpuop_func op_eaf0_20_nf; +extern cpuop_func op_eaf0_20_ff; +extern cpuop_func op_eaf8_20_nf; +extern cpuop_func op_eaf8_20_ff; +extern cpuop_func op_eaf9_20_nf; +extern cpuop_func op_eaf9_20_ff; +extern cpuop_func op_ebc0_20_nf; +extern cpuop_func op_ebc0_20_ff; +extern cpuop_func op_ebd0_20_nf; +extern cpuop_func op_ebd0_20_ff; +extern cpuop_func op_ebe8_20_nf; +extern cpuop_func op_ebe8_20_ff; +extern cpuop_func op_ebf0_20_nf; +extern cpuop_func op_ebf0_20_ff; +extern cpuop_func op_ebf8_20_nf; +extern cpuop_func op_ebf8_20_ff; +extern cpuop_func op_ebf9_20_nf; +extern cpuop_func op_ebf9_20_ff; +extern cpuop_func op_ebfa_20_nf; +extern cpuop_func op_ebfa_20_ff; +extern cpuop_func op_ebfb_20_nf; +extern cpuop_func op_ebfb_20_ff; +extern cpuop_func op_ecc0_20_nf; +extern cpuop_func op_ecc0_20_ff; +extern cpuop_func op_ecd0_20_nf; +extern cpuop_func op_ecd0_20_ff; +extern cpuop_func op_ece8_20_nf; +extern cpuop_func op_ece8_20_ff; +extern cpuop_func op_ecf0_20_nf; +extern cpuop_func op_ecf0_20_ff; +extern cpuop_func op_ecf8_20_nf; +extern cpuop_func op_ecf8_20_ff; +extern cpuop_func op_ecf9_20_nf; +extern cpuop_func op_ecf9_20_ff; +extern cpuop_func op_edc0_20_nf; +extern cpuop_func op_edc0_20_ff; +extern cpuop_func op_edd0_20_nf; +extern cpuop_func op_edd0_20_ff; +extern cpuop_func op_ede8_20_nf; +extern cpuop_func op_ede8_20_ff; +extern cpuop_func op_edf0_20_nf; +extern cpuop_func op_edf0_20_ff; +extern cpuop_func op_edf8_20_nf; +extern cpuop_func op_edf8_20_ff; +extern cpuop_func op_edf9_20_nf; +extern cpuop_func op_edf9_20_ff; +extern cpuop_func op_edfa_20_nf; +extern cpuop_func op_edfa_20_ff; +extern cpuop_func op_edfb_20_nf; +extern cpuop_func op_edfb_20_ff; +extern cpuop_func op_eec0_20_nf; +extern cpuop_func op_eec0_20_ff; +extern cpuop_func op_eed0_20_nf; +extern cpuop_func op_eed0_20_ff; +extern cpuop_func op_eee8_20_nf; +extern cpuop_func op_eee8_20_ff; +extern cpuop_func op_eef0_20_nf; +extern cpuop_func op_eef0_20_ff; +extern cpuop_func op_eef8_20_nf; +extern cpuop_func op_eef8_20_ff; +extern cpuop_func op_eef9_20_nf; +extern cpuop_func op_eef9_20_ff; +extern cpuop_func op_efc0_20_nf; +extern cpuop_func op_efc0_20_ff; +extern cpuop_func op_efd0_20_nf; +extern cpuop_func op_efd0_20_ff; +extern cpuop_func op_efe8_20_nf; +extern cpuop_func op_efe8_20_ff; +extern cpuop_func op_eff0_20_nf; +extern cpuop_func op_eff0_20_ff; +extern cpuop_func op_eff8_20_nf; +extern cpuop_func op_eff8_20_ff; +extern cpuop_func op_eff9_20_nf; +extern cpuop_func op_eff9_20_ff; +extern cpuop_func op_f200_20_nf; +extern cpuop_func op_f200_20_ff; +extern cpuop_func op_f208_20_nf; +extern cpuop_func op_f208_20_ff; +extern cpuop_func op_f210_20_nf; +extern cpuop_func op_f210_20_ff; +extern cpuop_func op_f218_20_nf; +extern cpuop_func op_f218_20_ff; +extern cpuop_func op_f220_20_nf; +extern cpuop_func op_f220_20_ff; +extern cpuop_func op_f228_20_nf; +extern cpuop_func op_f228_20_ff; +extern cpuop_func op_f230_20_nf; +extern cpuop_func op_f230_20_ff; +extern cpuop_func op_f238_20_nf; +extern cpuop_func op_f238_20_ff; +extern cpuop_func op_f239_20_nf; +extern cpuop_func op_f239_20_ff; +extern cpuop_func op_f23a_20_nf; +extern cpuop_func op_f23a_20_ff; +extern cpuop_func op_f23b_20_nf; +extern cpuop_func op_f23b_20_ff; +extern cpuop_func op_f23c_20_nf; +extern cpuop_func op_f23c_20_ff; +extern cpuop_func op_f240_20_nf; +extern cpuop_func op_f240_20_ff; +extern cpuop_func op_f248_20_nf; +extern cpuop_func op_f248_20_ff; +extern cpuop_func op_f250_20_nf; +extern cpuop_func op_f250_20_ff; +extern cpuop_func op_f258_20_nf; +extern cpuop_func op_f258_20_ff; +extern cpuop_func op_f260_20_nf; +extern cpuop_func op_f260_20_ff; +extern cpuop_func op_f268_20_nf; +extern cpuop_func op_f268_20_ff; +extern cpuop_func op_f270_20_nf; +extern cpuop_func op_f270_20_ff; +extern cpuop_func op_f278_20_nf; +extern cpuop_func op_f278_20_ff; +extern cpuop_func op_f279_20_nf; +extern cpuop_func op_f279_20_ff; +extern cpuop_func op_f27a_20_nf; +extern cpuop_func op_f27a_20_ff; +extern cpuop_func op_f27b_20_nf; +extern cpuop_func op_f27b_20_ff; +extern cpuop_func op_f27c_20_nf; +extern cpuop_func op_f27c_20_ff; +extern cpuop_func op_f280_20_nf; +extern cpuop_func op_f280_20_ff; +extern cpuop_func op_f2c0_20_nf; +extern cpuop_func op_f2c0_20_ff; +extern cpuop_func op_f310_20_nf; +extern cpuop_func op_f310_20_ff; +extern cpuop_func op_f320_20_nf; +extern cpuop_func op_f320_20_ff; +extern cpuop_func op_f328_20_nf; +extern cpuop_func op_f328_20_ff; +extern cpuop_func op_f330_20_nf; +extern cpuop_func op_f330_20_ff; +extern cpuop_func op_f338_20_nf; +extern cpuop_func op_f338_20_ff; +extern cpuop_func op_f339_20_nf; +extern cpuop_func op_f339_20_ff; +extern cpuop_func op_f350_20_nf; +extern cpuop_func op_f350_20_ff; +extern cpuop_func op_f358_20_nf; +extern cpuop_func op_f358_20_ff; +extern cpuop_func op_f368_20_nf; +extern cpuop_func op_f368_20_ff; +extern cpuop_func op_f370_20_nf; +extern cpuop_func op_f370_20_ff; +extern cpuop_func op_f378_20_nf; +extern cpuop_func op_f378_20_ff; +extern cpuop_func op_f379_20_nf; +extern cpuop_func op_f379_20_ff; +extern cpuop_func op_f37a_20_nf; +extern cpuop_func op_f37a_20_ff; +extern cpuop_func op_f37b_20_nf; +extern cpuop_func op_f37b_20_ff; +extern cpuop_func_noret op_0000_21_nf; +extern cpuop_func_noret op_0000_21_ff; +extern cpuop_func_noret op_0010_21_nf; +extern cpuop_func_noret op_0010_21_ff; +extern cpuop_func_noret op_0018_21_nf; +extern cpuop_func_noret op_0018_21_ff; +extern cpuop_func_noret op_0020_21_nf; +extern cpuop_func_noret op_0020_21_ff; +extern cpuop_func_noret op_0028_21_nf; +extern cpuop_func_noret op_0028_21_ff; +extern cpuop_func_noret op_0030_21_nf; +extern cpuop_func_noret op_0030_21_ff; +extern cpuop_func_noret op_0038_21_nf; +extern cpuop_func_noret op_0038_21_ff; +extern cpuop_func_noret op_0039_21_nf; +extern cpuop_func_noret op_0039_21_ff; +extern cpuop_func_noret op_003c_21_nf; +extern cpuop_func_noret op_003c_21_ff; +extern cpuop_func_noret op_0040_21_nf; +extern cpuop_func_noret op_0040_21_ff; +extern cpuop_func_noret op_0050_21_nf; +extern cpuop_func_noret op_0050_21_ff; +extern cpuop_func_noret op_0058_21_nf; +extern cpuop_func_noret op_0058_21_ff; +extern cpuop_func_noret op_0060_21_nf; +extern cpuop_func_noret op_0060_21_ff; +extern cpuop_func_noret op_0068_21_nf; +extern cpuop_func_noret op_0068_21_ff; +extern cpuop_func_noret op_0070_21_nf; +extern cpuop_func_noret op_0070_21_ff; +extern cpuop_func_noret op_0078_21_nf; +extern cpuop_func_noret op_0078_21_ff; +extern cpuop_func_noret op_0079_21_nf; +extern cpuop_func_noret op_0079_21_ff; +extern cpuop_func_noret op_007c_21_nf; +extern cpuop_func_noret op_007c_21_ff; +extern cpuop_func_noret op_0080_21_nf; +extern cpuop_func_noret op_0080_21_ff; +extern cpuop_func_noret op_0090_21_nf; +extern cpuop_func_noret op_0090_21_ff; +extern cpuop_func_noret op_0098_21_nf; +extern cpuop_func_noret op_0098_21_ff; +extern cpuop_func_noret op_00a0_21_nf; +extern cpuop_func_noret op_00a0_21_ff; +extern cpuop_func_noret op_00a8_21_nf; +extern cpuop_func_noret op_00a8_21_ff; +extern cpuop_func_noret op_00b0_21_nf; +extern cpuop_func_noret op_00b0_21_ff; +extern cpuop_func_noret op_00b8_21_nf; +extern cpuop_func_noret op_00b8_21_ff; +extern cpuop_func_noret op_00b9_21_nf; +extern cpuop_func_noret op_00b9_21_ff; +extern cpuop_func_noret op_00d0_21_nf; +extern cpuop_func_noret op_00d0_21_ff; +extern cpuop_func_noret op_00e8_21_nf; +extern cpuop_func_noret op_00e8_21_ff; +extern cpuop_func_noret op_00f0_21_nf; +extern cpuop_func_noret op_00f0_21_ff; +extern cpuop_func_noret op_00f8_21_nf; +extern cpuop_func_noret op_00f8_21_ff; +extern cpuop_func_noret op_00f9_21_nf; +extern cpuop_func_noret op_00f9_21_ff; +extern cpuop_func_noret op_00fa_21_nf; +extern cpuop_func_noret op_00fa_21_ff; +extern cpuop_func_noret op_00fb_21_nf; +extern cpuop_func_noret op_00fb_21_ff; +extern cpuop_func_noret op_0100_21_nf; +extern cpuop_func_noret op_0100_21_ff; +extern cpuop_func_noret op_0108_21_nf; +extern cpuop_func_noret op_0108_21_ff; +extern cpuop_func_noret op_0110_21_nf; +extern cpuop_func_noret op_0110_21_ff; +extern cpuop_func_noret op_0118_21_nf; +extern cpuop_func_noret op_0118_21_ff; +extern cpuop_func_noret op_0120_21_nf; +extern cpuop_func_noret op_0120_21_ff; +extern cpuop_func_noret op_0128_21_nf; +extern cpuop_func_noret op_0128_21_ff; +extern cpuop_func_noret op_0130_21_nf; +extern cpuop_func_noret op_0130_21_ff; +extern cpuop_func_noret op_0138_21_nf; +extern cpuop_func_noret op_0138_21_ff; +extern cpuop_func_noret op_0139_21_nf; +extern cpuop_func_noret op_0139_21_ff; +extern cpuop_func_noret op_013a_21_nf; +extern cpuop_func_noret op_013a_21_ff; +extern cpuop_func_noret op_013b_21_nf; +extern cpuop_func_noret op_013b_21_ff; +extern cpuop_func_noret op_013c_21_nf; +extern cpuop_func_noret op_013c_21_ff; +extern cpuop_func_noret op_0140_21_nf; +extern cpuop_func_noret op_0140_21_ff; +extern cpuop_func_noret op_0148_21_nf; +extern cpuop_func_noret op_0148_21_ff; +extern cpuop_func_noret op_0150_21_nf; +extern cpuop_func_noret op_0150_21_ff; +extern cpuop_func_noret op_0158_21_nf; +extern cpuop_func_noret op_0158_21_ff; +extern cpuop_func_noret op_0160_21_nf; +extern cpuop_func_noret op_0160_21_ff; +extern cpuop_func_noret op_0168_21_nf; +extern cpuop_func_noret op_0168_21_ff; +extern cpuop_func_noret op_0170_21_nf; +extern cpuop_func_noret op_0170_21_ff; +extern cpuop_func_noret op_0178_21_nf; +extern cpuop_func_noret op_0178_21_ff; +extern cpuop_func_noret op_0179_21_nf; +extern cpuop_func_noret op_0179_21_ff; +extern cpuop_func_noret op_0180_21_nf; +extern cpuop_func_noret op_0180_21_ff; +extern cpuop_func_noret op_0188_21_nf; +extern cpuop_func_noret op_0188_21_ff; +extern cpuop_func_noret op_0190_21_nf; +extern cpuop_func_noret op_0190_21_ff; +extern cpuop_func_noret op_0198_21_nf; +extern cpuop_func_noret op_0198_21_ff; +extern cpuop_func_noret op_01a0_21_nf; +extern cpuop_func_noret op_01a0_21_ff; +extern cpuop_func_noret op_01a8_21_nf; +extern cpuop_func_noret op_01a8_21_ff; +extern cpuop_func_noret op_01b0_21_nf; +extern cpuop_func_noret op_01b0_21_ff; +extern cpuop_func_noret op_01b8_21_nf; +extern cpuop_func_noret op_01b8_21_ff; +extern cpuop_func_noret op_01b9_21_nf; +extern cpuop_func_noret op_01b9_21_ff; +extern cpuop_func_noret op_01c0_21_nf; +extern cpuop_func_noret op_01c0_21_ff; +extern cpuop_func_noret op_01c8_21_nf; +extern cpuop_func_noret op_01c8_21_ff; +extern cpuop_func_noret op_01d0_21_nf; +extern cpuop_func_noret op_01d0_21_ff; +extern cpuop_func_noret op_01d8_21_nf; +extern cpuop_func_noret op_01d8_21_ff; +extern cpuop_func_noret op_01e0_21_nf; +extern cpuop_func_noret op_01e0_21_ff; +extern cpuop_func_noret op_01e8_21_nf; +extern cpuop_func_noret op_01e8_21_ff; +extern cpuop_func_noret op_01f0_21_nf; +extern cpuop_func_noret op_01f0_21_ff; +extern cpuop_func_noret op_01f8_21_nf; +extern cpuop_func_noret op_01f8_21_ff; +extern cpuop_func_noret op_01f9_21_nf; +extern cpuop_func_noret op_01f9_21_ff; +extern cpuop_func_noret op_0200_21_nf; +extern cpuop_func_noret op_0200_21_ff; +extern cpuop_func_noret op_0210_21_nf; +extern cpuop_func_noret op_0210_21_ff; +extern cpuop_func_noret op_0218_21_nf; +extern cpuop_func_noret op_0218_21_ff; +extern cpuop_func_noret op_0220_21_nf; +extern cpuop_func_noret op_0220_21_ff; +extern cpuop_func_noret op_0228_21_nf; +extern cpuop_func_noret op_0228_21_ff; +extern cpuop_func_noret op_0230_21_nf; +extern cpuop_func_noret op_0230_21_ff; +extern cpuop_func_noret op_0238_21_nf; +extern cpuop_func_noret op_0238_21_ff; +extern cpuop_func_noret op_0239_21_nf; +extern cpuop_func_noret op_0239_21_ff; +extern cpuop_func_noret op_023c_21_nf; +extern cpuop_func_noret op_023c_21_ff; +extern cpuop_func_noret op_0240_21_nf; +extern cpuop_func_noret op_0240_21_ff; +extern cpuop_func_noret op_0250_21_nf; +extern cpuop_func_noret op_0250_21_ff; +extern cpuop_func_noret op_0258_21_nf; +extern cpuop_func_noret op_0258_21_ff; +extern cpuop_func_noret op_0260_21_nf; +extern cpuop_func_noret op_0260_21_ff; +extern cpuop_func_noret op_0268_21_nf; +extern cpuop_func_noret op_0268_21_ff; +extern cpuop_func_noret op_0270_21_nf; +extern cpuop_func_noret op_0270_21_ff; +extern cpuop_func_noret op_0278_21_nf; +extern cpuop_func_noret op_0278_21_ff; +extern cpuop_func_noret op_0279_21_nf; +extern cpuop_func_noret op_0279_21_ff; +extern cpuop_func_noret op_027c_21_nf; +extern cpuop_func_noret op_027c_21_ff; +extern cpuop_func_noret op_0280_21_nf; +extern cpuop_func_noret op_0280_21_ff; +extern cpuop_func_noret op_0290_21_nf; +extern cpuop_func_noret op_0290_21_ff; +extern cpuop_func_noret op_0298_21_nf; +extern cpuop_func_noret op_0298_21_ff; +extern cpuop_func_noret op_02a0_21_nf; +extern cpuop_func_noret op_02a0_21_ff; +extern cpuop_func_noret op_02a8_21_nf; +extern cpuop_func_noret op_02a8_21_ff; +extern cpuop_func_noret op_02b0_21_nf; +extern cpuop_func_noret op_02b0_21_ff; +extern cpuop_func_noret op_02b8_21_nf; +extern cpuop_func_noret op_02b8_21_ff; +extern cpuop_func_noret op_02b9_21_nf; +extern cpuop_func_noret op_02b9_21_ff; +extern cpuop_func_noret op_02d0_21_nf; +extern cpuop_func_noret op_02d0_21_ff; +extern cpuop_func_noret op_02e8_21_nf; +extern cpuop_func_noret op_02e8_21_ff; +extern cpuop_func_noret op_02f0_21_nf; +extern cpuop_func_noret op_02f0_21_ff; +extern cpuop_func_noret op_02f8_21_nf; +extern cpuop_func_noret op_02f8_21_ff; +extern cpuop_func_noret op_02f9_21_nf; +extern cpuop_func_noret op_02f9_21_ff; +extern cpuop_func_noret op_02fa_21_nf; +extern cpuop_func_noret op_02fa_21_ff; +extern cpuop_func_noret op_02fb_21_nf; +extern cpuop_func_noret op_02fb_21_ff; +extern cpuop_func_noret op_0400_21_nf; +extern cpuop_func_noret op_0400_21_ff; +extern cpuop_func_noret op_0410_21_nf; +extern cpuop_func_noret op_0410_21_ff; +extern cpuop_func_noret op_0418_21_nf; +extern cpuop_func_noret op_0418_21_ff; +extern cpuop_func_noret op_0420_21_nf; +extern cpuop_func_noret op_0420_21_ff; +extern cpuop_func_noret op_0428_21_nf; +extern cpuop_func_noret op_0428_21_ff; +extern cpuop_func_noret op_0430_21_nf; +extern cpuop_func_noret op_0430_21_ff; +extern cpuop_func_noret op_0438_21_nf; +extern cpuop_func_noret op_0438_21_ff; +extern cpuop_func_noret op_0439_21_nf; +extern cpuop_func_noret op_0439_21_ff; +extern cpuop_func_noret op_0440_21_nf; +extern cpuop_func_noret op_0440_21_ff; +extern cpuop_func_noret op_0450_21_nf; +extern cpuop_func_noret op_0450_21_ff; +extern cpuop_func_noret op_0458_21_nf; +extern cpuop_func_noret op_0458_21_ff; +extern cpuop_func_noret op_0460_21_nf; +extern cpuop_func_noret op_0460_21_ff; +extern cpuop_func_noret op_0468_21_nf; +extern cpuop_func_noret op_0468_21_ff; +extern cpuop_func_noret op_0470_21_nf; +extern cpuop_func_noret op_0470_21_ff; +extern cpuop_func_noret op_0478_21_nf; +extern cpuop_func_noret op_0478_21_ff; +extern cpuop_func_noret op_0479_21_nf; +extern cpuop_func_noret op_0479_21_ff; +extern cpuop_func_noret op_0480_21_nf; +extern cpuop_func_noret op_0480_21_ff; +extern cpuop_func_noret op_0490_21_nf; +extern cpuop_func_noret op_0490_21_ff; +extern cpuop_func_noret op_0498_21_nf; +extern cpuop_func_noret op_0498_21_ff; +extern cpuop_func_noret op_04a0_21_nf; +extern cpuop_func_noret op_04a0_21_ff; +extern cpuop_func_noret op_04a8_21_nf; +extern cpuop_func_noret op_04a8_21_ff; +extern cpuop_func_noret op_04b0_21_nf; +extern cpuop_func_noret op_04b0_21_ff; +extern cpuop_func_noret op_04b8_21_nf; +extern cpuop_func_noret op_04b8_21_ff; +extern cpuop_func_noret op_04b9_21_nf; +extern cpuop_func_noret op_04b9_21_ff; +extern cpuop_func_noret op_04d0_21_nf; +extern cpuop_func_noret op_04d0_21_ff; +extern cpuop_func_noret op_04e8_21_nf; +extern cpuop_func_noret op_04e8_21_ff; +extern cpuop_func_noret op_04f0_21_nf; +extern cpuop_func_noret op_04f0_21_ff; +extern cpuop_func_noret op_04f8_21_nf; +extern cpuop_func_noret op_04f8_21_ff; +extern cpuop_func_noret op_04f9_21_nf; +extern cpuop_func_noret op_04f9_21_ff; +extern cpuop_func_noret op_04fa_21_nf; +extern cpuop_func_noret op_04fa_21_ff; +extern cpuop_func_noret op_04fb_21_nf; +extern cpuop_func_noret op_04fb_21_ff; +extern cpuop_func_noret op_0600_21_nf; +extern cpuop_func_noret op_0600_21_ff; +extern cpuop_func_noret op_0610_21_nf; +extern cpuop_func_noret op_0610_21_ff; +extern cpuop_func_noret op_0618_21_nf; +extern cpuop_func_noret op_0618_21_ff; +extern cpuop_func_noret op_0620_21_nf; +extern cpuop_func_noret op_0620_21_ff; +extern cpuop_func_noret op_0628_21_nf; +extern cpuop_func_noret op_0628_21_ff; +extern cpuop_func_noret op_0630_21_nf; +extern cpuop_func_noret op_0630_21_ff; +extern cpuop_func_noret op_0638_21_nf; +extern cpuop_func_noret op_0638_21_ff; +extern cpuop_func_noret op_0639_21_nf; +extern cpuop_func_noret op_0639_21_ff; +extern cpuop_func_noret op_0640_21_nf; +extern cpuop_func_noret op_0640_21_ff; +extern cpuop_func_noret op_0650_21_nf; +extern cpuop_func_noret op_0650_21_ff; +extern cpuop_func_noret op_0658_21_nf; +extern cpuop_func_noret op_0658_21_ff; +extern cpuop_func_noret op_0660_21_nf; +extern cpuop_func_noret op_0660_21_ff; +extern cpuop_func_noret op_0668_21_nf; +extern cpuop_func_noret op_0668_21_ff; +extern cpuop_func_noret op_0670_21_nf; +extern cpuop_func_noret op_0670_21_ff; +extern cpuop_func_noret op_0678_21_nf; +extern cpuop_func_noret op_0678_21_ff; +extern cpuop_func_noret op_0679_21_nf; +extern cpuop_func_noret op_0679_21_ff; +extern cpuop_func_noret op_0680_21_nf; +extern cpuop_func_noret op_0680_21_ff; +extern cpuop_func_noret op_0690_21_nf; +extern cpuop_func_noret op_0690_21_ff; +extern cpuop_func_noret op_0698_21_nf; +extern cpuop_func_noret op_0698_21_ff; +extern cpuop_func_noret op_06a0_21_nf; +extern cpuop_func_noret op_06a0_21_ff; +extern cpuop_func_noret op_06a8_21_nf; +extern cpuop_func_noret op_06a8_21_ff; +extern cpuop_func_noret op_06b0_21_nf; +extern cpuop_func_noret op_06b0_21_ff; +extern cpuop_func_noret op_06b8_21_nf; +extern cpuop_func_noret op_06b8_21_ff; +extern cpuop_func_noret op_06b9_21_nf; +extern cpuop_func_noret op_06b9_21_ff; +extern cpuop_func_noret op_06c0_21_nf; +extern cpuop_func_noret op_06c0_21_ff; +extern cpuop_func_noret op_06c8_21_nf; +extern cpuop_func_noret op_06c8_21_ff; +extern cpuop_func_noret op_06d0_21_nf; +extern cpuop_func_noret op_06d0_21_ff; +extern cpuop_func_noret op_06e8_21_nf; +extern cpuop_func_noret op_06e8_21_ff; +extern cpuop_func_noret op_06f0_21_nf; +extern cpuop_func_noret op_06f0_21_ff; +extern cpuop_func_noret op_06f8_21_nf; +extern cpuop_func_noret op_06f8_21_ff; +extern cpuop_func_noret op_06f9_21_nf; +extern cpuop_func_noret op_06f9_21_ff; +extern cpuop_func_noret op_06fa_21_nf; +extern cpuop_func_noret op_06fa_21_ff; +extern cpuop_func_noret op_06fb_21_nf; +extern cpuop_func_noret op_06fb_21_ff; +extern cpuop_func_noret op_0800_21_nf; +extern cpuop_func_noret op_0800_21_ff; +extern cpuop_func_noret op_0810_21_nf; +extern cpuop_func_noret op_0810_21_ff; +extern cpuop_func_noret op_0818_21_nf; +extern cpuop_func_noret op_0818_21_ff; +extern cpuop_func_noret op_0820_21_nf; +extern cpuop_func_noret op_0820_21_ff; +extern cpuop_func_noret op_0828_21_nf; +extern cpuop_func_noret op_0828_21_ff; +extern cpuop_func_noret op_0830_21_nf; +extern cpuop_func_noret op_0830_21_ff; +extern cpuop_func_noret op_0838_21_nf; +extern cpuop_func_noret op_0838_21_ff; +extern cpuop_func_noret op_0839_21_nf; +extern cpuop_func_noret op_0839_21_ff; +extern cpuop_func_noret op_083a_21_nf; +extern cpuop_func_noret op_083a_21_ff; +extern cpuop_func_noret op_083b_21_nf; +extern cpuop_func_noret op_083b_21_ff; +extern cpuop_func_noret op_0840_21_nf; +extern cpuop_func_noret op_0840_21_ff; +extern cpuop_func_noret op_0850_21_nf; +extern cpuop_func_noret op_0850_21_ff; +extern cpuop_func_noret op_0858_21_nf; +extern cpuop_func_noret op_0858_21_ff; +extern cpuop_func_noret op_0860_21_nf; +extern cpuop_func_noret op_0860_21_ff; +extern cpuop_func_noret op_0868_21_nf; +extern cpuop_func_noret op_0868_21_ff; +extern cpuop_func_noret op_0870_21_nf; +extern cpuop_func_noret op_0870_21_ff; +extern cpuop_func_noret op_0878_21_nf; +extern cpuop_func_noret op_0878_21_ff; +extern cpuop_func_noret op_0879_21_nf; +extern cpuop_func_noret op_0879_21_ff; +extern cpuop_func_noret op_0880_21_nf; +extern cpuop_func_noret op_0880_21_ff; +extern cpuop_func_noret op_0890_21_nf; +extern cpuop_func_noret op_0890_21_ff; +extern cpuop_func_noret op_0898_21_nf; +extern cpuop_func_noret op_0898_21_ff; +extern cpuop_func_noret op_08a0_21_nf; +extern cpuop_func_noret op_08a0_21_ff; +extern cpuop_func_noret op_08a8_21_nf; +extern cpuop_func_noret op_08a8_21_ff; +extern cpuop_func_noret op_08b0_21_nf; +extern cpuop_func_noret op_08b0_21_ff; +extern cpuop_func_noret op_08b8_21_nf; +extern cpuop_func_noret op_08b8_21_ff; +extern cpuop_func_noret op_08b9_21_nf; +extern cpuop_func_noret op_08b9_21_ff; +extern cpuop_func_noret op_08c0_21_nf; +extern cpuop_func_noret op_08c0_21_ff; +extern cpuop_func_noret op_08d0_21_nf; +extern cpuop_func_noret op_08d0_21_ff; +extern cpuop_func_noret op_08d8_21_nf; +extern cpuop_func_noret op_08d8_21_ff; +extern cpuop_func_noret op_08e0_21_nf; +extern cpuop_func_noret op_08e0_21_ff; +extern cpuop_func_noret op_08e8_21_nf; +extern cpuop_func_noret op_08e8_21_ff; +extern cpuop_func_noret op_08f0_21_nf; +extern cpuop_func_noret op_08f0_21_ff; +extern cpuop_func_noret op_08f8_21_nf; +extern cpuop_func_noret op_08f8_21_ff; +extern cpuop_func_noret op_08f9_21_nf; +extern cpuop_func_noret op_08f9_21_ff; +extern cpuop_func_noret op_0a00_21_nf; +extern cpuop_func_noret op_0a00_21_ff; +extern cpuop_func_noret op_0a10_21_nf; +extern cpuop_func_noret op_0a10_21_ff; +extern cpuop_func_noret op_0a18_21_nf; +extern cpuop_func_noret op_0a18_21_ff; +extern cpuop_func_noret op_0a20_21_nf; +extern cpuop_func_noret op_0a20_21_ff; +extern cpuop_func_noret op_0a28_21_nf; +extern cpuop_func_noret op_0a28_21_ff; +extern cpuop_func_noret op_0a30_21_nf; +extern cpuop_func_noret op_0a30_21_ff; +extern cpuop_func_noret op_0a38_21_nf; +extern cpuop_func_noret op_0a38_21_ff; +extern cpuop_func_noret op_0a39_21_nf; +extern cpuop_func_noret op_0a39_21_ff; +extern cpuop_func_noret op_0a3c_21_nf; +extern cpuop_func_noret op_0a3c_21_ff; +extern cpuop_func_noret op_0a40_21_nf; +extern cpuop_func_noret op_0a40_21_ff; +extern cpuop_func_noret op_0a50_21_nf; +extern cpuop_func_noret op_0a50_21_ff; +extern cpuop_func_noret op_0a58_21_nf; +extern cpuop_func_noret op_0a58_21_ff; +extern cpuop_func_noret op_0a60_21_nf; +extern cpuop_func_noret op_0a60_21_ff; +extern cpuop_func_noret op_0a68_21_nf; +extern cpuop_func_noret op_0a68_21_ff; +extern cpuop_func_noret op_0a70_21_nf; +extern cpuop_func_noret op_0a70_21_ff; +extern cpuop_func_noret op_0a78_21_nf; +extern cpuop_func_noret op_0a78_21_ff; +extern cpuop_func_noret op_0a79_21_nf; +extern cpuop_func_noret op_0a79_21_ff; +extern cpuop_func_noret op_0a7c_21_nf; +extern cpuop_func_noret op_0a7c_21_ff; +extern cpuop_func_noret op_0a80_21_nf; +extern cpuop_func_noret op_0a80_21_ff; +extern cpuop_func_noret op_0a90_21_nf; +extern cpuop_func_noret op_0a90_21_ff; +extern cpuop_func_noret op_0a98_21_nf; +extern cpuop_func_noret op_0a98_21_ff; +extern cpuop_func_noret op_0aa0_21_nf; +extern cpuop_func_noret op_0aa0_21_ff; +extern cpuop_func_noret op_0aa8_21_nf; +extern cpuop_func_noret op_0aa8_21_ff; +extern cpuop_func_noret op_0ab0_21_nf; +extern cpuop_func_noret op_0ab0_21_ff; +extern cpuop_func_noret op_0ab8_21_nf; +extern cpuop_func_noret op_0ab8_21_ff; +extern cpuop_func_noret op_0ab9_21_nf; +extern cpuop_func_noret op_0ab9_21_ff; +extern cpuop_func_noret op_0ad0_21_nf; +extern cpuop_func_noret op_0ad0_21_ff; +extern cpuop_func_noret op_0ad8_21_nf; +extern cpuop_func_noret op_0ad8_21_ff; +extern cpuop_func_noret op_0ae0_21_nf; +extern cpuop_func_noret op_0ae0_21_ff; +extern cpuop_func_noret op_0ae8_21_nf; +extern cpuop_func_noret op_0ae8_21_ff; +extern cpuop_func_noret op_0af0_21_nf; +extern cpuop_func_noret op_0af0_21_ff; +extern cpuop_func_noret op_0af8_21_nf; +extern cpuop_func_noret op_0af8_21_ff; +extern cpuop_func_noret op_0af9_21_nf; +extern cpuop_func_noret op_0af9_21_ff; +extern cpuop_func_noret op_0c00_21_nf; +extern cpuop_func_noret op_0c00_21_ff; +extern cpuop_func_noret op_0c10_21_nf; +extern cpuop_func_noret op_0c10_21_ff; +extern cpuop_func_noret op_0c18_21_nf; +extern cpuop_func_noret op_0c18_21_ff; +extern cpuop_func_noret op_0c20_21_nf; +extern cpuop_func_noret op_0c20_21_ff; +extern cpuop_func_noret op_0c28_21_nf; +extern cpuop_func_noret op_0c28_21_ff; +extern cpuop_func_noret op_0c30_21_nf; +extern cpuop_func_noret op_0c30_21_ff; +extern cpuop_func_noret op_0c38_21_nf; +extern cpuop_func_noret op_0c38_21_ff; +extern cpuop_func_noret op_0c39_21_nf; +extern cpuop_func_noret op_0c39_21_ff; +extern cpuop_func_noret op_0c3a_21_nf; +extern cpuop_func_noret op_0c3a_21_ff; +extern cpuop_func_noret op_0c3b_21_nf; +extern cpuop_func_noret op_0c3b_21_ff; +extern cpuop_func_noret op_0c40_21_nf; +extern cpuop_func_noret op_0c40_21_ff; +extern cpuop_func_noret op_0c50_21_nf; +extern cpuop_func_noret op_0c50_21_ff; +extern cpuop_func_noret op_0c58_21_nf; +extern cpuop_func_noret op_0c58_21_ff; +extern cpuop_func_noret op_0c60_21_nf; +extern cpuop_func_noret op_0c60_21_ff; +extern cpuop_func_noret op_0c68_21_nf; +extern cpuop_func_noret op_0c68_21_ff; +extern cpuop_func_noret op_0c70_21_nf; +extern cpuop_func_noret op_0c70_21_ff; +extern cpuop_func_noret op_0c78_21_nf; +extern cpuop_func_noret op_0c78_21_ff; +extern cpuop_func_noret op_0c79_21_nf; +extern cpuop_func_noret op_0c79_21_ff; +extern cpuop_func_noret op_0c7a_21_nf; +extern cpuop_func_noret op_0c7a_21_ff; +extern cpuop_func_noret op_0c7b_21_nf; +extern cpuop_func_noret op_0c7b_21_ff; +extern cpuop_func_noret op_0c80_21_nf; +extern cpuop_func_noret op_0c80_21_ff; +extern cpuop_func_noret op_0c90_21_nf; +extern cpuop_func_noret op_0c90_21_ff; +extern cpuop_func_noret op_0c98_21_nf; +extern cpuop_func_noret op_0c98_21_ff; +extern cpuop_func_noret op_0ca0_21_nf; +extern cpuop_func_noret op_0ca0_21_ff; +extern cpuop_func_noret op_0ca8_21_nf; +extern cpuop_func_noret op_0ca8_21_ff; +extern cpuop_func_noret op_0cb0_21_nf; +extern cpuop_func_noret op_0cb0_21_ff; +extern cpuop_func_noret op_0cb8_21_nf; +extern cpuop_func_noret op_0cb8_21_ff; +extern cpuop_func_noret op_0cb9_21_nf; +extern cpuop_func_noret op_0cb9_21_ff; +extern cpuop_func_noret op_0cba_21_nf; +extern cpuop_func_noret op_0cba_21_ff; +extern cpuop_func_noret op_0cbb_21_nf; +extern cpuop_func_noret op_0cbb_21_ff; +extern cpuop_func_noret op_0cd0_21_nf; +extern cpuop_func_noret op_0cd0_21_ff; +extern cpuop_func_noret op_0cd8_21_nf; +extern cpuop_func_noret op_0cd8_21_ff; +extern cpuop_func_noret op_0ce0_21_nf; +extern cpuop_func_noret op_0ce0_21_ff; +extern cpuop_func_noret op_0ce8_21_nf; +extern cpuop_func_noret op_0ce8_21_ff; +extern cpuop_func_noret op_0cf0_21_nf; +extern cpuop_func_noret op_0cf0_21_ff; +extern cpuop_func_noret op_0cf8_21_nf; +extern cpuop_func_noret op_0cf8_21_ff; +extern cpuop_func_noret op_0cf9_21_nf; +extern cpuop_func_noret op_0cf9_21_ff; +extern cpuop_func_noret op_0cfc_21_nf; +extern cpuop_func_noret op_0cfc_21_ff; +extern cpuop_func_noret op_0e10_21_nf; +extern cpuop_func_noret op_0e10_21_ff; +extern cpuop_func_noret op_0e18_21_nf; +extern cpuop_func_noret op_0e18_21_ff; +extern cpuop_func_noret op_0e20_21_nf; +extern cpuop_func_noret op_0e20_21_ff; +extern cpuop_func_noret op_0e28_21_nf; +extern cpuop_func_noret op_0e28_21_ff; +extern cpuop_func_noret op_0e30_21_nf; +extern cpuop_func_noret op_0e30_21_ff; +extern cpuop_func_noret op_0e38_21_nf; +extern cpuop_func_noret op_0e38_21_ff; +extern cpuop_func_noret op_0e39_21_nf; +extern cpuop_func_noret op_0e39_21_ff; +extern cpuop_func_noret op_0e50_21_nf; +extern cpuop_func_noret op_0e50_21_ff; +extern cpuop_func_noret op_0e58_21_nf; +extern cpuop_func_noret op_0e58_21_ff; +extern cpuop_func_noret op_0e60_21_nf; +extern cpuop_func_noret op_0e60_21_ff; +extern cpuop_func_noret op_0e68_21_nf; +extern cpuop_func_noret op_0e68_21_ff; +extern cpuop_func_noret op_0e70_21_nf; +extern cpuop_func_noret op_0e70_21_ff; +extern cpuop_func_noret op_0e78_21_nf; +extern cpuop_func_noret op_0e78_21_ff; +extern cpuop_func_noret op_0e79_21_nf; +extern cpuop_func_noret op_0e79_21_ff; +extern cpuop_func_noret op_0e90_21_nf; +extern cpuop_func_noret op_0e90_21_ff; +extern cpuop_func_noret op_0e98_21_nf; +extern cpuop_func_noret op_0e98_21_ff; +extern cpuop_func_noret op_0ea0_21_nf; +extern cpuop_func_noret op_0ea0_21_ff; +extern cpuop_func_noret op_0ea8_21_nf; +extern cpuop_func_noret op_0ea8_21_ff; +extern cpuop_func_noret op_0eb0_21_nf; +extern cpuop_func_noret op_0eb0_21_ff; +extern cpuop_func_noret op_0eb8_21_nf; +extern cpuop_func_noret op_0eb8_21_ff; +extern cpuop_func_noret op_0eb9_21_nf; +extern cpuop_func_noret op_0eb9_21_ff; +extern cpuop_func_noret op_0ed0_21_nf; +extern cpuop_func_noret op_0ed0_21_ff; +extern cpuop_func_noret op_0ed8_21_nf; +extern cpuop_func_noret op_0ed8_21_ff; +extern cpuop_func_noret op_0ee0_21_nf; +extern cpuop_func_noret op_0ee0_21_ff; +extern cpuop_func_noret op_0ee8_21_nf; +extern cpuop_func_noret op_0ee8_21_ff; +extern cpuop_func_noret op_0ef0_21_nf; +extern cpuop_func_noret op_0ef0_21_ff; +extern cpuop_func_noret op_0ef8_21_nf; +extern cpuop_func_noret op_0ef8_21_ff; +extern cpuop_func_noret op_0ef9_21_nf; +extern cpuop_func_noret op_0ef9_21_ff; +extern cpuop_func_noret op_0efc_21_nf; +extern cpuop_func_noret op_0efc_21_ff; +extern cpuop_func_noret op_1000_21_nf; +extern cpuop_func_noret op_1000_21_ff; +extern cpuop_func_noret op_1010_21_nf; +extern cpuop_func_noret op_1010_21_ff; +extern cpuop_func_noret op_1018_21_nf; +extern cpuop_func_noret op_1018_21_ff; +extern cpuop_func_noret op_1020_21_nf; +extern cpuop_func_noret op_1020_21_ff; +extern cpuop_func_noret op_1028_21_nf; +extern cpuop_func_noret op_1028_21_ff; +extern cpuop_func_noret op_1030_21_nf; +extern cpuop_func_noret op_1030_21_ff; +extern cpuop_func_noret op_1038_21_nf; +extern cpuop_func_noret op_1038_21_ff; +extern cpuop_func_noret op_1039_21_nf; +extern cpuop_func_noret op_1039_21_ff; +extern cpuop_func_noret op_103a_21_nf; +extern cpuop_func_noret op_103a_21_ff; +extern cpuop_func_noret op_103b_21_nf; +extern cpuop_func_noret op_103b_21_ff; +extern cpuop_func_noret op_103c_21_nf; +extern cpuop_func_noret op_103c_21_ff; +extern cpuop_func_noret op_1080_21_nf; +extern cpuop_func_noret op_1080_21_ff; +extern cpuop_func_noret op_1090_21_nf; +extern cpuop_func_noret op_1090_21_ff; +extern cpuop_func_noret op_1098_21_nf; +extern cpuop_func_noret op_1098_21_ff; +extern cpuop_func_noret op_10a0_21_nf; +extern cpuop_func_noret op_10a0_21_ff; +extern cpuop_func_noret op_10a8_21_nf; +extern cpuop_func_noret op_10a8_21_ff; +extern cpuop_func_noret op_10b0_21_nf; +extern cpuop_func_noret op_10b0_21_ff; +extern cpuop_func_noret op_10b8_21_nf; +extern cpuop_func_noret op_10b8_21_ff; +extern cpuop_func_noret op_10b9_21_nf; +extern cpuop_func_noret op_10b9_21_ff; +extern cpuop_func_noret op_10ba_21_nf; +extern cpuop_func_noret op_10ba_21_ff; +extern cpuop_func_noret op_10bb_21_nf; +extern cpuop_func_noret op_10bb_21_ff; +extern cpuop_func_noret op_10bc_21_nf; +extern cpuop_func_noret op_10bc_21_ff; +extern cpuop_func_noret op_10c0_21_nf; +extern cpuop_func_noret op_10c0_21_ff; +extern cpuop_func_noret op_10d0_21_nf; +extern cpuop_func_noret op_10d0_21_ff; +extern cpuop_func_noret op_10d8_21_nf; +extern cpuop_func_noret op_10d8_21_ff; +extern cpuop_func_noret op_10e0_21_nf; +extern cpuop_func_noret op_10e0_21_ff; +extern cpuop_func_noret op_10e8_21_nf; +extern cpuop_func_noret op_10e8_21_ff; +extern cpuop_func_noret op_10f0_21_nf; +extern cpuop_func_noret op_10f0_21_ff; +extern cpuop_func_noret op_10f8_21_nf; +extern cpuop_func_noret op_10f8_21_ff; +extern cpuop_func_noret op_10f9_21_nf; +extern cpuop_func_noret op_10f9_21_ff; +extern cpuop_func_noret op_10fa_21_nf; +extern cpuop_func_noret op_10fa_21_ff; +extern cpuop_func_noret op_10fb_21_nf; +extern cpuop_func_noret op_10fb_21_ff; +extern cpuop_func_noret op_10fc_21_nf; +extern cpuop_func_noret op_10fc_21_ff; +extern cpuop_func_noret op_1100_21_nf; +extern cpuop_func_noret op_1100_21_ff; +extern cpuop_func_noret op_1110_21_nf; +extern cpuop_func_noret op_1110_21_ff; +extern cpuop_func_noret op_1118_21_nf; +extern cpuop_func_noret op_1118_21_ff; +extern cpuop_func_noret op_1120_21_nf; +extern cpuop_func_noret op_1120_21_ff; +extern cpuop_func_noret op_1128_21_nf; +extern cpuop_func_noret op_1128_21_ff; +extern cpuop_func_noret op_1130_21_nf; +extern cpuop_func_noret op_1130_21_ff; +extern cpuop_func_noret op_1138_21_nf; +extern cpuop_func_noret op_1138_21_ff; +extern cpuop_func_noret op_1139_21_nf; +extern cpuop_func_noret op_1139_21_ff; +extern cpuop_func_noret op_113a_21_nf; +extern cpuop_func_noret op_113a_21_ff; +extern cpuop_func_noret op_113b_21_nf; +extern cpuop_func_noret op_113b_21_ff; +extern cpuop_func_noret op_113c_21_nf; +extern cpuop_func_noret op_113c_21_ff; +extern cpuop_func_noret op_1140_21_nf; +extern cpuop_func_noret op_1140_21_ff; +extern cpuop_func_noret op_1150_21_nf; +extern cpuop_func_noret op_1150_21_ff; +extern cpuop_func_noret op_1158_21_nf; +extern cpuop_func_noret op_1158_21_ff; +extern cpuop_func_noret op_1160_21_nf; +extern cpuop_func_noret op_1160_21_ff; +extern cpuop_func_noret op_1168_21_nf; +extern cpuop_func_noret op_1168_21_ff; +extern cpuop_func_noret op_1170_21_nf; +extern cpuop_func_noret op_1170_21_ff; +extern cpuop_func_noret op_1178_21_nf; +extern cpuop_func_noret op_1178_21_ff; +extern cpuop_func_noret op_1179_21_nf; +extern cpuop_func_noret op_1179_21_ff; +extern cpuop_func_noret op_117a_21_nf; +extern cpuop_func_noret op_117a_21_ff; +extern cpuop_func_noret op_117b_21_nf; +extern cpuop_func_noret op_117b_21_ff; +extern cpuop_func_noret op_117c_21_nf; +extern cpuop_func_noret op_117c_21_ff; +extern cpuop_func_noret op_1180_21_nf; +extern cpuop_func_noret op_1180_21_ff; +extern cpuop_func_noret op_1190_21_nf; +extern cpuop_func_noret op_1190_21_ff; +extern cpuop_func_noret op_1198_21_nf; +extern cpuop_func_noret op_1198_21_ff; +extern cpuop_func_noret op_11a0_21_nf; +extern cpuop_func_noret op_11a0_21_ff; +extern cpuop_func_noret op_11a8_21_nf; +extern cpuop_func_noret op_11a8_21_ff; +extern cpuop_func_noret op_11b0_21_nf; +extern cpuop_func_noret op_11b0_21_ff; +extern cpuop_func_noret op_11b8_21_nf; +extern cpuop_func_noret op_11b8_21_ff; +extern cpuop_func_noret op_11b9_21_nf; +extern cpuop_func_noret op_11b9_21_ff; +extern cpuop_func_noret op_11ba_21_nf; +extern cpuop_func_noret op_11ba_21_ff; +extern cpuop_func_noret op_11bb_21_nf; +extern cpuop_func_noret op_11bb_21_ff; +extern cpuop_func_noret op_11bc_21_nf; +extern cpuop_func_noret op_11bc_21_ff; +extern cpuop_func_noret op_11c0_21_nf; +extern cpuop_func_noret op_11c0_21_ff; +extern cpuop_func_noret op_11d0_21_nf; +extern cpuop_func_noret op_11d0_21_ff; +extern cpuop_func_noret op_11d8_21_nf; +extern cpuop_func_noret op_11d8_21_ff; +extern cpuop_func_noret op_11e0_21_nf; +extern cpuop_func_noret op_11e0_21_ff; +extern cpuop_func_noret op_11e8_21_nf; +extern cpuop_func_noret op_11e8_21_ff; +extern cpuop_func_noret op_11f0_21_nf; +extern cpuop_func_noret op_11f0_21_ff; +extern cpuop_func_noret op_11f8_21_nf; +extern cpuop_func_noret op_11f8_21_ff; +extern cpuop_func_noret op_11f9_21_nf; +extern cpuop_func_noret op_11f9_21_ff; +extern cpuop_func_noret op_11fa_21_nf; +extern cpuop_func_noret op_11fa_21_ff; +extern cpuop_func_noret op_11fb_21_nf; +extern cpuop_func_noret op_11fb_21_ff; +extern cpuop_func_noret op_11fc_21_nf; +extern cpuop_func_noret op_11fc_21_ff; +extern cpuop_func_noret op_13c0_21_nf; +extern cpuop_func_noret op_13c0_21_ff; +extern cpuop_func_noret op_13d0_21_nf; +extern cpuop_func_noret op_13d0_21_ff; +extern cpuop_func_noret op_13d8_21_nf; +extern cpuop_func_noret op_13d8_21_ff; +extern cpuop_func_noret op_13e0_21_nf; +extern cpuop_func_noret op_13e0_21_ff; +extern cpuop_func_noret op_13e8_21_nf; +extern cpuop_func_noret op_13e8_21_ff; +extern cpuop_func_noret op_13f0_21_nf; +extern cpuop_func_noret op_13f0_21_ff; +extern cpuop_func_noret op_13f8_21_nf; +extern cpuop_func_noret op_13f8_21_ff; +extern cpuop_func_noret op_13f9_21_nf; +extern cpuop_func_noret op_13f9_21_ff; +extern cpuop_func_noret op_13fa_21_nf; +extern cpuop_func_noret op_13fa_21_ff; +extern cpuop_func_noret op_13fb_21_nf; +extern cpuop_func_noret op_13fb_21_ff; +extern cpuop_func_noret op_13fc_21_nf; +extern cpuop_func_noret op_13fc_21_ff; +extern cpuop_func_noret op_2000_21_nf; +extern cpuop_func_noret op_2000_21_ff; +extern cpuop_func_noret op_2008_21_nf; +extern cpuop_func_noret op_2008_21_ff; +extern cpuop_func_noret op_2010_21_nf; +extern cpuop_func_noret op_2010_21_ff; +extern cpuop_func_noret op_2018_21_nf; +extern cpuop_func_noret op_2018_21_ff; +extern cpuop_func_noret op_2020_21_nf; +extern cpuop_func_noret op_2020_21_ff; +extern cpuop_func_noret op_2028_21_nf; +extern cpuop_func_noret op_2028_21_ff; +extern cpuop_func_noret op_2030_21_nf; +extern cpuop_func_noret op_2030_21_ff; +extern cpuop_func_noret op_2038_21_nf; +extern cpuop_func_noret op_2038_21_ff; +extern cpuop_func_noret op_2039_21_nf; +extern cpuop_func_noret op_2039_21_ff; +extern cpuop_func_noret op_203a_21_nf; +extern cpuop_func_noret op_203a_21_ff; +extern cpuop_func_noret op_203b_21_nf; +extern cpuop_func_noret op_203b_21_ff; +extern cpuop_func_noret op_203c_21_nf; +extern cpuop_func_noret op_203c_21_ff; +extern cpuop_func_noret op_2040_21_nf; +extern cpuop_func_noret op_2040_21_ff; +extern cpuop_func_noret op_2048_21_nf; +extern cpuop_func_noret op_2048_21_ff; +extern cpuop_func_noret op_2050_21_nf; +extern cpuop_func_noret op_2050_21_ff; +extern cpuop_func_noret op_2058_21_nf; +extern cpuop_func_noret op_2058_21_ff; +extern cpuop_func_noret op_2060_21_nf; +extern cpuop_func_noret op_2060_21_ff; +extern cpuop_func_noret op_2068_21_nf; +extern cpuop_func_noret op_2068_21_ff; +extern cpuop_func_noret op_2070_21_nf; +extern cpuop_func_noret op_2070_21_ff; +extern cpuop_func_noret op_2078_21_nf; +extern cpuop_func_noret op_2078_21_ff; +extern cpuop_func_noret op_2079_21_nf; +extern cpuop_func_noret op_2079_21_ff; +extern cpuop_func_noret op_207a_21_nf; +extern cpuop_func_noret op_207a_21_ff; +extern cpuop_func_noret op_207b_21_nf; +extern cpuop_func_noret op_207b_21_ff; +extern cpuop_func_noret op_207c_21_nf; +extern cpuop_func_noret op_207c_21_ff; +extern cpuop_func_noret op_2080_21_nf; +extern cpuop_func_noret op_2080_21_ff; +extern cpuop_func_noret op_2088_21_nf; +extern cpuop_func_noret op_2088_21_ff; +extern cpuop_func_noret op_2090_21_nf; +extern cpuop_func_noret op_2090_21_ff; +extern cpuop_func_noret op_2098_21_nf; +extern cpuop_func_noret op_2098_21_ff; +extern cpuop_func_noret op_20a0_21_nf; +extern cpuop_func_noret op_20a0_21_ff; +extern cpuop_func_noret op_20a8_21_nf; +extern cpuop_func_noret op_20a8_21_ff; +extern cpuop_func_noret op_20b0_21_nf; +extern cpuop_func_noret op_20b0_21_ff; +extern cpuop_func_noret op_20b8_21_nf; +extern cpuop_func_noret op_20b8_21_ff; +extern cpuop_func_noret op_20b9_21_nf; +extern cpuop_func_noret op_20b9_21_ff; +extern cpuop_func_noret op_20ba_21_nf; +extern cpuop_func_noret op_20ba_21_ff; +extern cpuop_func_noret op_20bb_21_nf; +extern cpuop_func_noret op_20bb_21_ff; +extern cpuop_func_noret op_20bc_21_nf; +extern cpuop_func_noret op_20bc_21_ff; +extern cpuop_func_noret op_20c0_21_nf; +extern cpuop_func_noret op_20c0_21_ff; +extern cpuop_func_noret op_20c8_21_nf; +extern cpuop_func_noret op_20c8_21_ff; +extern cpuop_func_noret op_20d0_21_nf; +extern cpuop_func_noret op_20d0_21_ff; +extern cpuop_func_noret op_20d8_21_nf; +extern cpuop_func_noret op_20d8_21_ff; +extern cpuop_func_noret op_20e0_21_nf; +extern cpuop_func_noret op_20e0_21_ff; +extern cpuop_func_noret op_20e8_21_nf; +extern cpuop_func_noret op_20e8_21_ff; +extern cpuop_func_noret op_20f0_21_nf; +extern cpuop_func_noret op_20f0_21_ff; +extern cpuop_func_noret op_20f8_21_nf; +extern cpuop_func_noret op_20f8_21_ff; +extern cpuop_func_noret op_20f9_21_nf; +extern cpuop_func_noret op_20f9_21_ff; +extern cpuop_func_noret op_20fa_21_nf; +extern cpuop_func_noret op_20fa_21_ff; +extern cpuop_func_noret op_20fb_21_nf; +extern cpuop_func_noret op_20fb_21_ff; +extern cpuop_func_noret op_20fc_21_nf; +extern cpuop_func_noret op_20fc_21_ff; +extern cpuop_func_noret op_2100_21_nf; +extern cpuop_func_noret op_2100_21_ff; +extern cpuop_func_noret op_2108_21_nf; +extern cpuop_func_noret op_2108_21_ff; +extern cpuop_func_noret op_2110_21_nf; +extern cpuop_func_noret op_2110_21_ff; +extern cpuop_func_noret op_2118_21_nf; +extern cpuop_func_noret op_2118_21_ff; +extern cpuop_func_noret op_2120_21_nf; +extern cpuop_func_noret op_2120_21_ff; +extern cpuop_func_noret op_2128_21_nf; +extern cpuop_func_noret op_2128_21_ff; +extern cpuop_func_noret op_2130_21_nf; +extern cpuop_func_noret op_2130_21_ff; +extern cpuop_func_noret op_2138_21_nf; +extern cpuop_func_noret op_2138_21_ff; +extern cpuop_func_noret op_2139_21_nf; +extern cpuop_func_noret op_2139_21_ff; +extern cpuop_func_noret op_213a_21_nf; +extern cpuop_func_noret op_213a_21_ff; +extern cpuop_func_noret op_213b_21_nf; +extern cpuop_func_noret op_213b_21_ff; +extern cpuop_func_noret op_213c_21_nf; +extern cpuop_func_noret op_213c_21_ff; +extern cpuop_func_noret op_2140_21_nf; +extern cpuop_func_noret op_2140_21_ff; +extern cpuop_func_noret op_2148_21_nf; +extern cpuop_func_noret op_2148_21_ff; +extern cpuop_func_noret op_2150_21_nf; +extern cpuop_func_noret op_2150_21_ff; +extern cpuop_func_noret op_2158_21_nf; +extern cpuop_func_noret op_2158_21_ff; +extern cpuop_func_noret op_2160_21_nf; +extern cpuop_func_noret op_2160_21_ff; +extern cpuop_func_noret op_2168_21_nf; +extern cpuop_func_noret op_2168_21_ff; +extern cpuop_func_noret op_2170_21_nf; +extern cpuop_func_noret op_2170_21_ff; +extern cpuop_func_noret op_2178_21_nf; +extern cpuop_func_noret op_2178_21_ff; +extern cpuop_func_noret op_2179_21_nf; +extern cpuop_func_noret op_2179_21_ff; +extern cpuop_func_noret op_217a_21_nf; +extern cpuop_func_noret op_217a_21_ff; +extern cpuop_func_noret op_217b_21_nf; +extern cpuop_func_noret op_217b_21_ff; +extern cpuop_func_noret op_217c_21_nf; +extern cpuop_func_noret op_217c_21_ff; +extern cpuop_func_noret op_2180_21_nf; +extern cpuop_func_noret op_2180_21_ff; +extern cpuop_func_noret op_2188_21_nf; +extern cpuop_func_noret op_2188_21_ff; +extern cpuop_func_noret op_2190_21_nf; +extern cpuop_func_noret op_2190_21_ff; +extern cpuop_func_noret op_2198_21_nf; +extern cpuop_func_noret op_2198_21_ff; +extern cpuop_func_noret op_21a0_21_nf; +extern cpuop_func_noret op_21a0_21_ff; +extern cpuop_func_noret op_21a8_21_nf; +extern cpuop_func_noret op_21a8_21_ff; +extern cpuop_func_noret op_21b0_21_nf; +extern cpuop_func_noret op_21b0_21_ff; +extern cpuop_func_noret op_21b8_21_nf; +extern cpuop_func_noret op_21b8_21_ff; +extern cpuop_func_noret op_21b9_21_nf; +extern cpuop_func_noret op_21b9_21_ff; +extern cpuop_func_noret op_21ba_21_nf; +extern cpuop_func_noret op_21ba_21_ff; +extern cpuop_func_noret op_21bb_21_nf; +extern cpuop_func_noret op_21bb_21_ff; +extern cpuop_func_noret op_21bc_21_nf; +extern cpuop_func_noret op_21bc_21_ff; +extern cpuop_func_noret op_21c0_21_nf; +extern cpuop_func_noret op_21c0_21_ff; +extern cpuop_func_noret op_21c8_21_nf; +extern cpuop_func_noret op_21c8_21_ff; +extern cpuop_func_noret op_21d0_21_nf; +extern cpuop_func_noret op_21d0_21_ff; +extern cpuop_func_noret op_21d8_21_nf; +extern cpuop_func_noret op_21d8_21_ff; +extern cpuop_func_noret op_21e0_21_nf; +extern cpuop_func_noret op_21e0_21_ff; +extern cpuop_func_noret op_21e8_21_nf; +extern cpuop_func_noret op_21e8_21_ff; +extern cpuop_func_noret op_21f0_21_nf; +extern cpuop_func_noret op_21f0_21_ff; +extern cpuop_func_noret op_21f8_21_nf; +extern cpuop_func_noret op_21f8_21_ff; +extern cpuop_func_noret op_21f9_21_nf; +extern cpuop_func_noret op_21f9_21_ff; +extern cpuop_func_noret op_21fa_21_nf; +extern cpuop_func_noret op_21fa_21_ff; +extern cpuop_func_noret op_21fb_21_nf; +extern cpuop_func_noret op_21fb_21_ff; +extern cpuop_func_noret op_21fc_21_nf; +extern cpuop_func_noret op_21fc_21_ff; +extern cpuop_func_noret op_23c0_21_nf; +extern cpuop_func_noret op_23c0_21_ff; +extern cpuop_func_noret op_23c8_21_nf; +extern cpuop_func_noret op_23c8_21_ff; +extern cpuop_func_noret op_23d0_21_nf; +extern cpuop_func_noret op_23d0_21_ff; +extern cpuop_func_noret op_23d8_21_nf; +extern cpuop_func_noret op_23d8_21_ff; +extern cpuop_func_noret op_23e0_21_nf; +extern cpuop_func_noret op_23e0_21_ff; +extern cpuop_func_noret op_23e8_21_nf; +extern cpuop_func_noret op_23e8_21_ff; +extern cpuop_func_noret op_23f0_21_nf; +extern cpuop_func_noret op_23f0_21_ff; +extern cpuop_func_noret op_23f8_21_nf; +extern cpuop_func_noret op_23f8_21_ff; +extern cpuop_func_noret op_23f9_21_nf; +extern cpuop_func_noret op_23f9_21_ff; +extern cpuop_func_noret op_23fa_21_nf; +extern cpuop_func_noret op_23fa_21_ff; +extern cpuop_func_noret op_23fb_21_nf; +extern cpuop_func_noret op_23fb_21_ff; +extern cpuop_func_noret op_23fc_21_nf; +extern cpuop_func_noret op_23fc_21_ff; +extern cpuop_func_noret op_3000_21_nf; +extern cpuop_func_noret op_3000_21_ff; +extern cpuop_func_noret op_3008_21_nf; +extern cpuop_func_noret op_3008_21_ff; +extern cpuop_func_noret op_3010_21_nf; +extern cpuop_func_noret op_3010_21_ff; +extern cpuop_func_noret op_3018_21_nf; +extern cpuop_func_noret op_3018_21_ff; +extern cpuop_func_noret op_3020_21_nf; +extern cpuop_func_noret op_3020_21_ff; +extern cpuop_func_noret op_3028_21_nf; +extern cpuop_func_noret op_3028_21_ff; +extern cpuop_func_noret op_3030_21_nf; +extern cpuop_func_noret op_3030_21_ff; +extern cpuop_func_noret op_3038_21_nf; +extern cpuop_func_noret op_3038_21_ff; +extern cpuop_func_noret op_3039_21_nf; +extern cpuop_func_noret op_3039_21_ff; +extern cpuop_func_noret op_303a_21_nf; +extern cpuop_func_noret op_303a_21_ff; +extern cpuop_func_noret op_303b_21_nf; +extern cpuop_func_noret op_303b_21_ff; +extern cpuop_func_noret op_303c_21_nf; +extern cpuop_func_noret op_303c_21_ff; +extern cpuop_func_noret op_3040_21_nf; +extern cpuop_func_noret op_3040_21_ff; +extern cpuop_func_noret op_3048_21_nf; +extern cpuop_func_noret op_3048_21_ff; +extern cpuop_func_noret op_3050_21_nf; +extern cpuop_func_noret op_3050_21_ff; +extern cpuop_func_noret op_3058_21_nf; +extern cpuop_func_noret op_3058_21_ff; +extern cpuop_func_noret op_3060_21_nf; +extern cpuop_func_noret op_3060_21_ff; +extern cpuop_func_noret op_3068_21_nf; +extern cpuop_func_noret op_3068_21_ff; +extern cpuop_func_noret op_3070_21_nf; +extern cpuop_func_noret op_3070_21_ff; +extern cpuop_func_noret op_3078_21_nf; +extern cpuop_func_noret op_3078_21_ff; +extern cpuop_func_noret op_3079_21_nf; +extern cpuop_func_noret op_3079_21_ff; +extern cpuop_func_noret op_307a_21_nf; +extern cpuop_func_noret op_307a_21_ff; +extern cpuop_func_noret op_307b_21_nf; +extern cpuop_func_noret op_307b_21_ff; +extern cpuop_func_noret op_307c_21_nf; +extern cpuop_func_noret op_307c_21_ff; +extern cpuop_func_noret op_3080_21_nf; +extern cpuop_func_noret op_3080_21_ff; +extern cpuop_func_noret op_3088_21_nf; +extern cpuop_func_noret op_3088_21_ff; +extern cpuop_func_noret op_3090_21_nf; +extern cpuop_func_noret op_3090_21_ff; +extern cpuop_func_noret op_3098_21_nf; +extern cpuop_func_noret op_3098_21_ff; +extern cpuop_func_noret op_30a0_21_nf; +extern cpuop_func_noret op_30a0_21_ff; +extern cpuop_func_noret op_30a8_21_nf; +extern cpuop_func_noret op_30a8_21_ff; +extern cpuop_func_noret op_30b0_21_nf; +extern cpuop_func_noret op_30b0_21_ff; +extern cpuop_func_noret op_30b8_21_nf; +extern cpuop_func_noret op_30b8_21_ff; +extern cpuop_func_noret op_30b9_21_nf; +extern cpuop_func_noret op_30b9_21_ff; +extern cpuop_func_noret op_30ba_21_nf; +extern cpuop_func_noret op_30ba_21_ff; +extern cpuop_func_noret op_30bb_21_nf; +extern cpuop_func_noret op_30bb_21_ff; +extern cpuop_func_noret op_30bc_21_nf; +extern cpuop_func_noret op_30bc_21_ff; +extern cpuop_func_noret op_30c0_21_nf; +extern cpuop_func_noret op_30c0_21_ff; +extern cpuop_func_noret op_30c8_21_nf; +extern cpuop_func_noret op_30c8_21_ff; +extern cpuop_func_noret op_30d0_21_nf; +extern cpuop_func_noret op_30d0_21_ff; +extern cpuop_func_noret op_30d8_21_nf; +extern cpuop_func_noret op_30d8_21_ff; +extern cpuop_func_noret op_30e0_21_nf; +extern cpuop_func_noret op_30e0_21_ff; +extern cpuop_func_noret op_30e8_21_nf; +extern cpuop_func_noret op_30e8_21_ff; +extern cpuop_func_noret op_30f0_21_nf; +extern cpuop_func_noret op_30f0_21_ff; +extern cpuop_func_noret op_30f8_21_nf; +extern cpuop_func_noret op_30f8_21_ff; +extern cpuop_func_noret op_30f9_21_nf; +extern cpuop_func_noret op_30f9_21_ff; +extern cpuop_func_noret op_30fa_21_nf; +extern cpuop_func_noret op_30fa_21_ff; +extern cpuop_func_noret op_30fb_21_nf; +extern cpuop_func_noret op_30fb_21_ff; +extern cpuop_func_noret op_30fc_21_nf; +extern cpuop_func_noret op_30fc_21_ff; +extern cpuop_func_noret op_3100_21_nf; +extern cpuop_func_noret op_3100_21_ff; +extern cpuop_func_noret op_3108_21_nf; +extern cpuop_func_noret op_3108_21_ff; +extern cpuop_func_noret op_3110_21_nf; +extern cpuop_func_noret op_3110_21_ff; +extern cpuop_func_noret op_3118_21_nf; +extern cpuop_func_noret op_3118_21_ff; +extern cpuop_func_noret op_3120_21_nf; +extern cpuop_func_noret op_3120_21_ff; +extern cpuop_func_noret op_3128_21_nf; +extern cpuop_func_noret op_3128_21_ff; +extern cpuop_func_noret op_3130_21_nf; +extern cpuop_func_noret op_3130_21_ff; +extern cpuop_func_noret op_3138_21_nf; +extern cpuop_func_noret op_3138_21_ff; +extern cpuop_func_noret op_3139_21_nf; +extern cpuop_func_noret op_3139_21_ff; +extern cpuop_func_noret op_313a_21_nf; +extern cpuop_func_noret op_313a_21_ff; +extern cpuop_func_noret op_313b_21_nf; +extern cpuop_func_noret op_313b_21_ff; +extern cpuop_func_noret op_313c_21_nf; +extern cpuop_func_noret op_313c_21_ff; +extern cpuop_func_noret op_3140_21_nf; +extern cpuop_func_noret op_3140_21_ff; +extern cpuop_func_noret op_3148_21_nf; +extern cpuop_func_noret op_3148_21_ff; +extern cpuop_func_noret op_3150_21_nf; +extern cpuop_func_noret op_3150_21_ff; +extern cpuop_func_noret op_3158_21_nf; +extern cpuop_func_noret op_3158_21_ff; +extern cpuop_func_noret op_3160_21_nf; +extern cpuop_func_noret op_3160_21_ff; +extern cpuop_func_noret op_3168_21_nf; +extern cpuop_func_noret op_3168_21_ff; +extern cpuop_func_noret op_3170_21_nf; +extern cpuop_func_noret op_3170_21_ff; +extern cpuop_func_noret op_3178_21_nf; +extern cpuop_func_noret op_3178_21_ff; +extern cpuop_func_noret op_3179_21_nf; +extern cpuop_func_noret op_3179_21_ff; +extern cpuop_func_noret op_317a_21_nf; +extern cpuop_func_noret op_317a_21_ff; +extern cpuop_func_noret op_317b_21_nf; +extern cpuop_func_noret op_317b_21_ff; +extern cpuop_func_noret op_317c_21_nf; +extern cpuop_func_noret op_317c_21_ff; +extern cpuop_func_noret op_3180_21_nf; +extern cpuop_func_noret op_3180_21_ff; +extern cpuop_func_noret op_3188_21_nf; +extern cpuop_func_noret op_3188_21_ff; +extern cpuop_func_noret op_3190_21_nf; +extern cpuop_func_noret op_3190_21_ff; +extern cpuop_func_noret op_3198_21_nf; +extern cpuop_func_noret op_3198_21_ff; +extern cpuop_func_noret op_31a0_21_nf; +extern cpuop_func_noret op_31a0_21_ff; +extern cpuop_func_noret op_31a8_21_nf; +extern cpuop_func_noret op_31a8_21_ff; +extern cpuop_func_noret op_31b0_21_nf; +extern cpuop_func_noret op_31b0_21_ff; +extern cpuop_func_noret op_31b8_21_nf; +extern cpuop_func_noret op_31b8_21_ff; +extern cpuop_func_noret op_31b9_21_nf; +extern cpuop_func_noret op_31b9_21_ff; +extern cpuop_func_noret op_31ba_21_nf; +extern cpuop_func_noret op_31ba_21_ff; +extern cpuop_func_noret op_31bb_21_nf; +extern cpuop_func_noret op_31bb_21_ff; +extern cpuop_func_noret op_31bc_21_nf; +extern cpuop_func_noret op_31bc_21_ff; +extern cpuop_func_noret op_31c0_21_nf; +extern cpuop_func_noret op_31c0_21_ff; +extern cpuop_func_noret op_31c8_21_nf; +extern cpuop_func_noret op_31c8_21_ff; +extern cpuop_func_noret op_31d0_21_nf; +extern cpuop_func_noret op_31d0_21_ff; +extern cpuop_func_noret op_31d8_21_nf; +extern cpuop_func_noret op_31d8_21_ff; +extern cpuop_func_noret op_31e0_21_nf; +extern cpuop_func_noret op_31e0_21_ff; +extern cpuop_func_noret op_31e8_21_nf; +extern cpuop_func_noret op_31e8_21_ff; +extern cpuop_func_noret op_31f0_21_nf; +extern cpuop_func_noret op_31f0_21_ff; +extern cpuop_func_noret op_31f8_21_nf; +extern cpuop_func_noret op_31f8_21_ff; +extern cpuop_func_noret op_31f9_21_nf; +extern cpuop_func_noret op_31f9_21_ff; +extern cpuop_func_noret op_31fa_21_nf; +extern cpuop_func_noret op_31fa_21_ff; +extern cpuop_func_noret op_31fb_21_nf; +extern cpuop_func_noret op_31fb_21_ff; +extern cpuop_func_noret op_31fc_21_nf; +extern cpuop_func_noret op_31fc_21_ff; +extern cpuop_func_noret op_33c0_21_nf; +extern cpuop_func_noret op_33c0_21_ff; +extern cpuop_func_noret op_33c8_21_nf; +extern cpuop_func_noret op_33c8_21_ff; +extern cpuop_func_noret op_33d0_21_nf; +extern cpuop_func_noret op_33d0_21_ff; +extern cpuop_func_noret op_33d8_21_nf; +extern cpuop_func_noret op_33d8_21_ff; +extern cpuop_func_noret op_33e0_21_nf; +extern cpuop_func_noret op_33e0_21_ff; +extern cpuop_func_noret op_33e8_21_nf; +extern cpuop_func_noret op_33e8_21_ff; +extern cpuop_func_noret op_33f0_21_nf; +extern cpuop_func_noret op_33f0_21_ff; +extern cpuop_func_noret op_33f8_21_nf; +extern cpuop_func_noret op_33f8_21_ff; +extern cpuop_func_noret op_33f9_21_nf; +extern cpuop_func_noret op_33f9_21_ff; +extern cpuop_func_noret op_33fa_21_nf; +extern cpuop_func_noret op_33fa_21_ff; +extern cpuop_func_noret op_33fb_21_nf; +extern cpuop_func_noret op_33fb_21_ff; +extern cpuop_func_noret op_33fc_21_nf; +extern cpuop_func_noret op_33fc_21_ff; +extern cpuop_func_noret op_4000_21_nf; +extern cpuop_func_noret op_4000_21_ff; +extern cpuop_func_noret op_4010_21_nf; +extern cpuop_func_noret op_4010_21_ff; +extern cpuop_func_noret op_4018_21_nf; +extern cpuop_func_noret op_4018_21_ff; +extern cpuop_func_noret op_4020_21_nf; +extern cpuop_func_noret op_4020_21_ff; +extern cpuop_func_noret op_4028_21_nf; +extern cpuop_func_noret op_4028_21_ff; +extern cpuop_func_noret op_4030_21_nf; +extern cpuop_func_noret op_4030_21_ff; +extern cpuop_func_noret op_4038_21_nf; +extern cpuop_func_noret op_4038_21_ff; +extern cpuop_func_noret op_4039_21_nf; +extern cpuop_func_noret op_4039_21_ff; +extern cpuop_func_noret op_4040_21_nf; +extern cpuop_func_noret op_4040_21_ff; +extern cpuop_func_noret op_4050_21_nf; +extern cpuop_func_noret op_4050_21_ff; +extern cpuop_func_noret op_4058_21_nf; +extern cpuop_func_noret op_4058_21_ff; +extern cpuop_func_noret op_4060_21_nf; +extern cpuop_func_noret op_4060_21_ff; +extern cpuop_func_noret op_4068_21_nf; +extern cpuop_func_noret op_4068_21_ff; +extern cpuop_func_noret op_4070_21_nf; +extern cpuop_func_noret op_4070_21_ff; +extern cpuop_func_noret op_4078_21_nf; +extern cpuop_func_noret op_4078_21_ff; +extern cpuop_func_noret op_4079_21_nf; +extern cpuop_func_noret op_4079_21_ff; +extern cpuop_func_noret op_4080_21_nf; +extern cpuop_func_noret op_4080_21_ff; +extern cpuop_func_noret op_4090_21_nf; +extern cpuop_func_noret op_4090_21_ff; +extern cpuop_func_noret op_4098_21_nf; +extern cpuop_func_noret op_4098_21_ff; +extern cpuop_func_noret op_40a0_21_nf; +extern cpuop_func_noret op_40a0_21_ff; +extern cpuop_func_noret op_40a8_21_nf; +extern cpuop_func_noret op_40a8_21_ff; +extern cpuop_func_noret op_40b0_21_nf; +extern cpuop_func_noret op_40b0_21_ff; +extern cpuop_func_noret op_40b8_21_nf; +extern cpuop_func_noret op_40b8_21_ff; +extern cpuop_func_noret op_40b9_21_nf; +extern cpuop_func_noret op_40b9_21_ff; +extern cpuop_func_noret op_40c0_21_nf; +extern cpuop_func_noret op_40c0_21_ff; +extern cpuop_func_noret op_40d0_21_nf; +extern cpuop_func_noret op_40d0_21_ff; +extern cpuop_func_noret op_40d8_21_nf; +extern cpuop_func_noret op_40d8_21_ff; +extern cpuop_func_noret op_40e0_21_nf; +extern cpuop_func_noret op_40e0_21_ff; +extern cpuop_func_noret op_40e8_21_nf; +extern cpuop_func_noret op_40e8_21_ff; +extern cpuop_func_noret op_40f0_21_nf; +extern cpuop_func_noret op_40f0_21_ff; +extern cpuop_func_noret op_40f8_21_nf; +extern cpuop_func_noret op_40f8_21_ff; +extern cpuop_func_noret op_40f9_21_nf; +extern cpuop_func_noret op_40f9_21_ff; +extern cpuop_func_noret op_4100_21_nf; +extern cpuop_func_noret op_4100_21_ff; +extern cpuop_func_noret op_4110_21_nf; +extern cpuop_func_noret op_4110_21_ff; +extern cpuop_func_noret op_4118_21_nf; +extern cpuop_func_noret op_4118_21_ff; +extern cpuop_func_noret op_4120_21_nf; +extern cpuop_func_noret op_4120_21_ff; +extern cpuop_func_noret op_4128_21_nf; +extern cpuop_func_noret op_4128_21_ff; +extern cpuop_func_noret op_4130_21_nf; +extern cpuop_func_noret op_4130_21_ff; +extern cpuop_func_noret op_4138_21_nf; +extern cpuop_func_noret op_4138_21_ff; +extern cpuop_func_noret op_4139_21_nf; +extern cpuop_func_noret op_4139_21_ff; +extern cpuop_func_noret op_413a_21_nf; +extern cpuop_func_noret op_413a_21_ff; +extern cpuop_func_noret op_413b_21_nf; +extern cpuop_func_noret op_413b_21_ff; +extern cpuop_func_noret op_413c_21_nf; +extern cpuop_func_noret op_413c_21_ff; +extern cpuop_func_noret op_4180_21_nf; +extern cpuop_func_noret op_4180_21_ff; +extern cpuop_func_noret op_4190_21_nf; +extern cpuop_func_noret op_4190_21_ff; +extern cpuop_func_noret op_4198_21_nf; +extern cpuop_func_noret op_4198_21_ff; +extern cpuop_func_noret op_41a0_21_nf; +extern cpuop_func_noret op_41a0_21_ff; +extern cpuop_func_noret op_41a8_21_nf; +extern cpuop_func_noret op_41a8_21_ff; +extern cpuop_func_noret op_41b0_21_nf; +extern cpuop_func_noret op_41b0_21_ff; +extern cpuop_func_noret op_41b8_21_nf; +extern cpuop_func_noret op_41b8_21_ff; +extern cpuop_func_noret op_41b9_21_nf; +extern cpuop_func_noret op_41b9_21_ff; +extern cpuop_func_noret op_41ba_21_nf; +extern cpuop_func_noret op_41ba_21_ff; +extern cpuop_func_noret op_41bb_21_nf; +extern cpuop_func_noret op_41bb_21_ff; +extern cpuop_func_noret op_41bc_21_nf; +extern cpuop_func_noret op_41bc_21_ff; +extern cpuop_func_noret op_41d0_21_nf; +extern cpuop_func_noret op_41d0_21_ff; +extern cpuop_func_noret op_41e8_21_nf; +extern cpuop_func_noret op_41e8_21_ff; +extern cpuop_func_noret op_41f0_21_nf; +extern cpuop_func_noret op_41f0_21_ff; +extern cpuop_func_noret op_41f8_21_nf; +extern cpuop_func_noret op_41f8_21_ff; +extern cpuop_func_noret op_41f9_21_nf; +extern cpuop_func_noret op_41f9_21_ff; +extern cpuop_func_noret op_41fa_21_nf; +extern cpuop_func_noret op_41fa_21_ff; +extern cpuop_func_noret op_41fb_21_nf; +extern cpuop_func_noret op_41fb_21_ff; +extern cpuop_func_noret op_4200_21_nf; +extern cpuop_func_noret op_4200_21_ff; +extern cpuop_func_noret op_4210_21_nf; +extern cpuop_func_noret op_4210_21_ff; +extern cpuop_func_noret op_4218_21_nf; +extern cpuop_func_noret op_4218_21_ff; +extern cpuop_func_noret op_4220_21_nf; +extern cpuop_func_noret op_4220_21_ff; +extern cpuop_func_noret op_4228_21_nf; +extern cpuop_func_noret op_4228_21_ff; +extern cpuop_func_noret op_4230_21_nf; +extern cpuop_func_noret op_4230_21_ff; +extern cpuop_func_noret op_4238_21_nf; +extern cpuop_func_noret op_4238_21_ff; +extern cpuop_func_noret op_4239_21_nf; +extern cpuop_func_noret op_4239_21_ff; +extern cpuop_func_noret op_4240_21_nf; +extern cpuop_func_noret op_4240_21_ff; +extern cpuop_func_noret op_4250_21_nf; +extern cpuop_func_noret op_4250_21_ff; +extern cpuop_func_noret op_4258_21_nf; +extern cpuop_func_noret op_4258_21_ff; +extern cpuop_func_noret op_4260_21_nf; +extern cpuop_func_noret op_4260_21_ff; +extern cpuop_func_noret op_4268_21_nf; +extern cpuop_func_noret op_4268_21_ff; +extern cpuop_func_noret op_4270_21_nf; +extern cpuop_func_noret op_4270_21_ff; +extern cpuop_func_noret op_4278_21_nf; +extern cpuop_func_noret op_4278_21_ff; +extern cpuop_func_noret op_4279_21_nf; +extern cpuop_func_noret op_4279_21_ff; +extern cpuop_func_noret op_4280_21_nf; +extern cpuop_func_noret op_4280_21_ff; +extern cpuop_func_noret op_4290_21_nf; +extern cpuop_func_noret op_4290_21_ff; +extern cpuop_func_noret op_4298_21_nf; +extern cpuop_func_noret op_4298_21_ff; +extern cpuop_func_noret op_42a0_21_nf; +extern cpuop_func_noret op_42a0_21_ff; +extern cpuop_func_noret op_42a8_21_nf; +extern cpuop_func_noret op_42a8_21_ff; +extern cpuop_func_noret op_42b0_21_nf; +extern cpuop_func_noret op_42b0_21_ff; +extern cpuop_func_noret op_42b8_21_nf; +extern cpuop_func_noret op_42b8_21_ff; +extern cpuop_func_noret op_42b9_21_nf; +extern cpuop_func_noret op_42b9_21_ff; +extern cpuop_func_noret op_42c0_21_nf; +extern cpuop_func_noret op_42c0_21_ff; +extern cpuop_func_noret op_42d0_21_nf; +extern cpuop_func_noret op_42d0_21_ff; +extern cpuop_func_noret op_42d8_21_nf; +extern cpuop_func_noret op_42d8_21_ff; +extern cpuop_func_noret op_42e0_21_nf; +extern cpuop_func_noret op_42e0_21_ff; +extern cpuop_func_noret op_42e8_21_nf; +extern cpuop_func_noret op_42e8_21_ff; +extern cpuop_func_noret op_42f0_21_nf; +extern cpuop_func_noret op_42f0_21_ff; +extern cpuop_func_noret op_42f8_21_nf; +extern cpuop_func_noret op_42f8_21_ff; +extern cpuop_func_noret op_42f9_21_nf; +extern cpuop_func_noret op_42f9_21_ff; +extern cpuop_func_noret op_4400_21_nf; +extern cpuop_func_noret op_4400_21_ff; +extern cpuop_func_noret op_4410_21_nf; +extern cpuop_func_noret op_4410_21_ff; +extern cpuop_func_noret op_4418_21_nf; +extern cpuop_func_noret op_4418_21_ff; +extern cpuop_func_noret op_4420_21_nf; +extern cpuop_func_noret op_4420_21_ff; +extern cpuop_func_noret op_4428_21_nf; +extern cpuop_func_noret op_4428_21_ff; +extern cpuop_func_noret op_4430_21_nf; +extern cpuop_func_noret op_4430_21_ff; +extern cpuop_func_noret op_4438_21_nf; +extern cpuop_func_noret op_4438_21_ff; +extern cpuop_func_noret op_4439_21_nf; +extern cpuop_func_noret op_4439_21_ff; +extern cpuop_func_noret op_4440_21_nf; +extern cpuop_func_noret op_4440_21_ff; +extern cpuop_func_noret op_4450_21_nf; +extern cpuop_func_noret op_4450_21_ff; +extern cpuop_func_noret op_4458_21_nf; +extern cpuop_func_noret op_4458_21_ff; +extern cpuop_func_noret op_4460_21_nf; +extern cpuop_func_noret op_4460_21_ff; +extern cpuop_func_noret op_4468_21_nf; +extern cpuop_func_noret op_4468_21_ff; +extern cpuop_func_noret op_4470_21_nf; +extern cpuop_func_noret op_4470_21_ff; +extern cpuop_func_noret op_4478_21_nf; +extern cpuop_func_noret op_4478_21_ff; +extern cpuop_func_noret op_4479_21_nf; +extern cpuop_func_noret op_4479_21_ff; +extern cpuop_func_noret op_4480_21_nf; +extern cpuop_func_noret op_4480_21_ff; +extern cpuop_func_noret op_4490_21_nf; +extern cpuop_func_noret op_4490_21_ff; +extern cpuop_func_noret op_4498_21_nf; +extern cpuop_func_noret op_4498_21_ff; +extern cpuop_func_noret op_44a0_21_nf; +extern cpuop_func_noret op_44a0_21_ff; +extern cpuop_func_noret op_44a8_21_nf; +extern cpuop_func_noret op_44a8_21_ff; +extern cpuop_func_noret op_44b0_21_nf; +extern cpuop_func_noret op_44b0_21_ff; +extern cpuop_func_noret op_44b8_21_nf; +extern cpuop_func_noret op_44b8_21_ff; +extern cpuop_func_noret op_44b9_21_nf; +extern cpuop_func_noret op_44b9_21_ff; +extern cpuop_func_noret op_44c0_21_nf; +extern cpuop_func_noret op_44c0_21_ff; +extern cpuop_func_noret op_44d0_21_nf; +extern cpuop_func_noret op_44d0_21_ff; +extern cpuop_func_noret op_44d8_21_nf; +extern cpuop_func_noret op_44d8_21_ff; +extern cpuop_func_noret op_44e0_21_nf; +extern cpuop_func_noret op_44e0_21_ff; +extern cpuop_func_noret op_44e8_21_nf; +extern cpuop_func_noret op_44e8_21_ff; +extern cpuop_func_noret op_44f0_21_nf; +extern cpuop_func_noret op_44f0_21_ff; +extern cpuop_func_noret op_44f8_21_nf; +extern cpuop_func_noret op_44f8_21_ff; +extern cpuop_func_noret op_44f9_21_nf; +extern cpuop_func_noret op_44f9_21_ff; +extern cpuop_func_noret op_44fa_21_nf; +extern cpuop_func_noret op_44fa_21_ff; +extern cpuop_func_noret op_44fb_21_nf; +extern cpuop_func_noret op_44fb_21_ff; +extern cpuop_func_noret op_44fc_21_nf; +extern cpuop_func_noret op_44fc_21_ff; +extern cpuop_func_noret op_4600_21_nf; +extern cpuop_func_noret op_4600_21_ff; +extern cpuop_func_noret op_4610_21_nf; +extern cpuop_func_noret op_4610_21_ff; +extern cpuop_func_noret op_4618_21_nf; +extern cpuop_func_noret op_4618_21_ff; +extern cpuop_func_noret op_4620_21_nf; +extern cpuop_func_noret op_4620_21_ff; +extern cpuop_func_noret op_4628_21_nf; +extern cpuop_func_noret op_4628_21_ff; +extern cpuop_func_noret op_4630_21_nf; +extern cpuop_func_noret op_4630_21_ff; +extern cpuop_func_noret op_4638_21_nf; +extern cpuop_func_noret op_4638_21_ff; +extern cpuop_func_noret op_4639_21_nf; +extern cpuop_func_noret op_4639_21_ff; +extern cpuop_func_noret op_4640_21_nf; +extern cpuop_func_noret op_4640_21_ff; +extern cpuop_func_noret op_4650_21_nf; +extern cpuop_func_noret op_4650_21_ff; +extern cpuop_func_noret op_4658_21_nf; +extern cpuop_func_noret op_4658_21_ff; +extern cpuop_func_noret op_4660_21_nf; +extern cpuop_func_noret op_4660_21_ff; +extern cpuop_func_noret op_4668_21_nf; +extern cpuop_func_noret op_4668_21_ff; +extern cpuop_func_noret op_4670_21_nf; +extern cpuop_func_noret op_4670_21_ff; +extern cpuop_func_noret op_4678_21_nf; +extern cpuop_func_noret op_4678_21_ff; +extern cpuop_func_noret op_4679_21_nf; +extern cpuop_func_noret op_4679_21_ff; +extern cpuop_func_noret op_4680_21_nf; +extern cpuop_func_noret op_4680_21_ff; +extern cpuop_func_noret op_4690_21_nf; +extern cpuop_func_noret op_4690_21_ff; +extern cpuop_func_noret op_4698_21_nf; +extern cpuop_func_noret op_4698_21_ff; +extern cpuop_func_noret op_46a0_21_nf; +extern cpuop_func_noret op_46a0_21_ff; +extern cpuop_func_noret op_46a8_21_nf; +extern cpuop_func_noret op_46a8_21_ff; +extern cpuop_func_noret op_46b0_21_nf; +extern cpuop_func_noret op_46b0_21_ff; +extern cpuop_func_noret op_46b8_21_nf; +extern cpuop_func_noret op_46b8_21_ff; +extern cpuop_func_noret op_46b9_21_nf; +extern cpuop_func_noret op_46b9_21_ff; +extern cpuop_func_noret op_46c0_21_nf; +extern cpuop_func_noret op_46c0_21_ff; +extern cpuop_func_noret op_46d0_21_nf; +extern cpuop_func_noret op_46d0_21_ff; +extern cpuop_func_noret op_46d8_21_nf; +extern cpuop_func_noret op_46d8_21_ff; +extern cpuop_func_noret op_46e0_21_nf; +extern cpuop_func_noret op_46e0_21_ff; +extern cpuop_func_noret op_46e8_21_nf; +extern cpuop_func_noret op_46e8_21_ff; +extern cpuop_func_noret op_46f0_21_nf; +extern cpuop_func_noret op_46f0_21_ff; +extern cpuop_func_noret op_46f8_21_nf; +extern cpuop_func_noret op_46f8_21_ff; +extern cpuop_func_noret op_46f9_21_nf; +extern cpuop_func_noret op_46f9_21_ff; +extern cpuop_func_noret op_46fa_21_nf; +extern cpuop_func_noret op_46fa_21_ff; +extern cpuop_func_noret op_46fb_21_nf; +extern cpuop_func_noret op_46fb_21_ff; +extern cpuop_func_noret op_46fc_21_nf; +extern cpuop_func_noret op_46fc_21_ff; +extern cpuop_func_noret op_4800_21_nf; +extern cpuop_func_noret op_4800_21_ff; +extern cpuop_func_noret op_4808_21_nf; +extern cpuop_func_noret op_4808_21_ff; +extern cpuop_func_noret op_4810_21_nf; +extern cpuop_func_noret op_4810_21_ff; +extern cpuop_func_noret op_4818_21_nf; +extern cpuop_func_noret op_4818_21_ff; +extern cpuop_func_noret op_4820_21_nf; +extern cpuop_func_noret op_4820_21_ff; +extern cpuop_func_noret op_4828_21_nf; +extern cpuop_func_noret op_4828_21_ff; +extern cpuop_func_noret op_4830_21_nf; +extern cpuop_func_noret op_4830_21_ff; +extern cpuop_func_noret op_4838_21_nf; +extern cpuop_func_noret op_4838_21_ff; +extern cpuop_func_noret op_4839_21_nf; +extern cpuop_func_noret op_4839_21_ff; +extern cpuop_func_noret op_4840_21_nf; +extern cpuop_func_noret op_4840_21_ff; +extern cpuop_func_noret op_4848_21_nf; +extern cpuop_func_noret op_4848_21_ff; +extern cpuop_func_noret op_4850_21_nf; +extern cpuop_func_noret op_4850_21_ff; +extern cpuop_func_noret op_4868_21_nf; +extern cpuop_func_noret op_4868_21_ff; +extern cpuop_func_noret op_4870_21_nf; +extern cpuop_func_noret op_4870_21_ff; +extern cpuop_func_noret op_4878_21_nf; +extern cpuop_func_noret op_4878_21_ff; +extern cpuop_func_noret op_4879_21_nf; +extern cpuop_func_noret op_4879_21_ff; +extern cpuop_func_noret op_487a_21_nf; +extern cpuop_func_noret op_487a_21_ff; +extern cpuop_func_noret op_487b_21_nf; +extern cpuop_func_noret op_487b_21_ff; +extern cpuop_func_noret op_4880_21_nf; +extern cpuop_func_noret op_4880_21_ff; +extern cpuop_func_noret op_4890_21_nf; +extern cpuop_func_noret op_4890_21_ff; +extern cpuop_func_noret op_48a0_21_nf; +extern cpuop_func_noret op_48a0_21_ff; +extern cpuop_func_noret op_48a8_21_nf; +extern cpuop_func_noret op_48a8_21_ff; +extern cpuop_func_noret op_48b0_21_nf; +extern cpuop_func_noret op_48b0_21_ff; +extern cpuop_func_noret op_48b8_21_nf; +extern cpuop_func_noret op_48b8_21_ff; +extern cpuop_func_noret op_48b9_21_nf; +extern cpuop_func_noret op_48b9_21_ff; +extern cpuop_func_noret op_48c0_21_nf; +extern cpuop_func_noret op_48c0_21_ff; +extern cpuop_func_noret op_48d0_21_nf; +extern cpuop_func_noret op_48d0_21_ff; +extern cpuop_func_noret op_48e0_21_nf; +extern cpuop_func_noret op_48e0_21_ff; +extern cpuop_func_noret op_48e8_21_nf; +extern cpuop_func_noret op_48e8_21_ff; +extern cpuop_func_noret op_48f0_21_nf; +extern cpuop_func_noret op_48f0_21_ff; +extern cpuop_func_noret op_48f8_21_nf; +extern cpuop_func_noret op_48f8_21_ff; +extern cpuop_func_noret op_48f9_21_nf; +extern cpuop_func_noret op_48f9_21_ff; +extern cpuop_func_noret op_49c0_21_nf; +extern cpuop_func_noret op_49c0_21_ff; +extern cpuop_func_noret op_4a00_21_nf; +extern cpuop_func_noret op_4a00_21_ff; +extern cpuop_func_noret op_4a10_21_nf; +extern cpuop_func_noret op_4a10_21_ff; +extern cpuop_func_noret op_4a18_21_nf; +extern cpuop_func_noret op_4a18_21_ff; +extern cpuop_func_noret op_4a20_21_nf; +extern cpuop_func_noret op_4a20_21_ff; +extern cpuop_func_noret op_4a28_21_nf; +extern cpuop_func_noret op_4a28_21_ff; +extern cpuop_func_noret op_4a30_21_nf; +extern cpuop_func_noret op_4a30_21_ff; +extern cpuop_func_noret op_4a38_21_nf; +extern cpuop_func_noret op_4a38_21_ff; +extern cpuop_func_noret op_4a39_21_nf; +extern cpuop_func_noret op_4a39_21_ff; +extern cpuop_func_noret op_4a3a_21_nf; +extern cpuop_func_noret op_4a3a_21_ff; +extern cpuop_func_noret op_4a3b_21_nf; +extern cpuop_func_noret op_4a3b_21_ff; +extern cpuop_func_noret op_4a3c_21_nf; +extern cpuop_func_noret op_4a3c_21_ff; +extern cpuop_func_noret op_4a40_21_nf; +extern cpuop_func_noret op_4a40_21_ff; +extern cpuop_func_noret op_4a48_21_nf; +extern cpuop_func_noret op_4a48_21_ff; +extern cpuop_func_noret op_4a50_21_nf; +extern cpuop_func_noret op_4a50_21_ff; +extern cpuop_func_noret op_4a58_21_nf; +extern cpuop_func_noret op_4a58_21_ff; +extern cpuop_func_noret op_4a60_21_nf; +extern cpuop_func_noret op_4a60_21_ff; +extern cpuop_func_noret op_4a68_21_nf; +extern cpuop_func_noret op_4a68_21_ff; +extern cpuop_func_noret op_4a70_21_nf; +extern cpuop_func_noret op_4a70_21_ff; +extern cpuop_func_noret op_4a78_21_nf; +extern cpuop_func_noret op_4a78_21_ff; +extern cpuop_func_noret op_4a79_21_nf; +extern cpuop_func_noret op_4a79_21_ff; +extern cpuop_func_noret op_4a7a_21_nf; +extern cpuop_func_noret op_4a7a_21_ff; +extern cpuop_func_noret op_4a7b_21_nf; +extern cpuop_func_noret op_4a7b_21_ff; +extern cpuop_func_noret op_4a7c_21_nf; +extern cpuop_func_noret op_4a7c_21_ff; +extern cpuop_func_noret op_4a80_21_nf; +extern cpuop_func_noret op_4a80_21_ff; +extern cpuop_func_noret op_4a88_21_nf; +extern cpuop_func_noret op_4a88_21_ff; +extern cpuop_func_noret op_4a90_21_nf; +extern cpuop_func_noret op_4a90_21_ff; +extern cpuop_func_noret op_4a98_21_nf; +extern cpuop_func_noret op_4a98_21_ff; +extern cpuop_func_noret op_4aa0_21_nf; +extern cpuop_func_noret op_4aa0_21_ff; +extern cpuop_func_noret op_4aa8_21_nf; +extern cpuop_func_noret op_4aa8_21_ff; +extern cpuop_func_noret op_4ab0_21_nf; +extern cpuop_func_noret op_4ab0_21_ff; +extern cpuop_func_noret op_4ab8_21_nf; +extern cpuop_func_noret op_4ab8_21_ff; +extern cpuop_func_noret op_4ab9_21_nf; +extern cpuop_func_noret op_4ab9_21_ff; +extern cpuop_func_noret op_4aba_21_nf; +extern cpuop_func_noret op_4aba_21_ff; +extern cpuop_func_noret op_4abb_21_nf; +extern cpuop_func_noret op_4abb_21_ff; +extern cpuop_func_noret op_4abc_21_nf; +extern cpuop_func_noret op_4abc_21_ff; +extern cpuop_func_noret op_4ac0_21_nf; +extern cpuop_func_noret op_4ac0_21_ff; +extern cpuop_func_noret op_4ad0_21_nf; +extern cpuop_func_noret op_4ad0_21_ff; +extern cpuop_func_noret op_4ad8_21_nf; +extern cpuop_func_noret op_4ad8_21_ff; +extern cpuop_func_noret op_4ae0_21_nf; +extern cpuop_func_noret op_4ae0_21_ff; +extern cpuop_func_noret op_4ae8_21_nf; +extern cpuop_func_noret op_4ae8_21_ff; +extern cpuop_func_noret op_4af0_21_nf; +extern cpuop_func_noret op_4af0_21_ff; +extern cpuop_func_noret op_4af8_21_nf; +extern cpuop_func_noret op_4af8_21_ff; +extern cpuop_func_noret op_4af9_21_nf; +extern cpuop_func_noret op_4af9_21_ff; +extern cpuop_func_noret op_4c00_21_nf; +extern cpuop_func_noret op_4c00_21_ff; +extern cpuop_func_noret op_4c10_21_nf; +extern cpuop_func_noret op_4c10_21_ff; +extern cpuop_func_noret op_4c18_21_nf; +extern cpuop_func_noret op_4c18_21_ff; +extern cpuop_func_noret op_4c20_21_nf; +extern cpuop_func_noret op_4c20_21_ff; +extern cpuop_func_noret op_4c28_21_nf; +extern cpuop_func_noret op_4c28_21_ff; +extern cpuop_func_noret op_4c30_21_nf; +extern cpuop_func_noret op_4c30_21_ff; +extern cpuop_func_noret op_4c38_21_nf; +extern cpuop_func_noret op_4c38_21_ff; +extern cpuop_func_noret op_4c39_21_nf; +extern cpuop_func_noret op_4c39_21_ff; +extern cpuop_func_noret op_4c3a_21_nf; +extern cpuop_func_noret op_4c3a_21_ff; +extern cpuop_func_noret op_4c3b_21_nf; +extern cpuop_func_noret op_4c3b_21_ff; +extern cpuop_func_noret op_4c3c_21_nf; +extern cpuop_func_noret op_4c3c_21_ff; +extern cpuop_func_noret op_4c40_21_nf; +extern cpuop_func_noret op_4c40_21_ff; +extern cpuop_func_noret op_4c50_21_nf; +extern cpuop_func_noret op_4c50_21_ff; +extern cpuop_func_noret op_4c58_21_nf; +extern cpuop_func_noret op_4c58_21_ff; +extern cpuop_func_noret op_4c60_21_nf; +extern cpuop_func_noret op_4c60_21_ff; +extern cpuop_func_noret op_4c68_21_nf; +extern cpuop_func_noret op_4c68_21_ff; +extern cpuop_func_noret op_4c70_21_nf; +extern cpuop_func_noret op_4c70_21_ff; +extern cpuop_func_noret op_4c78_21_nf; +extern cpuop_func_noret op_4c78_21_ff; +extern cpuop_func_noret op_4c79_21_nf; +extern cpuop_func_noret op_4c79_21_ff; +extern cpuop_func_noret op_4c7a_21_nf; +extern cpuop_func_noret op_4c7a_21_ff; +extern cpuop_func_noret op_4c7b_21_nf; +extern cpuop_func_noret op_4c7b_21_ff; +extern cpuop_func_noret op_4c7c_21_nf; +extern cpuop_func_noret op_4c7c_21_ff; +extern cpuop_func_noret op_4c90_21_nf; +extern cpuop_func_noret op_4c90_21_ff; +extern cpuop_func_noret op_4c98_21_nf; +extern cpuop_func_noret op_4c98_21_ff; +extern cpuop_func_noret op_4ca8_21_nf; +extern cpuop_func_noret op_4ca8_21_ff; +extern cpuop_func_noret op_4cb0_21_nf; +extern cpuop_func_noret op_4cb0_21_ff; +extern cpuop_func_noret op_4cb8_21_nf; +extern cpuop_func_noret op_4cb8_21_ff; +extern cpuop_func_noret op_4cb9_21_nf; +extern cpuop_func_noret op_4cb9_21_ff; +extern cpuop_func_noret op_4cba_21_nf; +extern cpuop_func_noret op_4cba_21_ff; +extern cpuop_func_noret op_4cbb_21_nf; +extern cpuop_func_noret op_4cbb_21_ff; +extern cpuop_func_noret op_4cd0_21_nf; +extern cpuop_func_noret op_4cd0_21_ff; +extern cpuop_func_noret op_4cd8_21_nf; +extern cpuop_func_noret op_4cd8_21_ff; +extern cpuop_func_noret op_4ce8_21_nf; +extern cpuop_func_noret op_4ce8_21_ff; +extern cpuop_func_noret op_4cf0_21_nf; +extern cpuop_func_noret op_4cf0_21_ff; +extern cpuop_func_noret op_4cf8_21_nf; +extern cpuop_func_noret op_4cf8_21_ff; +extern cpuop_func_noret op_4cf9_21_nf; +extern cpuop_func_noret op_4cf9_21_ff; +extern cpuop_func_noret op_4cfa_21_nf; +extern cpuop_func_noret op_4cfa_21_ff; +extern cpuop_func_noret op_4cfb_21_nf; +extern cpuop_func_noret op_4cfb_21_ff; +extern cpuop_func_noret op_4e40_21_nf; +extern cpuop_func_noret op_4e40_21_ff; +extern cpuop_func_noret op_4e50_21_nf; +extern cpuop_func_noret op_4e50_21_ff; +extern cpuop_func_noret op_4e58_21_nf; +extern cpuop_func_noret op_4e58_21_ff; +extern cpuop_func_noret op_4e60_21_nf; +extern cpuop_func_noret op_4e60_21_ff; +extern cpuop_func_noret op_4e68_21_nf; +extern cpuop_func_noret op_4e68_21_ff; +extern cpuop_func_noret op_4e70_21_nf; +extern cpuop_func_noret op_4e70_21_ff; +extern cpuop_func_noret op_4e71_21_nf; +extern cpuop_func_noret op_4e71_21_ff; +extern cpuop_func_noret op_4e72_21_nf; +extern cpuop_func_noret op_4e72_21_ff; +extern cpuop_func_noret op_4e73_21_nf; +extern cpuop_func_noret op_4e73_21_ff; +extern cpuop_func_noret op_4e74_21_nf; +extern cpuop_func_noret op_4e74_21_ff; +extern cpuop_func_noret op_4e75_21_nf; +extern cpuop_func_noret op_4e75_21_ff; +extern cpuop_func_noret op_4e76_21_nf; +extern cpuop_func_noret op_4e76_21_ff; +extern cpuop_func_noret op_4e77_21_nf; +extern cpuop_func_noret op_4e77_21_ff; +extern cpuop_func_noret op_4e7a_21_nf; +extern cpuop_func_noret op_4e7a_21_ff; +extern cpuop_func_noret op_4e7b_21_nf; +extern cpuop_func_noret op_4e7b_21_ff; +extern cpuop_func_noret op_4e90_21_nf; +extern cpuop_func_noret op_4e90_21_ff; +extern cpuop_func_noret op_4ea8_21_nf; +extern cpuop_func_noret op_4ea8_21_ff; +extern cpuop_func_noret op_4eb0_21_nf; +extern cpuop_func_noret op_4eb0_21_ff; +extern cpuop_func_noret op_4eb8_21_nf; +extern cpuop_func_noret op_4eb8_21_ff; +extern cpuop_func_noret op_4eb9_21_nf; +extern cpuop_func_noret op_4eb9_21_ff; +extern cpuop_func_noret op_4eba_21_nf; +extern cpuop_func_noret op_4eba_21_ff; +extern cpuop_func_noret op_4ebb_21_nf; +extern cpuop_func_noret op_4ebb_21_ff; +extern cpuop_func_noret op_4ed0_21_nf; +extern cpuop_func_noret op_4ed0_21_ff; +extern cpuop_func_noret op_4ee8_21_nf; +extern cpuop_func_noret op_4ee8_21_ff; +extern cpuop_func_noret op_4ef0_21_nf; +extern cpuop_func_noret op_4ef0_21_ff; +extern cpuop_func_noret op_4ef8_21_nf; +extern cpuop_func_noret op_4ef8_21_ff; +extern cpuop_func_noret op_4ef9_21_nf; +extern cpuop_func_noret op_4ef9_21_ff; +extern cpuop_func_noret op_4efa_21_nf; +extern cpuop_func_noret op_4efa_21_ff; +extern cpuop_func_noret op_4efb_21_nf; +extern cpuop_func_noret op_4efb_21_ff; +extern cpuop_func_noret op_5000_21_nf; +extern cpuop_func_noret op_5000_21_ff; +extern cpuop_func_noret op_5010_21_nf; +extern cpuop_func_noret op_5010_21_ff; +extern cpuop_func_noret op_5018_21_nf; +extern cpuop_func_noret op_5018_21_ff; +extern cpuop_func_noret op_5020_21_nf; +extern cpuop_func_noret op_5020_21_ff; +extern cpuop_func_noret op_5028_21_nf; +extern cpuop_func_noret op_5028_21_ff; +extern cpuop_func_noret op_5030_21_nf; +extern cpuop_func_noret op_5030_21_ff; +extern cpuop_func_noret op_5038_21_nf; +extern cpuop_func_noret op_5038_21_ff; +extern cpuop_func_noret op_5039_21_nf; +extern cpuop_func_noret op_5039_21_ff; +extern cpuop_func_noret op_5040_21_nf; +extern cpuop_func_noret op_5040_21_ff; +extern cpuop_func_noret op_5048_21_nf; +extern cpuop_func_noret op_5048_21_ff; +extern cpuop_func_noret op_5050_21_nf; +extern cpuop_func_noret op_5050_21_ff; +extern cpuop_func_noret op_5058_21_nf; +extern cpuop_func_noret op_5058_21_ff; +extern cpuop_func_noret op_5060_21_nf; +extern cpuop_func_noret op_5060_21_ff; +extern cpuop_func_noret op_5068_21_nf; +extern cpuop_func_noret op_5068_21_ff; +extern cpuop_func_noret op_5070_21_nf; +extern cpuop_func_noret op_5070_21_ff; +extern cpuop_func_noret op_5078_21_nf; +extern cpuop_func_noret op_5078_21_ff; +extern cpuop_func_noret op_5079_21_nf; +extern cpuop_func_noret op_5079_21_ff; +extern cpuop_func_noret op_5080_21_nf; +extern cpuop_func_noret op_5080_21_ff; +extern cpuop_func_noret op_5088_21_nf; +extern cpuop_func_noret op_5088_21_ff; +extern cpuop_func_noret op_5090_21_nf; +extern cpuop_func_noret op_5090_21_ff; +extern cpuop_func_noret op_5098_21_nf; +extern cpuop_func_noret op_5098_21_ff; +extern cpuop_func_noret op_50a0_21_nf; +extern cpuop_func_noret op_50a0_21_ff; +extern cpuop_func_noret op_50a8_21_nf; +extern cpuop_func_noret op_50a8_21_ff; +extern cpuop_func_noret op_50b0_21_nf; +extern cpuop_func_noret op_50b0_21_ff; +extern cpuop_func_noret op_50b8_21_nf; +extern cpuop_func_noret op_50b8_21_ff; +extern cpuop_func_noret op_50b9_21_nf; +extern cpuop_func_noret op_50b9_21_ff; +extern cpuop_func_noret op_50c0_21_nf; +extern cpuop_func_noret op_50c0_21_ff; +extern cpuop_func_noret op_50c8_21_nf; +extern cpuop_func_noret op_50c8_21_ff; +extern cpuop_func_noret op_50d0_21_nf; +extern cpuop_func_noret op_50d0_21_ff; +extern cpuop_func_noret op_50d8_21_nf; +extern cpuop_func_noret op_50d8_21_ff; +extern cpuop_func_noret op_50e0_21_nf; +extern cpuop_func_noret op_50e0_21_ff; +extern cpuop_func_noret op_50e8_21_nf; +extern cpuop_func_noret op_50e8_21_ff; +extern cpuop_func_noret op_50f0_21_nf; +extern cpuop_func_noret op_50f0_21_ff; +extern cpuop_func_noret op_50f8_21_nf; +extern cpuop_func_noret op_50f8_21_ff; +extern cpuop_func_noret op_50f9_21_nf; +extern cpuop_func_noret op_50f9_21_ff; +extern cpuop_func_noret op_50fa_21_nf; +extern cpuop_func_noret op_50fa_21_ff; +extern cpuop_func_noret op_50fb_21_nf; +extern cpuop_func_noret op_50fb_21_ff; +extern cpuop_func_noret op_50fc_21_nf; +extern cpuop_func_noret op_50fc_21_ff; +extern cpuop_func_noret op_5100_21_nf; +extern cpuop_func_noret op_5100_21_ff; +extern cpuop_func_noret op_5110_21_nf; +extern cpuop_func_noret op_5110_21_ff; +extern cpuop_func_noret op_5118_21_nf; +extern cpuop_func_noret op_5118_21_ff; +extern cpuop_func_noret op_5120_21_nf; +extern cpuop_func_noret op_5120_21_ff; +extern cpuop_func_noret op_5128_21_nf; +extern cpuop_func_noret op_5128_21_ff; +extern cpuop_func_noret op_5130_21_nf; +extern cpuop_func_noret op_5130_21_ff; +extern cpuop_func_noret op_5138_21_nf; +extern cpuop_func_noret op_5138_21_ff; +extern cpuop_func_noret op_5139_21_nf; +extern cpuop_func_noret op_5139_21_ff; +extern cpuop_func_noret op_5140_21_nf; +extern cpuop_func_noret op_5140_21_ff; +extern cpuop_func_noret op_5148_21_nf; +extern cpuop_func_noret op_5148_21_ff; +extern cpuop_func_noret op_5150_21_nf; +extern cpuop_func_noret op_5150_21_ff; +extern cpuop_func_noret op_5158_21_nf; +extern cpuop_func_noret op_5158_21_ff; +extern cpuop_func_noret op_5160_21_nf; +extern cpuop_func_noret op_5160_21_ff; +extern cpuop_func_noret op_5168_21_nf; +extern cpuop_func_noret op_5168_21_ff; +extern cpuop_func_noret op_5170_21_nf; +extern cpuop_func_noret op_5170_21_ff; +extern cpuop_func_noret op_5178_21_nf; +extern cpuop_func_noret op_5178_21_ff; +extern cpuop_func_noret op_5179_21_nf; +extern cpuop_func_noret op_5179_21_ff; +extern cpuop_func_noret op_5180_21_nf; +extern cpuop_func_noret op_5180_21_ff; +extern cpuop_func_noret op_5188_21_nf; +extern cpuop_func_noret op_5188_21_ff; +extern cpuop_func_noret op_5190_21_nf; +extern cpuop_func_noret op_5190_21_ff; +extern cpuop_func_noret op_5198_21_nf; +extern cpuop_func_noret op_5198_21_ff; +extern cpuop_func_noret op_51a0_21_nf; +extern cpuop_func_noret op_51a0_21_ff; +extern cpuop_func_noret op_51a8_21_nf; +extern cpuop_func_noret op_51a8_21_ff; +extern cpuop_func_noret op_51b0_21_nf; +extern cpuop_func_noret op_51b0_21_ff; +extern cpuop_func_noret op_51b8_21_nf; +extern cpuop_func_noret op_51b8_21_ff; +extern cpuop_func_noret op_51b9_21_nf; +extern cpuop_func_noret op_51b9_21_ff; +extern cpuop_func_noret op_51c0_21_nf; +extern cpuop_func_noret op_51c0_21_ff; +extern cpuop_func_noret op_51c8_21_nf; +extern cpuop_func_noret op_51c8_21_ff; +extern cpuop_func_noret op_51d0_21_nf; +extern cpuop_func_noret op_51d0_21_ff; +extern cpuop_func_noret op_51d8_21_nf; +extern cpuop_func_noret op_51d8_21_ff; +extern cpuop_func_noret op_51e0_21_nf; +extern cpuop_func_noret op_51e0_21_ff; +extern cpuop_func_noret op_51e8_21_nf; +extern cpuop_func_noret op_51e8_21_ff; +extern cpuop_func_noret op_51f0_21_nf; +extern cpuop_func_noret op_51f0_21_ff; +extern cpuop_func_noret op_51f8_21_nf; +extern cpuop_func_noret op_51f8_21_ff; +extern cpuop_func_noret op_51f9_21_nf; +extern cpuop_func_noret op_51f9_21_ff; +extern cpuop_func_noret op_51fa_21_nf; +extern cpuop_func_noret op_51fa_21_ff; +extern cpuop_func_noret op_51fb_21_nf; +extern cpuop_func_noret op_51fb_21_ff; +extern cpuop_func_noret op_51fc_21_nf; +extern cpuop_func_noret op_51fc_21_ff; +extern cpuop_func_noret op_52c0_21_nf; +extern cpuop_func_noret op_52c0_21_ff; +extern cpuop_func_noret op_52c8_21_nf; +extern cpuop_func_noret op_52c8_21_ff; +extern cpuop_func_noret op_52d0_21_nf; +extern cpuop_func_noret op_52d0_21_ff; +extern cpuop_func_noret op_52d8_21_nf; +extern cpuop_func_noret op_52d8_21_ff; +extern cpuop_func_noret op_52e0_21_nf; +extern cpuop_func_noret op_52e0_21_ff; +extern cpuop_func_noret op_52e8_21_nf; +extern cpuop_func_noret op_52e8_21_ff; +extern cpuop_func_noret op_52f0_21_nf; +extern cpuop_func_noret op_52f0_21_ff; +extern cpuop_func_noret op_52f8_21_nf; +extern cpuop_func_noret op_52f8_21_ff; +extern cpuop_func_noret op_52f9_21_nf; +extern cpuop_func_noret op_52f9_21_ff; +extern cpuop_func_noret op_52fa_21_nf; +extern cpuop_func_noret op_52fa_21_ff; +extern cpuop_func_noret op_52fb_21_nf; +extern cpuop_func_noret op_52fb_21_ff; +extern cpuop_func_noret op_52fc_21_nf; +extern cpuop_func_noret op_52fc_21_ff; +extern cpuop_func_noret op_53c0_21_nf; +extern cpuop_func_noret op_53c0_21_ff; +extern cpuop_func_noret op_53c8_21_nf; +extern cpuop_func_noret op_53c8_21_ff; +extern cpuop_func_noret op_53d0_21_nf; +extern cpuop_func_noret op_53d0_21_ff; +extern cpuop_func_noret op_53d8_21_nf; +extern cpuop_func_noret op_53d8_21_ff; +extern cpuop_func_noret op_53e0_21_nf; +extern cpuop_func_noret op_53e0_21_ff; +extern cpuop_func_noret op_53e8_21_nf; +extern cpuop_func_noret op_53e8_21_ff; +extern cpuop_func_noret op_53f0_21_nf; +extern cpuop_func_noret op_53f0_21_ff; +extern cpuop_func_noret op_53f8_21_nf; +extern cpuop_func_noret op_53f8_21_ff; +extern cpuop_func_noret op_53f9_21_nf; +extern cpuop_func_noret op_53f9_21_ff; +extern cpuop_func_noret op_53fa_21_nf; +extern cpuop_func_noret op_53fa_21_ff; +extern cpuop_func_noret op_53fb_21_nf; +extern cpuop_func_noret op_53fb_21_ff; +extern cpuop_func_noret op_53fc_21_nf; +extern cpuop_func_noret op_53fc_21_ff; +extern cpuop_func_noret op_54c0_21_nf; +extern cpuop_func_noret op_54c0_21_ff; +extern cpuop_func_noret op_54c8_21_nf; +extern cpuop_func_noret op_54c8_21_ff; +extern cpuop_func_noret op_54d0_21_nf; +extern cpuop_func_noret op_54d0_21_ff; +extern cpuop_func_noret op_54d8_21_nf; +extern cpuop_func_noret op_54d8_21_ff; +extern cpuop_func_noret op_54e0_21_nf; +extern cpuop_func_noret op_54e0_21_ff; +extern cpuop_func_noret op_54e8_21_nf; +extern cpuop_func_noret op_54e8_21_ff; +extern cpuop_func_noret op_54f0_21_nf; +extern cpuop_func_noret op_54f0_21_ff; +extern cpuop_func_noret op_54f8_21_nf; +extern cpuop_func_noret op_54f8_21_ff; +extern cpuop_func_noret op_54f9_21_nf; +extern cpuop_func_noret op_54f9_21_ff; +extern cpuop_func_noret op_54fa_21_nf; +extern cpuop_func_noret op_54fa_21_ff; +extern cpuop_func_noret op_54fb_21_nf; +extern cpuop_func_noret op_54fb_21_ff; +extern cpuop_func_noret op_54fc_21_nf; +extern cpuop_func_noret op_54fc_21_ff; +extern cpuop_func_noret op_55c0_21_nf; +extern cpuop_func_noret op_55c0_21_ff; +extern cpuop_func_noret op_55c8_21_nf; +extern cpuop_func_noret op_55c8_21_ff; +extern cpuop_func_noret op_55d0_21_nf; +extern cpuop_func_noret op_55d0_21_ff; +extern cpuop_func_noret op_55d8_21_nf; +extern cpuop_func_noret op_55d8_21_ff; +extern cpuop_func_noret op_55e0_21_nf; +extern cpuop_func_noret op_55e0_21_ff; +extern cpuop_func_noret op_55e8_21_nf; +extern cpuop_func_noret op_55e8_21_ff; +extern cpuop_func_noret op_55f0_21_nf; +extern cpuop_func_noret op_55f0_21_ff; +extern cpuop_func_noret op_55f8_21_nf; +extern cpuop_func_noret op_55f8_21_ff; +extern cpuop_func_noret op_55f9_21_nf; +extern cpuop_func_noret op_55f9_21_ff; +extern cpuop_func_noret op_55fa_21_nf; +extern cpuop_func_noret op_55fa_21_ff; +extern cpuop_func_noret op_55fb_21_nf; +extern cpuop_func_noret op_55fb_21_ff; +extern cpuop_func_noret op_55fc_21_nf; +extern cpuop_func_noret op_55fc_21_ff; +extern cpuop_func_noret op_56c0_21_nf; +extern cpuop_func_noret op_56c0_21_ff; +extern cpuop_func_noret op_56c8_21_nf; +extern cpuop_func_noret op_56c8_21_ff; +extern cpuop_func_noret op_56d0_21_nf; +extern cpuop_func_noret op_56d0_21_ff; +extern cpuop_func_noret op_56d8_21_nf; +extern cpuop_func_noret op_56d8_21_ff; +extern cpuop_func_noret op_56e0_21_nf; +extern cpuop_func_noret op_56e0_21_ff; +extern cpuop_func_noret op_56e8_21_nf; +extern cpuop_func_noret op_56e8_21_ff; +extern cpuop_func_noret op_56f0_21_nf; +extern cpuop_func_noret op_56f0_21_ff; +extern cpuop_func_noret op_56f8_21_nf; +extern cpuop_func_noret op_56f8_21_ff; +extern cpuop_func_noret op_56f9_21_nf; +extern cpuop_func_noret op_56f9_21_ff; +extern cpuop_func_noret op_56fa_21_nf; +extern cpuop_func_noret op_56fa_21_ff; +extern cpuop_func_noret op_56fb_21_nf; +extern cpuop_func_noret op_56fb_21_ff; +extern cpuop_func_noret op_56fc_21_nf; +extern cpuop_func_noret op_56fc_21_ff; +extern cpuop_func_noret op_57c0_21_nf; +extern cpuop_func_noret op_57c0_21_ff; +extern cpuop_func_noret op_57c8_21_nf; +extern cpuop_func_noret op_57c8_21_ff; +extern cpuop_func_noret op_57d0_21_nf; +extern cpuop_func_noret op_57d0_21_ff; +extern cpuop_func_noret op_57d8_21_nf; +extern cpuop_func_noret op_57d8_21_ff; +extern cpuop_func_noret op_57e0_21_nf; +extern cpuop_func_noret op_57e0_21_ff; +extern cpuop_func_noret op_57e8_21_nf; +extern cpuop_func_noret op_57e8_21_ff; +extern cpuop_func_noret op_57f0_21_nf; +extern cpuop_func_noret op_57f0_21_ff; +extern cpuop_func_noret op_57f8_21_nf; +extern cpuop_func_noret op_57f8_21_ff; +extern cpuop_func_noret op_57f9_21_nf; +extern cpuop_func_noret op_57f9_21_ff; +extern cpuop_func_noret op_57fa_21_nf; +extern cpuop_func_noret op_57fa_21_ff; +extern cpuop_func_noret op_57fb_21_nf; +extern cpuop_func_noret op_57fb_21_ff; +extern cpuop_func_noret op_57fc_21_nf; +extern cpuop_func_noret op_57fc_21_ff; +extern cpuop_func_noret op_58c0_21_nf; +extern cpuop_func_noret op_58c0_21_ff; +extern cpuop_func_noret op_58c8_21_nf; +extern cpuop_func_noret op_58c8_21_ff; +extern cpuop_func_noret op_58d0_21_nf; +extern cpuop_func_noret op_58d0_21_ff; +extern cpuop_func_noret op_58d8_21_nf; +extern cpuop_func_noret op_58d8_21_ff; +extern cpuop_func_noret op_58e0_21_nf; +extern cpuop_func_noret op_58e0_21_ff; +extern cpuop_func_noret op_58e8_21_nf; +extern cpuop_func_noret op_58e8_21_ff; +extern cpuop_func_noret op_58f0_21_nf; +extern cpuop_func_noret op_58f0_21_ff; +extern cpuop_func_noret op_58f8_21_nf; +extern cpuop_func_noret op_58f8_21_ff; +extern cpuop_func_noret op_58f9_21_nf; +extern cpuop_func_noret op_58f9_21_ff; +extern cpuop_func_noret op_58fa_21_nf; +extern cpuop_func_noret op_58fa_21_ff; +extern cpuop_func_noret op_58fb_21_nf; +extern cpuop_func_noret op_58fb_21_ff; +extern cpuop_func_noret op_58fc_21_nf; +extern cpuop_func_noret op_58fc_21_ff; +extern cpuop_func_noret op_59c0_21_nf; +extern cpuop_func_noret op_59c0_21_ff; +extern cpuop_func_noret op_59c8_21_nf; +extern cpuop_func_noret op_59c8_21_ff; +extern cpuop_func_noret op_59d0_21_nf; +extern cpuop_func_noret op_59d0_21_ff; +extern cpuop_func_noret op_59d8_21_nf; +extern cpuop_func_noret op_59d8_21_ff; +extern cpuop_func_noret op_59e0_21_nf; +extern cpuop_func_noret op_59e0_21_ff; +extern cpuop_func_noret op_59e8_21_nf; +extern cpuop_func_noret op_59e8_21_ff; +extern cpuop_func_noret op_59f0_21_nf; +extern cpuop_func_noret op_59f0_21_ff; +extern cpuop_func_noret op_59f8_21_nf; +extern cpuop_func_noret op_59f8_21_ff; +extern cpuop_func_noret op_59f9_21_nf; +extern cpuop_func_noret op_59f9_21_ff; +extern cpuop_func_noret op_59fa_21_nf; +extern cpuop_func_noret op_59fa_21_ff; +extern cpuop_func_noret op_59fb_21_nf; +extern cpuop_func_noret op_59fb_21_ff; +extern cpuop_func_noret op_59fc_21_nf; +extern cpuop_func_noret op_59fc_21_ff; +extern cpuop_func_noret op_5ac0_21_nf; +extern cpuop_func_noret op_5ac0_21_ff; +extern cpuop_func_noret op_5ac8_21_nf; +extern cpuop_func_noret op_5ac8_21_ff; +extern cpuop_func_noret op_5ad0_21_nf; +extern cpuop_func_noret op_5ad0_21_ff; +extern cpuop_func_noret op_5ad8_21_nf; +extern cpuop_func_noret op_5ad8_21_ff; +extern cpuop_func_noret op_5ae0_21_nf; +extern cpuop_func_noret op_5ae0_21_ff; +extern cpuop_func_noret op_5ae8_21_nf; +extern cpuop_func_noret op_5ae8_21_ff; +extern cpuop_func_noret op_5af0_21_nf; +extern cpuop_func_noret op_5af0_21_ff; +extern cpuop_func_noret op_5af8_21_nf; +extern cpuop_func_noret op_5af8_21_ff; +extern cpuop_func_noret op_5af9_21_nf; +extern cpuop_func_noret op_5af9_21_ff; +extern cpuop_func_noret op_5afa_21_nf; +extern cpuop_func_noret op_5afa_21_ff; +extern cpuop_func_noret op_5afb_21_nf; +extern cpuop_func_noret op_5afb_21_ff; +extern cpuop_func_noret op_5afc_21_nf; +extern cpuop_func_noret op_5afc_21_ff; +extern cpuop_func_noret op_5bc0_21_nf; +extern cpuop_func_noret op_5bc0_21_ff; +extern cpuop_func_noret op_5bc8_21_nf; +extern cpuop_func_noret op_5bc8_21_ff; +extern cpuop_func_noret op_5bd0_21_nf; +extern cpuop_func_noret op_5bd0_21_ff; +extern cpuop_func_noret op_5bd8_21_nf; +extern cpuop_func_noret op_5bd8_21_ff; +extern cpuop_func_noret op_5be0_21_nf; +extern cpuop_func_noret op_5be0_21_ff; +extern cpuop_func_noret op_5be8_21_nf; +extern cpuop_func_noret op_5be8_21_ff; +extern cpuop_func_noret op_5bf0_21_nf; +extern cpuop_func_noret op_5bf0_21_ff; +extern cpuop_func_noret op_5bf8_21_nf; +extern cpuop_func_noret op_5bf8_21_ff; +extern cpuop_func_noret op_5bf9_21_nf; +extern cpuop_func_noret op_5bf9_21_ff; +extern cpuop_func_noret op_5bfa_21_nf; +extern cpuop_func_noret op_5bfa_21_ff; +extern cpuop_func_noret op_5bfb_21_nf; +extern cpuop_func_noret op_5bfb_21_ff; +extern cpuop_func_noret op_5bfc_21_nf; +extern cpuop_func_noret op_5bfc_21_ff; +extern cpuop_func_noret op_5cc0_21_nf; +extern cpuop_func_noret op_5cc0_21_ff; +extern cpuop_func_noret op_5cc8_21_nf; +extern cpuop_func_noret op_5cc8_21_ff; +extern cpuop_func_noret op_5cd0_21_nf; +extern cpuop_func_noret op_5cd0_21_ff; +extern cpuop_func_noret op_5cd8_21_nf; +extern cpuop_func_noret op_5cd8_21_ff; +extern cpuop_func_noret op_5ce0_21_nf; +extern cpuop_func_noret op_5ce0_21_ff; +extern cpuop_func_noret op_5ce8_21_nf; +extern cpuop_func_noret op_5ce8_21_ff; +extern cpuop_func_noret op_5cf0_21_nf; +extern cpuop_func_noret op_5cf0_21_ff; +extern cpuop_func_noret op_5cf8_21_nf; +extern cpuop_func_noret op_5cf8_21_ff; +extern cpuop_func_noret op_5cf9_21_nf; +extern cpuop_func_noret op_5cf9_21_ff; +extern cpuop_func_noret op_5cfa_21_nf; +extern cpuop_func_noret op_5cfa_21_ff; +extern cpuop_func_noret op_5cfb_21_nf; +extern cpuop_func_noret op_5cfb_21_ff; +extern cpuop_func_noret op_5cfc_21_nf; +extern cpuop_func_noret op_5cfc_21_ff; +extern cpuop_func_noret op_5dc0_21_nf; +extern cpuop_func_noret op_5dc0_21_ff; +extern cpuop_func_noret op_5dc8_21_nf; +extern cpuop_func_noret op_5dc8_21_ff; +extern cpuop_func_noret op_5dd0_21_nf; +extern cpuop_func_noret op_5dd0_21_ff; +extern cpuop_func_noret op_5dd8_21_nf; +extern cpuop_func_noret op_5dd8_21_ff; +extern cpuop_func_noret op_5de0_21_nf; +extern cpuop_func_noret op_5de0_21_ff; +extern cpuop_func_noret op_5de8_21_nf; +extern cpuop_func_noret op_5de8_21_ff; +extern cpuop_func_noret op_5df0_21_nf; +extern cpuop_func_noret op_5df0_21_ff; +extern cpuop_func_noret op_5df8_21_nf; +extern cpuop_func_noret op_5df8_21_ff; +extern cpuop_func_noret op_5df9_21_nf; +extern cpuop_func_noret op_5df9_21_ff; +extern cpuop_func_noret op_5dfa_21_nf; +extern cpuop_func_noret op_5dfa_21_ff; +extern cpuop_func_noret op_5dfb_21_nf; +extern cpuop_func_noret op_5dfb_21_ff; +extern cpuop_func_noret op_5dfc_21_nf; +extern cpuop_func_noret op_5dfc_21_ff; +extern cpuop_func_noret op_5ec0_21_nf; +extern cpuop_func_noret op_5ec0_21_ff; +extern cpuop_func_noret op_5ec8_21_nf; +extern cpuop_func_noret op_5ec8_21_ff; +extern cpuop_func_noret op_5ed0_21_nf; +extern cpuop_func_noret op_5ed0_21_ff; +extern cpuop_func_noret op_5ed8_21_nf; +extern cpuop_func_noret op_5ed8_21_ff; +extern cpuop_func_noret op_5ee0_21_nf; +extern cpuop_func_noret op_5ee0_21_ff; +extern cpuop_func_noret op_5ee8_21_nf; +extern cpuop_func_noret op_5ee8_21_ff; +extern cpuop_func_noret op_5ef0_21_nf; +extern cpuop_func_noret op_5ef0_21_ff; +extern cpuop_func_noret op_5ef8_21_nf; +extern cpuop_func_noret op_5ef8_21_ff; +extern cpuop_func_noret op_5ef9_21_nf; +extern cpuop_func_noret op_5ef9_21_ff; +extern cpuop_func_noret op_5efa_21_nf; +extern cpuop_func_noret op_5efa_21_ff; +extern cpuop_func_noret op_5efb_21_nf; +extern cpuop_func_noret op_5efb_21_ff; +extern cpuop_func_noret op_5efc_21_nf; +extern cpuop_func_noret op_5efc_21_ff; +extern cpuop_func_noret op_5fc0_21_nf; +extern cpuop_func_noret op_5fc0_21_ff; +extern cpuop_func_noret op_5fc8_21_nf; +extern cpuop_func_noret op_5fc8_21_ff; +extern cpuop_func_noret op_5fd0_21_nf; +extern cpuop_func_noret op_5fd0_21_ff; +extern cpuop_func_noret op_5fd8_21_nf; +extern cpuop_func_noret op_5fd8_21_ff; +extern cpuop_func_noret op_5fe0_21_nf; +extern cpuop_func_noret op_5fe0_21_ff; +extern cpuop_func_noret op_5fe8_21_nf; +extern cpuop_func_noret op_5fe8_21_ff; +extern cpuop_func_noret op_5ff0_21_nf; +extern cpuop_func_noret op_5ff0_21_ff; +extern cpuop_func_noret op_5ff8_21_nf; +extern cpuop_func_noret op_5ff8_21_ff; +extern cpuop_func_noret op_5ff9_21_nf; +extern cpuop_func_noret op_5ff9_21_ff; +extern cpuop_func_noret op_5ffa_21_nf; +extern cpuop_func_noret op_5ffa_21_ff; +extern cpuop_func_noret op_5ffb_21_nf; +extern cpuop_func_noret op_5ffb_21_ff; +extern cpuop_func_noret op_5ffc_21_nf; +extern cpuop_func_noret op_5ffc_21_ff; +extern cpuop_func_noret op_6000_21_nf; +extern cpuop_func_noret op_6000_21_ff; +extern cpuop_func_noret op_6001_21_nf; +extern cpuop_func_noret op_6001_21_ff; +extern cpuop_func_noret op_60ff_21_nf; +extern cpuop_func_noret op_60ff_21_ff; +extern cpuop_func_noret op_6100_21_nf; +extern cpuop_func_noret op_6100_21_ff; +extern cpuop_func_noret op_6101_21_nf; +extern cpuop_func_noret op_6101_21_ff; +extern cpuop_func_noret op_61ff_21_nf; +extern cpuop_func_noret op_61ff_21_ff; +extern cpuop_func_noret op_6200_21_nf; +extern cpuop_func_noret op_6200_21_ff; +extern cpuop_func_noret op_6201_21_nf; +extern cpuop_func_noret op_6201_21_ff; +extern cpuop_func_noret op_62ff_21_nf; +extern cpuop_func_noret op_62ff_21_ff; +extern cpuop_func_noret op_6300_21_nf; +extern cpuop_func_noret op_6300_21_ff; +extern cpuop_func_noret op_6301_21_nf; +extern cpuop_func_noret op_6301_21_ff; +extern cpuop_func_noret op_63ff_21_nf; +extern cpuop_func_noret op_63ff_21_ff; +extern cpuop_func_noret op_6400_21_nf; +extern cpuop_func_noret op_6400_21_ff; +extern cpuop_func_noret op_6401_21_nf; +extern cpuop_func_noret op_6401_21_ff; +extern cpuop_func_noret op_64ff_21_nf; +extern cpuop_func_noret op_64ff_21_ff; +extern cpuop_func_noret op_6500_21_nf; +extern cpuop_func_noret op_6500_21_ff; +extern cpuop_func_noret op_6501_21_nf; +extern cpuop_func_noret op_6501_21_ff; +extern cpuop_func_noret op_65ff_21_nf; +extern cpuop_func_noret op_65ff_21_ff; +extern cpuop_func_noret op_6600_21_nf; +extern cpuop_func_noret op_6600_21_ff; +extern cpuop_func_noret op_6601_21_nf; +extern cpuop_func_noret op_6601_21_ff; +extern cpuop_func_noret op_66ff_21_nf; +extern cpuop_func_noret op_66ff_21_ff; +extern cpuop_func_noret op_6700_21_nf; +extern cpuop_func_noret op_6700_21_ff; +extern cpuop_func_noret op_6701_21_nf; +extern cpuop_func_noret op_6701_21_ff; +extern cpuop_func_noret op_67ff_21_nf; +extern cpuop_func_noret op_67ff_21_ff; +extern cpuop_func_noret op_6800_21_nf; +extern cpuop_func_noret op_6800_21_ff; +extern cpuop_func_noret op_6801_21_nf; +extern cpuop_func_noret op_6801_21_ff; +extern cpuop_func_noret op_68ff_21_nf; +extern cpuop_func_noret op_68ff_21_ff; +extern cpuop_func_noret op_6900_21_nf; +extern cpuop_func_noret op_6900_21_ff; +extern cpuop_func_noret op_6901_21_nf; +extern cpuop_func_noret op_6901_21_ff; +extern cpuop_func_noret op_69ff_21_nf; +extern cpuop_func_noret op_69ff_21_ff; +extern cpuop_func_noret op_6a00_21_nf; +extern cpuop_func_noret op_6a00_21_ff; +extern cpuop_func_noret op_6a01_21_nf; +extern cpuop_func_noret op_6a01_21_ff; +extern cpuop_func_noret op_6aff_21_nf; +extern cpuop_func_noret op_6aff_21_ff; +extern cpuop_func_noret op_6b00_21_nf; +extern cpuop_func_noret op_6b00_21_ff; +extern cpuop_func_noret op_6b01_21_nf; +extern cpuop_func_noret op_6b01_21_ff; +extern cpuop_func_noret op_6bff_21_nf; +extern cpuop_func_noret op_6bff_21_ff; +extern cpuop_func_noret op_6c00_21_nf; +extern cpuop_func_noret op_6c00_21_ff; +extern cpuop_func_noret op_6c01_21_nf; +extern cpuop_func_noret op_6c01_21_ff; +extern cpuop_func_noret op_6cff_21_nf; +extern cpuop_func_noret op_6cff_21_ff; +extern cpuop_func_noret op_6d00_21_nf; +extern cpuop_func_noret op_6d00_21_ff; +extern cpuop_func_noret op_6d01_21_nf; +extern cpuop_func_noret op_6d01_21_ff; +extern cpuop_func_noret op_6dff_21_nf; +extern cpuop_func_noret op_6dff_21_ff; +extern cpuop_func_noret op_6e00_21_nf; +extern cpuop_func_noret op_6e00_21_ff; +extern cpuop_func_noret op_6e01_21_nf; +extern cpuop_func_noret op_6e01_21_ff; +extern cpuop_func_noret op_6eff_21_nf; +extern cpuop_func_noret op_6eff_21_ff; +extern cpuop_func_noret op_6f00_21_nf; +extern cpuop_func_noret op_6f00_21_ff; +extern cpuop_func_noret op_6f01_21_nf; +extern cpuop_func_noret op_6f01_21_ff; +extern cpuop_func_noret op_6fff_21_nf; +extern cpuop_func_noret op_6fff_21_ff; +extern cpuop_func_noret op_7000_21_nf; +extern cpuop_func_noret op_7000_21_ff; +extern cpuop_func_noret op_8000_21_nf; +extern cpuop_func_noret op_8000_21_ff; +extern cpuop_func_noret op_8010_21_nf; +extern cpuop_func_noret op_8010_21_ff; +extern cpuop_func_noret op_8018_21_nf; +extern cpuop_func_noret op_8018_21_ff; +extern cpuop_func_noret op_8020_21_nf; +extern cpuop_func_noret op_8020_21_ff; +extern cpuop_func_noret op_8028_21_nf; +extern cpuop_func_noret op_8028_21_ff; +extern cpuop_func_noret op_8030_21_nf; +extern cpuop_func_noret op_8030_21_ff; +extern cpuop_func_noret op_8038_21_nf; +extern cpuop_func_noret op_8038_21_ff; +extern cpuop_func_noret op_8039_21_nf; +extern cpuop_func_noret op_8039_21_ff; +extern cpuop_func_noret op_803a_21_nf; +extern cpuop_func_noret op_803a_21_ff; +extern cpuop_func_noret op_803b_21_nf; +extern cpuop_func_noret op_803b_21_ff; +extern cpuop_func_noret op_803c_21_nf; +extern cpuop_func_noret op_803c_21_ff; +extern cpuop_func_noret op_8040_21_nf; +extern cpuop_func_noret op_8040_21_ff; +extern cpuop_func_noret op_8050_21_nf; +extern cpuop_func_noret op_8050_21_ff; +extern cpuop_func_noret op_8058_21_nf; +extern cpuop_func_noret op_8058_21_ff; +extern cpuop_func_noret op_8060_21_nf; +extern cpuop_func_noret op_8060_21_ff; +extern cpuop_func_noret op_8068_21_nf; +extern cpuop_func_noret op_8068_21_ff; +extern cpuop_func_noret op_8070_21_nf; +extern cpuop_func_noret op_8070_21_ff; +extern cpuop_func_noret op_8078_21_nf; +extern cpuop_func_noret op_8078_21_ff; +extern cpuop_func_noret op_8079_21_nf; +extern cpuop_func_noret op_8079_21_ff; +extern cpuop_func_noret op_807a_21_nf; +extern cpuop_func_noret op_807a_21_ff; +extern cpuop_func_noret op_807b_21_nf; +extern cpuop_func_noret op_807b_21_ff; +extern cpuop_func_noret op_807c_21_nf; +extern cpuop_func_noret op_807c_21_ff; +extern cpuop_func_noret op_8080_21_nf; +extern cpuop_func_noret op_8080_21_ff; +extern cpuop_func_noret op_8090_21_nf; +extern cpuop_func_noret op_8090_21_ff; +extern cpuop_func_noret op_8098_21_nf; +extern cpuop_func_noret op_8098_21_ff; +extern cpuop_func_noret op_80a0_21_nf; +extern cpuop_func_noret op_80a0_21_ff; +extern cpuop_func_noret op_80a8_21_nf; +extern cpuop_func_noret op_80a8_21_ff; +extern cpuop_func_noret op_80b0_21_nf; +extern cpuop_func_noret op_80b0_21_ff; +extern cpuop_func_noret op_80b8_21_nf; +extern cpuop_func_noret op_80b8_21_ff; +extern cpuop_func_noret op_80b9_21_nf; +extern cpuop_func_noret op_80b9_21_ff; +extern cpuop_func_noret op_80ba_21_nf; +extern cpuop_func_noret op_80ba_21_ff; +extern cpuop_func_noret op_80bb_21_nf; +extern cpuop_func_noret op_80bb_21_ff; +extern cpuop_func_noret op_80bc_21_nf; +extern cpuop_func_noret op_80bc_21_ff; +extern cpuop_func_noret op_80c0_21_nf; +extern cpuop_func_noret op_80c0_21_ff; +extern cpuop_func_noret op_80d0_21_nf; +extern cpuop_func_noret op_80d0_21_ff; +extern cpuop_func_noret op_80d8_21_nf; +extern cpuop_func_noret op_80d8_21_ff; +extern cpuop_func_noret op_80e0_21_nf; +extern cpuop_func_noret op_80e0_21_ff; +extern cpuop_func_noret op_80e8_21_nf; +extern cpuop_func_noret op_80e8_21_ff; +extern cpuop_func_noret op_80f0_21_nf; +extern cpuop_func_noret op_80f0_21_ff; +extern cpuop_func_noret op_80f8_21_nf; +extern cpuop_func_noret op_80f8_21_ff; +extern cpuop_func_noret op_80f9_21_nf; +extern cpuop_func_noret op_80f9_21_ff; +extern cpuop_func_noret op_80fa_21_nf; +extern cpuop_func_noret op_80fa_21_ff; +extern cpuop_func_noret op_80fb_21_nf; +extern cpuop_func_noret op_80fb_21_ff; +extern cpuop_func_noret op_80fc_21_nf; +extern cpuop_func_noret op_80fc_21_ff; +extern cpuop_func_noret op_8100_21_nf; +extern cpuop_func_noret op_8100_21_ff; +extern cpuop_func_noret op_8108_21_nf; +extern cpuop_func_noret op_8108_21_ff; +extern cpuop_func_noret op_8110_21_nf; +extern cpuop_func_noret op_8110_21_ff; +extern cpuop_func_noret op_8118_21_nf; +extern cpuop_func_noret op_8118_21_ff; +extern cpuop_func_noret op_8120_21_nf; +extern cpuop_func_noret op_8120_21_ff; +extern cpuop_func_noret op_8128_21_nf; +extern cpuop_func_noret op_8128_21_ff; +extern cpuop_func_noret op_8130_21_nf; +extern cpuop_func_noret op_8130_21_ff; +extern cpuop_func_noret op_8138_21_nf; +extern cpuop_func_noret op_8138_21_ff; +extern cpuop_func_noret op_8139_21_nf; +extern cpuop_func_noret op_8139_21_ff; +extern cpuop_func_noret op_8140_21_nf; +extern cpuop_func_noret op_8140_21_ff; +extern cpuop_func_noret op_8148_21_nf; +extern cpuop_func_noret op_8148_21_ff; +extern cpuop_func_noret op_8150_21_nf; +extern cpuop_func_noret op_8150_21_ff; +extern cpuop_func_noret op_8158_21_nf; +extern cpuop_func_noret op_8158_21_ff; +extern cpuop_func_noret op_8160_21_nf; +extern cpuop_func_noret op_8160_21_ff; +extern cpuop_func_noret op_8168_21_nf; +extern cpuop_func_noret op_8168_21_ff; +extern cpuop_func_noret op_8170_21_nf; +extern cpuop_func_noret op_8170_21_ff; +extern cpuop_func_noret op_8178_21_nf; +extern cpuop_func_noret op_8178_21_ff; +extern cpuop_func_noret op_8179_21_nf; +extern cpuop_func_noret op_8179_21_ff; +extern cpuop_func_noret op_8180_21_nf; +extern cpuop_func_noret op_8180_21_ff; +extern cpuop_func_noret op_8188_21_nf; +extern cpuop_func_noret op_8188_21_ff; +extern cpuop_func_noret op_8190_21_nf; +extern cpuop_func_noret op_8190_21_ff; +extern cpuop_func_noret op_8198_21_nf; +extern cpuop_func_noret op_8198_21_ff; +extern cpuop_func_noret op_81a0_21_nf; +extern cpuop_func_noret op_81a0_21_ff; +extern cpuop_func_noret op_81a8_21_nf; +extern cpuop_func_noret op_81a8_21_ff; +extern cpuop_func_noret op_81b0_21_nf; +extern cpuop_func_noret op_81b0_21_ff; +extern cpuop_func_noret op_81b8_21_nf; +extern cpuop_func_noret op_81b8_21_ff; +extern cpuop_func_noret op_81b9_21_nf; +extern cpuop_func_noret op_81b9_21_ff; +extern cpuop_func_noret op_81c0_21_nf; +extern cpuop_func_noret op_81c0_21_ff; +extern cpuop_func_noret op_81d0_21_nf; +extern cpuop_func_noret op_81d0_21_ff; +extern cpuop_func_noret op_81d8_21_nf; +extern cpuop_func_noret op_81d8_21_ff; +extern cpuop_func_noret op_81e0_21_nf; +extern cpuop_func_noret op_81e0_21_ff; +extern cpuop_func_noret op_81e8_21_nf; +extern cpuop_func_noret op_81e8_21_ff; +extern cpuop_func_noret op_81f0_21_nf; +extern cpuop_func_noret op_81f0_21_ff; +extern cpuop_func_noret op_81f8_21_nf; +extern cpuop_func_noret op_81f8_21_ff; +extern cpuop_func_noret op_81f9_21_nf; +extern cpuop_func_noret op_81f9_21_ff; +extern cpuop_func_noret op_81fa_21_nf; +extern cpuop_func_noret op_81fa_21_ff; +extern cpuop_func_noret op_81fb_21_nf; +extern cpuop_func_noret op_81fb_21_ff; +extern cpuop_func_noret op_81fc_21_nf; +extern cpuop_func_noret op_81fc_21_ff; +extern cpuop_func_noret op_9000_21_nf; +extern cpuop_func_noret op_9000_21_ff; +extern cpuop_func_noret op_9010_21_nf; +extern cpuop_func_noret op_9010_21_ff; +extern cpuop_func_noret op_9018_21_nf; +extern cpuop_func_noret op_9018_21_ff; +extern cpuop_func_noret op_9020_21_nf; +extern cpuop_func_noret op_9020_21_ff; +extern cpuop_func_noret op_9028_21_nf; +extern cpuop_func_noret op_9028_21_ff; +extern cpuop_func_noret op_9030_21_nf; +extern cpuop_func_noret op_9030_21_ff; +extern cpuop_func_noret op_9038_21_nf; +extern cpuop_func_noret op_9038_21_ff; +extern cpuop_func_noret op_9039_21_nf; +extern cpuop_func_noret op_9039_21_ff; +extern cpuop_func_noret op_903a_21_nf; +extern cpuop_func_noret op_903a_21_ff; +extern cpuop_func_noret op_903b_21_nf; +extern cpuop_func_noret op_903b_21_ff; +extern cpuop_func_noret op_903c_21_nf; +extern cpuop_func_noret op_903c_21_ff; +extern cpuop_func_noret op_9040_21_nf; +extern cpuop_func_noret op_9040_21_ff; +extern cpuop_func_noret op_9048_21_nf; +extern cpuop_func_noret op_9048_21_ff; +extern cpuop_func_noret op_9050_21_nf; +extern cpuop_func_noret op_9050_21_ff; +extern cpuop_func_noret op_9058_21_nf; +extern cpuop_func_noret op_9058_21_ff; +extern cpuop_func_noret op_9060_21_nf; +extern cpuop_func_noret op_9060_21_ff; +extern cpuop_func_noret op_9068_21_nf; +extern cpuop_func_noret op_9068_21_ff; +extern cpuop_func_noret op_9070_21_nf; +extern cpuop_func_noret op_9070_21_ff; +extern cpuop_func_noret op_9078_21_nf; +extern cpuop_func_noret op_9078_21_ff; +extern cpuop_func_noret op_9079_21_nf; +extern cpuop_func_noret op_9079_21_ff; +extern cpuop_func_noret op_907a_21_nf; +extern cpuop_func_noret op_907a_21_ff; +extern cpuop_func_noret op_907b_21_nf; +extern cpuop_func_noret op_907b_21_ff; +extern cpuop_func_noret op_907c_21_nf; +extern cpuop_func_noret op_907c_21_ff; +extern cpuop_func_noret op_9080_21_nf; +extern cpuop_func_noret op_9080_21_ff; +extern cpuop_func_noret op_9088_21_nf; +extern cpuop_func_noret op_9088_21_ff; +extern cpuop_func_noret op_9090_21_nf; +extern cpuop_func_noret op_9090_21_ff; +extern cpuop_func_noret op_9098_21_nf; +extern cpuop_func_noret op_9098_21_ff; +extern cpuop_func_noret op_90a0_21_nf; +extern cpuop_func_noret op_90a0_21_ff; +extern cpuop_func_noret op_90a8_21_nf; +extern cpuop_func_noret op_90a8_21_ff; +extern cpuop_func_noret op_90b0_21_nf; +extern cpuop_func_noret op_90b0_21_ff; +extern cpuop_func_noret op_90b8_21_nf; +extern cpuop_func_noret op_90b8_21_ff; +extern cpuop_func_noret op_90b9_21_nf; +extern cpuop_func_noret op_90b9_21_ff; +extern cpuop_func_noret op_90ba_21_nf; +extern cpuop_func_noret op_90ba_21_ff; +extern cpuop_func_noret op_90bb_21_nf; +extern cpuop_func_noret op_90bb_21_ff; +extern cpuop_func_noret op_90bc_21_nf; +extern cpuop_func_noret op_90bc_21_ff; +extern cpuop_func_noret op_90c0_21_nf; +extern cpuop_func_noret op_90c0_21_ff; +extern cpuop_func_noret op_90c8_21_nf; +extern cpuop_func_noret op_90c8_21_ff; +extern cpuop_func_noret op_90d0_21_nf; +extern cpuop_func_noret op_90d0_21_ff; +extern cpuop_func_noret op_90d8_21_nf; +extern cpuop_func_noret op_90d8_21_ff; +extern cpuop_func_noret op_90e0_21_nf; +extern cpuop_func_noret op_90e0_21_ff; +extern cpuop_func_noret op_90e8_21_nf; +extern cpuop_func_noret op_90e8_21_ff; +extern cpuop_func_noret op_90f0_21_nf; +extern cpuop_func_noret op_90f0_21_ff; +extern cpuop_func_noret op_90f8_21_nf; +extern cpuop_func_noret op_90f8_21_ff; +extern cpuop_func_noret op_90f9_21_nf; +extern cpuop_func_noret op_90f9_21_ff; +extern cpuop_func_noret op_90fa_21_nf; +extern cpuop_func_noret op_90fa_21_ff; +extern cpuop_func_noret op_90fb_21_nf; +extern cpuop_func_noret op_90fb_21_ff; +extern cpuop_func_noret op_90fc_21_nf; +extern cpuop_func_noret op_90fc_21_ff; +extern cpuop_func_noret op_9100_21_nf; +extern cpuop_func_noret op_9100_21_ff; +extern cpuop_func_noret op_9108_21_nf; +extern cpuop_func_noret op_9108_21_ff; +extern cpuop_func_noret op_9110_21_nf; +extern cpuop_func_noret op_9110_21_ff; +extern cpuop_func_noret op_9118_21_nf; +extern cpuop_func_noret op_9118_21_ff; +extern cpuop_func_noret op_9120_21_nf; +extern cpuop_func_noret op_9120_21_ff; +extern cpuop_func_noret op_9128_21_nf; +extern cpuop_func_noret op_9128_21_ff; +extern cpuop_func_noret op_9130_21_nf; +extern cpuop_func_noret op_9130_21_ff; +extern cpuop_func_noret op_9138_21_nf; +extern cpuop_func_noret op_9138_21_ff; +extern cpuop_func_noret op_9139_21_nf; +extern cpuop_func_noret op_9139_21_ff; +extern cpuop_func_noret op_9140_21_nf; +extern cpuop_func_noret op_9140_21_ff; +extern cpuop_func_noret op_9148_21_nf; +extern cpuop_func_noret op_9148_21_ff; +extern cpuop_func_noret op_9150_21_nf; +extern cpuop_func_noret op_9150_21_ff; +extern cpuop_func_noret op_9158_21_nf; +extern cpuop_func_noret op_9158_21_ff; +extern cpuop_func_noret op_9160_21_nf; +extern cpuop_func_noret op_9160_21_ff; +extern cpuop_func_noret op_9168_21_nf; +extern cpuop_func_noret op_9168_21_ff; +extern cpuop_func_noret op_9170_21_nf; +extern cpuop_func_noret op_9170_21_ff; +extern cpuop_func_noret op_9178_21_nf; +extern cpuop_func_noret op_9178_21_ff; +extern cpuop_func_noret op_9179_21_nf; +extern cpuop_func_noret op_9179_21_ff; +extern cpuop_func_noret op_9180_21_nf; +extern cpuop_func_noret op_9180_21_ff; +extern cpuop_func_noret op_9188_21_nf; +extern cpuop_func_noret op_9188_21_ff; +extern cpuop_func_noret op_9190_21_nf; +extern cpuop_func_noret op_9190_21_ff; +extern cpuop_func_noret op_9198_21_nf; +extern cpuop_func_noret op_9198_21_ff; +extern cpuop_func_noret op_91a0_21_nf; +extern cpuop_func_noret op_91a0_21_ff; +extern cpuop_func_noret op_91a8_21_nf; +extern cpuop_func_noret op_91a8_21_ff; +extern cpuop_func_noret op_91b0_21_nf; +extern cpuop_func_noret op_91b0_21_ff; +extern cpuop_func_noret op_91b8_21_nf; +extern cpuop_func_noret op_91b8_21_ff; +extern cpuop_func_noret op_91b9_21_nf; +extern cpuop_func_noret op_91b9_21_ff; +extern cpuop_func_noret op_91c0_21_nf; +extern cpuop_func_noret op_91c0_21_ff; +extern cpuop_func_noret op_91c8_21_nf; +extern cpuop_func_noret op_91c8_21_ff; +extern cpuop_func_noret op_91d0_21_nf; +extern cpuop_func_noret op_91d0_21_ff; +extern cpuop_func_noret op_91d8_21_nf; +extern cpuop_func_noret op_91d8_21_ff; +extern cpuop_func_noret op_91e0_21_nf; +extern cpuop_func_noret op_91e0_21_ff; +extern cpuop_func_noret op_91e8_21_nf; +extern cpuop_func_noret op_91e8_21_ff; +extern cpuop_func_noret op_91f0_21_nf; +extern cpuop_func_noret op_91f0_21_ff; +extern cpuop_func_noret op_91f8_21_nf; +extern cpuop_func_noret op_91f8_21_ff; +extern cpuop_func_noret op_91f9_21_nf; +extern cpuop_func_noret op_91f9_21_ff; +extern cpuop_func_noret op_91fa_21_nf; +extern cpuop_func_noret op_91fa_21_ff; +extern cpuop_func_noret op_91fb_21_nf; +extern cpuop_func_noret op_91fb_21_ff; +extern cpuop_func_noret op_91fc_21_nf; +extern cpuop_func_noret op_91fc_21_ff; +extern cpuop_func_noret op_b000_21_nf; +extern cpuop_func_noret op_b000_21_ff; +extern cpuop_func_noret op_b010_21_nf; +extern cpuop_func_noret op_b010_21_ff; +extern cpuop_func_noret op_b018_21_nf; +extern cpuop_func_noret op_b018_21_ff; +extern cpuop_func_noret op_b020_21_nf; +extern cpuop_func_noret op_b020_21_ff; +extern cpuop_func_noret op_b028_21_nf; +extern cpuop_func_noret op_b028_21_ff; +extern cpuop_func_noret op_b030_21_nf; +extern cpuop_func_noret op_b030_21_ff; +extern cpuop_func_noret op_b038_21_nf; +extern cpuop_func_noret op_b038_21_ff; +extern cpuop_func_noret op_b039_21_nf; +extern cpuop_func_noret op_b039_21_ff; +extern cpuop_func_noret op_b03a_21_nf; +extern cpuop_func_noret op_b03a_21_ff; +extern cpuop_func_noret op_b03b_21_nf; +extern cpuop_func_noret op_b03b_21_ff; +extern cpuop_func_noret op_b03c_21_nf; +extern cpuop_func_noret op_b03c_21_ff; +extern cpuop_func_noret op_b040_21_nf; +extern cpuop_func_noret op_b040_21_ff; +extern cpuop_func_noret op_b048_21_nf; +extern cpuop_func_noret op_b048_21_ff; +extern cpuop_func_noret op_b050_21_nf; +extern cpuop_func_noret op_b050_21_ff; +extern cpuop_func_noret op_b058_21_nf; +extern cpuop_func_noret op_b058_21_ff; +extern cpuop_func_noret op_b060_21_nf; +extern cpuop_func_noret op_b060_21_ff; +extern cpuop_func_noret op_b068_21_nf; +extern cpuop_func_noret op_b068_21_ff; +extern cpuop_func_noret op_b070_21_nf; +extern cpuop_func_noret op_b070_21_ff; +extern cpuop_func_noret op_b078_21_nf; +extern cpuop_func_noret op_b078_21_ff; +extern cpuop_func_noret op_b079_21_nf; +extern cpuop_func_noret op_b079_21_ff; +extern cpuop_func_noret op_b07a_21_nf; +extern cpuop_func_noret op_b07a_21_ff; +extern cpuop_func_noret op_b07b_21_nf; +extern cpuop_func_noret op_b07b_21_ff; +extern cpuop_func_noret op_b07c_21_nf; +extern cpuop_func_noret op_b07c_21_ff; +extern cpuop_func_noret op_b080_21_nf; +extern cpuop_func_noret op_b080_21_ff; +extern cpuop_func_noret op_b088_21_nf; +extern cpuop_func_noret op_b088_21_ff; +extern cpuop_func_noret op_b090_21_nf; +extern cpuop_func_noret op_b090_21_ff; +extern cpuop_func_noret op_b098_21_nf; +extern cpuop_func_noret op_b098_21_ff; +extern cpuop_func_noret op_b0a0_21_nf; +extern cpuop_func_noret op_b0a0_21_ff; +extern cpuop_func_noret op_b0a8_21_nf; +extern cpuop_func_noret op_b0a8_21_ff; +extern cpuop_func_noret op_b0b0_21_nf; +extern cpuop_func_noret op_b0b0_21_ff; +extern cpuop_func_noret op_b0b8_21_nf; +extern cpuop_func_noret op_b0b8_21_ff; +extern cpuop_func_noret op_b0b9_21_nf; +extern cpuop_func_noret op_b0b9_21_ff; +extern cpuop_func_noret op_b0ba_21_nf; +extern cpuop_func_noret op_b0ba_21_ff; +extern cpuop_func_noret op_b0bb_21_nf; +extern cpuop_func_noret op_b0bb_21_ff; +extern cpuop_func_noret op_b0bc_21_nf; +extern cpuop_func_noret op_b0bc_21_ff; +extern cpuop_func_noret op_b0c0_21_nf; +extern cpuop_func_noret op_b0c0_21_ff; +extern cpuop_func_noret op_b0c8_21_nf; +extern cpuop_func_noret op_b0c8_21_ff; +extern cpuop_func_noret op_b0d0_21_nf; +extern cpuop_func_noret op_b0d0_21_ff; +extern cpuop_func_noret op_b0d8_21_nf; +extern cpuop_func_noret op_b0d8_21_ff; +extern cpuop_func_noret op_b0e0_21_nf; +extern cpuop_func_noret op_b0e0_21_ff; +extern cpuop_func_noret op_b0e8_21_nf; +extern cpuop_func_noret op_b0e8_21_ff; +extern cpuop_func_noret op_b0f0_21_nf; +extern cpuop_func_noret op_b0f0_21_ff; +extern cpuop_func_noret op_b0f8_21_nf; +extern cpuop_func_noret op_b0f8_21_ff; +extern cpuop_func_noret op_b0f9_21_nf; +extern cpuop_func_noret op_b0f9_21_ff; +extern cpuop_func_noret op_b0fa_21_nf; +extern cpuop_func_noret op_b0fa_21_ff; +extern cpuop_func_noret op_b0fb_21_nf; +extern cpuop_func_noret op_b0fb_21_ff; +extern cpuop_func_noret op_b0fc_21_nf; +extern cpuop_func_noret op_b0fc_21_ff; +extern cpuop_func_noret op_b100_21_nf; +extern cpuop_func_noret op_b100_21_ff; +extern cpuop_func_noret op_b108_21_nf; +extern cpuop_func_noret op_b108_21_ff; +extern cpuop_func_noret op_b110_21_nf; +extern cpuop_func_noret op_b110_21_ff; +extern cpuop_func_noret op_b118_21_nf; +extern cpuop_func_noret op_b118_21_ff; +extern cpuop_func_noret op_b120_21_nf; +extern cpuop_func_noret op_b120_21_ff; +extern cpuop_func_noret op_b128_21_nf; +extern cpuop_func_noret op_b128_21_ff; +extern cpuop_func_noret op_b130_21_nf; +extern cpuop_func_noret op_b130_21_ff; +extern cpuop_func_noret op_b138_21_nf; +extern cpuop_func_noret op_b138_21_ff; +extern cpuop_func_noret op_b139_21_nf; +extern cpuop_func_noret op_b139_21_ff; +extern cpuop_func_noret op_b140_21_nf; +extern cpuop_func_noret op_b140_21_ff; +extern cpuop_func_noret op_b148_21_nf; +extern cpuop_func_noret op_b148_21_ff; +extern cpuop_func_noret op_b150_21_nf; +extern cpuop_func_noret op_b150_21_ff; +extern cpuop_func_noret op_b158_21_nf; +extern cpuop_func_noret op_b158_21_ff; +extern cpuop_func_noret op_b160_21_nf; +extern cpuop_func_noret op_b160_21_ff; +extern cpuop_func_noret op_b168_21_nf; +extern cpuop_func_noret op_b168_21_ff; +extern cpuop_func_noret op_b170_21_nf; +extern cpuop_func_noret op_b170_21_ff; +extern cpuop_func_noret op_b178_21_nf; +extern cpuop_func_noret op_b178_21_ff; +extern cpuop_func_noret op_b179_21_nf; +extern cpuop_func_noret op_b179_21_ff; +extern cpuop_func_noret op_b180_21_nf; +extern cpuop_func_noret op_b180_21_ff; +extern cpuop_func_noret op_b188_21_nf; +extern cpuop_func_noret op_b188_21_ff; +extern cpuop_func_noret op_b190_21_nf; +extern cpuop_func_noret op_b190_21_ff; +extern cpuop_func_noret op_b198_21_nf; +extern cpuop_func_noret op_b198_21_ff; +extern cpuop_func_noret op_b1a0_21_nf; +extern cpuop_func_noret op_b1a0_21_ff; +extern cpuop_func_noret op_b1a8_21_nf; +extern cpuop_func_noret op_b1a8_21_ff; +extern cpuop_func_noret op_b1b0_21_nf; +extern cpuop_func_noret op_b1b0_21_ff; +extern cpuop_func_noret op_b1b8_21_nf; +extern cpuop_func_noret op_b1b8_21_ff; +extern cpuop_func_noret op_b1b9_21_nf; +extern cpuop_func_noret op_b1b9_21_ff; +extern cpuop_func_noret op_b1c0_21_nf; +extern cpuop_func_noret op_b1c0_21_ff; +extern cpuop_func_noret op_b1c8_21_nf; +extern cpuop_func_noret op_b1c8_21_ff; +extern cpuop_func_noret op_b1d0_21_nf; +extern cpuop_func_noret op_b1d0_21_ff; +extern cpuop_func_noret op_b1d8_21_nf; +extern cpuop_func_noret op_b1d8_21_ff; +extern cpuop_func_noret op_b1e0_21_nf; +extern cpuop_func_noret op_b1e0_21_ff; +extern cpuop_func_noret op_b1e8_21_nf; +extern cpuop_func_noret op_b1e8_21_ff; +extern cpuop_func_noret op_b1f0_21_nf; +extern cpuop_func_noret op_b1f0_21_ff; +extern cpuop_func_noret op_b1f8_21_nf; +extern cpuop_func_noret op_b1f8_21_ff; +extern cpuop_func_noret op_b1f9_21_nf; +extern cpuop_func_noret op_b1f9_21_ff; +extern cpuop_func_noret op_b1fa_21_nf; +extern cpuop_func_noret op_b1fa_21_ff; +extern cpuop_func_noret op_b1fb_21_nf; +extern cpuop_func_noret op_b1fb_21_ff; +extern cpuop_func_noret op_b1fc_21_nf; +extern cpuop_func_noret op_b1fc_21_ff; +extern cpuop_func_noret op_c000_21_nf; +extern cpuop_func_noret op_c000_21_ff; +extern cpuop_func_noret op_c010_21_nf; +extern cpuop_func_noret op_c010_21_ff; +extern cpuop_func_noret op_c018_21_nf; +extern cpuop_func_noret op_c018_21_ff; +extern cpuop_func_noret op_c020_21_nf; +extern cpuop_func_noret op_c020_21_ff; +extern cpuop_func_noret op_c028_21_nf; +extern cpuop_func_noret op_c028_21_ff; +extern cpuop_func_noret op_c030_21_nf; +extern cpuop_func_noret op_c030_21_ff; +extern cpuop_func_noret op_c038_21_nf; +extern cpuop_func_noret op_c038_21_ff; +extern cpuop_func_noret op_c039_21_nf; +extern cpuop_func_noret op_c039_21_ff; +extern cpuop_func_noret op_c03a_21_nf; +extern cpuop_func_noret op_c03a_21_ff; +extern cpuop_func_noret op_c03b_21_nf; +extern cpuop_func_noret op_c03b_21_ff; +extern cpuop_func_noret op_c03c_21_nf; +extern cpuop_func_noret op_c03c_21_ff; +extern cpuop_func_noret op_c040_21_nf; +extern cpuop_func_noret op_c040_21_ff; +extern cpuop_func_noret op_c050_21_nf; +extern cpuop_func_noret op_c050_21_ff; +extern cpuop_func_noret op_c058_21_nf; +extern cpuop_func_noret op_c058_21_ff; +extern cpuop_func_noret op_c060_21_nf; +extern cpuop_func_noret op_c060_21_ff; +extern cpuop_func_noret op_c068_21_nf; +extern cpuop_func_noret op_c068_21_ff; +extern cpuop_func_noret op_c070_21_nf; +extern cpuop_func_noret op_c070_21_ff; +extern cpuop_func_noret op_c078_21_nf; +extern cpuop_func_noret op_c078_21_ff; +extern cpuop_func_noret op_c079_21_nf; +extern cpuop_func_noret op_c079_21_ff; +extern cpuop_func_noret op_c07a_21_nf; +extern cpuop_func_noret op_c07a_21_ff; +extern cpuop_func_noret op_c07b_21_nf; +extern cpuop_func_noret op_c07b_21_ff; +extern cpuop_func_noret op_c07c_21_nf; +extern cpuop_func_noret op_c07c_21_ff; +extern cpuop_func_noret op_c080_21_nf; +extern cpuop_func_noret op_c080_21_ff; +extern cpuop_func_noret op_c090_21_nf; +extern cpuop_func_noret op_c090_21_ff; +extern cpuop_func_noret op_c098_21_nf; +extern cpuop_func_noret op_c098_21_ff; +extern cpuop_func_noret op_c0a0_21_nf; +extern cpuop_func_noret op_c0a0_21_ff; +extern cpuop_func_noret op_c0a8_21_nf; +extern cpuop_func_noret op_c0a8_21_ff; +extern cpuop_func_noret op_c0b0_21_nf; +extern cpuop_func_noret op_c0b0_21_ff; +extern cpuop_func_noret op_c0b8_21_nf; +extern cpuop_func_noret op_c0b8_21_ff; +extern cpuop_func_noret op_c0b9_21_nf; +extern cpuop_func_noret op_c0b9_21_ff; +extern cpuop_func_noret op_c0ba_21_nf; +extern cpuop_func_noret op_c0ba_21_ff; +extern cpuop_func_noret op_c0bb_21_nf; +extern cpuop_func_noret op_c0bb_21_ff; +extern cpuop_func_noret op_c0bc_21_nf; +extern cpuop_func_noret op_c0bc_21_ff; +extern cpuop_func_noret op_c0c0_21_nf; +extern cpuop_func_noret op_c0c0_21_ff; +extern cpuop_func_noret op_c0d0_21_nf; +extern cpuop_func_noret op_c0d0_21_ff; +extern cpuop_func_noret op_c0d8_21_nf; +extern cpuop_func_noret op_c0d8_21_ff; +extern cpuop_func_noret op_c0e0_21_nf; +extern cpuop_func_noret op_c0e0_21_ff; +extern cpuop_func_noret op_c0e8_21_nf; +extern cpuop_func_noret op_c0e8_21_ff; +extern cpuop_func_noret op_c0f0_21_nf; +extern cpuop_func_noret op_c0f0_21_ff; +extern cpuop_func_noret op_c0f8_21_nf; +extern cpuop_func_noret op_c0f8_21_ff; +extern cpuop_func_noret op_c0f9_21_nf; +extern cpuop_func_noret op_c0f9_21_ff; +extern cpuop_func_noret op_c0fa_21_nf; +extern cpuop_func_noret op_c0fa_21_ff; +extern cpuop_func_noret op_c0fb_21_nf; +extern cpuop_func_noret op_c0fb_21_ff; +extern cpuop_func_noret op_c0fc_21_nf; +extern cpuop_func_noret op_c0fc_21_ff; +extern cpuop_func_noret op_c100_21_nf; +extern cpuop_func_noret op_c100_21_ff; +extern cpuop_func_noret op_c108_21_nf; +extern cpuop_func_noret op_c108_21_ff; +extern cpuop_func_noret op_c110_21_nf; +extern cpuop_func_noret op_c110_21_ff; +extern cpuop_func_noret op_c118_21_nf; +extern cpuop_func_noret op_c118_21_ff; +extern cpuop_func_noret op_c120_21_nf; +extern cpuop_func_noret op_c120_21_ff; +extern cpuop_func_noret op_c128_21_nf; +extern cpuop_func_noret op_c128_21_ff; +extern cpuop_func_noret op_c130_21_nf; +extern cpuop_func_noret op_c130_21_ff; +extern cpuop_func_noret op_c138_21_nf; +extern cpuop_func_noret op_c138_21_ff; +extern cpuop_func_noret op_c139_21_nf; +extern cpuop_func_noret op_c139_21_ff; +extern cpuop_func_noret op_c140_21_nf; +extern cpuop_func_noret op_c140_21_ff; +extern cpuop_func_noret op_c148_21_nf; +extern cpuop_func_noret op_c148_21_ff; +extern cpuop_func_noret op_c150_21_nf; +extern cpuop_func_noret op_c150_21_ff; +extern cpuop_func_noret op_c158_21_nf; +extern cpuop_func_noret op_c158_21_ff; +extern cpuop_func_noret op_c160_21_nf; +extern cpuop_func_noret op_c160_21_ff; +extern cpuop_func_noret op_c168_21_nf; +extern cpuop_func_noret op_c168_21_ff; +extern cpuop_func_noret op_c170_21_nf; +extern cpuop_func_noret op_c170_21_ff; +extern cpuop_func_noret op_c178_21_nf; +extern cpuop_func_noret op_c178_21_ff; +extern cpuop_func_noret op_c179_21_nf; +extern cpuop_func_noret op_c179_21_ff; +extern cpuop_func_noret op_c188_21_nf; +extern cpuop_func_noret op_c188_21_ff; +extern cpuop_func_noret op_c190_21_nf; +extern cpuop_func_noret op_c190_21_ff; +extern cpuop_func_noret op_c198_21_nf; +extern cpuop_func_noret op_c198_21_ff; +extern cpuop_func_noret op_c1a0_21_nf; +extern cpuop_func_noret op_c1a0_21_ff; +extern cpuop_func_noret op_c1a8_21_nf; +extern cpuop_func_noret op_c1a8_21_ff; +extern cpuop_func_noret op_c1b0_21_nf; +extern cpuop_func_noret op_c1b0_21_ff; +extern cpuop_func_noret op_c1b8_21_nf; +extern cpuop_func_noret op_c1b8_21_ff; +extern cpuop_func_noret op_c1b9_21_nf; +extern cpuop_func_noret op_c1b9_21_ff; +extern cpuop_func_noret op_c1c0_21_nf; +extern cpuop_func_noret op_c1c0_21_ff; +extern cpuop_func_noret op_c1d0_21_nf; +extern cpuop_func_noret op_c1d0_21_ff; +extern cpuop_func_noret op_c1d8_21_nf; +extern cpuop_func_noret op_c1d8_21_ff; +extern cpuop_func_noret op_c1e0_21_nf; +extern cpuop_func_noret op_c1e0_21_ff; +extern cpuop_func_noret op_c1e8_21_nf; +extern cpuop_func_noret op_c1e8_21_ff; +extern cpuop_func_noret op_c1f0_21_nf; +extern cpuop_func_noret op_c1f0_21_ff; +extern cpuop_func_noret op_c1f8_21_nf; +extern cpuop_func_noret op_c1f8_21_ff; +extern cpuop_func_noret op_c1f9_21_nf; +extern cpuop_func_noret op_c1f9_21_ff; +extern cpuop_func_noret op_c1fa_21_nf; +extern cpuop_func_noret op_c1fa_21_ff; +extern cpuop_func_noret op_c1fb_21_nf; +extern cpuop_func_noret op_c1fb_21_ff; +extern cpuop_func_noret op_c1fc_21_nf; +extern cpuop_func_noret op_c1fc_21_ff; +extern cpuop_func_noret op_d000_21_nf; +extern cpuop_func_noret op_d000_21_ff; +extern cpuop_func_noret op_d010_21_nf; +extern cpuop_func_noret op_d010_21_ff; +extern cpuop_func_noret op_d018_21_nf; +extern cpuop_func_noret op_d018_21_ff; +extern cpuop_func_noret op_d020_21_nf; +extern cpuop_func_noret op_d020_21_ff; +extern cpuop_func_noret op_d028_21_nf; +extern cpuop_func_noret op_d028_21_ff; +extern cpuop_func_noret op_d030_21_nf; +extern cpuop_func_noret op_d030_21_ff; +extern cpuop_func_noret op_d038_21_nf; +extern cpuop_func_noret op_d038_21_ff; +extern cpuop_func_noret op_d039_21_nf; +extern cpuop_func_noret op_d039_21_ff; +extern cpuop_func_noret op_d03a_21_nf; +extern cpuop_func_noret op_d03a_21_ff; +extern cpuop_func_noret op_d03b_21_nf; +extern cpuop_func_noret op_d03b_21_ff; +extern cpuop_func_noret op_d03c_21_nf; +extern cpuop_func_noret op_d03c_21_ff; +extern cpuop_func_noret op_d040_21_nf; +extern cpuop_func_noret op_d040_21_ff; +extern cpuop_func_noret op_d048_21_nf; +extern cpuop_func_noret op_d048_21_ff; +extern cpuop_func_noret op_d050_21_nf; +extern cpuop_func_noret op_d050_21_ff; +extern cpuop_func_noret op_d058_21_nf; +extern cpuop_func_noret op_d058_21_ff; +extern cpuop_func_noret op_d060_21_nf; +extern cpuop_func_noret op_d060_21_ff; +extern cpuop_func_noret op_d068_21_nf; +extern cpuop_func_noret op_d068_21_ff; +extern cpuop_func_noret op_d070_21_nf; +extern cpuop_func_noret op_d070_21_ff; +extern cpuop_func_noret op_d078_21_nf; +extern cpuop_func_noret op_d078_21_ff; +extern cpuop_func_noret op_d079_21_nf; +extern cpuop_func_noret op_d079_21_ff; +extern cpuop_func_noret op_d07a_21_nf; +extern cpuop_func_noret op_d07a_21_ff; +extern cpuop_func_noret op_d07b_21_nf; +extern cpuop_func_noret op_d07b_21_ff; +extern cpuop_func_noret op_d07c_21_nf; +extern cpuop_func_noret op_d07c_21_ff; +extern cpuop_func_noret op_d080_21_nf; +extern cpuop_func_noret op_d080_21_ff; +extern cpuop_func_noret op_d088_21_nf; +extern cpuop_func_noret op_d088_21_ff; +extern cpuop_func_noret op_d090_21_nf; +extern cpuop_func_noret op_d090_21_ff; +extern cpuop_func_noret op_d098_21_nf; +extern cpuop_func_noret op_d098_21_ff; +extern cpuop_func_noret op_d0a0_21_nf; +extern cpuop_func_noret op_d0a0_21_ff; +extern cpuop_func_noret op_d0a8_21_nf; +extern cpuop_func_noret op_d0a8_21_ff; +extern cpuop_func_noret op_d0b0_21_nf; +extern cpuop_func_noret op_d0b0_21_ff; +extern cpuop_func_noret op_d0b8_21_nf; +extern cpuop_func_noret op_d0b8_21_ff; +extern cpuop_func_noret op_d0b9_21_nf; +extern cpuop_func_noret op_d0b9_21_ff; +extern cpuop_func_noret op_d0ba_21_nf; +extern cpuop_func_noret op_d0ba_21_ff; +extern cpuop_func_noret op_d0bb_21_nf; +extern cpuop_func_noret op_d0bb_21_ff; +extern cpuop_func_noret op_d0bc_21_nf; +extern cpuop_func_noret op_d0bc_21_ff; +extern cpuop_func_noret op_d0c0_21_nf; +extern cpuop_func_noret op_d0c0_21_ff; +extern cpuop_func_noret op_d0c8_21_nf; +extern cpuop_func_noret op_d0c8_21_ff; +extern cpuop_func_noret op_d0d0_21_nf; +extern cpuop_func_noret op_d0d0_21_ff; +extern cpuop_func_noret op_d0d8_21_nf; +extern cpuop_func_noret op_d0d8_21_ff; +extern cpuop_func_noret op_d0e0_21_nf; +extern cpuop_func_noret op_d0e0_21_ff; +extern cpuop_func_noret op_d0e8_21_nf; +extern cpuop_func_noret op_d0e8_21_ff; +extern cpuop_func_noret op_d0f0_21_nf; +extern cpuop_func_noret op_d0f0_21_ff; +extern cpuop_func_noret op_d0f8_21_nf; +extern cpuop_func_noret op_d0f8_21_ff; +extern cpuop_func_noret op_d0f9_21_nf; +extern cpuop_func_noret op_d0f9_21_ff; +extern cpuop_func_noret op_d0fa_21_nf; +extern cpuop_func_noret op_d0fa_21_ff; +extern cpuop_func_noret op_d0fb_21_nf; +extern cpuop_func_noret op_d0fb_21_ff; +extern cpuop_func_noret op_d0fc_21_nf; +extern cpuop_func_noret op_d0fc_21_ff; +extern cpuop_func_noret op_d100_21_nf; +extern cpuop_func_noret op_d100_21_ff; +extern cpuop_func_noret op_d108_21_nf; +extern cpuop_func_noret op_d108_21_ff; +extern cpuop_func_noret op_d110_21_nf; +extern cpuop_func_noret op_d110_21_ff; +extern cpuop_func_noret op_d118_21_nf; +extern cpuop_func_noret op_d118_21_ff; +extern cpuop_func_noret op_d120_21_nf; +extern cpuop_func_noret op_d120_21_ff; +extern cpuop_func_noret op_d128_21_nf; +extern cpuop_func_noret op_d128_21_ff; +extern cpuop_func_noret op_d130_21_nf; +extern cpuop_func_noret op_d130_21_ff; +extern cpuop_func_noret op_d138_21_nf; +extern cpuop_func_noret op_d138_21_ff; +extern cpuop_func_noret op_d139_21_nf; +extern cpuop_func_noret op_d139_21_ff; +extern cpuop_func_noret op_d140_21_nf; +extern cpuop_func_noret op_d140_21_ff; +extern cpuop_func_noret op_d148_21_nf; +extern cpuop_func_noret op_d148_21_ff; +extern cpuop_func_noret op_d150_21_nf; +extern cpuop_func_noret op_d150_21_ff; +extern cpuop_func_noret op_d158_21_nf; +extern cpuop_func_noret op_d158_21_ff; +extern cpuop_func_noret op_d160_21_nf; +extern cpuop_func_noret op_d160_21_ff; +extern cpuop_func_noret op_d168_21_nf; +extern cpuop_func_noret op_d168_21_ff; +extern cpuop_func_noret op_d170_21_nf; +extern cpuop_func_noret op_d170_21_ff; +extern cpuop_func_noret op_d178_21_nf; +extern cpuop_func_noret op_d178_21_ff; +extern cpuop_func_noret op_d179_21_nf; +extern cpuop_func_noret op_d179_21_ff; +extern cpuop_func_noret op_d180_21_nf; +extern cpuop_func_noret op_d180_21_ff; +extern cpuop_func_noret op_d188_21_nf; +extern cpuop_func_noret op_d188_21_ff; +extern cpuop_func_noret op_d190_21_nf; +extern cpuop_func_noret op_d190_21_ff; +extern cpuop_func_noret op_d198_21_nf; +extern cpuop_func_noret op_d198_21_ff; +extern cpuop_func_noret op_d1a0_21_nf; +extern cpuop_func_noret op_d1a0_21_ff; +extern cpuop_func_noret op_d1a8_21_nf; +extern cpuop_func_noret op_d1a8_21_ff; +extern cpuop_func_noret op_d1b0_21_nf; +extern cpuop_func_noret op_d1b0_21_ff; +extern cpuop_func_noret op_d1b8_21_nf; +extern cpuop_func_noret op_d1b8_21_ff; +extern cpuop_func_noret op_d1b9_21_nf; +extern cpuop_func_noret op_d1b9_21_ff; +extern cpuop_func_noret op_d1c0_21_nf; +extern cpuop_func_noret op_d1c0_21_ff; +extern cpuop_func_noret op_d1c8_21_nf; +extern cpuop_func_noret op_d1c8_21_ff; +extern cpuop_func_noret op_d1d0_21_nf; +extern cpuop_func_noret op_d1d0_21_ff; +extern cpuop_func_noret op_d1d8_21_nf; +extern cpuop_func_noret op_d1d8_21_ff; +extern cpuop_func_noret op_d1e0_21_nf; +extern cpuop_func_noret op_d1e0_21_ff; +extern cpuop_func_noret op_d1e8_21_nf; +extern cpuop_func_noret op_d1e8_21_ff; +extern cpuop_func_noret op_d1f0_21_nf; +extern cpuop_func_noret op_d1f0_21_ff; +extern cpuop_func_noret op_d1f8_21_nf; +extern cpuop_func_noret op_d1f8_21_ff; +extern cpuop_func_noret op_d1f9_21_nf; +extern cpuop_func_noret op_d1f9_21_ff; +extern cpuop_func_noret op_d1fa_21_nf; +extern cpuop_func_noret op_d1fa_21_ff; +extern cpuop_func_noret op_d1fb_21_nf; +extern cpuop_func_noret op_d1fb_21_ff; +extern cpuop_func_noret op_d1fc_21_nf; +extern cpuop_func_noret op_d1fc_21_ff; +extern cpuop_func_noret op_e000_21_nf; +extern cpuop_func_noret op_e000_21_ff; +extern cpuop_func_noret op_e008_21_nf; +extern cpuop_func_noret op_e008_21_ff; +extern cpuop_func_noret op_e010_21_nf; +extern cpuop_func_noret op_e010_21_ff; +extern cpuop_func_noret op_e018_21_nf; +extern cpuop_func_noret op_e018_21_ff; +extern cpuop_func_noret op_e020_21_nf; +extern cpuop_func_noret op_e020_21_ff; +extern cpuop_func_noret op_e028_21_nf; +extern cpuop_func_noret op_e028_21_ff; +extern cpuop_func_noret op_e030_21_nf; +extern cpuop_func_noret op_e030_21_ff; +extern cpuop_func_noret op_e038_21_nf; +extern cpuop_func_noret op_e038_21_ff; +extern cpuop_func_noret op_e040_21_nf; +extern cpuop_func_noret op_e040_21_ff; +extern cpuop_func_noret op_e048_21_nf; +extern cpuop_func_noret op_e048_21_ff; +extern cpuop_func_noret op_e050_21_nf; +extern cpuop_func_noret op_e050_21_ff; +extern cpuop_func_noret op_e058_21_nf; +extern cpuop_func_noret op_e058_21_ff; +extern cpuop_func_noret op_e060_21_nf; +extern cpuop_func_noret op_e060_21_ff; +extern cpuop_func_noret op_e068_21_nf; +extern cpuop_func_noret op_e068_21_ff; +extern cpuop_func_noret op_e070_21_nf; +extern cpuop_func_noret op_e070_21_ff; +extern cpuop_func_noret op_e078_21_nf; +extern cpuop_func_noret op_e078_21_ff; +extern cpuop_func_noret op_e080_21_nf; +extern cpuop_func_noret op_e080_21_ff; +extern cpuop_func_noret op_e088_21_nf; +extern cpuop_func_noret op_e088_21_ff; +extern cpuop_func_noret op_e090_21_nf; +extern cpuop_func_noret op_e090_21_ff; +extern cpuop_func_noret op_e098_21_nf; +extern cpuop_func_noret op_e098_21_ff; +extern cpuop_func_noret op_e0a0_21_nf; +extern cpuop_func_noret op_e0a0_21_ff; +extern cpuop_func_noret op_e0a8_21_nf; +extern cpuop_func_noret op_e0a8_21_ff; +extern cpuop_func_noret op_e0b0_21_nf; +extern cpuop_func_noret op_e0b0_21_ff; +extern cpuop_func_noret op_e0b8_21_nf; +extern cpuop_func_noret op_e0b8_21_ff; +extern cpuop_func_noret op_e0d0_21_nf; +extern cpuop_func_noret op_e0d0_21_ff; +extern cpuop_func_noret op_e0d8_21_nf; +extern cpuop_func_noret op_e0d8_21_ff; +extern cpuop_func_noret op_e0e0_21_nf; +extern cpuop_func_noret op_e0e0_21_ff; +extern cpuop_func_noret op_e0e8_21_nf; +extern cpuop_func_noret op_e0e8_21_ff; +extern cpuop_func_noret op_e0f0_21_nf; +extern cpuop_func_noret op_e0f0_21_ff; +extern cpuop_func_noret op_e0f8_21_nf; +extern cpuop_func_noret op_e0f8_21_ff; +extern cpuop_func_noret op_e0f9_21_nf; +extern cpuop_func_noret op_e0f9_21_ff; +extern cpuop_func_noret op_e100_21_nf; +extern cpuop_func_noret op_e100_21_ff; +extern cpuop_func_noret op_e108_21_nf; +extern cpuop_func_noret op_e108_21_ff; +extern cpuop_func_noret op_e110_21_nf; +extern cpuop_func_noret op_e110_21_ff; +extern cpuop_func_noret op_e118_21_nf; +extern cpuop_func_noret op_e118_21_ff; +extern cpuop_func_noret op_e120_21_nf; +extern cpuop_func_noret op_e120_21_ff; +extern cpuop_func_noret op_e128_21_nf; +extern cpuop_func_noret op_e128_21_ff; +extern cpuop_func_noret op_e130_21_nf; +extern cpuop_func_noret op_e130_21_ff; +extern cpuop_func_noret op_e138_21_nf; +extern cpuop_func_noret op_e138_21_ff; +extern cpuop_func_noret op_e140_21_nf; +extern cpuop_func_noret op_e140_21_ff; +extern cpuop_func_noret op_e148_21_nf; +extern cpuop_func_noret op_e148_21_ff; +extern cpuop_func_noret op_e150_21_nf; +extern cpuop_func_noret op_e150_21_ff; +extern cpuop_func_noret op_e158_21_nf; +extern cpuop_func_noret op_e158_21_ff; +extern cpuop_func_noret op_e160_21_nf; +extern cpuop_func_noret op_e160_21_ff; +extern cpuop_func_noret op_e168_21_nf; +extern cpuop_func_noret op_e168_21_ff; +extern cpuop_func_noret op_e170_21_nf; +extern cpuop_func_noret op_e170_21_ff; +extern cpuop_func_noret op_e178_21_nf; +extern cpuop_func_noret op_e178_21_ff; +extern cpuop_func_noret op_e180_21_nf; +extern cpuop_func_noret op_e180_21_ff; +extern cpuop_func_noret op_e188_21_nf; +extern cpuop_func_noret op_e188_21_ff; +extern cpuop_func_noret op_e190_21_nf; +extern cpuop_func_noret op_e190_21_ff; +extern cpuop_func_noret op_e198_21_nf; +extern cpuop_func_noret op_e198_21_ff; +extern cpuop_func_noret op_e1a0_21_nf; +extern cpuop_func_noret op_e1a0_21_ff; +extern cpuop_func_noret op_e1a8_21_nf; +extern cpuop_func_noret op_e1a8_21_ff; +extern cpuop_func_noret op_e1b0_21_nf; +extern cpuop_func_noret op_e1b0_21_ff; +extern cpuop_func_noret op_e1b8_21_nf; +extern cpuop_func_noret op_e1b8_21_ff; +extern cpuop_func_noret op_e1d0_21_nf; +extern cpuop_func_noret op_e1d0_21_ff; +extern cpuop_func_noret op_e1d8_21_nf; +extern cpuop_func_noret op_e1d8_21_ff; +extern cpuop_func_noret op_e1e0_21_nf; +extern cpuop_func_noret op_e1e0_21_ff; +extern cpuop_func_noret op_e1e8_21_nf; +extern cpuop_func_noret op_e1e8_21_ff; +extern cpuop_func_noret op_e1f0_21_nf; +extern cpuop_func_noret op_e1f0_21_ff; +extern cpuop_func_noret op_e1f8_21_nf; +extern cpuop_func_noret op_e1f8_21_ff; +extern cpuop_func_noret op_e1f9_21_nf; +extern cpuop_func_noret op_e1f9_21_ff; +extern cpuop_func_noret op_e2d0_21_nf; +extern cpuop_func_noret op_e2d0_21_ff; +extern cpuop_func_noret op_e2d8_21_nf; +extern cpuop_func_noret op_e2d8_21_ff; +extern cpuop_func_noret op_e2e0_21_nf; +extern cpuop_func_noret op_e2e0_21_ff; +extern cpuop_func_noret op_e2e8_21_nf; +extern cpuop_func_noret op_e2e8_21_ff; +extern cpuop_func_noret op_e2f0_21_nf; +extern cpuop_func_noret op_e2f0_21_ff; +extern cpuop_func_noret op_e2f8_21_nf; +extern cpuop_func_noret op_e2f8_21_ff; +extern cpuop_func_noret op_e2f9_21_nf; +extern cpuop_func_noret op_e2f9_21_ff; +extern cpuop_func_noret op_e3d0_21_nf; +extern cpuop_func_noret op_e3d0_21_ff; +extern cpuop_func_noret op_e3d8_21_nf; +extern cpuop_func_noret op_e3d8_21_ff; +extern cpuop_func_noret op_e3e0_21_nf; +extern cpuop_func_noret op_e3e0_21_ff; +extern cpuop_func_noret op_e3e8_21_nf; +extern cpuop_func_noret op_e3e8_21_ff; +extern cpuop_func_noret op_e3f0_21_nf; +extern cpuop_func_noret op_e3f0_21_ff; +extern cpuop_func_noret op_e3f8_21_nf; +extern cpuop_func_noret op_e3f8_21_ff; +extern cpuop_func_noret op_e3f9_21_nf; +extern cpuop_func_noret op_e3f9_21_ff; +extern cpuop_func_noret op_e4d0_21_nf; +extern cpuop_func_noret op_e4d0_21_ff; +extern cpuop_func_noret op_e4d8_21_nf; +extern cpuop_func_noret op_e4d8_21_ff; +extern cpuop_func_noret op_e4e0_21_nf; +extern cpuop_func_noret op_e4e0_21_ff; +extern cpuop_func_noret op_e4e8_21_nf; +extern cpuop_func_noret op_e4e8_21_ff; +extern cpuop_func_noret op_e4f0_21_nf; +extern cpuop_func_noret op_e4f0_21_ff; +extern cpuop_func_noret op_e4f8_21_nf; +extern cpuop_func_noret op_e4f8_21_ff; +extern cpuop_func_noret op_e4f9_21_nf; +extern cpuop_func_noret op_e4f9_21_ff; +extern cpuop_func_noret op_e5d0_21_nf; +extern cpuop_func_noret op_e5d0_21_ff; +extern cpuop_func_noret op_e5d8_21_nf; +extern cpuop_func_noret op_e5d8_21_ff; +extern cpuop_func_noret op_e5e0_21_nf; +extern cpuop_func_noret op_e5e0_21_ff; +extern cpuop_func_noret op_e5e8_21_nf; +extern cpuop_func_noret op_e5e8_21_ff; +extern cpuop_func_noret op_e5f0_21_nf; +extern cpuop_func_noret op_e5f0_21_ff; +extern cpuop_func_noret op_e5f8_21_nf; +extern cpuop_func_noret op_e5f8_21_ff; +extern cpuop_func_noret op_e5f9_21_nf; +extern cpuop_func_noret op_e5f9_21_ff; +extern cpuop_func_noret op_e6d0_21_nf; +extern cpuop_func_noret op_e6d0_21_ff; +extern cpuop_func_noret op_e6d8_21_nf; +extern cpuop_func_noret op_e6d8_21_ff; +extern cpuop_func_noret op_e6e0_21_nf; +extern cpuop_func_noret op_e6e0_21_ff; +extern cpuop_func_noret op_e6e8_21_nf; +extern cpuop_func_noret op_e6e8_21_ff; +extern cpuop_func_noret op_e6f0_21_nf; +extern cpuop_func_noret op_e6f0_21_ff; +extern cpuop_func_noret op_e6f8_21_nf; +extern cpuop_func_noret op_e6f8_21_ff; +extern cpuop_func_noret op_e6f9_21_nf; +extern cpuop_func_noret op_e6f9_21_ff; +extern cpuop_func_noret op_e7d0_21_nf; +extern cpuop_func_noret op_e7d0_21_ff; +extern cpuop_func_noret op_e7d8_21_nf; +extern cpuop_func_noret op_e7d8_21_ff; +extern cpuop_func_noret op_e7e0_21_nf; +extern cpuop_func_noret op_e7e0_21_ff; +extern cpuop_func_noret op_e7e8_21_nf; +extern cpuop_func_noret op_e7e8_21_ff; +extern cpuop_func_noret op_e7f0_21_nf; +extern cpuop_func_noret op_e7f0_21_ff; +extern cpuop_func_noret op_e7f8_21_nf; +extern cpuop_func_noret op_e7f8_21_ff; +extern cpuop_func_noret op_e7f9_21_nf; +extern cpuop_func_noret op_e7f9_21_ff; +extern cpuop_func_noret op_e8c0_21_nf; +extern cpuop_func_noret op_e8c0_21_ff; +extern cpuop_func_noret op_e8d0_21_nf; +extern cpuop_func_noret op_e8d0_21_ff; +extern cpuop_func_noret op_e8e8_21_nf; +extern cpuop_func_noret op_e8e8_21_ff; +extern cpuop_func_noret op_e8f0_21_nf; +extern cpuop_func_noret op_e8f0_21_ff; +extern cpuop_func_noret op_e8f8_21_nf; +extern cpuop_func_noret op_e8f8_21_ff; +extern cpuop_func_noret op_e8f9_21_nf; +extern cpuop_func_noret op_e8f9_21_ff; +extern cpuop_func_noret op_e8fa_21_nf; +extern cpuop_func_noret op_e8fa_21_ff; +extern cpuop_func_noret op_e8fb_21_nf; +extern cpuop_func_noret op_e8fb_21_ff; +extern cpuop_func_noret op_e9c0_21_nf; +extern cpuop_func_noret op_e9c0_21_ff; +extern cpuop_func_noret op_e9d0_21_nf; +extern cpuop_func_noret op_e9d0_21_ff; +extern cpuop_func_noret op_e9e8_21_nf; +extern cpuop_func_noret op_e9e8_21_ff; +extern cpuop_func_noret op_e9f0_21_nf; +extern cpuop_func_noret op_e9f0_21_ff; +extern cpuop_func_noret op_e9f8_21_nf; +extern cpuop_func_noret op_e9f8_21_ff; +extern cpuop_func_noret op_e9f9_21_nf; +extern cpuop_func_noret op_e9f9_21_ff; +extern cpuop_func_noret op_e9fa_21_nf; +extern cpuop_func_noret op_e9fa_21_ff; +extern cpuop_func_noret op_e9fb_21_nf; +extern cpuop_func_noret op_e9fb_21_ff; +extern cpuop_func_noret op_eac0_21_nf; +extern cpuop_func_noret op_eac0_21_ff; +extern cpuop_func_noret op_ead0_21_nf; +extern cpuop_func_noret op_ead0_21_ff; +extern cpuop_func_noret op_eae8_21_nf; +extern cpuop_func_noret op_eae8_21_ff; +extern cpuop_func_noret op_eaf0_21_nf; +extern cpuop_func_noret op_eaf0_21_ff; +extern cpuop_func_noret op_eaf8_21_nf; +extern cpuop_func_noret op_eaf8_21_ff; +extern cpuop_func_noret op_eaf9_21_nf; +extern cpuop_func_noret op_eaf9_21_ff; +extern cpuop_func_noret op_ebc0_21_nf; +extern cpuop_func_noret op_ebc0_21_ff; +extern cpuop_func_noret op_ebd0_21_nf; +extern cpuop_func_noret op_ebd0_21_ff; +extern cpuop_func_noret op_ebe8_21_nf; +extern cpuop_func_noret op_ebe8_21_ff; +extern cpuop_func_noret op_ebf0_21_nf; +extern cpuop_func_noret op_ebf0_21_ff; +extern cpuop_func_noret op_ebf8_21_nf; +extern cpuop_func_noret op_ebf8_21_ff; +extern cpuop_func_noret op_ebf9_21_nf; +extern cpuop_func_noret op_ebf9_21_ff; +extern cpuop_func_noret op_ebfa_21_nf; +extern cpuop_func_noret op_ebfa_21_ff; +extern cpuop_func_noret op_ebfb_21_nf; +extern cpuop_func_noret op_ebfb_21_ff; +extern cpuop_func_noret op_ecc0_21_nf; +extern cpuop_func_noret op_ecc0_21_ff; +extern cpuop_func_noret op_ecd0_21_nf; +extern cpuop_func_noret op_ecd0_21_ff; +extern cpuop_func_noret op_ece8_21_nf; +extern cpuop_func_noret op_ece8_21_ff; +extern cpuop_func_noret op_ecf0_21_nf; +extern cpuop_func_noret op_ecf0_21_ff; +extern cpuop_func_noret op_ecf8_21_nf; +extern cpuop_func_noret op_ecf8_21_ff; +extern cpuop_func_noret op_ecf9_21_nf; +extern cpuop_func_noret op_ecf9_21_ff; +extern cpuop_func_noret op_edc0_21_nf; +extern cpuop_func_noret op_edc0_21_ff; +extern cpuop_func_noret op_edd0_21_nf; +extern cpuop_func_noret op_edd0_21_ff; +extern cpuop_func_noret op_ede8_21_nf; +extern cpuop_func_noret op_ede8_21_ff; +extern cpuop_func_noret op_edf0_21_nf; +extern cpuop_func_noret op_edf0_21_ff; +extern cpuop_func_noret op_edf8_21_nf; +extern cpuop_func_noret op_edf8_21_ff; +extern cpuop_func_noret op_edf9_21_nf; +extern cpuop_func_noret op_edf9_21_ff; +extern cpuop_func_noret op_edfa_21_nf; +extern cpuop_func_noret op_edfa_21_ff; +extern cpuop_func_noret op_edfb_21_nf; +extern cpuop_func_noret op_edfb_21_ff; +extern cpuop_func_noret op_eec0_21_nf; +extern cpuop_func_noret op_eec0_21_ff; +extern cpuop_func_noret op_eed0_21_nf; +extern cpuop_func_noret op_eed0_21_ff; +extern cpuop_func_noret op_eee8_21_nf; +extern cpuop_func_noret op_eee8_21_ff; +extern cpuop_func_noret op_eef0_21_nf; +extern cpuop_func_noret op_eef0_21_ff; +extern cpuop_func_noret op_eef8_21_nf; +extern cpuop_func_noret op_eef8_21_ff; +extern cpuop_func_noret op_eef9_21_nf; +extern cpuop_func_noret op_eef9_21_ff; +extern cpuop_func_noret op_efc0_21_nf; +extern cpuop_func_noret op_efc0_21_ff; +extern cpuop_func_noret op_efd0_21_nf; +extern cpuop_func_noret op_efd0_21_ff; +extern cpuop_func_noret op_efe8_21_nf; +extern cpuop_func_noret op_efe8_21_ff; +extern cpuop_func_noret op_eff0_21_nf; +extern cpuop_func_noret op_eff0_21_ff; +extern cpuop_func_noret op_eff8_21_nf; +extern cpuop_func_noret op_eff8_21_ff; +extern cpuop_func_noret op_eff9_21_nf; +extern cpuop_func_noret op_eff9_21_ff; +extern cpuop_func_noret op_f200_21_nf; +extern cpuop_func_noret op_f200_21_ff; +extern cpuop_func_noret op_f208_21_nf; +extern cpuop_func_noret op_f208_21_ff; +extern cpuop_func_noret op_f210_21_nf; +extern cpuop_func_noret op_f210_21_ff; +extern cpuop_func_noret op_f218_21_nf; +extern cpuop_func_noret op_f218_21_ff; +extern cpuop_func_noret op_f220_21_nf; +extern cpuop_func_noret op_f220_21_ff; +extern cpuop_func_noret op_f228_21_nf; +extern cpuop_func_noret op_f228_21_ff; +extern cpuop_func_noret op_f230_21_nf; +extern cpuop_func_noret op_f230_21_ff; +extern cpuop_func_noret op_f238_21_nf; +extern cpuop_func_noret op_f238_21_ff; +extern cpuop_func_noret op_f239_21_nf; +extern cpuop_func_noret op_f239_21_ff; +extern cpuop_func_noret op_f23a_21_nf; +extern cpuop_func_noret op_f23a_21_ff; +extern cpuop_func_noret op_f23b_21_nf; +extern cpuop_func_noret op_f23b_21_ff; +extern cpuop_func_noret op_f23c_21_nf; +extern cpuop_func_noret op_f23c_21_ff; +extern cpuop_func_noret op_f240_21_nf; +extern cpuop_func_noret op_f240_21_ff; +extern cpuop_func_noret op_f248_21_nf; +extern cpuop_func_noret op_f248_21_ff; +extern cpuop_func_noret op_f250_21_nf; +extern cpuop_func_noret op_f250_21_ff; +extern cpuop_func_noret op_f258_21_nf; +extern cpuop_func_noret op_f258_21_ff; +extern cpuop_func_noret op_f260_21_nf; +extern cpuop_func_noret op_f260_21_ff; +extern cpuop_func_noret op_f268_21_nf; +extern cpuop_func_noret op_f268_21_ff; +extern cpuop_func_noret op_f270_21_nf; +extern cpuop_func_noret op_f270_21_ff; +extern cpuop_func_noret op_f278_21_nf; +extern cpuop_func_noret op_f278_21_ff; +extern cpuop_func_noret op_f279_21_nf; +extern cpuop_func_noret op_f279_21_ff; +extern cpuop_func_noret op_f27a_21_nf; +extern cpuop_func_noret op_f27a_21_ff; +extern cpuop_func_noret op_f27b_21_nf; +extern cpuop_func_noret op_f27b_21_ff; +extern cpuop_func_noret op_f27c_21_nf; +extern cpuop_func_noret op_f27c_21_ff; +extern cpuop_func_noret op_f280_21_nf; +extern cpuop_func_noret op_f280_21_ff; +extern cpuop_func_noret op_f2c0_21_nf; +extern cpuop_func_noret op_f2c0_21_ff; +extern cpuop_func_noret op_f310_21_nf; +extern cpuop_func_noret op_f310_21_ff; +extern cpuop_func_noret op_f320_21_nf; +extern cpuop_func_noret op_f320_21_ff; +extern cpuop_func_noret op_f328_21_nf; +extern cpuop_func_noret op_f328_21_ff; +extern cpuop_func_noret op_f330_21_nf; +extern cpuop_func_noret op_f330_21_ff; +extern cpuop_func_noret op_f338_21_nf; +extern cpuop_func_noret op_f338_21_ff; +extern cpuop_func_noret op_f339_21_nf; +extern cpuop_func_noret op_f339_21_ff; +extern cpuop_func_noret op_f350_21_nf; +extern cpuop_func_noret op_f350_21_ff; +extern cpuop_func_noret op_f358_21_nf; +extern cpuop_func_noret op_f358_21_ff; +extern cpuop_func_noret op_f368_21_nf; +extern cpuop_func_noret op_f368_21_ff; +extern cpuop_func_noret op_f370_21_nf; +extern cpuop_func_noret op_f370_21_ff; +extern cpuop_func_noret op_f378_21_nf; +extern cpuop_func_noret op_f378_21_ff; +extern cpuop_func_noret op_f379_21_nf; +extern cpuop_func_noret op_f379_21_ff; +extern cpuop_func_noret op_f37a_21_nf; +extern cpuop_func_noret op_f37a_21_ff; +extern cpuop_func_noret op_f37b_21_nf; +extern cpuop_func_noret op_f37b_21_ff; +extern cpuop_func op_0000_22_nf; +extern cpuop_func op_0000_22_ff; +extern cpuop_func op_0010_22_nf; +extern cpuop_func op_0010_22_ff; +extern cpuop_func op_0018_22_nf; +extern cpuop_func op_0018_22_ff; +extern cpuop_func op_0020_22_nf; +extern cpuop_func op_0020_22_ff; +extern cpuop_func op_0028_22_nf; +extern cpuop_func op_0028_22_ff; +extern cpuop_func op_0030_22_nf; +extern cpuop_func op_0030_22_ff; +extern cpuop_func op_0038_22_nf; +extern cpuop_func op_0038_22_ff; +extern cpuop_func op_0039_22_nf; +extern cpuop_func op_0039_22_ff; +extern cpuop_func op_003c_22_nf; +extern cpuop_func op_003c_22_ff; +extern cpuop_func op_0040_22_nf; +extern cpuop_func op_0040_22_ff; +extern cpuop_func op_0050_22_nf; +extern cpuop_func op_0050_22_ff; +extern cpuop_func op_0058_22_nf; +extern cpuop_func op_0058_22_ff; +extern cpuop_func op_0060_22_nf; +extern cpuop_func op_0060_22_ff; +extern cpuop_func op_0068_22_nf; +extern cpuop_func op_0068_22_ff; +extern cpuop_func op_0070_22_nf; +extern cpuop_func op_0070_22_ff; +extern cpuop_func op_0078_22_nf; +extern cpuop_func op_0078_22_ff; +extern cpuop_func op_0079_22_nf; +extern cpuop_func op_0079_22_ff; +extern cpuop_func op_007c_22_nf; +extern cpuop_func op_007c_22_ff; +extern cpuop_func op_0080_22_nf; +extern cpuop_func op_0080_22_ff; +extern cpuop_func op_0090_22_nf; +extern cpuop_func op_0090_22_ff; +extern cpuop_func op_0098_22_nf; +extern cpuop_func op_0098_22_ff; +extern cpuop_func op_00a0_22_nf; +extern cpuop_func op_00a0_22_ff; +extern cpuop_func op_00a8_22_nf; +extern cpuop_func op_00a8_22_ff; +extern cpuop_func op_00b0_22_nf; +extern cpuop_func op_00b0_22_ff; +extern cpuop_func op_00b8_22_nf; +extern cpuop_func op_00b8_22_ff; +extern cpuop_func op_00b9_22_nf; +extern cpuop_func op_00b9_22_ff; +extern cpuop_func op_00d0_22_nf; +extern cpuop_func op_00d0_22_ff; +extern cpuop_func op_00e8_22_nf; +extern cpuop_func op_00e8_22_ff; +extern cpuop_func op_00f0_22_nf; +extern cpuop_func op_00f0_22_ff; +extern cpuop_func op_00f8_22_nf; +extern cpuop_func op_00f8_22_ff; +extern cpuop_func op_00f9_22_nf; +extern cpuop_func op_00f9_22_ff; +extern cpuop_func op_00fa_22_nf; +extern cpuop_func op_00fa_22_ff; +extern cpuop_func op_00fb_22_nf; +extern cpuop_func op_00fb_22_ff; +extern cpuop_func op_0100_22_nf; +extern cpuop_func op_0100_22_ff; +extern cpuop_func op_0108_22_nf; +extern cpuop_func op_0108_22_ff; +extern cpuop_func op_0110_22_nf; +extern cpuop_func op_0110_22_ff; +extern cpuop_func op_0118_22_nf; +extern cpuop_func op_0118_22_ff; +extern cpuop_func op_0120_22_nf; +extern cpuop_func op_0120_22_ff; +extern cpuop_func op_0128_22_nf; +extern cpuop_func op_0128_22_ff; +extern cpuop_func op_0130_22_nf; +extern cpuop_func op_0130_22_ff; +extern cpuop_func op_0138_22_nf; +extern cpuop_func op_0138_22_ff; +extern cpuop_func op_0139_22_nf; +extern cpuop_func op_0139_22_ff; +extern cpuop_func op_013a_22_nf; +extern cpuop_func op_013a_22_ff; +extern cpuop_func op_013b_22_nf; +extern cpuop_func op_013b_22_ff; +extern cpuop_func op_013c_22_nf; +extern cpuop_func op_013c_22_ff; +extern cpuop_func op_0140_22_nf; +extern cpuop_func op_0140_22_ff; +extern cpuop_func op_0148_22_nf; +extern cpuop_func op_0148_22_ff; +extern cpuop_func op_0150_22_nf; +extern cpuop_func op_0150_22_ff; +extern cpuop_func op_0158_22_nf; +extern cpuop_func op_0158_22_ff; +extern cpuop_func op_0160_22_nf; +extern cpuop_func op_0160_22_ff; +extern cpuop_func op_0168_22_nf; +extern cpuop_func op_0168_22_ff; +extern cpuop_func op_0170_22_nf; +extern cpuop_func op_0170_22_ff; +extern cpuop_func op_0178_22_nf; +extern cpuop_func op_0178_22_ff; +extern cpuop_func op_0179_22_nf; +extern cpuop_func op_0179_22_ff; +extern cpuop_func op_0180_22_nf; +extern cpuop_func op_0180_22_ff; +extern cpuop_func op_0188_22_nf; +extern cpuop_func op_0188_22_ff; +extern cpuop_func op_0190_22_nf; +extern cpuop_func op_0190_22_ff; +extern cpuop_func op_0198_22_nf; +extern cpuop_func op_0198_22_ff; +extern cpuop_func op_01a0_22_nf; +extern cpuop_func op_01a0_22_ff; +extern cpuop_func op_01a8_22_nf; +extern cpuop_func op_01a8_22_ff; +extern cpuop_func op_01b0_22_nf; +extern cpuop_func op_01b0_22_ff; +extern cpuop_func op_01b8_22_nf; +extern cpuop_func op_01b8_22_ff; +extern cpuop_func op_01b9_22_nf; +extern cpuop_func op_01b9_22_ff; +extern cpuop_func op_01c0_22_nf; +extern cpuop_func op_01c0_22_ff; +extern cpuop_func op_01c8_22_nf; +extern cpuop_func op_01c8_22_ff; +extern cpuop_func op_01d0_22_nf; +extern cpuop_func op_01d0_22_ff; +extern cpuop_func op_01d8_22_nf; +extern cpuop_func op_01d8_22_ff; +extern cpuop_func op_01e0_22_nf; +extern cpuop_func op_01e0_22_ff; +extern cpuop_func op_01e8_22_nf; +extern cpuop_func op_01e8_22_ff; +extern cpuop_func op_01f0_22_nf; +extern cpuop_func op_01f0_22_ff; +extern cpuop_func op_01f8_22_nf; +extern cpuop_func op_01f8_22_ff; +extern cpuop_func op_01f9_22_nf; +extern cpuop_func op_01f9_22_ff; +extern cpuop_func op_0200_22_nf; +extern cpuop_func op_0200_22_ff; +extern cpuop_func op_0210_22_nf; +extern cpuop_func op_0210_22_ff; +extern cpuop_func op_0218_22_nf; +extern cpuop_func op_0218_22_ff; +extern cpuop_func op_0220_22_nf; +extern cpuop_func op_0220_22_ff; +extern cpuop_func op_0228_22_nf; +extern cpuop_func op_0228_22_ff; +extern cpuop_func op_0230_22_nf; +extern cpuop_func op_0230_22_ff; +extern cpuop_func op_0238_22_nf; +extern cpuop_func op_0238_22_ff; +extern cpuop_func op_0239_22_nf; +extern cpuop_func op_0239_22_ff; +extern cpuop_func op_023c_22_nf; +extern cpuop_func op_023c_22_ff; +extern cpuop_func op_0240_22_nf; +extern cpuop_func op_0240_22_ff; +extern cpuop_func op_0250_22_nf; +extern cpuop_func op_0250_22_ff; +extern cpuop_func op_0258_22_nf; +extern cpuop_func op_0258_22_ff; +extern cpuop_func op_0260_22_nf; +extern cpuop_func op_0260_22_ff; +extern cpuop_func op_0268_22_nf; +extern cpuop_func op_0268_22_ff; +extern cpuop_func op_0270_22_nf; +extern cpuop_func op_0270_22_ff; +extern cpuop_func op_0278_22_nf; +extern cpuop_func op_0278_22_ff; +extern cpuop_func op_0279_22_nf; +extern cpuop_func op_0279_22_ff; +extern cpuop_func op_027c_22_nf; +extern cpuop_func op_027c_22_ff; +extern cpuop_func op_0280_22_nf; +extern cpuop_func op_0280_22_ff; +extern cpuop_func op_0290_22_nf; +extern cpuop_func op_0290_22_ff; +extern cpuop_func op_0298_22_nf; +extern cpuop_func op_0298_22_ff; +extern cpuop_func op_02a0_22_nf; +extern cpuop_func op_02a0_22_ff; +extern cpuop_func op_02a8_22_nf; +extern cpuop_func op_02a8_22_ff; +extern cpuop_func op_02b0_22_nf; +extern cpuop_func op_02b0_22_ff; +extern cpuop_func op_02b8_22_nf; +extern cpuop_func op_02b8_22_ff; +extern cpuop_func op_02b9_22_nf; +extern cpuop_func op_02b9_22_ff; +extern cpuop_func op_02d0_22_nf; +extern cpuop_func op_02d0_22_ff; +extern cpuop_func op_02e8_22_nf; +extern cpuop_func op_02e8_22_ff; +extern cpuop_func op_02f0_22_nf; +extern cpuop_func op_02f0_22_ff; +extern cpuop_func op_02f8_22_nf; +extern cpuop_func op_02f8_22_ff; +extern cpuop_func op_02f9_22_nf; +extern cpuop_func op_02f9_22_ff; +extern cpuop_func op_02fa_22_nf; +extern cpuop_func op_02fa_22_ff; +extern cpuop_func op_02fb_22_nf; +extern cpuop_func op_02fb_22_ff; +extern cpuop_func op_0400_22_nf; +extern cpuop_func op_0400_22_ff; +extern cpuop_func op_0410_22_nf; +extern cpuop_func op_0410_22_ff; +extern cpuop_func op_0418_22_nf; +extern cpuop_func op_0418_22_ff; +extern cpuop_func op_0420_22_nf; +extern cpuop_func op_0420_22_ff; +extern cpuop_func op_0428_22_nf; +extern cpuop_func op_0428_22_ff; +extern cpuop_func op_0430_22_nf; +extern cpuop_func op_0430_22_ff; +extern cpuop_func op_0438_22_nf; +extern cpuop_func op_0438_22_ff; +extern cpuop_func op_0439_22_nf; +extern cpuop_func op_0439_22_ff; +extern cpuop_func op_0440_22_nf; +extern cpuop_func op_0440_22_ff; +extern cpuop_func op_0450_22_nf; +extern cpuop_func op_0450_22_ff; +extern cpuop_func op_0458_22_nf; +extern cpuop_func op_0458_22_ff; +extern cpuop_func op_0460_22_nf; +extern cpuop_func op_0460_22_ff; +extern cpuop_func op_0468_22_nf; +extern cpuop_func op_0468_22_ff; +extern cpuop_func op_0470_22_nf; +extern cpuop_func op_0470_22_ff; +extern cpuop_func op_0478_22_nf; +extern cpuop_func op_0478_22_ff; +extern cpuop_func op_0479_22_nf; +extern cpuop_func op_0479_22_ff; +extern cpuop_func op_0480_22_nf; +extern cpuop_func op_0480_22_ff; +extern cpuop_func op_0490_22_nf; +extern cpuop_func op_0490_22_ff; +extern cpuop_func op_0498_22_nf; +extern cpuop_func op_0498_22_ff; +extern cpuop_func op_04a0_22_nf; +extern cpuop_func op_04a0_22_ff; +extern cpuop_func op_04a8_22_nf; +extern cpuop_func op_04a8_22_ff; +extern cpuop_func op_04b0_22_nf; +extern cpuop_func op_04b0_22_ff; +extern cpuop_func op_04b8_22_nf; +extern cpuop_func op_04b8_22_ff; +extern cpuop_func op_04b9_22_nf; +extern cpuop_func op_04b9_22_ff; +extern cpuop_func op_04d0_22_nf; +extern cpuop_func op_04d0_22_ff; +extern cpuop_func op_04e8_22_nf; +extern cpuop_func op_04e8_22_ff; +extern cpuop_func op_04f0_22_nf; +extern cpuop_func op_04f0_22_ff; +extern cpuop_func op_04f8_22_nf; +extern cpuop_func op_04f8_22_ff; +extern cpuop_func op_04f9_22_nf; +extern cpuop_func op_04f9_22_ff; +extern cpuop_func op_04fa_22_nf; +extern cpuop_func op_04fa_22_ff; +extern cpuop_func op_04fb_22_nf; +extern cpuop_func op_04fb_22_ff; +extern cpuop_func op_0600_22_nf; +extern cpuop_func op_0600_22_ff; +extern cpuop_func op_0610_22_nf; +extern cpuop_func op_0610_22_ff; +extern cpuop_func op_0618_22_nf; +extern cpuop_func op_0618_22_ff; +extern cpuop_func op_0620_22_nf; +extern cpuop_func op_0620_22_ff; +extern cpuop_func op_0628_22_nf; +extern cpuop_func op_0628_22_ff; +extern cpuop_func op_0630_22_nf; +extern cpuop_func op_0630_22_ff; +extern cpuop_func op_0638_22_nf; +extern cpuop_func op_0638_22_ff; +extern cpuop_func op_0639_22_nf; +extern cpuop_func op_0639_22_ff; +extern cpuop_func op_0640_22_nf; +extern cpuop_func op_0640_22_ff; +extern cpuop_func op_0650_22_nf; +extern cpuop_func op_0650_22_ff; +extern cpuop_func op_0658_22_nf; +extern cpuop_func op_0658_22_ff; +extern cpuop_func op_0660_22_nf; +extern cpuop_func op_0660_22_ff; +extern cpuop_func op_0668_22_nf; +extern cpuop_func op_0668_22_ff; +extern cpuop_func op_0670_22_nf; +extern cpuop_func op_0670_22_ff; +extern cpuop_func op_0678_22_nf; +extern cpuop_func op_0678_22_ff; +extern cpuop_func op_0679_22_nf; +extern cpuop_func op_0679_22_ff; +extern cpuop_func op_0680_22_nf; +extern cpuop_func op_0680_22_ff; +extern cpuop_func op_0690_22_nf; +extern cpuop_func op_0690_22_ff; +extern cpuop_func op_0698_22_nf; +extern cpuop_func op_0698_22_ff; +extern cpuop_func op_06a0_22_nf; +extern cpuop_func op_06a0_22_ff; +extern cpuop_func op_06a8_22_nf; +extern cpuop_func op_06a8_22_ff; +extern cpuop_func op_06b0_22_nf; +extern cpuop_func op_06b0_22_ff; +extern cpuop_func op_06b8_22_nf; +extern cpuop_func op_06b8_22_ff; +extern cpuop_func op_06b9_22_nf; +extern cpuop_func op_06b9_22_ff; +extern cpuop_func op_06c0_22_nf; +extern cpuop_func op_06c0_22_ff; +extern cpuop_func op_06c8_22_nf; +extern cpuop_func op_06c8_22_ff; +extern cpuop_func op_06d0_22_nf; +extern cpuop_func op_06d0_22_ff; +extern cpuop_func op_06e8_22_nf; +extern cpuop_func op_06e8_22_ff; +extern cpuop_func op_06f0_22_nf; +extern cpuop_func op_06f0_22_ff; +extern cpuop_func op_06f8_22_nf; +extern cpuop_func op_06f8_22_ff; +extern cpuop_func op_06f9_22_nf; +extern cpuop_func op_06f9_22_ff; +extern cpuop_func op_06fa_22_nf; +extern cpuop_func op_06fa_22_ff; +extern cpuop_func op_06fb_22_nf; +extern cpuop_func op_06fb_22_ff; +extern cpuop_func op_0800_22_nf; +extern cpuop_func op_0800_22_ff; +extern cpuop_func op_0810_22_nf; +extern cpuop_func op_0810_22_ff; +extern cpuop_func op_0818_22_nf; +extern cpuop_func op_0818_22_ff; +extern cpuop_func op_0820_22_nf; +extern cpuop_func op_0820_22_ff; +extern cpuop_func op_0828_22_nf; +extern cpuop_func op_0828_22_ff; +extern cpuop_func op_0830_22_nf; +extern cpuop_func op_0830_22_ff; +extern cpuop_func op_0838_22_nf; +extern cpuop_func op_0838_22_ff; +extern cpuop_func op_0839_22_nf; +extern cpuop_func op_0839_22_ff; +extern cpuop_func op_083a_22_nf; +extern cpuop_func op_083a_22_ff; +extern cpuop_func op_083b_22_nf; +extern cpuop_func op_083b_22_ff; +extern cpuop_func op_0840_22_nf; +extern cpuop_func op_0840_22_ff; +extern cpuop_func op_0850_22_nf; +extern cpuop_func op_0850_22_ff; +extern cpuop_func op_0858_22_nf; +extern cpuop_func op_0858_22_ff; +extern cpuop_func op_0860_22_nf; +extern cpuop_func op_0860_22_ff; +extern cpuop_func op_0868_22_nf; +extern cpuop_func op_0868_22_ff; +extern cpuop_func op_0870_22_nf; +extern cpuop_func op_0870_22_ff; +extern cpuop_func op_0878_22_nf; +extern cpuop_func op_0878_22_ff; +extern cpuop_func op_0879_22_nf; +extern cpuop_func op_0879_22_ff; +extern cpuop_func op_0880_22_nf; +extern cpuop_func op_0880_22_ff; +extern cpuop_func op_0890_22_nf; +extern cpuop_func op_0890_22_ff; +extern cpuop_func op_0898_22_nf; +extern cpuop_func op_0898_22_ff; +extern cpuop_func op_08a0_22_nf; +extern cpuop_func op_08a0_22_ff; +extern cpuop_func op_08a8_22_nf; +extern cpuop_func op_08a8_22_ff; +extern cpuop_func op_08b0_22_nf; +extern cpuop_func op_08b0_22_ff; +extern cpuop_func op_08b8_22_nf; +extern cpuop_func op_08b8_22_ff; +extern cpuop_func op_08b9_22_nf; +extern cpuop_func op_08b9_22_ff; +extern cpuop_func op_08c0_22_nf; +extern cpuop_func op_08c0_22_ff; +extern cpuop_func op_08d0_22_nf; +extern cpuop_func op_08d0_22_ff; +extern cpuop_func op_08d8_22_nf; +extern cpuop_func op_08d8_22_ff; +extern cpuop_func op_08e0_22_nf; +extern cpuop_func op_08e0_22_ff; +extern cpuop_func op_08e8_22_nf; +extern cpuop_func op_08e8_22_ff; +extern cpuop_func op_08f0_22_nf; +extern cpuop_func op_08f0_22_ff; +extern cpuop_func op_08f8_22_nf; +extern cpuop_func op_08f8_22_ff; +extern cpuop_func op_08f9_22_nf; +extern cpuop_func op_08f9_22_ff; +extern cpuop_func op_0a00_22_nf; +extern cpuop_func op_0a00_22_ff; +extern cpuop_func op_0a10_22_nf; +extern cpuop_func op_0a10_22_ff; +extern cpuop_func op_0a18_22_nf; +extern cpuop_func op_0a18_22_ff; +extern cpuop_func op_0a20_22_nf; +extern cpuop_func op_0a20_22_ff; +extern cpuop_func op_0a28_22_nf; +extern cpuop_func op_0a28_22_ff; +extern cpuop_func op_0a30_22_nf; +extern cpuop_func op_0a30_22_ff; +extern cpuop_func op_0a38_22_nf; +extern cpuop_func op_0a38_22_ff; +extern cpuop_func op_0a39_22_nf; +extern cpuop_func op_0a39_22_ff; +extern cpuop_func op_0a3c_22_nf; +extern cpuop_func op_0a3c_22_ff; +extern cpuop_func op_0a40_22_nf; +extern cpuop_func op_0a40_22_ff; +extern cpuop_func op_0a50_22_nf; +extern cpuop_func op_0a50_22_ff; +extern cpuop_func op_0a58_22_nf; +extern cpuop_func op_0a58_22_ff; +extern cpuop_func op_0a60_22_nf; +extern cpuop_func op_0a60_22_ff; +extern cpuop_func op_0a68_22_nf; +extern cpuop_func op_0a68_22_ff; +extern cpuop_func op_0a70_22_nf; +extern cpuop_func op_0a70_22_ff; +extern cpuop_func op_0a78_22_nf; +extern cpuop_func op_0a78_22_ff; +extern cpuop_func op_0a79_22_nf; +extern cpuop_func op_0a79_22_ff; +extern cpuop_func op_0a7c_22_nf; +extern cpuop_func op_0a7c_22_ff; +extern cpuop_func op_0a80_22_nf; +extern cpuop_func op_0a80_22_ff; +extern cpuop_func op_0a90_22_nf; +extern cpuop_func op_0a90_22_ff; +extern cpuop_func op_0a98_22_nf; +extern cpuop_func op_0a98_22_ff; +extern cpuop_func op_0aa0_22_nf; +extern cpuop_func op_0aa0_22_ff; +extern cpuop_func op_0aa8_22_nf; +extern cpuop_func op_0aa8_22_ff; +extern cpuop_func op_0ab0_22_nf; +extern cpuop_func op_0ab0_22_ff; +extern cpuop_func op_0ab8_22_nf; +extern cpuop_func op_0ab8_22_ff; +extern cpuop_func op_0ab9_22_nf; +extern cpuop_func op_0ab9_22_ff; +extern cpuop_func op_0ad0_22_nf; +extern cpuop_func op_0ad0_22_ff; +extern cpuop_func op_0ad8_22_nf; +extern cpuop_func op_0ad8_22_ff; +extern cpuop_func op_0ae0_22_nf; +extern cpuop_func op_0ae0_22_ff; +extern cpuop_func op_0ae8_22_nf; +extern cpuop_func op_0ae8_22_ff; +extern cpuop_func op_0af0_22_nf; +extern cpuop_func op_0af0_22_ff; +extern cpuop_func op_0af8_22_nf; +extern cpuop_func op_0af8_22_ff; +extern cpuop_func op_0af9_22_nf; +extern cpuop_func op_0af9_22_ff; +extern cpuop_func op_0c00_22_nf; +extern cpuop_func op_0c00_22_ff; +extern cpuop_func op_0c10_22_nf; +extern cpuop_func op_0c10_22_ff; +extern cpuop_func op_0c18_22_nf; +extern cpuop_func op_0c18_22_ff; +extern cpuop_func op_0c20_22_nf; +extern cpuop_func op_0c20_22_ff; +extern cpuop_func op_0c28_22_nf; +extern cpuop_func op_0c28_22_ff; +extern cpuop_func op_0c30_22_nf; +extern cpuop_func op_0c30_22_ff; +extern cpuop_func op_0c38_22_nf; +extern cpuop_func op_0c38_22_ff; +extern cpuop_func op_0c39_22_nf; +extern cpuop_func op_0c39_22_ff; +extern cpuop_func op_0c3a_22_nf; +extern cpuop_func op_0c3a_22_ff; +extern cpuop_func op_0c3b_22_nf; +extern cpuop_func op_0c3b_22_ff; +extern cpuop_func op_0c40_22_nf; +extern cpuop_func op_0c40_22_ff; +extern cpuop_func op_0c50_22_nf; +extern cpuop_func op_0c50_22_ff; +extern cpuop_func op_0c58_22_nf; +extern cpuop_func op_0c58_22_ff; +extern cpuop_func op_0c60_22_nf; +extern cpuop_func op_0c60_22_ff; +extern cpuop_func op_0c68_22_nf; +extern cpuop_func op_0c68_22_ff; +extern cpuop_func op_0c70_22_nf; +extern cpuop_func op_0c70_22_ff; +extern cpuop_func op_0c78_22_nf; +extern cpuop_func op_0c78_22_ff; +extern cpuop_func op_0c79_22_nf; +extern cpuop_func op_0c79_22_ff; +extern cpuop_func op_0c7a_22_nf; +extern cpuop_func op_0c7a_22_ff; +extern cpuop_func op_0c7b_22_nf; +extern cpuop_func op_0c7b_22_ff; +extern cpuop_func op_0c80_22_nf; +extern cpuop_func op_0c80_22_ff; +extern cpuop_func op_0c90_22_nf; +extern cpuop_func op_0c90_22_ff; +extern cpuop_func op_0c98_22_nf; +extern cpuop_func op_0c98_22_ff; +extern cpuop_func op_0ca0_22_nf; +extern cpuop_func op_0ca0_22_ff; +extern cpuop_func op_0ca8_22_nf; +extern cpuop_func op_0ca8_22_ff; +extern cpuop_func op_0cb0_22_nf; +extern cpuop_func op_0cb0_22_ff; +extern cpuop_func op_0cb8_22_nf; +extern cpuop_func op_0cb8_22_ff; +extern cpuop_func op_0cb9_22_nf; +extern cpuop_func op_0cb9_22_ff; +extern cpuop_func op_0cba_22_nf; +extern cpuop_func op_0cba_22_ff; +extern cpuop_func op_0cbb_22_nf; +extern cpuop_func op_0cbb_22_ff; +extern cpuop_func op_0cd0_22_nf; +extern cpuop_func op_0cd0_22_ff; +extern cpuop_func op_0cd8_22_nf; +extern cpuop_func op_0cd8_22_ff; +extern cpuop_func op_0ce0_22_nf; +extern cpuop_func op_0ce0_22_ff; +extern cpuop_func op_0ce8_22_nf; +extern cpuop_func op_0ce8_22_ff; +extern cpuop_func op_0cf0_22_nf; +extern cpuop_func op_0cf0_22_ff; +extern cpuop_func op_0cf8_22_nf; +extern cpuop_func op_0cf8_22_ff; +extern cpuop_func op_0cf9_22_nf; +extern cpuop_func op_0cf9_22_ff; +extern cpuop_func op_0cfc_22_nf; +extern cpuop_func op_0cfc_22_ff; +extern cpuop_func op_0e10_22_nf; +extern cpuop_func op_0e10_22_ff; +extern cpuop_func op_0e18_22_nf; +extern cpuop_func op_0e18_22_ff; +extern cpuop_func op_0e20_22_nf; +extern cpuop_func op_0e20_22_ff; +extern cpuop_func op_0e28_22_nf; +extern cpuop_func op_0e28_22_ff; +extern cpuop_func op_0e30_22_nf; +extern cpuop_func op_0e30_22_ff; +extern cpuop_func op_0e38_22_nf; +extern cpuop_func op_0e38_22_ff; +extern cpuop_func op_0e39_22_nf; +extern cpuop_func op_0e39_22_ff; +extern cpuop_func op_0e50_22_nf; +extern cpuop_func op_0e50_22_ff; +extern cpuop_func op_0e58_22_nf; +extern cpuop_func op_0e58_22_ff; +extern cpuop_func op_0e60_22_nf; +extern cpuop_func op_0e60_22_ff; +extern cpuop_func op_0e68_22_nf; +extern cpuop_func op_0e68_22_ff; +extern cpuop_func op_0e70_22_nf; +extern cpuop_func op_0e70_22_ff; +extern cpuop_func op_0e78_22_nf; +extern cpuop_func op_0e78_22_ff; +extern cpuop_func op_0e79_22_nf; +extern cpuop_func op_0e79_22_ff; +extern cpuop_func op_0e90_22_nf; +extern cpuop_func op_0e90_22_ff; +extern cpuop_func op_0e98_22_nf; +extern cpuop_func op_0e98_22_ff; +extern cpuop_func op_0ea0_22_nf; +extern cpuop_func op_0ea0_22_ff; +extern cpuop_func op_0ea8_22_nf; +extern cpuop_func op_0ea8_22_ff; +extern cpuop_func op_0eb0_22_nf; +extern cpuop_func op_0eb0_22_ff; +extern cpuop_func op_0eb8_22_nf; +extern cpuop_func op_0eb8_22_ff; +extern cpuop_func op_0eb9_22_nf; +extern cpuop_func op_0eb9_22_ff; +extern cpuop_func op_0ed0_22_nf; +extern cpuop_func op_0ed0_22_ff; +extern cpuop_func op_0ed8_22_nf; +extern cpuop_func op_0ed8_22_ff; +extern cpuop_func op_0ee0_22_nf; +extern cpuop_func op_0ee0_22_ff; +extern cpuop_func op_0ee8_22_nf; +extern cpuop_func op_0ee8_22_ff; +extern cpuop_func op_0ef0_22_nf; +extern cpuop_func op_0ef0_22_ff; +extern cpuop_func op_0ef8_22_nf; +extern cpuop_func op_0ef8_22_ff; +extern cpuop_func op_0ef9_22_nf; +extern cpuop_func op_0ef9_22_ff; +extern cpuop_func op_0efc_22_nf; +extern cpuop_func op_0efc_22_ff; +extern cpuop_func op_1000_22_nf; +extern cpuop_func op_1000_22_ff; +extern cpuop_func op_1010_22_nf; +extern cpuop_func op_1010_22_ff; +extern cpuop_func op_1018_22_nf; +extern cpuop_func op_1018_22_ff; +extern cpuop_func op_1020_22_nf; +extern cpuop_func op_1020_22_ff; +extern cpuop_func op_1028_22_nf; +extern cpuop_func op_1028_22_ff; +extern cpuop_func op_1030_22_nf; +extern cpuop_func op_1030_22_ff; +extern cpuop_func op_1038_22_nf; +extern cpuop_func op_1038_22_ff; +extern cpuop_func op_1039_22_nf; +extern cpuop_func op_1039_22_ff; +extern cpuop_func op_103a_22_nf; +extern cpuop_func op_103a_22_ff; +extern cpuop_func op_103b_22_nf; +extern cpuop_func op_103b_22_ff; +extern cpuop_func op_103c_22_nf; +extern cpuop_func op_103c_22_ff; +extern cpuop_func op_1080_22_nf; +extern cpuop_func op_1080_22_ff; +extern cpuop_func op_1090_22_nf; +extern cpuop_func op_1090_22_ff; +extern cpuop_func op_1098_22_nf; +extern cpuop_func op_1098_22_ff; +extern cpuop_func op_10a0_22_nf; +extern cpuop_func op_10a0_22_ff; +extern cpuop_func op_10a8_22_nf; +extern cpuop_func op_10a8_22_ff; +extern cpuop_func op_10b0_22_nf; +extern cpuop_func op_10b0_22_ff; +extern cpuop_func op_10b8_22_nf; +extern cpuop_func op_10b8_22_ff; +extern cpuop_func op_10b9_22_nf; +extern cpuop_func op_10b9_22_ff; +extern cpuop_func op_10ba_22_nf; +extern cpuop_func op_10ba_22_ff; +extern cpuop_func op_10bb_22_nf; +extern cpuop_func op_10bb_22_ff; +extern cpuop_func op_10bc_22_nf; +extern cpuop_func op_10bc_22_ff; +extern cpuop_func op_10c0_22_nf; +extern cpuop_func op_10c0_22_ff; +extern cpuop_func op_10d0_22_nf; +extern cpuop_func op_10d0_22_ff; +extern cpuop_func op_10d8_22_nf; +extern cpuop_func op_10d8_22_ff; +extern cpuop_func op_10e0_22_nf; +extern cpuop_func op_10e0_22_ff; +extern cpuop_func op_10e8_22_nf; +extern cpuop_func op_10e8_22_ff; +extern cpuop_func op_10f0_22_nf; +extern cpuop_func op_10f0_22_ff; +extern cpuop_func op_10f8_22_nf; +extern cpuop_func op_10f8_22_ff; +extern cpuop_func op_10f9_22_nf; +extern cpuop_func op_10f9_22_ff; +extern cpuop_func op_10fa_22_nf; +extern cpuop_func op_10fa_22_ff; +extern cpuop_func op_10fb_22_nf; +extern cpuop_func op_10fb_22_ff; +extern cpuop_func op_10fc_22_nf; +extern cpuop_func op_10fc_22_ff; +extern cpuop_func op_1100_22_nf; +extern cpuop_func op_1100_22_ff; +extern cpuop_func op_1110_22_nf; +extern cpuop_func op_1110_22_ff; +extern cpuop_func op_1118_22_nf; +extern cpuop_func op_1118_22_ff; +extern cpuop_func op_1120_22_nf; +extern cpuop_func op_1120_22_ff; +extern cpuop_func op_1128_22_nf; +extern cpuop_func op_1128_22_ff; +extern cpuop_func op_1130_22_nf; +extern cpuop_func op_1130_22_ff; +extern cpuop_func op_1138_22_nf; +extern cpuop_func op_1138_22_ff; +extern cpuop_func op_1139_22_nf; +extern cpuop_func op_1139_22_ff; +extern cpuop_func op_113a_22_nf; +extern cpuop_func op_113a_22_ff; +extern cpuop_func op_113b_22_nf; +extern cpuop_func op_113b_22_ff; +extern cpuop_func op_113c_22_nf; +extern cpuop_func op_113c_22_ff; +extern cpuop_func op_1140_22_nf; +extern cpuop_func op_1140_22_ff; +extern cpuop_func op_1150_22_nf; +extern cpuop_func op_1150_22_ff; +extern cpuop_func op_1158_22_nf; +extern cpuop_func op_1158_22_ff; +extern cpuop_func op_1160_22_nf; +extern cpuop_func op_1160_22_ff; +extern cpuop_func op_1168_22_nf; +extern cpuop_func op_1168_22_ff; +extern cpuop_func op_1170_22_nf; +extern cpuop_func op_1170_22_ff; +extern cpuop_func op_1178_22_nf; +extern cpuop_func op_1178_22_ff; +extern cpuop_func op_1179_22_nf; +extern cpuop_func op_1179_22_ff; +extern cpuop_func op_117a_22_nf; +extern cpuop_func op_117a_22_ff; +extern cpuop_func op_117b_22_nf; +extern cpuop_func op_117b_22_ff; +extern cpuop_func op_117c_22_nf; +extern cpuop_func op_117c_22_ff; +extern cpuop_func op_1180_22_nf; +extern cpuop_func op_1180_22_ff; +extern cpuop_func op_1190_22_nf; +extern cpuop_func op_1190_22_ff; +extern cpuop_func op_1198_22_nf; +extern cpuop_func op_1198_22_ff; +extern cpuop_func op_11a0_22_nf; +extern cpuop_func op_11a0_22_ff; +extern cpuop_func op_11a8_22_nf; +extern cpuop_func op_11a8_22_ff; +extern cpuop_func op_11b0_22_nf; +extern cpuop_func op_11b0_22_ff; +extern cpuop_func op_11b8_22_nf; +extern cpuop_func op_11b8_22_ff; +extern cpuop_func op_11b9_22_nf; +extern cpuop_func op_11b9_22_ff; +extern cpuop_func op_11ba_22_nf; +extern cpuop_func op_11ba_22_ff; +extern cpuop_func op_11bb_22_nf; +extern cpuop_func op_11bb_22_ff; +extern cpuop_func op_11bc_22_nf; +extern cpuop_func op_11bc_22_ff; +extern cpuop_func op_11c0_22_nf; +extern cpuop_func op_11c0_22_ff; +extern cpuop_func op_11d0_22_nf; +extern cpuop_func op_11d0_22_ff; +extern cpuop_func op_11d8_22_nf; +extern cpuop_func op_11d8_22_ff; +extern cpuop_func op_11e0_22_nf; +extern cpuop_func op_11e0_22_ff; +extern cpuop_func op_11e8_22_nf; +extern cpuop_func op_11e8_22_ff; +extern cpuop_func op_11f0_22_nf; +extern cpuop_func op_11f0_22_ff; +extern cpuop_func op_11f8_22_nf; +extern cpuop_func op_11f8_22_ff; +extern cpuop_func op_11f9_22_nf; +extern cpuop_func op_11f9_22_ff; +extern cpuop_func op_11fa_22_nf; +extern cpuop_func op_11fa_22_ff; +extern cpuop_func op_11fb_22_nf; +extern cpuop_func op_11fb_22_ff; +extern cpuop_func op_11fc_22_nf; +extern cpuop_func op_11fc_22_ff; +extern cpuop_func op_13c0_22_nf; +extern cpuop_func op_13c0_22_ff; +extern cpuop_func op_13d0_22_nf; +extern cpuop_func op_13d0_22_ff; +extern cpuop_func op_13d8_22_nf; +extern cpuop_func op_13d8_22_ff; +extern cpuop_func op_13e0_22_nf; +extern cpuop_func op_13e0_22_ff; +extern cpuop_func op_13e8_22_nf; +extern cpuop_func op_13e8_22_ff; +extern cpuop_func op_13f0_22_nf; +extern cpuop_func op_13f0_22_ff; +extern cpuop_func op_13f8_22_nf; +extern cpuop_func op_13f8_22_ff; +extern cpuop_func op_13f9_22_nf; +extern cpuop_func op_13f9_22_ff; +extern cpuop_func op_13fa_22_nf; +extern cpuop_func op_13fa_22_ff; +extern cpuop_func op_13fb_22_nf; +extern cpuop_func op_13fb_22_ff; +extern cpuop_func op_13fc_22_nf; +extern cpuop_func op_13fc_22_ff; +extern cpuop_func op_2000_22_nf; +extern cpuop_func op_2000_22_ff; +extern cpuop_func op_2008_22_nf; +extern cpuop_func op_2008_22_ff; +extern cpuop_func op_2010_22_nf; +extern cpuop_func op_2010_22_ff; +extern cpuop_func op_2018_22_nf; +extern cpuop_func op_2018_22_ff; +extern cpuop_func op_2020_22_nf; +extern cpuop_func op_2020_22_ff; +extern cpuop_func op_2028_22_nf; +extern cpuop_func op_2028_22_ff; +extern cpuop_func op_2030_22_nf; +extern cpuop_func op_2030_22_ff; +extern cpuop_func op_2038_22_nf; +extern cpuop_func op_2038_22_ff; +extern cpuop_func op_2039_22_nf; +extern cpuop_func op_2039_22_ff; +extern cpuop_func op_203a_22_nf; +extern cpuop_func op_203a_22_ff; +extern cpuop_func op_203b_22_nf; +extern cpuop_func op_203b_22_ff; +extern cpuop_func op_203c_22_nf; +extern cpuop_func op_203c_22_ff; +extern cpuop_func op_2040_22_nf; +extern cpuop_func op_2040_22_ff; +extern cpuop_func op_2048_22_nf; +extern cpuop_func op_2048_22_ff; +extern cpuop_func op_2050_22_nf; +extern cpuop_func op_2050_22_ff; +extern cpuop_func op_2058_22_nf; +extern cpuop_func op_2058_22_ff; +extern cpuop_func op_2060_22_nf; +extern cpuop_func op_2060_22_ff; +extern cpuop_func op_2068_22_nf; +extern cpuop_func op_2068_22_ff; +extern cpuop_func op_2070_22_nf; +extern cpuop_func op_2070_22_ff; +extern cpuop_func op_2078_22_nf; +extern cpuop_func op_2078_22_ff; +extern cpuop_func op_2079_22_nf; +extern cpuop_func op_2079_22_ff; +extern cpuop_func op_207a_22_nf; +extern cpuop_func op_207a_22_ff; +extern cpuop_func op_207b_22_nf; +extern cpuop_func op_207b_22_ff; +extern cpuop_func op_207c_22_nf; +extern cpuop_func op_207c_22_ff; +extern cpuop_func op_2080_22_nf; +extern cpuop_func op_2080_22_ff; +extern cpuop_func op_2088_22_nf; +extern cpuop_func op_2088_22_ff; +extern cpuop_func op_2090_22_nf; +extern cpuop_func op_2090_22_ff; +extern cpuop_func op_2098_22_nf; +extern cpuop_func op_2098_22_ff; +extern cpuop_func op_20a0_22_nf; +extern cpuop_func op_20a0_22_ff; +extern cpuop_func op_20a8_22_nf; +extern cpuop_func op_20a8_22_ff; +extern cpuop_func op_20b0_22_nf; +extern cpuop_func op_20b0_22_ff; +extern cpuop_func op_20b8_22_nf; +extern cpuop_func op_20b8_22_ff; +extern cpuop_func op_20b9_22_nf; +extern cpuop_func op_20b9_22_ff; +extern cpuop_func op_20ba_22_nf; +extern cpuop_func op_20ba_22_ff; +extern cpuop_func op_20bb_22_nf; +extern cpuop_func op_20bb_22_ff; +extern cpuop_func op_20bc_22_nf; +extern cpuop_func op_20bc_22_ff; +extern cpuop_func op_20c0_22_nf; +extern cpuop_func op_20c0_22_ff; +extern cpuop_func op_20c8_22_nf; +extern cpuop_func op_20c8_22_ff; +extern cpuop_func op_20d0_22_nf; +extern cpuop_func op_20d0_22_ff; +extern cpuop_func op_20d8_22_nf; +extern cpuop_func op_20d8_22_ff; +extern cpuop_func op_20e0_22_nf; +extern cpuop_func op_20e0_22_ff; +extern cpuop_func op_20e8_22_nf; +extern cpuop_func op_20e8_22_ff; +extern cpuop_func op_20f0_22_nf; +extern cpuop_func op_20f0_22_ff; +extern cpuop_func op_20f8_22_nf; +extern cpuop_func op_20f8_22_ff; +extern cpuop_func op_20f9_22_nf; +extern cpuop_func op_20f9_22_ff; +extern cpuop_func op_20fa_22_nf; +extern cpuop_func op_20fa_22_ff; +extern cpuop_func op_20fb_22_nf; +extern cpuop_func op_20fb_22_ff; +extern cpuop_func op_20fc_22_nf; +extern cpuop_func op_20fc_22_ff; +extern cpuop_func op_2100_22_nf; +extern cpuop_func op_2100_22_ff; +extern cpuop_func op_2108_22_nf; +extern cpuop_func op_2108_22_ff; +extern cpuop_func op_2110_22_nf; +extern cpuop_func op_2110_22_ff; +extern cpuop_func op_2118_22_nf; +extern cpuop_func op_2118_22_ff; +extern cpuop_func op_2120_22_nf; +extern cpuop_func op_2120_22_ff; +extern cpuop_func op_2128_22_nf; +extern cpuop_func op_2128_22_ff; +extern cpuop_func op_2130_22_nf; +extern cpuop_func op_2130_22_ff; +extern cpuop_func op_2138_22_nf; +extern cpuop_func op_2138_22_ff; +extern cpuop_func op_2139_22_nf; +extern cpuop_func op_2139_22_ff; +extern cpuop_func op_213a_22_nf; +extern cpuop_func op_213a_22_ff; +extern cpuop_func op_213b_22_nf; +extern cpuop_func op_213b_22_ff; +extern cpuop_func op_213c_22_nf; +extern cpuop_func op_213c_22_ff; +extern cpuop_func op_2140_22_nf; +extern cpuop_func op_2140_22_ff; +extern cpuop_func op_2148_22_nf; +extern cpuop_func op_2148_22_ff; +extern cpuop_func op_2150_22_nf; +extern cpuop_func op_2150_22_ff; +extern cpuop_func op_2158_22_nf; +extern cpuop_func op_2158_22_ff; +extern cpuop_func op_2160_22_nf; +extern cpuop_func op_2160_22_ff; +extern cpuop_func op_2168_22_nf; +extern cpuop_func op_2168_22_ff; +extern cpuop_func op_2170_22_nf; +extern cpuop_func op_2170_22_ff; +extern cpuop_func op_2178_22_nf; +extern cpuop_func op_2178_22_ff; +extern cpuop_func op_2179_22_nf; +extern cpuop_func op_2179_22_ff; +extern cpuop_func op_217a_22_nf; +extern cpuop_func op_217a_22_ff; +extern cpuop_func op_217b_22_nf; +extern cpuop_func op_217b_22_ff; +extern cpuop_func op_217c_22_nf; +extern cpuop_func op_217c_22_ff; +extern cpuop_func op_2180_22_nf; +extern cpuop_func op_2180_22_ff; +extern cpuop_func op_2188_22_nf; +extern cpuop_func op_2188_22_ff; +extern cpuop_func op_2190_22_nf; +extern cpuop_func op_2190_22_ff; +extern cpuop_func op_2198_22_nf; +extern cpuop_func op_2198_22_ff; +extern cpuop_func op_21a0_22_nf; +extern cpuop_func op_21a0_22_ff; +extern cpuop_func op_21a8_22_nf; +extern cpuop_func op_21a8_22_ff; +extern cpuop_func op_21b0_22_nf; +extern cpuop_func op_21b0_22_ff; +extern cpuop_func op_21b8_22_nf; +extern cpuop_func op_21b8_22_ff; +extern cpuop_func op_21b9_22_nf; +extern cpuop_func op_21b9_22_ff; +extern cpuop_func op_21ba_22_nf; +extern cpuop_func op_21ba_22_ff; +extern cpuop_func op_21bb_22_nf; +extern cpuop_func op_21bb_22_ff; +extern cpuop_func op_21bc_22_nf; +extern cpuop_func op_21bc_22_ff; +extern cpuop_func op_21c0_22_nf; +extern cpuop_func op_21c0_22_ff; +extern cpuop_func op_21c8_22_nf; +extern cpuop_func op_21c8_22_ff; +extern cpuop_func op_21d0_22_nf; +extern cpuop_func op_21d0_22_ff; +extern cpuop_func op_21d8_22_nf; +extern cpuop_func op_21d8_22_ff; +extern cpuop_func op_21e0_22_nf; +extern cpuop_func op_21e0_22_ff; +extern cpuop_func op_21e8_22_nf; +extern cpuop_func op_21e8_22_ff; +extern cpuop_func op_21f0_22_nf; +extern cpuop_func op_21f0_22_ff; +extern cpuop_func op_21f8_22_nf; +extern cpuop_func op_21f8_22_ff; +extern cpuop_func op_21f9_22_nf; +extern cpuop_func op_21f9_22_ff; +extern cpuop_func op_21fa_22_nf; +extern cpuop_func op_21fa_22_ff; +extern cpuop_func op_21fb_22_nf; +extern cpuop_func op_21fb_22_ff; +extern cpuop_func op_21fc_22_nf; +extern cpuop_func op_21fc_22_ff; +extern cpuop_func op_23c0_22_nf; +extern cpuop_func op_23c0_22_ff; +extern cpuop_func op_23c8_22_nf; +extern cpuop_func op_23c8_22_ff; +extern cpuop_func op_23d0_22_nf; +extern cpuop_func op_23d0_22_ff; +extern cpuop_func op_23d8_22_nf; +extern cpuop_func op_23d8_22_ff; +extern cpuop_func op_23e0_22_nf; +extern cpuop_func op_23e0_22_ff; +extern cpuop_func op_23e8_22_nf; +extern cpuop_func op_23e8_22_ff; +extern cpuop_func op_23f0_22_nf; +extern cpuop_func op_23f0_22_ff; +extern cpuop_func op_23f8_22_nf; +extern cpuop_func op_23f8_22_ff; +extern cpuop_func op_23f9_22_nf; +extern cpuop_func op_23f9_22_ff; +extern cpuop_func op_23fa_22_nf; +extern cpuop_func op_23fa_22_ff; +extern cpuop_func op_23fb_22_nf; +extern cpuop_func op_23fb_22_ff; +extern cpuop_func op_23fc_22_nf; +extern cpuop_func op_23fc_22_ff; +extern cpuop_func op_3000_22_nf; +extern cpuop_func op_3000_22_ff; +extern cpuop_func op_3008_22_nf; +extern cpuop_func op_3008_22_ff; +extern cpuop_func op_3010_22_nf; +extern cpuop_func op_3010_22_ff; +extern cpuop_func op_3018_22_nf; +extern cpuop_func op_3018_22_ff; +extern cpuop_func op_3020_22_nf; +extern cpuop_func op_3020_22_ff; +extern cpuop_func op_3028_22_nf; +extern cpuop_func op_3028_22_ff; +extern cpuop_func op_3030_22_nf; +extern cpuop_func op_3030_22_ff; +extern cpuop_func op_3038_22_nf; +extern cpuop_func op_3038_22_ff; +extern cpuop_func op_3039_22_nf; +extern cpuop_func op_3039_22_ff; +extern cpuop_func op_303a_22_nf; +extern cpuop_func op_303a_22_ff; +extern cpuop_func op_303b_22_nf; +extern cpuop_func op_303b_22_ff; +extern cpuop_func op_303c_22_nf; +extern cpuop_func op_303c_22_ff; +extern cpuop_func op_3040_22_nf; +extern cpuop_func op_3040_22_ff; +extern cpuop_func op_3048_22_nf; +extern cpuop_func op_3048_22_ff; +extern cpuop_func op_3050_22_nf; +extern cpuop_func op_3050_22_ff; +extern cpuop_func op_3058_22_nf; +extern cpuop_func op_3058_22_ff; +extern cpuop_func op_3060_22_nf; +extern cpuop_func op_3060_22_ff; +extern cpuop_func op_3068_22_nf; +extern cpuop_func op_3068_22_ff; +extern cpuop_func op_3070_22_nf; +extern cpuop_func op_3070_22_ff; +extern cpuop_func op_3078_22_nf; +extern cpuop_func op_3078_22_ff; +extern cpuop_func op_3079_22_nf; +extern cpuop_func op_3079_22_ff; +extern cpuop_func op_307a_22_nf; +extern cpuop_func op_307a_22_ff; +extern cpuop_func op_307b_22_nf; +extern cpuop_func op_307b_22_ff; +extern cpuop_func op_307c_22_nf; +extern cpuop_func op_307c_22_ff; +extern cpuop_func op_3080_22_nf; +extern cpuop_func op_3080_22_ff; +extern cpuop_func op_3088_22_nf; +extern cpuop_func op_3088_22_ff; +extern cpuop_func op_3090_22_nf; +extern cpuop_func op_3090_22_ff; +extern cpuop_func op_3098_22_nf; +extern cpuop_func op_3098_22_ff; +extern cpuop_func op_30a0_22_nf; +extern cpuop_func op_30a0_22_ff; +extern cpuop_func op_30a8_22_nf; +extern cpuop_func op_30a8_22_ff; +extern cpuop_func op_30b0_22_nf; +extern cpuop_func op_30b0_22_ff; +extern cpuop_func op_30b8_22_nf; +extern cpuop_func op_30b8_22_ff; +extern cpuop_func op_30b9_22_nf; +extern cpuop_func op_30b9_22_ff; +extern cpuop_func op_30ba_22_nf; +extern cpuop_func op_30ba_22_ff; +extern cpuop_func op_30bb_22_nf; +extern cpuop_func op_30bb_22_ff; +extern cpuop_func op_30bc_22_nf; +extern cpuop_func op_30bc_22_ff; +extern cpuop_func op_30c0_22_nf; +extern cpuop_func op_30c0_22_ff; +extern cpuop_func op_30c8_22_nf; +extern cpuop_func op_30c8_22_ff; +extern cpuop_func op_30d0_22_nf; +extern cpuop_func op_30d0_22_ff; +extern cpuop_func op_30d8_22_nf; +extern cpuop_func op_30d8_22_ff; +extern cpuop_func op_30e0_22_nf; +extern cpuop_func op_30e0_22_ff; +extern cpuop_func op_30e8_22_nf; +extern cpuop_func op_30e8_22_ff; +extern cpuop_func op_30f0_22_nf; +extern cpuop_func op_30f0_22_ff; +extern cpuop_func op_30f8_22_nf; +extern cpuop_func op_30f8_22_ff; +extern cpuop_func op_30f9_22_nf; +extern cpuop_func op_30f9_22_ff; +extern cpuop_func op_30fa_22_nf; +extern cpuop_func op_30fa_22_ff; +extern cpuop_func op_30fb_22_nf; +extern cpuop_func op_30fb_22_ff; +extern cpuop_func op_30fc_22_nf; +extern cpuop_func op_30fc_22_ff; +extern cpuop_func op_3100_22_nf; +extern cpuop_func op_3100_22_ff; +extern cpuop_func op_3108_22_nf; +extern cpuop_func op_3108_22_ff; +extern cpuop_func op_3110_22_nf; +extern cpuop_func op_3110_22_ff; +extern cpuop_func op_3118_22_nf; +extern cpuop_func op_3118_22_ff; +extern cpuop_func op_3120_22_nf; +extern cpuop_func op_3120_22_ff; +extern cpuop_func op_3128_22_nf; +extern cpuop_func op_3128_22_ff; +extern cpuop_func op_3130_22_nf; +extern cpuop_func op_3130_22_ff; +extern cpuop_func op_3138_22_nf; +extern cpuop_func op_3138_22_ff; +extern cpuop_func op_3139_22_nf; +extern cpuop_func op_3139_22_ff; +extern cpuop_func op_313a_22_nf; +extern cpuop_func op_313a_22_ff; +extern cpuop_func op_313b_22_nf; +extern cpuop_func op_313b_22_ff; +extern cpuop_func op_313c_22_nf; +extern cpuop_func op_313c_22_ff; +extern cpuop_func op_3140_22_nf; +extern cpuop_func op_3140_22_ff; +extern cpuop_func op_3148_22_nf; +extern cpuop_func op_3148_22_ff; +extern cpuop_func op_3150_22_nf; +extern cpuop_func op_3150_22_ff; +extern cpuop_func op_3158_22_nf; +extern cpuop_func op_3158_22_ff; +extern cpuop_func op_3160_22_nf; +extern cpuop_func op_3160_22_ff; +extern cpuop_func op_3168_22_nf; +extern cpuop_func op_3168_22_ff; +extern cpuop_func op_3170_22_nf; +extern cpuop_func op_3170_22_ff; +extern cpuop_func op_3178_22_nf; +extern cpuop_func op_3178_22_ff; +extern cpuop_func op_3179_22_nf; +extern cpuop_func op_3179_22_ff; +extern cpuop_func op_317a_22_nf; +extern cpuop_func op_317a_22_ff; +extern cpuop_func op_317b_22_nf; +extern cpuop_func op_317b_22_ff; +extern cpuop_func op_317c_22_nf; +extern cpuop_func op_317c_22_ff; +extern cpuop_func op_3180_22_nf; +extern cpuop_func op_3180_22_ff; +extern cpuop_func op_3188_22_nf; +extern cpuop_func op_3188_22_ff; +extern cpuop_func op_3190_22_nf; +extern cpuop_func op_3190_22_ff; +extern cpuop_func op_3198_22_nf; +extern cpuop_func op_3198_22_ff; +extern cpuop_func op_31a0_22_nf; +extern cpuop_func op_31a0_22_ff; +extern cpuop_func op_31a8_22_nf; +extern cpuop_func op_31a8_22_ff; +extern cpuop_func op_31b0_22_nf; +extern cpuop_func op_31b0_22_ff; +extern cpuop_func op_31b8_22_nf; +extern cpuop_func op_31b8_22_ff; +extern cpuop_func op_31b9_22_nf; +extern cpuop_func op_31b9_22_ff; +extern cpuop_func op_31ba_22_nf; +extern cpuop_func op_31ba_22_ff; +extern cpuop_func op_31bb_22_nf; +extern cpuop_func op_31bb_22_ff; +extern cpuop_func op_31bc_22_nf; +extern cpuop_func op_31bc_22_ff; +extern cpuop_func op_31c0_22_nf; +extern cpuop_func op_31c0_22_ff; +extern cpuop_func op_31c8_22_nf; +extern cpuop_func op_31c8_22_ff; +extern cpuop_func op_31d0_22_nf; +extern cpuop_func op_31d0_22_ff; +extern cpuop_func op_31d8_22_nf; +extern cpuop_func op_31d8_22_ff; +extern cpuop_func op_31e0_22_nf; +extern cpuop_func op_31e0_22_ff; +extern cpuop_func op_31e8_22_nf; +extern cpuop_func op_31e8_22_ff; +extern cpuop_func op_31f0_22_nf; +extern cpuop_func op_31f0_22_ff; +extern cpuop_func op_31f8_22_nf; +extern cpuop_func op_31f8_22_ff; +extern cpuop_func op_31f9_22_nf; +extern cpuop_func op_31f9_22_ff; +extern cpuop_func op_31fa_22_nf; +extern cpuop_func op_31fa_22_ff; +extern cpuop_func op_31fb_22_nf; +extern cpuop_func op_31fb_22_ff; +extern cpuop_func op_31fc_22_nf; +extern cpuop_func op_31fc_22_ff; +extern cpuop_func op_33c0_22_nf; +extern cpuop_func op_33c0_22_ff; +extern cpuop_func op_33c8_22_nf; +extern cpuop_func op_33c8_22_ff; +extern cpuop_func op_33d0_22_nf; +extern cpuop_func op_33d0_22_ff; +extern cpuop_func op_33d8_22_nf; +extern cpuop_func op_33d8_22_ff; +extern cpuop_func op_33e0_22_nf; +extern cpuop_func op_33e0_22_ff; +extern cpuop_func op_33e8_22_nf; +extern cpuop_func op_33e8_22_ff; +extern cpuop_func op_33f0_22_nf; +extern cpuop_func op_33f0_22_ff; +extern cpuop_func op_33f8_22_nf; +extern cpuop_func op_33f8_22_ff; +extern cpuop_func op_33f9_22_nf; +extern cpuop_func op_33f9_22_ff; +extern cpuop_func op_33fa_22_nf; +extern cpuop_func op_33fa_22_ff; +extern cpuop_func op_33fb_22_nf; +extern cpuop_func op_33fb_22_ff; +extern cpuop_func op_33fc_22_nf; +extern cpuop_func op_33fc_22_ff; +extern cpuop_func op_4000_22_nf; +extern cpuop_func op_4000_22_ff; +extern cpuop_func op_4010_22_nf; +extern cpuop_func op_4010_22_ff; +extern cpuop_func op_4018_22_nf; +extern cpuop_func op_4018_22_ff; +extern cpuop_func op_4020_22_nf; +extern cpuop_func op_4020_22_ff; +extern cpuop_func op_4028_22_nf; +extern cpuop_func op_4028_22_ff; +extern cpuop_func op_4030_22_nf; +extern cpuop_func op_4030_22_ff; +extern cpuop_func op_4038_22_nf; +extern cpuop_func op_4038_22_ff; +extern cpuop_func op_4039_22_nf; +extern cpuop_func op_4039_22_ff; +extern cpuop_func op_4040_22_nf; +extern cpuop_func op_4040_22_ff; +extern cpuop_func op_4050_22_nf; +extern cpuop_func op_4050_22_ff; +extern cpuop_func op_4058_22_nf; +extern cpuop_func op_4058_22_ff; +extern cpuop_func op_4060_22_nf; +extern cpuop_func op_4060_22_ff; +extern cpuop_func op_4068_22_nf; +extern cpuop_func op_4068_22_ff; +extern cpuop_func op_4070_22_nf; +extern cpuop_func op_4070_22_ff; +extern cpuop_func op_4078_22_nf; +extern cpuop_func op_4078_22_ff; +extern cpuop_func op_4079_22_nf; +extern cpuop_func op_4079_22_ff; +extern cpuop_func op_4080_22_nf; +extern cpuop_func op_4080_22_ff; +extern cpuop_func op_4090_22_nf; +extern cpuop_func op_4090_22_ff; +extern cpuop_func op_4098_22_nf; +extern cpuop_func op_4098_22_ff; +extern cpuop_func op_40a0_22_nf; +extern cpuop_func op_40a0_22_ff; +extern cpuop_func op_40a8_22_nf; +extern cpuop_func op_40a8_22_ff; +extern cpuop_func op_40b0_22_nf; +extern cpuop_func op_40b0_22_ff; +extern cpuop_func op_40b8_22_nf; +extern cpuop_func op_40b8_22_ff; +extern cpuop_func op_40b9_22_nf; +extern cpuop_func op_40b9_22_ff; +extern cpuop_func op_40c0_22_nf; +extern cpuop_func op_40c0_22_ff; +extern cpuop_func op_40d0_22_nf; +extern cpuop_func op_40d0_22_ff; +extern cpuop_func op_40d8_22_nf; +extern cpuop_func op_40d8_22_ff; +extern cpuop_func op_40e0_22_nf; +extern cpuop_func op_40e0_22_ff; +extern cpuop_func op_40e8_22_nf; +extern cpuop_func op_40e8_22_ff; +extern cpuop_func op_40f0_22_nf; +extern cpuop_func op_40f0_22_ff; +extern cpuop_func op_40f8_22_nf; +extern cpuop_func op_40f8_22_ff; +extern cpuop_func op_40f9_22_nf; +extern cpuop_func op_40f9_22_ff; +extern cpuop_func op_4100_22_nf; +extern cpuop_func op_4100_22_ff; +extern cpuop_func op_4110_22_nf; +extern cpuop_func op_4110_22_ff; +extern cpuop_func op_4118_22_nf; +extern cpuop_func op_4118_22_ff; +extern cpuop_func op_4120_22_nf; +extern cpuop_func op_4120_22_ff; +extern cpuop_func op_4128_22_nf; +extern cpuop_func op_4128_22_ff; +extern cpuop_func op_4130_22_nf; +extern cpuop_func op_4130_22_ff; +extern cpuop_func op_4138_22_nf; +extern cpuop_func op_4138_22_ff; +extern cpuop_func op_4139_22_nf; +extern cpuop_func op_4139_22_ff; +extern cpuop_func op_413a_22_nf; +extern cpuop_func op_413a_22_ff; +extern cpuop_func op_413b_22_nf; +extern cpuop_func op_413b_22_ff; +extern cpuop_func op_413c_22_nf; +extern cpuop_func op_413c_22_ff; +extern cpuop_func op_4180_22_nf; +extern cpuop_func op_4180_22_ff; +extern cpuop_func op_4190_22_nf; +extern cpuop_func op_4190_22_ff; +extern cpuop_func op_4198_22_nf; +extern cpuop_func op_4198_22_ff; +extern cpuop_func op_41a0_22_nf; +extern cpuop_func op_41a0_22_ff; +extern cpuop_func op_41a8_22_nf; +extern cpuop_func op_41a8_22_ff; +extern cpuop_func op_41b0_22_nf; +extern cpuop_func op_41b0_22_ff; +extern cpuop_func op_41b8_22_nf; +extern cpuop_func op_41b8_22_ff; +extern cpuop_func op_41b9_22_nf; +extern cpuop_func op_41b9_22_ff; +extern cpuop_func op_41ba_22_nf; +extern cpuop_func op_41ba_22_ff; +extern cpuop_func op_41bb_22_nf; +extern cpuop_func op_41bb_22_ff; +extern cpuop_func op_41bc_22_nf; +extern cpuop_func op_41bc_22_ff; +extern cpuop_func op_41d0_22_nf; +extern cpuop_func op_41d0_22_ff; +extern cpuop_func op_41e8_22_nf; +extern cpuop_func op_41e8_22_ff; +extern cpuop_func op_41f0_22_nf; +extern cpuop_func op_41f0_22_ff; +extern cpuop_func op_41f8_22_nf; +extern cpuop_func op_41f8_22_ff; +extern cpuop_func op_41f9_22_nf; +extern cpuop_func op_41f9_22_ff; +extern cpuop_func op_41fa_22_nf; +extern cpuop_func op_41fa_22_ff; +extern cpuop_func op_41fb_22_nf; +extern cpuop_func op_41fb_22_ff; +extern cpuop_func op_4200_22_nf; +extern cpuop_func op_4200_22_ff; +extern cpuop_func op_4210_22_nf; +extern cpuop_func op_4210_22_ff; +extern cpuop_func op_4218_22_nf; +extern cpuop_func op_4218_22_ff; +extern cpuop_func op_4220_22_nf; +extern cpuop_func op_4220_22_ff; +extern cpuop_func op_4228_22_nf; +extern cpuop_func op_4228_22_ff; +extern cpuop_func op_4230_22_nf; +extern cpuop_func op_4230_22_ff; +extern cpuop_func op_4238_22_nf; +extern cpuop_func op_4238_22_ff; +extern cpuop_func op_4239_22_nf; +extern cpuop_func op_4239_22_ff; +extern cpuop_func op_4240_22_nf; +extern cpuop_func op_4240_22_ff; +extern cpuop_func op_4250_22_nf; +extern cpuop_func op_4250_22_ff; +extern cpuop_func op_4258_22_nf; +extern cpuop_func op_4258_22_ff; +extern cpuop_func op_4260_22_nf; +extern cpuop_func op_4260_22_ff; +extern cpuop_func op_4268_22_nf; +extern cpuop_func op_4268_22_ff; +extern cpuop_func op_4270_22_nf; +extern cpuop_func op_4270_22_ff; +extern cpuop_func op_4278_22_nf; +extern cpuop_func op_4278_22_ff; +extern cpuop_func op_4279_22_nf; +extern cpuop_func op_4279_22_ff; +extern cpuop_func op_4280_22_nf; +extern cpuop_func op_4280_22_ff; +extern cpuop_func op_4290_22_nf; +extern cpuop_func op_4290_22_ff; +extern cpuop_func op_4298_22_nf; +extern cpuop_func op_4298_22_ff; +extern cpuop_func op_42a0_22_nf; +extern cpuop_func op_42a0_22_ff; +extern cpuop_func op_42a8_22_nf; +extern cpuop_func op_42a8_22_ff; +extern cpuop_func op_42b0_22_nf; +extern cpuop_func op_42b0_22_ff; +extern cpuop_func op_42b8_22_nf; +extern cpuop_func op_42b8_22_ff; +extern cpuop_func op_42b9_22_nf; +extern cpuop_func op_42b9_22_ff; +extern cpuop_func op_42c0_22_nf; +extern cpuop_func op_42c0_22_ff; +extern cpuop_func op_42d0_22_nf; +extern cpuop_func op_42d0_22_ff; +extern cpuop_func op_42d8_22_nf; +extern cpuop_func op_42d8_22_ff; +extern cpuop_func op_42e0_22_nf; +extern cpuop_func op_42e0_22_ff; +extern cpuop_func op_42e8_22_nf; +extern cpuop_func op_42e8_22_ff; +extern cpuop_func op_42f0_22_nf; +extern cpuop_func op_42f0_22_ff; +extern cpuop_func op_42f8_22_nf; +extern cpuop_func op_42f8_22_ff; +extern cpuop_func op_42f9_22_nf; +extern cpuop_func op_42f9_22_ff; +extern cpuop_func op_4400_22_nf; +extern cpuop_func op_4400_22_ff; +extern cpuop_func op_4410_22_nf; +extern cpuop_func op_4410_22_ff; +extern cpuop_func op_4418_22_nf; +extern cpuop_func op_4418_22_ff; +extern cpuop_func op_4420_22_nf; +extern cpuop_func op_4420_22_ff; +extern cpuop_func op_4428_22_nf; +extern cpuop_func op_4428_22_ff; +extern cpuop_func op_4430_22_nf; +extern cpuop_func op_4430_22_ff; +extern cpuop_func op_4438_22_nf; +extern cpuop_func op_4438_22_ff; +extern cpuop_func op_4439_22_nf; +extern cpuop_func op_4439_22_ff; +extern cpuop_func op_4440_22_nf; +extern cpuop_func op_4440_22_ff; +extern cpuop_func op_4450_22_nf; +extern cpuop_func op_4450_22_ff; +extern cpuop_func op_4458_22_nf; +extern cpuop_func op_4458_22_ff; +extern cpuop_func op_4460_22_nf; +extern cpuop_func op_4460_22_ff; +extern cpuop_func op_4468_22_nf; +extern cpuop_func op_4468_22_ff; +extern cpuop_func op_4470_22_nf; +extern cpuop_func op_4470_22_ff; +extern cpuop_func op_4478_22_nf; +extern cpuop_func op_4478_22_ff; +extern cpuop_func op_4479_22_nf; +extern cpuop_func op_4479_22_ff; +extern cpuop_func op_4480_22_nf; +extern cpuop_func op_4480_22_ff; +extern cpuop_func op_4490_22_nf; +extern cpuop_func op_4490_22_ff; +extern cpuop_func op_4498_22_nf; +extern cpuop_func op_4498_22_ff; +extern cpuop_func op_44a0_22_nf; +extern cpuop_func op_44a0_22_ff; +extern cpuop_func op_44a8_22_nf; +extern cpuop_func op_44a8_22_ff; +extern cpuop_func op_44b0_22_nf; +extern cpuop_func op_44b0_22_ff; +extern cpuop_func op_44b8_22_nf; +extern cpuop_func op_44b8_22_ff; +extern cpuop_func op_44b9_22_nf; +extern cpuop_func op_44b9_22_ff; +extern cpuop_func op_44c0_22_nf; +extern cpuop_func op_44c0_22_ff; +extern cpuop_func op_44d0_22_nf; +extern cpuop_func op_44d0_22_ff; +extern cpuop_func op_44d8_22_nf; +extern cpuop_func op_44d8_22_ff; +extern cpuop_func op_44e0_22_nf; +extern cpuop_func op_44e0_22_ff; +extern cpuop_func op_44e8_22_nf; +extern cpuop_func op_44e8_22_ff; +extern cpuop_func op_44f0_22_nf; +extern cpuop_func op_44f0_22_ff; +extern cpuop_func op_44f8_22_nf; +extern cpuop_func op_44f8_22_ff; +extern cpuop_func op_44f9_22_nf; +extern cpuop_func op_44f9_22_ff; +extern cpuop_func op_44fa_22_nf; +extern cpuop_func op_44fa_22_ff; +extern cpuop_func op_44fb_22_nf; +extern cpuop_func op_44fb_22_ff; +extern cpuop_func op_44fc_22_nf; +extern cpuop_func op_44fc_22_ff; +extern cpuop_func op_4600_22_nf; +extern cpuop_func op_4600_22_ff; +extern cpuop_func op_4610_22_nf; +extern cpuop_func op_4610_22_ff; +extern cpuop_func op_4618_22_nf; +extern cpuop_func op_4618_22_ff; +extern cpuop_func op_4620_22_nf; +extern cpuop_func op_4620_22_ff; +extern cpuop_func op_4628_22_nf; +extern cpuop_func op_4628_22_ff; +extern cpuop_func op_4630_22_nf; +extern cpuop_func op_4630_22_ff; +extern cpuop_func op_4638_22_nf; +extern cpuop_func op_4638_22_ff; +extern cpuop_func op_4639_22_nf; +extern cpuop_func op_4639_22_ff; +extern cpuop_func op_4640_22_nf; +extern cpuop_func op_4640_22_ff; +extern cpuop_func op_4650_22_nf; +extern cpuop_func op_4650_22_ff; +extern cpuop_func op_4658_22_nf; +extern cpuop_func op_4658_22_ff; +extern cpuop_func op_4660_22_nf; +extern cpuop_func op_4660_22_ff; +extern cpuop_func op_4668_22_nf; +extern cpuop_func op_4668_22_ff; +extern cpuop_func op_4670_22_nf; +extern cpuop_func op_4670_22_ff; +extern cpuop_func op_4678_22_nf; +extern cpuop_func op_4678_22_ff; +extern cpuop_func op_4679_22_nf; +extern cpuop_func op_4679_22_ff; +extern cpuop_func op_4680_22_nf; +extern cpuop_func op_4680_22_ff; +extern cpuop_func op_4690_22_nf; +extern cpuop_func op_4690_22_ff; +extern cpuop_func op_4698_22_nf; +extern cpuop_func op_4698_22_ff; +extern cpuop_func op_46a0_22_nf; +extern cpuop_func op_46a0_22_ff; +extern cpuop_func op_46a8_22_nf; +extern cpuop_func op_46a8_22_ff; +extern cpuop_func op_46b0_22_nf; +extern cpuop_func op_46b0_22_ff; +extern cpuop_func op_46b8_22_nf; +extern cpuop_func op_46b8_22_ff; +extern cpuop_func op_46b9_22_nf; +extern cpuop_func op_46b9_22_ff; +extern cpuop_func op_46c0_22_nf; +extern cpuop_func op_46c0_22_ff; +extern cpuop_func op_46d0_22_nf; +extern cpuop_func op_46d0_22_ff; +extern cpuop_func op_46d8_22_nf; +extern cpuop_func op_46d8_22_ff; +extern cpuop_func op_46e0_22_nf; +extern cpuop_func op_46e0_22_ff; +extern cpuop_func op_46e8_22_nf; +extern cpuop_func op_46e8_22_ff; +extern cpuop_func op_46f0_22_nf; +extern cpuop_func op_46f0_22_ff; +extern cpuop_func op_46f8_22_nf; +extern cpuop_func op_46f8_22_ff; +extern cpuop_func op_46f9_22_nf; +extern cpuop_func op_46f9_22_ff; +extern cpuop_func op_46fa_22_nf; +extern cpuop_func op_46fa_22_ff; +extern cpuop_func op_46fb_22_nf; +extern cpuop_func op_46fb_22_ff; +extern cpuop_func op_46fc_22_nf; +extern cpuop_func op_46fc_22_ff; +extern cpuop_func op_4800_22_nf; +extern cpuop_func op_4800_22_ff; +extern cpuop_func op_4808_22_nf; +extern cpuop_func op_4808_22_ff; +extern cpuop_func op_4810_22_nf; +extern cpuop_func op_4810_22_ff; +extern cpuop_func op_4818_22_nf; +extern cpuop_func op_4818_22_ff; +extern cpuop_func op_4820_22_nf; +extern cpuop_func op_4820_22_ff; +extern cpuop_func op_4828_22_nf; +extern cpuop_func op_4828_22_ff; +extern cpuop_func op_4830_22_nf; +extern cpuop_func op_4830_22_ff; +extern cpuop_func op_4838_22_nf; +extern cpuop_func op_4838_22_ff; +extern cpuop_func op_4839_22_nf; +extern cpuop_func op_4839_22_ff; +extern cpuop_func op_4840_22_nf; +extern cpuop_func op_4840_22_ff; +extern cpuop_func op_4848_22_nf; +extern cpuop_func op_4848_22_ff; +extern cpuop_func op_4850_22_nf; +extern cpuop_func op_4850_22_ff; +extern cpuop_func op_4868_22_nf; +extern cpuop_func op_4868_22_ff; +extern cpuop_func op_4870_22_nf; +extern cpuop_func op_4870_22_ff; +extern cpuop_func op_4878_22_nf; +extern cpuop_func op_4878_22_ff; +extern cpuop_func op_4879_22_nf; +extern cpuop_func op_4879_22_ff; +extern cpuop_func op_487a_22_nf; +extern cpuop_func op_487a_22_ff; +extern cpuop_func op_487b_22_nf; +extern cpuop_func op_487b_22_ff; +extern cpuop_func op_4880_22_nf; +extern cpuop_func op_4880_22_ff; +extern cpuop_func op_4890_22_nf; +extern cpuop_func op_4890_22_ff; +extern cpuop_func op_48a0_22_nf; +extern cpuop_func op_48a0_22_ff; +extern cpuop_func op_48a8_22_nf; +extern cpuop_func op_48a8_22_ff; +extern cpuop_func op_48b0_22_nf; +extern cpuop_func op_48b0_22_ff; +extern cpuop_func op_48b8_22_nf; +extern cpuop_func op_48b8_22_ff; +extern cpuop_func op_48b9_22_nf; +extern cpuop_func op_48b9_22_ff; +extern cpuop_func op_48c0_22_nf; +extern cpuop_func op_48c0_22_ff; +extern cpuop_func op_48d0_22_nf; +extern cpuop_func op_48d0_22_ff; +extern cpuop_func op_48e0_22_nf; +extern cpuop_func op_48e0_22_ff; +extern cpuop_func op_48e8_22_nf; +extern cpuop_func op_48e8_22_ff; +extern cpuop_func op_48f0_22_nf; +extern cpuop_func op_48f0_22_ff; +extern cpuop_func op_48f8_22_nf; +extern cpuop_func op_48f8_22_ff; +extern cpuop_func op_48f9_22_nf; +extern cpuop_func op_48f9_22_ff; +extern cpuop_func op_49c0_22_nf; +extern cpuop_func op_49c0_22_ff; +extern cpuop_func op_4a00_22_nf; +extern cpuop_func op_4a00_22_ff; +extern cpuop_func op_4a10_22_nf; +extern cpuop_func op_4a10_22_ff; +extern cpuop_func op_4a18_22_nf; +extern cpuop_func op_4a18_22_ff; +extern cpuop_func op_4a20_22_nf; +extern cpuop_func op_4a20_22_ff; +extern cpuop_func op_4a28_22_nf; +extern cpuop_func op_4a28_22_ff; +extern cpuop_func op_4a30_22_nf; +extern cpuop_func op_4a30_22_ff; +extern cpuop_func op_4a38_22_nf; +extern cpuop_func op_4a38_22_ff; +extern cpuop_func op_4a39_22_nf; +extern cpuop_func op_4a39_22_ff; +extern cpuop_func op_4a3a_22_nf; +extern cpuop_func op_4a3a_22_ff; +extern cpuop_func op_4a3b_22_nf; +extern cpuop_func op_4a3b_22_ff; +extern cpuop_func op_4a3c_22_nf; +extern cpuop_func op_4a3c_22_ff; +extern cpuop_func op_4a40_22_nf; +extern cpuop_func op_4a40_22_ff; +extern cpuop_func op_4a48_22_nf; +extern cpuop_func op_4a48_22_ff; +extern cpuop_func op_4a50_22_nf; +extern cpuop_func op_4a50_22_ff; +extern cpuop_func op_4a58_22_nf; +extern cpuop_func op_4a58_22_ff; +extern cpuop_func op_4a60_22_nf; +extern cpuop_func op_4a60_22_ff; +extern cpuop_func op_4a68_22_nf; +extern cpuop_func op_4a68_22_ff; +extern cpuop_func op_4a70_22_nf; +extern cpuop_func op_4a70_22_ff; +extern cpuop_func op_4a78_22_nf; +extern cpuop_func op_4a78_22_ff; +extern cpuop_func op_4a79_22_nf; +extern cpuop_func op_4a79_22_ff; +extern cpuop_func op_4a7a_22_nf; +extern cpuop_func op_4a7a_22_ff; +extern cpuop_func op_4a7b_22_nf; +extern cpuop_func op_4a7b_22_ff; +extern cpuop_func op_4a7c_22_nf; +extern cpuop_func op_4a7c_22_ff; +extern cpuop_func op_4a80_22_nf; +extern cpuop_func op_4a80_22_ff; +extern cpuop_func op_4a88_22_nf; +extern cpuop_func op_4a88_22_ff; +extern cpuop_func op_4a90_22_nf; +extern cpuop_func op_4a90_22_ff; +extern cpuop_func op_4a98_22_nf; +extern cpuop_func op_4a98_22_ff; +extern cpuop_func op_4aa0_22_nf; +extern cpuop_func op_4aa0_22_ff; +extern cpuop_func op_4aa8_22_nf; +extern cpuop_func op_4aa8_22_ff; +extern cpuop_func op_4ab0_22_nf; +extern cpuop_func op_4ab0_22_ff; +extern cpuop_func op_4ab8_22_nf; +extern cpuop_func op_4ab8_22_ff; +extern cpuop_func op_4ab9_22_nf; +extern cpuop_func op_4ab9_22_ff; +extern cpuop_func op_4aba_22_nf; +extern cpuop_func op_4aba_22_ff; +extern cpuop_func op_4abb_22_nf; +extern cpuop_func op_4abb_22_ff; +extern cpuop_func op_4abc_22_nf; +extern cpuop_func op_4abc_22_ff; +extern cpuop_func op_4ac0_22_nf; +extern cpuop_func op_4ac0_22_ff; +extern cpuop_func op_4ad0_22_nf; +extern cpuop_func op_4ad0_22_ff; +extern cpuop_func op_4ad8_22_nf; +extern cpuop_func op_4ad8_22_ff; +extern cpuop_func op_4ae0_22_nf; +extern cpuop_func op_4ae0_22_ff; +extern cpuop_func op_4ae8_22_nf; +extern cpuop_func op_4ae8_22_ff; +extern cpuop_func op_4af0_22_nf; +extern cpuop_func op_4af0_22_ff; +extern cpuop_func op_4af8_22_nf; +extern cpuop_func op_4af8_22_ff; +extern cpuop_func op_4af9_22_nf; +extern cpuop_func op_4af9_22_ff; +extern cpuop_func op_4c00_22_nf; +extern cpuop_func op_4c00_22_ff; +extern cpuop_func op_4c10_22_nf; +extern cpuop_func op_4c10_22_ff; +extern cpuop_func op_4c18_22_nf; +extern cpuop_func op_4c18_22_ff; +extern cpuop_func op_4c20_22_nf; +extern cpuop_func op_4c20_22_ff; +extern cpuop_func op_4c28_22_nf; +extern cpuop_func op_4c28_22_ff; +extern cpuop_func op_4c30_22_nf; +extern cpuop_func op_4c30_22_ff; +extern cpuop_func op_4c38_22_nf; +extern cpuop_func op_4c38_22_ff; +extern cpuop_func op_4c39_22_nf; +extern cpuop_func op_4c39_22_ff; +extern cpuop_func op_4c3a_22_nf; +extern cpuop_func op_4c3a_22_ff; +extern cpuop_func op_4c3b_22_nf; +extern cpuop_func op_4c3b_22_ff; +extern cpuop_func op_4c3c_22_nf; +extern cpuop_func op_4c3c_22_ff; +extern cpuop_func op_4c40_22_nf; +extern cpuop_func op_4c40_22_ff; +extern cpuop_func op_4c50_22_nf; +extern cpuop_func op_4c50_22_ff; +extern cpuop_func op_4c58_22_nf; +extern cpuop_func op_4c58_22_ff; +extern cpuop_func op_4c60_22_nf; +extern cpuop_func op_4c60_22_ff; +extern cpuop_func op_4c68_22_nf; +extern cpuop_func op_4c68_22_ff; +extern cpuop_func op_4c70_22_nf; +extern cpuop_func op_4c70_22_ff; +extern cpuop_func op_4c78_22_nf; +extern cpuop_func op_4c78_22_ff; +extern cpuop_func op_4c79_22_nf; +extern cpuop_func op_4c79_22_ff; +extern cpuop_func op_4c7a_22_nf; +extern cpuop_func op_4c7a_22_ff; +extern cpuop_func op_4c7b_22_nf; +extern cpuop_func op_4c7b_22_ff; +extern cpuop_func op_4c7c_22_nf; +extern cpuop_func op_4c7c_22_ff; +extern cpuop_func op_4c90_22_nf; +extern cpuop_func op_4c90_22_ff; +extern cpuop_func op_4c98_22_nf; +extern cpuop_func op_4c98_22_ff; +extern cpuop_func op_4ca8_22_nf; +extern cpuop_func op_4ca8_22_ff; +extern cpuop_func op_4cb0_22_nf; +extern cpuop_func op_4cb0_22_ff; +extern cpuop_func op_4cb8_22_nf; +extern cpuop_func op_4cb8_22_ff; +extern cpuop_func op_4cb9_22_nf; +extern cpuop_func op_4cb9_22_ff; +extern cpuop_func op_4cba_22_nf; +extern cpuop_func op_4cba_22_ff; +extern cpuop_func op_4cbb_22_nf; +extern cpuop_func op_4cbb_22_ff; +extern cpuop_func op_4cd0_22_nf; +extern cpuop_func op_4cd0_22_ff; +extern cpuop_func op_4cd8_22_nf; +extern cpuop_func op_4cd8_22_ff; +extern cpuop_func op_4ce8_22_nf; +extern cpuop_func op_4ce8_22_ff; +extern cpuop_func op_4cf0_22_nf; +extern cpuop_func op_4cf0_22_ff; +extern cpuop_func op_4cf8_22_nf; +extern cpuop_func op_4cf8_22_ff; +extern cpuop_func op_4cf9_22_nf; +extern cpuop_func op_4cf9_22_ff; +extern cpuop_func op_4cfa_22_nf; +extern cpuop_func op_4cfa_22_ff; +extern cpuop_func op_4cfb_22_nf; +extern cpuop_func op_4cfb_22_ff; +extern cpuop_func op_4e40_22_nf; +extern cpuop_func op_4e40_22_ff; +extern cpuop_func op_4e50_22_nf; +extern cpuop_func op_4e50_22_ff; +extern cpuop_func op_4e58_22_nf; +extern cpuop_func op_4e58_22_ff; +extern cpuop_func op_4e60_22_nf; +extern cpuop_func op_4e60_22_ff; +extern cpuop_func op_4e68_22_nf; +extern cpuop_func op_4e68_22_ff; +extern cpuop_func op_4e70_22_nf; +extern cpuop_func op_4e70_22_ff; +extern cpuop_func op_4e71_22_nf; +extern cpuop_func op_4e71_22_ff; +extern cpuop_func op_4e72_22_nf; +extern cpuop_func op_4e72_22_ff; +extern cpuop_func op_4e73_22_nf; +extern cpuop_func op_4e73_22_ff; +extern cpuop_func op_4e74_22_nf; +extern cpuop_func op_4e74_22_ff; +extern cpuop_func op_4e75_22_nf; +extern cpuop_func op_4e75_22_ff; +extern cpuop_func op_4e76_22_nf; +extern cpuop_func op_4e76_22_ff; +extern cpuop_func op_4e77_22_nf; +extern cpuop_func op_4e77_22_ff; +extern cpuop_func op_4e7a_22_nf; +extern cpuop_func op_4e7a_22_ff; +extern cpuop_func op_4e7b_22_nf; +extern cpuop_func op_4e7b_22_ff; +extern cpuop_func op_4e90_22_nf; +extern cpuop_func op_4e90_22_ff; +extern cpuop_func op_4ea8_22_nf; +extern cpuop_func op_4ea8_22_ff; +extern cpuop_func op_4eb0_22_nf; +extern cpuop_func op_4eb0_22_ff; +extern cpuop_func op_4eb8_22_nf; +extern cpuop_func op_4eb8_22_ff; +extern cpuop_func op_4eb9_22_nf; +extern cpuop_func op_4eb9_22_ff; +extern cpuop_func op_4eba_22_nf; +extern cpuop_func op_4eba_22_ff; +extern cpuop_func op_4ebb_22_nf; +extern cpuop_func op_4ebb_22_ff; +extern cpuop_func op_4ed0_22_nf; +extern cpuop_func op_4ed0_22_ff; +extern cpuop_func op_4ee8_22_nf; +extern cpuop_func op_4ee8_22_ff; +extern cpuop_func op_4ef0_22_nf; +extern cpuop_func op_4ef0_22_ff; +extern cpuop_func op_4ef8_22_nf; +extern cpuop_func op_4ef8_22_ff; +extern cpuop_func op_4ef9_22_nf; +extern cpuop_func op_4ef9_22_ff; +extern cpuop_func op_4efa_22_nf; +extern cpuop_func op_4efa_22_ff; +extern cpuop_func op_4efb_22_nf; +extern cpuop_func op_4efb_22_ff; +extern cpuop_func op_5000_22_nf; +extern cpuop_func op_5000_22_ff; +extern cpuop_func op_5010_22_nf; +extern cpuop_func op_5010_22_ff; +extern cpuop_func op_5018_22_nf; +extern cpuop_func op_5018_22_ff; +extern cpuop_func op_5020_22_nf; +extern cpuop_func op_5020_22_ff; +extern cpuop_func op_5028_22_nf; +extern cpuop_func op_5028_22_ff; +extern cpuop_func op_5030_22_nf; +extern cpuop_func op_5030_22_ff; +extern cpuop_func op_5038_22_nf; +extern cpuop_func op_5038_22_ff; +extern cpuop_func op_5039_22_nf; +extern cpuop_func op_5039_22_ff; +extern cpuop_func op_5040_22_nf; +extern cpuop_func op_5040_22_ff; +extern cpuop_func op_5048_22_nf; +extern cpuop_func op_5048_22_ff; +extern cpuop_func op_5050_22_nf; +extern cpuop_func op_5050_22_ff; +extern cpuop_func op_5058_22_nf; +extern cpuop_func op_5058_22_ff; +extern cpuop_func op_5060_22_nf; +extern cpuop_func op_5060_22_ff; +extern cpuop_func op_5068_22_nf; +extern cpuop_func op_5068_22_ff; +extern cpuop_func op_5070_22_nf; +extern cpuop_func op_5070_22_ff; +extern cpuop_func op_5078_22_nf; +extern cpuop_func op_5078_22_ff; +extern cpuop_func op_5079_22_nf; +extern cpuop_func op_5079_22_ff; +extern cpuop_func op_5080_22_nf; +extern cpuop_func op_5080_22_ff; +extern cpuop_func op_5088_22_nf; +extern cpuop_func op_5088_22_ff; +extern cpuop_func op_5090_22_nf; +extern cpuop_func op_5090_22_ff; +extern cpuop_func op_5098_22_nf; +extern cpuop_func op_5098_22_ff; +extern cpuop_func op_50a0_22_nf; +extern cpuop_func op_50a0_22_ff; +extern cpuop_func op_50a8_22_nf; +extern cpuop_func op_50a8_22_ff; +extern cpuop_func op_50b0_22_nf; +extern cpuop_func op_50b0_22_ff; +extern cpuop_func op_50b8_22_nf; +extern cpuop_func op_50b8_22_ff; +extern cpuop_func op_50b9_22_nf; +extern cpuop_func op_50b9_22_ff; +extern cpuop_func op_50c0_22_nf; +extern cpuop_func op_50c0_22_ff; +extern cpuop_func op_50c8_22_nf; +extern cpuop_func op_50c8_22_ff; +extern cpuop_func op_50d0_22_nf; +extern cpuop_func op_50d0_22_ff; +extern cpuop_func op_50d8_22_nf; +extern cpuop_func op_50d8_22_ff; +extern cpuop_func op_50e0_22_nf; +extern cpuop_func op_50e0_22_ff; +extern cpuop_func op_50e8_22_nf; +extern cpuop_func op_50e8_22_ff; +extern cpuop_func op_50f0_22_nf; +extern cpuop_func op_50f0_22_ff; +extern cpuop_func op_50f8_22_nf; +extern cpuop_func op_50f8_22_ff; +extern cpuop_func op_50f9_22_nf; +extern cpuop_func op_50f9_22_ff; +extern cpuop_func op_50fa_22_nf; +extern cpuop_func op_50fa_22_ff; +extern cpuop_func op_50fb_22_nf; +extern cpuop_func op_50fb_22_ff; +extern cpuop_func op_50fc_22_nf; +extern cpuop_func op_50fc_22_ff; +extern cpuop_func op_5100_22_nf; +extern cpuop_func op_5100_22_ff; +extern cpuop_func op_5110_22_nf; +extern cpuop_func op_5110_22_ff; +extern cpuop_func op_5118_22_nf; +extern cpuop_func op_5118_22_ff; +extern cpuop_func op_5120_22_nf; +extern cpuop_func op_5120_22_ff; +extern cpuop_func op_5128_22_nf; +extern cpuop_func op_5128_22_ff; +extern cpuop_func op_5130_22_nf; +extern cpuop_func op_5130_22_ff; +extern cpuop_func op_5138_22_nf; +extern cpuop_func op_5138_22_ff; +extern cpuop_func op_5139_22_nf; +extern cpuop_func op_5139_22_ff; +extern cpuop_func op_5140_22_nf; +extern cpuop_func op_5140_22_ff; +extern cpuop_func op_5148_22_nf; +extern cpuop_func op_5148_22_ff; +extern cpuop_func op_5150_22_nf; +extern cpuop_func op_5150_22_ff; +extern cpuop_func op_5158_22_nf; +extern cpuop_func op_5158_22_ff; +extern cpuop_func op_5160_22_nf; +extern cpuop_func op_5160_22_ff; +extern cpuop_func op_5168_22_nf; +extern cpuop_func op_5168_22_ff; +extern cpuop_func op_5170_22_nf; +extern cpuop_func op_5170_22_ff; +extern cpuop_func op_5178_22_nf; +extern cpuop_func op_5178_22_ff; +extern cpuop_func op_5179_22_nf; +extern cpuop_func op_5179_22_ff; +extern cpuop_func op_5180_22_nf; +extern cpuop_func op_5180_22_ff; +extern cpuop_func op_5188_22_nf; +extern cpuop_func op_5188_22_ff; +extern cpuop_func op_5190_22_nf; +extern cpuop_func op_5190_22_ff; +extern cpuop_func op_5198_22_nf; +extern cpuop_func op_5198_22_ff; +extern cpuop_func op_51a0_22_nf; +extern cpuop_func op_51a0_22_ff; +extern cpuop_func op_51a8_22_nf; +extern cpuop_func op_51a8_22_ff; +extern cpuop_func op_51b0_22_nf; +extern cpuop_func op_51b0_22_ff; +extern cpuop_func op_51b8_22_nf; +extern cpuop_func op_51b8_22_ff; +extern cpuop_func op_51b9_22_nf; +extern cpuop_func op_51b9_22_ff; +extern cpuop_func op_51c0_22_nf; +extern cpuop_func op_51c0_22_ff; +extern cpuop_func op_51c8_22_nf; +extern cpuop_func op_51c8_22_ff; +extern cpuop_func op_51d0_22_nf; +extern cpuop_func op_51d0_22_ff; +extern cpuop_func op_51d8_22_nf; +extern cpuop_func op_51d8_22_ff; +extern cpuop_func op_51e0_22_nf; +extern cpuop_func op_51e0_22_ff; +extern cpuop_func op_51e8_22_nf; +extern cpuop_func op_51e8_22_ff; +extern cpuop_func op_51f0_22_nf; +extern cpuop_func op_51f0_22_ff; +extern cpuop_func op_51f8_22_nf; +extern cpuop_func op_51f8_22_ff; +extern cpuop_func op_51f9_22_nf; +extern cpuop_func op_51f9_22_ff; +extern cpuop_func op_51fa_22_nf; +extern cpuop_func op_51fa_22_ff; +extern cpuop_func op_51fb_22_nf; +extern cpuop_func op_51fb_22_ff; +extern cpuop_func op_51fc_22_nf; +extern cpuop_func op_51fc_22_ff; +extern cpuop_func op_52c0_22_nf; +extern cpuop_func op_52c0_22_ff; +extern cpuop_func op_52c8_22_nf; +extern cpuop_func op_52c8_22_ff; +extern cpuop_func op_52d0_22_nf; +extern cpuop_func op_52d0_22_ff; +extern cpuop_func op_52d8_22_nf; +extern cpuop_func op_52d8_22_ff; +extern cpuop_func op_52e0_22_nf; +extern cpuop_func op_52e0_22_ff; +extern cpuop_func op_52e8_22_nf; +extern cpuop_func op_52e8_22_ff; +extern cpuop_func op_52f0_22_nf; +extern cpuop_func op_52f0_22_ff; +extern cpuop_func op_52f8_22_nf; +extern cpuop_func op_52f8_22_ff; +extern cpuop_func op_52f9_22_nf; +extern cpuop_func op_52f9_22_ff; +extern cpuop_func op_52fa_22_nf; +extern cpuop_func op_52fa_22_ff; +extern cpuop_func op_52fb_22_nf; +extern cpuop_func op_52fb_22_ff; +extern cpuop_func op_52fc_22_nf; +extern cpuop_func op_52fc_22_ff; +extern cpuop_func op_53c0_22_nf; +extern cpuop_func op_53c0_22_ff; +extern cpuop_func op_53c8_22_nf; +extern cpuop_func op_53c8_22_ff; +extern cpuop_func op_53d0_22_nf; +extern cpuop_func op_53d0_22_ff; +extern cpuop_func op_53d8_22_nf; +extern cpuop_func op_53d8_22_ff; +extern cpuop_func op_53e0_22_nf; +extern cpuop_func op_53e0_22_ff; +extern cpuop_func op_53e8_22_nf; +extern cpuop_func op_53e8_22_ff; +extern cpuop_func op_53f0_22_nf; +extern cpuop_func op_53f0_22_ff; +extern cpuop_func op_53f8_22_nf; +extern cpuop_func op_53f8_22_ff; +extern cpuop_func op_53f9_22_nf; +extern cpuop_func op_53f9_22_ff; +extern cpuop_func op_53fa_22_nf; +extern cpuop_func op_53fa_22_ff; +extern cpuop_func op_53fb_22_nf; +extern cpuop_func op_53fb_22_ff; +extern cpuop_func op_53fc_22_nf; +extern cpuop_func op_53fc_22_ff; +extern cpuop_func op_54c0_22_nf; +extern cpuop_func op_54c0_22_ff; +extern cpuop_func op_54c8_22_nf; +extern cpuop_func op_54c8_22_ff; +extern cpuop_func op_54d0_22_nf; +extern cpuop_func op_54d0_22_ff; +extern cpuop_func op_54d8_22_nf; +extern cpuop_func op_54d8_22_ff; +extern cpuop_func op_54e0_22_nf; +extern cpuop_func op_54e0_22_ff; +extern cpuop_func op_54e8_22_nf; +extern cpuop_func op_54e8_22_ff; +extern cpuop_func op_54f0_22_nf; +extern cpuop_func op_54f0_22_ff; +extern cpuop_func op_54f8_22_nf; +extern cpuop_func op_54f8_22_ff; +extern cpuop_func op_54f9_22_nf; +extern cpuop_func op_54f9_22_ff; +extern cpuop_func op_54fa_22_nf; +extern cpuop_func op_54fa_22_ff; +extern cpuop_func op_54fb_22_nf; +extern cpuop_func op_54fb_22_ff; +extern cpuop_func op_54fc_22_nf; +extern cpuop_func op_54fc_22_ff; +extern cpuop_func op_55c0_22_nf; +extern cpuop_func op_55c0_22_ff; +extern cpuop_func op_55c8_22_nf; +extern cpuop_func op_55c8_22_ff; +extern cpuop_func op_55d0_22_nf; +extern cpuop_func op_55d0_22_ff; +extern cpuop_func op_55d8_22_nf; +extern cpuop_func op_55d8_22_ff; +extern cpuop_func op_55e0_22_nf; +extern cpuop_func op_55e0_22_ff; +extern cpuop_func op_55e8_22_nf; +extern cpuop_func op_55e8_22_ff; +extern cpuop_func op_55f0_22_nf; +extern cpuop_func op_55f0_22_ff; +extern cpuop_func op_55f8_22_nf; +extern cpuop_func op_55f8_22_ff; +extern cpuop_func op_55f9_22_nf; +extern cpuop_func op_55f9_22_ff; +extern cpuop_func op_55fa_22_nf; +extern cpuop_func op_55fa_22_ff; +extern cpuop_func op_55fb_22_nf; +extern cpuop_func op_55fb_22_ff; +extern cpuop_func op_55fc_22_nf; +extern cpuop_func op_55fc_22_ff; +extern cpuop_func op_56c0_22_nf; +extern cpuop_func op_56c0_22_ff; +extern cpuop_func op_56c8_22_nf; +extern cpuop_func op_56c8_22_ff; +extern cpuop_func op_56d0_22_nf; +extern cpuop_func op_56d0_22_ff; +extern cpuop_func op_56d8_22_nf; +extern cpuop_func op_56d8_22_ff; +extern cpuop_func op_56e0_22_nf; +extern cpuop_func op_56e0_22_ff; +extern cpuop_func op_56e8_22_nf; +extern cpuop_func op_56e8_22_ff; +extern cpuop_func op_56f0_22_nf; +extern cpuop_func op_56f0_22_ff; +extern cpuop_func op_56f8_22_nf; +extern cpuop_func op_56f8_22_ff; +extern cpuop_func op_56f9_22_nf; +extern cpuop_func op_56f9_22_ff; +extern cpuop_func op_56fa_22_nf; +extern cpuop_func op_56fa_22_ff; +extern cpuop_func op_56fb_22_nf; +extern cpuop_func op_56fb_22_ff; +extern cpuop_func op_56fc_22_nf; +extern cpuop_func op_56fc_22_ff; +extern cpuop_func op_57c0_22_nf; +extern cpuop_func op_57c0_22_ff; +extern cpuop_func op_57c8_22_nf; +extern cpuop_func op_57c8_22_ff; +extern cpuop_func op_57d0_22_nf; +extern cpuop_func op_57d0_22_ff; +extern cpuop_func op_57d8_22_nf; +extern cpuop_func op_57d8_22_ff; +extern cpuop_func op_57e0_22_nf; +extern cpuop_func op_57e0_22_ff; +extern cpuop_func op_57e8_22_nf; +extern cpuop_func op_57e8_22_ff; +extern cpuop_func op_57f0_22_nf; +extern cpuop_func op_57f0_22_ff; +extern cpuop_func op_57f8_22_nf; +extern cpuop_func op_57f8_22_ff; +extern cpuop_func op_57f9_22_nf; +extern cpuop_func op_57f9_22_ff; +extern cpuop_func op_57fa_22_nf; +extern cpuop_func op_57fa_22_ff; +extern cpuop_func op_57fb_22_nf; +extern cpuop_func op_57fb_22_ff; +extern cpuop_func op_57fc_22_nf; +extern cpuop_func op_57fc_22_ff; +extern cpuop_func op_58c0_22_nf; +extern cpuop_func op_58c0_22_ff; +extern cpuop_func op_58c8_22_nf; +extern cpuop_func op_58c8_22_ff; +extern cpuop_func op_58d0_22_nf; +extern cpuop_func op_58d0_22_ff; +extern cpuop_func op_58d8_22_nf; +extern cpuop_func op_58d8_22_ff; +extern cpuop_func op_58e0_22_nf; +extern cpuop_func op_58e0_22_ff; +extern cpuop_func op_58e8_22_nf; +extern cpuop_func op_58e8_22_ff; +extern cpuop_func op_58f0_22_nf; +extern cpuop_func op_58f0_22_ff; +extern cpuop_func op_58f8_22_nf; +extern cpuop_func op_58f8_22_ff; +extern cpuop_func op_58f9_22_nf; +extern cpuop_func op_58f9_22_ff; +extern cpuop_func op_58fa_22_nf; +extern cpuop_func op_58fa_22_ff; +extern cpuop_func op_58fb_22_nf; +extern cpuop_func op_58fb_22_ff; +extern cpuop_func op_58fc_22_nf; +extern cpuop_func op_58fc_22_ff; +extern cpuop_func op_59c0_22_nf; +extern cpuop_func op_59c0_22_ff; +extern cpuop_func op_59c8_22_nf; +extern cpuop_func op_59c8_22_ff; +extern cpuop_func op_59d0_22_nf; +extern cpuop_func op_59d0_22_ff; +extern cpuop_func op_59d8_22_nf; +extern cpuop_func op_59d8_22_ff; +extern cpuop_func op_59e0_22_nf; +extern cpuop_func op_59e0_22_ff; +extern cpuop_func op_59e8_22_nf; +extern cpuop_func op_59e8_22_ff; +extern cpuop_func op_59f0_22_nf; +extern cpuop_func op_59f0_22_ff; +extern cpuop_func op_59f8_22_nf; +extern cpuop_func op_59f8_22_ff; +extern cpuop_func op_59f9_22_nf; +extern cpuop_func op_59f9_22_ff; +extern cpuop_func op_59fa_22_nf; +extern cpuop_func op_59fa_22_ff; +extern cpuop_func op_59fb_22_nf; +extern cpuop_func op_59fb_22_ff; +extern cpuop_func op_59fc_22_nf; +extern cpuop_func op_59fc_22_ff; +extern cpuop_func op_5ac0_22_nf; +extern cpuop_func op_5ac0_22_ff; +extern cpuop_func op_5ac8_22_nf; +extern cpuop_func op_5ac8_22_ff; +extern cpuop_func op_5ad0_22_nf; +extern cpuop_func op_5ad0_22_ff; +extern cpuop_func op_5ad8_22_nf; +extern cpuop_func op_5ad8_22_ff; +extern cpuop_func op_5ae0_22_nf; +extern cpuop_func op_5ae0_22_ff; +extern cpuop_func op_5ae8_22_nf; +extern cpuop_func op_5ae8_22_ff; +extern cpuop_func op_5af0_22_nf; +extern cpuop_func op_5af0_22_ff; +extern cpuop_func op_5af8_22_nf; +extern cpuop_func op_5af8_22_ff; +extern cpuop_func op_5af9_22_nf; +extern cpuop_func op_5af9_22_ff; +extern cpuop_func op_5afa_22_nf; +extern cpuop_func op_5afa_22_ff; +extern cpuop_func op_5afb_22_nf; +extern cpuop_func op_5afb_22_ff; +extern cpuop_func op_5afc_22_nf; +extern cpuop_func op_5afc_22_ff; +extern cpuop_func op_5bc0_22_nf; +extern cpuop_func op_5bc0_22_ff; +extern cpuop_func op_5bc8_22_nf; +extern cpuop_func op_5bc8_22_ff; +extern cpuop_func op_5bd0_22_nf; +extern cpuop_func op_5bd0_22_ff; +extern cpuop_func op_5bd8_22_nf; +extern cpuop_func op_5bd8_22_ff; +extern cpuop_func op_5be0_22_nf; +extern cpuop_func op_5be0_22_ff; +extern cpuop_func op_5be8_22_nf; +extern cpuop_func op_5be8_22_ff; +extern cpuop_func op_5bf0_22_nf; +extern cpuop_func op_5bf0_22_ff; +extern cpuop_func op_5bf8_22_nf; +extern cpuop_func op_5bf8_22_ff; +extern cpuop_func op_5bf9_22_nf; +extern cpuop_func op_5bf9_22_ff; +extern cpuop_func op_5bfa_22_nf; +extern cpuop_func op_5bfa_22_ff; +extern cpuop_func op_5bfb_22_nf; +extern cpuop_func op_5bfb_22_ff; +extern cpuop_func op_5bfc_22_nf; +extern cpuop_func op_5bfc_22_ff; +extern cpuop_func op_5cc0_22_nf; +extern cpuop_func op_5cc0_22_ff; +extern cpuop_func op_5cc8_22_nf; +extern cpuop_func op_5cc8_22_ff; +extern cpuop_func op_5cd0_22_nf; +extern cpuop_func op_5cd0_22_ff; +extern cpuop_func op_5cd8_22_nf; +extern cpuop_func op_5cd8_22_ff; +extern cpuop_func op_5ce0_22_nf; +extern cpuop_func op_5ce0_22_ff; +extern cpuop_func op_5ce8_22_nf; +extern cpuop_func op_5ce8_22_ff; +extern cpuop_func op_5cf0_22_nf; +extern cpuop_func op_5cf0_22_ff; +extern cpuop_func op_5cf8_22_nf; +extern cpuop_func op_5cf8_22_ff; +extern cpuop_func op_5cf9_22_nf; +extern cpuop_func op_5cf9_22_ff; +extern cpuop_func op_5cfa_22_nf; +extern cpuop_func op_5cfa_22_ff; +extern cpuop_func op_5cfb_22_nf; +extern cpuop_func op_5cfb_22_ff; +extern cpuop_func op_5cfc_22_nf; +extern cpuop_func op_5cfc_22_ff; +extern cpuop_func op_5dc0_22_nf; +extern cpuop_func op_5dc0_22_ff; +extern cpuop_func op_5dc8_22_nf; +extern cpuop_func op_5dc8_22_ff; +extern cpuop_func op_5dd0_22_nf; +extern cpuop_func op_5dd0_22_ff; +extern cpuop_func op_5dd8_22_nf; +extern cpuop_func op_5dd8_22_ff; +extern cpuop_func op_5de0_22_nf; +extern cpuop_func op_5de0_22_ff; +extern cpuop_func op_5de8_22_nf; +extern cpuop_func op_5de8_22_ff; +extern cpuop_func op_5df0_22_nf; +extern cpuop_func op_5df0_22_ff; +extern cpuop_func op_5df8_22_nf; +extern cpuop_func op_5df8_22_ff; +extern cpuop_func op_5df9_22_nf; +extern cpuop_func op_5df9_22_ff; +extern cpuop_func op_5dfa_22_nf; +extern cpuop_func op_5dfa_22_ff; +extern cpuop_func op_5dfb_22_nf; +extern cpuop_func op_5dfb_22_ff; +extern cpuop_func op_5dfc_22_nf; +extern cpuop_func op_5dfc_22_ff; +extern cpuop_func op_5ec0_22_nf; +extern cpuop_func op_5ec0_22_ff; +extern cpuop_func op_5ec8_22_nf; +extern cpuop_func op_5ec8_22_ff; +extern cpuop_func op_5ed0_22_nf; +extern cpuop_func op_5ed0_22_ff; +extern cpuop_func op_5ed8_22_nf; +extern cpuop_func op_5ed8_22_ff; +extern cpuop_func op_5ee0_22_nf; +extern cpuop_func op_5ee0_22_ff; +extern cpuop_func op_5ee8_22_nf; +extern cpuop_func op_5ee8_22_ff; +extern cpuop_func op_5ef0_22_nf; +extern cpuop_func op_5ef0_22_ff; +extern cpuop_func op_5ef8_22_nf; +extern cpuop_func op_5ef8_22_ff; +extern cpuop_func op_5ef9_22_nf; +extern cpuop_func op_5ef9_22_ff; +extern cpuop_func op_5efa_22_nf; +extern cpuop_func op_5efa_22_ff; +extern cpuop_func op_5efb_22_nf; +extern cpuop_func op_5efb_22_ff; +extern cpuop_func op_5efc_22_nf; +extern cpuop_func op_5efc_22_ff; +extern cpuop_func op_5fc0_22_nf; +extern cpuop_func op_5fc0_22_ff; +extern cpuop_func op_5fc8_22_nf; +extern cpuop_func op_5fc8_22_ff; +extern cpuop_func op_5fd0_22_nf; +extern cpuop_func op_5fd0_22_ff; +extern cpuop_func op_5fd8_22_nf; +extern cpuop_func op_5fd8_22_ff; +extern cpuop_func op_5fe0_22_nf; +extern cpuop_func op_5fe0_22_ff; +extern cpuop_func op_5fe8_22_nf; +extern cpuop_func op_5fe8_22_ff; +extern cpuop_func op_5ff0_22_nf; +extern cpuop_func op_5ff0_22_ff; +extern cpuop_func op_5ff8_22_nf; +extern cpuop_func op_5ff8_22_ff; +extern cpuop_func op_5ff9_22_nf; +extern cpuop_func op_5ff9_22_ff; +extern cpuop_func op_5ffa_22_nf; +extern cpuop_func op_5ffa_22_ff; +extern cpuop_func op_5ffb_22_nf; +extern cpuop_func op_5ffb_22_ff; +extern cpuop_func op_5ffc_22_nf; +extern cpuop_func op_5ffc_22_ff; +extern cpuop_func op_6000_22_nf; +extern cpuop_func op_6000_22_ff; +extern cpuop_func op_6001_22_nf; +extern cpuop_func op_6001_22_ff; +extern cpuop_func op_60ff_22_nf; +extern cpuop_func op_60ff_22_ff; +extern cpuop_func op_6100_22_nf; +extern cpuop_func op_6100_22_ff; +extern cpuop_func op_6101_22_nf; +extern cpuop_func op_6101_22_ff; +extern cpuop_func op_61ff_22_nf; +extern cpuop_func op_61ff_22_ff; +extern cpuop_func op_6200_22_nf; +extern cpuop_func op_6200_22_ff; +extern cpuop_func op_6201_22_nf; +extern cpuop_func op_6201_22_ff; +extern cpuop_func op_62ff_22_nf; +extern cpuop_func op_62ff_22_ff; +extern cpuop_func op_6300_22_nf; +extern cpuop_func op_6300_22_ff; +extern cpuop_func op_6301_22_nf; +extern cpuop_func op_6301_22_ff; +extern cpuop_func op_63ff_22_nf; +extern cpuop_func op_63ff_22_ff; +extern cpuop_func op_6400_22_nf; +extern cpuop_func op_6400_22_ff; +extern cpuop_func op_6401_22_nf; +extern cpuop_func op_6401_22_ff; +extern cpuop_func op_64ff_22_nf; +extern cpuop_func op_64ff_22_ff; +extern cpuop_func op_6500_22_nf; +extern cpuop_func op_6500_22_ff; +extern cpuop_func op_6501_22_nf; +extern cpuop_func op_6501_22_ff; +extern cpuop_func op_65ff_22_nf; +extern cpuop_func op_65ff_22_ff; +extern cpuop_func op_6600_22_nf; +extern cpuop_func op_6600_22_ff; +extern cpuop_func op_6601_22_nf; +extern cpuop_func op_6601_22_ff; +extern cpuop_func op_66ff_22_nf; +extern cpuop_func op_66ff_22_ff; +extern cpuop_func op_6700_22_nf; +extern cpuop_func op_6700_22_ff; +extern cpuop_func op_6701_22_nf; +extern cpuop_func op_6701_22_ff; +extern cpuop_func op_67ff_22_nf; +extern cpuop_func op_67ff_22_ff; +extern cpuop_func op_6800_22_nf; +extern cpuop_func op_6800_22_ff; +extern cpuop_func op_6801_22_nf; +extern cpuop_func op_6801_22_ff; +extern cpuop_func op_68ff_22_nf; +extern cpuop_func op_68ff_22_ff; +extern cpuop_func op_6900_22_nf; +extern cpuop_func op_6900_22_ff; +extern cpuop_func op_6901_22_nf; +extern cpuop_func op_6901_22_ff; +extern cpuop_func op_69ff_22_nf; +extern cpuop_func op_69ff_22_ff; +extern cpuop_func op_6a00_22_nf; +extern cpuop_func op_6a00_22_ff; +extern cpuop_func op_6a01_22_nf; +extern cpuop_func op_6a01_22_ff; +extern cpuop_func op_6aff_22_nf; +extern cpuop_func op_6aff_22_ff; +extern cpuop_func op_6b00_22_nf; +extern cpuop_func op_6b00_22_ff; +extern cpuop_func op_6b01_22_nf; +extern cpuop_func op_6b01_22_ff; +extern cpuop_func op_6bff_22_nf; +extern cpuop_func op_6bff_22_ff; +extern cpuop_func op_6c00_22_nf; +extern cpuop_func op_6c00_22_ff; +extern cpuop_func op_6c01_22_nf; +extern cpuop_func op_6c01_22_ff; +extern cpuop_func op_6cff_22_nf; +extern cpuop_func op_6cff_22_ff; +extern cpuop_func op_6d00_22_nf; +extern cpuop_func op_6d00_22_ff; +extern cpuop_func op_6d01_22_nf; +extern cpuop_func op_6d01_22_ff; +extern cpuop_func op_6dff_22_nf; +extern cpuop_func op_6dff_22_ff; +extern cpuop_func op_6e00_22_nf; +extern cpuop_func op_6e00_22_ff; +extern cpuop_func op_6e01_22_nf; +extern cpuop_func op_6e01_22_ff; +extern cpuop_func op_6eff_22_nf; +extern cpuop_func op_6eff_22_ff; +extern cpuop_func op_6f00_22_nf; +extern cpuop_func op_6f00_22_ff; +extern cpuop_func op_6f01_22_nf; +extern cpuop_func op_6f01_22_ff; +extern cpuop_func op_6fff_22_nf; +extern cpuop_func op_6fff_22_ff; +extern cpuop_func op_7000_22_nf; +extern cpuop_func op_7000_22_ff; +extern cpuop_func op_8000_22_nf; +extern cpuop_func op_8000_22_ff; +extern cpuop_func op_8010_22_nf; +extern cpuop_func op_8010_22_ff; +extern cpuop_func op_8018_22_nf; +extern cpuop_func op_8018_22_ff; +extern cpuop_func op_8020_22_nf; +extern cpuop_func op_8020_22_ff; +extern cpuop_func op_8028_22_nf; +extern cpuop_func op_8028_22_ff; +extern cpuop_func op_8030_22_nf; +extern cpuop_func op_8030_22_ff; +extern cpuop_func op_8038_22_nf; +extern cpuop_func op_8038_22_ff; +extern cpuop_func op_8039_22_nf; +extern cpuop_func op_8039_22_ff; +extern cpuop_func op_803a_22_nf; +extern cpuop_func op_803a_22_ff; +extern cpuop_func op_803b_22_nf; +extern cpuop_func op_803b_22_ff; +extern cpuop_func op_803c_22_nf; +extern cpuop_func op_803c_22_ff; +extern cpuop_func op_8040_22_nf; +extern cpuop_func op_8040_22_ff; +extern cpuop_func op_8050_22_nf; +extern cpuop_func op_8050_22_ff; +extern cpuop_func op_8058_22_nf; +extern cpuop_func op_8058_22_ff; +extern cpuop_func op_8060_22_nf; +extern cpuop_func op_8060_22_ff; +extern cpuop_func op_8068_22_nf; +extern cpuop_func op_8068_22_ff; +extern cpuop_func op_8070_22_nf; +extern cpuop_func op_8070_22_ff; +extern cpuop_func op_8078_22_nf; +extern cpuop_func op_8078_22_ff; +extern cpuop_func op_8079_22_nf; +extern cpuop_func op_8079_22_ff; +extern cpuop_func op_807a_22_nf; +extern cpuop_func op_807a_22_ff; +extern cpuop_func op_807b_22_nf; +extern cpuop_func op_807b_22_ff; +extern cpuop_func op_807c_22_nf; +extern cpuop_func op_807c_22_ff; +extern cpuop_func op_8080_22_nf; +extern cpuop_func op_8080_22_ff; +extern cpuop_func op_8090_22_nf; +extern cpuop_func op_8090_22_ff; +extern cpuop_func op_8098_22_nf; +extern cpuop_func op_8098_22_ff; +extern cpuop_func op_80a0_22_nf; +extern cpuop_func op_80a0_22_ff; +extern cpuop_func op_80a8_22_nf; +extern cpuop_func op_80a8_22_ff; +extern cpuop_func op_80b0_22_nf; +extern cpuop_func op_80b0_22_ff; +extern cpuop_func op_80b8_22_nf; +extern cpuop_func op_80b8_22_ff; +extern cpuop_func op_80b9_22_nf; +extern cpuop_func op_80b9_22_ff; +extern cpuop_func op_80ba_22_nf; +extern cpuop_func op_80ba_22_ff; +extern cpuop_func op_80bb_22_nf; +extern cpuop_func op_80bb_22_ff; +extern cpuop_func op_80bc_22_nf; +extern cpuop_func op_80bc_22_ff; +extern cpuop_func op_80c0_22_nf; +extern cpuop_func op_80c0_22_ff; +extern cpuop_func op_80d0_22_nf; +extern cpuop_func op_80d0_22_ff; +extern cpuop_func op_80d8_22_nf; +extern cpuop_func op_80d8_22_ff; +extern cpuop_func op_80e0_22_nf; +extern cpuop_func op_80e0_22_ff; +extern cpuop_func op_80e8_22_nf; +extern cpuop_func op_80e8_22_ff; +extern cpuop_func op_80f0_22_nf; +extern cpuop_func op_80f0_22_ff; +extern cpuop_func op_80f8_22_nf; +extern cpuop_func op_80f8_22_ff; +extern cpuop_func op_80f9_22_nf; +extern cpuop_func op_80f9_22_ff; +extern cpuop_func op_80fa_22_nf; +extern cpuop_func op_80fa_22_ff; +extern cpuop_func op_80fb_22_nf; +extern cpuop_func op_80fb_22_ff; +extern cpuop_func op_80fc_22_nf; +extern cpuop_func op_80fc_22_ff; +extern cpuop_func op_8100_22_nf; +extern cpuop_func op_8100_22_ff; +extern cpuop_func op_8108_22_nf; +extern cpuop_func op_8108_22_ff; +extern cpuop_func op_8110_22_nf; +extern cpuop_func op_8110_22_ff; +extern cpuop_func op_8118_22_nf; +extern cpuop_func op_8118_22_ff; +extern cpuop_func op_8120_22_nf; +extern cpuop_func op_8120_22_ff; +extern cpuop_func op_8128_22_nf; +extern cpuop_func op_8128_22_ff; +extern cpuop_func op_8130_22_nf; +extern cpuop_func op_8130_22_ff; +extern cpuop_func op_8138_22_nf; +extern cpuop_func op_8138_22_ff; +extern cpuop_func op_8139_22_nf; +extern cpuop_func op_8139_22_ff; +extern cpuop_func op_8140_22_nf; +extern cpuop_func op_8140_22_ff; +extern cpuop_func op_8148_22_nf; +extern cpuop_func op_8148_22_ff; +extern cpuop_func op_8150_22_nf; +extern cpuop_func op_8150_22_ff; +extern cpuop_func op_8158_22_nf; +extern cpuop_func op_8158_22_ff; +extern cpuop_func op_8160_22_nf; +extern cpuop_func op_8160_22_ff; +extern cpuop_func op_8168_22_nf; +extern cpuop_func op_8168_22_ff; +extern cpuop_func op_8170_22_nf; +extern cpuop_func op_8170_22_ff; +extern cpuop_func op_8178_22_nf; +extern cpuop_func op_8178_22_ff; +extern cpuop_func op_8179_22_nf; +extern cpuop_func op_8179_22_ff; +extern cpuop_func op_8180_22_nf; +extern cpuop_func op_8180_22_ff; +extern cpuop_func op_8188_22_nf; +extern cpuop_func op_8188_22_ff; +extern cpuop_func op_8190_22_nf; +extern cpuop_func op_8190_22_ff; +extern cpuop_func op_8198_22_nf; +extern cpuop_func op_8198_22_ff; +extern cpuop_func op_81a0_22_nf; +extern cpuop_func op_81a0_22_ff; +extern cpuop_func op_81a8_22_nf; +extern cpuop_func op_81a8_22_ff; +extern cpuop_func op_81b0_22_nf; +extern cpuop_func op_81b0_22_ff; +extern cpuop_func op_81b8_22_nf; +extern cpuop_func op_81b8_22_ff; +extern cpuop_func op_81b9_22_nf; +extern cpuop_func op_81b9_22_ff; +extern cpuop_func op_81c0_22_nf; +extern cpuop_func op_81c0_22_ff; +extern cpuop_func op_81d0_22_nf; +extern cpuop_func op_81d0_22_ff; +extern cpuop_func op_81d8_22_nf; +extern cpuop_func op_81d8_22_ff; +extern cpuop_func op_81e0_22_nf; +extern cpuop_func op_81e0_22_ff; +extern cpuop_func op_81e8_22_nf; +extern cpuop_func op_81e8_22_ff; +extern cpuop_func op_81f0_22_nf; +extern cpuop_func op_81f0_22_ff; +extern cpuop_func op_81f8_22_nf; +extern cpuop_func op_81f8_22_ff; +extern cpuop_func op_81f9_22_nf; +extern cpuop_func op_81f9_22_ff; +extern cpuop_func op_81fa_22_nf; +extern cpuop_func op_81fa_22_ff; +extern cpuop_func op_81fb_22_nf; +extern cpuop_func op_81fb_22_ff; +extern cpuop_func op_81fc_22_nf; +extern cpuop_func op_81fc_22_ff; +extern cpuop_func op_9000_22_nf; +extern cpuop_func op_9000_22_ff; +extern cpuop_func op_9010_22_nf; +extern cpuop_func op_9010_22_ff; +extern cpuop_func op_9018_22_nf; +extern cpuop_func op_9018_22_ff; +extern cpuop_func op_9020_22_nf; +extern cpuop_func op_9020_22_ff; +extern cpuop_func op_9028_22_nf; +extern cpuop_func op_9028_22_ff; +extern cpuop_func op_9030_22_nf; +extern cpuop_func op_9030_22_ff; +extern cpuop_func op_9038_22_nf; +extern cpuop_func op_9038_22_ff; +extern cpuop_func op_9039_22_nf; +extern cpuop_func op_9039_22_ff; +extern cpuop_func op_903a_22_nf; +extern cpuop_func op_903a_22_ff; +extern cpuop_func op_903b_22_nf; +extern cpuop_func op_903b_22_ff; +extern cpuop_func op_903c_22_nf; +extern cpuop_func op_903c_22_ff; +extern cpuop_func op_9040_22_nf; +extern cpuop_func op_9040_22_ff; +extern cpuop_func op_9048_22_nf; +extern cpuop_func op_9048_22_ff; +extern cpuop_func op_9050_22_nf; +extern cpuop_func op_9050_22_ff; +extern cpuop_func op_9058_22_nf; +extern cpuop_func op_9058_22_ff; +extern cpuop_func op_9060_22_nf; +extern cpuop_func op_9060_22_ff; +extern cpuop_func op_9068_22_nf; +extern cpuop_func op_9068_22_ff; +extern cpuop_func op_9070_22_nf; +extern cpuop_func op_9070_22_ff; +extern cpuop_func op_9078_22_nf; +extern cpuop_func op_9078_22_ff; +extern cpuop_func op_9079_22_nf; +extern cpuop_func op_9079_22_ff; +extern cpuop_func op_907a_22_nf; +extern cpuop_func op_907a_22_ff; +extern cpuop_func op_907b_22_nf; +extern cpuop_func op_907b_22_ff; +extern cpuop_func op_907c_22_nf; +extern cpuop_func op_907c_22_ff; +extern cpuop_func op_9080_22_nf; +extern cpuop_func op_9080_22_ff; +extern cpuop_func op_9088_22_nf; +extern cpuop_func op_9088_22_ff; +extern cpuop_func op_9090_22_nf; +extern cpuop_func op_9090_22_ff; +extern cpuop_func op_9098_22_nf; +extern cpuop_func op_9098_22_ff; +extern cpuop_func op_90a0_22_nf; +extern cpuop_func op_90a0_22_ff; +extern cpuop_func op_90a8_22_nf; +extern cpuop_func op_90a8_22_ff; +extern cpuop_func op_90b0_22_nf; +extern cpuop_func op_90b0_22_ff; +extern cpuop_func op_90b8_22_nf; +extern cpuop_func op_90b8_22_ff; +extern cpuop_func op_90b9_22_nf; +extern cpuop_func op_90b9_22_ff; +extern cpuop_func op_90ba_22_nf; +extern cpuop_func op_90ba_22_ff; +extern cpuop_func op_90bb_22_nf; +extern cpuop_func op_90bb_22_ff; +extern cpuop_func op_90bc_22_nf; +extern cpuop_func op_90bc_22_ff; +extern cpuop_func op_90c0_22_nf; +extern cpuop_func op_90c0_22_ff; +extern cpuop_func op_90c8_22_nf; +extern cpuop_func op_90c8_22_ff; +extern cpuop_func op_90d0_22_nf; +extern cpuop_func op_90d0_22_ff; +extern cpuop_func op_90d8_22_nf; +extern cpuop_func op_90d8_22_ff; +extern cpuop_func op_90e0_22_nf; +extern cpuop_func op_90e0_22_ff; +extern cpuop_func op_90e8_22_nf; +extern cpuop_func op_90e8_22_ff; +extern cpuop_func op_90f0_22_nf; +extern cpuop_func op_90f0_22_ff; +extern cpuop_func op_90f8_22_nf; +extern cpuop_func op_90f8_22_ff; +extern cpuop_func op_90f9_22_nf; +extern cpuop_func op_90f9_22_ff; +extern cpuop_func op_90fa_22_nf; +extern cpuop_func op_90fa_22_ff; +extern cpuop_func op_90fb_22_nf; +extern cpuop_func op_90fb_22_ff; +extern cpuop_func op_90fc_22_nf; +extern cpuop_func op_90fc_22_ff; +extern cpuop_func op_9100_22_nf; +extern cpuop_func op_9100_22_ff; +extern cpuop_func op_9108_22_nf; +extern cpuop_func op_9108_22_ff; +extern cpuop_func op_9110_22_nf; +extern cpuop_func op_9110_22_ff; +extern cpuop_func op_9118_22_nf; +extern cpuop_func op_9118_22_ff; +extern cpuop_func op_9120_22_nf; +extern cpuop_func op_9120_22_ff; +extern cpuop_func op_9128_22_nf; +extern cpuop_func op_9128_22_ff; +extern cpuop_func op_9130_22_nf; +extern cpuop_func op_9130_22_ff; +extern cpuop_func op_9138_22_nf; +extern cpuop_func op_9138_22_ff; +extern cpuop_func op_9139_22_nf; +extern cpuop_func op_9139_22_ff; +extern cpuop_func op_9140_22_nf; +extern cpuop_func op_9140_22_ff; +extern cpuop_func op_9148_22_nf; +extern cpuop_func op_9148_22_ff; +extern cpuop_func op_9150_22_nf; +extern cpuop_func op_9150_22_ff; +extern cpuop_func op_9158_22_nf; +extern cpuop_func op_9158_22_ff; +extern cpuop_func op_9160_22_nf; +extern cpuop_func op_9160_22_ff; +extern cpuop_func op_9168_22_nf; +extern cpuop_func op_9168_22_ff; +extern cpuop_func op_9170_22_nf; +extern cpuop_func op_9170_22_ff; +extern cpuop_func op_9178_22_nf; +extern cpuop_func op_9178_22_ff; +extern cpuop_func op_9179_22_nf; +extern cpuop_func op_9179_22_ff; +extern cpuop_func op_9180_22_nf; +extern cpuop_func op_9180_22_ff; +extern cpuop_func op_9188_22_nf; +extern cpuop_func op_9188_22_ff; +extern cpuop_func op_9190_22_nf; +extern cpuop_func op_9190_22_ff; +extern cpuop_func op_9198_22_nf; +extern cpuop_func op_9198_22_ff; +extern cpuop_func op_91a0_22_nf; +extern cpuop_func op_91a0_22_ff; +extern cpuop_func op_91a8_22_nf; +extern cpuop_func op_91a8_22_ff; +extern cpuop_func op_91b0_22_nf; +extern cpuop_func op_91b0_22_ff; +extern cpuop_func op_91b8_22_nf; +extern cpuop_func op_91b8_22_ff; +extern cpuop_func op_91b9_22_nf; +extern cpuop_func op_91b9_22_ff; +extern cpuop_func op_91c0_22_nf; +extern cpuop_func op_91c0_22_ff; +extern cpuop_func op_91c8_22_nf; +extern cpuop_func op_91c8_22_ff; +extern cpuop_func op_91d0_22_nf; +extern cpuop_func op_91d0_22_ff; +extern cpuop_func op_91d8_22_nf; +extern cpuop_func op_91d8_22_ff; +extern cpuop_func op_91e0_22_nf; +extern cpuop_func op_91e0_22_ff; +extern cpuop_func op_91e8_22_nf; +extern cpuop_func op_91e8_22_ff; +extern cpuop_func op_91f0_22_nf; +extern cpuop_func op_91f0_22_ff; +extern cpuop_func op_91f8_22_nf; +extern cpuop_func op_91f8_22_ff; +extern cpuop_func op_91f9_22_nf; +extern cpuop_func op_91f9_22_ff; +extern cpuop_func op_91fa_22_nf; +extern cpuop_func op_91fa_22_ff; +extern cpuop_func op_91fb_22_nf; +extern cpuop_func op_91fb_22_ff; +extern cpuop_func op_91fc_22_nf; +extern cpuop_func op_91fc_22_ff; +extern cpuop_func op_b000_22_nf; +extern cpuop_func op_b000_22_ff; +extern cpuop_func op_b010_22_nf; +extern cpuop_func op_b010_22_ff; +extern cpuop_func op_b018_22_nf; +extern cpuop_func op_b018_22_ff; +extern cpuop_func op_b020_22_nf; +extern cpuop_func op_b020_22_ff; +extern cpuop_func op_b028_22_nf; +extern cpuop_func op_b028_22_ff; +extern cpuop_func op_b030_22_nf; +extern cpuop_func op_b030_22_ff; +extern cpuop_func op_b038_22_nf; +extern cpuop_func op_b038_22_ff; +extern cpuop_func op_b039_22_nf; +extern cpuop_func op_b039_22_ff; +extern cpuop_func op_b03a_22_nf; +extern cpuop_func op_b03a_22_ff; +extern cpuop_func op_b03b_22_nf; +extern cpuop_func op_b03b_22_ff; +extern cpuop_func op_b03c_22_nf; +extern cpuop_func op_b03c_22_ff; +extern cpuop_func op_b040_22_nf; +extern cpuop_func op_b040_22_ff; +extern cpuop_func op_b048_22_nf; +extern cpuop_func op_b048_22_ff; +extern cpuop_func op_b050_22_nf; +extern cpuop_func op_b050_22_ff; +extern cpuop_func op_b058_22_nf; +extern cpuop_func op_b058_22_ff; +extern cpuop_func op_b060_22_nf; +extern cpuop_func op_b060_22_ff; +extern cpuop_func op_b068_22_nf; +extern cpuop_func op_b068_22_ff; +extern cpuop_func op_b070_22_nf; +extern cpuop_func op_b070_22_ff; +extern cpuop_func op_b078_22_nf; +extern cpuop_func op_b078_22_ff; +extern cpuop_func op_b079_22_nf; +extern cpuop_func op_b079_22_ff; +extern cpuop_func op_b07a_22_nf; +extern cpuop_func op_b07a_22_ff; +extern cpuop_func op_b07b_22_nf; +extern cpuop_func op_b07b_22_ff; +extern cpuop_func op_b07c_22_nf; +extern cpuop_func op_b07c_22_ff; +extern cpuop_func op_b080_22_nf; +extern cpuop_func op_b080_22_ff; +extern cpuop_func op_b088_22_nf; +extern cpuop_func op_b088_22_ff; +extern cpuop_func op_b090_22_nf; +extern cpuop_func op_b090_22_ff; +extern cpuop_func op_b098_22_nf; +extern cpuop_func op_b098_22_ff; +extern cpuop_func op_b0a0_22_nf; +extern cpuop_func op_b0a0_22_ff; +extern cpuop_func op_b0a8_22_nf; +extern cpuop_func op_b0a8_22_ff; +extern cpuop_func op_b0b0_22_nf; +extern cpuop_func op_b0b0_22_ff; +extern cpuop_func op_b0b8_22_nf; +extern cpuop_func op_b0b8_22_ff; +extern cpuop_func op_b0b9_22_nf; +extern cpuop_func op_b0b9_22_ff; +extern cpuop_func op_b0ba_22_nf; +extern cpuop_func op_b0ba_22_ff; +extern cpuop_func op_b0bb_22_nf; +extern cpuop_func op_b0bb_22_ff; +extern cpuop_func op_b0bc_22_nf; +extern cpuop_func op_b0bc_22_ff; +extern cpuop_func op_b0c0_22_nf; +extern cpuop_func op_b0c0_22_ff; +extern cpuop_func op_b0c8_22_nf; +extern cpuop_func op_b0c8_22_ff; +extern cpuop_func op_b0d0_22_nf; +extern cpuop_func op_b0d0_22_ff; +extern cpuop_func op_b0d8_22_nf; +extern cpuop_func op_b0d8_22_ff; +extern cpuop_func op_b0e0_22_nf; +extern cpuop_func op_b0e0_22_ff; +extern cpuop_func op_b0e8_22_nf; +extern cpuop_func op_b0e8_22_ff; +extern cpuop_func op_b0f0_22_nf; +extern cpuop_func op_b0f0_22_ff; +extern cpuop_func op_b0f8_22_nf; +extern cpuop_func op_b0f8_22_ff; +extern cpuop_func op_b0f9_22_nf; +extern cpuop_func op_b0f9_22_ff; +extern cpuop_func op_b0fa_22_nf; +extern cpuop_func op_b0fa_22_ff; +extern cpuop_func op_b0fb_22_nf; +extern cpuop_func op_b0fb_22_ff; +extern cpuop_func op_b0fc_22_nf; +extern cpuop_func op_b0fc_22_ff; +extern cpuop_func op_b100_22_nf; +extern cpuop_func op_b100_22_ff; +extern cpuop_func op_b108_22_nf; +extern cpuop_func op_b108_22_ff; +extern cpuop_func op_b110_22_nf; +extern cpuop_func op_b110_22_ff; +extern cpuop_func op_b118_22_nf; +extern cpuop_func op_b118_22_ff; +extern cpuop_func op_b120_22_nf; +extern cpuop_func op_b120_22_ff; +extern cpuop_func op_b128_22_nf; +extern cpuop_func op_b128_22_ff; +extern cpuop_func op_b130_22_nf; +extern cpuop_func op_b130_22_ff; +extern cpuop_func op_b138_22_nf; +extern cpuop_func op_b138_22_ff; +extern cpuop_func op_b139_22_nf; +extern cpuop_func op_b139_22_ff; +extern cpuop_func op_b140_22_nf; +extern cpuop_func op_b140_22_ff; +extern cpuop_func op_b148_22_nf; +extern cpuop_func op_b148_22_ff; +extern cpuop_func op_b150_22_nf; +extern cpuop_func op_b150_22_ff; +extern cpuop_func op_b158_22_nf; +extern cpuop_func op_b158_22_ff; +extern cpuop_func op_b160_22_nf; +extern cpuop_func op_b160_22_ff; +extern cpuop_func op_b168_22_nf; +extern cpuop_func op_b168_22_ff; +extern cpuop_func op_b170_22_nf; +extern cpuop_func op_b170_22_ff; +extern cpuop_func op_b178_22_nf; +extern cpuop_func op_b178_22_ff; +extern cpuop_func op_b179_22_nf; +extern cpuop_func op_b179_22_ff; +extern cpuop_func op_b180_22_nf; +extern cpuop_func op_b180_22_ff; +extern cpuop_func op_b188_22_nf; +extern cpuop_func op_b188_22_ff; +extern cpuop_func op_b190_22_nf; +extern cpuop_func op_b190_22_ff; +extern cpuop_func op_b198_22_nf; +extern cpuop_func op_b198_22_ff; +extern cpuop_func op_b1a0_22_nf; +extern cpuop_func op_b1a0_22_ff; +extern cpuop_func op_b1a8_22_nf; +extern cpuop_func op_b1a8_22_ff; +extern cpuop_func op_b1b0_22_nf; +extern cpuop_func op_b1b0_22_ff; +extern cpuop_func op_b1b8_22_nf; +extern cpuop_func op_b1b8_22_ff; +extern cpuop_func op_b1b9_22_nf; +extern cpuop_func op_b1b9_22_ff; +extern cpuop_func op_b1c0_22_nf; +extern cpuop_func op_b1c0_22_ff; +extern cpuop_func op_b1c8_22_nf; +extern cpuop_func op_b1c8_22_ff; +extern cpuop_func op_b1d0_22_nf; +extern cpuop_func op_b1d0_22_ff; +extern cpuop_func op_b1d8_22_nf; +extern cpuop_func op_b1d8_22_ff; +extern cpuop_func op_b1e0_22_nf; +extern cpuop_func op_b1e0_22_ff; +extern cpuop_func op_b1e8_22_nf; +extern cpuop_func op_b1e8_22_ff; +extern cpuop_func op_b1f0_22_nf; +extern cpuop_func op_b1f0_22_ff; +extern cpuop_func op_b1f8_22_nf; +extern cpuop_func op_b1f8_22_ff; +extern cpuop_func op_b1f9_22_nf; +extern cpuop_func op_b1f9_22_ff; +extern cpuop_func op_b1fa_22_nf; +extern cpuop_func op_b1fa_22_ff; +extern cpuop_func op_b1fb_22_nf; +extern cpuop_func op_b1fb_22_ff; +extern cpuop_func op_b1fc_22_nf; +extern cpuop_func op_b1fc_22_ff; +extern cpuop_func op_c000_22_nf; +extern cpuop_func op_c000_22_ff; +extern cpuop_func op_c010_22_nf; +extern cpuop_func op_c010_22_ff; +extern cpuop_func op_c018_22_nf; +extern cpuop_func op_c018_22_ff; +extern cpuop_func op_c020_22_nf; +extern cpuop_func op_c020_22_ff; +extern cpuop_func op_c028_22_nf; +extern cpuop_func op_c028_22_ff; +extern cpuop_func op_c030_22_nf; +extern cpuop_func op_c030_22_ff; +extern cpuop_func op_c038_22_nf; +extern cpuop_func op_c038_22_ff; +extern cpuop_func op_c039_22_nf; +extern cpuop_func op_c039_22_ff; +extern cpuop_func op_c03a_22_nf; +extern cpuop_func op_c03a_22_ff; +extern cpuop_func op_c03b_22_nf; +extern cpuop_func op_c03b_22_ff; +extern cpuop_func op_c03c_22_nf; +extern cpuop_func op_c03c_22_ff; +extern cpuop_func op_c040_22_nf; +extern cpuop_func op_c040_22_ff; +extern cpuop_func op_c050_22_nf; +extern cpuop_func op_c050_22_ff; +extern cpuop_func op_c058_22_nf; +extern cpuop_func op_c058_22_ff; +extern cpuop_func op_c060_22_nf; +extern cpuop_func op_c060_22_ff; +extern cpuop_func op_c068_22_nf; +extern cpuop_func op_c068_22_ff; +extern cpuop_func op_c070_22_nf; +extern cpuop_func op_c070_22_ff; +extern cpuop_func op_c078_22_nf; +extern cpuop_func op_c078_22_ff; +extern cpuop_func op_c079_22_nf; +extern cpuop_func op_c079_22_ff; +extern cpuop_func op_c07a_22_nf; +extern cpuop_func op_c07a_22_ff; +extern cpuop_func op_c07b_22_nf; +extern cpuop_func op_c07b_22_ff; +extern cpuop_func op_c07c_22_nf; +extern cpuop_func op_c07c_22_ff; +extern cpuop_func op_c080_22_nf; +extern cpuop_func op_c080_22_ff; +extern cpuop_func op_c090_22_nf; +extern cpuop_func op_c090_22_ff; +extern cpuop_func op_c098_22_nf; +extern cpuop_func op_c098_22_ff; +extern cpuop_func op_c0a0_22_nf; +extern cpuop_func op_c0a0_22_ff; +extern cpuop_func op_c0a8_22_nf; +extern cpuop_func op_c0a8_22_ff; +extern cpuop_func op_c0b0_22_nf; +extern cpuop_func op_c0b0_22_ff; +extern cpuop_func op_c0b8_22_nf; +extern cpuop_func op_c0b8_22_ff; +extern cpuop_func op_c0b9_22_nf; +extern cpuop_func op_c0b9_22_ff; +extern cpuop_func op_c0ba_22_nf; +extern cpuop_func op_c0ba_22_ff; +extern cpuop_func op_c0bb_22_nf; +extern cpuop_func op_c0bb_22_ff; +extern cpuop_func op_c0bc_22_nf; +extern cpuop_func op_c0bc_22_ff; +extern cpuop_func op_c0c0_22_nf; +extern cpuop_func op_c0c0_22_ff; +extern cpuop_func op_c0d0_22_nf; +extern cpuop_func op_c0d0_22_ff; +extern cpuop_func op_c0d8_22_nf; +extern cpuop_func op_c0d8_22_ff; +extern cpuop_func op_c0e0_22_nf; +extern cpuop_func op_c0e0_22_ff; +extern cpuop_func op_c0e8_22_nf; +extern cpuop_func op_c0e8_22_ff; +extern cpuop_func op_c0f0_22_nf; +extern cpuop_func op_c0f0_22_ff; +extern cpuop_func op_c0f8_22_nf; +extern cpuop_func op_c0f8_22_ff; +extern cpuop_func op_c0f9_22_nf; +extern cpuop_func op_c0f9_22_ff; +extern cpuop_func op_c0fa_22_nf; +extern cpuop_func op_c0fa_22_ff; +extern cpuop_func op_c0fb_22_nf; +extern cpuop_func op_c0fb_22_ff; +extern cpuop_func op_c0fc_22_nf; +extern cpuop_func op_c0fc_22_ff; +extern cpuop_func op_c100_22_nf; +extern cpuop_func op_c100_22_ff; +extern cpuop_func op_c108_22_nf; +extern cpuop_func op_c108_22_ff; +extern cpuop_func op_c110_22_nf; +extern cpuop_func op_c110_22_ff; +extern cpuop_func op_c118_22_nf; +extern cpuop_func op_c118_22_ff; +extern cpuop_func op_c120_22_nf; +extern cpuop_func op_c120_22_ff; +extern cpuop_func op_c128_22_nf; +extern cpuop_func op_c128_22_ff; +extern cpuop_func op_c130_22_nf; +extern cpuop_func op_c130_22_ff; +extern cpuop_func op_c138_22_nf; +extern cpuop_func op_c138_22_ff; +extern cpuop_func op_c139_22_nf; +extern cpuop_func op_c139_22_ff; +extern cpuop_func op_c140_22_nf; +extern cpuop_func op_c140_22_ff; +extern cpuop_func op_c148_22_nf; +extern cpuop_func op_c148_22_ff; +extern cpuop_func op_c150_22_nf; +extern cpuop_func op_c150_22_ff; +extern cpuop_func op_c158_22_nf; +extern cpuop_func op_c158_22_ff; +extern cpuop_func op_c160_22_nf; +extern cpuop_func op_c160_22_ff; +extern cpuop_func op_c168_22_nf; +extern cpuop_func op_c168_22_ff; +extern cpuop_func op_c170_22_nf; +extern cpuop_func op_c170_22_ff; +extern cpuop_func op_c178_22_nf; +extern cpuop_func op_c178_22_ff; +extern cpuop_func op_c179_22_nf; +extern cpuop_func op_c179_22_ff; +extern cpuop_func op_c188_22_nf; +extern cpuop_func op_c188_22_ff; +extern cpuop_func op_c190_22_nf; +extern cpuop_func op_c190_22_ff; +extern cpuop_func op_c198_22_nf; +extern cpuop_func op_c198_22_ff; +extern cpuop_func op_c1a0_22_nf; +extern cpuop_func op_c1a0_22_ff; +extern cpuop_func op_c1a8_22_nf; +extern cpuop_func op_c1a8_22_ff; +extern cpuop_func op_c1b0_22_nf; +extern cpuop_func op_c1b0_22_ff; +extern cpuop_func op_c1b8_22_nf; +extern cpuop_func op_c1b8_22_ff; +extern cpuop_func op_c1b9_22_nf; +extern cpuop_func op_c1b9_22_ff; +extern cpuop_func op_c1c0_22_nf; +extern cpuop_func op_c1c0_22_ff; +extern cpuop_func op_c1d0_22_nf; +extern cpuop_func op_c1d0_22_ff; +extern cpuop_func op_c1d8_22_nf; +extern cpuop_func op_c1d8_22_ff; +extern cpuop_func op_c1e0_22_nf; +extern cpuop_func op_c1e0_22_ff; +extern cpuop_func op_c1e8_22_nf; +extern cpuop_func op_c1e8_22_ff; +extern cpuop_func op_c1f0_22_nf; +extern cpuop_func op_c1f0_22_ff; +extern cpuop_func op_c1f8_22_nf; +extern cpuop_func op_c1f8_22_ff; +extern cpuop_func op_c1f9_22_nf; +extern cpuop_func op_c1f9_22_ff; +extern cpuop_func op_c1fa_22_nf; +extern cpuop_func op_c1fa_22_ff; +extern cpuop_func op_c1fb_22_nf; +extern cpuop_func op_c1fb_22_ff; +extern cpuop_func op_c1fc_22_nf; +extern cpuop_func op_c1fc_22_ff; +extern cpuop_func op_d000_22_nf; +extern cpuop_func op_d000_22_ff; +extern cpuop_func op_d010_22_nf; +extern cpuop_func op_d010_22_ff; +extern cpuop_func op_d018_22_nf; +extern cpuop_func op_d018_22_ff; +extern cpuop_func op_d020_22_nf; +extern cpuop_func op_d020_22_ff; +extern cpuop_func op_d028_22_nf; +extern cpuop_func op_d028_22_ff; +extern cpuop_func op_d030_22_nf; +extern cpuop_func op_d030_22_ff; +extern cpuop_func op_d038_22_nf; +extern cpuop_func op_d038_22_ff; +extern cpuop_func op_d039_22_nf; +extern cpuop_func op_d039_22_ff; +extern cpuop_func op_d03a_22_nf; +extern cpuop_func op_d03a_22_ff; +extern cpuop_func op_d03b_22_nf; +extern cpuop_func op_d03b_22_ff; +extern cpuop_func op_d03c_22_nf; +extern cpuop_func op_d03c_22_ff; +extern cpuop_func op_d040_22_nf; +extern cpuop_func op_d040_22_ff; +extern cpuop_func op_d048_22_nf; +extern cpuop_func op_d048_22_ff; +extern cpuop_func op_d050_22_nf; +extern cpuop_func op_d050_22_ff; +extern cpuop_func op_d058_22_nf; +extern cpuop_func op_d058_22_ff; +extern cpuop_func op_d060_22_nf; +extern cpuop_func op_d060_22_ff; +extern cpuop_func op_d068_22_nf; +extern cpuop_func op_d068_22_ff; +extern cpuop_func op_d070_22_nf; +extern cpuop_func op_d070_22_ff; +extern cpuop_func op_d078_22_nf; +extern cpuop_func op_d078_22_ff; +extern cpuop_func op_d079_22_nf; +extern cpuop_func op_d079_22_ff; +extern cpuop_func op_d07a_22_nf; +extern cpuop_func op_d07a_22_ff; +extern cpuop_func op_d07b_22_nf; +extern cpuop_func op_d07b_22_ff; +extern cpuop_func op_d07c_22_nf; +extern cpuop_func op_d07c_22_ff; +extern cpuop_func op_d080_22_nf; +extern cpuop_func op_d080_22_ff; +extern cpuop_func op_d088_22_nf; +extern cpuop_func op_d088_22_ff; +extern cpuop_func op_d090_22_nf; +extern cpuop_func op_d090_22_ff; +extern cpuop_func op_d098_22_nf; +extern cpuop_func op_d098_22_ff; +extern cpuop_func op_d0a0_22_nf; +extern cpuop_func op_d0a0_22_ff; +extern cpuop_func op_d0a8_22_nf; +extern cpuop_func op_d0a8_22_ff; +extern cpuop_func op_d0b0_22_nf; +extern cpuop_func op_d0b0_22_ff; +extern cpuop_func op_d0b8_22_nf; +extern cpuop_func op_d0b8_22_ff; +extern cpuop_func op_d0b9_22_nf; +extern cpuop_func op_d0b9_22_ff; +extern cpuop_func op_d0ba_22_nf; +extern cpuop_func op_d0ba_22_ff; +extern cpuop_func op_d0bb_22_nf; +extern cpuop_func op_d0bb_22_ff; +extern cpuop_func op_d0bc_22_nf; +extern cpuop_func op_d0bc_22_ff; +extern cpuop_func op_d0c0_22_nf; +extern cpuop_func op_d0c0_22_ff; +extern cpuop_func op_d0c8_22_nf; +extern cpuop_func op_d0c8_22_ff; +extern cpuop_func op_d0d0_22_nf; +extern cpuop_func op_d0d0_22_ff; +extern cpuop_func op_d0d8_22_nf; +extern cpuop_func op_d0d8_22_ff; +extern cpuop_func op_d0e0_22_nf; +extern cpuop_func op_d0e0_22_ff; +extern cpuop_func op_d0e8_22_nf; +extern cpuop_func op_d0e8_22_ff; +extern cpuop_func op_d0f0_22_nf; +extern cpuop_func op_d0f0_22_ff; +extern cpuop_func op_d0f8_22_nf; +extern cpuop_func op_d0f8_22_ff; +extern cpuop_func op_d0f9_22_nf; +extern cpuop_func op_d0f9_22_ff; +extern cpuop_func op_d0fa_22_nf; +extern cpuop_func op_d0fa_22_ff; +extern cpuop_func op_d0fb_22_nf; +extern cpuop_func op_d0fb_22_ff; +extern cpuop_func op_d0fc_22_nf; +extern cpuop_func op_d0fc_22_ff; +extern cpuop_func op_d100_22_nf; +extern cpuop_func op_d100_22_ff; +extern cpuop_func op_d108_22_nf; +extern cpuop_func op_d108_22_ff; +extern cpuop_func op_d110_22_nf; +extern cpuop_func op_d110_22_ff; +extern cpuop_func op_d118_22_nf; +extern cpuop_func op_d118_22_ff; +extern cpuop_func op_d120_22_nf; +extern cpuop_func op_d120_22_ff; +extern cpuop_func op_d128_22_nf; +extern cpuop_func op_d128_22_ff; +extern cpuop_func op_d130_22_nf; +extern cpuop_func op_d130_22_ff; +extern cpuop_func op_d138_22_nf; +extern cpuop_func op_d138_22_ff; +extern cpuop_func op_d139_22_nf; +extern cpuop_func op_d139_22_ff; +extern cpuop_func op_d140_22_nf; +extern cpuop_func op_d140_22_ff; +extern cpuop_func op_d148_22_nf; +extern cpuop_func op_d148_22_ff; +extern cpuop_func op_d150_22_nf; +extern cpuop_func op_d150_22_ff; +extern cpuop_func op_d158_22_nf; +extern cpuop_func op_d158_22_ff; +extern cpuop_func op_d160_22_nf; +extern cpuop_func op_d160_22_ff; +extern cpuop_func op_d168_22_nf; +extern cpuop_func op_d168_22_ff; +extern cpuop_func op_d170_22_nf; +extern cpuop_func op_d170_22_ff; +extern cpuop_func op_d178_22_nf; +extern cpuop_func op_d178_22_ff; +extern cpuop_func op_d179_22_nf; +extern cpuop_func op_d179_22_ff; +extern cpuop_func op_d180_22_nf; +extern cpuop_func op_d180_22_ff; +extern cpuop_func op_d188_22_nf; +extern cpuop_func op_d188_22_ff; +extern cpuop_func op_d190_22_nf; +extern cpuop_func op_d190_22_ff; +extern cpuop_func op_d198_22_nf; +extern cpuop_func op_d198_22_ff; +extern cpuop_func op_d1a0_22_nf; +extern cpuop_func op_d1a0_22_ff; +extern cpuop_func op_d1a8_22_nf; +extern cpuop_func op_d1a8_22_ff; +extern cpuop_func op_d1b0_22_nf; +extern cpuop_func op_d1b0_22_ff; +extern cpuop_func op_d1b8_22_nf; +extern cpuop_func op_d1b8_22_ff; +extern cpuop_func op_d1b9_22_nf; +extern cpuop_func op_d1b9_22_ff; +extern cpuop_func op_d1c0_22_nf; +extern cpuop_func op_d1c0_22_ff; +extern cpuop_func op_d1c8_22_nf; +extern cpuop_func op_d1c8_22_ff; +extern cpuop_func op_d1d0_22_nf; +extern cpuop_func op_d1d0_22_ff; +extern cpuop_func op_d1d8_22_nf; +extern cpuop_func op_d1d8_22_ff; +extern cpuop_func op_d1e0_22_nf; +extern cpuop_func op_d1e0_22_ff; +extern cpuop_func op_d1e8_22_nf; +extern cpuop_func op_d1e8_22_ff; +extern cpuop_func op_d1f0_22_nf; +extern cpuop_func op_d1f0_22_ff; +extern cpuop_func op_d1f8_22_nf; +extern cpuop_func op_d1f8_22_ff; +extern cpuop_func op_d1f9_22_nf; +extern cpuop_func op_d1f9_22_ff; +extern cpuop_func op_d1fa_22_nf; +extern cpuop_func op_d1fa_22_ff; +extern cpuop_func op_d1fb_22_nf; +extern cpuop_func op_d1fb_22_ff; +extern cpuop_func op_d1fc_22_nf; +extern cpuop_func op_d1fc_22_ff; +extern cpuop_func op_e000_22_nf; +extern cpuop_func op_e000_22_ff; +extern cpuop_func op_e008_22_nf; +extern cpuop_func op_e008_22_ff; +extern cpuop_func op_e010_22_nf; +extern cpuop_func op_e010_22_ff; +extern cpuop_func op_e018_22_nf; +extern cpuop_func op_e018_22_ff; +extern cpuop_func op_e020_22_nf; +extern cpuop_func op_e020_22_ff; +extern cpuop_func op_e028_22_nf; +extern cpuop_func op_e028_22_ff; +extern cpuop_func op_e030_22_nf; +extern cpuop_func op_e030_22_ff; +extern cpuop_func op_e038_22_nf; +extern cpuop_func op_e038_22_ff; +extern cpuop_func op_e040_22_nf; +extern cpuop_func op_e040_22_ff; +extern cpuop_func op_e048_22_nf; +extern cpuop_func op_e048_22_ff; +extern cpuop_func op_e050_22_nf; +extern cpuop_func op_e050_22_ff; +extern cpuop_func op_e058_22_nf; +extern cpuop_func op_e058_22_ff; +extern cpuop_func op_e060_22_nf; +extern cpuop_func op_e060_22_ff; +extern cpuop_func op_e068_22_nf; +extern cpuop_func op_e068_22_ff; +extern cpuop_func op_e070_22_nf; +extern cpuop_func op_e070_22_ff; +extern cpuop_func op_e078_22_nf; +extern cpuop_func op_e078_22_ff; +extern cpuop_func op_e080_22_nf; +extern cpuop_func op_e080_22_ff; +extern cpuop_func op_e088_22_nf; +extern cpuop_func op_e088_22_ff; +extern cpuop_func op_e090_22_nf; +extern cpuop_func op_e090_22_ff; +extern cpuop_func op_e098_22_nf; +extern cpuop_func op_e098_22_ff; +extern cpuop_func op_e0a0_22_nf; +extern cpuop_func op_e0a0_22_ff; +extern cpuop_func op_e0a8_22_nf; +extern cpuop_func op_e0a8_22_ff; +extern cpuop_func op_e0b0_22_nf; +extern cpuop_func op_e0b0_22_ff; +extern cpuop_func op_e0b8_22_nf; +extern cpuop_func op_e0b8_22_ff; +extern cpuop_func op_e0d0_22_nf; +extern cpuop_func op_e0d0_22_ff; +extern cpuop_func op_e0d8_22_nf; +extern cpuop_func op_e0d8_22_ff; +extern cpuop_func op_e0e0_22_nf; +extern cpuop_func op_e0e0_22_ff; +extern cpuop_func op_e0e8_22_nf; +extern cpuop_func op_e0e8_22_ff; +extern cpuop_func op_e0f0_22_nf; +extern cpuop_func op_e0f0_22_ff; +extern cpuop_func op_e0f8_22_nf; +extern cpuop_func op_e0f8_22_ff; +extern cpuop_func op_e0f9_22_nf; +extern cpuop_func op_e0f9_22_ff; +extern cpuop_func op_e100_22_nf; +extern cpuop_func op_e100_22_ff; +extern cpuop_func op_e108_22_nf; +extern cpuop_func op_e108_22_ff; +extern cpuop_func op_e110_22_nf; +extern cpuop_func op_e110_22_ff; +extern cpuop_func op_e118_22_nf; +extern cpuop_func op_e118_22_ff; +extern cpuop_func op_e120_22_nf; +extern cpuop_func op_e120_22_ff; +extern cpuop_func op_e128_22_nf; +extern cpuop_func op_e128_22_ff; +extern cpuop_func op_e130_22_nf; +extern cpuop_func op_e130_22_ff; +extern cpuop_func op_e138_22_nf; +extern cpuop_func op_e138_22_ff; +extern cpuop_func op_e140_22_nf; +extern cpuop_func op_e140_22_ff; +extern cpuop_func op_e148_22_nf; +extern cpuop_func op_e148_22_ff; +extern cpuop_func op_e150_22_nf; +extern cpuop_func op_e150_22_ff; +extern cpuop_func op_e158_22_nf; +extern cpuop_func op_e158_22_ff; +extern cpuop_func op_e160_22_nf; +extern cpuop_func op_e160_22_ff; +extern cpuop_func op_e168_22_nf; +extern cpuop_func op_e168_22_ff; +extern cpuop_func op_e170_22_nf; +extern cpuop_func op_e170_22_ff; +extern cpuop_func op_e178_22_nf; +extern cpuop_func op_e178_22_ff; +extern cpuop_func op_e180_22_nf; +extern cpuop_func op_e180_22_ff; +extern cpuop_func op_e188_22_nf; +extern cpuop_func op_e188_22_ff; +extern cpuop_func op_e190_22_nf; +extern cpuop_func op_e190_22_ff; +extern cpuop_func op_e198_22_nf; +extern cpuop_func op_e198_22_ff; +extern cpuop_func op_e1a0_22_nf; +extern cpuop_func op_e1a0_22_ff; +extern cpuop_func op_e1a8_22_nf; +extern cpuop_func op_e1a8_22_ff; +extern cpuop_func op_e1b0_22_nf; +extern cpuop_func op_e1b0_22_ff; +extern cpuop_func op_e1b8_22_nf; +extern cpuop_func op_e1b8_22_ff; +extern cpuop_func op_e1d0_22_nf; +extern cpuop_func op_e1d0_22_ff; +extern cpuop_func op_e1d8_22_nf; +extern cpuop_func op_e1d8_22_ff; +extern cpuop_func op_e1e0_22_nf; +extern cpuop_func op_e1e0_22_ff; +extern cpuop_func op_e1e8_22_nf; +extern cpuop_func op_e1e8_22_ff; +extern cpuop_func op_e1f0_22_nf; +extern cpuop_func op_e1f0_22_ff; +extern cpuop_func op_e1f8_22_nf; +extern cpuop_func op_e1f8_22_ff; +extern cpuop_func op_e1f9_22_nf; +extern cpuop_func op_e1f9_22_ff; +extern cpuop_func op_e2d0_22_nf; +extern cpuop_func op_e2d0_22_ff; +extern cpuop_func op_e2d8_22_nf; +extern cpuop_func op_e2d8_22_ff; +extern cpuop_func op_e2e0_22_nf; +extern cpuop_func op_e2e0_22_ff; +extern cpuop_func op_e2e8_22_nf; +extern cpuop_func op_e2e8_22_ff; +extern cpuop_func op_e2f0_22_nf; +extern cpuop_func op_e2f0_22_ff; +extern cpuop_func op_e2f8_22_nf; +extern cpuop_func op_e2f8_22_ff; +extern cpuop_func op_e2f9_22_nf; +extern cpuop_func op_e2f9_22_ff; +extern cpuop_func op_e3d0_22_nf; +extern cpuop_func op_e3d0_22_ff; +extern cpuop_func op_e3d8_22_nf; +extern cpuop_func op_e3d8_22_ff; +extern cpuop_func op_e3e0_22_nf; +extern cpuop_func op_e3e0_22_ff; +extern cpuop_func op_e3e8_22_nf; +extern cpuop_func op_e3e8_22_ff; +extern cpuop_func op_e3f0_22_nf; +extern cpuop_func op_e3f0_22_ff; +extern cpuop_func op_e3f8_22_nf; +extern cpuop_func op_e3f8_22_ff; +extern cpuop_func op_e3f9_22_nf; +extern cpuop_func op_e3f9_22_ff; +extern cpuop_func op_e4d0_22_nf; +extern cpuop_func op_e4d0_22_ff; +extern cpuop_func op_e4d8_22_nf; +extern cpuop_func op_e4d8_22_ff; +extern cpuop_func op_e4e0_22_nf; +extern cpuop_func op_e4e0_22_ff; +extern cpuop_func op_e4e8_22_nf; +extern cpuop_func op_e4e8_22_ff; +extern cpuop_func op_e4f0_22_nf; +extern cpuop_func op_e4f0_22_ff; +extern cpuop_func op_e4f8_22_nf; +extern cpuop_func op_e4f8_22_ff; +extern cpuop_func op_e4f9_22_nf; +extern cpuop_func op_e4f9_22_ff; +extern cpuop_func op_e5d0_22_nf; +extern cpuop_func op_e5d0_22_ff; +extern cpuop_func op_e5d8_22_nf; +extern cpuop_func op_e5d8_22_ff; +extern cpuop_func op_e5e0_22_nf; +extern cpuop_func op_e5e0_22_ff; +extern cpuop_func op_e5e8_22_nf; +extern cpuop_func op_e5e8_22_ff; +extern cpuop_func op_e5f0_22_nf; +extern cpuop_func op_e5f0_22_ff; +extern cpuop_func op_e5f8_22_nf; +extern cpuop_func op_e5f8_22_ff; +extern cpuop_func op_e5f9_22_nf; +extern cpuop_func op_e5f9_22_ff; +extern cpuop_func op_e6d0_22_nf; +extern cpuop_func op_e6d0_22_ff; +extern cpuop_func op_e6d8_22_nf; +extern cpuop_func op_e6d8_22_ff; +extern cpuop_func op_e6e0_22_nf; +extern cpuop_func op_e6e0_22_ff; +extern cpuop_func op_e6e8_22_nf; +extern cpuop_func op_e6e8_22_ff; +extern cpuop_func op_e6f0_22_nf; +extern cpuop_func op_e6f0_22_ff; +extern cpuop_func op_e6f8_22_nf; +extern cpuop_func op_e6f8_22_ff; +extern cpuop_func op_e6f9_22_nf; +extern cpuop_func op_e6f9_22_ff; +extern cpuop_func op_e7d0_22_nf; +extern cpuop_func op_e7d0_22_ff; +extern cpuop_func op_e7d8_22_nf; +extern cpuop_func op_e7d8_22_ff; +extern cpuop_func op_e7e0_22_nf; +extern cpuop_func op_e7e0_22_ff; +extern cpuop_func op_e7e8_22_nf; +extern cpuop_func op_e7e8_22_ff; +extern cpuop_func op_e7f0_22_nf; +extern cpuop_func op_e7f0_22_ff; +extern cpuop_func op_e7f8_22_nf; +extern cpuop_func op_e7f8_22_ff; +extern cpuop_func op_e7f9_22_nf; +extern cpuop_func op_e7f9_22_ff; +extern cpuop_func op_e8c0_22_nf; +extern cpuop_func op_e8c0_22_ff; +extern cpuop_func op_e8d0_22_nf; +extern cpuop_func op_e8d0_22_ff; +extern cpuop_func op_e8e8_22_nf; +extern cpuop_func op_e8e8_22_ff; +extern cpuop_func op_e8f0_22_nf; +extern cpuop_func op_e8f0_22_ff; +extern cpuop_func op_e8f8_22_nf; +extern cpuop_func op_e8f8_22_ff; +extern cpuop_func op_e8f9_22_nf; +extern cpuop_func op_e8f9_22_ff; +extern cpuop_func op_e8fa_22_nf; +extern cpuop_func op_e8fa_22_ff; +extern cpuop_func op_e8fb_22_nf; +extern cpuop_func op_e8fb_22_ff; +extern cpuop_func op_e9c0_22_nf; +extern cpuop_func op_e9c0_22_ff; +extern cpuop_func op_e9d0_22_nf; +extern cpuop_func op_e9d0_22_ff; +extern cpuop_func op_e9e8_22_nf; +extern cpuop_func op_e9e8_22_ff; +extern cpuop_func op_e9f0_22_nf; +extern cpuop_func op_e9f0_22_ff; +extern cpuop_func op_e9f8_22_nf; +extern cpuop_func op_e9f8_22_ff; +extern cpuop_func op_e9f9_22_nf; +extern cpuop_func op_e9f9_22_ff; +extern cpuop_func op_e9fa_22_nf; +extern cpuop_func op_e9fa_22_ff; +extern cpuop_func op_e9fb_22_nf; +extern cpuop_func op_e9fb_22_ff; +extern cpuop_func op_eac0_22_nf; +extern cpuop_func op_eac0_22_ff; +extern cpuop_func op_ead0_22_nf; +extern cpuop_func op_ead0_22_ff; +extern cpuop_func op_eae8_22_nf; +extern cpuop_func op_eae8_22_ff; +extern cpuop_func op_eaf0_22_nf; +extern cpuop_func op_eaf0_22_ff; +extern cpuop_func op_eaf8_22_nf; +extern cpuop_func op_eaf8_22_ff; +extern cpuop_func op_eaf9_22_nf; +extern cpuop_func op_eaf9_22_ff; +extern cpuop_func op_ebc0_22_nf; +extern cpuop_func op_ebc0_22_ff; +extern cpuop_func op_ebd0_22_nf; +extern cpuop_func op_ebd0_22_ff; +extern cpuop_func op_ebe8_22_nf; +extern cpuop_func op_ebe8_22_ff; +extern cpuop_func op_ebf0_22_nf; +extern cpuop_func op_ebf0_22_ff; +extern cpuop_func op_ebf8_22_nf; +extern cpuop_func op_ebf8_22_ff; +extern cpuop_func op_ebf9_22_nf; +extern cpuop_func op_ebf9_22_ff; +extern cpuop_func op_ebfa_22_nf; +extern cpuop_func op_ebfa_22_ff; +extern cpuop_func op_ebfb_22_nf; +extern cpuop_func op_ebfb_22_ff; +extern cpuop_func op_ecc0_22_nf; +extern cpuop_func op_ecc0_22_ff; +extern cpuop_func op_ecd0_22_nf; +extern cpuop_func op_ecd0_22_ff; +extern cpuop_func op_ece8_22_nf; +extern cpuop_func op_ece8_22_ff; +extern cpuop_func op_ecf0_22_nf; +extern cpuop_func op_ecf0_22_ff; +extern cpuop_func op_ecf8_22_nf; +extern cpuop_func op_ecf8_22_ff; +extern cpuop_func op_ecf9_22_nf; +extern cpuop_func op_ecf9_22_ff; +extern cpuop_func op_edc0_22_nf; +extern cpuop_func op_edc0_22_ff; +extern cpuop_func op_edd0_22_nf; +extern cpuop_func op_edd0_22_ff; +extern cpuop_func op_ede8_22_nf; +extern cpuop_func op_ede8_22_ff; +extern cpuop_func op_edf0_22_nf; +extern cpuop_func op_edf0_22_ff; +extern cpuop_func op_edf8_22_nf; +extern cpuop_func op_edf8_22_ff; +extern cpuop_func op_edf9_22_nf; +extern cpuop_func op_edf9_22_ff; +extern cpuop_func op_edfa_22_nf; +extern cpuop_func op_edfa_22_ff; +extern cpuop_func op_edfb_22_nf; +extern cpuop_func op_edfb_22_ff; +extern cpuop_func op_eec0_22_nf; +extern cpuop_func op_eec0_22_ff; +extern cpuop_func op_eed0_22_nf; +extern cpuop_func op_eed0_22_ff; +extern cpuop_func op_eee8_22_nf; +extern cpuop_func op_eee8_22_ff; +extern cpuop_func op_eef0_22_nf; +extern cpuop_func op_eef0_22_ff; +extern cpuop_func op_eef8_22_nf; +extern cpuop_func op_eef8_22_ff; +extern cpuop_func op_eef9_22_nf; +extern cpuop_func op_eef9_22_ff; +extern cpuop_func op_efc0_22_nf; +extern cpuop_func op_efc0_22_ff; +extern cpuop_func op_efd0_22_nf; +extern cpuop_func op_efd0_22_ff; +extern cpuop_func op_efe8_22_nf; +extern cpuop_func op_efe8_22_ff; +extern cpuop_func op_eff0_22_nf; +extern cpuop_func op_eff0_22_ff; +extern cpuop_func op_eff8_22_nf; +extern cpuop_func op_eff8_22_ff; +extern cpuop_func op_eff9_22_nf; +extern cpuop_func op_eff9_22_ff; +extern cpuop_func op_f000_22_nf; +extern cpuop_func op_f000_22_ff; +extern cpuop_func op_f008_22_nf; +extern cpuop_func op_f008_22_ff; +extern cpuop_func op_f010_22_nf; +extern cpuop_func op_f010_22_ff; +extern cpuop_func op_f018_22_nf; +extern cpuop_func op_f018_22_ff; +extern cpuop_func op_f020_22_nf; +extern cpuop_func op_f020_22_ff; +extern cpuop_func op_f028_22_nf; +extern cpuop_func op_f028_22_ff; +extern cpuop_func op_f030_22_nf; +extern cpuop_func op_f030_22_ff; +extern cpuop_func op_f038_22_nf; +extern cpuop_func op_f038_22_ff; +extern cpuop_func op_f039_22_nf; +extern cpuop_func op_f039_22_ff; +extern cpuop_func op_f200_22_nf; +extern cpuop_func op_f200_22_ff; +extern cpuop_func op_f208_22_nf; +extern cpuop_func op_f208_22_ff; +extern cpuop_func op_f210_22_nf; +extern cpuop_func op_f210_22_ff; +extern cpuop_func op_f218_22_nf; +extern cpuop_func op_f218_22_ff; +extern cpuop_func op_f220_22_nf; +extern cpuop_func op_f220_22_ff; +extern cpuop_func op_f228_22_nf; +extern cpuop_func op_f228_22_ff; +extern cpuop_func op_f230_22_nf; +extern cpuop_func op_f230_22_ff; +extern cpuop_func op_f238_22_nf; +extern cpuop_func op_f238_22_ff; +extern cpuop_func op_f239_22_nf; +extern cpuop_func op_f239_22_ff; +extern cpuop_func op_f23a_22_nf; +extern cpuop_func op_f23a_22_ff; +extern cpuop_func op_f23b_22_nf; +extern cpuop_func op_f23b_22_ff; +extern cpuop_func op_f23c_22_nf; +extern cpuop_func op_f23c_22_ff; +extern cpuop_func op_f240_22_nf; +extern cpuop_func op_f240_22_ff; +extern cpuop_func op_f248_22_nf; +extern cpuop_func op_f248_22_ff; +extern cpuop_func op_f250_22_nf; +extern cpuop_func op_f250_22_ff; +extern cpuop_func op_f258_22_nf; +extern cpuop_func op_f258_22_ff; +extern cpuop_func op_f260_22_nf; +extern cpuop_func op_f260_22_ff; +extern cpuop_func op_f268_22_nf; +extern cpuop_func op_f268_22_ff; +extern cpuop_func op_f270_22_nf; +extern cpuop_func op_f270_22_ff; +extern cpuop_func op_f278_22_nf; +extern cpuop_func op_f278_22_ff; +extern cpuop_func op_f279_22_nf; +extern cpuop_func op_f279_22_ff; +extern cpuop_func op_f27a_22_nf; +extern cpuop_func op_f27a_22_ff; +extern cpuop_func op_f27b_22_nf; +extern cpuop_func op_f27b_22_ff; +extern cpuop_func op_f27c_22_nf; +extern cpuop_func op_f27c_22_ff; +extern cpuop_func op_f280_22_nf; +extern cpuop_func op_f280_22_ff; +extern cpuop_func op_f2c0_22_nf; +extern cpuop_func op_f2c0_22_ff; +extern cpuop_func op_f310_22_nf; +extern cpuop_func op_f310_22_ff; +extern cpuop_func op_f320_22_nf; +extern cpuop_func op_f320_22_ff; +extern cpuop_func op_f328_22_nf; +extern cpuop_func op_f328_22_ff; +extern cpuop_func op_f330_22_nf; +extern cpuop_func op_f330_22_ff; +extern cpuop_func op_f338_22_nf; +extern cpuop_func op_f338_22_ff; +extern cpuop_func op_f339_22_nf; +extern cpuop_func op_f339_22_ff; +extern cpuop_func op_f350_22_nf; +extern cpuop_func op_f350_22_ff; +extern cpuop_func op_f358_22_nf; +extern cpuop_func op_f358_22_ff; +extern cpuop_func op_f368_22_nf; +extern cpuop_func op_f368_22_ff; +extern cpuop_func op_f370_22_nf; +extern cpuop_func op_f370_22_ff; +extern cpuop_func op_f378_22_nf; +extern cpuop_func op_f378_22_ff; +extern cpuop_func op_f379_22_nf; +extern cpuop_func op_f379_22_ff; +extern cpuop_func op_f37a_22_nf; +extern cpuop_func op_f37a_22_ff; +extern cpuop_func op_f37b_22_nf; +extern cpuop_func op_f37b_22_ff; +extern cpuop_func_noret op_0000_23_nf; +extern cpuop_func_noret op_0000_23_ff; +extern cpuop_func_noret op_0010_23_nf; +extern cpuop_func_noret op_0010_23_ff; +extern cpuop_func_noret op_0018_23_nf; +extern cpuop_func_noret op_0018_23_ff; +extern cpuop_func_noret op_0020_23_nf; +extern cpuop_func_noret op_0020_23_ff; +extern cpuop_func_noret op_0028_23_nf; +extern cpuop_func_noret op_0028_23_ff; +extern cpuop_func_noret op_0030_23_nf; +extern cpuop_func_noret op_0030_23_ff; +extern cpuop_func_noret op_0038_23_nf; +extern cpuop_func_noret op_0038_23_ff; +extern cpuop_func_noret op_0039_23_nf; +extern cpuop_func_noret op_0039_23_ff; +extern cpuop_func_noret op_003c_23_nf; +extern cpuop_func_noret op_003c_23_ff; +extern cpuop_func_noret op_0040_23_nf; +extern cpuop_func_noret op_0040_23_ff; +extern cpuop_func_noret op_0050_23_nf; +extern cpuop_func_noret op_0050_23_ff; +extern cpuop_func_noret op_0058_23_nf; +extern cpuop_func_noret op_0058_23_ff; +extern cpuop_func_noret op_0060_23_nf; +extern cpuop_func_noret op_0060_23_ff; +extern cpuop_func_noret op_0068_23_nf; +extern cpuop_func_noret op_0068_23_ff; +extern cpuop_func_noret op_0070_23_nf; +extern cpuop_func_noret op_0070_23_ff; +extern cpuop_func_noret op_0078_23_nf; +extern cpuop_func_noret op_0078_23_ff; +extern cpuop_func_noret op_0079_23_nf; +extern cpuop_func_noret op_0079_23_ff; +extern cpuop_func_noret op_007c_23_nf; +extern cpuop_func_noret op_007c_23_ff; +extern cpuop_func_noret op_0080_23_nf; +extern cpuop_func_noret op_0080_23_ff; +extern cpuop_func_noret op_0090_23_nf; +extern cpuop_func_noret op_0090_23_ff; +extern cpuop_func_noret op_0098_23_nf; +extern cpuop_func_noret op_0098_23_ff; +extern cpuop_func_noret op_00a0_23_nf; +extern cpuop_func_noret op_00a0_23_ff; +extern cpuop_func_noret op_00a8_23_nf; +extern cpuop_func_noret op_00a8_23_ff; +extern cpuop_func_noret op_00b0_23_nf; +extern cpuop_func_noret op_00b0_23_ff; +extern cpuop_func_noret op_00b8_23_nf; +extern cpuop_func_noret op_00b8_23_ff; +extern cpuop_func_noret op_00b9_23_nf; +extern cpuop_func_noret op_00b9_23_ff; +extern cpuop_func_noret op_00d0_23_nf; +extern cpuop_func_noret op_00d0_23_ff; +extern cpuop_func_noret op_00e8_23_nf; +extern cpuop_func_noret op_00e8_23_ff; +extern cpuop_func_noret op_00f0_23_nf; +extern cpuop_func_noret op_00f0_23_ff; +extern cpuop_func_noret op_00f8_23_nf; +extern cpuop_func_noret op_00f8_23_ff; +extern cpuop_func_noret op_00f9_23_nf; +extern cpuop_func_noret op_00f9_23_ff; +extern cpuop_func_noret op_00fa_23_nf; +extern cpuop_func_noret op_00fa_23_ff; +extern cpuop_func_noret op_00fb_23_nf; +extern cpuop_func_noret op_00fb_23_ff; +extern cpuop_func_noret op_0100_23_nf; +extern cpuop_func_noret op_0100_23_ff; +extern cpuop_func_noret op_0108_23_nf; +extern cpuop_func_noret op_0108_23_ff; +extern cpuop_func_noret op_0110_23_nf; +extern cpuop_func_noret op_0110_23_ff; +extern cpuop_func_noret op_0118_23_nf; +extern cpuop_func_noret op_0118_23_ff; +extern cpuop_func_noret op_0120_23_nf; +extern cpuop_func_noret op_0120_23_ff; +extern cpuop_func_noret op_0128_23_nf; +extern cpuop_func_noret op_0128_23_ff; +extern cpuop_func_noret op_0130_23_nf; +extern cpuop_func_noret op_0130_23_ff; +extern cpuop_func_noret op_0138_23_nf; +extern cpuop_func_noret op_0138_23_ff; +extern cpuop_func_noret op_0139_23_nf; +extern cpuop_func_noret op_0139_23_ff; +extern cpuop_func_noret op_013a_23_nf; +extern cpuop_func_noret op_013a_23_ff; +extern cpuop_func_noret op_013b_23_nf; +extern cpuop_func_noret op_013b_23_ff; +extern cpuop_func_noret op_013c_23_nf; +extern cpuop_func_noret op_013c_23_ff; +extern cpuop_func_noret op_0140_23_nf; +extern cpuop_func_noret op_0140_23_ff; +extern cpuop_func_noret op_0148_23_nf; +extern cpuop_func_noret op_0148_23_ff; +extern cpuop_func_noret op_0150_23_nf; +extern cpuop_func_noret op_0150_23_ff; +extern cpuop_func_noret op_0158_23_nf; +extern cpuop_func_noret op_0158_23_ff; +extern cpuop_func_noret op_0160_23_nf; +extern cpuop_func_noret op_0160_23_ff; +extern cpuop_func_noret op_0168_23_nf; +extern cpuop_func_noret op_0168_23_ff; +extern cpuop_func_noret op_0170_23_nf; +extern cpuop_func_noret op_0170_23_ff; +extern cpuop_func_noret op_0178_23_nf; +extern cpuop_func_noret op_0178_23_ff; +extern cpuop_func_noret op_0179_23_nf; +extern cpuop_func_noret op_0179_23_ff; +extern cpuop_func_noret op_0180_23_nf; +extern cpuop_func_noret op_0180_23_ff; +extern cpuop_func_noret op_0188_23_nf; +extern cpuop_func_noret op_0188_23_ff; +extern cpuop_func_noret op_0190_23_nf; +extern cpuop_func_noret op_0190_23_ff; +extern cpuop_func_noret op_0198_23_nf; +extern cpuop_func_noret op_0198_23_ff; +extern cpuop_func_noret op_01a0_23_nf; +extern cpuop_func_noret op_01a0_23_ff; +extern cpuop_func_noret op_01a8_23_nf; +extern cpuop_func_noret op_01a8_23_ff; +extern cpuop_func_noret op_01b0_23_nf; +extern cpuop_func_noret op_01b0_23_ff; +extern cpuop_func_noret op_01b8_23_nf; +extern cpuop_func_noret op_01b8_23_ff; +extern cpuop_func_noret op_01b9_23_nf; +extern cpuop_func_noret op_01b9_23_ff; +extern cpuop_func_noret op_01c0_23_nf; +extern cpuop_func_noret op_01c0_23_ff; +extern cpuop_func_noret op_01c8_23_nf; +extern cpuop_func_noret op_01c8_23_ff; +extern cpuop_func_noret op_01d0_23_nf; +extern cpuop_func_noret op_01d0_23_ff; +extern cpuop_func_noret op_01d8_23_nf; +extern cpuop_func_noret op_01d8_23_ff; +extern cpuop_func_noret op_01e0_23_nf; +extern cpuop_func_noret op_01e0_23_ff; +extern cpuop_func_noret op_01e8_23_nf; +extern cpuop_func_noret op_01e8_23_ff; +extern cpuop_func_noret op_01f0_23_nf; +extern cpuop_func_noret op_01f0_23_ff; +extern cpuop_func_noret op_01f8_23_nf; +extern cpuop_func_noret op_01f8_23_ff; +extern cpuop_func_noret op_01f9_23_nf; +extern cpuop_func_noret op_01f9_23_ff; +extern cpuop_func_noret op_0200_23_nf; +extern cpuop_func_noret op_0200_23_ff; +extern cpuop_func_noret op_0210_23_nf; +extern cpuop_func_noret op_0210_23_ff; +extern cpuop_func_noret op_0218_23_nf; +extern cpuop_func_noret op_0218_23_ff; +extern cpuop_func_noret op_0220_23_nf; +extern cpuop_func_noret op_0220_23_ff; +extern cpuop_func_noret op_0228_23_nf; +extern cpuop_func_noret op_0228_23_ff; +extern cpuop_func_noret op_0230_23_nf; +extern cpuop_func_noret op_0230_23_ff; +extern cpuop_func_noret op_0238_23_nf; +extern cpuop_func_noret op_0238_23_ff; +extern cpuop_func_noret op_0239_23_nf; +extern cpuop_func_noret op_0239_23_ff; +extern cpuop_func_noret op_023c_23_nf; +extern cpuop_func_noret op_023c_23_ff; +extern cpuop_func_noret op_0240_23_nf; +extern cpuop_func_noret op_0240_23_ff; +extern cpuop_func_noret op_0250_23_nf; +extern cpuop_func_noret op_0250_23_ff; +extern cpuop_func_noret op_0258_23_nf; +extern cpuop_func_noret op_0258_23_ff; +extern cpuop_func_noret op_0260_23_nf; +extern cpuop_func_noret op_0260_23_ff; +extern cpuop_func_noret op_0268_23_nf; +extern cpuop_func_noret op_0268_23_ff; +extern cpuop_func_noret op_0270_23_nf; +extern cpuop_func_noret op_0270_23_ff; +extern cpuop_func_noret op_0278_23_nf; +extern cpuop_func_noret op_0278_23_ff; +extern cpuop_func_noret op_0279_23_nf; +extern cpuop_func_noret op_0279_23_ff; +extern cpuop_func_noret op_027c_23_nf; +extern cpuop_func_noret op_027c_23_ff; +extern cpuop_func_noret op_0280_23_nf; +extern cpuop_func_noret op_0280_23_ff; +extern cpuop_func_noret op_0290_23_nf; +extern cpuop_func_noret op_0290_23_ff; +extern cpuop_func_noret op_0298_23_nf; +extern cpuop_func_noret op_0298_23_ff; +extern cpuop_func_noret op_02a0_23_nf; +extern cpuop_func_noret op_02a0_23_ff; +extern cpuop_func_noret op_02a8_23_nf; +extern cpuop_func_noret op_02a8_23_ff; +extern cpuop_func_noret op_02b0_23_nf; +extern cpuop_func_noret op_02b0_23_ff; +extern cpuop_func_noret op_02b8_23_nf; +extern cpuop_func_noret op_02b8_23_ff; +extern cpuop_func_noret op_02b9_23_nf; +extern cpuop_func_noret op_02b9_23_ff; +extern cpuop_func_noret op_02d0_23_nf; +extern cpuop_func_noret op_02d0_23_ff; +extern cpuop_func_noret op_02e8_23_nf; +extern cpuop_func_noret op_02e8_23_ff; +extern cpuop_func_noret op_02f0_23_nf; +extern cpuop_func_noret op_02f0_23_ff; +extern cpuop_func_noret op_02f8_23_nf; +extern cpuop_func_noret op_02f8_23_ff; +extern cpuop_func_noret op_02f9_23_nf; +extern cpuop_func_noret op_02f9_23_ff; +extern cpuop_func_noret op_02fa_23_nf; +extern cpuop_func_noret op_02fa_23_ff; +extern cpuop_func_noret op_02fb_23_nf; +extern cpuop_func_noret op_02fb_23_ff; +extern cpuop_func_noret op_0400_23_nf; +extern cpuop_func_noret op_0400_23_ff; +extern cpuop_func_noret op_0410_23_nf; +extern cpuop_func_noret op_0410_23_ff; +extern cpuop_func_noret op_0418_23_nf; +extern cpuop_func_noret op_0418_23_ff; +extern cpuop_func_noret op_0420_23_nf; +extern cpuop_func_noret op_0420_23_ff; +extern cpuop_func_noret op_0428_23_nf; +extern cpuop_func_noret op_0428_23_ff; +extern cpuop_func_noret op_0430_23_nf; +extern cpuop_func_noret op_0430_23_ff; +extern cpuop_func_noret op_0438_23_nf; +extern cpuop_func_noret op_0438_23_ff; +extern cpuop_func_noret op_0439_23_nf; +extern cpuop_func_noret op_0439_23_ff; +extern cpuop_func_noret op_0440_23_nf; +extern cpuop_func_noret op_0440_23_ff; +extern cpuop_func_noret op_0450_23_nf; +extern cpuop_func_noret op_0450_23_ff; +extern cpuop_func_noret op_0458_23_nf; +extern cpuop_func_noret op_0458_23_ff; +extern cpuop_func_noret op_0460_23_nf; +extern cpuop_func_noret op_0460_23_ff; +extern cpuop_func_noret op_0468_23_nf; +extern cpuop_func_noret op_0468_23_ff; +extern cpuop_func_noret op_0470_23_nf; +extern cpuop_func_noret op_0470_23_ff; +extern cpuop_func_noret op_0478_23_nf; +extern cpuop_func_noret op_0478_23_ff; +extern cpuop_func_noret op_0479_23_nf; +extern cpuop_func_noret op_0479_23_ff; +extern cpuop_func_noret op_0480_23_nf; +extern cpuop_func_noret op_0480_23_ff; +extern cpuop_func_noret op_0490_23_nf; +extern cpuop_func_noret op_0490_23_ff; +extern cpuop_func_noret op_0498_23_nf; +extern cpuop_func_noret op_0498_23_ff; +extern cpuop_func_noret op_04a0_23_nf; +extern cpuop_func_noret op_04a0_23_ff; +extern cpuop_func_noret op_04a8_23_nf; +extern cpuop_func_noret op_04a8_23_ff; +extern cpuop_func_noret op_04b0_23_nf; +extern cpuop_func_noret op_04b0_23_ff; +extern cpuop_func_noret op_04b8_23_nf; +extern cpuop_func_noret op_04b8_23_ff; +extern cpuop_func_noret op_04b9_23_nf; +extern cpuop_func_noret op_04b9_23_ff; +extern cpuop_func_noret op_04d0_23_nf; +extern cpuop_func_noret op_04d0_23_ff; +extern cpuop_func_noret op_04e8_23_nf; +extern cpuop_func_noret op_04e8_23_ff; +extern cpuop_func_noret op_04f0_23_nf; +extern cpuop_func_noret op_04f0_23_ff; +extern cpuop_func_noret op_04f8_23_nf; +extern cpuop_func_noret op_04f8_23_ff; +extern cpuop_func_noret op_04f9_23_nf; +extern cpuop_func_noret op_04f9_23_ff; +extern cpuop_func_noret op_04fa_23_nf; +extern cpuop_func_noret op_04fa_23_ff; +extern cpuop_func_noret op_04fb_23_nf; +extern cpuop_func_noret op_04fb_23_ff; +extern cpuop_func_noret op_0600_23_nf; +extern cpuop_func_noret op_0600_23_ff; +extern cpuop_func_noret op_0610_23_nf; +extern cpuop_func_noret op_0610_23_ff; +extern cpuop_func_noret op_0618_23_nf; +extern cpuop_func_noret op_0618_23_ff; +extern cpuop_func_noret op_0620_23_nf; +extern cpuop_func_noret op_0620_23_ff; +extern cpuop_func_noret op_0628_23_nf; +extern cpuop_func_noret op_0628_23_ff; +extern cpuop_func_noret op_0630_23_nf; +extern cpuop_func_noret op_0630_23_ff; +extern cpuop_func_noret op_0638_23_nf; +extern cpuop_func_noret op_0638_23_ff; +extern cpuop_func_noret op_0639_23_nf; +extern cpuop_func_noret op_0639_23_ff; +extern cpuop_func_noret op_0640_23_nf; +extern cpuop_func_noret op_0640_23_ff; +extern cpuop_func_noret op_0650_23_nf; +extern cpuop_func_noret op_0650_23_ff; +extern cpuop_func_noret op_0658_23_nf; +extern cpuop_func_noret op_0658_23_ff; +extern cpuop_func_noret op_0660_23_nf; +extern cpuop_func_noret op_0660_23_ff; +extern cpuop_func_noret op_0668_23_nf; +extern cpuop_func_noret op_0668_23_ff; +extern cpuop_func_noret op_0670_23_nf; +extern cpuop_func_noret op_0670_23_ff; +extern cpuop_func_noret op_0678_23_nf; +extern cpuop_func_noret op_0678_23_ff; +extern cpuop_func_noret op_0679_23_nf; +extern cpuop_func_noret op_0679_23_ff; +extern cpuop_func_noret op_0680_23_nf; +extern cpuop_func_noret op_0680_23_ff; +extern cpuop_func_noret op_0690_23_nf; +extern cpuop_func_noret op_0690_23_ff; +extern cpuop_func_noret op_0698_23_nf; +extern cpuop_func_noret op_0698_23_ff; +extern cpuop_func_noret op_06a0_23_nf; +extern cpuop_func_noret op_06a0_23_ff; +extern cpuop_func_noret op_06a8_23_nf; +extern cpuop_func_noret op_06a8_23_ff; +extern cpuop_func_noret op_06b0_23_nf; +extern cpuop_func_noret op_06b0_23_ff; +extern cpuop_func_noret op_06b8_23_nf; +extern cpuop_func_noret op_06b8_23_ff; +extern cpuop_func_noret op_06b9_23_nf; +extern cpuop_func_noret op_06b9_23_ff; +extern cpuop_func_noret op_06c0_23_nf; +extern cpuop_func_noret op_06c0_23_ff; +extern cpuop_func_noret op_06c8_23_nf; +extern cpuop_func_noret op_06c8_23_ff; +extern cpuop_func_noret op_06d0_23_nf; +extern cpuop_func_noret op_06d0_23_ff; +extern cpuop_func_noret op_06e8_23_nf; +extern cpuop_func_noret op_06e8_23_ff; +extern cpuop_func_noret op_06f0_23_nf; +extern cpuop_func_noret op_06f0_23_ff; +extern cpuop_func_noret op_06f8_23_nf; +extern cpuop_func_noret op_06f8_23_ff; +extern cpuop_func_noret op_06f9_23_nf; +extern cpuop_func_noret op_06f9_23_ff; +extern cpuop_func_noret op_06fa_23_nf; +extern cpuop_func_noret op_06fa_23_ff; +extern cpuop_func_noret op_06fb_23_nf; +extern cpuop_func_noret op_06fb_23_ff; +extern cpuop_func_noret op_0800_23_nf; +extern cpuop_func_noret op_0800_23_ff; +extern cpuop_func_noret op_0810_23_nf; +extern cpuop_func_noret op_0810_23_ff; +extern cpuop_func_noret op_0818_23_nf; +extern cpuop_func_noret op_0818_23_ff; +extern cpuop_func_noret op_0820_23_nf; +extern cpuop_func_noret op_0820_23_ff; +extern cpuop_func_noret op_0828_23_nf; +extern cpuop_func_noret op_0828_23_ff; +extern cpuop_func_noret op_0830_23_nf; +extern cpuop_func_noret op_0830_23_ff; +extern cpuop_func_noret op_0838_23_nf; +extern cpuop_func_noret op_0838_23_ff; +extern cpuop_func_noret op_0839_23_nf; +extern cpuop_func_noret op_0839_23_ff; +extern cpuop_func_noret op_083a_23_nf; +extern cpuop_func_noret op_083a_23_ff; +extern cpuop_func_noret op_083b_23_nf; +extern cpuop_func_noret op_083b_23_ff; +extern cpuop_func_noret op_0840_23_nf; +extern cpuop_func_noret op_0840_23_ff; +extern cpuop_func_noret op_0850_23_nf; +extern cpuop_func_noret op_0850_23_ff; +extern cpuop_func_noret op_0858_23_nf; +extern cpuop_func_noret op_0858_23_ff; +extern cpuop_func_noret op_0860_23_nf; +extern cpuop_func_noret op_0860_23_ff; +extern cpuop_func_noret op_0868_23_nf; +extern cpuop_func_noret op_0868_23_ff; +extern cpuop_func_noret op_0870_23_nf; +extern cpuop_func_noret op_0870_23_ff; +extern cpuop_func_noret op_0878_23_nf; +extern cpuop_func_noret op_0878_23_ff; +extern cpuop_func_noret op_0879_23_nf; +extern cpuop_func_noret op_0879_23_ff; +extern cpuop_func_noret op_0880_23_nf; +extern cpuop_func_noret op_0880_23_ff; +extern cpuop_func_noret op_0890_23_nf; +extern cpuop_func_noret op_0890_23_ff; +extern cpuop_func_noret op_0898_23_nf; +extern cpuop_func_noret op_0898_23_ff; +extern cpuop_func_noret op_08a0_23_nf; +extern cpuop_func_noret op_08a0_23_ff; +extern cpuop_func_noret op_08a8_23_nf; +extern cpuop_func_noret op_08a8_23_ff; +extern cpuop_func_noret op_08b0_23_nf; +extern cpuop_func_noret op_08b0_23_ff; +extern cpuop_func_noret op_08b8_23_nf; +extern cpuop_func_noret op_08b8_23_ff; +extern cpuop_func_noret op_08b9_23_nf; +extern cpuop_func_noret op_08b9_23_ff; +extern cpuop_func_noret op_08c0_23_nf; +extern cpuop_func_noret op_08c0_23_ff; +extern cpuop_func_noret op_08d0_23_nf; +extern cpuop_func_noret op_08d0_23_ff; +extern cpuop_func_noret op_08d8_23_nf; +extern cpuop_func_noret op_08d8_23_ff; +extern cpuop_func_noret op_08e0_23_nf; +extern cpuop_func_noret op_08e0_23_ff; +extern cpuop_func_noret op_08e8_23_nf; +extern cpuop_func_noret op_08e8_23_ff; +extern cpuop_func_noret op_08f0_23_nf; +extern cpuop_func_noret op_08f0_23_ff; +extern cpuop_func_noret op_08f8_23_nf; +extern cpuop_func_noret op_08f8_23_ff; +extern cpuop_func_noret op_08f9_23_nf; +extern cpuop_func_noret op_08f9_23_ff; +extern cpuop_func_noret op_0a00_23_nf; +extern cpuop_func_noret op_0a00_23_ff; +extern cpuop_func_noret op_0a10_23_nf; +extern cpuop_func_noret op_0a10_23_ff; +extern cpuop_func_noret op_0a18_23_nf; +extern cpuop_func_noret op_0a18_23_ff; +extern cpuop_func_noret op_0a20_23_nf; +extern cpuop_func_noret op_0a20_23_ff; +extern cpuop_func_noret op_0a28_23_nf; +extern cpuop_func_noret op_0a28_23_ff; +extern cpuop_func_noret op_0a30_23_nf; +extern cpuop_func_noret op_0a30_23_ff; +extern cpuop_func_noret op_0a38_23_nf; +extern cpuop_func_noret op_0a38_23_ff; +extern cpuop_func_noret op_0a39_23_nf; +extern cpuop_func_noret op_0a39_23_ff; +extern cpuop_func_noret op_0a3c_23_nf; +extern cpuop_func_noret op_0a3c_23_ff; +extern cpuop_func_noret op_0a40_23_nf; +extern cpuop_func_noret op_0a40_23_ff; +extern cpuop_func_noret op_0a50_23_nf; +extern cpuop_func_noret op_0a50_23_ff; +extern cpuop_func_noret op_0a58_23_nf; +extern cpuop_func_noret op_0a58_23_ff; +extern cpuop_func_noret op_0a60_23_nf; +extern cpuop_func_noret op_0a60_23_ff; +extern cpuop_func_noret op_0a68_23_nf; +extern cpuop_func_noret op_0a68_23_ff; +extern cpuop_func_noret op_0a70_23_nf; +extern cpuop_func_noret op_0a70_23_ff; +extern cpuop_func_noret op_0a78_23_nf; +extern cpuop_func_noret op_0a78_23_ff; +extern cpuop_func_noret op_0a79_23_nf; +extern cpuop_func_noret op_0a79_23_ff; +extern cpuop_func_noret op_0a7c_23_nf; +extern cpuop_func_noret op_0a7c_23_ff; +extern cpuop_func_noret op_0a80_23_nf; +extern cpuop_func_noret op_0a80_23_ff; +extern cpuop_func_noret op_0a90_23_nf; +extern cpuop_func_noret op_0a90_23_ff; +extern cpuop_func_noret op_0a98_23_nf; +extern cpuop_func_noret op_0a98_23_ff; +extern cpuop_func_noret op_0aa0_23_nf; +extern cpuop_func_noret op_0aa0_23_ff; +extern cpuop_func_noret op_0aa8_23_nf; +extern cpuop_func_noret op_0aa8_23_ff; +extern cpuop_func_noret op_0ab0_23_nf; +extern cpuop_func_noret op_0ab0_23_ff; +extern cpuop_func_noret op_0ab8_23_nf; +extern cpuop_func_noret op_0ab8_23_ff; +extern cpuop_func_noret op_0ab9_23_nf; +extern cpuop_func_noret op_0ab9_23_ff; +extern cpuop_func_noret op_0ad0_23_nf; +extern cpuop_func_noret op_0ad0_23_ff; +extern cpuop_func_noret op_0ad8_23_nf; +extern cpuop_func_noret op_0ad8_23_ff; +extern cpuop_func_noret op_0ae0_23_nf; +extern cpuop_func_noret op_0ae0_23_ff; +extern cpuop_func_noret op_0ae8_23_nf; +extern cpuop_func_noret op_0ae8_23_ff; +extern cpuop_func_noret op_0af0_23_nf; +extern cpuop_func_noret op_0af0_23_ff; +extern cpuop_func_noret op_0af8_23_nf; +extern cpuop_func_noret op_0af8_23_ff; +extern cpuop_func_noret op_0af9_23_nf; +extern cpuop_func_noret op_0af9_23_ff; +extern cpuop_func_noret op_0c00_23_nf; +extern cpuop_func_noret op_0c00_23_ff; +extern cpuop_func_noret op_0c10_23_nf; +extern cpuop_func_noret op_0c10_23_ff; +extern cpuop_func_noret op_0c18_23_nf; +extern cpuop_func_noret op_0c18_23_ff; +extern cpuop_func_noret op_0c20_23_nf; +extern cpuop_func_noret op_0c20_23_ff; +extern cpuop_func_noret op_0c28_23_nf; +extern cpuop_func_noret op_0c28_23_ff; +extern cpuop_func_noret op_0c30_23_nf; +extern cpuop_func_noret op_0c30_23_ff; +extern cpuop_func_noret op_0c38_23_nf; +extern cpuop_func_noret op_0c38_23_ff; +extern cpuop_func_noret op_0c39_23_nf; +extern cpuop_func_noret op_0c39_23_ff; +extern cpuop_func_noret op_0c3a_23_nf; +extern cpuop_func_noret op_0c3a_23_ff; +extern cpuop_func_noret op_0c3b_23_nf; +extern cpuop_func_noret op_0c3b_23_ff; +extern cpuop_func_noret op_0c40_23_nf; +extern cpuop_func_noret op_0c40_23_ff; +extern cpuop_func_noret op_0c50_23_nf; +extern cpuop_func_noret op_0c50_23_ff; +extern cpuop_func_noret op_0c58_23_nf; +extern cpuop_func_noret op_0c58_23_ff; +extern cpuop_func_noret op_0c60_23_nf; +extern cpuop_func_noret op_0c60_23_ff; +extern cpuop_func_noret op_0c68_23_nf; +extern cpuop_func_noret op_0c68_23_ff; +extern cpuop_func_noret op_0c70_23_nf; +extern cpuop_func_noret op_0c70_23_ff; +extern cpuop_func_noret op_0c78_23_nf; +extern cpuop_func_noret op_0c78_23_ff; +extern cpuop_func_noret op_0c79_23_nf; +extern cpuop_func_noret op_0c79_23_ff; +extern cpuop_func_noret op_0c7a_23_nf; +extern cpuop_func_noret op_0c7a_23_ff; +extern cpuop_func_noret op_0c7b_23_nf; +extern cpuop_func_noret op_0c7b_23_ff; +extern cpuop_func_noret op_0c80_23_nf; +extern cpuop_func_noret op_0c80_23_ff; +extern cpuop_func_noret op_0c90_23_nf; +extern cpuop_func_noret op_0c90_23_ff; +extern cpuop_func_noret op_0c98_23_nf; +extern cpuop_func_noret op_0c98_23_ff; +extern cpuop_func_noret op_0ca0_23_nf; +extern cpuop_func_noret op_0ca0_23_ff; +extern cpuop_func_noret op_0ca8_23_nf; +extern cpuop_func_noret op_0ca8_23_ff; +extern cpuop_func_noret op_0cb0_23_nf; +extern cpuop_func_noret op_0cb0_23_ff; +extern cpuop_func_noret op_0cb8_23_nf; +extern cpuop_func_noret op_0cb8_23_ff; +extern cpuop_func_noret op_0cb9_23_nf; +extern cpuop_func_noret op_0cb9_23_ff; +extern cpuop_func_noret op_0cba_23_nf; +extern cpuop_func_noret op_0cba_23_ff; +extern cpuop_func_noret op_0cbb_23_nf; +extern cpuop_func_noret op_0cbb_23_ff; +extern cpuop_func_noret op_0cd0_23_nf; +extern cpuop_func_noret op_0cd0_23_ff; +extern cpuop_func_noret op_0cd8_23_nf; +extern cpuop_func_noret op_0cd8_23_ff; +extern cpuop_func_noret op_0ce0_23_nf; +extern cpuop_func_noret op_0ce0_23_ff; +extern cpuop_func_noret op_0ce8_23_nf; +extern cpuop_func_noret op_0ce8_23_ff; +extern cpuop_func_noret op_0cf0_23_nf; +extern cpuop_func_noret op_0cf0_23_ff; +extern cpuop_func_noret op_0cf8_23_nf; +extern cpuop_func_noret op_0cf8_23_ff; +extern cpuop_func_noret op_0cf9_23_nf; +extern cpuop_func_noret op_0cf9_23_ff; +extern cpuop_func_noret op_0cfc_23_nf; +extern cpuop_func_noret op_0cfc_23_ff; +extern cpuop_func_noret op_0e10_23_nf; +extern cpuop_func_noret op_0e10_23_ff; +extern cpuop_func_noret op_0e18_23_nf; +extern cpuop_func_noret op_0e18_23_ff; +extern cpuop_func_noret op_0e20_23_nf; +extern cpuop_func_noret op_0e20_23_ff; +extern cpuop_func_noret op_0e28_23_nf; +extern cpuop_func_noret op_0e28_23_ff; +extern cpuop_func_noret op_0e30_23_nf; +extern cpuop_func_noret op_0e30_23_ff; +extern cpuop_func_noret op_0e38_23_nf; +extern cpuop_func_noret op_0e38_23_ff; +extern cpuop_func_noret op_0e39_23_nf; +extern cpuop_func_noret op_0e39_23_ff; +extern cpuop_func_noret op_0e50_23_nf; +extern cpuop_func_noret op_0e50_23_ff; +extern cpuop_func_noret op_0e58_23_nf; +extern cpuop_func_noret op_0e58_23_ff; +extern cpuop_func_noret op_0e60_23_nf; +extern cpuop_func_noret op_0e60_23_ff; +extern cpuop_func_noret op_0e68_23_nf; +extern cpuop_func_noret op_0e68_23_ff; +extern cpuop_func_noret op_0e70_23_nf; +extern cpuop_func_noret op_0e70_23_ff; +extern cpuop_func_noret op_0e78_23_nf; +extern cpuop_func_noret op_0e78_23_ff; +extern cpuop_func_noret op_0e79_23_nf; +extern cpuop_func_noret op_0e79_23_ff; +extern cpuop_func_noret op_0e90_23_nf; +extern cpuop_func_noret op_0e90_23_ff; +extern cpuop_func_noret op_0e98_23_nf; +extern cpuop_func_noret op_0e98_23_ff; +extern cpuop_func_noret op_0ea0_23_nf; +extern cpuop_func_noret op_0ea0_23_ff; +extern cpuop_func_noret op_0ea8_23_nf; +extern cpuop_func_noret op_0ea8_23_ff; +extern cpuop_func_noret op_0eb0_23_nf; +extern cpuop_func_noret op_0eb0_23_ff; +extern cpuop_func_noret op_0eb8_23_nf; +extern cpuop_func_noret op_0eb8_23_ff; +extern cpuop_func_noret op_0eb9_23_nf; +extern cpuop_func_noret op_0eb9_23_ff; +extern cpuop_func_noret op_0ed0_23_nf; +extern cpuop_func_noret op_0ed0_23_ff; +extern cpuop_func_noret op_0ed8_23_nf; +extern cpuop_func_noret op_0ed8_23_ff; +extern cpuop_func_noret op_0ee0_23_nf; +extern cpuop_func_noret op_0ee0_23_ff; +extern cpuop_func_noret op_0ee8_23_nf; +extern cpuop_func_noret op_0ee8_23_ff; +extern cpuop_func_noret op_0ef0_23_nf; +extern cpuop_func_noret op_0ef0_23_ff; +extern cpuop_func_noret op_0ef8_23_nf; +extern cpuop_func_noret op_0ef8_23_ff; +extern cpuop_func_noret op_0ef9_23_nf; +extern cpuop_func_noret op_0ef9_23_ff; +extern cpuop_func_noret op_0efc_23_nf; +extern cpuop_func_noret op_0efc_23_ff; +extern cpuop_func_noret op_1000_23_nf; +extern cpuop_func_noret op_1000_23_ff; +extern cpuop_func_noret op_1010_23_nf; +extern cpuop_func_noret op_1010_23_ff; +extern cpuop_func_noret op_1018_23_nf; +extern cpuop_func_noret op_1018_23_ff; +extern cpuop_func_noret op_1020_23_nf; +extern cpuop_func_noret op_1020_23_ff; +extern cpuop_func_noret op_1028_23_nf; +extern cpuop_func_noret op_1028_23_ff; +extern cpuop_func_noret op_1030_23_nf; +extern cpuop_func_noret op_1030_23_ff; +extern cpuop_func_noret op_1038_23_nf; +extern cpuop_func_noret op_1038_23_ff; +extern cpuop_func_noret op_1039_23_nf; +extern cpuop_func_noret op_1039_23_ff; +extern cpuop_func_noret op_103a_23_nf; +extern cpuop_func_noret op_103a_23_ff; +extern cpuop_func_noret op_103b_23_nf; +extern cpuop_func_noret op_103b_23_ff; +extern cpuop_func_noret op_103c_23_nf; +extern cpuop_func_noret op_103c_23_ff; +extern cpuop_func_noret op_1080_23_nf; +extern cpuop_func_noret op_1080_23_ff; +extern cpuop_func_noret op_1090_23_nf; +extern cpuop_func_noret op_1090_23_ff; +extern cpuop_func_noret op_1098_23_nf; +extern cpuop_func_noret op_1098_23_ff; +extern cpuop_func_noret op_10a0_23_nf; +extern cpuop_func_noret op_10a0_23_ff; +extern cpuop_func_noret op_10a8_23_nf; +extern cpuop_func_noret op_10a8_23_ff; +extern cpuop_func_noret op_10b0_23_nf; +extern cpuop_func_noret op_10b0_23_ff; +extern cpuop_func_noret op_10b8_23_nf; +extern cpuop_func_noret op_10b8_23_ff; +extern cpuop_func_noret op_10b9_23_nf; +extern cpuop_func_noret op_10b9_23_ff; +extern cpuop_func_noret op_10ba_23_nf; +extern cpuop_func_noret op_10ba_23_ff; +extern cpuop_func_noret op_10bb_23_nf; +extern cpuop_func_noret op_10bb_23_ff; +extern cpuop_func_noret op_10bc_23_nf; +extern cpuop_func_noret op_10bc_23_ff; +extern cpuop_func_noret op_10c0_23_nf; +extern cpuop_func_noret op_10c0_23_ff; +extern cpuop_func_noret op_10d0_23_nf; +extern cpuop_func_noret op_10d0_23_ff; +extern cpuop_func_noret op_10d8_23_nf; +extern cpuop_func_noret op_10d8_23_ff; +extern cpuop_func_noret op_10e0_23_nf; +extern cpuop_func_noret op_10e0_23_ff; +extern cpuop_func_noret op_10e8_23_nf; +extern cpuop_func_noret op_10e8_23_ff; +extern cpuop_func_noret op_10f0_23_nf; +extern cpuop_func_noret op_10f0_23_ff; +extern cpuop_func_noret op_10f8_23_nf; +extern cpuop_func_noret op_10f8_23_ff; +extern cpuop_func_noret op_10f9_23_nf; +extern cpuop_func_noret op_10f9_23_ff; +extern cpuop_func_noret op_10fa_23_nf; +extern cpuop_func_noret op_10fa_23_ff; +extern cpuop_func_noret op_10fb_23_nf; +extern cpuop_func_noret op_10fb_23_ff; +extern cpuop_func_noret op_10fc_23_nf; +extern cpuop_func_noret op_10fc_23_ff; +extern cpuop_func_noret op_1100_23_nf; +extern cpuop_func_noret op_1100_23_ff; +extern cpuop_func_noret op_1110_23_nf; +extern cpuop_func_noret op_1110_23_ff; +extern cpuop_func_noret op_1118_23_nf; +extern cpuop_func_noret op_1118_23_ff; +extern cpuop_func_noret op_1120_23_nf; +extern cpuop_func_noret op_1120_23_ff; +extern cpuop_func_noret op_1128_23_nf; +extern cpuop_func_noret op_1128_23_ff; +extern cpuop_func_noret op_1130_23_nf; +extern cpuop_func_noret op_1130_23_ff; +extern cpuop_func_noret op_1138_23_nf; +extern cpuop_func_noret op_1138_23_ff; +extern cpuop_func_noret op_1139_23_nf; +extern cpuop_func_noret op_1139_23_ff; +extern cpuop_func_noret op_113a_23_nf; +extern cpuop_func_noret op_113a_23_ff; +extern cpuop_func_noret op_113b_23_nf; +extern cpuop_func_noret op_113b_23_ff; +extern cpuop_func_noret op_113c_23_nf; +extern cpuop_func_noret op_113c_23_ff; +extern cpuop_func_noret op_1140_23_nf; +extern cpuop_func_noret op_1140_23_ff; +extern cpuop_func_noret op_1150_23_nf; +extern cpuop_func_noret op_1150_23_ff; +extern cpuop_func_noret op_1158_23_nf; +extern cpuop_func_noret op_1158_23_ff; +extern cpuop_func_noret op_1160_23_nf; +extern cpuop_func_noret op_1160_23_ff; +extern cpuop_func_noret op_1168_23_nf; +extern cpuop_func_noret op_1168_23_ff; +extern cpuop_func_noret op_1170_23_nf; +extern cpuop_func_noret op_1170_23_ff; +extern cpuop_func_noret op_1178_23_nf; +extern cpuop_func_noret op_1178_23_ff; +extern cpuop_func_noret op_1179_23_nf; +extern cpuop_func_noret op_1179_23_ff; +extern cpuop_func_noret op_117a_23_nf; +extern cpuop_func_noret op_117a_23_ff; +extern cpuop_func_noret op_117b_23_nf; +extern cpuop_func_noret op_117b_23_ff; +extern cpuop_func_noret op_117c_23_nf; +extern cpuop_func_noret op_117c_23_ff; +extern cpuop_func_noret op_1180_23_nf; +extern cpuop_func_noret op_1180_23_ff; +extern cpuop_func_noret op_1190_23_nf; +extern cpuop_func_noret op_1190_23_ff; +extern cpuop_func_noret op_1198_23_nf; +extern cpuop_func_noret op_1198_23_ff; +extern cpuop_func_noret op_11a0_23_nf; +extern cpuop_func_noret op_11a0_23_ff; +extern cpuop_func_noret op_11a8_23_nf; +extern cpuop_func_noret op_11a8_23_ff; +extern cpuop_func_noret op_11b0_23_nf; +extern cpuop_func_noret op_11b0_23_ff; +extern cpuop_func_noret op_11b8_23_nf; +extern cpuop_func_noret op_11b8_23_ff; +extern cpuop_func_noret op_11b9_23_nf; +extern cpuop_func_noret op_11b9_23_ff; +extern cpuop_func_noret op_11ba_23_nf; +extern cpuop_func_noret op_11ba_23_ff; +extern cpuop_func_noret op_11bb_23_nf; +extern cpuop_func_noret op_11bb_23_ff; +extern cpuop_func_noret op_11bc_23_nf; +extern cpuop_func_noret op_11bc_23_ff; +extern cpuop_func_noret op_11c0_23_nf; +extern cpuop_func_noret op_11c0_23_ff; +extern cpuop_func_noret op_11d0_23_nf; +extern cpuop_func_noret op_11d0_23_ff; +extern cpuop_func_noret op_11d8_23_nf; +extern cpuop_func_noret op_11d8_23_ff; +extern cpuop_func_noret op_11e0_23_nf; +extern cpuop_func_noret op_11e0_23_ff; +extern cpuop_func_noret op_11e8_23_nf; +extern cpuop_func_noret op_11e8_23_ff; +extern cpuop_func_noret op_11f0_23_nf; +extern cpuop_func_noret op_11f0_23_ff; +extern cpuop_func_noret op_11f8_23_nf; +extern cpuop_func_noret op_11f8_23_ff; +extern cpuop_func_noret op_11f9_23_nf; +extern cpuop_func_noret op_11f9_23_ff; +extern cpuop_func_noret op_11fa_23_nf; +extern cpuop_func_noret op_11fa_23_ff; +extern cpuop_func_noret op_11fb_23_nf; +extern cpuop_func_noret op_11fb_23_ff; +extern cpuop_func_noret op_11fc_23_nf; +extern cpuop_func_noret op_11fc_23_ff; +extern cpuop_func_noret op_13c0_23_nf; +extern cpuop_func_noret op_13c0_23_ff; +extern cpuop_func_noret op_13d0_23_nf; +extern cpuop_func_noret op_13d0_23_ff; +extern cpuop_func_noret op_13d8_23_nf; +extern cpuop_func_noret op_13d8_23_ff; +extern cpuop_func_noret op_13e0_23_nf; +extern cpuop_func_noret op_13e0_23_ff; +extern cpuop_func_noret op_13e8_23_nf; +extern cpuop_func_noret op_13e8_23_ff; +extern cpuop_func_noret op_13f0_23_nf; +extern cpuop_func_noret op_13f0_23_ff; +extern cpuop_func_noret op_13f8_23_nf; +extern cpuop_func_noret op_13f8_23_ff; +extern cpuop_func_noret op_13f9_23_nf; +extern cpuop_func_noret op_13f9_23_ff; +extern cpuop_func_noret op_13fa_23_nf; +extern cpuop_func_noret op_13fa_23_ff; +extern cpuop_func_noret op_13fb_23_nf; +extern cpuop_func_noret op_13fb_23_ff; +extern cpuop_func_noret op_13fc_23_nf; +extern cpuop_func_noret op_13fc_23_ff; +extern cpuop_func_noret op_2000_23_nf; +extern cpuop_func_noret op_2000_23_ff; +extern cpuop_func_noret op_2008_23_nf; +extern cpuop_func_noret op_2008_23_ff; +extern cpuop_func_noret op_2010_23_nf; +extern cpuop_func_noret op_2010_23_ff; +extern cpuop_func_noret op_2018_23_nf; +extern cpuop_func_noret op_2018_23_ff; +extern cpuop_func_noret op_2020_23_nf; +extern cpuop_func_noret op_2020_23_ff; +extern cpuop_func_noret op_2028_23_nf; +extern cpuop_func_noret op_2028_23_ff; +extern cpuop_func_noret op_2030_23_nf; +extern cpuop_func_noret op_2030_23_ff; +extern cpuop_func_noret op_2038_23_nf; +extern cpuop_func_noret op_2038_23_ff; +extern cpuop_func_noret op_2039_23_nf; +extern cpuop_func_noret op_2039_23_ff; +extern cpuop_func_noret op_203a_23_nf; +extern cpuop_func_noret op_203a_23_ff; +extern cpuop_func_noret op_203b_23_nf; +extern cpuop_func_noret op_203b_23_ff; +extern cpuop_func_noret op_203c_23_nf; +extern cpuop_func_noret op_203c_23_ff; +extern cpuop_func_noret op_2040_23_nf; +extern cpuop_func_noret op_2040_23_ff; +extern cpuop_func_noret op_2048_23_nf; +extern cpuop_func_noret op_2048_23_ff; +extern cpuop_func_noret op_2050_23_nf; +extern cpuop_func_noret op_2050_23_ff; +extern cpuop_func_noret op_2058_23_nf; +extern cpuop_func_noret op_2058_23_ff; +extern cpuop_func_noret op_2060_23_nf; +extern cpuop_func_noret op_2060_23_ff; +extern cpuop_func_noret op_2068_23_nf; +extern cpuop_func_noret op_2068_23_ff; +extern cpuop_func_noret op_2070_23_nf; +extern cpuop_func_noret op_2070_23_ff; +extern cpuop_func_noret op_2078_23_nf; +extern cpuop_func_noret op_2078_23_ff; +extern cpuop_func_noret op_2079_23_nf; +extern cpuop_func_noret op_2079_23_ff; +extern cpuop_func_noret op_207a_23_nf; +extern cpuop_func_noret op_207a_23_ff; +extern cpuop_func_noret op_207b_23_nf; +extern cpuop_func_noret op_207b_23_ff; +extern cpuop_func_noret op_207c_23_nf; +extern cpuop_func_noret op_207c_23_ff; +extern cpuop_func_noret op_2080_23_nf; +extern cpuop_func_noret op_2080_23_ff; +extern cpuop_func_noret op_2088_23_nf; +extern cpuop_func_noret op_2088_23_ff; +extern cpuop_func_noret op_2090_23_nf; +extern cpuop_func_noret op_2090_23_ff; +extern cpuop_func_noret op_2098_23_nf; +extern cpuop_func_noret op_2098_23_ff; +extern cpuop_func_noret op_20a0_23_nf; +extern cpuop_func_noret op_20a0_23_ff; +extern cpuop_func_noret op_20a8_23_nf; +extern cpuop_func_noret op_20a8_23_ff; +extern cpuop_func_noret op_20b0_23_nf; +extern cpuop_func_noret op_20b0_23_ff; +extern cpuop_func_noret op_20b8_23_nf; +extern cpuop_func_noret op_20b8_23_ff; +extern cpuop_func_noret op_20b9_23_nf; +extern cpuop_func_noret op_20b9_23_ff; +extern cpuop_func_noret op_20ba_23_nf; +extern cpuop_func_noret op_20ba_23_ff; +extern cpuop_func_noret op_20bb_23_nf; +extern cpuop_func_noret op_20bb_23_ff; +extern cpuop_func_noret op_20bc_23_nf; +extern cpuop_func_noret op_20bc_23_ff; +extern cpuop_func_noret op_20c0_23_nf; +extern cpuop_func_noret op_20c0_23_ff; +extern cpuop_func_noret op_20c8_23_nf; +extern cpuop_func_noret op_20c8_23_ff; +extern cpuop_func_noret op_20d0_23_nf; +extern cpuop_func_noret op_20d0_23_ff; +extern cpuop_func_noret op_20d8_23_nf; +extern cpuop_func_noret op_20d8_23_ff; +extern cpuop_func_noret op_20e0_23_nf; +extern cpuop_func_noret op_20e0_23_ff; +extern cpuop_func_noret op_20e8_23_nf; +extern cpuop_func_noret op_20e8_23_ff; +extern cpuop_func_noret op_20f0_23_nf; +extern cpuop_func_noret op_20f0_23_ff; +extern cpuop_func_noret op_20f8_23_nf; +extern cpuop_func_noret op_20f8_23_ff; +extern cpuop_func_noret op_20f9_23_nf; +extern cpuop_func_noret op_20f9_23_ff; +extern cpuop_func_noret op_20fa_23_nf; +extern cpuop_func_noret op_20fa_23_ff; +extern cpuop_func_noret op_20fb_23_nf; +extern cpuop_func_noret op_20fb_23_ff; +extern cpuop_func_noret op_20fc_23_nf; +extern cpuop_func_noret op_20fc_23_ff; +extern cpuop_func_noret op_2100_23_nf; +extern cpuop_func_noret op_2100_23_ff; +extern cpuop_func_noret op_2108_23_nf; +extern cpuop_func_noret op_2108_23_ff; +extern cpuop_func_noret op_2110_23_nf; +extern cpuop_func_noret op_2110_23_ff; +extern cpuop_func_noret op_2118_23_nf; +extern cpuop_func_noret op_2118_23_ff; +extern cpuop_func_noret op_2120_23_nf; +extern cpuop_func_noret op_2120_23_ff; +extern cpuop_func_noret op_2128_23_nf; +extern cpuop_func_noret op_2128_23_ff; +extern cpuop_func_noret op_2130_23_nf; +extern cpuop_func_noret op_2130_23_ff; +extern cpuop_func_noret op_2138_23_nf; +extern cpuop_func_noret op_2138_23_ff; +extern cpuop_func_noret op_2139_23_nf; +extern cpuop_func_noret op_2139_23_ff; +extern cpuop_func_noret op_213a_23_nf; +extern cpuop_func_noret op_213a_23_ff; +extern cpuop_func_noret op_213b_23_nf; +extern cpuop_func_noret op_213b_23_ff; +extern cpuop_func_noret op_213c_23_nf; +extern cpuop_func_noret op_213c_23_ff; +extern cpuop_func_noret op_2140_23_nf; +extern cpuop_func_noret op_2140_23_ff; +extern cpuop_func_noret op_2148_23_nf; +extern cpuop_func_noret op_2148_23_ff; +extern cpuop_func_noret op_2150_23_nf; +extern cpuop_func_noret op_2150_23_ff; +extern cpuop_func_noret op_2158_23_nf; +extern cpuop_func_noret op_2158_23_ff; +extern cpuop_func_noret op_2160_23_nf; +extern cpuop_func_noret op_2160_23_ff; +extern cpuop_func_noret op_2168_23_nf; +extern cpuop_func_noret op_2168_23_ff; +extern cpuop_func_noret op_2170_23_nf; +extern cpuop_func_noret op_2170_23_ff; +extern cpuop_func_noret op_2178_23_nf; +extern cpuop_func_noret op_2178_23_ff; +extern cpuop_func_noret op_2179_23_nf; +extern cpuop_func_noret op_2179_23_ff; +extern cpuop_func_noret op_217a_23_nf; +extern cpuop_func_noret op_217a_23_ff; +extern cpuop_func_noret op_217b_23_nf; +extern cpuop_func_noret op_217b_23_ff; +extern cpuop_func_noret op_217c_23_nf; +extern cpuop_func_noret op_217c_23_ff; +extern cpuop_func_noret op_2180_23_nf; +extern cpuop_func_noret op_2180_23_ff; +extern cpuop_func_noret op_2188_23_nf; +extern cpuop_func_noret op_2188_23_ff; +extern cpuop_func_noret op_2190_23_nf; +extern cpuop_func_noret op_2190_23_ff; +extern cpuop_func_noret op_2198_23_nf; +extern cpuop_func_noret op_2198_23_ff; +extern cpuop_func_noret op_21a0_23_nf; +extern cpuop_func_noret op_21a0_23_ff; +extern cpuop_func_noret op_21a8_23_nf; +extern cpuop_func_noret op_21a8_23_ff; +extern cpuop_func_noret op_21b0_23_nf; +extern cpuop_func_noret op_21b0_23_ff; +extern cpuop_func_noret op_21b8_23_nf; +extern cpuop_func_noret op_21b8_23_ff; +extern cpuop_func_noret op_21b9_23_nf; +extern cpuop_func_noret op_21b9_23_ff; +extern cpuop_func_noret op_21ba_23_nf; +extern cpuop_func_noret op_21ba_23_ff; +extern cpuop_func_noret op_21bb_23_nf; +extern cpuop_func_noret op_21bb_23_ff; +extern cpuop_func_noret op_21bc_23_nf; +extern cpuop_func_noret op_21bc_23_ff; +extern cpuop_func_noret op_21c0_23_nf; +extern cpuop_func_noret op_21c0_23_ff; +extern cpuop_func_noret op_21c8_23_nf; +extern cpuop_func_noret op_21c8_23_ff; +extern cpuop_func_noret op_21d0_23_nf; +extern cpuop_func_noret op_21d0_23_ff; +extern cpuop_func_noret op_21d8_23_nf; +extern cpuop_func_noret op_21d8_23_ff; +extern cpuop_func_noret op_21e0_23_nf; +extern cpuop_func_noret op_21e0_23_ff; +extern cpuop_func_noret op_21e8_23_nf; +extern cpuop_func_noret op_21e8_23_ff; +extern cpuop_func_noret op_21f0_23_nf; +extern cpuop_func_noret op_21f0_23_ff; +extern cpuop_func_noret op_21f8_23_nf; +extern cpuop_func_noret op_21f8_23_ff; +extern cpuop_func_noret op_21f9_23_nf; +extern cpuop_func_noret op_21f9_23_ff; +extern cpuop_func_noret op_21fa_23_nf; +extern cpuop_func_noret op_21fa_23_ff; +extern cpuop_func_noret op_21fb_23_nf; +extern cpuop_func_noret op_21fb_23_ff; +extern cpuop_func_noret op_21fc_23_nf; +extern cpuop_func_noret op_21fc_23_ff; +extern cpuop_func_noret op_23c0_23_nf; +extern cpuop_func_noret op_23c0_23_ff; +extern cpuop_func_noret op_23c8_23_nf; +extern cpuop_func_noret op_23c8_23_ff; +extern cpuop_func_noret op_23d0_23_nf; +extern cpuop_func_noret op_23d0_23_ff; +extern cpuop_func_noret op_23d8_23_nf; +extern cpuop_func_noret op_23d8_23_ff; +extern cpuop_func_noret op_23e0_23_nf; +extern cpuop_func_noret op_23e0_23_ff; +extern cpuop_func_noret op_23e8_23_nf; +extern cpuop_func_noret op_23e8_23_ff; +extern cpuop_func_noret op_23f0_23_nf; +extern cpuop_func_noret op_23f0_23_ff; +extern cpuop_func_noret op_23f8_23_nf; +extern cpuop_func_noret op_23f8_23_ff; +extern cpuop_func_noret op_23f9_23_nf; +extern cpuop_func_noret op_23f9_23_ff; +extern cpuop_func_noret op_23fa_23_nf; +extern cpuop_func_noret op_23fa_23_ff; +extern cpuop_func_noret op_23fb_23_nf; +extern cpuop_func_noret op_23fb_23_ff; +extern cpuop_func_noret op_23fc_23_nf; +extern cpuop_func_noret op_23fc_23_ff; +extern cpuop_func_noret op_3000_23_nf; +extern cpuop_func_noret op_3000_23_ff; +extern cpuop_func_noret op_3008_23_nf; +extern cpuop_func_noret op_3008_23_ff; +extern cpuop_func_noret op_3010_23_nf; +extern cpuop_func_noret op_3010_23_ff; +extern cpuop_func_noret op_3018_23_nf; +extern cpuop_func_noret op_3018_23_ff; +extern cpuop_func_noret op_3020_23_nf; +extern cpuop_func_noret op_3020_23_ff; +extern cpuop_func_noret op_3028_23_nf; +extern cpuop_func_noret op_3028_23_ff; +extern cpuop_func_noret op_3030_23_nf; +extern cpuop_func_noret op_3030_23_ff; +extern cpuop_func_noret op_3038_23_nf; +extern cpuop_func_noret op_3038_23_ff; +extern cpuop_func_noret op_3039_23_nf; +extern cpuop_func_noret op_3039_23_ff; +extern cpuop_func_noret op_303a_23_nf; +extern cpuop_func_noret op_303a_23_ff; +extern cpuop_func_noret op_303b_23_nf; +extern cpuop_func_noret op_303b_23_ff; +extern cpuop_func_noret op_303c_23_nf; +extern cpuop_func_noret op_303c_23_ff; +extern cpuop_func_noret op_3040_23_nf; +extern cpuop_func_noret op_3040_23_ff; +extern cpuop_func_noret op_3048_23_nf; +extern cpuop_func_noret op_3048_23_ff; +extern cpuop_func_noret op_3050_23_nf; +extern cpuop_func_noret op_3050_23_ff; +extern cpuop_func_noret op_3058_23_nf; +extern cpuop_func_noret op_3058_23_ff; +extern cpuop_func_noret op_3060_23_nf; +extern cpuop_func_noret op_3060_23_ff; +extern cpuop_func_noret op_3068_23_nf; +extern cpuop_func_noret op_3068_23_ff; +extern cpuop_func_noret op_3070_23_nf; +extern cpuop_func_noret op_3070_23_ff; +extern cpuop_func_noret op_3078_23_nf; +extern cpuop_func_noret op_3078_23_ff; +extern cpuop_func_noret op_3079_23_nf; +extern cpuop_func_noret op_3079_23_ff; +extern cpuop_func_noret op_307a_23_nf; +extern cpuop_func_noret op_307a_23_ff; +extern cpuop_func_noret op_307b_23_nf; +extern cpuop_func_noret op_307b_23_ff; +extern cpuop_func_noret op_307c_23_nf; +extern cpuop_func_noret op_307c_23_ff; +extern cpuop_func_noret op_3080_23_nf; +extern cpuop_func_noret op_3080_23_ff; +extern cpuop_func_noret op_3088_23_nf; +extern cpuop_func_noret op_3088_23_ff; +extern cpuop_func_noret op_3090_23_nf; +extern cpuop_func_noret op_3090_23_ff; +extern cpuop_func_noret op_3098_23_nf; +extern cpuop_func_noret op_3098_23_ff; +extern cpuop_func_noret op_30a0_23_nf; +extern cpuop_func_noret op_30a0_23_ff; +extern cpuop_func_noret op_30a8_23_nf; +extern cpuop_func_noret op_30a8_23_ff; +extern cpuop_func_noret op_30b0_23_nf; +extern cpuop_func_noret op_30b0_23_ff; +extern cpuop_func_noret op_30b8_23_nf; +extern cpuop_func_noret op_30b8_23_ff; +extern cpuop_func_noret op_30b9_23_nf; +extern cpuop_func_noret op_30b9_23_ff; +extern cpuop_func_noret op_30ba_23_nf; +extern cpuop_func_noret op_30ba_23_ff; +extern cpuop_func_noret op_30bb_23_nf; +extern cpuop_func_noret op_30bb_23_ff; +extern cpuop_func_noret op_30bc_23_nf; +extern cpuop_func_noret op_30bc_23_ff; +extern cpuop_func_noret op_30c0_23_nf; +extern cpuop_func_noret op_30c0_23_ff; +extern cpuop_func_noret op_30c8_23_nf; +extern cpuop_func_noret op_30c8_23_ff; +extern cpuop_func_noret op_30d0_23_nf; +extern cpuop_func_noret op_30d0_23_ff; +extern cpuop_func_noret op_30d8_23_nf; +extern cpuop_func_noret op_30d8_23_ff; +extern cpuop_func_noret op_30e0_23_nf; +extern cpuop_func_noret op_30e0_23_ff; +extern cpuop_func_noret op_30e8_23_nf; +extern cpuop_func_noret op_30e8_23_ff; +extern cpuop_func_noret op_30f0_23_nf; +extern cpuop_func_noret op_30f0_23_ff; +extern cpuop_func_noret op_30f8_23_nf; +extern cpuop_func_noret op_30f8_23_ff; +extern cpuop_func_noret op_30f9_23_nf; +extern cpuop_func_noret op_30f9_23_ff; +extern cpuop_func_noret op_30fa_23_nf; +extern cpuop_func_noret op_30fa_23_ff; +extern cpuop_func_noret op_30fb_23_nf; +extern cpuop_func_noret op_30fb_23_ff; +extern cpuop_func_noret op_30fc_23_nf; +extern cpuop_func_noret op_30fc_23_ff; +extern cpuop_func_noret op_3100_23_nf; +extern cpuop_func_noret op_3100_23_ff; +extern cpuop_func_noret op_3108_23_nf; +extern cpuop_func_noret op_3108_23_ff; +extern cpuop_func_noret op_3110_23_nf; +extern cpuop_func_noret op_3110_23_ff; +extern cpuop_func_noret op_3118_23_nf; +extern cpuop_func_noret op_3118_23_ff; +extern cpuop_func_noret op_3120_23_nf; +extern cpuop_func_noret op_3120_23_ff; +extern cpuop_func_noret op_3128_23_nf; +extern cpuop_func_noret op_3128_23_ff; +extern cpuop_func_noret op_3130_23_nf; +extern cpuop_func_noret op_3130_23_ff; +extern cpuop_func_noret op_3138_23_nf; +extern cpuop_func_noret op_3138_23_ff; +extern cpuop_func_noret op_3139_23_nf; +extern cpuop_func_noret op_3139_23_ff; +extern cpuop_func_noret op_313a_23_nf; +extern cpuop_func_noret op_313a_23_ff; +extern cpuop_func_noret op_313b_23_nf; +extern cpuop_func_noret op_313b_23_ff; +extern cpuop_func_noret op_313c_23_nf; +extern cpuop_func_noret op_313c_23_ff; +extern cpuop_func_noret op_3140_23_nf; +extern cpuop_func_noret op_3140_23_ff; +extern cpuop_func_noret op_3148_23_nf; +extern cpuop_func_noret op_3148_23_ff; +extern cpuop_func_noret op_3150_23_nf; +extern cpuop_func_noret op_3150_23_ff; +extern cpuop_func_noret op_3158_23_nf; +extern cpuop_func_noret op_3158_23_ff; +extern cpuop_func_noret op_3160_23_nf; +extern cpuop_func_noret op_3160_23_ff; +extern cpuop_func_noret op_3168_23_nf; +extern cpuop_func_noret op_3168_23_ff; +extern cpuop_func_noret op_3170_23_nf; +extern cpuop_func_noret op_3170_23_ff; +extern cpuop_func_noret op_3178_23_nf; +extern cpuop_func_noret op_3178_23_ff; +extern cpuop_func_noret op_3179_23_nf; +extern cpuop_func_noret op_3179_23_ff; +extern cpuop_func_noret op_317a_23_nf; +extern cpuop_func_noret op_317a_23_ff; +extern cpuop_func_noret op_317b_23_nf; +extern cpuop_func_noret op_317b_23_ff; +extern cpuop_func_noret op_317c_23_nf; +extern cpuop_func_noret op_317c_23_ff; +extern cpuop_func_noret op_3180_23_nf; +extern cpuop_func_noret op_3180_23_ff; +extern cpuop_func_noret op_3188_23_nf; +extern cpuop_func_noret op_3188_23_ff; +extern cpuop_func_noret op_3190_23_nf; +extern cpuop_func_noret op_3190_23_ff; +extern cpuop_func_noret op_3198_23_nf; +extern cpuop_func_noret op_3198_23_ff; +extern cpuop_func_noret op_31a0_23_nf; +extern cpuop_func_noret op_31a0_23_ff; +extern cpuop_func_noret op_31a8_23_nf; +extern cpuop_func_noret op_31a8_23_ff; +extern cpuop_func_noret op_31b0_23_nf; +extern cpuop_func_noret op_31b0_23_ff; +extern cpuop_func_noret op_31b8_23_nf; +extern cpuop_func_noret op_31b8_23_ff; +extern cpuop_func_noret op_31b9_23_nf; +extern cpuop_func_noret op_31b9_23_ff; +extern cpuop_func_noret op_31ba_23_nf; +extern cpuop_func_noret op_31ba_23_ff; +extern cpuop_func_noret op_31bb_23_nf; +extern cpuop_func_noret op_31bb_23_ff; +extern cpuop_func_noret op_31bc_23_nf; +extern cpuop_func_noret op_31bc_23_ff; +extern cpuop_func_noret op_31c0_23_nf; +extern cpuop_func_noret op_31c0_23_ff; +extern cpuop_func_noret op_31c8_23_nf; +extern cpuop_func_noret op_31c8_23_ff; +extern cpuop_func_noret op_31d0_23_nf; +extern cpuop_func_noret op_31d0_23_ff; +extern cpuop_func_noret op_31d8_23_nf; +extern cpuop_func_noret op_31d8_23_ff; +extern cpuop_func_noret op_31e0_23_nf; +extern cpuop_func_noret op_31e0_23_ff; +extern cpuop_func_noret op_31e8_23_nf; +extern cpuop_func_noret op_31e8_23_ff; +extern cpuop_func_noret op_31f0_23_nf; +extern cpuop_func_noret op_31f0_23_ff; +extern cpuop_func_noret op_31f8_23_nf; +extern cpuop_func_noret op_31f8_23_ff; +extern cpuop_func_noret op_31f9_23_nf; +extern cpuop_func_noret op_31f9_23_ff; +extern cpuop_func_noret op_31fa_23_nf; +extern cpuop_func_noret op_31fa_23_ff; +extern cpuop_func_noret op_31fb_23_nf; +extern cpuop_func_noret op_31fb_23_ff; +extern cpuop_func_noret op_31fc_23_nf; +extern cpuop_func_noret op_31fc_23_ff; +extern cpuop_func_noret op_33c0_23_nf; +extern cpuop_func_noret op_33c0_23_ff; +extern cpuop_func_noret op_33c8_23_nf; +extern cpuop_func_noret op_33c8_23_ff; +extern cpuop_func_noret op_33d0_23_nf; +extern cpuop_func_noret op_33d0_23_ff; +extern cpuop_func_noret op_33d8_23_nf; +extern cpuop_func_noret op_33d8_23_ff; +extern cpuop_func_noret op_33e0_23_nf; +extern cpuop_func_noret op_33e0_23_ff; +extern cpuop_func_noret op_33e8_23_nf; +extern cpuop_func_noret op_33e8_23_ff; +extern cpuop_func_noret op_33f0_23_nf; +extern cpuop_func_noret op_33f0_23_ff; +extern cpuop_func_noret op_33f8_23_nf; +extern cpuop_func_noret op_33f8_23_ff; +extern cpuop_func_noret op_33f9_23_nf; +extern cpuop_func_noret op_33f9_23_ff; +extern cpuop_func_noret op_33fa_23_nf; +extern cpuop_func_noret op_33fa_23_ff; +extern cpuop_func_noret op_33fb_23_nf; +extern cpuop_func_noret op_33fb_23_ff; +extern cpuop_func_noret op_33fc_23_nf; +extern cpuop_func_noret op_33fc_23_ff; +extern cpuop_func_noret op_4000_23_nf; +extern cpuop_func_noret op_4000_23_ff; +extern cpuop_func_noret op_4010_23_nf; +extern cpuop_func_noret op_4010_23_ff; +extern cpuop_func_noret op_4018_23_nf; +extern cpuop_func_noret op_4018_23_ff; +extern cpuop_func_noret op_4020_23_nf; +extern cpuop_func_noret op_4020_23_ff; +extern cpuop_func_noret op_4028_23_nf; +extern cpuop_func_noret op_4028_23_ff; +extern cpuop_func_noret op_4030_23_nf; +extern cpuop_func_noret op_4030_23_ff; +extern cpuop_func_noret op_4038_23_nf; +extern cpuop_func_noret op_4038_23_ff; +extern cpuop_func_noret op_4039_23_nf; +extern cpuop_func_noret op_4039_23_ff; +extern cpuop_func_noret op_4040_23_nf; +extern cpuop_func_noret op_4040_23_ff; +extern cpuop_func_noret op_4050_23_nf; +extern cpuop_func_noret op_4050_23_ff; +extern cpuop_func_noret op_4058_23_nf; +extern cpuop_func_noret op_4058_23_ff; +extern cpuop_func_noret op_4060_23_nf; +extern cpuop_func_noret op_4060_23_ff; +extern cpuop_func_noret op_4068_23_nf; +extern cpuop_func_noret op_4068_23_ff; +extern cpuop_func_noret op_4070_23_nf; +extern cpuop_func_noret op_4070_23_ff; +extern cpuop_func_noret op_4078_23_nf; +extern cpuop_func_noret op_4078_23_ff; +extern cpuop_func_noret op_4079_23_nf; +extern cpuop_func_noret op_4079_23_ff; +extern cpuop_func_noret op_4080_23_nf; +extern cpuop_func_noret op_4080_23_ff; +extern cpuop_func_noret op_4090_23_nf; +extern cpuop_func_noret op_4090_23_ff; +extern cpuop_func_noret op_4098_23_nf; +extern cpuop_func_noret op_4098_23_ff; +extern cpuop_func_noret op_40a0_23_nf; +extern cpuop_func_noret op_40a0_23_ff; +extern cpuop_func_noret op_40a8_23_nf; +extern cpuop_func_noret op_40a8_23_ff; +extern cpuop_func_noret op_40b0_23_nf; +extern cpuop_func_noret op_40b0_23_ff; +extern cpuop_func_noret op_40b8_23_nf; +extern cpuop_func_noret op_40b8_23_ff; +extern cpuop_func_noret op_40b9_23_nf; +extern cpuop_func_noret op_40b9_23_ff; +extern cpuop_func_noret op_40c0_23_nf; +extern cpuop_func_noret op_40c0_23_ff; +extern cpuop_func_noret op_40d0_23_nf; +extern cpuop_func_noret op_40d0_23_ff; +extern cpuop_func_noret op_40d8_23_nf; +extern cpuop_func_noret op_40d8_23_ff; +extern cpuop_func_noret op_40e0_23_nf; +extern cpuop_func_noret op_40e0_23_ff; +extern cpuop_func_noret op_40e8_23_nf; +extern cpuop_func_noret op_40e8_23_ff; +extern cpuop_func_noret op_40f0_23_nf; +extern cpuop_func_noret op_40f0_23_ff; +extern cpuop_func_noret op_40f8_23_nf; +extern cpuop_func_noret op_40f8_23_ff; +extern cpuop_func_noret op_40f9_23_nf; +extern cpuop_func_noret op_40f9_23_ff; +extern cpuop_func_noret op_4100_23_nf; +extern cpuop_func_noret op_4100_23_ff; +extern cpuop_func_noret op_4110_23_nf; +extern cpuop_func_noret op_4110_23_ff; +extern cpuop_func_noret op_4118_23_nf; +extern cpuop_func_noret op_4118_23_ff; +extern cpuop_func_noret op_4120_23_nf; +extern cpuop_func_noret op_4120_23_ff; +extern cpuop_func_noret op_4128_23_nf; +extern cpuop_func_noret op_4128_23_ff; +extern cpuop_func_noret op_4130_23_nf; +extern cpuop_func_noret op_4130_23_ff; +extern cpuop_func_noret op_4138_23_nf; +extern cpuop_func_noret op_4138_23_ff; +extern cpuop_func_noret op_4139_23_nf; +extern cpuop_func_noret op_4139_23_ff; +extern cpuop_func_noret op_413a_23_nf; +extern cpuop_func_noret op_413a_23_ff; +extern cpuop_func_noret op_413b_23_nf; +extern cpuop_func_noret op_413b_23_ff; +extern cpuop_func_noret op_413c_23_nf; +extern cpuop_func_noret op_413c_23_ff; +extern cpuop_func_noret op_4180_23_nf; +extern cpuop_func_noret op_4180_23_ff; +extern cpuop_func_noret op_4190_23_nf; +extern cpuop_func_noret op_4190_23_ff; +extern cpuop_func_noret op_4198_23_nf; +extern cpuop_func_noret op_4198_23_ff; +extern cpuop_func_noret op_41a0_23_nf; +extern cpuop_func_noret op_41a0_23_ff; +extern cpuop_func_noret op_41a8_23_nf; +extern cpuop_func_noret op_41a8_23_ff; +extern cpuop_func_noret op_41b0_23_nf; +extern cpuop_func_noret op_41b0_23_ff; +extern cpuop_func_noret op_41b8_23_nf; +extern cpuop_func_noret op_41b8_23_ff; +extern cpuop_func_noret op_41b9_23_nf; +extern cpuop_func_noret op_41b9_23_ff; +extern cpuop_func_noret op_41ba_23_nf; +extern cpuop_func_noret op_41ba_23_ff; +extern cpuop_func_noret op_41bb_23_nf; +extern cpuop_func_noret op_41bb_23_ff; +extern cpuop_func_noret op_41bc_23_nf; +extern cpuop_func_noret op_41bc_23_ff; +extern cpuop_func_noret op_41d0_23_nf; +extern cpuop_func_noret op_41d0_23_ff; +extern cpuop_func_noret op_41e8_23_nf; +extern cpuop_func_noret op_41e8_23_ff; +extern cpuop_func_noret op_41f0_23_nf; +extern cpuop_func_noret op_41f0_23_ff; +extern cpuop_func_noret op_41f8_23_nf; +extern cpuop_func_noret op_41f8_23_ff; +extern cpuop_func_noret op_41f9_23_nf; +extern cpuop_func_noret op_41f9_23_ff; +extern cpuop_func_noret op_41fa_23_nf; +extern cpuop_func_noret op_41fa_23_ff; +extern cpuop_func_noret op_41fb_23_nf; +extern cpuop_func_noret op_41fb_23_ff; +extern cpuop_func_noret op_4200_23_nf; +extern cpuop_func_noret op_4200_23_ff; +extern cpuop_func_noret op_4210_23_nf; +extern cpuop_func_noret op_4210_23_ff; +extern cpuop_func_noret op_4218_23_nf; +extern cpuop_func_noret op_4218_23_ff; +extern cpuop_func_noret op_4220_23_nf; +extern cpuop_func_noret op_4220_23_ff; +extern cpuop_func_noret op_4228_23_nf; +extern cpuop_func_noret op_4228_23_ff; +extern cpuop_func_noret op_4230_23_nf; +extern cpuop_func_noret op_4230_23_ff; +extern cpuop_func_noret op_4238_23_nf; +extern cpuop_func_noret op_4238_23_ff; +extern cpuop_func_noret op_4239_23_nf; +extern cpuop_func_noret op_4239_23_ff; +extern cpuop_func_noret op_4240_23_nf; +extern cpuop_func_noret op_4240_23_ff; +extern cpuop_func_noret op_4250_23_nf; +extern cpuop_func_noret op_4250_23_ff; +extern cpuop_func_noret op_4258_23_nf; +extern cpuop_func_noret op_4258_23_ff; +extern cpuop_func_noret op_4260_23_nf; +extern cpuop_func_noret op_4260_23_ff; +extern cpuop_func_noret op_4268_23_nf; +extern cpuop_func_noret op_4268_23_ff; +extern cpuop_func_noret op_4270_23_nf; +extern cpuop_func_noret op_4270_23_ff; +extern cpuop_func_noret op_4278_23_nf; +extern cpuop_func_noret op_4278_23_ff; +extern cpuop_func_noret op_4279_23_nf; +extern cpuop_func_noret op_4279_23_ff; +extern cpuop_func_noret op_4280_23_nf; +extern cpuop_func_noret op_4280_23_ff; +extern cpuop_func_noret op_4290_23_nf; +extern cpuop_func_noret op_4290_23_ff; +extern cpuop_func_noret op_4298_23_nf; +extern cpuop_func_noret op_4298_23_ff; +extern cpuop_func_noret op_42a0_23_nf; +extern cpuop_func_noret op_42a0_23_ff; +extern cpuop_func_noret op_42a8_23_nf; +extern cpuop_func_noret op_42a8_23_ff; +extern cpuop_func_noret op_42b0_23_nf; +extern cpuop_func_noret op_42b0_23_ff; +extern cpuop_func_noret op_42b8_23_nf; +extern cpuop_func_noret op_42b8_23_ff; +extern cpuop_func_noret op_42b9_23_nf; +extern cpuop_func_noret op_42b9_23_ff; +extern cpuop_func_noret op_42c0_23_nf; +extern cpuop_func_noret op_42c0_23_ff; +extern cpuop_func_noret op_42d0_23_nf; +extern cpuop_func_noret op_42d0_23_ff; +extern cpuop_func_noret op_42d8_23_nf; +extern cpuop_func_noret op_42d8_23_ff; +extern cpuop_func_noret op_42e0_23_nf; +extern cpuop_func_noret op_42e0_23_ff; +extern cpuop_func_noret op_42e8_23_nf; +extern cpuop_func_noret op_42e8_23_ff; +extern cpuop_func_noret op_42f0_23_nf; +extern cpuop_func_noret op_42f0_23_ff; +extern cpuop_func_noret op_42f8_23_nf; +extern cpuop_func_noret op_42f8_23_ff; +extern cpuop_func_noret op_42f9_23_nf; +extern cpuop_func_noret op_42f9_23_ff; +extern cpuop_func_noret op_4400_23_nf; +extern cpuop_func_noret op_4400_23_ff; +extern cpuop_func_noret op_4410_23_nf; +extern cpuop_func_noret op_4410_23_ff; +extern cpuop_func_noret op_4418_23_nf; +extern cpuop_func_noret op_4418_23_ff; +extern cpuop_func_noret op_4420_23_nf; +extern cpuop_func_noret op_4420_23_ff; +extern cpuop_func_noret op_4428_23_nf; +extern cpuop_func_noret op_4428_23_ff; +extern cpuop_func_noret op_4430_23_nf; +extern cpuop_func_noret op_4430_23_ff; +extern cpuop_func_noret op_4438_23_nf; +extern cpuop_func_noret op_4438_23_ff; +extern cpuop_func_noret op_4439_23_nf; +extern cpuop_func_noret op_4439_23_ff; +extern cpuop_func_noret op_4440_23_nf; +extern cpuop_func_noret op_4440_23_ff; +extern cpuop_func_noret op_4450_23_nf; +extern cpuop_func_noret op_4450_23_ff; +extern cpuop_func_noret op_4458_23_nf; +extern cpuop_func_noret op_4458_23_ff; +extern cpuop_func_noret op_4460_23_nf; +extern cpuop_func_noret op_4460_23_ff; +extern cpuop_func_noret op_4468_23_nf; +extern cpuop_func_noret op_4468_23_ff; +extern cpuop_func_noret op_4470_23_nf; +extern cpuop_func_noret op_4470_23_ff; +extern cpuop_func_noret op_4478_23_nf; +extern cpuop_func_noret op_4478_23_ff; +extern cpuop_func_noret op_4479_23_nf; +extern cpuop_func_noret op_4479_23_ff; +extern cpuop_func_noret op_4480_23_nf; +extern cpuop_func_noret op_4480_23_ff; +extern cpuop_func_noret op_4490_23_nf; +extern cpuop_func_noret op_4490_23_ff; +extern cpuop_func_noret op_4498_23_nf; +extern cpuop_func_noret op_4498_23_ff; +extern cpuop_func_noret op_44a0_23_nf; +extern cpuop_func_noret op_44a0_23_ff; +extern cpuop_func_noret op_44a8_23_nf; +extern cpuop_func_noret op_44a8_23_ff; +extern cpuop_func_noret op_44b0_23_nf; +extern cpuop_func_noret op_44b0_23_ff; +extern cpuop_func_noret op_44b8_23_nf; +extern cpuop_func_noret op_44b8_23_ff; +extern cpuop_func_noret op_44b9_23_nf; +extern cpuop_func_noret op_44b9_23_ff; +extern cpuop_func_noret op_44c0_23_nf; +extern cpuop_func_noret op_44c0_23_ff; +extern cpuop_func_noret op_44d0_23_nf; +extern cpuop_func_noret op_44d0_23_ff; +extern cpuop_func_noret op_44d8_23_nf; +extern cpuop_func_noret op_44d8_23_ff; +extern cpuop_func_noret op_44e0_23_nf; +extern cpuop_func_noret op_44e0_23_ff; +extern cpuop_func_noret op_44e8_23_nf; +extern cpuop_func_noret op_44e8_23_ff; +extern cpuop_func_noret op_44f0_23_nf; +extern cpuop_func_noret op_44f0_23_ff; +extern cpuop_func_noret op_44f8_23_nf; +extern cpuop_func_noret op_44f8_23_ff; +extern cpuop_func_noret op_44f9_23_nf; +extern cpuop_func_noret op_44f9_23_ff; +extern cpuop_func_noret op_44fa_23_nf; +extern cpuop_func_noret op_44fa_23_ff; +extern cpuop_func_noret op_44fb_23_nf; +extern cpuop_func_noret op_44fb_23_ff; +extern cpuop_func_noret op_44fc_23_nf; +extern cpuop_func_noret op_44fc_23_ff; +extern cpuop_func_noret op_4600_23_nf; +extern cpuop_func_noret op_4600_23_ff; +extern cpuop_func_noret op_4610_23_nf; +extern cpuop_func_noret op_4610_23_ff; +extern cpuop_func_noret op_4618_23_nf; +extern cpuop_func_noret op_4618_23_ff; +extern cpuop_func_noret op_4620_23_nf; +extern cpuop_func_noret op_4620_23_ff; +extern cpuop_func_noret op_4628_23_nf; +extern cpuop_func_noret op_4628_23_ff; +extern cpuop_func_noret op_4630_23_nf; +extern cpuop_func_noret op_4630_23_ff; +extern cpuop_func_noret op_4638_23_nf; +extern cpuop_func_noret op_4638_23_ff; +extern cpuop_func_noret op_4639_23_nf; +extern cpuop_func_noret op_4639_23_ff; +extern cpuop_func_noret op_4640_23_nf; +extern cpuop_func_noret op_4640_23_ff; +extern cpuop_func_noret op_4650_23_nf; +extern cpuop_func_noret op_4650_23_ff; +extern cpuop_func_noret op_4658_23_nf; +extern cpuop_func_noret op_4658_23_ff; +extern cpuop_func_noret op_4660_23_nf; +extern cpuop_func_noret op_4660_23_ff; +extern cpuop_func_noret op_4668_23_nf; +extern cpuop_func_noret op_4668_23_ff; +extern cpuop_func_noret op_4670_23_nf; +extern cpuop_func_noret op_4670_23_ff; +extern cpuop_func_noret op_4678_23_nf; +extern cpuop_func_noret op_4678_23_ff; +extern cpuop_func_noret op_4679_23_nf; +extern cpuop_func_noret op_4679_23_ff; +extern cpuop_func_noret op_4680_23_nf; +extern cpuop_func_noret op_4680_23_ff; +extern cpuop_func_noret op_4690_23_nf; +extern cpuop_func_noret op_4690_23_ff; +extern cpuop_func_noret op_4698_23_nf; +extern cpuop_func_noret op_4698_23_ff; +extern cpuop_func_noret op_46a0_23_nf; +extern cpuop_func_noret op_46a0_23_ff; +extern cpuop_func_noret op_46a8_23_nf; +extern cpuop_func_noret op_46a8_23_ff; +extern cpuop_func_noret op_46b0_23_nf; +extern cpuop_func_noret op_46b0_23_ff; +extern cpuop_func_noret op_46b8_23_nf; +extern cpuop_func_noret op_46b8_23_ff; +extern cpuop_func_noret op_46b9_23_nf; +extern cpuop_func_noret op_46b9_23_ff; +extern cpuop_func_noret op_46c0_23_nf; +extern cpuop_func_noret op_46c0_23_ff; +extern cpuop_func_noret op_46d0_23_nf; +extern cpuop_func_noret op_46d0_23_ff; +extern cpuop_func_noret op_46d8_23_nf; +extern cpuop_func_noret op_46d8_23_ff; +extern cpuop_func_noret op_46e0_23_nf; +extern cpuop_func_noret op_46e0_23_ff; +extern cpuop_func_noret op_46e8_23_nf; +extern cpuop_func_noret op_46e8_23_ff; +extern cpuop_func_noret op_46f0_23_nf; +extern cpuop_func_noret op_46f0_23_ff; +extern cpuop_func_noret op_46f8_23_nf; +extern cpuop_func_noret op_46f8_23_ff; +extern cpuop_func_noret op_46f9_23_nf; +extern cpuop_func_noret op_46f9_23_ff; +extern cpuop_func_noret op_46fa_23_nf; +extern cpuop_func_noret op_46fa_23_ff; +extern cpuop_func_noret op_46fb_23_nf; +extern cpuop_func_noret op_46fb_23_ff; +extern cpuop_func_noret op_46fc_23_nf; +extern cpuop_func_noret op_46fc_23_ff; +extern cpuop_func_noret op_4800_23_nf; +extern cpuop_func_noret op_4800_23_ff; +extern cpuop_func_noret op_4808_23_nf; +extern cpuop_func_noret op_4808_23_ff; +extern cpuop_func_noret op_4810_23_nf; +extern cpuop_func_noret op_4810_23_ff; +extern cpuop_func_noret op_4818_23_nf; +extern cpuop_func_noret op_4818_23_ff; +extern cpuop_func_noret op_4820_23_nf; +extern cpuop_func_noret op_4820_23_ff; +extern cpuop_func_noret op_4828_23_nf; +extern cpuop_func_noret op_4828_23_ff; +extern cpuop_func_noret op_4830_23_nf; +extern cpuop_func_noret op_4830_23_ff; +extern cpuop_func_noret op_4838_23_nf; +extern cpuop_func_noret op_4838_23_ff; +extern cpuop_func_noret op_4839_23_nf; +extern cpuop_func_noret op_4839_23_ff; +extern cpuop_func_noret op_4840_23_nf; +extern cpuop_func_noret op_4840_23_ff; +extern cpuop_func_noret op_4848_23_nf; +extern cpuop_func_noret op_4848_23_ff; +extern cpuop_func_noret op_4850_23_nf; +extern cpuop_func_noret op_4850_23_ff; +extern cpuop_func_noret op_4868_23_nf; +extern cpuop_func_noret op_4868_23_ff; +extern cpuop_func_noret op_4870_23_nf; +extern cpuop_func_noret op_4870_23_ff; +extern cpuop_func_noret op_4878_23_nf; +extern cpuop_func_noret op_4878_23_ff; +extern cpuop_func_noret op_4879_23_nf; +extern cpuop_func_noret op_4879_23_ff; +extern cpuop_func_noret op_487a_23_nf; +extern cpuop_func_noret op_487a_23_ff; +extern cpuop_func_noret op_487b_23_nf; +extern cpuop_func_noret op_487b_23_ff; +extern cpuop_func_noret op_4880_23_nf; +extern cpuop_func_noret op_4880_23_ff; +extern cpuop_func_noret op_4890_23_nf; +extern cpuop_func_noret op_4890_23_ff; +extern cpuop_func_noret op_48a0_23_nf; +extern cpuop_func_noret op_48a0_23_ff; +extern cpuop_func_noret op_48a8_23_nf; +extern cpuop_func_noret op_48a8_23_ff; +extern cpuop_func_noret op_48b0_23_nf; +extern cpuop_func_noret op_48b0_23_ff; +extern cpuop_func_noret op_48b8_23_nf; +extern cpuop_func_noret op_48b8_23_ff; +extern cpuop_func_noret op_48b9_23_nf; +extern cpuop_func_noret op_48b9_23_ff; +extern cpuop_func_noret op_48c0_23_nf; +extern cpuop_func_noret op_48c0_23_ff; +extern cpuop_func_noret op_48d0_23_nf; +extern cpuop_func_noret op_48d0_23_ff; +extern cpuop_func_noret op_48e0_23_nf; +extern cpuop_func_noret op_48e0_23_ff; +extern cpuop_func_noret op_48e8_23_nf; +extern cpuop_func_noret op_48e8_23_ff; +extern cpuop_func_noret op_48f0_23_nf; +extern cpuop_func_noret op_48f0_23_ff; +extern cpuop_func_noret op_48f8_23_nf; +extern cpuop_func_noret op_48f8_23_ff; +extern cpuop_func_noret op_48f9_23_nf; +extern cpuop_func_noret op_48f9_23_ff; +extern cpuop_func_noret op_49c0_23_nf; +extern cpuop_func_noret op_49c0_23_ff; +extern cpuop_func_noret op_4a00_23_nf; +extern cpuop_func_noret op_4a00_23_ff; +extern cpuop_func_noret op_4a10_23_nf; +extern cpuop_func_noret op_4a10_23_ff; +extern cpuop_func_noret op_4a18_23_nf; +extern cpuop_func_noret op_4a18_23_ff; +extern cpuop_func_noret op_4a20_23_nf; +extern cpuop_func_noret op_4a20_23_ff; +extern cpuop_func_noret op_4a28_23_nf; +extern cpuop_func_noret op_4a28_23_ff; +extern cpuop_func_noret op_4a30_23_nf; +extern cpuop_func_noret op_4a30_23_ff; +extern cpuop_func_noret op_4a38_23_nf; +extern cpuop_func_noret op_4a38_23_ff; +extern cpuop_func_noret op_4a39_23_nf; +extern cpuop_func_noret op_4a39_23_ff; +extern cpuop_func_noret op_4a3a_23_nf; +extern cpuop_func_noret op_4a3a_23_ff; +extern cpuop_func_noret op_4a3b_23_nf; +extern cpuop_func_noret op_4a3b_23_ff; +extern cpuop_func_noret op_4a3c_23_nf; +extern cpuop_func_noret op_4a3c_23_ff; +extern cpuop_func_noret op_4a40_23_nf; +extern cpuop_func_noret op_4a40_23_ff; +extern cpuop_func_noret op_4a48_23_nf; +extern cpuop_func_noret op_4a48_23_ff; +extern cpuop_func_noret op_4a50_23_nf; +extern cpuop_func_noret op_4a50_23_ff; +extern cpuop_func_noret op_4a58_23_nf; +extern cpuop_func_noret op_4a58_23_ff; +extern cpuop_func_noret op_4a60_23_nf; +extern cpuop_func_noret op_4a60_23_ff; +extern cpuop_func_noret op_4a68_23_nf; +extern cpuop_func_noret op_4a68_23_ff; +extern cpuop_func_noret op_4a70_23_nf; +extern cpuop_func_noret op_4a70_23_ff; +extern cpuop_func_noret op_4a78_23_nf; +extern cpuop_func_noret op_4a78_23_ff; +extern cpuop_func_noret op_4a79_23_nf; +extern cpuop_func_noret op_4a79_23_ff; +extern cpuop_func_noret op_4a7a_23_nf; +extern cpuop_func_noret op_4a7a_23_ff; +extern cpuop_func_noret op_4a7b_23_nf; +extern cpuop_func_noret op_4a7b_23_ff; +extern cpuop_func_noret op_4a7c_23_nf; +extern cpuop_func_noret op_4a7c_23_ff; +extern cpuop_func_noret op_4a80_23_nf; +extern cpuop_func_noret op_4a80_23_ff; +extern cpuop_func_noret op_4a88_23_nf; +extern cpuop_func_noret op_4a88_23_ff; +extern cpuop_func_noret op_4a90_23_nf; +extern cpuop_func_noret op_4a90_23_ff; +extern cpuop_func_noret op_4a98_23_nf; +extern cpuop_func_noret op_4a98_23_ff; +extern cpuop_func_noret op_4aa0_23_nf; +extern cpuop_func_noret op_4aa0_23_ff; +extern cpuop_func_noret op_4aa8_23_nf; +extern cpuop_func_noret op_4aa8_23_ff; +extern cpuop_func_noret op_4ab0_23_nf; +extern cpuop_func_noret op_4ab0_23_ff; +extern cpuop_func_noret op_4ab8_23_nf; +extern cpuop_func_noret op_4ab8_23_ff; +extern cpuop_func_noret op_4ab9_23_nf; +extern cpuop_func_noret op_4ab9_23_ff; +extern cpuop_func_noret op_4aba_23_nf; +extern cpuop_func_noret op_4aba_23_ff; +extern cpuop_func_noret op_4abb_23_nf; +extern cpuop_func_noret op_4abb_23_ff; +extern cpuop_func_noret op_4abc_23_nf; +extern cpuop_func_noret op_4abc_23_ff; +extern cpuop_func_noret op_4ac0_23_nf; +extern cpuop_func_noret op_4ac0_23_ff; +extern cpuop_func_noret op_4ad0_23_nf; +extern cpuop_func_noret op_4ad0_23_ff; +extern cpuop_func_noret op_4ad8_23_nf; +extern cpuop_func_noret op_4ad8_23_ff; +extern cpuop_func_noret op_4ae0_23_nf; +extern cpuop_func_noret op_4ae0_23_ff; +extern cpuop_func_noret op_4ae8_23_nf; +extern cpuop_func_noret op_4ae8_23_ff; +extern cpuop_func_noret op_4af0_23_nf; +extern cpuop_func_noret op_4af0_23_ff; +extern cpuop_func_noret op_4af8_23_nf; +extern cpuop_func_noret op_4af8_23_ff; +extern cpuop_func_noret op_4af9_23_nf; +extern cpuop_func_noret op_4af9_23_ff; +extern cpuop_func_noret op_4c00_23_nf; +extern cpuop_func_noret op_4c00_23_ff; +extern cpuop_func_noret op_4c10_23_nf; +extern cpuop_func_noret op_4c10_23_ff; +extern cpuop_func_noret op_4c18_23_nf; +extern cpuop_func_noret op_4c18_23_ff; +extern cpuop_func_noret op_4c20_23_nf; +extern cpuop_func_noret op_4c20_23_ff; +extern cpuop_func_noret op_4c28_23_nf; +extern cpuop_func_noret op_4c28_23_ff; +extern cpuop_func_noret op_4c30_23_nf; +extern cpuop_func_noret op_4c30_23_ff; +extern cpuop_func_noret op_4c38_23_nf; +extern cpuop_func_noret op_4c38_23_ff; +extern cpuop_func_noret op_4c39_23_nf; +extern cpuop_func_noret op_4c39_23_ff; +extern cpuop_func_noret op_4c3a_23_nf; +extern cpuop_func_noret op_4c3a_23_ff; +extern cpuop_func_noret op_4c3b_23_nf; +extern cpuop_func_noret op_4c3b_23_ff; +extern cpuop_func_noret op_4c3c_23_nf; +extern cpuop_func_noret op_4c3c_23_ff; +extern cpuop_func_noret op_4c40_23_nf; +extern cpuop_func_noret op_4c40_23_ff; +extern cpuop_func_noret op_4c50_23_nf; +extern cpuop_func_noret op_4c50_23_ff; +extern cpuop_func_noret op_4c58_23_nf; +extern cpuop_func_noret op_4c58_23_ff; +extern cpuop_func_noret op_4c60_23_nf; +extern cpuop_func_noret op_4c60_23_ff; +extern cpuop_func_noret op_4c68_23_nf; +extern cpuop_func_noret op_4c68_23_ff; +extern cpuop_func_noret op_4c70_23_nf; +extern cpuop_func_noret op_4c70_23_ff; +extern cpuop_func_noret op_4c78_23_nf; +extern cpuop_func_noret op_4c78_23_ff; +extern cpuop_func_noret op_4c79_23_nf; +extern cpuop_func_noret op_4c79_23_ff; +extern cpuop_func_noret op_4c7a_23_nf; +extern cpuop_func_noret op_4c7a_23_ff; +extern cpuop_func_noret op_4c7b_23_nf; +extern cpuop_func_noret op_4c7b_23_ff; +extern cpuop_func_noret op_4c7c_23_nf; +extern cpuop_func_noret op_4c7c_23_ff; +extern cpuop_func_noret op_4c90_23_nf; +extern cpuop_func_noret op_4c90_23_ff; +extern cpuop_func_noret op_4c98_23_nf; +extern cpuop_func_noret op_4c98_23_ff; +extern cpuop_func_noret op_4ca8_23_nf; +extern cpuop_func_noret op_4ca8_23_ff; +extern cpuop_func_noret op_4cb0_23_nf; +extern cpuop_func_noret op_4cb0_23_ff; +extern cpuop_func_noret op_4cb8_23_nf; +extern cpuop_func_noret op_4cb8_23_ff; +extern cpuop_func_noret op_4cb9_23_nf; +extern cpuop_func_noret op_4cb9_23_ff; +extern cpuop_func_noret op_4cba_23_nf; +extern cpuop_func_noret op_4cba_23_ff; +extern cpuop_func_noret op_4cbb_23_nf; +extern cpuop_func_noret op_4cbb_23_ff; +extern cpuop_func_noret op_4cd0_23_nf; +extern cpuop_func_noret op_4cd0_23_ff; +extern cpuop_func_noret op_4cd8_23_nf; +extern cpuop_func_noret op_4cd8_23_ff; +extern cpuop_func_noret op_4ce8_23_nf; +extern cpuop_func_noret op_4ce8_23_ff; +extern cpuop_func_noret op_4cf0_23_nf; +extern cpuop_func_noret op_4cf0_23_ff; +extern cpuop_func_noret op_4cf8_23_nf; +extern cpuop_func_noret op_4cf8_23_ff; +extern cpuop_func_noret op_4cf9_23_nf; +extern cpuop_func_noret op_4cf9_23_ff; +extern cpuop_func_noret op_4cfa_23_nf; +extern cpuop_func_noret op_4cfa_23_ff; +extern cpuop_func_noret op_4cfb_23_nf; +extern cpuop_func_noret op_4cfb_23_ff; +extern cpuop_func_noret op_4e40_23_nf; +extern cpuop_func_noret op_4e40_23_ff; +extern cpuop_func_noret op_4e50_23_nf; +extern cpuop_func_noret op_4e50_23_ff; +extern cpuop_func_noret op_4e58_23_nf; +extern cpuop_func_noret op_4e58_23_ff; +extern cpuop_func_noret op_4e60_23_nf; +extern cpuop_func_noret op_4e60_23_ff; +extern cpuop_func_noret op_4e68_23_nf; +extern cpuop_func_noret op_4e68_23_ff; +extern cpuop_func_noret op_4e70_23_nf; +extern cpuop_func_noret op_4e70_23_ff; +extern cpuop_func_noret op_4e71_23_nf; +extern cpuop_func_noret op_4e71_23_ff; +extern cpuop_func_noret op_4e72_23_nf; +extern cpuop_func_noret op_4e72_23_ff; +extern cpuop_func_noret op_4e73_23_nf; +extern cpuop_func_noret op_4e73_23_ff; +extern cpuop_func_noret op_4e74_23_nf; +extern cpuop_func_noret op_4e74_23_ff; +extern cpuop_func_noret op_4e75_23_nf; +extern cpuop_func_noret op_4e75_23_ff; +extern cpuop_func_noret op_4e76_23_nf; +extern cpuop_func_noret op_4e76_23_ff; +extern cpuop_func_noret op_4e77_23_nf; +extern cpuop_func_noret op_4e77_23_ff; +extern cpuop_func_noret op_4e7a_23_nf; +extern cpuop_func_noret op_4e7a_23_ff; +extern cpuop_func_noret op_4e7b_23_nf; +extern cpuop_func_noret op_4e7b_23_ff; +extern cpuop_func_noret op_4e90_23_nf; +extern cpuop_func_noret op_4e90_23_ff; +extern cpuop_func_noret op_4ea8_23_nf; +extern cpuop_func_noret op_4ea8_23_ff; +extern cpuop_func_noret op_4eb0_23_nf; +extern cpuop_func_noret op_4eb0_23_ff; +extern cpuop_func_noret op_4eb8_23_nf; +extern cpuop_func_noret op_4eb8_23_ff; +extern cpuop_func_noret op_4eb9_23_nf; +extern cpuop_func_noret op_4eb9_23_ff; +extern cpuop_func_noret op_4eba_23_nf; +extern cpuop_func_noret op_4eba_23_ff; +extern cpuop_func_noret op_4ebb_23_nf; +extern cpuop_func_noret op_4ebb_23_ff; +extern cpuop_func_noret op_4ed0_23_nf; +extern cpuop_func_noret op_4ed0_23_ff; +extern cpuop_func_noret op_4ee8_23_nf; +extern cpuop_func_noret op_4ee8_23_ff; +extern cpuop_func_noret op_4ef0_23_nf; +extern cpuop_func_noret op_4ef0_23_ff; +extern cpuop_func_noret op_4ef8_23_nf; +extern cpuop_func_noret op_4ef8_23_ff; +extern cpuop_func_noret op_4ef9_23_nf; +extern cpuop_func_noret op_4ef9_23_ff; +extern cpuop_func_noret op_4efa_23_nf; +extern cpuop_func_noret op_4efa_23_ff; +extern cpuop_func_noret op_4efb_23_nf; +extern cpuop_func_noret op_4efb_23_ff; +extern cpuop_func_noret op_5000_23_nf; +extern cpuop_func_noret op_5000_23_ff; +extern cpuop_func_noret op_5010_23_nf; +extern cpuop_func_noret op_5010_23_ff; +extern cpuop_func_noret op_5018_23_nf; +extern cpuop_func_noret op_5018_23_ff; +extern cpuop_func_noret op_5020_23_nf; +extern cpuop_func_noret op_5020_23_ff; +extern cpuop_func_noret op_5028_23_nf; +extern cpuop_func_noret op_5028_23_ff; +extern cpuop_func_noret op_5030_23_nf; +extern cpuop_func_noret op_5030_23_ff; +extern cpuop_func_noret op_5038_23_nf; +extern cpuop_func_noret op_5038_23_ff; +extern cpuop_func_noret op_5039_23_nf; +extern cpuop_func_noret op_5039_23_ff; +extern cpuop_func_noret op_5040_23_nf; +extern cpuop_func_noret op_5040_23_ff; +extern cpuop_func_noret op_5048_23_nf; +extern cpuop_func_noret op_5048_23_ff; +extern cpuop_func_noret op_5050_23_nf; +extern cpuop_func_noret op_5050_23_ff; +extern cpuop_func_noret op_5058_23_nf; +extern cpuop_func_noret op_5058_23_ff; +extern cpuop_func_noret op_5060_23_nf; +extern cpuop_func_noret op_5060_23_ff; +extern cpuop_func_noret op_5068_23_nf; +extern cpuop_func_noret op_5068_23_ff; +extern cpuop_func_noret op_5070_23_nf; +extern cpuop_func_noret op_5070_23_ff; +extern cpuop_func_noret op_5078_23_nf; +extern cpuop_func_noret op_5078_23_ff; +extern cpuop_func_noret op_5079_23_nf; +extern cpuop_func_noret op_5079_23_ff; +extern cpuop_func_noret op_5080_23_nf; +extern cpuop_func_noret op_5080_23_ff; +extern cpuop_func_noret op_5088_23_nf; +extern cpuop_func_noret op_5088_23_ff; +extern cpuop_func_noret op_5090_23_nf; +extern cpuop_func_noret op_5090_23_ff; +extern cpuop_func_noret op_5098_23_nf; +extern cpuop_func_noret op_5098_23_ff; +extern cpuop_func_noret op_50a0_23_nf; +extern cpuop_func_noret op_50a0_23_ff; +extern cpuop_func_noret op_50a8_23_nf; +extern cpuop_func_noret op_50a8_23_ff; +extern cpuop_func_noret op_50b0_23_nf; +extern cpuop_func_noret op_50b0_23_ff; +extern cpuop_func_noret op_50b8_23_nf; +extern cpuop_func_noret op_50b8_23_ff; +extern cpuop_func_noret op_50b9_23_nf; +extern cpuop_func_noret op_50b9_23_ff; +extern cpuop_func_noret op_50c0_23_nf; +extern cpuop_func_noret op_50c0_23_ff; +extern cpuop_func_noret op_50c8_23_nf; +extern cpuop_func_noret op_50c8_23_ff; +extern cpuop_func_noret op_50d0_23_nf; +extern cpuop_func_noret op_50d0_23_ff; +extern cpuop_func_noret op_50d8_23_nf; +extern cpuop_func_noret op_50d8_23_ff; +extern cpuop_func_noret op_50e0_23_nf; +extern cpuop_func_noret op_50e0_23_ff; +extern cpuop_func_noret op_50e8_23_nf; +extern cpuop_func_noret op_50e8_23_ff; +extern cpuop_func_noret op_50f0_23_nf; +extern cpuop_func_noret op_50f0_23_ff; +extern cpuop_func_noret op_50f8_23_nf; +extern cpuop_func_noret op_50f8_23_ff; +extern cpuop_func_noret op_50f9_23_nf; +extern cpuop_func_noret op_50f9_23_ff; +extern cpuop_func_noret op_50fa_23_nf; +extern cpuop_func_noret op_50fa_23_ff; +extern cpuop_func_noret op_50fb_23_nf; +extern cpuop_func_noret op_50fb_23_ff; +extern cpuop_func_noret op_50fc_23_nf; +extern cpuop_func_noret op_50fc_23_ff; +extern cpuop_func_noret op_5100_23_nf; +extern cpuop_func_noret op_5100_23_ff; +extern cpuop_func_noret op_5110_23_nf; +extern cpuop_func_noret op_5110_23_ff; +extern cpuop_func_noret op_5118_23_nf; +extern cpuop_func_noret op_5118_23_ff; +extern cpuop_func_noret op_5120_23_nf; +extern cpuop_func_noret op_5120_23_ff; +extern cpuop_func_noret op_5128_23_nf; +extern cpuop_func_noret op_5128_23_ff; +extern cpuop_func_noret op_5130_23_nf; +extern cpuop_func_noret op_5130_23_ff; +extern cpuop_func_noret op_5138_23_nf; +extern cpuop_func_noret op_5138_23_ff; +extern cpuop_func_noret op_5139_23_nf; +extern cpuop_func_noret op_5139_23_ff; +extern cpuop_func_noret op_5140_23_nf; +extern cpuop_func_noret op_5140_23_ff; +extern cpuop_func_noret op_5148_23_nf; +extern cpuop_func_noret op_5148_23_ff; +extern cpuop_func_noret op_5150_23_nf; +extern cpuop_func_noret op_5150_23_ff; +extern cpuop_func_noret op_5158_23_nf; +extern cpuop_func_noret op_5158_23_ff; +extern cpuop_func_noret op_5160_23_nf; +extern cpuop_func_noret op_5160_23_ff; +extern cpuop_func_noret op_5168_23_nf; +extern cpuop_func_noret op_5168_23_ff; +extern cpuop_func_noret op_5170_23_nf; +extern cpuop_func_noret op_5170_23_ff; +extern cpuop_func_noret op_5178_23_nf; +extern cpuop_func_noret op_5178_23_ff; +extern cpuop_func_noret op_5179_23_nf; +extern cpuop_func_noret op_5179_23_ff; +extern cpuop_func_noret op_5180_23_nf; +extern cpuop_func_noret op_5180_23_ff; +extern cpuop_func_noret op_5188_23_nf; +extern cpuop_func_noret op_5188_23_ff; +extern cpuop_func_noret op_5190_23_nf; +extern cpuop_func_noret op_5190_23_ff; +extern cpuop_func_noret op_5198_23_nf; +extern cpuop_func_noret op_5198_23_ff; +extern cpuop_func_noret op_51a0_23_nf; +extern cpuop_func_noret op_51a0_23_ff; +extern cpuop_func_noret op_51a8_23_nf; +extern cpuop_func_noret op_51a8_23_ff; +extern cpuop_func_noret op_51b0_23_nf; +extern cpuop_func_noret op_51b0_23_ff; +extern cpuop_func_noret op_51b8_23_nf; +extern cpuop_func_noret op_51b8_23_ff; +extern cpuop_func_noret op_51b9_23_nf; +extern cpuop_func_noret op_51b9_23_ff; +extern cpuop_func_noret op_51c0_23_nf; +extern cpuop_func_noret op_51c0_23_ff; +extern cpuop_func_noret op_51c8_23_nf; +extern cpuop_func_noret op_51c8_23_ff; +extern cpuop_func_noret op_51d0_23_nf; +extern cpuop_func_noret op_51d0_23_ff; +extern cpuop_func_noret op_51d8_23_nf; +extern cpuop_func_noret op_51d8_23_ff; +extern cpuop_func_noret op_51e0_23_nf; +extern cpuop_func_noret op_51e0_23_ff; +extern cpuop_func_noret op_51e8_23_nf; +extern cpuop_func_noret op_51e8_23_ff; +extern cpuop_func_noret op_51f0_23_nf; +extern cpuop_func_noret op_51f0_23_ff; +extern cpuop_func_noret op_51f8_23_nf; +extern cpuop_func_noret op_51f8_23_ff; +extern cpuop_func_noret op_51f9_23_nf; +extern cpuop_func_noret op_51f9_23_ff; +extern cpuop_func_noret op_51fa_23_nf; +extern cpuop_func_noret op_51fa_23_ff; +extern cpuop_func_noret op_51fb_23_nf; +extern cpuop_func_noret op_51fb_23_ff; +extern cpuop_func_noret op_51fc_23_nf; +extern cpuop_func_noret op_51fc_23_ff; +extern cpuop_func_noret op_52c0_23_nf; +extern cpuop_func_noret op_52c0_23_ff; +extern cpuop_func_noret op_52c8_23_nf; +extern cpuop_func_noret op_52c8_23_ff; +extern cpuop_func_noret op_52d0_23_nf; +extern cpuop_func_noret op_52d0_23_ff; +extern cpuop_func_noret op_52d8_23_nf; +extern cpuop_func_noret op_52d8_23_ff; +extern cpuop_func_noret op_52e0_23_nf; +extern cpuop_func_noret op_52e0_23_ff; +extern cpuop_func_noret op_52e8_23_nf; +extern cpuop_func_noret op_52e8_23_ff; +extern cpuop_func_noret op_52f0_23_nf; +extern cpuop_func_noret op_52f0_23_ff; +extern cpuop_func_noret op_52f8_23_nf; +extern cpuop_func_noret op_52f8_23_ff; +extern cpuop_func_noret op_52f9_23_nf; +extern cpuop_func_noret op_52f9_23_ff; +extern cpuop_func_noret op_52fa_23_nf; +extern cpuop_func_noret op_52fa_23_ff; +extern cpuop_func_noret op_52fb_23_nf; +extern cpuop_func_noret op_52fb_23_ff; +extern cpuop_func_noret op_52fc_23_nf; +extern cpuop_func_noret op_52fc_23_ff; +extern cpuop_func_noret op_53c0_23_nf; +extern cpuop_func_noret op_53c0_23_ff; +extern cpuop_func_noret op_53c8_23_nf; +extern cpuop_func_noret op_53c8_23_ff; +extern cpuop_func_noret op_53d0_23_nf; +extern cpuop_func_noret op_53d0_23_ff; +extern cpuop_func_noret op_53d8_23_nf; +extern cpuop_func_noret op_53d8_23_ff; +extern cpuop_func_noret op_53e0_23_nf; +extern cpuop_func_noret op_53e0_23_ff; +extern cpuop_func_noret op_53e8_23_nf; +extern cpuop_func_noret op_53e8_23_ff; +extern cpuop_func_noret op_53f0_23_nf; +extern cpuop_func_noret op_53f0_23_ff; +extern cpuop_func_noret op_53f8_23_nf; +extern cpuop_func_noret op_53f8_23_ff; +extern cpuop_func_noret op_53f9_23_nf; +extern cpuop_func_noret op_53f9_23_ff; +extern cpuop_func_noret op_53fa_23_nf; +extern cpuop_func_noret op_53fa_23_ff; +extern cpuop_func_noret op_53fb_23_nf; +extern cpuop_func_noret op_53fb_23_ff; +extern cpuop_func_noret op_53fc_23_nf; +extern cpuop_func_noret op_53fc_23_ff; +extern cpuop_func_noret op_54c0_23_nf; +extern cpuop_func_noret op_54c0_23_ff; +extern cpuop_func_noret op_54c8_23_nf; +extern cpuop_func_noret op_54c8_23_ff; +extern cpuop_func_noret op_54d0_23_nf; +extern cpuop_func_noret op_54d0_23_ff; +extern cpuop_func_noret op_54d8_23_nf; +extern cpuop_func_noret op_54d8_23_ff; +extern cpuop_func_noret op_54e0_23_nf; +extern cpuop_func_noret op_54e0_23_ff; +extern cpuop_func_noret op_54e8_23_nf; +extern cpuop_func_noret op_54e8_23_ff; +extern cpuop_func_noret op_54f0_23_nf; +extern cpuop_func_noret op_54f0_23_ff; +extern cpuop_func_noret op_54f8_23_nf; +extern cpuop_func_noret op_54f8_23_ff; +extern cpuop_func_noret op_54f9_23_nf; +extern cpuop_func_noret op_54f9_23_ff; +extern cpuop_func_noret op_54fa_23_nf; +extern cpuop_func_noret op_54fa_23_ff; +extern cpuop_func_noret op_54fb_23_nf; +extern cpuop_func_noret op_54fb_23_ff; +extern cpuop_func_noret op_54fc_23_nf; +extern cpuop_func_noret op_54fc_23_ff; +extern cpuop_func_noret op_55c0_23_nf; +extern cpuop_func_noret op_55c0_23_ff; +extern cpuop_func_noret op_55c8_23_nf; +extern cpuop_func_noret op_55c8_23_ff; +extern cpuop_func_noret op_55d0_23_nf; +extern cpuop_func_noret op_55d0_23_ff; +extern cpuop_func_noret op_55d8_23_nf; +extern cpuop_func_noret op_55d8_23_ff; +extern cpuop_func_noret op_55e0_23_nf; +extern cpuop_func_noret op_55e0_23_ff; +extern cpuop_func_noret op_55e8_23_nf; +extern cpuop_func_noret op_55e8_23_ff; +extern cpuop_func_noret op_55f0_23_nf; +extern cpuop_func_noret op_55f0_23_ff; +extern cpuop_func_noret op_55f8_23_nf; +extern cpuop_func_noret op_55f8_23_ff; +extern cpuop_func_noret op_55f9_23_nf; +extern cpuop_func_noret op_55f9_23_ff; +extern cpuop_func_noret op_55fa_23_nf; +extern cpuop_func_noret op_55fa_23_ff; +extern cpuop_func_noret op_55fb_23_nf; +extern cpuop_func_noret op_55fb_23_ff; +extern cpuop_func_noret op_55fc_23_nf; +extern cpuop_func_noret op_55fc_23_ff; +extern cpuop_func_noret op_56c0_23_nf; +extern cpuop_func_noret op_56c0_23_ff; +extern cpuop_func_noret op_56c8_23_nf; +extern cpuop_func_noret op_56c8_23_ff; +extern cpuop_func_noret op_56d0_23_nf; +extern cpuop_func_noret op_56d0_23_ff; +extern cpuop_func_noret op_56d8_23_nf; +extern cpuop_func_noret op_56d8_23_ff; +extern cpuop_func_noret op_56e0_23_nf; +extern cpuop_func_noret op_56e0_23_ff; +extern cpuop_func_noret op_56e8_23_nf; +extern cpuop_func_noret op_56e8_23_ff; +extern cpuop_func_noret op_56f0_23_nf; +extern cpuop_func_noret op_56f0_23_ff; +extern cpuop_func_noret op_56f8_23_nf; +extern cpuop_func_noret op_56f8_23_ff; +extern cpuop_func_noret op_56f9_23_nf; +extern cpuop_func_noret op_56f9_23_ff; +extern cpuop_func_noret op_56fa_23_nf; +extern cpuop_func_noret op_56fa_23_ff; +extern cpuop_func_noret op_56fb_23_nf; +extern cpuop_func_noret op_56fb_23_ff; +extern cpuop_func_noret op_56fc_23_nf; +extern cpuop_func_noret op_56fc_23_ff; +extern cpuop_func_noret op_57c0_23_nf; +extern cpuop_func_noret op_57c0_23_ff; +extern cpuop_func_noret op_57c8_23_nf; +extern cpuop_func_noret op_57c8_23_ff; +extern cpuop_func_noret op_57d0_23_nf; +extern cpuop_func_noret op_57d0_23_ff; +extern cpuop_func_noret op_57d8_23_nf; +extern cpuop_func_noret op_57d8_23_ff; +extern cpuop_func_noret op_57e0_23_nf; +extern cpuop_func_noret op_57e0_23_ff; +extern cpuop_func_noret op_57e8_23_nf; +extern cpuop_func_noret op_57e8_23_ff; +extern cpuop_func_noret op_57f0_23_nf; +extern cpuop_func_noret op_57f0_23_ff; +extern cpuop_func_noret op_57f8_23_nf; +extern cpuop_func_noret op_57f8_23_ff; +extern cpuop_func_noret op_57f9_23_nf; +extern cpuop_func_noret op_57f9_23_ff; +extern cpuop_func_noret op_57fa_23_nf; +extern cpuop_func_noret op_57fa_23_ff; +extern cpuop_func_noret op_57fb_23_nf; +extern cpuop_func_noret op_57fb_23_ff; +extern cpuop_func_noret op_57fc_23_nf; +extern cpuop_func_noret op_57fc_23_ff; +extern cpuop_func_noret op_58c0_23_nf; +extern cpuop_func_noret op_58c0_23_ff; +extern cpuop_func_noret op_58c8_23_nf; +extern cpuop_func_noret op_58c8_23_ff; +extern cpuop_func_noret op_58d0_23_nf; +extern cpuop_func_noret op_58d0_23_ff; +extern cpuop_func_noret op_58d8_23_nf; +extern cpuop_func_noret op_58d8_23_ff; +extern cpuop_func_noret op_58e0_23_nf; +extern cpuop_func_noret op_58e0_23_ff; +extern cpuop_func_noret op_58e8_23_nf; +extern cpuop_func_noret op_58e8_23_ff; +extern cpuop_func_noret op_58f0_23_nf; +extern cpuop_func_noret op_58f0_23_ff; +extern cpuop_func_noret op_58f8_23_nf; +extern cpuop_func_noret op_58f8_23_ff; +extern cpuop_func_noret op_58f9_23_nf; +extern cpuop_func_noret op_58f9_23_ff; +extern cpuop_func_noret op_58fa_23_nf; +extern cpuop_func_noret op_58fa_23_ff; +extern cpuop_func_noret op_58fb_23_nf; +extern cpuop_func_noret op_58fb_23_ff; +extern cpuop_func_noret op_58fc_23_nf; +extern cpuop_func_noret op_58fc_23_ff; +extern cpuop_func_noret op_59c0_23_nf; +extern cpuop_func_noret op_59c0_23_ff; +extern cpuop_func_noret op_59c8_23_nf; +extern cpuop_func_noret op_59c8_23_ff; +extern cpuop_func_noret op_59d0_23_nf; +extern cpuop_func_noret op_59d0_23_ff; +extern cpuop_func_noret op_59d8_23_nf; +extern cpuop_func_noret op_59d8_23_ff; +extern cpuop_func_noret op_59e0_23_nf; +extern cpuop_func_noret op_59e0_23_ff; +extern cpuop_func_noret op_59e8_23_nf; +extern cpuop_func_noret op_59e8_23_ff; +extern cpuop_func_noret op_59f0_23_nf; +extern cpuop_func_noret op_59f0_23_ff; +extern cpuop_func_noret op_59f8_23_nf; +extern cpuop_func_noret op_59f8_23_ff; +extern cpuop_func_noret op_59f9_23_nf; +extern cpuop_func_noret op_59f9_23_ff; +extern cpuop_func_noret op_59fa_23_nf; +extern cpuop_func_noret op_59fa_23_ff; +extern cpuop_func_noret op_59fb_23_nf; +extern cpuop_func_noret op_59fb_23_ff; +extern cpuop_func_noret op_59fc_23_nf; +extern cpuop_func_noret op_59fc_23_ff; +extern cpuop_func_noret op_5ac0_23_nf; +extern cpuop_func_noret op_5ac0_23_ff; +extern cpuop_func_noret op_5ac8_23_nf; +extern cpuop_func_noret op_5ac8_23_ff; +extern cpuop_func_noret op_5ad0_23_nf; +extern cpuop_func_noret op_5ad0_23_ff; +extern cpuop_func_noret op_5ad8_23_nf; +extern cpuop_func_noret op_5ad8_23_ff; +extern cpuop_func_noret op_5ae0_23_nf; +extern cpuop_func_noret op_5ae0_23_ff; +extern cpuop_func_noret op_5ae8_23_nf; +extern cpuop_func_noret op_5ae8_23_ff; +extern cpuop_func_noret op_5af0_23_nf; +extern cpuop_func_noret op_5af0_23_ff; +extern cpuop_func_noret op_5af8_23_nf; +extern cpuop_func_noret op_5af8_23_ff; +extern cpuop_func_noret op_5af9_23_nf; +extern cpuop_func_noret op_5af9_23_ff; +extern cpuop_func_noret op_5afa_23_nf; +extern cpuop_func_noret op_5afa_23_ff; +extern cpuop_func_noret op_5afb_23_nf; +extern cpuop_func_noret op_5afb_23_ff; +extern cpuop_func_noret op_5afc_23_nf; +extern cpuop_func_noret op_5afc_23_ff; +extern cpuop_func_noret op_5bc0_23_nf; +extern cpuop_func_noret op_5bc0_23_ff; +extern cpuop_func_noret op_5bc8_23_nf; +extern cpuop_func_noret op_5bc8_23_ff; +extern cpuop_func_noret op_5bd0_23_nf; +extern cpuop_func_noret op_5bd0_23_ff; +extern cpuop_func_noret op_5bd8_23_nf; +extern cpuop_func_noret op_5bd8_23_ff; +extern cpuop_func_noret op_5be0_23_nf; +extern cpuop_func_noret op_5be0_23_ff; +extern cpuop_func_noret op_5be8_23_nf; +extern cpuop_func_noret op_5be8_23_ff; +extern cpuop_func_noret op_5bf0_23_nf; +extern cpuop_func_noret op_5bf0_23_ff; +extern cpuop_func_noret op_5bf8_23_nf; +extern cpuop_func_noret op_5bf8_23_ff; +extern cpuop_func_noret op_5bf9_23_nf; +extern cpuop_func_noret op_5bf9_23_ff; +extern cpuop_func_noret op_5bfa_23_nf; +extern cpuop_func_noret op_5bfa_23_ff; +extern cpuop_func_noret op_5bfb_23_nf; +extern cpuop_func_noret op_5bfb_23_ff; +extern cpuop_func_noret op_5bfc_23_nf; +extern cpuop_func_noret op_5bfc_23_ff; +extern cpuop_func_noret op_5cc0_23_nf; +extern cpuop_func_noret op_5cc0_23_ff; +extern cpuop_func_noret op_5cc8_23_nf; +extern cpuop_func_noret op_5cc8_23_ff; +extern cpuop_func_noret op_5cd0_23_nf; +extern cpuop_func_noret op_5cd0_23_ff; +extern cpuop_func_noret op_5cd8_23_nf; +extern cpuop_func_noret op_5cd8_23_ff; +extern cpuop_func_noret op_5ce0_23_nf; +extern cpuop_func_noret op_5ce0_23_ff; +extern cpuop_func_noret op_5ce8_23_nf; +extern cpuop_func_noret op_5ce8_23_ff; +extern cpuop_func_noret op_5cf0_23_nf; +extern cpuop_func_noret op_5cf0_23_ff; +extern cpuop_func_noret op_5cf8_23_nf; +extern cpuop_func_noret op_5cf8_23_ff; +extern cpuop_func_noret op_5cf9_23_nf; +extern cpuop_func_noret op_5cf9_23_ff; +extern cpuop_func_noret op_5cfa_23_nf; +extern cpuop_func_noret op_5cfa_23_ff; +extern cpuop_func_noret op_5cfb_23_nf; +extern cpuop_func_noret op_5cfb_23_ff; +extern cpuop_func_noret op_5cfc_23_nf; +extern cpuop_func_noret op_5cfc_23_ff; +extern cpuop_func_noret op_5dc0_23_nf; +extern cpuop_func_noret op_5dc0_23_ff; +extern cpuop_func_noret op_5dc8_23_nf; +extern cpuop_func_noret op_5dc8_23_ff; +extern cpuop_func_noret op_5dd0_23_nf; +extern cpuop_func_noret op_5dd0_23_ff; +extern cpuop_func_noret op_5dd8_23_nf; +extern cpuop_func_noret op_5dd8_23_ff; +extern cpuop_func_noret op_5de0_23_nf; +extern cpuop_func_noret op_5de0_23_ff; +extern cpuop_func_noret op_5de8_23_nf; +extern cpuop_func_noret op_5de8_23_ff; +extern cpuop_func_noret op_5df0_23_nf; +extern cpuop_func_noret op_5df0_23_ff; +extern cpuop_func_noret op_5df8_23_nf; +extern cpuop_func_noret op_5df8_23_ff; +extern cpuop_func_noret op_5df9_23_nf; +extern cpuop_func_noret op_5df9_23_ff; +extern cpuop_func_noret op_5dfa_23_nf; +extern cpuop_func_noret op_5dfa_23_ff; +extern cpuop_func_noret op_5dfb_23_nf; +extern cpuop_func_noret op_5dfb_23_ff; +extern cpuop_func_noret op_5dfc_23_nf; +extern cpuop_func_noret op_5dfc_23_ff; +extern cpuop_func_noret op_5ec0_23_nf; +extern cpuop_func_noret op_5ec0_23_ff; +extern cpuop_func_noret op_5ec8_23_nf; +extern cpuop_func_noret op_5ec8_23_ff; +extern cpuop_func_noret op_5ed0_23_nf; +extern cpuop_func_noret op_5ed0_23_ff; +extern cpuop_func_noret op_5ed8_23_nf; +extern cpuop_func_noret op_5ed8_23_ff; +extern cpuop_func_noret op_5ee0_23_nf; +extern cpuop_func_noret op_5ee0_23_ff; +extern cpuop_func_noret op_5ee8_23_nf; +extern cpuop_func_noret op_5ee8_23_ff; +extern cpuop_func_noret op_5ef0_23_nf; +extern cpuop_func_noret op_5ef0_23_ff; +extern cpuop_func_noret op_5ef8_23_nf; +extern cpuop_func_noret op_5ef8_23_ff; +extern cpuop_func_noret op_5ef9_23_nf; +extern cpuop_func_noret op_5ef9_23_ff; +extern cpuop_func_noret op_5efa_23_nf; +extern cpuop_func_noret op_5efa_23_ff; +extern cpuop_func_noret op_5efb_23_nf; +extern cpuop_func_noret op_5efb_23_ff; +extern cpuop_func_noret op_5efc_23_nf; +extern cpuop_func_noret op_5efc_23_ff; +extern cpuop_func_noret op_5fc0_23_nf; +extern cpuop_func_noret op_5fc0_23_ff; +extern cpuop_func_noret op_5fc8_23_nf; +extern cpuop_func_noret op_5fc8_23_ff; +extern cpuop_func_noret op_5fd0_23_nf; +extern cpuop_func_noret op_5fd0_23_ff; +extern cpuop_func_noret op_5fd8_23_nf; +extern cpuop_func_noret op_5fd8_23_ff; +extern cpuop_func_noret op_5fe0_23_nf; +extern cpuop_func_noret op_5fe0_23_ff; +extern cpuop_func_noret op_5fe8_23_nf; +extern cpuop_func_noret op_5fe8_23_ff; +extern cpuop_func_noret op_5ff0_23_nf; +extern cpuop_func_noret op_5ff0_23_ff; +extern cpuop_func_noret op_5ff8_23_nf; +extern cpuop_func_noret op_5ff8_23_ff; +extern cpuop_func_noret op_5ff9_23_nf; +extern cpuop_func_noret op_5ff9_23_ff; +extern cpuop_func_noret op_5ffa_23_nf; +extern cpuop_func_noret op_5ffa_23_ff; +extern cpuop_func_noret op_5ffb_23_nf; +extern cpuop_func_noret op_5ffb_23_ff; +extern cpuop_func_noret op_5ffc_23_nf; +extern cpuop_func_noret op_5ffc_23_ff; +extern cpuop_func_noret op_6000_23_nf; +extern cpuop_func_noret op_6000_23_ff; +extern cpuop_func_noret op_6001_23_nf; +extern cpuop_func_noret op_6001_23_ff; +extern cpuop_func_noret op_60ff_23_nf; +extern cpuop_func_noret op_60ff_23_ff; +extern cpuop_func_noret op_6100_23_nf; +extern cpuop_func_noret op_6100_23_ff; +extern cpuop_func_noret op_6101_23_nf; +extern cpuop_func_noret op_6101_23_ff; +extern cpuop_func_noret op_61ff_23_nf; +extern cpuop_func_noret op_61ff_23_ff; +extern cpuop_func_noret op_6200_23_nf; +extern cpuop_func_noret op_6200_23_ff; +extern cpuop_func_noret op_6201_23_nf; +extern cpuop_func_noret op_6201_23_ff; +extern cpuop_func_noret op_62ff_23_nf; +extern cpuop_func_noret op_62ff_23_ff; +extern cpuop_func_noret op_6300_23_nf; +extern cpuop_func_noret op_6300_23_ff; +extern cpuop_func_noret op_6301_23_nf; +extern cpuop_func_noret op_6301_23_ff; +extern cpuop_func_noret op_63ff_23_nf; +extern cpuop_func_noret op_63ff_23_ff; +extern cpuop_func_noret op_6400_23_nf; +extern cpuop_func_noret op_6400_23_ff; +extern cpuop_func_noret op_6401_23_nf; +extern cpuop_func_noret op_6401_23_ff; +extern cpuop_func_noret op_64ff_23_nf; +extern cpuop_func_noret op_64ff_23_ff; +extern cpuop_func_noret op_6500_23_nf; +extern cpuop_func_noret op_6500_23_ff; +extern cpuop_func_noret op_6501_23_nf; +extern cpuop_func_noret op_6501_23_ff; +extern cpuop_func_noret op_65ff_23_nf; +extern cpuop_func_noret op_65ff_23_ff; +extern cpuop_func_noret op_6600_23_nf; +extern cpuop_func_noret op_6600_23_ff; +extern cpuop_func_noret op_6601_23_nf; +extern cpuop_func_noret op_6601_23_ff; +extern cpuop_func_noret op_66ff_23_nf; +extern cpuop_func_noret op_66ff_23_ff; +extern cpuop_func_noret op_6700_23_nf; +extern cpuop_func_noret op_6700_23_ff; +extern cpuop_func_noret op_6701_23_nf; +extern cpuop_func_noret op_6701_23_ff; +extern cpuop_func_noret op_67ff_23_nf; +extern cpuop_func_noret op_67ff_23_ff; +extern cpuop_func_noret op_6800_23_nf; +extern cpuop_func_noret op_6800_23_ff; +extern cpuop_func_noret op_6801_23_nf; +extern cpuop_func_noret op_6801_23_ff; +extern cpuop_func_noret op_68ff_23_nf; +extern cpuop_func_noret op_68ff_23_ff; +extern cpuop_func_noret op_6900_23_nf; +extern cpuop_func_noret op_6900_23_ff; +extern cpuop_func_noret op_6901_23_nf; +extern cpuop_func_noret op_6901_23_ff; +extern cpuop_func_noret op_69ff_23_nf; +extern cpuop_func_noret op_69ff_23_ff; +extern cpuop_func_noret op_6a00_23_nf; +extern cpuop_func_noret op_6a00_23_ff; +extern cpuop_func_noret op_6a01_23_nf; +extern cpuop_func_noret op_6a01_23_ff; +extern cpuop_func_noret op_6aff_23_nf; +extern cpuop_func_noret op_6aff_23_ff; +extern cpuop_func_noret op_6b00_23_nf; +extern cpuop_func_noret op_6b00_23_ff; +extern cpuop_func_noret op_6b01_23_nf; +extern cpuop_func_noret op_6b01_23_ff; +extern cpuop_func_noret op_6bff_23_nf; +extern cpuop_func_noret op_6bff_23_ff; +extern cpuop_func_noret op_6c00_23_nf; +extern cpuop_func_noret op_6c00_23_ff; +extern cpuop_func_noret op_6c01_23_nf; +extern cpuop_func_noret op_6c01_23_ff; +extern cpuop_func_noret op_6cff_23_nf; +extern cpuop_func_noret op_6cff_23_ff; +extern cpuop_func_noret op_6d00_23_nf; +extern cpuop_func_noret op_6d00_23_ff; +extern cpuop_func_noret op_6d01_23_nf; +extern cpuop_func_noret op_6d01_23_ff; +extern cpuop_func_noret op_6dff_23_nf; +extern cpuop_func_noret op_6dff_23_ff; +extern cpuop_func_noret op_6e00_23_nf; +extern cpuop_func_noret op_6e00_23_ff; +extern cpuop_func_noret op_6e01_23_nf; +extern cpuop_func_noret op_6e01_23_ff; +extern cpuop_func_noret op_6eff_23_nf; +extern cpuop_func_noret op_6eff_23_ff; +extern cpuop_func_noret op_6f00_23_nf; +extern cpuop_func_noret op_6f00_23_ff; +extern cpuop_func_noret op_6f01_23_nf; +extern cpuop_func_noret op_6f01_23_ff; +extern cpuop_func_noret op_6fff_23_nf; +extern cpuop_func_noret op_6fff_23_ff; +extern cpuop_func_noret op_7000_23_nf; +extern cpuop_func_noret op_7000_23_ff; +extern cpuop_func_noret op_8000_23_nf; +extern cpuop_func_noret op_8000_23_ff; +extern cpuop_func_noret op_8010_23_nf; +extern cpuop_func_noret op_8010_23_ff; +extern cpuop_func_noret op_8018_23_nf; +extern cpuop_func_noret op_8018_23_ff; +extern cpuop_func_noret op_8020_23_nf; +extern cpuop_func_noret op_8020_23_ff; +extern cpuop_func_noret op_8028_23_nf; +extern cpuop_func_noret op_8028_23_ff; +extern cpuop_func_noret op_8030_23_nf; +extern cpuop_func_noret op_8030_23_ff; +extern cpuop_func_noret op_8038_23_nf; +extern cpuop_func_noret op_8038_23_ff; +extern cpuop_func_noret op_8039_23_nf; +extern cpuop_func_noret op_8039_23_ff; +extern cpuop_func_noret op_803a_23_nf; +extern cpuop_func_noret op_803a_23_ff; +extern cpuop_func_noret op_803b_23_nf; +extern cpuop_func_noret op_803b_23_ff; +extern cpuop_func_noret op_803c_23_nf; +extern cpuop_func_noret op_803c_23_ff; +extern cpuop_func_noret op_8040_23_nf; +extern cpuop_func_noret op_8040_23_ff; +extern cpuop_func_noret op_8050_23_nf; +extern cpuop_func_noret op_8050_23_ff; +extern cpuop_func_noret op_8058_23_nf; +extern cpuop_func_noret op_8058_23_ff; +extern cpuop_func_noret op_8060_23_nf; +extern cpuop_func_noret op_8060_23_ff; +extern cpuop_func_noret op_8068_23_nf; +extern cpuop_func_noret op_8068_23_ff; +extern cpuop_func_noret op_8070_23_nf; +extern cpuop_func_noret op_8070_23_ff; +extern cpuop_func_noret op_8078_23_nf; +extern cpuop_func_noret op_8078_23_ff; +extern cpuop_func_noret op_8079_23_nf; +extern cpuop_func_noret op_8079_23_ff; +extern cpuop_func_noret op_807a_23_nf; +extern cpuop_func_noret op_807a_23_ff; +extern cpuop_func_noret op_807b_23_nf; +extern cpuop_func_noret op_807b_23_ff; +extern cpuop_func_noret op_807c_23_nf; +extern cpuop_func_noret op_807c_23_ff; +extern cpuop_func_noret op_8080_23_nf; +extern cpuop_func_noret op_8080_23_ff; +extern cpuop_func_noret op_8090_23_nf; +extern cpuop_func_noret op_8090_23_ff; +extern cpuop_func_noret op_8098_23_nf; +extern cpuop_func_noret op_8098_23_ff; +extern cpuop_func_noret op_80a0_23_nf; +extern cpuop_func_noret op_80a0_23_ff; +extern cpuop_func_noret op_80a8_23_nf; +extern cpuop_func_noret op_80a8_23_ff; +extern cpuop_func_noret op_80b0_23_nf; +extern cpuop_func_noret op_80b0_23_ff; +extern cpuop_func_noret op_80b8_23_nf; +extern cpuop_func_noret op_80b8_23_ff; +extern cpuop_func_noret op_80b9_23_nf; +extern cpuop_func_noret op_80b9_23_ff; +extern cpuop_func_noret op_80ba_23_nf; +extern cpuop_func_noret op_80ba_23_ff; +extern cpuop_func_noret op_80bb_23_nf; +extern cpuop_func_noret op_80bb_23_ff; +extern cpuop_func_noret op_80bc_23_nf; +extern cpuop_func_noret op_80bc_23_ff; +extern cpuop_func_noret op_80c0_23_nf; +extern cpuop_func_noret op_80c0_23_ff; +extern cpuop_func_noret op_80d0_23_nf; +extern cpuop_func_noret op_80d0_23_ff; +extern cpuop_func_noret op_80d8_23_nf; +extern cpuop_func_noret op_80d8_23_ff; +extern cpuop_func_noret op_80e0_23_nf; +extern cpuop_func_noret op_80e0_23_ff; +extern cpuop_func_noret op_80e8_23_nf; +extern cpuop_func_noret op_80e8_23_ff; +extern cpuop_func_noret op_80f0_23_nf; +extern cpuop_func_noret op_80f0_23_ff; +extern cpuop_func_noret op_80f8_23_nf; +extern cpuop_func_noret op_80f8_23_ff; +extern cpuop_func_noret op_80f9_23_nf; +extern cpuop_func_noret op_80f9_23_ff; +extern cpuop_func_noret op_80fa_23_nf; +extern cpuop_func_noret op_80fa_23_ff; +extern cpuop_func_noret op_80fb_23_nf; +extern cpuop_func_noret op_80fb_23_ff; +extern cpuop_func_noret op_80fc_23_nf; +extern cpuop_func_noret op_80fc_23_ff; +extern cpuop_func_noret op_8100_23_nf; +extern cpuop_func_noret op_8100_23_ff; +extern cpuop_func_noret op_8108_23_nf; +extern cpuop_func_noret op_8108_23_ff; +extern cpuop_func_noret op_8110_23_nf; +extern cpuop_func_noret op_8110_23_ff; +extern cpuop_func_noret op_8118_23_nf; +extern cpuop_func_noret op_8118_23_ff; +extern cpuop_func_noret op_8120_23_nf; +extern cpuop_func_noret op_8120_23_ff; +extern cpuop_func_noret op_8128_23_nf; +extern cpuop_func_noret op_8128_23_ff; +extern cpuop_func_noret op_8130_23_nf; +extern cpuop_func_noret op_8130_23_ff; +extern cpuop_func_noret op_8138_23_nf; +extern cpuop_func_noret op_8138_23_ff; +extern cpuop_func_noret op_8139_23_nf; +extern cpuop_func_noret op_8139_23_ff; +extern cpuop_func_noret op_8140_23_nf; +extern cpuop_func_noret op_8140_23_ff; +extern cpuop_func_noret op_8148_23_nf; +extern cpuop_func_noret op_8148_23_ff; +extern cpuop_func_noret op_8150_23_nf; +extern cpuop_func_noret op_8150_23_ff; +extern cpuop_func_noret op_8158_23_nf; +extern cpuop_func_noret op_8158_23_ff; +extern cpuop_func_noret op_8160_23_nf; +extern cpuop_func_noret op_8160_23_ff; +extern cpuop_func_noret op_8168_23_nf; +extern cpuop_func_noret op_8168_23_ff; +extern cpuop_func_noret op_8170_23_nf; +extern cpuop_func_noret op_8170_23_ff; +extern cpuop_func_noret op_8178_23_nf; +extern cpuop_func_noret op_8178_23_ff; +extern cpuop_func_noret op_8179_23_nf; +extern cpuop_func_noret op_8179_23_ff; +extern cpuop_func_noret op_8180_23_nf; +extern cpuop_func_noret op_8180_23_ff; +extern cpuop_func_noret op_8188_23_nf; +extern cpuop_func_noret op_8188_23_ff; +extern cpuop_func_noret op_8190_23_nf; +extern cpuop_func_noret op_8190_23_ff; +extern cpuop_func_noret op_8198_23_nf; +extern cpuop_func_noret op_8198_23_ff; +extern cpuop_func_noret op_81a0_23_nf; +extern cpuop_func_noret op_81a0_23_ff; +extern cpuop_func_noret op_81a8_23_nf; +extern cpuop_func_noret op_81a8_23_ff; +extern cpuop_func_noret op_81b0_23_nf; +extern cpuop_func_noret op_81b0_23_ff; +extern cpuop_func_noret op_81b8_23_nf; +extern cpuop_func_noret op_81b8_23_ff; +extern cpuop_func_noret op_81b9_23_nf; +extern cpuop_func_noret op_81b9_23_ff; +extern cpuop_func_noret op_81c0_23_nf; +extern cpuop_func_noret op_81c0_23_ff; +extern cpuop_func_noret op_81d0_23_nf; +extern cpuop_func_noret op_81d0_23_ff; +extern cpuop_func_noret op_81d8_23_nf; +extern cpuop_func_noret op_81d8_23_ff; +extern cpuop_func_noret op_81e0_23_nf; +extern cpuop_func_noret op_81e0_23_ff; +extern cpuop_func_noret op_81e8_23_nf; +extern cpuop_func_noret op_81e8_23_ff; +extern cpuop_func_noret op_81f0_23_nf; +extern cpuop_func_noret op_81f0_23_ff; +extern cpuop_func_noret op_81f8_23_nf; +extern cpuop_func_noret op_81f8_23_ff; +extern cpuop_func_noret op_81f9_23_nf; +extern cpuop_func_noret op_81f9_23_ff; +extern cpuop_func_noret op_81fa_23_nf; +extern cpuop_func_noret op_81fa_23_ff; +extern cpuop_func_noret op_81fb_23_nf; +extern cpuop_func_noret op_81fb_23_ff; +extern cpuop_func_noret op_81fc_23_nf; +extern cpuop_func_noret op_81fc_23_ff; +extern cpuop_func_noret op_9000_23_nf; +extern cpuop_func_noret op_9000_23_ff; +extern cpuop_func_noret op_9010_23_nf; +extern cpuop_func_noret op_9010_23_ff; +extern cpuop_func_noret op_9018_23_nf; +extern cpuop_func_noret op_9018_23_ff; +extern cpuop_func_noret op_9020_23_nf; +extern cpuop_func_noret op_9020_23_ff; +extern cpuop_func_noret op_9028_23_nf; +extern cpuop_func_noret op_9028_23_ff; +extern cpuop_func_noret op_9030_23_nf; +extern cpuop_func_noret op_9030_23_ff; +extern cpuop_func_noret op_9038_23_nf; +extern cpuop_func_noret op_9038_23_ff; +extern cpuop_func_noret op_9039_23_nf; +extern cpuop_func_noret op_9039_23_ff; +extern cpuop_func_noret op_903a_23_nf; +extern cpuop_func_noret op_903a_23_ff; +extern cpuop_func_noret op_903b_23_nf; +extern cpuop_func_noret op_903b_23_ff; +extern cpuop_func_noret op_903c_23_nf; +extern cpuop_func_noret op_903c_23_ff; +extern cpuop_func_noret op_9040_23_nf; +extern cpuop_func_noret op_9040_23_ff; +extern cpuop_func_noret op_9048_23_nf; +extern cpuop_func_noret op_9048_23_ff; +extern cpuop_func_noret op_9050_23_nf; +extern cpuop_func_noret op_9050_23_ff; +extern cpuop_func_noret op_9058_23_nf; +extern cpuop_func_noret op_9058_23_ff; +extern cpuop_func_noret op_9060_23_nf; +extern cpuop_func_noret op_9060_23_ff; +extern cpuop_func_noret op_9068_23_nf; +extern cpuop_func_noret op_9068_23_ff; +extern cpuop_func_noret op_9070_23_nf; +extern cpuop_func_noret op_9070_23_ff; +extern cpuop_func_noret op_9078_23_nf; +extern cpuop_func_noret op_9078_23_ff; +extern cpuop_func_noret op_9079_23_nf; +extern cpuop_func_noret op_9079_23_ff; +extern cpuop_func_noret op_907a_23_nf; +extern cpuop_func_noret op_907a_23_ff; +extern cpuop_func_noret op_907b_23_nf; +extern cpuop_func_noret op_907b_23_ff; +extern cpuop_func_noret op_907c_23_nf; +extern cpuop_func_noret op_907c_23_ff; +extern cpuop_func_noret op_9080_23_nf; +extern cpuop_func_noret op_9080_23_ff; +extern cpuop_func_noret op_9088_23_nf; +extern cpuop_func_noret op_9088_23_ff; +extern cpuop_func_noret op_9090_23_nf; +extern cpuop_func_noret op_9090_23_ff; +extern cpuop_func_noret op_9098_23_nf; +extern cpuop_func_noret op_9098_23_ff; +extern cpuop_func_noret op_90a0_23_nf; +extern cpuop_func_noret op_90a0_23_ff; +extern cpuop_func_noret op_90a8_23_nf; +extern cpuop_func_noret op_90a8_23_ff; +extern cpuop_func_noret op_90b0_23_nf; +extern cpuop_func_noret op_90b0_23_ff; +extern cpuop_func_noret op_90b8_23_nf; +extern cpuop_func_noret op_90b8_23_ff; +extern cpuop_func_noret op_90b9_23_nf; +extern cpuop_func_noret op_90b9_23_ff; +extern cpuop_func_noret op_90ba_23_nf; +extern cpuop_func_noret op_90ba_23_ff; +extern cpuop_func_noret op_90bb_23_nf; +extern cpuop_func_noret op_90bb_23_ff; +extern cpuop_func_noret op_90bc_23_nf; +extern cpuop_func_noret op_90bc_23_ff; +extern cpuop_func_noret op_90c0_23_nf; +extern cpuop_func_noret op_90c0_23_ff; +extern cpuop_func_noret op_90c8_23_nf; +extern cpuop_func_noret op_90c8_23_ff; +extern cpuop_func_noret op_90d0_23_nf; +extern cpuop_func_noret op_90d0_23_ff; +extern cpuop_func_noret op_90d8_23_nf; +extern cpuop_func_noret op_90d8_23_ff; +extern cpuop_func_noret op_90e0_23_nf; +extern cpuop_func_noret op_90e0_23_ff; +extern cpuop_func_noret op_90e8_23_nf; +extern cpuop_func_noret op_90e8_23_ff; +extern cpuop_func_noret op_90f0_23_nf; +extern cpuop_func_noret op_90f0_23_ff; +extern cpuop_func_noret op_90f8_23_nf; +extern cpuop_func_noret op_90f8_23_ff; +extern cpuop_func_noret op_90f9_23_nf; +extern cpuop_func_noret op_90f9_23_ff; +extern cpuop_func_noret op_90fa_23_nf; +extern cpuop_func_noret op_90fa_23_ff; +extern cpuop_func_noret op_90fb_23_nf; +extern cpuop_func_noret op_90fb_23_ff; +extern cpuop_func_noret op_90fc_23_nf; +extern cpuop_func_noret op_90fc_23_ff; +extern cpuop_func_noret op_9100_23_nf; +extern cpuop_func_noret op_9100_23_ff; +extern cpuop_func_noret op_9108_23_nf; +extern cpuop_func_noret op_9108_23_ff; +extern cpuop_func_noret op_9110_23_nf; +extern cpuop_func_noret op_9110_23_ff; +extern cpuop_func_noret op_9118_23_nf; +extern cpuop_func_noret op_9118_23_ff; +extern cpuop_func_noret op_9120_23_nf; +extern cpuop_func_noret op_9120_23_ff; +extern cpuop_func_noret op_9128_23_nf; +extern cpuop_func_noret op_9128_23_ff; +extern cpuop_func_noret op_9130_23_nf; +extern cpuop_func_noret op_9130_23_ff; +extern cpuop_func_noret op_9138_23_nf; +extern cpuop_func_noret op_9138_23_ff; +extern cpuop_func_noret op_9139_23_nf; +extern cpuop_func_noret op_9139_23_ff; +extern cpuop_func_noret op_9140_23_nf; +extern cpuop_func_noret op_9140_23_ff; +extern cpuop_func_noret op_9148_23_nf; +extern cpuop_func_noret op_9148_23_ff; +extern cpuop_func_noret op_9150_23_nf; +extern cpuop_func_noret op_9150_23_ff; +extern cpuop_func_noret op_9158_23_nf; +extern cpuop_func_noret op_9158_23_ff; +extern cpuop_func_noret op_9160_23_nf; +extern cpuop_func_noret op_9160_23_ff; +extern cpuop_func_noret op_9168_23_nf; +extern cpuop_func_noret op_9168_23_ff; +extern cpuop_func_noret op_9170_23_nf; +extern cpuop_func_noret op_9170_23_ff; +extern cpuop_func_noret op_9178_23_nf; +extern cpuop_func_noret op_9178_23_ff; +extern cpuop_func_noret op_9179_23_nf; +extern cpuop_func_noret op_9179_23_ff; +extern cpuop_func_noret op_9180_23_nf; +extern cpuop_func_noret op_9180_23_ff; +extern cpuop_func_noret op_9188_23_nf; +extern cpuop_func_noret op_9188_23_ff; +extern cpuop_func_noret op_9190_23_nf; +extern cpuop_func_noret op_9190_23_ff; +extern cpuop_func_noret op_9198_23_nf; +extern cpuop_func_noret op_9198_23_ff; +extern cpuop_func_noret op_91a0_23_nf; +extern cpuop_func_noret op_91a0_23_ff; +extern cpuop_func_noret op_91a8_23_nf; +extern cpuop_func_noret op_91a8_23_ff; +extern cpuop_func_noret op_91b0_23_nf; +extern cpuop_func_noret op_91b0_23_ff; +extern cpuop_func_noret op_91b8_23_nf; +extern cpuop_func_noret op_91b8_23_ff; +extern cpuop_func_noret op_91b9_23_nf; +extern cpuop_func_noret op_91b9_23_ff; +extern cpuop_func_noret op_91c0_23_nf; +extern cpuop_func_noret op_91c0_23_ff; +extern cpuop_func_noret op_91c8_23_nf; +extern cpuop_func_noret op_91c8_23_ff; +extern cpuop_func_noret op_91d0_23_nf; +extern cpuop_func_noret op_91d0_23_ff; +extern cpuop_func_noret op_91d8_23_nf; +extern cpuop_func_noret op_91d8_23_ff; +extern cpuop_func_noret op_91e0_23_nf; +extern cpuop_func_noret op_91e0_23_ff; +extern cpuop_func_noret op_91e8_23_nf; +extern cpuop_func_noret op_91e8_23_ff; +extern cpuop_func_noret op_91f0_23_nf; +extern cpuop_func_noret op_91f0_23_ff; +extern cpuop_func_noret op_91f8_23_nf; +extern cpuop_func_noret op_91f8_23_ff; +extern cpuop_func_noret op_91f9_23_nf; +extern cpuop_func_noret op_91f9_23_ff; +extern cpuop_func_noret op_91fa_23_nf; +extern cpuop_func_noret op_91fa_23_ff; +extern cpuop_func_noret op_91fb_23_nf; +extern cpuop_func_noret op_91fb_23_ff; +extern cpuop_func_noret op_91fc_23_nf; +extern cpuop_func_noret op_91fc_23_ff; +extern cpuop_func_noret op_b000_23_nf; +extern cpuop_func_noret op_b000_23_ff; +extern cpuop_func_noret op_b010_23_nf; +extern cpuop_func_noret op_b010_23_ff; +extern cpuop_func_noret op_b018_23_nf; +extern cpuop_func_noret op_b018_23_ff; +extern cpuop_func_noret op_b020_23_nf; +extern cpuop_func_noret op_b020_23_ff; +extern cpuop_func_noret op_b028_23_nf; +extern cpuop_func_noret op_b028_23_ff; +extern cpuop_func_noret op_b030_23_nf; +extern cpuop_func_noret op_b030_23_ff; +extern cpuop_func_noret op_b038_23_nf; +extern cpuop_func_noret op_b038_23_ff; +extern cpuop_func_noret op_b039_23_nf; +extern cpuop_func_noret op_b039_23_ff; +extern cpuop_func_noret op_b03a_23_nf; +extern cpuop_func_noret op_b03a_23_ff; +extern cpuop_func_noret op_b03b_23_nf; +extern cpuop_func_noret op_b03b_23_ff; +extern cpuop_func_noret op_b03c_23_nf; +extern cpuop_func_noret op_b03c_23_ff; +extern cpuop_func_noret op_b040_23_nf; +extern cpuop_func_noret op_b040_23_ff; +extern cpuop_func_noret op_b048_23_nf; +extern cpuop_func_noret op_b048_23_ff; +extern cpuop_func_noret op_b050_23_nf; +extern cpuop_func_noret op_b050_23_ff; +extern cpuop_func_noret op_b058_23_nf; +extern cpuop_func_noret op_b058_23_ff; +extern cpuop_func_noret op_b060_23_nf; +extern cpuop_func_noret op_b060_23_ff; +extern cpuop_func_noret op_b068_23_nf; +extern cpuop_func_noret op_b068_23_ff; +extern cpuop_func_noret op_b070_23_nf; +extern cpuop_func_noret op_b070_23_ff; +extern cpuop_func_noret op_b078_23_nf; +extern cpuop_func_noret op_b078_23_ff; +extern cpuop_func_noret op_b079_23_nf; +extern cpuop_func_noret op_b079_23_ff; +extern cpuop_func_noret op_b07a_23_nf; +extern cpuop_func_noret op_b07a_23_ff; +extern cpuop_func_noret op_b07b_23_nf; +extern cpuop_func_noret op_b07b_23_ff; +extern cpuop_func_noret op_b07c_23_nf; +extern cpuop_func_noret op_b07c_23_ff; +extern cpuop_func_noret op_b080_23_nf; +extern cpuop_func_noret op_b080_23_ff; +extern cpuop_func_noret op_b088_23_nf; +extern cpuop_func_noret op_b088_23_ff; +extern cpuop_func_noret op_b090_23_nf; +extern cpuop_func_noret op_b090_23_ff; +extern cpuop_func_noret op_b098_23_nf; +extern cpuop_func_noret op_b098_23_ff; +extern cpuop_func_noret op_b0a0_23_nf; +extern cpuop_func_noret op_b0a0_23_ff; +extern cpuop_func_noret op_b0a8_23_nf; +extern cpuop_func_noret op_b0a8_23_ff; +extern cpuop_func_noret op_b0b0_23_nf; +extern cpuop_func_noret op_b0b0_23_ff; +extern cpuop_func_noret op_b0b8_23_nf; +extern cpuop_func_noret op_b0b8_23_ff; +extern cpuop_func_noret op_b0b9_23_nf; +extern cpuop_func_noret op_b0b9_23_ff; +extern cpuop_func_noret op_b0ba_23_nf; +extern cpuop_func_noret op_b0ba_23_ff; +extern cpuop_func_noret op_b0bb_23_nf; +extern cpuop_func_noret op_b0bb_23_ff; +extern cpuop_func_noret op_b0bc_23_nf; +extern cpuop_func_noret op_b0bc_23_ff; +extern cpuop_func_noret op_b0c0_23_nf; +extern cpuop_func_noret op_b0c0_23_ff; +extern cpuop_func_noret op_b0c8_23_nf; +extern cpuop_func_noret op_b0c8_23_ff; +extern cpuop_func_noret op_b0d0_23_nf; +extern cpuop_func_noret op_b0d0_23_ff; +extern cpuop_func_noret op_b0d8_23_nf; +extern cpuop_func_noret op_b0d8_23_ff; +extern cpuop_func_noret op_b0e0_23_nf; +extern cpuop_func_noret op_b0e0_23_ff; +extern cpuop_func_noret op_b0e8_23_nf; +extern cpuop_func_noret op_b0e8_23_ff; +extern cpuop_func_noret op_b0f0_23_nf; +extern cpuop_func_noret op_b0f0_23_ff; +extern cpuop_func_noret op_b0f8_23_nf; +extern cpuop_func_noret op_b0f8_23_ff; +extern cpuop_func_noret op_b0f9_23_nf; +extern cpuop_func_noret op_b0f9_23_ff; +extern cpuop_func_noret op_b0fa_23_nf; +extern cpuop_func_noret op_b0fa_23_ff; +extern cpuop_func_noret op_b0fb_23_nf; +extern cpuop_func_noret op_b0fb_23_ff; +extern cpuop_func_noret op_b0fc_23_nf; +extern cpuop_func_noret op_b0fc_23_ff; +extern cpuop_func_noret op_b100_23_nf; +extern cpuop_func_noret op_b100_23_ff; +extern cpuop_func_noret op_b108_23_nf; +extern cpuop_func_noret op_b108_23_ff; +extern cpuop_func_noret op_b110_23_nf; +extern cpuop_func_noret op_b110_23_ff; +extern cpuop_func_noret op_b118_23_nf; +extern cpuop_func_noret op_b118_23_ff; +extern cpuop_func_noret op_b120_23_nf; +extern cpuop_func_noret op_b120_23_ff; +extern cpuop_func_noret op_b128_23_nf; +extern cpuop_func_noret op_b128_23_ff; +extern cpuop_func_noret op_b130_23_nf; +extern cpuop_func_noret op_b130_23_ff; +extern cpuop_func_noret op_b138_23_nf; +extern cpuop_func_noret op_b138_23_ff; +extern cpuop_func_noret op_b139_23_nf; +extern cpuop_func_noret op_b139_23_ff; +extern cpuop_func_noret op_b140_23_nf; +extern cpuop_func_noret op_b140_23_ff; +extern cpuop_func_noret op_b148_23_nf; +extern cpuop_func_noret op_b148_23_ff; +extern cpuop_func_noret op_b150_23_nf; +extern cpuop_func_noret op_b150_23_ff; +extern cpuop_func_noret op_b158_23_nf; +extern cpuop_func_noret op_b158_23_ff; +extern cpuop_func_noret op_b160_23_nf; +extern cpuop_func_noret op_b160_23_ff; +extern cpuop_func_noret op_b168_23_nf; +extern cpuop_func_noret op_b168_23_ff; +extern cpuop_func_noret op_b170_23_nf; +extern cpuop_func_noret op_b170_23_ff; +extern cpuop_func_noret op_b178_23_nf; +extern cpuop_func_noret op_b178_23_ff; +extern cpuop_func_noret op_b179_23_nf; +extern cpuop_func_noret op_b179_23_ff; +extern cpuop_func_noret op_b180_23_nf; +extern cpuop_func_noret op_b180_23_ff; +extern cpuop_func_noret op_b188_23_nf; +extern cpuop_func_noret op_b188_23_ff; +extern cpuop_func_noret op_b190_23_nf; +extern cpuop_func_noret op_b190_23_ff; +extern cpuop_func_noret op_b198_23_nf; +extern cpuop_func_noret op_b198_23_ff; +extern cpuop_func_noret op_b1a0_23_nf; +extern cpuop_func_noret op_b1a0_23_ff; +extern cpuop_func_noret op_b1a8_23_nf; +extern cpuop_func_noret op_b1a8_23_ff; +extern cpuop_func_noret op_b1b0_23_nf; +extern cpuop_func_noret op_b1b0_23_ff; +extern cpuop_func_noret op_b1b8_23_nf; +extern cpuop_func_noret op_b1b8_23_ff; +extern cpuop_func_noret op_b1b9_23_nf; +extern cpuop_func_noret op_b1b9_23_ff; +extern cpuop_func_noret op_b1c0_23_nf; +extern cpuop_func_noret op_b1c0_23_ff; +extern cpuop_func_noret op_b1c8_23_nf; +extern cpuop_func_noret op_b1c8_23_ff; +extern cpuop_func_noret op_b1d0_23_nf; +extern cpuop_func_noret op_b1d0_23_ff; +extern cpuop_func_noret op_b1d8_23_nf; +extern cpuop_func_noret op_b1d8_23_ff; +extern cpuop_func_noret op_b1e0_23_nf; +extern cpuop_func_noret op_b1e0_23_ff; +extern cpuop_func_noret op_b1e8_23_nf; +extern cpuop_func_noret op_b1e8_23_ff; +extern cpuop_func_noret op_b1f0_23_nf; +extern cpuop_func_noret op_b1f0_23_ff; +extern cpuop_func_noret op_b1f8_23_nf; +extern cpuop_func_noret op_b1f8_23_ff; +extern cpuop_func_noret op_b1f9_23_nf; +extern cpuop_func_noret op_b1f9_23_ff; +extern cpuop_func_noret op_b1fa_23_nf; +extern cpuop_func_noret op_b1fa_23_ff; +extern cpuop_func_noret op_b1fb_23_nf; +extern cpuop_func_noret op_b1fb_23_ff; +extern cpuop_func_noret op_b1fc_23_nf; +extern cpuop_func_noret op_b1fc_23_ff; +extern cpuop_func_noret op_c000_23_nf; +extern cpuop_func_noret op_c000_23_ff; +extern cpuop_func_noret op_c010_23_nf; +extern cpuop_func_noret op_c010_23_ff; +extern cpuop_func_noret op_c018_23_nf; +extern cpuop_func_noret op_c018_23_ff; +extern cpuop_func_noret op_c020_23_nf; +extern cpuop_func_noret op_c020_23_ff; +extern cpuop_func_noret op_c028_23_nf; +extern cpuop_func_noret op_c028_23_ff; +extern cpuop_func_noret op_c030_23_nf; +extern cpuop_func_noret op_c030_23_ff; +extern cpuop_func_noret op_c038_23_nf; +extern cpuop_func_noret op_c038_23_ff; +extern cpuop_func_noret op_c039_23_nf; +extern cpuop_func_noret op_c039_23_ff; +extern cpuop_func_noret op_c03a_23_nf; +extern cpuop_func_noret op_c03a_23_ff; +extern cpuop_func_noret op_c03b_23_nf; +extern cpuop_func_noret op_c03b_23_ff; +extern cpuop_func_noret op_c03c_23_nf; +extern cpuop_func_noret op_c03c_23_ff; +extern cpuop_func_noret op_c040_23_nf; +extern cpuop_func_noret op_c040_23_ff; +extern cpuop_func_noret op_c050_23_nf; +extern cpuop_func_noret op_c050_23_ff; +extern cpuop_func_noret op_c058_23_nf; +extern cpuop_func_noret op_c058_23_ff; +extern cpuop_func_noret op_c060_23_nf; +extern cpuop_func_noret op_c060_23_ff; +extern cpuop_func_noret op_c068_23_nf; +extern cpuop_func_noret op_c068_23_ff; +extern cpuop_func_noret op_c070_23_nf; +extern cpuop_func_noret op_c070_23_ff; +extern cpuop_func_noret op_c078_23_nf; +extern cpuop_func_noret op_c078_23_ff; +extern cpuop_func_noret op_c079_23_nf; +extern cpuop_func_noret op_c079_23_ff; +extern cpuop_func_noret op_c07a_23_nf; +extern cpuop_func_noret op_c07a_23_ff; +extern cpuop_func_noret op_c07b_23_nf; +extern cpuop_func_noret op_c07b_23_ff; +extern cpuop_func_noret op_c07c_23_nf; +extern cpuop_func_noret op_c07c_23_ff; +extern cpuop_func_noret op_c080_23_nf; +extern cpuop_func_noret op_c080_23_ff; +extern cpuop_func_noret op_c090_23_nf; +extern cpuop_func_noret op_c090_23_ff; +extern cpuop_func_noret op_c098_23_nf; +extern cpuop_func_noret op_c098_23_ff; +extern cpuop_func_noret op_c0a0_23_nf; +extern cpuop_func_noret op_c0a0_23_ff; +extern cpuop_func_noret op_c0a8_23_nf; +extern cpuop_func_noret op_c0a8_23_ff; +extern cpuop_func_noret op_c0b0_23_nf; +extern cpuop_func_noret op_c0b0_23_ff; +extern cpuop_func_noret op_c0b8_23_nf; +extern cpuop_func_noret op_c0b8_23_ff; +extern cpuop_func_noret op_c0b9_23_nf; +extern cpuop_func_noret op_c0b9_23_ff; +extern cpuop_func_noret op_c0ba_23_nf; +extern cpuop_func_noret op_c0ba_23_ff; +extern cpuop_func_noret op_c0bb_23_nf; +extern cpuop_func_noret op_c0bb_23_ff; +extern cpuop_func_noret op_c0bc_23_nf; +extern cpuop_func_noret op_c0bc_23_ff; +extern cpuop_func_noret op_c0c0_23_nf; +extern cpuop_func_noret op_c0c0_23_ff; +extern cpuop_func_noret op_c0d0_23_nf; +extern cpuop_func_noret op_c0d0_23_ff; +extern cpuop_func_noret op_c0d8_23_nf; +extern cpuop_func_noret op_c0d8_23_ff; +extern cpuop_func_noret op_c0e0_23_nf; +extern cpuop_func_noret op_c0e0_23_ff; +extern cpuop_func_noret op_c0e8_23_nf; +extern cpuop_func_noret op_c0e8_23_ff; +extern cpuop_func_noret op_c0f0_23_nf; +extern cpuop_func_noret op_c0f0_23_ff; +extern cpuop_func_noret op_c0f8_23_nf; +extern cpuop_func_noret op_c0f8_23_ff; +extern cpuop_func_noret op_c0f9_23_nf; +extern cpuop_func_noret op_c0f9_23_ff; +extern cpuop_func_noret op_c0fa_23_nf; +extern cpuop_func_noret op_c0fa_23_ff; +extern cpuop_func_noret op_c0fb_23_nf; +extern cpuop_func_noret op_c0fb_23_ff; +extern cpuop_func_noret op_c0fc_23_nf; +extern cpuop_func_noret op_c0fc_23_ff; +extern cpuop_func_noret op_c100_23_nf; +extern cpuop_func_noret op_c100_23_ff; +extern cpuop_func_noret op_c108_23_nf; +extern cpuop_func_noret op_c108_23_ff; +extern cpuop_func_noret op_c110_23_nf; +extern cpuop_func_noret op_c110_23_ff; +extern cpuop_func_noret op_c118_23_nf; +extern cpuop_func_noret op_c118_23_ff; +extern cpuop_func_noret op_c120_23_nf; +extern cpuop_func_noret op_c120_23_ff; +extern cpuop_func_noret op_c128_23_nf; +extern cpuop_func_noret op_c128_23_ff; +extern cpuop_func_noret op_c130_23_nf; +extern cpuop_func_noret op_c130_23_ff; +extern cpuop_func_noret op_c138_23_nf; +extern cpuop_func_noret op_c138_23_ff; +extern cpuop_func_noret op_c139_23_nf; +extern cpuop_func_noret op_c139_23_ff; +extern cpuop_func_noret op_c140_23_nf; +extern cpuop_func_noret op_c140_23_ff; +extern cpuop_func_noret op_c148_23_nf; +extern cpuop_func_noret op_c148_23_ff; +extern cpuop_func_noret op_c150_23_nf; +extern cpuop_func_noret op_c150_23_ff; +extern cpuop_func_noret op_c158_23_nf; +extern cpuop_func_noret op_c158_23_ff; +extern cpuop_func_noret op_c160_23_nf; +extern cpuop_func_noret op_c160_23_ff; +extern cpuop_func_noret op_c168_23_nf; +extern cpuop_func_noret op_c168_23_ff; +extern cpuop_func_noret op_c170_23_nf; +extern cpuop_func_noret op_c170_23_ff; +extern cpuop_func_noret op_c178_23_nf; +extern cpuop_func_noret op_c178_23_ff; +extern cpuop_func_noret op_c179_23_nf; +extern cpuop_func_noret op_c179_23_ff; +extern cpuop_func_noret op_c188_23_nf; +extern cpuop_func_noret op_c188_23_ff; +extern cpuop_func_noret op_c190_23_nf; +extern cpuop_func_noret op_c190_23_ff; +extern cpuop_func_noret op_c198_23_nf; +extern cpuop_func_noret op_c198_23_ff; +extern cpuop_func_noret op_c1a0_23_nf; +extern cpuop_func_noret op_c1a0_23_ff; +extern cpuop_func_noret op_c1a8_23_nf; +extern cpuop_func_noret op_c1a8_23_ff; +extern cpuop_func_noret op_c1b0_23_nf; +extern cpuop_func_noret op_c1b0_23_ff; +extern cpuop_func_noret op_c1b8_23_nf; +extern cpuop_func_noret op_c1b8_23_ff; +extern cpuop_func_noret op_c1b9_23_nf; +extern cpuop_func_noret op_c1b9_23_ff; +extern cpuop_func_noret op_c1c0_23_nf; +extern cpuop_func_noret op_c1c0_23_ff; +extern cpuop_func_noret op_c1d0_23_nf; +extern cpuop_func_noret op_c1d0_23_ff; +extern cpuop_func_noret op_c1d8_23_nf; +extern cpuop_func_noret op_c1d8_23_ff; +extern cpuop_func_noret op_c1e0_23_nf; +extern cpuop_func_noret op_c1e0_23_ff; +extern cpuop_func_noret op_c1e8_23_nf; +extern cpuop_func_noret op_c1e8_23_ff; +extern cpuop_func_noret op_c1f0_23_nf; +extern cpuop_func_noret op_c1f0_23_ff; +extern cpuop_func_noret op_c1f8_23_nf; +extern cpuop_func_noret op_c1f8_23_ff; +extern cpuop_func_noret op_c1f9_23_nf; +extern cpuop_func_noret op_c1f9_23_ff; +extern cpuop_func_noret op_c1fa_23_nf; +extern cpuop_func_noret op_c1fa_23_ff; +extern cpuop_func_noret op_c1fb_23_nf; +extern cpuop_func_noret op_c1fb_23_ff; +extern cpuop_func_noret op_c1fc_23_nf; +extern cpuop_func_noret op_c1fc_23_ff; +extern cpuop_func_noret op_d000_23_nf; +extern cpuop_func_noret op_d000_23_ff; +extern cpuop_func_noret op_d010_23_nf; +extern cpuop_func_noret op_d010_23_ff; +extern cpuop_func_noret op_d018_23_nf; +extern cpuop_func_noret op_d018_23_ff; +extern cpuop_func_noret op_d020_23_nf; +extern cpuop_func_noret op_d020_23_ff; +extern cpuop_func_noret op_d028_23_nf; +extern cpuop_func_noret op_d028_23_ff; +extern cpuop_func_noret op_d030_23_nf; +extern cpuop_func_noret op_d030_23_ff; +extern cpuop_func_noret op_d038_23_nf; +extern cpuop_func_noret op_d038_23_ff; +extern cpuop_func_noret op_d039_23_nf; +extern cpuop_func_noret op_d039_23_ff; +extern cpuop_func_noret op_d03a_23_nf; +extern cpuop_func_noret op_d03a_23_ff; +extern cpuop_func_noret op_d03b_23_nf; +extern cpuop_func_noret op_d03b_23_ff; +extern cpuop_func_noret op_d03c_23_nf; +extern cpuop_func_noret op_d03c_23_ff; +extern cpuop_func_noret op_d040_23_nf; +extern cpuop_func_noret op_d040_23_ff; +extern cpuop_func_noret op_d048_23_nf; +extern cpuop_func_noret op_d048_23_ff; +extern cpuop_func_noret op_d050_23_nf; +extern cpuop_func_noret op_d050_23_ff; +extern cpuop_func_noret op_d058_23_nf; +extern cpuop_func_noret op_d058_23_ff; +extern cpuop_func_noret op_d060_23_nf; +extern cpuop_func_noret op_d060_23_ff; +extern cpuop_func_noret op_d068_23_nf; +extern cpuop_func_noret op_d068_23_ff; +extern cpuop_func_noret op_d070_23_nf; +extern cpuop_func_noret op_d070_23_ff; +extern cpuop_func_noret op_d078_23_nf; +extern cpuop_func_noret op_d078_23_ff; +extern cpuop_func_noret op_d079_23_nf; +extern cpuop_func_noret op_d079_23_ff; +extern cpuop_func_noret op_d07a_23_nf; +extern cpuop_func_noret op_d07a_23_ff; +extern cpuop_func_noret op_d07b_23_nf; +extern cpuop_func_noret op_d07b_23_ff; +extern cpuop_func_noret op_d07c_23_nf; +extern cpuop_func_noret op_d07c_23_ff; +extern cpuop_func_noret op_d080_23_nf; +extern cpuop_func_noret op_d080_23_ff; +extern cpuop_func_noret op_d088_23_nf; +extern cpuop_func_noret op_d088_23_ff; +extern cpuop_func_noret op_d090_23_nf; +extern cpuop_func_noret op_d090_23_ff; +extern cpuop_func_noret op_d098_23_nf; +extern cpuop_func_noret op_d098_23_ff; +extern cpuop_func_noret op_d0a0_23_nf; +extern cpuop_func_noret op_d0a0_23_ff; +extern cpuop_func_noret op_d0a8_23_nf; +extern cpuop_func_noret op_d0a8_23_ff; +extern cpuop_func_noret op_d0b0_23_nf; +extern cpuop_func_noret op_d0b0_23_ff; +extern cpuop_func_noret op_d0b8_23_nf; +extern cpuop_func_noret op_d0b8_23_ff; +extern cpuop_func_noret op_d0b9_23_nf; +extern cpuop_func_noret op_d0b9_23_ff; +extern cpuop_func_noret op_d0ba_23_nf; +extern cpuop_func_noret op_d0ba_23_ff; +extern cpuop_func_noret op_d0bb_23_nf; +extern cpuop_func_noret op_d0bb_23_ff; +extern cpuop_func_noret op_d0bc_23_nf; +extern cpuop_func_noret op_d0bc_23_ff; +extern cpuop_func_noret op_d0c0_23_nf; +extern cpuop_func_noret op_d0c0_23_ff; +extern cpuop_func_noret op_d0c8_23_nf; +extern cpuop_func_noret op_d0c8_23_ff; +extern cpuop_func_noret op_d0d0_23_nf; +extern cpuop_func_noret op_d0d0_23_ff; +extern cpuop_func_noret op_d0d8_23_nf; +extern cpuop_func_noret op_d0d8_23_ff; +extern cpuop_func_noret op_d0e0_23_nf; +extern cpuop_func_noret op_d0e0_23_ff; +extern cpuop_func_noret op_d0e8_23_nf; +extern cpuop_func_noret op_d0e8_23_ff; +extern cpuop_func_noret op_d0f0_23_nf; +extern cpuop_func_noret op_d0f0_23_ff; +extern cpuop_func_noret op_d0f8_23_nf; +extern cpuop_func_noret op_d0f8_23_ff; +extern cpuop_func_noret op_d0f9_23_nf; +extern cpuop_func_noret op_d0f9_23_ff; +extern cpuop_func_noret op_d0fa_23_nf; +extern cpuop_func_noret op_d0fa_23_ff; +extern cpuop_func_noret op_d0fb_23_nf; +extern cpuop_func_noret op_d0fb_23_ff; +extern cpuop_func_noret op_d0fc_23_nf; +extern cpuop_func_noret op_d0fc_23_ff; +extern cpuop_func_noret op_d100_23_nf; +extern cpuop_func_noret op_d100_23_ff; +extern cpuop_func_noret op_d108_23_nf; +extern cpuop_func_noret op_d108_23_ff; +extern cpuop_func_noret op_d110_23_nf; +extern cpuop_func_noret op_d110_23_ff; +extern cpuop_func_noret op_d118_23_nf; +extern cpuop_func_noret op_d118_23_ff; +extern cpuop_func_noret op_d120_23_nf; +extern cpuop_func_noret op_d120_23_ff; +extern cpuop_func_noret op_d128_23_nf; +extern cpuop_func_noret op_d128_23_ff; +extern cpuop_func_noret op_d130_23_nf; +extern cpuop_func_noret op_d130_23_ff; +extern cpuop_func_noret op_d138_23_nf; +extern cpuop_func_noret op_d138_23_ff; +extern cpuop_func_noret op_d139_23_nf; +extern cpuop_func_noret op_d139_23_ff; +extern cpuop_func_noret op_d140_23_nf; +extern cpuop_func_noret op_d140_23_ff; +extern cpuop_func_noret op_d148_23_nf; +extern cpuop_func_noret op_d148_23_ff; +extern cpuop_func_noret op_d150_23_nf; +extern cpuop_func_noret op_d150_23_ff; +extern cpuop_func_noret op_d158_23_nf; +extern cpuop_func_noret op_d158_23_ff; +extern cpuop_func_noret op_d160_23_nf; +extern cpuop_func_noret op_d160_23_ff; +extern cpuop_func_noret op_d168_23_nf; +extern cpuop_func_noret op_d168_23_ff; +extern cpuop_func_noret op_d170_23_nf; +extern cpuop_func_noret op_d170_23_ff; +extern cpuop_func_noret op_d178_23_nf; +extern cpuop_func_noret op_d178_23_ff; +extern cpuop_func_noret op_d179_23_nf; +extern cpuop_func_noret op_d179_23_ff; +extern cpuop_func_noret op_d180_23_nf; +extern cpuop_func_noret op_d180_23_ff; +extern cpuop_func_noret op_d188_23_nf; +extern cpuop_func_noret op_d188_23_ff; +extern cpuop_func_noret op_d190_23_nf; +extern cpuop_func_noret op_d190_23_ff; +extern cpuop_func_noret op_d198_23_nf; +extern cpuop_func_noret op_d198_23_ff; +extern cpuop_func_noret op_d1a0_23_nf; +extern cpuop_func_noret op_d1a0_23_ff; +extern cpuop_func_noret op_d1a8_23_nf; +extern cpuop_func_noret op_d1a8_23_ff; +extern cpuop_func_noret op_d1b0_23_nf; +extern cpuop_func_noret op_d1b0_23_ff; +extern cpuop_func_noret op_d1b8_23_nf; +extern cpuop_func_noret op_d1b8_23_ff; +extern cpuop_func_noret op_d1b9_23_nf; +extern cpuop_func_noret op_d1b9_23_ff; +extern cpuop_func_noret op_d1c0_23_nf; +extern cpuop_func_noret op_d1c0_23_ff; +extern cpuop_func_noret op_d1c8_23_nf; +extern cpuop_func_noret op_d1c8_23_ff; +extern cpuop_func_noret op_d1d0_23_nf; +extern cpuop_func_noret op_d1d0_23_ff; +extern cpuop_func_noret op_d1d8_23_nf; +extern cpuop_func_noret op_d1d8_23_ff; +extern cpuop_func_noret op_d1e0_23_nf; +extern cpuop_func_noret op_d1e0_23_ff; +extern cpuop_func_noret op_d1e8_23_nf; +extern cpuop_func_noret op_d1e8_23_ff; +extern cpuop_func_noret op_d1f0_23_nf; +extern cpuop_func_noret op_d1f0_23_ff; +extern cpuop_func_noret op_d1f8_23_nf; +extern cpuop_func_noret op_d1f8_23_ff; +extern cpuop_func_noret op_d1f9_23_nf; +extern cpuop_func_noret op_d1f9_23_ff; +extern cpuop_func_noret op_d1fa_23_nf; +extern cpuop_func_noret op_d1fa_23_ff; +extern cpuop_func_noret op_d1fb_23_nf; +extern cpuop_func_noret op_d1fb_23_ff; +extern cpuop_func_noret op_d1fc_23_nf; +extern cpuop_func_noret op_d1fc_23_ff; +extern cpuop_func_noret op_e000_23_nf; +extern cpuop_func_noret op_e000_23_ff; +extern cpuop_func_noret op_e008_23_nf; +extern cpuop_func_noret op_e008_23_ff; +extern cpuop_func_noret op_e010_23_nf; +extern cpuop_func_noret op_e010_23_ff; +extern cpuop_func_noret op_e018_23_nf; +extern cpuop_func_noret op_e018_23_ff; +extern cpuop_func_noret op_e020_23_nf; +extern cpuop_func_noret op_e020_23_ff; +extern cpuop_func_noret op_e028_23_nf; +extern cpuop_func_noret op_e028_23_ff; +extern cpuop_func_noret op_e030_23_nf; +extern cpuop_func_noret op_e030_23_ff; +extern cpuop_func_noret op_e038_23_nf; +extern cpuop_func_noret op_e038_23_ff; +extern cpuop_func_noret op_e040_23_nf; +extern cpuop_func_noret op_e040_23_ff; +extern cpuop_func_noret op_e048_23_nf; +extern cpuop_func_noret op_e048_23_ff; +extern cpuop_func_noret op_e050_23_nf; +extern cpuop_func_noret op_e050_23_ff; +extern cpuop_func_noret op_e058_23_nf; +extern cpuop_func_noret op_e058_23_ff; +extern cpuop_func_noret op_e060_23_nf; +extern cpuop_func_noret op_e060_23_ff; +extern cpuop_func_noret op_e068_23_nf; +extern cpuop_func_noret op_e068_23_ff; +extern cpuop_func_noret op_e070_23_nf; +extern cpuop_func_noret op_e070_23_ff; +extern cpuop_func_noret op_e078_23_nf; +extern cpuop_func_noret op_e078_23_ff; +extern cpuop_func_noret op_e080_23_nf; +extern cpuop_func_noret op_e080_23_ff; +extern cpuop_func_noret op_e088_23_nf; +extern cpuop_func_noret op_e088_23_ff; +extern cpuop_func_noret op_e090_23_nf; +extern cpuop_func_noret op_e090_23_ff; +extern cpuop_func_noret op_e098_23_nf; +extern cpuop_func_noret op_e098_23_ff; +extern cpuop_func_noret op_e0a0_23_nf; +extern cpuop_func_noret op_e0a0_23_ff; +extern cpuop_func_noret op_e0a8_23_nf; +extern cpuop_func_noret op_e0a8_23_ff; +extern cpuop_func_noret op_e0b0_23_nf; +extern cpuop_func_noret op_e0b0_23_ff; +extern cpuop_func_noret op_e0b8_23_nf; +extern cpuop_func_noret op_e0b8_23_ff; +extern cpuop_func_noret op_e0d0_23_nf; +extern cpuop_func_noret op_e0d0_23_ff; +extern cpuop_func_noret op_e0d8_23_nf; +extern cpuop_func_noret op_e0d8_23_ff; +extern cpuop_func_noret op_e0e0_23_nf; +extern cpuop_func_noret op_e0e0_23_ff; +extern cpuop_func_noret op_e0e8_23_nf; +extern cpuop_func_noret op_e0e8_23_ff; +extern cpuop_func_noret op_e0f0_23_nf; +extern cpuop_func_noret op_e0f0_23_ff; +extern cpuop_func_noret op_e0f8_23_nf; +extern cpuop_func_noret op_e0f8_23_ff; +extern cpuop_func_noret op_e0f9_23_nf; +extern cpuop_func_noret op_e0f9_23_ff; +extern cpuop_func_noret op_e100_23_nf; +extern cpuop_func_noret op_e100_23_ff; +extern cpuop_func_noret op_e108_23_nf; +extern cpuop_func_noret op_e108_23_ff; +extern cpuop_func_noret op_e110_23_nf; +extern cpuop_func_noret op_e110_23_ff; +extern cpuop_func_noret op_e118_23_nf; +extern cpuop_func_noret op_e118_23_ff; +extern cpuop_func_noret op_e120_23_nf; +extern cpuop_func_noret op_e120_23_ff; +extern cpuop_func_noret op_e128_23_nf; +extern cpuop_func_noret op_e128_23_ff; +extern cpuop_func_noret op_e130_23_nf; +extern cpuop_func_noret op_e130_23_ff; +extern cpuop_func_noret op_e138_23_nf; +extern cpuop_func_noret op_e138_23_ff; +extern cpuop_func_noret op_e140_23_nf; +extern cpuop_func_noret op_e140_23_ff; +extern cpuop_func_noret op_e148_23_nf; +extern cpuop_func_noret op_e148_23_ff; +extern cpuop_func_noret op_e150_23_nf; +extern cpuop_func_noret op_e150_23_ff; +extern cpuop_func_noret op_e158_23_nf; +extern cpuop_func_noret op_e158_23_ff; +extern cpuop_func_noret op_e160_23_nf; +extern cpuop_func_noret op_e160_23_ff; +extern cpuop_func_noret op_e168_23_nf; +extern cpuop_func_noret op_e168_23_ff; +extern cpuop_func_noret op_e170_23_nf; +extern cpuop_func_noret op_e170_23_ff; +extern cpuop_func_noret op_e178_23_nf; +extern cpuop_func_noret op_e178_23_ff; +extern cpuop_func_noret op_e180_23_nf; +extern cpuop_func_noret op_e180_23_ff; +extern cpuop_func_noret op_e188_23_nf; +extern cpuop_func_noret op_e188_23_ff; +extern cpuop_func_noret op_e190_23_nf; +extern cpuop_func_noret op_e190_23_ff; +extern cpuop_func_noret op_e198_23_nf; +extern cpuop_func_noret op_e198_23_ff; +extern cpuop_func_noret op_e1a0_23_nf; +extern cpuop_func_noret op_e1a0_23_ff; +extern cpuop_func_noret op_e1a8_23_nf; +extern cpuop_func_noret op_e1a8_23_ff; +extern cpuop_func_noret op_e1b0_23_nf; +extern cpuop_func_noret op_e1b0_23_ff; +extern cpuop_func_noret op_e1b8_23_nf; +extern cpuop_func_noret op_e1b8_23_ff; +extern cpuop_func_noret op_e1d0_23_nf; +extern cpuop_func_noret op_e1d0_23_ff; +extern cpuop_func_noret op_e1d8_23_nf; +extern cpuop_func_noret op_e1d8_23_ff; +extern cpuop_func_noret op_e1e0_23_nf; +extern cpuop_func_noret op_e1e0_23_ff; +extern cpuop_func_noret op_e1e8_23_nf; +extern cpuop_func_noret op_e1e8_23_ff; +extern cpuop_func_noret op_e1f0_23_nf; +extern cpuop_func_noret op_e1f0_23_ff; +extern cpuop_func_noret op_e1f8_23_nf; +extern cpuop_func_noret op_e1f8_23_ff; +extern cpuop_func_noret op_e1f9_23_nf; +extern cpuop_func_noret op_e1f9_23_ff; +extern cpuop_func_noret op_e2d0_23_nf; +extern cpuop_func_noret op_e2d0_23_ff; +extern cpuop_func_noret op_e2d8_23_nf; +extern cpuop_func_noret op_e2d8_23_ff; +extern cpuop_func_noret op_e2e0_23_nf; +extern cpuop_func_noret op_e2e0_23_ff; +extern cpuop_func_noret op_e2e8_23_nf; +extern cpuop_func_noret op_e2e8_23_ff; +extern cpuop_func_noret op_e2f0_23_nf; +extern cpuop_func_noret op_e2f0_23_ff; +extern cpuop_func_noret op_e2f8_23_nf; +extern cpuop_func_noret op_e2f8_23_ff; +extern cpuop_func_noret op_e2f9_23_nf; +extern cpuop_func_noret op_e2f9_23_ff; +extern cpuop_func_noret op_e3d0_23_nf; +extern cpuop_func_noret op_e3d0_23_ff; +extern cpuop_func_noret op_e3d8_23_nf; +extern cpuop_func_noret op_e3d8_23_ff; +extern cpuop_func_noret op_e3e0_23_nf; +extern cpuop_func_noret op_e3e0_23_ff; +extern cpuop_func_noret op_e3e8_23_nf; +extern cpuop_func_noret op_e3e8_23_ff; +extern cpuop_func_noret op_e3f0_23_nf; +extern cpuop_func_noret op_e3f0_23_ff; +extern cpuop_func_noret op_e3f8_23_nf; +extern cpuop_func_noret op_e3f8_23_ff; +extern cpuop_func_noret op_e3f9_23_nf; +extern cpuop_func_noret op_e3f9_23_ff; +extern cpuop_func_noret op_e4d0_23_nf; +extern cpuop_func_noret op_e4d0_23_ff; +extern cpuop_func_noret op_e4d8_23_nf; +extern cpuop_func_noret op_e4d8_23_ff; +extern cpuop_func_noret op_e4e0_23_nf; +extern cpuop_func_noret op_e4e0_23_ff; +extern cpuop_func_noret op_e4e8_23_nf; +extern cpuop_func_noret op_e4e8_23_ff; +extern cpuop_func_noret op_e4f0_23_nf; +extern cpuop_func_noret op_e4f0_23_ff; +extern cpuop_func_noret op_e4f8_23_nf; +extern cpuop_func_noret op_e4f8_23_ff; +extern cpuop_func_noret op_e4f9_23_nf; +extern cpuop_func_noret op_e4f9_23_ff; +extern cpuop_func_noret op_e5d0_23_nf; +extern cpuop_func_noret op_e5d0_23_ff; +extern cpuop_func_noret op_e5d8_23_nf; +extern cpuop_func_noret op_e5d8_23_ff; +extern cpuop_func_noret op_e5e0_23_nf; +extern cpuop_func_noret op_e5e0_23_ff; +extern cpuop_func_noret op_e5e8_23_nf; +extern cpuop_func_noret op_e5e8_23_ff; +extern cpuop_func_noret op_e5f0_23_nf; +extern cpuop_func_noret op_e5f0_23_ff; +extern cpuop_func_noret op_e5f8_23_nf; +extern cpuop_func_noret op_e5f8_23_ff; +extern cpuop_func_noret op_e5f9_23_nf; +extern cpuop_func_noret op_e5f9_23_ff; +extern cpuop_func_noret op_e6d0_23_nf; +extern cpuop_func_noret op_e6d0_23_ff; +extern cpuop_func_noret op_e6d8_23_nf; +extern cpuop_func_noret op_e6d8_23_ff; +extern cpuop_func_noret op_e6e0_23_nf; +extern cpuop_func_noret op_e6e0_23_ff; +extern cpuop_func_noret op_e6e8_23_nf; +extern cpuop_func_noret op_e6e8_23_ff; +extern cpuop_func_noret op_e6f0_23_nf; +extern cpuop_func_noret op_e6f0_23_ff; +extern cpuop_func_noret op_e6f8_23_nf; +extern cpuop_func_noret op_e6f8_23_ff; +extern cpuop_func_noret op_e6f9_23_nf; +extern cpuop_func_noret op_e6f9_23_ff; +extern cpuop_func_noret op_e7d0_23_nf; +extern cpuop_func_noret op_e7d0_23_ff; +extern cpuop_func_noret op_e7d8_23_nf; +extern cpuop_func_noret op_e7d8_23_ff; +extern cpuop_func_noret op_e7e0_23_nf; +extern cpuop_func_noret op_e7e0_23_ff; +extern cpuop_func_noret op_e7e8_23_nf; +extern cpuop_func_noret op_e7e8_23_ff; +extern cpuop_func_noret op_e7f0_23_nf; +extern cpuop_func_noret op_e7f0_23_ff; +extern cpuop_func_noret op_e7f8_23_nf; +extern cpuop_func_noret op_e7f8_23_ff; +extern cpuop_func_noret op_e7f9_23_nf; +extern cpuop_func_noret op_e7f9_23_ff; +extern cpuop_func_noret op_e8c0_23_nf; +extern cpuop_func_noret op_e8c0_23_ff; +extern cpuop_func_noret op_e8d0_23_nf; +extern cpuop_func_noret op_e8d0_23_ff; +extern cpuop_func_noret op_e8e8_23_nf; +extern cpuop_func_noret op_e8e8_23_ff; +extern cpuop_func_noret op_e8f0_23_nf; +extern cpuop_func_noret op_e8f0_23_ff; +extern cpuop_func_noret op_e8f8_23_nf; +extern cpuop_func_noret op_e8f8_23_ff; +extern cpuop_func_noret op_e8f9_23_nf; +extern cpuop_func_noret op_e8f9_23_ff; +extern cpuop_func_noret op_e8fa_23_nf; +extern cpuop_func_noret op_e8fa_23_ff; +extern cpuop_func_noret op_e8fb_23_nf; +extern cpuop_func_noret op_e8fb_23_ff; +extern cpuop_func_noret op_e9c0_23_nf; +extern cpuop_func_noret op_e9c0_23_ff; +extern cpuop_func_noret op_e9d0_23_nf; +extern cpuop_func_noret op_e9d0_23_ff; +extern cpuop_func_noret op_e9e8_23_nf; +extern cpuop_func_noret op_e9e8_23_ff; +extern cpuop_func_noret op_e9f0_23_nf; +extern cpuop_func_noret op_e9f0_23_ff; +extern cpuop_func_noret op_e9f8_23_nf; +extern cpuop_func_noret op_e9f8_23_ff; +extern cpuop_func_noret op_e9f9_23_nf; +extern cpuop_func_noret op_e9f9_23_ff; +extern cpuop_func_noret op_e9fa_23_nf; +extern cpuop_func_noret op_e9fa_23_ff; +extern cpuop_func_noret op_e9fb_23_nf; +extern cpuop_func_noret op_e9fb_23_ff; +extern cpuop_func_noret op_eac0_23_nf; +extern cpuop_func_noret op_eac0_23_ff; +extern cpuop_func_noret op_ead0_23_nf; +extern cpuop_func_noret op_ead0_23_ff; +extern cpuop_func_noret op_eae8_23_nf; +extern cpuop_func_noret op_eae8_23_ff; +extern cpuop_func_noret op_eaf0_23_nf; +extern cpuop_func_noret op_eaf0_23_ff; +extern cpuop_func_noret op_eaf8_23_nf; +extern cpuop_func_noret op_eaf8_23_ff; +extern cpuop_func_noret op_eaf9_23_nf; +extern cpuop_func_noret op_eaf9_23_ff; +extern cpuop_func_noret op_ebc0_23_nf; +extern cpuop_func_noret op_ebc0_23_ff; +extern cpuop_func_noret op_ebd0_23_nf; +extern cpuop_func_noret op_ebd0_23_ff; +extern cpuop_func_noret op_ebe8_23_nf; +extern cpuop_func_noret op_ebe8_23_ff; +extern cpuop_func_noret op_ebf0_23_nf; +extern cpuop_func_noret op_ebf0_23_ff; +extern cpuop_func_noret op_ebf8_23_nf; +extern cpuop_func_noret op_ebf8_23_ff; +extern cpuop_func_noret op_ebf9_23_nf; +extern cpuop_func_noret op_ebf9_23_ff; +extern cpuop_func_noret op_ebfa_23_nf; +extern cpuop_func_noret op_ebfa_23_ff; +extern cpuop_func_noret op_ebfb_23_nf; +extern cpuop_func_noret op_ebfb_23_ff; +extern cpuop_func_noret op_ecc0_23_nf; +extern cpuop_func_noret op_ecc0_23_ff; +extern cpuop_func_noret op_ecd0_23_nf; +extern cpuop_func_noret op_ecd0_23_ff; +extern cpuop_func_noret op_ece8_23_nf; +extern cpuop_func_noret op_ece8_23_ff; +extern cpuop_func_noret op_ecf0_23_nf; +extern cpuop_func_noret op_ecf0_23_ff; +extern cpuop_func_noret op_ecf8_23_nf; +extern cpuop_func_noret op_ecf8_23_ff; +extern cpuop_func_noret op_ecf9_23_nf; +extern cpuop_func_noret op_ecf9_23_ff; +extern cpuop_func_noret op_edc0_23_nf; +extern cpuop_func_noret op_edc0_23_ff; +extern cpuop_func_noret op_edd0_23_nf; +extern cpuop_func_noret op_edd0_23_ff; +extern cpuop_func_noret op_ede8_23_nf; +extern cpuop_func_noret op_ede8_23_ff; +extern cpuop_func_noret op_edf0_23_nf; +extern cpuop_func_noret op_edf0_23_ff; +extern cpuop_func_noret op_edf8_23_nf; +extern cpuop_func_noret op_edf8_23_ff; +extern cpuop_func_noret op_edf9_23_nf; +extern cpuop_func_noret op_edf9_23_ff; +extern cpuop_func_noret op_edfa_23_nf; +extern cpuop_func_noret op_edfa_23_ff; +extern cpuop_func_noret op_edfb_23_nf; +extern cpuop_func_noret op_edfb_23_ff; +extern cpuop_func_noret op_eec0_23_nf; +extern cpuop_func_noret op_eec0_23_ff; +extern cpuop_func_noret op_eed0_23_nf; +extern cpuop_func_noret op_eed0_23_ff; +extern cpuop_func_noret op_eee8_23_nf; +extern cpuop_func_noret op_eee8_23_ff; +extern cpuop_func_noret op_eef0_23_nf; +extern cpuop_func_noret op_eef0_23_ff; +extern cpuop_func_noret op_eef8_23_nf; +extern cpuop_func_noret op_eef8_23_ff; +extern cpuop_func_noret op_eef9_23_nf; +extern cpuop_func_noret op_eef9_23_ff; +extern cpuop_func_noret op_efc0_23_nf; +extern cpuop_func_noret op_efc0_23_ff; +extern cpuop_func_noret op_efd0_23_nf; +extern cpuop_func_noret op_efd0_23_ff; +extern cpuop_func_noret op_efe8_23_nf; +extern cpuop_func_noret op_efe8_23_ff; +extern cpuop_func_noret op_eff0_23_nf; +extern cpuop_func_noret op_eff0_23_ff; +extern cpuop_func_noret op_eff8_23_nf; +extern cpuop_func_noret op_eff8_23_ff; +extern cpuop_func_noret op_eff9_23_nf; +extern cpuop_func_noret op_eff9_23_ff; +extern cpuop_func_noret op_f000_23_nf; +extern cpuop_func_noret op_f000_23_ff; +extern cpuop_func_noret op_f008_23_nf; +extern cpuop_func_noret op_f008_23_ff; +extern cpuop_func_noret op_f010_23_nf; +extern cpuop_func_noret op_f010_23_ff; +extern cpuop_func_noret op_f018_23_nf; +extern cpuop_func_noret op_f018_23_ff; +extern cpuop_func_noret op_f020_23_nf; +extern cpuop_func_noret op_f020_23_ff; +extern cpuop_func_noret op_f028_23_nf; +extern cpuop_func_noret op_f028_23_ff; +extern cpuop_func_noret op_f030_23_nf; +extern cpuop_func_noret op_f030_23_ff; +extern cpuop_func_noret op_f038_23_nf; +extern cpuop_func_noret op_f038_23_ff; +extern cpuop_func_noret op_f039_23_nf; +extern cpuop_func_noret op_f039_23_ff; +extern cpuop_func_noret op_f200_23_nf; +extern cpuop_func_noret op_f200_23_ff; +extern cpuop_func_noret op_f208_23_nf; +extern cpuop_func_noret op_f208_23_ff; +extern cpuop_func_noret op_f210_23_nf; +extern cpuop_func_noret op_f210_23_ff; +extern cpuop_func_noret op_f218_23_nf; +extern cpuop_func_noret op_f218_23_ff; +extern cpuop_func_noret op_f220_23_nf; +extern cpuop_func_noret op_f220_23_ff; +extern cpuop_func_noret op_f228_23_nf; +extern cpuop_func_noret op_f228_23_ff; +extern cpuop_func_noret op_f230_23_nf; +extern cpuop_func_noret op_f230_23_ff; +extern cpuop_func_noret op_f238_23_nf; +extern cpuop_func_noret op_f238_23_ff; +extern cpuop_func_noret op_f239_23_nf; +extern cpuop_func_noret op_f239_23_ff; +extern cpuop_func_noret op_f23a_23_nf; +extern cpuop_func_noret op_f23a_23_ff; +extern cpuop_func_noret op_f23b_23_nf; +extern cpuop_func_noret op_f23b_23_ff; +extern cpuop_func_noret op_f23c_23_nf; +extern cpuop_func_noret op_f23c_23_ff; +extern cpuop_func_noret op_f240_23_nf; +extern cpuop_func_noret op_f240_23_ff; +extern cpuop_func_noret op_f248_23_nf; +extern cpuop_func_noret op_f248_23_ff; +extern cpuop_func_noret op_f250_23_nf; +extern cpuop_func_noret op_f250_23_ff; +extern cpuop_func_noret op_f258_23_nf; +extern cpuop_func_noret op_f258_23_ff; +extern cpuop_func_noret op_f260_23_nf; +extern cpuop_func_noret op_f260_23_ff; +extern cpuop_func_noret op_f268_23_nf; +extern cpuop_func_noret op_f268_23_ff; +extern cpuop_func_noret op_f270_23_nf; +extern cpuop_func_noret op_f270_23_ff; +extern cpuop_func_noret op_f278_23_nf; +extern cpuop_func_noret op_f278_23_ff; +extern cpuop_func_noret op_f279_23_nf; +extern cpuop_func_noret op_f279_23_ff; +extern cpuop_func_noret op_f27a_23_nf; +extern cpuop_func_noret op_f27a_23_ff; +extern cpuop_func_noret op_f27b_23_nf; +extern cpuop_func_noret op_f27b_23_ff; +extern cpuop_func_noret op_f27c_23_nf; +extern cpuop_func_noret op_f27c_23_ff; +extern cpuop_func_noret op_f280_23_nf; +extern cpuop_func_noret op_f280_23_ff; +extern cpuop_func_noret op_f2c0_23_nf; +extern cpuop_func_noret op_f2c0_23_ff; +extern cpuop_func_noret op_f310_23_nf; +extern cpuop_func_noret op_f310_23_ff; +extern cpuop_func_noret op_f320_23_nf; +extern cpuop_func_noret op_f320_23_ff; +extern cpuop_func_noret op_f328_23_nf; +extern cpuop_func_noret op_f328_23_ff; +extern cpuop_func_noret op_f330_23_nf; +extern cpuop_func_noret op_f330_23_ff; +extern cpuop_func_noret op_f338_23_nf; +extern cpuop_func_noret op_f338_23_ff; +extern cpuop_func_noret op_f339_23_nf; +extern cpuop_func_noret op_f339_23_ff; +extern cpuop_func_noret op_f350_23_nf; +extern cpuop_func_noret op_f350_23_ff; +extern cpuop_func_noret op_f358_23_nf; +extern cpuop_func_noret op_f358_23_ff; +extern cpuop_func_noret op_f368_23_nf; +extern cpuop_func_noret op_f368_23_ff; +extern cpuop_func_noret op_f370_23_nf; +extern cpuop_func_noret op_f370_23_ff; +extern cpuop_func_noret op_f378_23_nf; +extern cpuop_func_noret op_f378_23_ff; +extern cpuop_func_noret op_f379_23_nf; +extern cpuop_func_noret op_f379_23_ff; +extern cpuop_func_noret op_f37a_23_nf; +extern cpuop_func_noret op_f37a_23_ff; +extern cpuop_func_noret op_f37b_23_nf; +extern cpuop_func_noret op_f37b_23_ff; +extern cpuop_func_noret op_0000_24_nf; +extern cpuop_func_noret op_0000_24_ff; +extern cpuop_func_noret op_0010_24_nf; +extern cpuop_func_noret op_0010_24_ff; +extern cpuop_func_noret op_0018_24_nf; +extern cpuop_func_noret op_0018_24_ff; +extern cpuop_func_noret op_0020_24_nf; +extern cpuop_func_noret op_0020_24_ff; +extern cpuop_func_noret op_0028_24_nf; +extern cpuop_func_noret op_0028_24_ff; +extern cpuop_func_noret op_0030_24_nf; +extern cpuop_func_noret op_0030_24_ff; +extern cpuop_func_noret op_0038_24_nf; +extern cpuop_func_noret op_0038_24_ff; +extern cpuop_func_noret op_0039_24_nf; +extern cpuop_func_noret op_0039_24_ff; +extern cpuop_func_noret op_003c_24_nf; +extern cpuop_func_noret op_003c_24_ff; +extern cpuop_func_noret op_0040_24_nf; +extern cpuop_func_noret op_0040_24_ff; +extern cpuop_func_noret op_0050_24_nf; +extern cpuop_func_noret op_0050_24_ff; +extern cpuop_func_noret op_0058_24_nf; +extern cpuop_func_noret op_0058_24_ff; +extern cpuop_func_noret op_0060_24_nf; +extern cpuop_func_noret op_0060_24_ff; +extern cpuop_func_noret op_0068_24_nf; +extern cpuop_func_noret op_0068_24_ff; +extern cpuop_func_noret op_0070_24_nf; +extern cpuop_func_noret op_0070_24_ff; +extern cpuop_func_noret op_0078_24_nf; +extern cpuop_func_noret op_0078_24_ff; +extern cpuop_func_noret op_0079_24_nf; +extern cpuop_func_noret op_0079_24_ff; +extern cpuop_func_noret op_007c_24_nf; +extern cpuop_func_noret op_007c_24_ff; +extern cpuop_func_noret op_0080_24_nf; +extern cpuop_func_noret op_0080_24_ff; +extern cpuop_func_noret op_0090_24_nf; +extern cpuop_func_noret op_0090_24_ff; +extern cpuop_func_noret op_0098_24_nf; +extern cpuop_func_noret op_0098_24_ff; +extern cpuop_func_noret op_00a0_24_nf; +extern cpuop_func_noret op_00a0_24_ff; +extern cpuop_func_noret op_00a8_24_nf; +extern cpuop_func_noret op_00a8_24_ff; +extern cpuop_func_noret op_00b0_24_nf; +extern cpuop_func_noret op_00b0_24_ff; +extern cpuop_func_noret op_00b8_24_nf; +extern cpuop_func_noret op_00b8_24_ff; +extern cpuop_func_noret op_00b9_24_nf; +extern cpuop_func_noret op_00b9_24_ff; +extern cpuop_func_noret op_00d0_24_nf; +extern cpuop_func_noret op_00d0_24_ff; +extern cpuop_func_noret op_00e8_24_nf; +extern cpuop_func_noret op_00e8_24_ff; +extern cpuop_func_noret op_00f0_24_nf; +extern cpuop_func_noret op_00f0_24_ff; +extern cpuop_func_noret op_00f8_24_nf; +extern cpuop_func_noret op_00f8_24_ff; +extern cpuop_func_noret op_00f9_24_nf; +extern cpuop_func_noret op_00f9_24_ff; +extern cpuop_func_noret op_00fa_24_nf; +extern cpuop_func_noret op_00fa_24_ff; +extern cpuop_func_noret op_00fb_24_nf; +extern cpuop_func_noret op_00fb_24_ff; +extern cpuop_func_noret op_0100_24_nf; +extern cpuop_func_noret op_0100_24_ff; +extern cpuop_func_noret op_0108_24_nf; +extern cpuop_func_noret op_0108_24_ff; +extern cpuop_func_noret op_0110_24_nf; +extern cpuop_func_noret op_0110_24_ff; +extern cpuop_func_noret op_0118_24_nf; +extern cpuop_func_noret op_0118_24_ff; +extern cpuop_func_noret op_0120_24_nf; +extern cpuop_func_noret op_0120_24_ff; +extern cpuop_func_noret op_0128_24_nf; +extern cpuop_func_noret op_0128_24_ff; +extern cpuop_func_noret op_0130_24_nf; +extern cpuop_func_noret op_0130_24_ff; +extern cpuop_func_noret op_0138_24_nf; +extern cpuop_func_noret op_0138_24_ff; +extern cpuop_func_noret op_0139_24_nf; +extern cpuop_func_noret op_0139_24_ff; +extern cpuop_func_noret op_013a_24_nf; +extern cpuop_func_noret op_013a_24_ff; +extern cpuop_func_noret op_013b_24_nf; +extern cpuop_func_noret op_013b_24_ff; +extern cpuop_func_noret op_013c_24_nf; +extern cpuop_func_noret op_013c_24_ff; +extern cpuop_func_noret op_0140_24_nf; +extern cpuop_func_noret op_0140_24_ff; +extern cpuop_func_noret op_0148_24_nf; +extern cpuop_func_noret op_0148_24_ff; +extern cpuop_func_noret op_0150_24_nf; +extern cpuop_func_noret op_0150_24_ff; +extern cpuop_func_noret op_0158_24_nf; +extern cpuop_func_noret op_0158_24_ff; +extern cpuop_func_noret op_0160_24_nf; +extern cpuop_func_noret op_0160_24_ff; +extern cpuop_func_noret op_0168_24_nf; +extern cpuop_func_noret op_0168_24_ff; +extern cpuop_func_noret op_0170_24_nf; +extern cpuop_func_noret op_0170_24_ff; +extern cpuop_func_noret op_0178_24_nf; +extern cpuop_func_noret op_0178_24_ff; +extern cpuop_func_noret op_0179_24_nf; +extern cpuop_func_noret op_0179_24_ff; +extern cpuop_func_noret op_0180_24_nf; +extern cpuop_func_noret op_0180_24_ff; +extern cpuop_func_noret op_0188_24_nf; +extern cpuop_func_noret op_0188_24_ff; +extern cpuop_func_noret op_0190_24_nf; +extern cpuop_func_noret op_0190_24_ff; +extern cpuop_func_noret op_0198_24_nf; +extern cpuop_func_noret op_0198_24_ff; +extern cpuop_func_noret op_01a0_24_nf; +extern cpuop_func_noret op_01a0_24_ff; +extern cpuop_func_noret op_01a8_24_nf; +extern cpuop_func_noret op_01a8_24_ff; +extern cpuop_func_noret op_01b0_24_nf; +extern cpuop_func_noret op_01b0_24_ff; +extern cpuop_func_noret op_01b8_24_nf; +extern cpuop_func_noret op_01b8_24_ff; +extern cpuop_func_noret op_01b9_24_nf; +extern cpuop_func_noret op_01b9_24_ff; +extern cpuop_func_noret op_01c0_24_nf; +extern cpuop_func_noret op_01c0_24_ff; +extern cpuop_func_noret op_01c8_24_nf; +extern cpuop_func_noret op_01c8_24_ff; +extern cpuop_func_noret op_01d0_24_nf; +extern cpuop_func_noret op_01d0_24_ff; +extern cpuop_func_noret op_01d8_24_nf; +extern cpuop_func_noret op_01d8_24_ff; +extern cpuop_func_noret op_01e0_24_nf; +extern cpuop_func_noret op_01e0_24_ff; +extern cpuop_func_noret op_01e8_24_nf; +extern cpuop_func_noret op_01e8_24_ff; +extern cpuop_func_noret op_01f0_24_nf; +extern cpuop_func_noret op_01f0_24_ff; +extern cpuop_func_noret op_01f8_24_nf; +extern cpuop_func_noret op_01f8_24_ff; +extern cpuop_func_noret op_01f9_24_nf; +extern cpuop_func_noret op_01f9_24_ff; +extern cpuop_func_noret op_0200_24_nf; +extern cpuop_func_noret op_0200_24_ff; +extern cpuop_func_noret op_0210_24_nf; +extern cpuop_func_noret op_0210_24_ff; +extern cpuop_func_noret op_0218_24_nf; +extern cpuop_func_noret op_0218_24_ff; +extern cpuop_func_noret op_0220_24_nf; +extern cpuop_func_noret op_0220_24_ff; +extern cpuop_func_noret op_0228_24_nf; +extern cpuop_func_noret op_0228_24_ff; +extern cpuop_func_noret op_0230_24_nf; +extern cpuop_func_noret op_0230_24_ff; +extern cpuop_func_noret op_0238_24_nf; +extern cpuop_func_noret op_0238_24_ff; +extern cpuop_func_noret op_0239_24_nf; +extern cpuop_func_noret op_0239_24_ff; +extern cpuop_func_noret op_023c_24_nf; +extern cpuop_func_noret op_023c_24_ff; +extern cpuop_func_noret op_0240_24_nf; +extern cpuop_func_noret op_0240_24_ff; +extern cpuop_func_noret op_0250_24_nf; +extern cpuop_func_noret op_0250_24_ff; +extern cpuop_func_noret op_0258_24_nf; +extern cpuop_func_noret op_0258_24_ff; +extern cpuop_func_noret op_0260_24_nf; +extern cpuop_func_noret op_0260_24_ff; +extern cpuop_func_noret op_0268_24_nf; +extern cpuop_func_noret op_0268_24_ff; +extern cpuop_func_noret op_0270_24_nf; +extern cpuop_func_noret op_0270_24_ff; +extern cpuop_func_noret op_0278_24_nf; +extern cpuop_func_noret op_0278_24_ff; +extern cpuop_func_noret op_0279_24_nf; +extern cpuop_func_noret op_0279_24_ff; +extern cpuop_func_noret op_027c_24_nf; +extern cpuop_func_noret op_027c_24_ff; +extern cpuop_func_noret op_0280_24_nf; +extern cpuop_func_noret op_0280_24_ff; +extern cpuop_func_noret op_0290_24_nf; +extern cpuop_func_noret op_0290_24_ff; +extern cpuop_func_noret op_0298_24_nf; +extern cpuop_func_noret op_0298_24_ff; +extern cpuop_func_noret op_02a0_24_nf; +extern cpuop_func_noret op_02a0_24_ff; +extern cpuop_func_noret op_02a8_24_nf; +extern cpuop_func_noret op_02a8_24_ff; +extern cpuop_func_noret op_02b0_24_nf; +extern cpuop_func_noret op_02b0_24_ff; +extern cpuop_func_noret op_02b8_24_nf; +extern cpuop_func_noret op_02b8_24_ff; +extern cpuop_func_noret op_02b9_24_nf; +extern cpuop_func_noret op_02b9_24_ff; +extern cpuop_func_noret op_02d0_24_nf; +extern cpuop_func_noret op_02d0_24_ff; +extern cpuop_func_noret op_02e8_24_nf; +extern cpuop_func_noret op_02e8_24_ff; +extern cpuop_func_noret op_02f0_24_nf; +extern cpuop_func_noret op_02f0_24_ff; +extern cpuop_func_noret op_02f8_24_nf; +extern cpuop_func_noret op_02f8_24_ff; +extern cpuop_func_noret op_02f9_24_nf; +extern cpuop_func_noret op_02f9_24_ff; +extern cpuop_func_noret op_02fa_24_nf; +extern cpuop_func_noret op_02fa_24_ff; +extern cpuop_func_noret op_02fb_24_nf; +extern cpuop_func_noret op_02fb_24_ff; +extern cpuop_func_noret op_0400_24_nf; +extern cpuop_func_noret op_0400_24_ff; +extern cpuop_func_noret op_0410_24_nf; +extern cpuop_func_noret op_0410_24_ff; +extern cpuop_func_noret op_0418_24_nf; +extern cpuop_func_noret op_0418_24_ff; +extern cpuop_func_noret op_0420_24_nf; +extern cpuop_func_noret op_0420_24_ff; +extern cpuop_func_noret op_0428_24_nf; +extern cpuop_func_noret op_0428_24_ff; +extern cpuop_func_noret op_0430_24_nf; +extern cpuop_func_noret op_0430_24_ff; +extern cpuop_func_noret op_0438_24_nf; +extern cpuop_func_noret op_0438_24_ff; +extern cpuop_func_noret op_0439_24_nf; +extern cpuop_func_noret op_0439_24_ff; +extern cpuop_func_noret op_0440_24_nf; +extern cpuop_func_noret op_0440_24_ff; +extern cpuop_func_noret op_0450_24_nf; +extern cpuop_func_noret op_0450_24_ff; +extern cpuop_func_noret op_0458_24_nf; +extern cpuop_func_noret op_0458_24_ff; +extern cpuop_func_noret op_0460_24_nf; +extern cpuop_func_noret op_0460_24_ff; +extern cpuop_func_noret op_0468_24_nf; +extern cpuop_func_noret op_0468_24_ff; +extern cpuop_func_noret op_0470_24_nf; +extern cpuop_func_noret op_0470_24_ff; +extern cpuop_func_noret op_0478_24_nf; +extern cpuop_func_noret op_0478_24_ff; +extern cpuop_func_noret op_0479_24_nf; +extern cpuop_func_noret op_0479_24_ff; +extern cpuop_func_noret op_0480_24_nf; +extern cpuop_func_noret op_0480_24_ff; +extern cpuop_func_noret op_0490_24_nf; +extern cpuop_func_noret op_0490_24_ff; +extern cpuop_func_noret op_0498_24_nf; +extern cpuop_func_noret op_0498_24_ff; +extern cpuop_func_noret op_04a0_24_nf; +extern cpuop_func_noret op_04a0_24_ff; +extern cpuop_func_noret op_04a8_24_nf; +extern cpuop_func_noret op_04a8_24_ff; +extern cpuop_func_noret op_04b0_24_nf; +extern cpuop_func_noret op_04b0_24_ff; +extern cpuop_func_noret op_04b8_24_nf; +extern cpuop_func_noret op_04b8_24_ff; +extern cpuop_func_noret op_04b9_24_nf; +extern cpuop_func_noret op_04b9_24_ff; +extern cpuop_func_noret op_04d0_24_nf; +extern cpuop_func_noret op_04d0_24_ff; +extern cpuop_func_noret op_04e8_24_nf; +extern cpuop_func_noret op_04e8_24_ff; +extern cpuop_func_noret op_04f0_24_nf; +extern cpuop_func_noret op_04f0_24_ff; +extern cpuop_func_noret op_04f8_24_nf; +extern cpuop_func_noret op_04f8_24_ff; +extern cpuop_func_noret op_04f9_24_nf; +extern cpuop_func_noret op_04f9_24_ff; +extern cpuop_func_noret op_04fa_24_nf; +extern cpuop_func_noret op_04fa_24_ff; +extern cpuop_func_noret op_04fb_24_nf; +extern cpuop_func_noret op_04fb_24_ff; +extern cpuop_func_noret op_0600_24_nf; +extern cpuop_func_noret op_0600_24_ff; +extern cpuop_func_noret op_0610_24_nf; +extern cpuop_func_noret op_0610_24_ff; +extern cpuop_func_noret op_0618_24_nf; +extern cpuop_func_noret op_0618_24_ff; +extern cpuop_func_noret op_0620_24_nf; +extern cpuop_func_noret op_0620_24_ff; +extern cpuop_func_noret op_0628_24_nf; +extern cpuop_func_noret op_0628_24_ff; +extern cpuop_func_noret op_0630_24_nf; +extern cpuop_func_noret op_0630_24_ff; +extern cpuop_func_noret op_0638_24_nf; +extern cpuop_func_noret op_0638_24_ff; +extern cpuop_func_noret op_0639_24_nf; +extern cpuop_func_noret op_0639_24_ff; +extern cpuop_func_noret op_0640_24_nf; +extern cpuop_func_noret op_0640_24_ff; +extern cpuop_func_noret op_0650_24_nf; +extern cpuop_func_noret op_0650_24_ff; +extern cpuop_func_noret op_0658_24_nf; +extern cpuop_func_noret op_0658_24_ff; +extern cpuop_func_noret op_0660_24_nf; +extern cpuop_func_noret op_0660_24_ff; +extern cpuop_func_noret op_0668_24_nf; +extern cpuop_func_noret op_0668_24_ff; +extern cpuop_func_noret op_0670_24_nf; +extern cpuop_func_noret op_0670_24_ff; +extern cpuop_func_noret op_0678_24_nf; +extern cpuop_func_noret op_0678_24_ff; +extern cpuop_func_noret op_0679_24_nf; +extern cpuop_func_noret op_0679_24_ff; +extern cpuop_func_noret op_0680_24_nf; +extern cpuop_func_noret op_0680_24_ff; +extern cpuop_func_noret op_0690_24_nf; +extern cpuop_func_noret op_0690_24_ff; +extern cpuop_func_noret op_0698_24_nf; +extern cpuop_func_noret op_0698_24_ff; +extern cpuop_func_noret op_06a0_24_nf; +extern cpuop_func_noret op_06a0_24_ff; +extern cpuop_func_noret op_06a8_24_nf; +extern cpuop_func_noret op_06a8_24_ff; +extern cpuop_func_noret op_06b0_24_nf; +extern cpuop_func_noret op_06b0_24_ff; +extern cpuop_func_noret op_06b8_24_nf; +extern cpuop_func_noret op_06b8_24_ff; +extern cpuop_func_noret op_06b9_24_nf; +extern cpuop_func_noret op_06b9_24_ff; +extern cpuop_func_noret op_06c0_24_nf; +extern cpuop_func_noret op_06c0_24_ff; +extern cpuop_func_noret op_06c8_24_nf; +extern cpuop_func_noret op_06c8_24_ff; +extern cpuop_func_noret op_06d0_24_nf; +extern cpuop_func_noret op_06d0_24_ff; +extern cpuop_func_noret op_06e8_24_nf; +extern cpuop_func_noret op_06e8_24_ff; +extern cpuop_func_noret op_06f0_24_nf; +extern cpuop_func_noret op_06f0_24_ff; +extern cpuop_func_noret op_06f8_24_nf; +extern cpuop_func_noret op_06f8_24_ff; +extern cpuop_func_noret op_06f9_24_nf; +extern cpuop_func_noret op_06f9_24_ff; +extern cpuop_func_noret op_06fa_24_nf; +extern cpuop_func_noret op_06fa_24_ff; +extern cpuop_func_noret op_06fb_24_nf; +extern cpuop_func_noret op_06fb_24_ff; +extern cpuop_func_noret op_0800_24_nf; +extern cpuop_func_noret op_0800_24_ff; +extern cpuop_func_noret op_0810_24_nf; +extern cpuop_func_noret op_0810_24_ff; +extern cpuop_func_noret op_0818_24_nf; +extern cpuop_func_noret op_0818_24_ff; +extern cpuop_func_noret op_0820_24_nf; +extern cpuop_func_noret op_0820_24_ff; +extern cpuop_func_noret op_0828_24_nf; +extern cpuop_func_noret op_0828_24_ff; +extern cpuop_func_noret op_0830_24_nf; +extern cpuop_func_noret op_0830_24_ff; +extern cpuop_func_noret op_0838_24_nf; +extern cpuop_func_noret op_0838_24_ff; +extern cpuop_func_noret op_0839_24_nf; +extern cpuop_func_noret op_0839_24_ff; +extern cpuop_func_noret op_083a_24_nf; +extern cpuop_func_noret op_083a_24_ff; +extern cpuop_func_noret op_083b_24_nf; +extern cpuop_func_noret op_083b_24_ff; +extern cpuop_func_noret op_0840_24_nf; +extern cpuop_func_noret op_0840_24_ff; +extern cpuop_func_noret op_0850_24_nf; +extern cpuop_func_noret op_0850_24_ff; +extern cpuop_func_noret op_0858_24_nf; +extern cpuop_func_noret op_0858_24_ff; +extern cpuop_func_noret op_0860_24_nf; +extern cpuop_func_noret op_0860_24_ff; +extern cpuop_func_noret op_0868_24_nf; +extern cpuop_func_noret op_0868_24_ff; +extern cpuop_func_noret op_0870_24_nf; +extern cpuop_func_noret op_0870_24_ff; +extern cpuop_func_noret op_0878_24_nf; +extern cpuop_func_noret op_0878_24_ff; +extern cpuop_func_noret op_0879_24_nf; +extern cpuop_func_noret op_0879_24_ff; +extern cpuop_func_noret op_0880_24_nf; +extern cpuop_func_noret op_0880_24_ff; +extern cpuop_func_noret op_0890_24_nf; +extern cpuop_func_noret op_0890_24_ff; +extern cpuop_func_noret op_0898_24_nf; +extern cpuop_func_noret op_0898_24_ff; +extern cpuop_func_noret op_08a0_24_nf; +extern cpuop_func_noret op_08a0_24_ff; +extern cpuop_func_noret op_08a8_24_nf; +extern cpuop_func_noret op_08a8_24_ff; +extern cpuop_func_noret op_08b0_24_nf; +extern cpuop_func_noret op_08b0_24_ff; +extern cpuop_func_noret op_08b8_24_nf; +extern cpuop_func_noret op_08b8_24_ff; +extern cpuop_func_noret op_08b9_24_nf; +extern cpuop_func_noret op_08b9_24_ff; +extern cpuop_func_noret op_08c0_24_nf; +extern cpuop_func_noret op_08c0_24_ff; +extern cpuop_func_noret op_08d0_24_nf; +extern cpuop_func_noret op_08d0_24_ff; +extern cpuop_func_noret op_08d8_24_nf; +extern cpuop_func_noret op_08d8_24_ff; +extern cpuop_func_noret op_08e0_24_nf; +extern cpuop_func_noret op_08e0_24_ff; +extern cpuop_func_noret op_08e8_24_nf; +extern cpuop_func_noret op_08e8_24_ff; +extern cpuop_func_noret op_08f0_24_nf; +extern cpuop_func_noret op_08f0_24_ff; +extern cpuop_func_noret op_08f8_24_nf; +extern cpuop_func_noret op_08f8_24_ff; +extern cpuop_func_noret op_08f9_24_nf; +extern cpuop_func_noret op_08f9_24_ff; +extern cpuop_func_noret op_0a00_24_nf; +extern cpuop_func_noret op_0a00_24_ff; +extern cpuop_func_noret op_0a10_24_nf; +extern cpuop_func_noret op_0a10_24_ff; +extern cpuop_func_noret op_0a18_24_nf; +extern cpuop_func_noret op_0a18_24_ff; +extern cpuop_func_noret op_0a20_24_nf; +extern cpuop_func_noret op_0a20_24_ff; +extern cpuop_func_noret op_0a28_24_nf; +extern cpuop_func_noret op_0a28_24_ff; +extern cpuop_func_noret op_0a30_24_nf; +extern cpuop_func_noret op_0a30_24_ff; +extern cpuop_func_noret op_0a38_24_nf; +extern cpuop_func_noret op_0a38_24_ff; +extern cpuop_func_noret op_0a39_24_nf; +extern cpuop_func_noret op_0a39_24_ff; +extern cpuop_func_noret op_0a3c_24_nf; +extern cpuop_func_noret op_0a3c_24_ff; +extern cpuop_func_noret op_0a40_24_nf; +extern cpuop_func_noret op_0a40_24_ff; +extern cpuop_func_noret op_0a50_24_nf; +extern cpuop_func_noret op_0a50_24_ff; +extern cpuop_func_noret op_0a58_24_nf; +extern cpuop_func_noret op_0a58_24_ff; +extern cpuop_func_noret op_0a60_24_nf; +extern cpuop_func_noret op_0a60_24_ff; +extern cpuop_func_noret op_0a68_24_nf; +extern cpuop_func_noret op_0a68_24_ff; +extern cpuop_func_noret op_0a70_24_nf; +extern cpuop_func_noret op_0a70_24_ff; +extern cpuop_func_noret op_0a78_24_nf; +extern cpuop_func_noret op_0a78_24_ff; +extern cpuop_func_noret op_0a79_24_nf; +extern cpuop_func_noret op_0a79_24_ff; +extern cpuop_func_noret op_0a7c_24_nf; +extern cpuop_func_noret op_0a7c_24_ff; +extern cpuop_func_noret op_0a80_24_nf; +extern cpuop_func_noret op_0a80_24_ff; +extern cpuop_func_noret op_0a90_24_nf; +extern cpuop_func_noret op_0a90_24_ff; +extern cpuop_func_noret op_0a98_24_nf; +extern cpuop_func_noret op_0a98_24_ff; +extern cpuop_func_noret op_0aa0_24_nf; +extern cpuop_func_noret op_0aa0_24_ff; +extern cpuop_func_noret op_0aa8_24_nf; +extern cpuop_func_noret op_0aa8_24_ff; +extern cpuop_func_noret op_0ab0_24_nf; +extern cpuop_func_noret op_0ab0_24_ff; +extern cpuop_func_noret op_0ab8_24_nf; +extern cpuop_func_noret op_0ab8_24_ff; +extern cpuop_func_noret op_0ab9_24_nf; +extern cpuop_func_noret op_0ab9_24_ff; +extern cpuop_func_noret op_0ad0_24_nf; +extern cpuop_func_noret op_0ad0_24_ff; +extern cpuop_func_noret op_0ad8_24_nf; +extern cpuop_func_noret op_0ad8_24_ff; +extern cpuop_func_noret op_0ae0_24_nf; +extern cpuop_func_noret op_0ae0_24_ff; +extern cpuop_func_noret op_0ae8_24_nf; +extern cpuop_func_noret op_0ae8_24_ff; +extern cpuop_func_noret op_0af0_24_nf; +extern cpuop_func_noret op_0af0_24_ff; +extern cpuop_func_noret op_0af8_24_nf; +extern cpuop_func_noret op_0af8_24_ff; +extern cpuop_func_noret op_0af9_24_nf; +extern cpuop_func_noret op_0af9_24_ff; +extern cpuop_func_noret op_0c00_24_nf; +extern cpuop_func_noret op_0c00_24_ff; +extern cpuop_func_noret op_0c10_24_nf; +extern cpuop_func_noret op_0c10_24_ff; +extern cpuop_func_noret op_0c18_24_nf; +extern cpuop_func_noret op_0c18_24_ff; +extern cpuop_func_noret op_0c20_24_nf; +extern cpuop_func_noret op_0c20_24_ff; +extern cpuop_func_noret op_0c28_24_nf; +extern cpuop_func_noret op_0c28_24_ff; +extern cpuop_func_noret op_0c30_24_nf; +extern cpuop_func_noret op_0c30_24_ff; +extern cpuop_func_noret op_0c38_24_nf; +extern cpuop_func_noret op_0c38_24_ff; +extern cpuop_func_noret op_0c39_24_nf; +extern cpuop_func_noret op_0c39_24_ff; +extern cpuop_func_noret op_0c3a_24_nf; +extern cpuop_func_noret op_0c3a_24_ff; +extern cpuop_func_noret op_0c3b_24_nf; +extern cpuop_func_noret op_0c3b_24_ff; +extern cpuop_func_noret op_0c40_24_nf; +extern cpuop_func_noret op_0c40_24_ff; +extern cpuop_func_noret op_0c50_24_nf; +extern cpuop_func_noret op_0c50_24_ff; +extern cpuop_func_noret op_0c58_24_nf; +extern cpuop_func_noret op_0c58_24_ff; +extern cpuop_func_noret op_0c60_24_nf; +extern cpuop_func_noret op_0c60_24_ff; +extern cpuop_func_noret op_0c68_24_nf; +extern cpuop_func_noret op_0c68_24_ff; +extern cpuop_func_noret op_0c70_24_nf; +extern cpuop_func_noret op_0c70_24_ff; +extern cpuop_func_noret op_0c78_24_nf; +extern cpuop_func_noret op_0c78_24_ff; +extern cpuop_func_noret op_0c79_24_nf; +extern cpuop_func_noret op_0c79_24_ff; +extern cpuop_func_noret op_0c7a_24_nf; +extern cpuop_func_noret op_0c7a_24_ff; +extern cpuop_func_noret op_0c7b_24_nf; +extern cpuop_func_noret op_0c7b_24_ff; +extern cpuop_func_noret op_0c80_24_nf; +extern cpuop_func_noret op_0c80_24_ff; +extern cpuop_func_noret op_0c90_24_nf; +extern cpuop_func_noret op_0c90_24_ff; +extern cpuop_func_noret op_0c98_24_nf; +extern cpuop_func_noret op_0c98_24_ff; +extern cpuop_func_noret op_0ca0_24_nf; +extern cpuop_func_noret op_0ca0_24_ff; +extern cpuop_func_noret op_0ca8_24_nf; +extern cpuop_func_noret op_0ca8_24_ff; +extern cpuop_func_noret op_0cb0_24_nf; +extern cpuop_func_noret op_0cb0_24_ff; +extern cpuop_func_noret op_0cb8_24_nf; +extern cpuop_func_noret op_0cb8_24_ff; +extern cpuop_func_noret op_0cb9_24_nf; +extern cpuop_func_noret op_0cb9_24_ff; +extern cpuop_func_noret op_0cba_24_nf; +extern cpuop_func_noret op_0cba_24_ff; +extern cpuop_func_noret op_0cbb_24_nf; +extern cpuop_func_noret op_0cbb_24_ff; +extern cpuop_func_noret op_0cd0_24_nf; +extern cpuop_func_noret op_0cd0_24_ff; +extern cpuop_func_noret op_0cd8_24_nf; +extern cpuop_func_noret op_0cd8_24_ff; +extern cpuop_func_noret op_0ce0_24_nf; +extern cpuop_func_noret op_0ce0_24_ff; +extern cpuop_func_noret op_0ce8_24_nf; +extern cpuop_func_noret op_0ce8_24_ff; +extern cpuop_func_noret op_0cf0_24_nf; +extern cpuop_func_noret op_0cf0_24_ff; +extern cpuop_func_noret op_0cf8_24_nf; +extern cpuop_func_noret op_0cf8_24_ff; +extern cpuop_func_noret op_0cf9_24_nf; +extern cpuop_func_noret op_0cf9_24_ff; +extern cpuop_func_noret op_0cfc_24_nf; +extern cpuop_func_noret op_0cfc_24_ff; +extern cpuop_func_noret op_0e10_24_nf; +extern cpuop_func_noret op_0e10_24_ff; +extern cpuop_func_noret op_0e18_24_nf; +extern cpuop_func_noret op_0e18_24_ff; +extern cpuop_func_noret op_0e20_24_nf; +extern cpuop_func_noret op_0e20_24_ff; +extern cpuop_func_noret op_0e28_24_nf; +extern cpuop_func_noret op_0e28_24_ff; +extern cpuop_func_noret op_0e30_24_nf; +extern cpuop_func_noret op_0e30_24_ff; +extern cpuop_func_noret op_0e38_24_nf; +extern cpuop_func_noret op_0e38_24_ff; +extern cpuop_func_noret op_0e39_24_nf; +extern cpuop_func_noret op_0e39_24_ff; +extern cpuop_func_noret op_0e50_24_nf; +extern cpuop_func_noret op_0e50_24_ff; +extern cpuop_func_noret op_0e58_24_nf; +extern cpuop_func_noret op_0e58_24_ff; +extern cpuop_func_noret op_0e60_24_nf; +extern cpuop_func_noret op_0e60_24_ff; +extern cpuop_func_noret op_0e68_24_nf; +extern cpuop_func_noret op_0e68_24_ff; +extern cpuop_func_noret op_0e70_24_nf; +extern cpuop_func_noret op_0e70_24_ff; +extern cpuop_func_noret op_0e78_24_nf; +extern cpuop_func_noret op_0e78_24_ff; +extern cpuop_func_noret op_0e79_24_nf; +extern cpuop_func_noret op_0e79_24_ff; +extern cpuop_func_noret op_0e90_24_nf; +extern cpuop_func_noret op_0e90_24_ff; +extern cpuop_func_noret op_0e98_24_nf; +extern cpuop_func_noret op_0e98_24_ff; +extern cpuop_func_noret op_0ea0_24_nf; +extern cpuop_func_noret op_0ea0_24_ff; +extern cpuop_func_noret op_0ea8_24_nf; +extern cpuop_func_noret op_0ea8_24_ff; +extern cpuop_func_noret op_0eb0_24_nf; +extern cpuop_func_noret op_0eb0_24_ff; +extern cpuop_func_noret op_0eb8_24_nf; +extern cpuop_func_noret op_0eb8_24_ff; +extern cpuop_func_noret op_0eb9_24_nf; +extern cpuop_func_noret op_0eb9_24_ff; +extern cpuop_func_noret op_0ed0_24_nf; +extern cpuop_func_noret op_0ed0_24_ff; +extern cpuop_func_noret op_0ed8_24_nf; +extern cpuop_func_noret op_0ed8_24_ff; +extern cpuop_func_noret op_0ee0_24_nf; +extern cpuop_func_noret op_0ee0_24_ff; +extern cpuop_func_noret op_0ee8_24_nf; +extern cpuop_func_noret op_0ee8_24_ff; +extern cpuop_func_noret op_0ef0_24_nf; +extern cpuop_func_noret op_0ef0_24_ff; +extern cpuop_func_noret op_0ef8_24_nf; +extern cpuop_func_noret op_0ef8_24_ff; +extern cpuop_func_noret op_0ef9_24_nf; +extern cpuop_func_noret op_0ef9_24_ff; +extern cpuop_func_noret op_0efc_24_nf; +extern cpuop_func_noret op_0efc_24_ff; +extern cpuop_func_noret op_1000_24_nf; +extern cpuop_func_noret op_1000_24_ff; +extern cpuop_func_noret op_1010_24_nf; +extern cpuop_func_noret op_1010_24_ff; +extern cpuop_func_noret op_1018_24_nf; +extern cpuop_func_noret op_1018_24_ff; +extern cpuop_func_noret op_1020_24_nf; +extern cpuop_func_noret op_1020_24_ff; +extern cpuop_func_noret op_1028_24_nf; +extern cpuop_func_noret op_1028_24_ff; +extern cpuop_func_noret op_1030_24_nf; +extern cpuop_func_noret op_1030_24_ff; +extern cpuop_func_noret op_1038_24_nf; +extern cpuop_func_noret op_1038_24_ff; +extern cpuop_func_noret op_1039_24_nf; +extern cpuop_func_noret op_1039_24_ff; +extern cpuop_func_noret op_103a_24_nf; +extern cpuop_func_noret op_103a_24_ff; +extern cpuop_func_noret op_103b_24_nf; +extern cpuop_func_noret op_103b_24_ff; +extern cpuop_func_noret op_103c_24_nf; +extern cpuop_func_noret op_103c_24_ff; +extern cpuop_func_noret op_1080_24_nf; +extern cpuop_func_noret op_1080_24_ff; +extern cpuop_func_noret op_1090_24_nf; +extern cpuop_func_noret op_1090_24_ff; +extern cpuop_func_noret op_1098_24_nf; +extern cpuop_func_noret op_1098_24_ff; +extern cpuop_func_noret op_10a0_24_nf; +extern cpuop_func_noret op_10a0_24_ff; +extern cpuop_func_noret op_10a8_24_nf; +extern cpuop_func_noret op_10a8_24_ff; +extern cpuop_func_noret op_10b0_24_nf; +extern cpuop_func_noret op_10b0_24_ff; +extern cpuop_func_noret op_10b8_24_nf; +extern cpuop_func_noret op_10b8_24_ff; +extern cpuop_func_noret op_10b9_24_nf; +extern cpuop_func_noret op_10b9_24_ff; +extern cpuop_func_noret op_10ba_24_nf; +extern cpuop_func_noret op_10ba_24_ff; +extern cpuop_func_noret op_10bb_24_nf; +extern cpuop_func_noret op_10bb_24_ff; +extern cpuop_func_noret op_10bc_24_nf; +extern cpuop_func_noret op_10bc_24_ff; +extern cpuop_func_noret op_10c0_24_nf; +extern cpuop_func_noret op_10c0_24_ff; +extern cpuop_func_noret op_10d0_24_nf; +extern cpuop_func_noret op_10d0_24_ff; +extern cpuop_func_noret op_10d8_24_nf; +extern cpuop_func_noret op_10d8_24_ff; +extern cpuop_func_noret op_10e0_24_nf; +extern cpuop_func_noret op_10e0_24_ff; +extern cpuop_func_noret op_10e8_24_nf; +extern cpuop_func_noret op_10e8_24_ff; +extern cpuop_func_noret op_10f0_24_nf; +extern cpuop_func_noret op_10f0_24_ff; +extern cpuop_func_noret op_10f8_24_nf; +extern cpuop_func_noret op_10f8_24_ff; +extern cpuop_func_noret op_10f9_24_nf; +extern cpuop_func_noret op_10f9_24_ff; +extern cpuop_func_noret op_10fa_24_nf; +extern cpuop_func_noret op_10fa_24_ff; +extern cpuop_func_noret op_10fb_24_nf; +extern cpuop_func_noret op_10fb_24_ff; +extern cpuop_func_noret op_10fc_24_nf; +extern cpuop_func_noret op_10fc_24_ff; +extern cpuop_func_noret op_1100_24_nf; +extern cpuop_func_noret op_1100_24_ff; +extern cpuop_func_noret op_1110_24_nf; +extern cpuop_func_noret op_1110_24_ff; +extern cpuop_func_noret op_1118_24_nf; +extern cpuop_func_noret op_1118_24_ff; +extern cpuop_func_noret op_1120_24_nf; +extern cpuop_func_noret op_1120_24_ff; +extern cpuop_func_noret op_1128_24_nf; +extern cpuop_func_noret op_1128_24_ff; +extern cpuop_func_noret op_1130_24_nf; +extern cpuop_func_noret op_1130_24_ff; +extern cpuop_func_noret op_1138_24_nf; +extern cpuop_func_noret op_1138_24_ff; +extern cpuop_func_noret op_1139_24_nf; +extern cpuop_func_noret op_1139_24_ff; +extern cpuop_func_noret op_113a_24_nf; +extern cpuop_func_noret op_113a_24_ff; +extern cpuop_func_noret op_113b_24_nf; +extern cpuop_func_noret op_113b_24_ff; +extern cpuop_func_noret op_113c_24_nf; +extern cpuop_func_noret op_113c_24_ff; +extern cpuop_func_noret op_1140_24_nf; +extern cpuop_func_noret op_1140_24_ff; +extern cpuop_func_noret op_1150_24_nf; +extern cpuop_func_noret op_1150_24_ff; +extern cpuop_func_noret op_1158_24_nf; +extern cpuop_func_noret op_1158_24_ff; +extern cpuop_func_noret op_1160_24_nf; +extern cpuop_func_noret op_1160_24_ff; +extern cpuop_func_noret op_1168_24_nf; +extern cpuop_func_noret op_1168_24_ff; +extern cpuop_func_noret op_1170_24_nf; +extern cpuop_func_noret op_1170_24_ff; +extern cpuop_func_noret op_1178_24_nf; +extern cpuop_func_noret op_1178_24_ff; +extern cpuop_func_noret op_1179_24_nf; +extern cpuop_func_noret op_1179_24_ff; +extern cpuop_func_noret op_117a_24_nf; +extern cpuop_func_noret op_117a_24_ff; +extern cpuop_func_noret op_117b_24_nf; +extern cpuop_func_noret op_117b_24_ff; +extern cpuop_func_noret op_117c_24_nf; +extern cpuop_func_noret op_117c_24_ff; +extern cpuop_func_noret op_1180_24_nf; +extern cpuop_func_noret op_1180_24_ff; +extern cpuop_func_noret op_1190_24_nf; +extern cpuop_func_noret op_1190_24_ff; +extern cpuop_func_noret op_1198_24_nf; +extern cpuop_func_noret op_1198_24_ff; +extern cpuop_func_noret op_11a0_24_nf; +extern cpuop_func_noret op_11a0_24_ff; +extern cpuop_func_noret op_11a8_24_nf; +extern cpuop_func_noret op_11a8_24_ff; +extern cpuop_func_noret op_11b0_24_nf; +extern cpuop_func_noret op_11b0_24_ff; +extern cpuop_func_noret op_11b8_24_nf; +extern cpuop_func_noret op_11b8_24_ff; +extern cpuop_func_noret op_11b9_24_nf; +extern cpuop_func_noret op_11b9_24_ff; +extern cpuop_func_noret op_11ba_24_nf; +extern cpuop_func_noret op_11ba_24_ff; +extern cpuop_func_noret op_11bb_24_nf; +extern cpuop_func_noret op_11bb_24_ff; +extern cpuop_func_noret op_11bc_24_nf; +extern cpuop_func_noret op_11bc_24_ff; +extern cpuop_func_noret op_11c0_24_nf; +extern cpuop_func_noret op_11c0_24_ff; +extern cpuop_func_noret op_11d0_24_nf; +extern cpuop_func_noret op_11d0_24_ff; +extern cpuop_func_noret op_11d8_24_nf; +extern cpuop_func_noret op_11d8_24_ff; +extern cpuop_func_noret op_11e0_24_nf; +extern cpuop_func_noret op_11e0_24_ff; +extern cpuop_func_noret op_11e8_24_nf; +extern cpuop_func_noret op_11e8_24_ff; +extern cpuop_func_noret op_11f0_24_nf; +extern cpuop_func_noret op_11f0_24_ff; +extern cpuop_func_noret op_11f8_24_nf; +extern cpuop_func_noret op_11f8_24_ff; +extern cpuop_func_noret op_11f9_24_nf; +extern cpuop_func_noret op_11f9_24_ff; +extern cpuop_func_noret op_11fa_24_nf; +extern cpuop_func_noret op_11fa_24_ff; +extern cpuop_func_noret op_11fb_24_nf; +extern cpuop_func_noret op_11fb_24_ff; +extern cpuop_func_noret op_11fc_24_nf; +extern cpuop_func_noret op_11fc_24_ff; +extern cpuop_func_noret op_13c0_24_nf; +extern cpuop_func_noret op_13c0_24_ff; +extern cpuop_func_noret op_13d0_24_nf; +extern cpuop_func_noret op_13d0_24_ff; +extern cpuop_func_noret op_13d8_24_nf; +extern cpuop_func_noret op_13d8_24_ff; +extern cpuop_func_noret op_13e0_24_nf; +extern cpuop_func_noret op_13e0_24_ff; +extern cpuop_func_noret op_13e8_24_nf; +extern cpuop_func_noret op_13e8_24_ff; +extern cpuop_func_noret op_13f0_24_nf; +extern cpuop_func_noret op_13f0_24_ff; +extern cpuop_func_noret op_13f8_24_nf; +extern cpuop_func_noret op_13f8_24_ff; +extern cpuop_func_noret op_13f9_24_nf; +extern cpuop_func_noret op_13f9_24_ff; +extern cpuop_func_noret op_13fa_24_nf; +extern cpuop_func_noret op_13fa_24_ff; +extern cpuop_func_noret op_13fb_24_nf; +extern cpuop_func_noret op_13fb_24_ff; +extern cpuop_func_noret op_13fc_24_nf; +extern cpuop_func_noret op_13fc_24_ff; +extern cpuop_func_noret op_2000_24_nf; +extern cpuop_func_noret op_2000_24_ff; +extern cpuop_func_noret op_2008_24_nf; +extern cpuop_func_noret op_2008_24_ff; +extern cpuop_func_noret op_2010_24_nf; +extern cpuop_func_noret op_2010_24_ff; +extern cpuop_func_noret op_2018_24_nf; +extern cpuop_func_noret op_2018_24_ff; +extern cpuop_func_noret op_2020_24_nf; +extern cpuop_func_noret op_2020_24_ff; +extern cpuop_func_noret op_2028_24_nf; +extern cpuop_func_noret op_2028_24_ff; +extern cpuop_func_noret op_2030_24_nf; +extern cpuop_func_noret op_2030_24_ff; +extern cpuop_func_noret op_2038_24_nf; +extern cpuop_func_noret op_2038_24_ff; +extern cpuop_func_noret op_2039_24_nf; +extern cpuop_func_noret op_2039_24_ff; +extern cpuop_func_noret op_203a_24_nf; +extern cpuop_func_noret op_203a_24_ff; +extern cpuop_func_noret op_203b_24_nf; +extern cpuop_func_noret op_203b_24_ff; +extern cpuop_func_noret op_203c_24_nf; +extern cpuop_func_noret op_203c_24_ff; +extern cpuop_func_noret op_2040_24_nf; +extern cpuop_func_noret op_2040_24_ff; +extern cpuop_func_noret op_2048_24_nf; +extern cpuop_func_noret op_2048_24_ff; +extern cpuop_func_noret op_2050_24_nf; +extern cpuop_func_noret op_2050_24_ff; +extern cpuop_func_noret op_2058_24_nf; +extern cpuop_func_noret op_2058_24_ff; +extern cpuop_func_noret op_2060_24_nf; +extern cpuop_func_noret op_2060_24_ff; +extern cpuop_func_noret op_2068_24_nf; +extern cpuop_func_noret op_2068_24_ff; +extern cpuop_func_noret op_2070_24_nf; +extern cpuop_func_noret op_2070_24_ff; +extern cpuop_func_noret op_2078_24_nf; +extern cpuop_func_noret op_2078_24_ff; +extern cpuop_func_noret op_2079_24_nf; +extern cpuop_func_noret op_2079_24_ff; +extern cpuop_func_noret op_207a_24_nf; +extern cpuop_func_noret op_207a_24_ff; +extern cpuop_func_noret op_207b_24_nf; +extern cpuop_func_noret op_207b_24_ff; +extern cpuop_func_noret op_207c_24_nf; +extern cpuop_func_noret op_207c_24_ff; +extern cpuop_func_noret op_2080_24_nf; +extern cpuop_func_noret op_2080_24_ff; +extern cpuop_func_noret op_2088_24_nf; +extern cpuop_func_noret op_2088_24_ff; +extern cpuop_func_noret op_2090_24_nf; +extern cpuop_func_noret op_2090_24_ff; +extern cpuop_func_noret op_2098_24_nf; +extern cpuop_func_noret op_2098_24_ff; +extern cpuop_func_noret op_20a0_24_nf; +extern cpuop_func_noret op_20a0_24_ff; +extern cpuop_func_noret op_20a8_24_nf; +extern cpuop_func_noret op_20a8_24_ff; +extern cpuop_func_noret op_20b0_24_nf; +extern cpuop_func_noret op_20b0_24_ff; +extern cpuop_func_noret op_20b8_24_nf; +extern cpuop_func_noret op_20b8_24_ff; +extern cpuop_func_noret op_20b9_24_nf; +extern cpuop_func_noret op_20b9_24_ff; +extern cpuop_func_noret op_20ba_24_nf; +extern cpuop_func_noret op_20ba_24_ff; +extern cpuop_func_noret op_20bb_24_nf; +extern cpuop_func_noret op_20bb_24_ff; +extern cpuop_func_noret op_20bc_24_nf; +extern cpuop_func_noret op_20bc_24_ff; +extern cpuop_func_noret op_20c0_24_nf; +extern cpuop_func_noret op_20c0_24_ff; +extern cpuop_func_noret op_20c8_24_nf; +extern cpuop_func_noret op_20c8_24_ff; +extern cpuop_func_noret op_20d0_24_nf; +extern cpuop_func_noret op_20d0_24_ff; +extern cpuop_func_noret op_20d8_24_nf; +extern cpuop_func_noret op_20d8_24_ff; +extern cpuop_func_noret op_20e0_24_nf; +extern cpuop_func_noret op_20e0_24_ff; +extern cpuop_func_noret op_20e8_24_nf; +extern cpuop_func_noret op_20e8_24_ff; +extern cpuop_func_noret op_20f0_24_nf; +extern cpuop_func_noret op_20f0_24_ff; +extern cpuop_func_noret op_20f8_24_nf; +extern cpuop_func_noret op_20f8_24_ff; +extern cpuop_func_noret op_20f9_24_nf; +extern cpuop_func_noret op_20f9_24_ff; +extern cpuop_func_noret op_20fa_24_nf; +extern cpuop_func_noret op_20fa_24_ff; +extern cpuop_func_noret op_20fb_24_nf; +extern cpuop_func_noret op_20fb_24_ff; +extern cpuop_func_noret op_20fc_24_nf; +extern cpuop_func_noret op_20fc_24_ff; +extern cpuop_func_noret op_2100_24_nf; +extern cpuop_func_noret op_2100_24_ff; +extern cpuop_func_noret op_2108_24_nf; +extern cpuop_func_noret op_2108_24_ff; +extern cpuop_func_noret op_2110_24_nf; +extern cpuop_func_noret op_2110_24_ff; +extern cpuop_func_noret op_2118_24_nf; +extern cpuop_func_noret op_2118_24_ff; +extern cpuop_func_noret op_2120_24_nf; +extern cpuop_func_noret op_2120_24_ff; +extern cpuop_func_noret op_2128_24_nf; +extern cpuop_func_noret op_2128_24_ff; +extern cpuop_func_noret op_2130_24_nf; +extern cpuop_func_noret op_2130_24_ff; +extern cpuop_func_noret op_2138_24_nf; +extern cpuop_func_noret op_2138_24_ff; +extern cpuop_func_noret op_2139_24_nf; +extern cpuop_func_noret op_2139_24_ff; +extern cpuop_func_noret op_213a_24_nf; +extern cpuop_func_noret op_213a_24_ff; +extern cpuop_func_noret op_213b_24_nf; +extern cpuop_func_noret op_213b_24_ff; +extern cpuop_func_noret op_213c_24_nf; +extern cpuop_func_noret op_213c_24_ff; +extern cpuop_func_noret op_2140_24_nf; +extern cpuop_func_noret op_2140_24_ff; +extern cpuop_func_noret op_2148_24_nf; +extern cpuop_func_noret op_2148_24_ff; +extern cpuop_func_noret op_2150_24_nf; +extern cpuop_func_noret op_2150_24_ff; +extern cpuop_func_noret op_2158_24_nf; +extern cpuop_func_noret op_2158_24_ff; +extern cpuop_func_noret op_2160_24_nf; +extern cpuop_func_noret op_2160_24_ff; +extern cpuop_func_noret op_2168_24_nf; +extern cpuop_func_noret op_2168_24_ff; +extern cpuop_func_noret op_2170_24_nf; +extern cpuop_func_noret op_2170_24_ff; +extern cpuop_func_noret op_2178_24_nf; +extern cpuop_func_noret op_2178_24_ff; +extern cpuop_func_noret op_2179_24_nf; +extern cpuop_func_noret op_2179_24_ff; +extern cpuop_func_noret op_217a_24_nf; +extern cpuop_func_noret op_217a_24_ff; +extern cpuop_func_noret op_217b_24_nf; +extern cpuop_func_noret op_217b_24_ff; +extern cpuop_func_noret op_217c_24_nf; +extern cpuop_func_noret op_217c_24_ff; +extern cpuop_func_noret op_2180_24_nf; +extern cpuop_func_noret op_2180_24_ff; +extern cpuop_func_noret op_2188_24_nf; +extern cpuop_func_noret op_2188_24_ff; +extern cpuop_func_noret op_2190_24_nf; +extern cpuop_func_noret op_2190_24_ff; +extern cpuop_func_noret op_2198_24_nf; +extern cpuop_func_noret op_2198_24_ff; +extern cpuop_func_noret op_21a0_24_nf; +extern cpuop_func_noret op_21a0_24_ff; +extern cpuop_func_noret op_21a8_24_nf; +extern cpuop_func_noret op_21a8_24_ff; +extern cpuop_func_noret op_21b0_24_nf; +extern cpuop_func_noret op_21b0_24_ff; +extern cpuop_func_noret op_21b8_24_nf; +extern cpuop_func_noret op_21b8_24_ff; +extern cpuop_func_noret op_21b9_24_nf; +extern cpuop_func_noret op_21b9_24_ff; +extern cpuop_func_noret op_21ba_24_nf; +extern cpuop_func_noret op_21ba_24_ff; +extern cpuop_func_noret op_21bb_24_nf; +extern cpuop_func_noret op_21bb_24_ff; +extern cpuop_func_noret op_21bc_24_nf; +extern cpuop_func_noret op_21bc_24_ff; +extern cpuop_func_noret op_21c0_24_nf; +extern cpuop_func_noret op_21c0_24_ff; +extern cpuop_func_noret op_21c8_24_nf; +extern cpuop_func_noret op_21c8_24_ff; +extern cpuop_func_noret op_21d0_24_nf; +extern cpuop_func_noret op_21d0_24_ff; +extern cpuop_func_noret op_21d8_24_nf; +extern cpuop_func_noret op_21d8_24_ff; +extern cpuop_func_noret op_21e0_24_nf; +extern cpuop_func_noret op_21e0_24_ff; +extern cpuop_func_noret op_21e8_24_nf; +extern cpuop_func_noret op_21e8_24_ff; +extern cpuop_func_noret op_21f0_24_nf; +extern cpuop_func_noret op_21f0_24_ff; +extern cpuop_func_noret op_21f8_24_nf; +extern cpuop_func_noret op_21f8_24_ff; +extern cpuop_func_noret op_21f9_24_nf; +extern cpuop_func_noret op_21f9_24_ff; +extern cpuop_func_noret op_21fa_24_nf; +extern cpuop_func_noret op_21fa_24_ff; +extern cpuop_func_noret op_21fb_24_nf; +extern cpuop_func_noret op_21fb_24_ff; +extern cpuop_func_noret op_21fc_24_nf; +extern cpuop_func_noret op_21fc_24_ff; +extern cpuop_func_noret op_23c0_24_nf; +extern cpuop_func_noret op_23c0_24_ff; +extern cpuop_func_noret op_23c8_24_nf; +extern cpuop_func_noret op_23c8_24_ff; +extern cpuop_func_noret op_23d0_24_nf; +extern cpuop_func_noret op_23d0_24_ff; +extern cpuop_func_noret op_23d8_24_nf; +extern cpuop_func_noret op_23d8_24_ff; +extern cpuop_func_noret op_23e0_24_nf; +extern cpuop_func_noret op_23e0_24_ff; +extern cpuop_func_noret op_23e8_24_nf; +extern cpuop_func_noret op_23e8_24_ff; +extern cpuop_func_noret op_23f0_24_nf; +extern cpuop_func_noret op_23f0_24_ff; +extern cpuop_func_noret op_23f8_24_nf; +extern cpuop_func_noret op_23f8_24_ff; +extern cpuop_func_noret op_23f9_24_nf; +extern cpuop_func_noret op_23f9_24_ff; +extern cpuop_func_noret op_23fa_24_nf; +extern cpuop_func_noret op_23fa_24_ff; +extern cpuop_func_noret op_23fb_24_nf; +extern cpuop_func_noret op_23fb_24_ff; +extern cpuop_func_noret op_23fc_24_nf; +extern cpuop_func_noret op_23fc_24_ff; +extern cpuop_func_noret op_3000_24_nf; +extern cpuop_func_noret op_3000_24_ff; +extern cpuop_func_noret op_3008_24_nf; +extern cpuop_func_noret op_3008_24_ff; +extern cpuop_func_noret op_3010_24_nf; +extern cpuop_func_noret op_3010_24_ff; +extern cpuop_func_noret op_3018_24_nf; +extern cpuop_func_noret op_3018_24_ff; +extern cpuop_func_noret op_3020_24_nf; +extern cpuop_func_noret op_3020_24_ff; +extern cpuop_func_noret op_3028_24_nf; +extern cpuop_func_noret op_3028_24_ff; +extern cpuop_func_noret op_3030_24_nf; +extern cpuop_func_noret op_3030_24_ff; +extern cpuop_func_noret op_3038_24_nf; +extern cpuop_func_noret op_3038_24_ff; +extern cpuop_func_noret op_3039_24_nf; +extern cpuop_func_noret op_3039_24_ff; +extern cpuop_func_noret op_303a_24_nf; +extern cpuop_func_noret op_303a_24_ff; +extern cpuop_func_noret op_303b_24_nf; +extern cpuop_func_noret op_303b_24_ff; +extern cpuop_func_noret op_303c_24_nf; +extern cpuop_func_noret op_303c_24_ff; +extern cpuop_func_noret op_3040_24_nf; +extern cpuop_func_noret op_3040_24_ff; +extern cpuop_func_noret op_3048_24_nf; +extern cpuop_func_noret op_3048_24_ff; +extern cpuop_func_noret op_3050_24_nf; +extern cpuop_func_noret op_3050_24_ff; +extern cpuop_func_noret op_3058_24_nf; +extern cpuop_func_noret op_3058_24_ff; +extern cpuop_func_noret op_3060_24_nf; +extern cpuop_func_noret op_3060_24_ff; +extern cpuop_func_noret op_3068_24_nf; +extern cpuop_func_noret op_3068_24_ff; +extern cpuop_func_noret op_3070_24_nf; +extern cpuop_func_noret op_3070_24_ff; +extern cpuop_func_noret op_3078_24_nf; +extern cpuop_func_noret op_3078_24_ff; +extern cpuop_func_noret op_3079_24_nf; +extern cpuop_func_noret op_3079_24_ff; +extern cpuop_func_noret op_307a_24_nf; +extern cpuop_func_noret op_307a_24_ff; +extern cpuop_func_noret op_307b_24_nf; +extern cpuop_func_noret op_307b_24_ff; +extern cpuop_func_noret op_307c_24_nf; +extern cpuop_func_noret op_307c_24_ff; +extern cpuop_func_noret op_3080_24_nf; +extern cpuop_func_noret op_3080_24_ff; +extern cpuop_func_noret op_3088_24_nf; +extern cpuop_func_noret op_3088_24_ff; +extern cpuop_func_noret op_3090_24_nf; +extern cpuop_func_noret op_3090_24_ff; +extern cpuop_func_noret op_3098_24_nf; +extern cpuop_func_noret op_3098_24_ff; +extern cpuop_func_noret op_30a0_24_nf; +extern cpuop_func_noret op_30a0_24_ff; +extern cpuop_func_noret op_30a8_24_nf; +extern cpuop_func_noret op_30a8_24_ff; +extern cpuop_func_noret op_30b0_24_nf; +extern cpuop_func_noret op_30b0_24_ff; +extern cpuop_func_noret op_30b8_24_nf; +extern cpuop_func_noret op_30b8_24_ff; +extern cpuop_func_noret op_30b9_24_nf; +extern cpuop_func_noret op_30b9_24_ff; +extern cpuop_func_noret op_30ba_24_nf; +extern cpuop_func_noret op_30ba_24_ff; +extern cpuop_func_noret op_30bb_24_nf; +extern cpuop_func_noret op_30bb_24_ff; +extern cpuop_func_noret op_30bc_24_nf; +extern cpuop_func_noret op_30bc_24_ff; +extern cpuop_func_noret op_30c0_24_nf; +extern cpuop_func_noret op_30c0_24_ff; +extern cpuop_func_noret op_30c8_24_nf; +extern cpuop_func_noret op_30c8_24_ff; +extern cpuop_func_noret op_30d0_24_nf; +extern cpuop_func_noret op_30d0_24_ff; +extern cpuop_func_noret op_30d8_24_nf; +extern cpuop_func_noret op_30d8_24_ff; +extern cpuop_func_noret op_30e0_24_nf; +extern cpuop_func_noret op_30e0_24_ff; +extern cpuop_func_noret op_30e8_24_nf; +extern cpuop_func_noret op_30e8_24_ff; +extern cpuop_func_noret op_30f0_24_nf; +extern cpuop_func_noret op_30f0_24_ff; +extern cpuop_func_noret op_30f8_24_nf; +extern cpuop_func_noret op_30f8_24_ff; +extern cpuop_func_noret op_30f9_24_nf; +extern cpuop_func_noret op_30f9_24_ff; +extern cpuop_func_noret op_30fa_24_nf; +extern cpuop_func_noret op_30fa_24_ff; +extern cpuop_func_noret op_30fb_24_nf; +extern cpuop_func_noret op_30fb_24_ff; +extern cpuop_func_noret op_30fc_24_nf; +extern cpuop_func_noret op_30fc_24_ff; +extern cpuop_func_noret op_3100_24_nf; +extern cpuop_func_noret op_3100_24_ff; +extern cpuop_func_noret op_3108_24_nf; +extern cpuop_func_noret op_3108_24_ff; +extern cpuop_func_noret op_3110_24_nf; +extern cpuop_func_noret op_3110_24_ff; +extern cpuop_func_noret op_3118_24_nf; +extern cpuop_func_noret op_3118_24_ff; +extern cpuop_func_noret op_3120_24_nf; +extern cpuop_func_noret op_3120_24_ff; +extern cpuop_func_noret op_3128_24_nf; +extern cpuop_func_noret op_3128_24_ff; +extern cpuop_func_noret op_3130_24_nf; +extern cpuop_func_noret op_3130_24_ff; +extern cpuop_func_noret op_3138_24_nf; +extern cpuop_func_noret op_3138_24_ff; +extern cpuop_func_noret op_3139_24_nf; +extern cpuop_func_noret op_3139_24_ff; +extern cpuop_func_noret op_313a_24_nf; +extern cpuop_func_noret op_313a_24_ff; +extern cpuop_func_noret op_313b_24_nf; +extern cpuop_func_noret op_313b_24_ff; +extern cpuop_func_noret op_313c_24_nf; +extern cpuop_func_noret op_313c_24_ff; +extern cpuop_func_noret op_3140_24_nf; +extern cpuop_func_noret op_3140_24_ff; +extern cpuop_func_noret op_3148_24_nf; +extern cpuop_func_noret op_3148_24_ff; +extern cpuop_func_noret op_3150_24_nf; +extern cpuop_func_noret op_3150_24_ff; +extern cpuop_func_noret op_3158_24_nf; +extern cpuop_func_noret op_3158_24_ff; +extern cpuop_func_noret op_3160_24_nf; +extern cpuop_func_noret op_3160_24_ff; +extern cpuop_func_noret op_3168_24_nf; +extern cpuop_func_noret op_3168_24_ff; +extern cpuop_func_noret op_3170_24_nf; +extern cpuop_func_noret op_3170_24_ff; +extern cpuop_func_noret op_3178_24_nf; +extern cpuop_func_noret op_3178_24_ff; +extern cpuop_func_noret op_3179_24_nf; +extern cpuop_func_noret op_3179_24_ff; +extern cpuop_func_noret op_317a_24_nf; +extern cpuop_func_noret op_317a_24_ff; +extern cpuop_func_noret op_317b_24_nf; +extern cpuop_func_noret op_317b_24_ff; +extern cpuop_func_noret op_317c_24_nf; +extern cpuop_func_noret op_317c_24_ff; +extern cpuop_func_noret op_3180_24_nf; +extern cpuop_func_noret op_3180_24_ff; +extern cpuop_func_noret op_3188_24_nf; +extern cpuop_func_noret op_3188_24_ff; +extern cpuop_func_noret op_3190_24_nf; +extern cpuop_func_noret op_3190_24_ff; +extern cpuop_func_noret op_3198_24_nf; +extern cpuop_func_noret op_3198_24_ff; +extern cpuop_func_noret op_31a0_24_nf; +extern cpuop_func_noret op_31a0_24_ff; +extern cpuop_func_noret op_31a8_24_nf; +extern cpuop_func_noret op_31a8_24_ff; +extern cpuop_func_noret op_31b0_24_nf; +extern cpuop_func_noret op_31b0_24_ff; +extern cpuop_func_noret op_31b8_24_nf; +extern cpuop_func_noret op_31b8_24_ff; +extern cpuop_func_noret op_31b9_24_nf; +extern cpuop_func_noret op_31b9_24_ff; +extern cpuop_func_noret op_31ba_24_nf; +extern cpuop_func_noret op_31ba_24_ff; +extern cpuop_func_noret op_31bb_24_nf; +extern cpuop_func_noret op_31bb_24_ff; +extern cpuop_func_noret op_31bc_24_nf; +extern cpuop_func_noret op_31bc_24_ff; +extern cpuop_func_noret op_31c0_24_nf; +extern cpuop_func_noret op_31c0_24_ff; +extern cpuop_func_noret op_31c8_24_nf; +extern cpuop_func_noret op_31c8_24_ff; +extern cpuop_func_noret op_31d0_24_nf; +extern cpuop_func_noret op_31d0_24_ff; +extern cpuop_func_noret op_31d8_24_nf; +extern cpuop_func_noret op_31d8_24_ff; +extern cpuop_func_noret op_31e0_24_nf; +extern cpuop_func_noret op_31e0_24_ff; +extern cpuop_func_noret op_31e8_24_nf; +extern cpuop_func_noret op_31e8_24_ff; +extern cpuop_func_noret op_31f0_24_nf; +extern cpuop_func_noret op_31f0_24_ff; +extern cpuop_func_noret op_31f8_24_nf; +extern cpuop_func_noret op_31f8_24_ff; +extern cpuop_func_noret op_31f9_24_nf; +extern cpuop_func_noret op_31f9_24_ff; +extern cpuop_func_noret op_31fa_24_nf; +extern cpuop_func_noret op_31fa_24_ff; +extern cpuop_func_noret op_31fb_24_nf; +extern cpuop_func_noret op_31fb_24_ff; +extern cpuop_func_noret op_31fc_24_nf; +extern cpuop_func_noret op_31fc_24_ff; +extern cpuop_func_noret op_33c0_24_nf; +extern cpuop_func_noret op_33c0_24_ff; +extern cpuop_func_noret op_33c8_24_nf; +extern cpuop_func_noret op_33c8_24_ff; +extern cpuop_func_noret op_33d0_24_nf; +extern cpuop_func_noret op_33d0_24_ff; +extern cpuop_func_noret op_33d8_24_nf; +extern cpuop_func_noret op_33d8_24_ff; +extern cpuop_func_noret op_33e0_24_nf; +extern cpuop_func_noret op_33e0_24_ff; +extern cpuop_func_noret op_33e8_24_nf; +extern cpuop_func_noret op_33e8_24_ff; +extern cpuop_func_noret op_33f0_24_nf; +extern cpuop_func_noret op_33f0_24_ff; +extern cpuop_func_noret op_33f8_24_nf; +extern cpuop_func_noret op_33f8_24_ff; +extern cpuop_func_noret op_33f9_24_nf; +extern cpuop_func_noret op_33f9_24_ff; +extern cpuop_func_noret op_33fa_24_nf; +extern cpuop_func_noret op_33fa_24_ff; +extern cpuop_func_noret op_33fb_24_nf; +extern cpuop_func_noret op_33fb_24_ff; +extern cpuop_func_noret op_33fc_24_nf; +extern cpuop_func_noret op_33fc_24_ff; +extern cpuop_func_noret op_4000_24_nf; +extern cpuop_func_noret op_4000_24_ff; +extern cpuop_func_noret op_4010_24_nf; +extern cpuop_func_noret op_4010_24_ff; +extern cpuop_func_noret op_4018_24_nf; +extern cpuop_func_noret op_4018_24_ff; +extern cpuop_func_noret op_4020_24_nf; +extern cpuop_func_noret op_4020_24_ff; +extern cpuop_func_noret op_4028_24_nf; +extern cpuop_func_noret op_4028_24_ff; +extern cpuop_func_noret op_4030_24_nf; +extern cpuop_func_noret op_4030_24_ff; +extern cpuop_func_noret op_4038_24_nf; +extern cpuop_func_noret op_4038_24_ff; +extern cpuop_func_noret op_4039_24_nf; +extern cpuop_func_noret op_4039_24_ff; +extern cpuop_func_noret op_4040_24_nf; +extern cpuop_func_noret op_4040_24_ff; +extern cpuop_func_noret op_4050_24_nf; +extern cpuop_func_noret op_4050_24_ff; +extern cpuop_func_noret op_4058_24_nf; +extern cpuop_func_noret op_4058_24_ff; +extern cpuop_func_noret op_4060_24_nf; +extern cpuop_func_noret op_4060_24_ff; +extern cpuop_func_noret op_4068_24_nf; +extern cpuop_func_noret op_4068_24_ff; +extern cpuop_func_noret op_4070_24_nf; +extern cpuop_func_noret op_4070_24_ff; +extern cpuop_func_noret op_4078_24_nf; +extern cpuop_func_noret op_4078_24_ff; +extern cpuop_func_noret op_4079_24_nf; +extern cpuop_func_noret op_4079_24_ff; +extern cpuop_func_noret op_4080_24_nf; +extern cpuop_func_noret op_4080_24_ff; +extern cpuop_func_noret op_4090_24_nf; +extern cpuop_func_noret op_4090_24_ff; +extern cpuop_func_noret op_4098_24_nf; +extern cpuop_func_noret op_4098_24_ff; +extern cpuop_func_noret op_40a0_24_nf; +extern cpuop_func_noret op_40a0_24_ff; +extern cpuop_func_noret op_40a8_24_nf; +extern cpuop_func_noret op_40a8_24_ff; +extern cpuop_func_noret op_40b0_24_nf; +extern cpuop_func_noret op_40b0_24_ff; +extern cpuop_func_noret op_40b8_24_nf; +extern cpuop_func_noret op_40b8_24_ff; +extern cpuop_func_noret op_40b9_24_nf; +extern cpuop_func_noret op_40b9_24_ff; +extern cpuop_func_noret op_40c0_24_nf; +extern cpuop_func_noret op_40c0_24_ff; +extern cpuop_func_noret op_40d0_24_nf; +extern cpuop_func_noret op_40d0_24_ff; +extern cpuop_func_noret op_40d8_24_nf; +extern cpuop_func_noret op_40d8_24_ff; +extern cpuop_func_noret op_40e0_24_nf; +extern cpuop_func_noret op_40e0_24_ff; +extern cpuop_func_noret op_40e8_24_nf; +extern cpuop_func_noret op_40e8_24_ff; +extern cpuop_func_noret op_40f0_24_nf; +extern cpuop_func_noret op_40f0_24_ff; +extern cpuop_func_noret op_40f8_24_nf; +extern cpuop_func_noret op_40f8_24_ff; +extern cpuop_func_noret op_40f9_24_nf; +extern cpuop_func_noret op_40f9_24_ff; +extern cpuop_func_noret op_4100_24_nf; +extern cpuop_func_noret op_4100_24_ff; +extern cpuop_func_noret op_4110_24_nf; +extern cpuop_func_noret op_4110_24_ff; +extern cpuop_func_noret op_4118_24_nf; +extern cpuop_func_noret op_4118_24_ff; +extern cpuop_func_noret op_4120_24_nf; +extern cpuop_func_noret op_4120_24_ff; +extern cpuop_func_noret op_4128_24_nf; +extern cpuop_func_noret op_4128_24_ff; +extern cpuop_func_noret op_4130_24_nf; +extern cpuop_func_noret op_4130_24_ff; +extern cpuop_func_noret op_4138_24_nf; +extern cpuop_func_noret op_4138_24_ff; +extern cpuop_func_noret op_4139_24_nf; +extern cpuop_func_noret op_4139_24_ff; +extern cpuop_func_noret op_413a_24_nf; +extern cpuop_func_noret op_413a_24_ff; +extern cpuop_func_noret op_413b_24_nf; +extern cpuop_func_noret op_413b_24_ff; +extern cpuop_func_noret op_413c_24_nf; +extern cpuop_func_noret op_413c_24_ff; +extern cpuop_func_noret op_4180_24_nf; +extern cpuop_func_noret op_4180_24_ff; +extern cpuop_func_noret op_4190_24_nf; +extern cpuop_func_noret op_4190_24_ff; +extern cpuop_func_noret op_4198_24_nf; +extern cpuop_func_noret op_4198_24_ff; +extern cpuop_func_noret op_41a0_24_nf; +extern cpuop_func_noret op_41a0_24_ff; +extern cpuop_func_noret op_41a8_24_nf; +extern cpuop_func_noret op_41a8_24_ff; +extern cpuop_func_noret op_41b0_24_nf; +extern cpuop_func_noret op_41b0_24_ff; +extern cpuop_func_noret op_41b8_24_nf; +extern cpuop_func_noret op_41b8_24_ff; +extern cpuop_func_noret op_41b9_24_nf; +extern cpuop_func_noret op_41b9_24_ff; +extern cpuop_func_noret op_41ba_24_nf; +extern cpuop_func_noret op_41ba_24_ff; +extern cpuop_func_noret op_41bb_24_nf; +extern cpuop_func_noret op_41bb_24_ff; +extern cpuop_func_noret op_41bc_24_nf; +extern cpuop_func_noret op_41bc_24_ff; +extern cpuop_func_noret op_41d0_24_nf; +extern cpuop_func_noret op_41d0_24_ff; +extern cpuop_func_noret op_41e8_24_nf; +extern cpuop_func_noret op_41e8_24_ff; +extern cpuop_func_noret op_41f0_24_nf; +extern cpuop_func_noret op_41f0_24_ff; +extern cpuop_func_noret op_41f8_24_nf; +extern cpuop_func_noret op_41f8_24_ff; +extern cpuop_func_noret op_41f9_24_nf; +extern cpuop_func_noret op_41f9_24_ff; +extern cpuop_func_noret op_41fa_24_nf; +extern cpuop_func_noret op_41fa_24_ff; +extern cpuop_func_noret op_41fb_24_nf; +extern cpuop_func_noret op_41fb_24_ff; +extern cpuop_func_noret op_4200_24_nf; +extern cpuop_func_noret op_4200_24_ff; +extern cpuop_func_noret op_4210_24_nf; +extern cpuop_func_noret op_4210_24_ff; +extern cpuop_func_noret op_4218_24_nf; +extern cpuop_func_noret op_4218_24_ff; +extern cpuop_func_noret op_4220_24_nf; +extern cpuop_func_noret op_4220_24_ff; +extern cpuop_func_noret op_4228_24_nf; +extern cpuop_func_noret op_4228_24_ff; +extern cpuop_func_noret op_4230_24_nf; +extern cpuop_func_noret op_4230_24_ff; +extern cpuop_func_noret op_4238_24_nf; +extern cpuop_func_noret op_4238_24_ff; +extern cpuop_func_noret op_4239_24_nf; +extern cpuop_func_noret op_4239_24_ff; +extern cpuop_func_noret op_4240_24_nf; +extern cpuop_func_noret op_4240_24_ff; +extern cpuop_func_noret op_4250_24_nf; +extern cpuop_func_noret op_4250_24_ff; +extern cpuop_func_noret op_4258_24_nf; +extern cpuop_func_noret op_4258_24_ff; +extern cpuop_func_noret op_4260_24_nf; +extern cpuop_func_noret op_4260_24_ff; +extern cpuop_func_noret op_4268_24_nf; +extern cpuop_func_noret op_4268_24_ff; +extern cpuop_func_noret op_4270_24_nf; +extern cpuop_func_noret op_4270_24_ff; +extern cpuop_func_noret op_4278_24_nf; +extern cpuop_func_noret op_4278_24_ff; +extern cpuop_func_noret op_4279_24_nf; +extern cpuop_func_noret op_4279_24_ff; +extern cpuop_func_noret op_4280_24_nf; +extern cpuop_func_noret op_4280_24_ff; +extern cpuop_func_noret op_4290_24_nf; +extern cpuop_func_noret op_4290_24_ff; +extern cpuop_func_noret op_4298_24_nf; +extern cpuop_func_noret op_4298_24_ff; +extern cpuop_func_noret op_42a0_24_nf; +extern cpuop_func_noret op_42a0_24_ff; +extern cpuop_func_noret op_42a8_24_nf; +extern cpuop_func_noret op_42a8_24_ff; +extern cpuop_func_noret op_42b0_24_nf; +extern cpuop_func_noret op_42b0_24_ff; +extern cpuop_func_noret op_42b8_24_nf; +extern cpuop_func_noret op_42b8_24_ff; +extern cpuop_func_noret op_42b9_24_nf; +extern cpuop_func_noret op_42b9_24_ff; +extern cpuop_func_noret op_42c0_24_nf; +extern cpuop_func_noret op_42c0_24_ff; +extern cpuop_func_noret op_42d0_24_nf; +extern cpuop_func_noret op_42d0_24_ff; +extern cpuop_func_noret op_42d8_24_nf; +extern cpuop_func_noret op_42d8_24_ff; +extern cpuop_func_noret op_42e0_24_nf; +extern cpuop_func_noret op_42e0_24_ff; +extern cpuop_func_noret op_42e8_24_nf; +extern cpuop_func_noret op_42e8_24_ff; +extern cpuop_func_noret op_42f0_24_nf; +extern cpuop_func_noret op_42f0_24_ff; +extern cpuop_func_noret op_42f8_24_nf; +extern cpuop_func_noret op_42f8_24_ff; +extern cpuop_func_noret op_42f9_24_nf; +extern cpuop_func_noret op_42f9_24_ff; +extern cpuop_func_noret op_4400_24_nf; +extern cpuop_func_noret op_4400_24_ff; +extern cpuop_func_noret op_4410_24_nf; +extern cpuop_func_noret op_4410_24_ff; +extern cpuop_func_noret op_4418_24_nf; +extern cpuop_func_noret op_4418_24_ff; +extern cpuop_func_noret op_4420_24_nf; +extern cpuop_func_noret op_4420_24_ff; +extern cpuop_func_noret op_4428_24_nf; +extern cpuop_func_noret op_4428_24_ff; +extern cpuop_func_noret op_4430_24_nf; +extern cpuop_func_noret op_4430_24_ff; +extern cpuop_func_noret op_4438_24_nf; +extern cpuop_func_noret op_4438_24_ff; +extern cpuop_func_noret op_4439_24_nf; +extern cpuop_func_noret op_4439_24_ff; +extern cpuop_func_noret op_4440_24_nf; +extern cpuop_func_noret op_4440_24_ff; +extern cpuop_func_noret op_4450_24_nf; +extern cpuop_func_noret op_4450_24_ff; +extern cpuop_func_noret op_4458_24_nf; +extern cpuop_func_noret op_4458_24_ff; +extern cpuop_func_noret op_4460_24_nf; +extern cpuop_func_noret op_4460_24_ff; +extern cpuop_func_noret op_4468_24_nf; +extern cpuop_func_noret op_4468_24_ff; +extern cpuop_func_noret op_4470_24_nf; +extern cpuop_func_noret op_4470_24_ff; +extern cpuop_func_noret op_4478_24_nf; +extern cpuop_func_noret op_4478_24_ff; +extern cpuop_func_noret op_4479_24_nf; +extern cpuop_func_noret op_4479_24_ff; +extern cpuop_func_noret op_4480_24_nf; +extern cpuop_func_noret op_4480_24_ff; +extern cpuop_func_noret op_4490_24_nf; +extern cpuop_func_noret op_4490_24_ff; +extern cpuop_func_noret op_4498_24_nf; +extern cpuop_func_noret op_4498_24_ff; +extern cpuop_func_noret op_44a0_24_nf; +extern cpuop_func_noret op_44a0_24_ff; +extern cpuop_func_noret op_44a8_24_nf; +extern cpuop_func_noret op_44a8_24_ff; +extern cpuop_func_noret op_44b0_24_nf; +extern cpuop_func_noret op_44b0_24_ff; +extern cpuop_func_noret op_44b8_24_nf; +extern cpuop_func_noret op_44b8_24_ff; +extern cpuop_func_noret op_44b9_24_nf; +extern cpuop_func_noret op_44b9_24_ff; +extern cpuop_func_noret op_44c0_24_nf; +extern cpuop_func_noret op_44c0_24_ff; +extern cpuop_func_noret op_44d0_24_nf; +extern cpuop_func_noret op_44d0_24_ff; +extern cpuop_func_noret op_44d8_24_nf; +extern cpuop_func_noret op_44d8_24_ff; +extern cpuop_func_noret op_44e0_24_nf; +extern cpuop_func_noret op_44e0_24_ff; +extern cpuop_func_noret op_44e8_24_nf; +extern cpuop_func_noret op_44e8_24_ff; +extern cpuop_func_noret op_44f0_24_nf; +extern cpuop_func_noret op_44f0_24_ff; +extern cpuop_func_noret op_44f8_24_nf; +extern cpuop_func_noret op_44f8_24_ff; +extern cpuop_func_noret op_44f9_24_nf; +extern cpuop_func_noret op_44f9_24_ff; +extern cpuop_func_noret op_44fa_24_nf; +extern cpuop_func_noret op_44fa_24_ff; +extern cpuop_func_noret op_44fb_24_nf; +extern cpuop_func_noret op_44fb_24_ff; +extern cpuop_func_noret op_44fc_24_nf; +extern cpuop_func_noret op_44fc_24_ff; +extern cpuop_func_noret op_4600_24_nf; +extern cpuop_func_noret op_4600_24_ff; +extern cpuop_func_noret op_4610_24_nf; +extern cpuop_func_noret op_4610_24_ff; +extern cpuop_func_noret op_4618_24_nf; +extern cpuop_func_noret op_4618_24_ff; +extern cpuop_func_noret op_4620_24_nf; +extern cpuop_func_noret op_4620_24_ff; +extern cpuop_func_noret op_4628_24_nf; +extern cpuop_func_noret op_4628_24_ff; +extern cpuop_func_noret op_4630_24_nf; +extern cpuop_func_noret op_4630_24_ff; +extern cpuop_func_noret op_4638_24_nf; +extern cpuop_func_noret op_4638_24_ff; +extern cpuop_func_noret op_4639_24_nf; +extern cpuop_func_noret op_4639_24_ff; +extern cpuop_func_noret op_4640_24_nf; +extern cpuop_func_noret op_4640_24_ff; +extern cpuop_func_noret op_4650_24_nf; +extern cpuop_func_noret op_4650_24_ff; +extern cpuop_func_noret op_4658_24_nf; +extern cpuop_func_noret op_4658_24_ff; +extern cpuop_func_noret op_4660_24_nf; +extern cpuop_func_noret op_4660_24_ff; +extern cpuop_func_noret op_4668_24_nf; +extern cpuop_func_noret op_4668_24_ff; +extern cpuop_func_noret op_4670_24_nf; +extern cpuop_func_noret op_4670_24_ff; +extern cpuop_func_noret op_4678_24_nf; +extern cpuop_func_noret op_4678_24_ff; +extern cpuop_func_noret op_4679_24_nf; +extern cpuop_func_noret op_4679_24_ff; +extern cpuop_func_noret op_4680_24_nf; +extern cpuop_func_noret op_4680_24_ff; +extern cpuop_func_noret op_4690_24_nf; +extern cpuop_func_noret op_4690_24_ff; +extern cpuop_func_noret op_4698_24_nf; +extern cpuop_func_noret op_4698_24_ff; +extern cpuop_func_noret op_46a0_24_nf; +extern cpuop_func_noret op_46a0_24_ff; +extern cpuop_func_noret op_46a8_24_nf; +extern cpuop_func_noret op_46a8_24_ff; +extern cpuop_func_noret op_46b0_24_nf; +extern cpuop_func_noret op_46b0_24_ff; +extern cpuop_func_noret op_46b8_24_nf; +extern cpuop_func_noret op_46b8_24_ff; +extern cpuop_func_noret op_46b9_24_nf; +extern cpuop_func_noret op_46b9_24_ff; +extern cpuop_func_noret op_46c0_24_nf; +extern cpuop_func_noret op_46c0_24_ff; +extern cpuop_func_noret op_46d0_24_nf; +extern cpuop_func_noret op_46d0_24_ff; +extern cpuop_func_noret op_46d8_24_nf; +extern cpuop_func_noret op_46d8_24_ff; +extern cpuop_func_noret op_46e0_24_nf; +extern cpuop_func_noret op_46e0_24_ff; +extern cpuop_func_noret op_46e8_24_nf; +extern cpuop_func_noret op_46e8_24_ff; +extern cpuop_func_noret op_46f0_24_nf; +extern cpuop_func_noret op_46f0_24_ff; +extern cpuop_func_noret op_46f8_24_nf; +extern cpuop_func_noret op_46f8_24_ff; +extern cpuop_func_noret op_46f9_24_nf; +extern cpuop_func_noret op_46f9_24_ff; +extern cpuop_func_noret op_46fa_24_nf; +extern cpuop_func_noret op_46fa_24_ff; +extern cpuop_func_noret op_46fb_24_nf; +extern cpuop_func_noret op_46fb_24_ff; +extern cpuop_func_noret op_46fc_24_nf; +extern cpuop_func_noret op_46fc_24_ff; +extern cpuop_func_noret op_4800_24_nf; +extern cpuop_func_noret op_4800_24_ff; +extern cpuop_func_noret op_4808_24_nf; +extern cpuop_func_noret op_4808_24_ff; +extern cpuop_func_noret op_4810_24_nf; +extern cpuop_func_noret op_4810_24_ff; +extern cpuop_func_noret op_4818_24_nf; +extern cpuop_func_noret op_4818_24_ff; +extern cpuop_func_noret op_4820_24_nf; +extern cpuop_func_noret op_4820_24_ff; +extern cpuop_func_noret op_4828_24_nf; +extern cpuop_func_noret op_4828_24_ff; +extern cpuop_func_noret op_4830_24_nf; +extern cpuop_func_noret op_4830_24_ff; +extern cpuop_func_noret op_4838_24_nf; +extern cpuop_func_noret op_4838_24_ff; +extern cpuop_func_noret op_4839_24_nf; +extern cpuop_func_noret op_4839_24_ff; +extern cpuop_func_noret op_4840_24_nf; +extern cpuop_func_noret op_4840_24_ff; +extern cpuop_func_noret op_4848_24_nf; +extern cpuop_func_noret op_4848_24_ff; +extern cpuop_func_noret op_4850_24_nf; +extern cpuop_func_noret op_4850_24_ff; +extern cpuop_func_noret op_4868_24_nf; +extern cpuop_func_noret op_4868_24_ff; +extern cpuop_func_noret op_4870_24_nf; +extern cpuop_func_noret op_4870_24_ff; +extern cpuop_func_noret op_4878_24_nf; +extern cpuop_func_noret op_4878_24_ff; +extern cpuop_func_noret op_4879_24_nf; +extern cpuop_func_noret op_4879_24_ff; +extern cpuop_func_noret op_487a_24_nf; +extern cpuop_func_noret op_487a_24_ff; +extern cpuop_func_noret op_487b_24_nf; +extern cpuop_func_noret op_487b_24_ff; +extern cpuop_func_noret op_4880_24_nf; +extern cpuop_func_noret op_4880_24_ff; +extern cpuop_func_noret op_4890_24_nf; +extern cpuop_func_noret op_4890_24_ff; +extern cpuop_func_noret op_48a0_24_nf; +extern cpuop_func_noret op_48a0_24_ff; +extern cpuop_func_noret op_48a8_24_nf; +extern cpuop_func_noret op_48a8_24_ff; +extern cpuop_func_noret op_48b0_24_nf; +extern cpuop_func_noret op_48b0_24_ff; +extern cpuop_func_noret op_48b8_24_nf; +extern cpuop_func_noret op_48b8_24_ff; +extern cpuop_func_noret op_48b9_24_nf; +extern cpuop_func_noret op_48b9_24_ff; +extern cpuop_func_noret op_48c0_24_nf; +extern cpuop_func_noret op_48c0_24_ff; +extern cpuop_func_noret op_48d0_24_nf; +extern cpuop_func_noret op_48d0_24_ff; +extern cpuop_func_noret op_48e0_24_nf; +extern cpuop_func_noret op_48e0_24_ff; +extern cpuop_func_noret op_48e8_24_nf; +extern cpuop_func_noret op_48e8_24_ff; +extern cpuop_func_noret op_48f0_24_nf; +extern cpuop_func_noret op_48f0_24_ff; +extern cpuop_func_noret op_48f8_24_nf; +extern cpuop_func_noret op_48f8_24_ff; +extern cpuop_func_noret op_48f9_24_nf; +extern cpuop_func_noret op_48f9_24_ff; +extern cpuop_func_noret op_49c0_24_nf; +extern cpuop_func_noret op_49c0_24_ff; +extern cpuop_func_noret op_4a00_24_nf; +extern cpuop_func_noret op_4a00_24_ff; +extern cpuop_func_noret op_4a10_24_nf; +extern cpuop_func_noret op_4a10_24_ff; +extern cpuop_func_noret op_4a18_24_nf; +extern cpuop_func_noret op_4a18_24_ff; +extern cpuop_func_noret op_4a20_24_nf; +extern cpuop_func_noret op_4a20_24_ff; +extern cpuop_func_noret op_4a28_24_nf; +extern cpuop_func_noret op_4a28_24_ff; +extern cpuop_func_noret op_4a30_24_nf; +extern cpuop_func_noret op_4a30_24_ff; +extern cpuop_func_noret op_4a38_24_nf; +extern cpuop_func_noret op_4a38_24_ff; +extern cpuop_func_noret op_4a39_24_nf; +extern cpuop_func_noret op_4a39_24_ff; +extern cpuop_func_noret op_4a3a_24_nf; +extern cpuop_func_noret op_4a3a_24_ff; +extern cpuop_func_noret op_4a3b_24_nf; +extern cpuop_func_noret op_4a3b_24_ff; +extern cpuop_func_noret op_4a3c_24_nf; +extern cpuop_func_noret op_4a3c_24_ff; +extern cpuop_func_noret op_4a40_24_nf; +extern cpuop_func_noret op_4a40_24_ff; +extern cpuop_func_noret op_4a48_24_nf; +extern cpuop_func_noret op_4a48_24_ff; +extern cpuop_func_noret op_4a50_24_nf; +extern cpuop_func_noret op_4a50_24_ff; +extern cpuop_func_noret op_4a58_24_nf; +extern cpuop_func_noret op_4a58_24_ff; +extern cpuop_func_noret op_4a60_24_nf; +extern cpuop_func_noret op_4a60_24_ff; +extern cpuop_func_noret op_4a68_24_nf; +extern cpuop_func_noret op_4a68_24_ff; +extern cpuop_func_noret op_4a70_24_nf; +extern cpuop_func_noret op_4a70_24_ff; +extern cpuop_func_noret op_4a78_24_nf; +extern cpuop_func_noret op_4a78_24_ff; +extern cpuop_func_noret op_4a79_24_nf; +extern cpuop_func_noret op_4a79_24_ff; +extern cpuop_func_noret op_4a7a_24_nf; +extern cpuop_func_noret op_4a7a_24_ff; +extern cpuop_func_noret op_4a7b_24_nf; +extern cpuop_func_noret op_4a7b_24_ff; +extern cpuop_func_noret op_4a7c_24_nf; +extern cpuop_func_noret op_4a7c_24_ff; +extern cpuop_func_noret op_4a80_24_nf; +extern cpuop_func_noret op_4a80_24_ff; +extern cpuop_func_noret op_4a88_24_nf; +extern cpuop_func_noret op_4a88_24_ff; +extern cpuop_func_noret op_4a90_24_nf; +extern cpuop_func_noret op_4a90_24_ff; +extern cpuop_func_noret op_4a98_24_nf; +extern cpuop_func_noret op_4a98_24_ff; +extern cpuop_func_noret op_4aa0_24_nf; +extern cpuop_func_noret op_4aa0_24_ff; +extern cpuop_func_noret op_4aa8_24_nf; +extern cpuop_func_noret op_4aa8_24_ff; +extern cpuop_func_noret op_4ab0_24_nf; +extern cpuop_func_noret op_4ab0_24_ff; +extern cpuop_func_noret op_4ab8_24_nf; +extern cpuop_func_noret op_4ab8_24_ff; +extern cpuop_func_noret op_4ab9_24_nf; +extern cpuop_func_noret op_4ab9_24_ff; +extern cpuop_func_noret op_4aba_24_nf; +extern cpuop_func_noret op_4aba_24_ff; +extern cpuop_func_noret op_4abb_24_nf; +extern cpuop_func_noret op_4abb_24_ff; +extern cpuop_func_noret op_4abc_24_nf; +extern cpuop_func_noret op_4abc_24_ff; +extern cpuop_func_noret op_4ac0_24_nf; +extern cpuop_func_noret op_4ac0_24_ff; +extern cpuop_func_noret op_4ac8_24_nf; +extern cpuop_func_noret op_4ac8_24_ff; +extern cpuop_func_noret op_4acc_24_nf; +extern cpuop_func_noret op_4acc_24_ff; +extern cpuop_func_noret op_4ad0_24_nf; +extern cpuop_func_noret op_4ad0_24_ff; +extern cpuop_func_noret op_4ad8_24_nf; +extern cpuop_func_noret op_4ad8_24_ff; +extern cpuop_func_noret op_4ae0_24_nf; +extern cpuop_func_noret op_4ae0_24_ff; +extern cpuop_func_noret op_4ae8_24_nf; +extern cpuop_func_noret op_4ae8_24_ff; +extern cpuop_func_noret op_4af0_24_nf; +extern cpuop_func_noret op_4af0_24_ff; +extern cpuop_func_noret op_4af8_24_nf; +extern cpuop_func_noret op_4af8_24_ff; +extern cpuop_func_noret op_4af9_24_nf; +extern cpuop_func_noret op_4af9_24_ff; +extern cpuop_func_noret op_4c00_24_nf; +extern cpuop_func_noret op_4c00_24_ff; +extern cpuop_func_noret op_4c10_24_nf; +extern cpuop_func_noret op_4c10_24_ff; +extern cpuop_func_noret op_4c18_24_nf; +extern cpuop_func_noret op_4c18_24_ff; +extern cpuop_func_noret op_4c20_24_nf; +extern cpuop_func_noret op_4c20_24_ff; +extern cpuop_func_noret op_4c28_24_nf; +extern cpuop_func_noret op_4c28_24_ff; +extern cpuop_func_noret op_4c30_24_nf; +extern cpuop_func_noret op_4c30_24_ff; +extern cpuop_func_noret op_4c38_24_nf; +extern cpuop_func_noret op_4c38_24_ff; +extern cpuop_func_noret op_4c39_24_nf; +extern cpuop_func_noret op_4c39_24_ff; +extern cpuop_func_noret op_4c3a_24_nf; +extern cpuop_func_noret op_4c3a_24_ff; +extern cpuop_func_noret op_4c3b_24_nf; +extern cpuop_func_noret op_4c3b_24_ff; +extern cpuop_func_noret op_4c3c_24_nf; +extern cpuop_func_noret op_4c3c_24_ff; +extern cpuop_func_noret op_4c40_24_nf; +extern cpuop_func_noret op_4c40_24_ff; +extern cpuop_func_noret op_4c50_24_nf; +extern cpuop_func_noret op_4c50_24_ff; +extern cpuop_func_noret op_4c58_24_nf; +extern cpuop_func_noret op_4c58_24_ff; +extern cpuop_func_noret op_4c60_24_nf; +extern cpuop_func_noret op_4c60_24_ff; +extern cpuop_func_noret op_4c68_24_nf; +extern cpuop_func_noret op_4c68_24_ff; +extern cpuop_func_noret op_4c70_24_nf; +extern cpuop_func_noret op_4c70_24_ff; +extern cpuop_func_noret op_4c78_24_nf; +extern cpuop_func_noret op_4c78_24_ff; +extern cpuop_func_noret op_4c79_24_nf; +extern cpuop_func_noret op_4c79_24_ff; +extern cpuop_func_noret op_4c7a_24_nf; +extern cpuop_func_noret op_4c7a_24_ff; +extern cpuop_func_noret op_4c7b_24_nf; +extern cpuop_func_noret op_4c7b_24_ff; +extern cpuop_func_noret op_4c7c_24_nf; +extern cpuop_func_noret op_4c7c_24_ff; +extern cpuop_func_noret op_4c90_24_nf; +extern cpuop_func_noret op_4c90_24_ff; +extern cpuop_func_noret op_4c98_24_nf; +extern cpuop_func_noret op_4c98_24_ff; +extern cpuop_func_noret op_4ca8_24_nf; +extern cpuop_func_noret op_4ca8_24_ff; +extern cpuop_func_noret op_4cb0_24_nf; +extern cpuop_func_noret op_4cb0_24_ff; +extern cpuop_func_noret op_4cb8_24_nf; +extern cpuop_func_noret op_4cb8_24_ff; +extern cpuop_func_noret op_4cb9_24_nf; +extern cpuop_func_noret op_4cb9_24_ff; +extern cpuop_func_noret op_4cba_24_nf; +extern cpuop_func_noret op_4cba_24_ff; +extern cpuop_func_noret op_4cbb_24_nf; +extern cpuop_func_noret op_4cbb_24_ff; +extern cpuop_func_noret op_4cd0_24_nf; +extern cpuop_func_noret op_4cd0_24_ff; +extern cpuop_func_noret op_4cd8_24_nf; +extern cpuop_func_noret op_4cd8_24_ff; +extern cpuop_func_noret op_4ce8_24_nf; +extern cpuop_func_noret op_4ce8_24_ff; +extern cpuop_func_noret op_4cf0_24_nf; +extern cpuop_func_noret op_4cf0_24_ff; +extern cpuop_func_noret op_4cf8_24_nf; +extern cpuop_func_noret op_4cf8_24_ff; +extern cpuop_func_noret op_4cf9_24_nf; +extern cpuop_func_noret op_4cf9_24_ff; +extern cpuop_func_noret op_4cfa_24_nf; +extern cpuop_func_noret op_4cfa_24_ff; +extern cpuop_func_noret op_4cfb_24_nf; +extern cpuop_func_noret op_4cfb_24_ff; +extern cpuop_func_noret op_4e40_24_nf; +extern cpuop_func_noret op_4e40_24_ff; +extern cpuop_func_noret op_4e50_24_nf; +extern cpuop_func_noret op_4e50_24_ff; +extern cpuop_func_noret op_4e58_24_nf; +extern cpuop_func_noret op_4e58_24_ff; +extern cpuop_func_noret op_4e60_24_nf; +extern cpuop_func_noret op_4e60_24_ff; +extern cpuop_func_noret op_4e68_24_nf; +extern cpuop_func_noret op_4e68_24_ff; +extern cpuop_func_noret op_4e70_24_nf; +extern cpuop_func_noret op_4e70_24_ff; +extern cpuop_func_noret op_4e71_24_nf; +extern cpuop_func_noret op_4e71_24_ff; +extern cpuop_func_noret op_4e72_24_nf; +extern cpuop_func_noret op_4e72_24_ff; +extern cpuop_func_noret op_4e73_24_nf; +extern cpuop_func_noret op_4e73_24_ff; +extern cpuop_func_noret op_4e74_24_nf; +extern cpuop_func_noret op_4e74_24_ff; +extern cpuop_func_noret op_4e75_24_nf; +extern cpuop_func_noret op_4e75_24_ff; +extern cpuop_func_noret op_4e76_24_nf; +extern cpuop_func_noret op_4e76_24_ff; +extern cpuop_func_noret op_4e77_24_nf; +extern cpuop_func_noret op_4e77_24_ff; +extern cpuop_func_noret op_4e7a_24_nf; +extern cpuop_func_noret op_4e7a_24_ff; +extern cpuop_func_noret op_4e7b_24_nf; +extern cpuop_func_noret op_4e7b_24_ff; +extern cpuop_func_noret op_4e90_24_nf; +extern cpuop_func_noret op_4e90_24_ff; +extern cpuop_func_noret op_4ea8_24_nf; +extern cpuop_func_noret op_4ea8_24_ff; +extern cpuop_func_noret op_4eb0_24_nf; +extern cpuop_func_noret op_4eb0_24_ff; +extern cpuop_func_noret op_4eb8_24_nf; +extern cpuop_func_noret op_4eb8_24_ff; +extern cpuop_func_noret op_4eb9_24_nf; +extern cpuop_func_noret op_4eb9_24_ff; +extern cpuop_func_noret op_4eba_24_nf; +extern cpuop_func_noret op_4eba_24_ff; +extern cpuop_func_noret op_4ebb_24_nf; +extern cpuop_func_noret op_4ebb_24_ff; +extern cpuop_func_noret op_4ed0_24_nf; +extern cpuop_func_noret op_4ed0_24_ff; +extern cpuop_func_noret op_4ee8_24_nf; +extern cpuop_func_noret op_4ee8_24_ff; +extern cpuop_func_noret op_4ef0_24_nf; +extern cpuop_func_noret op_4ef0_24_ff; +extern cpuop_func_noret op_4ef8_24_nf; +extern cpuop_func_noret op_4ef8_24_ff; +extern cpuop_func_noret op_4ef9_24_nf; +extern cpuop_func_noret op_4ef9_24_ff; +extern cpuop_func_noret op_4efa_24_nf; +extern cpuop_func_noret op_4efa_24_ff; +extern cpuop_func_noret op_4efb_24_nf; +extern cpuop_func_noret op_4efb_24_ff; +extern cpuop_func_noret op_5000_24_nf; +extern cpuop_func_noret op_5000_24_ff; +extern cpuop_func_noret op_5010_24_nf; +extern cpuop_func_noret op_5010_24_ff; +extern cpuop_func_noret op_5018_24_nf; +extern cpuop_func_noret op_5018_24_ff; +extern cpuop_func_noret op_5020_24_nf; +extern cpuop_func_noret op_5020_24_ff; +extern cpuop_func_noret op_5028_24_nf; +extern cpuop_func_noret op_5028_24_ff; +extern cpuop_func_noret op_5030_24_nf; +extern cpuop_func_noret op_5030_24_ff; +extern cpuop_func_noret op_5038_24_nf; +extern cpuop_func_noret op_5038_24_ff; +extern cpuop_func_noret op_5039_24_nf; +extern cpuop_func_noret op_5039_24_ff; +extern cpuop_func_noret op_5040_24_nf; +extern cpuop_func_noret op_5040_24_ff; +extern cpuop_func_noret op_5048_24_nf; +extern cpuop_func_noret op_5048_24_ff; +extern cpuop_func_noret op_5050_24_nf; +extern cpuop_func_noret op_5050_24_ff; +extern cpuop_func_noret op_5058_24_nf; +extern cpuop_func_noret op_5058_24_ff; +extern cpuop_func_noret op_5060_24_nf; +extern cpuop_func_noret op_5060_24_ff; +extern cpuop_func_noret op_5068_24_nf; +extern cpuop_func_noret op_5068_24_ff; +extern cpuop_func_noret op_5070_24_nf; +extern cpuop_func_noret op_5070_24_ff; +extern cpuop_func_noret op_5078_24_nf; +extern cpuop_func_noret op_5078_24_ff; +extern cpuop_func_noret op_5079_24_nf; +extern cpuop_func_noret op_5079_24_ff; +extern cpuop_func_noret op_5080_24_nf; +extern cpuop_func_noret op_5080_24_ff; +extern cpuop_func_noret op_5088_24_nf; +extern cpuop_func_noret op_5088_24_ff; +extern cpuop_func_noret op_5090_24_nf; +extern cpuop_func_noret op_5090_24_ff; +extern cpuop_func_noret op_5098_24_nf; +extern cpuop_func_noret op_5098_24_ff; +extern cpuop_func_noret op_50a0_24_nf; +extern cpuop_func_noret op_50a0_24_ff; +extern cpuop_func_noret op_50a8_24_nf; +extern cpuop_func_noret op_50a8_24_ff; +extern cpuop_func_noret op_50b0_24_nf; +extern cpuop_func_noret op_50b0_24_ff; +extern cpuop_func_noret op_50b8_24_nf; +extern cpuop_func_noret op_50b8_24_ff; +extern cpuop_func_noret op_50b9_24_nf; +extern cpuop_func_noret op_50b9_24_ff; +extern cpuop_func_noret op_50c0_24_nf; +extern cpuop_func_noret op_50c0_24_ff; +extern cpuop_func_noret op_50c8_24_nf; +extern cpuop_func_noret op_50c8_24_ff; +extern cpuop_func_noret op_50d0_24_nf; +extern cpuop_func_noret op_50d0_24_ff; +extern cpuop_func_noret op_50d8_24_nf; +extern cpuop_func_noret op_50d8_24_ff; +extern cpuop_func_noret op_50e0_24_nf; +extern cpuop_func_noret op_50e0_24_ff; +extern cpuop_func_noret op_50e8_24_nf; +extern cpuop_func_noret op_50e8_24_ff; +extern cpuop_func_noret op_50f0_24_nf; +extern cpuop_func_noret op_50f0_24_ff; +extern cpuop_func_noret op_50f8_24_nf; +extern cpuop_func_noret op_50f8_24_ff; +extern cpuop_func_noret op_50f9_24_nf; +extern cpuop_func_noret op_50f9_24_ff; +extern cpuop_func_noret op_50fa_24_nf; +extern cpuop_func_noret op_50fa_24_ff; +extern cpuop_func_noret op_50fb_24_nf; +extern cpuop_func_noret op_50fb_24_ff; +extern cpuop_func_noret op_50fc_24_nf; +extern cpuop_func_noret op_50fc_24_ff; +extern cpuop_func_noret op_5100_24_nf; +extern cpuop_func_noret op_5100_24_ff; +extern cpuop_func_noret op_5110_24_nf; +extern cpuop_func_noret op_5110_24_ff; +extern cpuop_func_noret op_5118_24_nf; +extern cpuop_func_noret op_5118_24_ff; +extern cpuop_func_noret op_5120_24_nf; +extern cpuop_func_noret op_5120_24_ff; +extern cpuop_func_noret op_5128_24_nf; +extern cpuop_func_noret op_5128_24_ff; +extern cpuop_func_noret op_5130_24_nf; +extern cpuop_func_noret op_5130_24_ff; +extern cpuop_func_noret op_5138_24_nf; +extern cpuop_func_noret op_5138_24_ff; +extern cpuop_func_noret op_5139_24_nf; +extern cpuop_func_noret op_5139_24_ff; +extern cpuop_func_noret op_5140_24_nf; +extern cpuop_func_noret op_5140_24_ff; +extern cpuop_func_noret op_5148_24_nf; +extern cpuop_func_noret op_5148_24_ff; +extern cpuop_func_noret op_5150_24_nf; +extern cpuop_func_noret op_5150_24_ff; +extern cpuop_func_noret op_5158_24_nf; +extern cpuop_func_noret op_5158_24_ff; +extern cpuop_func_noret op_5160_24_nf; +extern cpuop_func_noret op_5160_24_ff; +extern cpuop_func_noret op_5168_24_nf; +extern cpuop_func_noret op_5168_24_ff; +extern cpuop_func_noret op_5170_24_nf; +extern cpuop_func_noret op_5170_24_ff; +extern cpuop_func_noret op_5178_24_nf; +extern cpuop_func_noret op_5178_24_ff; +extern cpuop_func_noret op_5179_24_nf; +extern cpuop_func_noret op_5179_24_ff; +extern cpuop_func_noret op_5180_24_nf; +extern cpuop_func_noret op_5180_24_ff; +extern cpuop_func_noret op_5188_24_nf; +extern cpuop_func_noret op_5188_24_ff; +extern cpuop_func_noret op_5190_24_nf; +extern cpuop_func_noret op_5190_24_ff; +extern cpuop_func_noret op_5198_24_nf; +extern cpuop_func_noret op_5198_24_ff; +extern cpuop_func_noret op_51a0_24_nf; +extern cpuop_func_noret op_51a0_24_ff; +extern cpuop_func_noret op_51a8_24_nf; +extern cpuop_func_noret op_51a8_24_ff; +extern cpuop_func_noret op_51b0_24_nf; +extern cpuop_func_noret op_51b0_24_ff; +extern cpuop_func_noret op_51b8_24_nf; +extern cpuop_func_noret op_51b8_24_ff; +extern cpuop_func_noret op_51b9_24_nf; +extern cpuop_func_noret op_51b9_24_ff; +extern cpuop_func_noret op_51c0_24_nf; +extern cpuop_func_noret op_51c0_24_ff; +extern cpuop_func_noret op_51c8_24_nf; +extern cpuop_func_noret op_51c8_24_ff; +extern cpuop_func_noret op_51d0_24_nf; +extern cpuop_func_noret op_51d0_24_ff; +extern cpuop_func_noret op_51d8_24_nf; +extern cpuop_func_noret op_51d8_24_ff; +extern cpuop_func_noret op_51e0_24_nf; +extern cpuop_func_noret op_51e0_24_ff; +extern cpuop_func_noret op_51e8_24_nf; +extern cpuop_func_noret op_51e8_24_ff; +extern cpuop_func_noret op_51f0_24_nf; +extern cpuop_func_noret op_51f0_24_ff; +extern cpuop_func_noret op_51f8_24_nf; +extern cpuop_func_noret op_51f8_24_ff; +extern cpuop_func_noret op_51f9_24_nf; +extern cpuop_func_noret op_51f9_24_ff; +extern cpuop_func_noret op_51fa_24_nf; +extern cpuop_func_noret op_51fa_24_ff; +extern cpuop_func_noret op_51fb_24_nf; +extern cpuop_func_noret op_51fb_24_ff; +extern cpuop_func_noret op_51fc_24_nf; +extern cpuop_func_noret op_51fc_24_ff; +extern cpuop_func_noret op_52c0_24_nf; +extern cpuop_func_noret op_52c0_24_ff; +extern cpuop_func_noret op_52c8_24_nf; +extern cpuop_func_noret op_52c8_24_ff; +extern cpuop_func_noret op_52d0_24_nf; +extern cpuop_func_noret op_52d0_24_ff; +extern cpuop_func_noret op_52d8_24_nf; +extern cpuop_func_noret op_52d8_24_ff; +extern cpuop_func_noret op_52e0_24_nf; +extern cpuop_func_noret op_52e0_24_ff; +extern cpuop_func_noret op_52e8_24_nf; +extern cpuop_func_noret op_52e8_24_ff; +extern cpuop_func_noret op_52f0_24_nf; +extern cpuop_func_noret op_52f0_24_ff; +extern cpuop_func_noret op_52f8_24_nf; +extern cpuop_func_noret op_52f8_24_ff; +extern cpuop_func_noret op_52f9_24_nf; +extern cpuop_func_noret op_52f9_24_ff; +extern cpuop_func_noret op_52fa_24_nf; +extern cpuop_func_noret op_52fa_24_ff; +extern cpuop_func_noret op_52fb_24_nf; +extern cpuop_func_noret op_52fb_24_ff; +extern cpuop_func_noret op_52fc_24_nf; +extern cpuop_func_noret op_52fc_24_ff; +extern cpuop_func_noret op_53c0_24_nf; +extern cpuop_func_noret op_53c0_24_ff; +extern cpuop_func_noret op_53c8_24_nf; +extern cpuop_func_noret op_53c8_24_ff; +extern cpuop_func_noret op_53d0_24_nf; +extern cpuop_func_noret op_53d0_24_ff; +extern cpuop_func_noret op_53d8_24_nf; +extern cpuop_func_noret op_53d8_24_ff; +extern cpuop_func_noret op_53e0_24_nf; +extern cpuop_func_noret op_53e0_24_ff; +extern cpuop_func_noret op_53e8_24_nf; +extern cpuop_func_noret op_53e8_24_ff; +extern cpuop_func_noret op_53f0_24_nf; +extern cpuop_func_noret op_53f0_24_ff; +extern cpuop_func_noret op_53f8_24_nf; +extern cpuop_func_noret op_53f8_24_ff; +extern cpuop_func_noret op_53f9_24_nf; +extern cpuop_func_noret op_53f9_24_ff; +extern cpuop_func_noret op_53fa_24_nf; +extern cpuop_func_noret op_53fa_24_ff; +extern cpuop_func_noret op_53fb_24_nf; +extern cpuop_func_noret op_53fb_24_ff; +extern cpuop_func_noret op_53fc_24_nf; +extern cpuop_func_noret op_53fc_24_ff; +extern cpuop_func_noret op_54c0_24_nf; +extern cpuop_func_noret op_54c0_24_ff; +extern cpuop_func_noret op_54c8_24_nf; +extern cpuop_func_noret op_54c8_24_ff; +extern cpuop_func_noret op_54d0_24_nf; +extern cpuop_func_noret op_54d0_24_ff; +extern cpuop_func_noret op_54d8_24_nf; +extern cpuop_func_noret op_54d8_24_ff; +extern cpuop_func_noret op_54e0_24_nf; +extern cpuop_func_noret op_54e0_24_ff; +extern cpuop_func_noret op_54e8_24_nf; +extern cpuop_func_noret op_54e8_24_ff; +extern cpuop_func_noret op_54f0_24_nf; +extern cpuop_func_noret op_54f0_24_ff; +extern cpuop_func_noret op_54f8_24_nf; +extern cpuop_func_noret op_54f8_24_ff; +extern cpuop_func_noret op_54f9_24_nf; +extern cpuop_func_noret op_54f9_24_ff; +extern cpuop_func_noret op_54fa_24_nf; +extern cpuop_func_noret op_54fa_24_ff; +extern cpuop_func_noret op_54fb_24_nf; +extern cpuop_func_noret op_54fb_24_ff; +extern cpuop_func_noret op_54fc_24_nf; +extern cpuop_func_noret op_54fc_24_ff; +extern cpuop_func_noret op_55c0_24_nf; +extern cpuop_func_noret op_55c0_24_ff; +extern cpuop_func_noret op_55c8_24_nf; +extern cpuop_func_noret op_55c8_24_ff; +extern cpuop_func_noret op_55d0_24_nf; +extern cpuop_func_noret op_55d0_24_ff; +extern cpuop_func_noret op_55d8_24_nf; +extern cpuop_func_noret op_55d8_24_ff; +extern cpuop_func_noret op_55e0_24_nf; +extern cpuop_func_noret op_55e0_24_ff; +extern cpuop_func_noret op_55e8_24_nf; +extern cpuop_func_noret op_55e8_24_ff; +extern cpuop_func_noret op_55f0_24_nf; +extern cpuop_func_noret op_55f0_24_ff; +extern cpuop_func_noret op_55f8_24_nf; +extern cpuop_func_noret op_55f8_24_ff; +extern cpuop_func_noret op_55f9_24_nf; +extern cpuop_func_noret op_55f9_24_ff; +extern cpuop_func_noret op_55fa_24_nf; +extern cpuop_func_noret op_55fa_24_ff; +extern cpuop_func_noret op_55fb_24_nf; +extern cpuop_func_noret op_55fb_24_ff; +extern cpuop_func_noret op_55fc_24_nf; +extern cpuop_func_noret op_55fc_24_ff; +extern cpuop_func_noret op_56c0_24_nf; +extern cpuop_func_noret op_56c0_24_ff; +extern cpuop_func_noret op_56c8_24_nf; +extern cpuop_func_noret op_56c8_24_ff; +extern cpuop_func_noret op_56d0_24_nf; +extern cpuop_func_noret op_56d0_24_ff; +extern cpuop_func_noret op_56d8_24_nf; +extern cpuop_func_noret op_56d8_24_ff; +extern cpuop_func_noret op_56e0_24_nf; +extern cpuop_func_noret op_56e0_24_ff; +extern cpuop_func_noret op_56e8_24_nf; +extern cpuop_func_noret op_56e8_24_ff; +extern cpuop_func_noret op_56f0_24_nf; +extern cpuop_func_noret op_56f0_24_ff; +extern cpuop_func_noret op_56f8_24_nf; +extern cpuop_func_noret op_56f8_24_ff; +extern cpuop_func_noret op_56f9_24_nf; +extern cpuop_func_noret op_56f9_24_ff; +extern cpuop_func_noret op_56fa_24_nf; +extern cpuop_func_noret op_56fa_24_ff; +extern cpuop_func_noret op_56fb_24_nf; +extern cpuop_func_noret op_56fb_24_ff; +extern cpuop_func_noret op_56fc_24_nf; +extern cpuop_func_noret op_56fc_24_ff; +extern cpuop_func_noret op_57c0_24_nf; +extern cpuop_func_noret op_57c0_24_ff; +extern cpuop_func_noret op_57c8_24_nf; +extern cpuop_func_noret op_57c8_24_ff; +extern cpuop_func_noret op_57d0_24_nf; +extern cpuop_func_noret op_57d0_24_ff; +extern cpuop_func_noret op_57d8_24_nf; +extern cpuop_func_noret op_57d8_24_ff; +extern cpuop_func_noret op_57e0_24_nf; +extern cpuop_func_noret op_57e0_24_ff; +extern cpuop_func_noret op_57e8_24_nf; +extern cpuop_func_noret op_57e8_24_ff; +extern cpuop_func_noret op_57f0_24_nf; +extern cpuop_func_noret op_57f0_24_ff; +extern cpuop_func_noret op_57f8_24_nf; +extern cpuop_func_noret op_57f8_24_ff; +extern cpuop_func_noret op_57f9_24_nf; +extern cpuop_func_noret op_57f9_24_ff; +extern cpuop_func_noret op_57fa_24_nf; +extern cpuop_func_noret op_57fa_24_ff; +extern cpuop_func_noret op_57fb_24_nf; +extern cpuop_func_noret op_57fb_24_ff; +extern cpuop_func_noret op_57fc_24_nf; +extern cpuop_func_noret op_57fc_24_ff; +extern cpuop_func_noret op_58c0_24_nf; +extern cpuop_func_noret op_58c0_24_ff; +extern cpuop_func_noret op_58c8_24_nf; +extern cpuop_func_noret op_58c8_24_ff; +extern cpuop_func_noret op_58d0_24_nf; +extern cpuop_func_noret op_58d0_24_ff; +extern cpuop_func_noret op_58d8_24_nf; +extern cpuop_func_noret op_58d8_24_ff; +extern cpuop_func_noret op_58e0_24_nf; +extern cpuop_func_noret op_58e0_24_ff; +extern cpuop_func_noret op_58e8_24_nf; +extern cpuop_func_noret op_58e8_24_ff; +extern cpuop_func_noret op_58f0_24_nf; +extern cpuop_func_noret op_58f0_24_ff; +extern cpuop_func_noret op_58f8_24_nf; +extern cpuop_func_noret op_58f8_24_ff; +extern cpuop_func_noret op_58f9_24_nf; +extern cpuop_func_noret op_58f9_24_ff; +extern cpuop_func_noret op_58fa_24_nf; +extern cpuop_func_noret op_58fa_24_ff; +extern cpuop_func_noret op_58fb_24_nf; +extern cpuop_func_noret op_58fb_24_ff; +extern cpuop_func_noret op_58fc_24_nf; +extern cpuop_func_noret op_58fc_24_ff; +extern cpuop_func_noret op_59c0_24_nf; +extern cpuop_func_noret op_59c0_24_ff; +extern cpuop_func_noret op_59c8_24_nf; +extern cpuop_func_noret op_59c8_24_ff; +extern cpuop_func_noret op_59d0_24_nf; +extern cpuop_func_noret op_59d0_24_ff; +extern cpuop_func_noret op_59d8_24_nf; +extern cpuop_func_noret op_59d8_24_ff; +extern cpuop_func_noret op_59e0_24_nf; +extern cpuop_func_noret op_59e0_24_ff; +extern cpuop_func_noret op_59e8_24_nf; +extern cpuop_func_noret op_59e8_24_ff; +extern cpuop_func_noret op_59f0_24_nf; +extern cpuop_func_noret op_59f0_24_ff; +extern cpuop_func_noret op_59f8_24_nf; +extern cpuop_func_noret op_59f8_24_ff; +extern cpuop_func_noret op_59f9_24_nf; +extern cpuop_func_noret op_59f9_24_ff; +extern cpuop_func_noret op_59fa_24_nf; +extern cpuop_func_noret op_59fa_24_ff; +extern cpuop_func_noret op_59fb_24_nf; +extern cpuop_func_noret op_59fb_24_ff; +extern cpuop_func_noret op_59fc_24_nf; +extern cpuop_func_noret op_59fc_24_ff; +extern cpuop_func_noret op_5ac0_24_nf; +extern cpuop_func_noret op_5ac0_24_ff; +extern cpuop_func_noret op_5ac8_24_nf; +extern cpuop_func_noret op_5ac8_24_ff; +extern cpuop_func_noret op_5ad0_24_nf; +extern cpuop_func_noret op_5ad0_24_ff; +extern cpuop_func_noret op_5ad8_24_nf; +extern cpuop_func_noret op_5ad8_24_ff; +extern cpuop_func_noret op_5ae0_24_nf; +extern cpuop_func_noret op_5ae0_24_ff; +extern cpuop_func_noret op_5ae8_24_nf; +extern cpuop_func_noret op_5ae8_24_ff; +extern cpuop_func_noret op_5af0_24_nf; +extern cpuop_func_noret op_5af0_24_ff; +extern cpuop_func_noret op_5af8_24_nf; +extern cpuop_func_noret op_5af8_24_ff; +extern cpuop_func_noret op_5af9_24_nf; +extern cpuop_func_noret op_5af9_24_ff; +extern cpuop_func_noret op_5afa_24_nf; +extern cpuop_func_noret op_5afa_24_ff; +extern cpuop_func_noret op_5afb_24_nf; +extern cpuop_func_noret op_5afb_24_ff; +extern cpuop_func_noret op_5afc_24_nf; +extern cpuop_func_noret op_5afc_24_ff; +extern cpuop_func_noret op_5bc0_24_nf; +extern cpuop_func_noret op_5bc0_24_ff; +extern cpuop_func_noret op_5bc8_24_nf; +extern cpuop_func_noret op_5bc8_24_ff; +extern cpuop_func_noret op_5bd0_24_nf; +extern cpuop_func_noret op_5bd0_24_ff; +extern cpuop_func_noret op_5bd8_24_nf; +extern cpuop_func_noret op_5bd8_24_ff; +extern cpuop_func_noret op_5be0_24_nf; +extern cpuop_func_noret op_5be0_24_ff; +extern cpuop_func_noret op_5be8_24_nf; +extern cpuop_func_noret op_5be8_24_ff; +extern cpuop_func_noret op_5bf0_24_nf; +extern cpuop_func_noret op_5bf0_24_ff; +extern cpuop_func_noret op_5bf8_24_nf; +extern cpuop_func_noret op_5bf8_24_ff; +extern cpuop_func_noret op_5bf9_24_nf; +extern cpuop_func_noret op_5bf9_24_ff; +extern cpuop_func_noret op_5bfa_24_nf; +extern cpuop_func_noret op_5bfa_24_ff; +extern cpuop_func_noret op_5bfb_24_nf; +extern cpuop_func_noret op_5bfb_24_ff; +extern cpuop_func_noret op_5bfc_24_nf; +extern cpuop_func_noret op_5bfc_24_ff; +extern cpuop_func_noret op_5cc0_24_nf; +extern cpuop_func_noret op_5cc0_24_ff; +extern cpuop_func_noret op_5cc8_24_nf; +extern cpuop_func_noret op_5cc8_24_ff; +extern cpuop_func_noret op_5cd0_24_nf; +extern cpuop_func_noret op_5cd0_24_ff; +extern cpuop_func_noret op_5cd8_24_nf; +extern cpuop_func_noret op_5cd8_24_ff; +extern cpuop_func_noret op_5ce0_24_nf; +extern cpuop_func_noret op_5ce0_24_ff; +extern cpuop_func_noret op_5ce8_24_nf; +extern cpuop_func_noret op_5ce8_24_ff; +extern cpuop_func_noret op_5cf0_24_nf; +extern cpuop_func_noret op_5cf0_24_ff; +extern cpuop_func_noret op_5cf8_24_nf; +extern cpuop_func_noret op_5cf8_24_ff; +extern cpuop_func_noret op_5cf9_24_nf; +extern cpuop_func_noret op_5cf9_24_ff; +extern cpuop_func_noret op_5cfa_24_nf; +extern cpuop_func_noret op_5cfa_24_ff; +extern cpuop_func_noret op_5cfb_24_nf; +extern cpuop_func_noret op_5cfb_24_ff; +extern cpuop_func_noret op_5cfc_24_nf; +extern cpuop_func_noret op_5cfc_24_ff; +extern cpuop_func_noret op_5dc0_24_nf; +extern cpuop_func_noret op_5dc0_24_ff; +extern cpuop_func_noret op_5dc8_24_nf; +extern cpuop_func_noret op_5dc8_24_ff; +extern cpuop_func_noret op_5dd0_24_nf; +extern cpuop_func_noret op_5dd0_24_ff; +extern cpuop_func_noret op_5dd8_24_nf; +extern cpuop_func_noret op_5dd8_24_ff; +extern cpuop_func_noret op_5de0_24_nf; +extern cpuop_func_noret op_5de0_24_ff; +extern cpuop_func_noret op_5de8_24_nf; +extern cpuop_func_noret op_5de8_24_ff; +extern cpuop_func_noret op_5df0_24_nf; +extern cpuop_func_noret op_5df0_24_ff; +extern cpuop_func_noret op_5df8_24_nf; +extern cpuop_func_noret op_5df8_24_ff; +extern cpuop_func_noret op_5df9_24_nf; +extern cpuop_func_noret op_5df9_24_ff; +extern cpuop_func_noret op_5dfa_24_nf; +extern cpuop_func_noret op_5dfa_24_ff; +extern cpuop_func_noret op_5dfb_24_nf; +extern cpuop_func_noret op_5dfb_24_ff; +extern cpuop_func_noret op_5dfc_24_nf; +extern cpuop_func_noret op_5dfc_24_ff; +extern cpuop_func_noret op_5ec0_24_nf; +extern cpuop_func_noret op_5ec0_24_ff; +extern cpuop_func_noret op_5ec8_24_nf; +extern cpuop_func_noret op_5ec8_24_ff; +extern cpuop_func_noret op_5ed0_24_nf; +extern cpuop_func_noret op_5ed0_24_ff; +extern cpuop_func_noret op_5ed8_24_nf; +extern cpuop_func_noret op_5ed8_24_ff; +extern cpuop_func_noret op_5ee0_24_nf; +extern cpuop_func_noret op_5ee0_24_ff; +extern cpuop_func_noret op_5ee8_24_nf; +extern cpuop_func_noret op_5ee8_24_ff; +extern cpuop_func_noret op_5ef0_24_nf; +extern cpuop_func_noret op_5ef0_24_ff; +extern cpuop_func_noret op_5ef8_24_nf; +extern cpuop_func_noret op_5ef8_24_ff; +extern cpuop_func_noret op_5ef9_24_nf; +extern cpuop_func_noret op_5ef9_24_ff; +extern cpuop_func_noret op_5efa_24_nf; +extern cpuop_func_noret op_5efa_24_ff; +extern cpuop_func_noret op_5efb_24_nf; +extern cpuop_func_noret op_5efb_24_ff; +extern cpuop_func_noret op_5efc_24_nf; +extern cpuop_func_noret op_5efc_24_ff; +extern cpuop_func_noret op_5fc0_24_nf; +extern cpuop_func_noret op_5fc0_24_ff; +extern cpuop_func_noret op_5fc8_24_nf; +extern cpuop_func_noret op_5fc8_24_ff; +extern cpuop_func_noret op_5fd0_24_nf; +extern cpuop_func_noret op_5fd0_24_ff; +extern cpuop_func_noret op_5fd8_24_nf; +extern cpuop_func_noret op_5fd8_24_ff; +extern cpuop_func_noret op_5fe0_24_nf; +extern cpuop_func_noret op_5fe0_24_ff; +extern cpuop_func_noret op_5fe8_24_nf; +extern cpuop_func_noret op_5fe8_24_ff; +extern cpuop_func_noret op_5ff0_24_nf; +extern cpuop_func_noret op_5ff0_24_ff; +extern cpuop_func_noret op_5ff8_24_nf; +extern cpuop_func_noret op_5ff8_24_ff; +extern cpuop_func_noret op_5ff9_24_nf; +extern cpuop_func_noret op_5ff9_24_ff; +extern cpuop_func_noret op_5ffa_24_nf; +extern cpuop_func_noret op_5ffa_24_ff; +extern cpuop_func_noret op_5ffb_24_nf; +extern cpuop_func_noret op_5ffb_24_ff; +extern cpuop_func_noret op_5ffc_24_nf; +extern cpuop_func_noret op_5ffc_24_ff; +extern cpuop_func_noret op_6000_24_nf; +extern cpuop_func_noret op_6000_24_ff; +extern cpuop_func_noret op_6001_24_nf; +extern cpuop_func_noret op_6001_24_ff; +extern cpuop_func_noret op_60ff_24_nf; +extern cpuop_func_noret op_60ff_24_ff; +extern cpuop_func_noret op_6100_24_nf; +extern cpuop_func_noret op_6100_24_ff; +extern cpuop_func_noret op_6101_24_nf; +extern cpuop_func_noret op_6101_24_ff; +extern cpuop_func_noret op_61ff_24_nf; +extern cpuop_func_noret op_61ff_24_ff; +extern cpuop_func_noret op_6200_24_nf; +extern cpuop_func_noret op_6200_24_ff; +extern cpuop_func_noret op_6201_24_nf; +extern cpuop_func_noret op_6201_24_ff; +extern cpuop_func_noret op_62ff_24_nf; +extern cpuop_func_noret op_62ff_24_ff; +extern cpuop_func_noret op_6300_24_nf; +extern cpuop_func_noret op_6300_24_ff; +extern cpuop_func_noret op_6301_24_nf; +extern cpuop_func_noret op_6301_24_ff; +extern cpuop_func_noret op_63ff_24_nf; +extern cpuop_func_noret op_63ff_24_ff; +extern cpuop_func_noret op_6400_24_nf; +extern cpuop_func_noret op_6400_24_ff; +extern cpuop_func_noret op_6401_24_nf; +extern cpuop_func_noret op_6401_24_ff; +extern cpuop_func_noret op_64ff_24_nf; +extern cpuop_func_noret op_64ff_24_ff; +extern cpuop_func_noret op_6500_24_nf; +extern cpuop_func_noret op_6500_24_ff; +extern cpuop_func_noret op_6501_24_nf; +extern cpuop_func_noret op_6501_24_ff; +extern cpuop_func_noret op_65ff_24_nf; +extern cpuop_func_noret op_65ff_24_ff; +extern cpuop_func_noret op_6600_24_nf; +extern cpuop_func_noret op_6600_24_ff; +extern cpuop_func_noret op_6601_24_nf; +extern cpuop_func_noret op_6601_24_ff; +extern cpuop_func_noret op_66ff_24_nf; +extern cpuop_func_noret op_66ff_24_ff; +extern cpuop_func_noret op_6700_24_nf; +extern cpuop_func_noret op_6700_24_ff; +extern cpuop_func_noret op_6701_24_nf; +extern cpuop_func_noret op_6701_24_ff; +extern cpuop_func_noret op_67ff_24_nf; +extern cpuop_func_noret op_67ff_24_ff; +extern cpuop_func_noret op_6800_24_nf; +extern cpuop_func_noret op_6800_24_ff; +extern cpuop_func_noret op_6801_24_nf; +extern cpuop_func_noret op_6801_24_ff; +extern cpuop_func_noret op_68ff_24_nf; +extern cpuop_func_noret op_68ff_24_ff; +extern cpuop_func_noret op_6900_24_nf; +extern cpuop_func_noret op_6900_24_ff; +extern cpuop_func_noret op_6901_24_nf; +extern cpuop_func_noret op_6901_24_ff; +extern cpuop_func_noret op_69ff_24_nf; +extern cpuop_func_noret op_69ff_24_ff; +extern cpuop_func_noret op_6a00_24_nf; +extern cpuop_func_noret op_6a00_24_ff; +extern cpuop_func_noret op_6a01_24_nf; +extern cpuop_func_noret op_6a01_24_ff; +extern cpuop_func_noret op_6aff_24_nf; +extern cpuop_func_noret op_6aff_24_ff; +extern cpuop_func_noret op_6b00_24_nf; +extern cpuop_func_noret op_6b00_24_ff; +extern cpuop_func_noret op_6b01_24_nf; +extern cpuop_func_noret op_6b01_24_ff; +extern cpuop_func_noret op_6bff_24_nf; +extern cpuop_func_noret op_6bff_24_ff; +extern cpuop_func_noret op_6c00_24_nf; +extern cpuop_func_noret op_6c00_24_ff; +extern cpuop_func_noret op_6c01_24_nf; +extern cpuop_func_noret op_6c01_24_ff; +extern cpuop_func_noret op_6cff_24_nf; +extern cpuop_func_noret op_6cff_24_ff; +extern cpuop_func_noret op_6d00_24_nf; +extern cpuop_func_noret op_6d00_24_ff; +extern cpuop_func_noret op_6d01_24_nf; +extern cpuop_func_noret op_6d01_24_ff; +extern cpuop_func_noret op_6dff_24_nf; +extern cpuop_func_noret op_6dff_24_ff; +extern cpuop_func_noret op_6e00_24_nf; +extern cpuop_func_noret op_6e00_24_ff; +extern cpuop_func_noret op_6e01_24_nf; +extern cpuop_func_noret op_6e01_24_ff; +extern cpuop_func_noret op_6eff_24_nf; +extern cpuop_func_noret op_6eff_24_ff; +extern cpuop_func_noret op_6f00_24_nf; +extern cpuop_func_noret op_6f00_24_ff; +extern cpuop_func_noret op_6f01_24_nf; +extern cpuop_func_noret op_6f01_24_ff; +extern cpuop_func_noret op_6fff_24_nf; +extern cpuop_func_noret op_6fff_24_ff; +extern cpuop_func_noret op_7000_24_nf; +extern cpuop_func_noret op_7000_24_ff; +extern cpuop_func_noret op_8000_24_nf; +extern cpuop_func_noret op_8000_24_ff; +extern cpuop_func_noret op_8010_24_nf; +extern cpuop_func_noret op_8010_24_ff; +extern cpuop_func_noret op_8018_24_nf; +extern cpuop_func_noret op_8018_24_ff; +extern cpuop_func_noret op_8020_24_nf; +extern cpuop_func_noret op_8020_24_ff; +extern cpuop_func_noret op_8028_24_nf; +extern cpuop_func_noret op_8028_24_ff; +extern cpuop_func_noret op_8030_24_nf; +extern cpuop_func_noret op_8030_24_ff; +extern cpuop_func_noret op_8038_24_nf; +extern cpuop_func_noret op_8038_24_ff; +extern cpuop_func_noret op_8039_24_nf; +extern cpuop_func_noret op_8039_24_ff; +extern cpuop_func_noret op_803a_24_nf; +extern cpuop_func_noret op_803a_24_ff; +extern cpuop_func_noret op_803b_24_nf; +extern cpuop_func_noret op_803b_24_ff; +extern cpuop_func_noret op_803c_24_nf; +extern cpuop_func_noret op_803c_24_ff; +extern cpuop_func_noret op_8040_24_nf; +extern cpuop_func_noret op_8040_24_ff; +extern cpuop_func_noret op_8050_24_nf; +extern cpuop_func_noret op_8050_24_ff; +extern cpuop_func_noret op_8058_24_nf; +extern cpuop_func_noret op_8058_24_ff; +extern cpuop_func_noret op_8060_24_nf; +extern cpuop_func_noret op_8060_24_ff; +extern cpuop_func_noret op_8068_24_nf; +extern cpuop_func_noret op_8068_24_ff; +extern cpuop_func_noret op_8070_24_nf; +extern cpuop_func_noret op_8070_24_ff; +extern cpuop_func_noret op_8078_24_nf; +extern cpuop_func_noret op_8078_24_ff; +extern cpuop_func_noret op_8079_24_nf; +extern cpuop_func_noret op_8079_24_ff; +extern cpuop_func_noret op_807a_24_nf; +extern cpuop_func_noret op_807a_24_ff; +extern cpuop_func_noret op_807b_24_nf; +extern cpuop_func_noret op_807b_24_ff; +extern cpuop_func_noret op_807c_24_nf; +extern cpuop_func_noret op_807c_24_ff; +extern cpuop_func_noret op_8080_24_nf; +extern cpuop_func_noret op_8080_24_ff; +extern cpuop_func_noret op_8090_24_nf; +extern cpuop_func_noret op_8090_24_ff; +extern cpuop_func_noret op_8098_24_nf; +extern cpuop_func_noret op_8098_24_ff; +extern cpuop_func_noret op_80a0_24_nf; +extern cpuop_func_noret op_80a0_24_ff; +extern cpuop_func_noret op_80a8_24_nf; +extern cpuop_func_noret op_80a8_24_ff; +extern cpuop_func_noret op_80b0_24_nf; +extern cpuop_func_noret op_80b0_24_ff; +extern cpuop_func_noret op_80b8_24_nf; +extern cpuop_func_noret op_80b8_24_ff; +extern cpuop_func_noret op_80b9_24_nf; +extern cpuop_func_noret op_80b9_24_ff; +extern cpuop_func_noret op_80ba_24_nf; +extern cpuop_func_noret op_80ba_24_ff; +extern cpuop_func_noret op_80bb_24_nf; +extern cpuop_func_noret op_80bb_24_ff; +extern cpuop_func_noret op_80bc_24_nf; +extern cpuop_func_noret op_80bc_24_ff; +extern cpuop_func_noret op_80c0_24_nf; +extern cpuop_func_noret op_80c0_24_ff; +extern cpuop_func_noret op_80d0_24_nf; +extern cpuop_func_noret op_80d0_24_ff; +extern cpuop_func_noret op_80d8_24_nf; +extern cpuop_func_noret op_80d8_24_ff; +extern cpuop_func_noret op_80e0_24_nf; +extern cpuop_func_noret op_80e0_24_ff; +extern cpuop_func_noret op_80e8_24_nf; +extern cpuop_func_noret op_80e8_24_ff; +extern cpuop_func_noret op_80f0_24_nf; +extern cpuop_func_noret op_80f0_24_ff; +extern cpuop_func_noret op_80f8_24_nf; +extern cpuop_func_noret op_80f8_24_ff; +extern cpuop_func_noret op_80f9_24_nf; +extern cpuop_func_noret op_80f9_24_ff; +extern cpuop_func_noret op_80fa_24_nf; +extern cpuop_func_noret op_80fa_24_ff; +extern cpuop_func_noret op_80fb_24_nf; +extern cpuop_func_noret op_80fb_24_ff; +extern cpuop_func_noret op_80fc_24_nf; +extern cpuop_func_noret op_80fc_24_ff; +extern cpuop_func_noret op_8100_24_nf; +extern cpuop_func_noret op_8100_24_ff; +extern cpuop_func_noret op_8108_24_nf; +extern cpuop_func_noret op_8108_24_ff; +extern cpuop_func_noret op_8110_24_nf; +extern cpuop_func_noret op_8110_24_ff; +extern cpuop_func_noret op_8118_24_nf; +extern cpuop_func_noret op_8118_24_ff; +extern cpuop_func_noret op_8120_24_nf; +extern cpuop_func_noret op_8120_24_ff; +extern cpuop_func_noret op_8128_24_nf; +extern cpuop_func_noret op_8128_24_ff; +extern cpuop_func_noret op_8130_24_nf; +extern cpuop_func_noret op_8130_24_ff; +extern cpuop_func_noret op_8138_24_nf; +extern cpuop_func_noret op_8138_24_ff; +extern cpuop_func_noret op_8139_24_nf; +extern cpuop_func_noret op_8139_24_ff; +extern cpuop_func_noret op_8140_24_nf; +extern cpuop_func_noret op_8140_24_ff; +extern cpuop_func_noret op_8148_24_nf; +extern cpuop_func_noret op_8148_24_ff; +extern cpuop_func_noret op_8150_24_nf; +extern cpuop_func_noret op_8150_24_ff; +extern cpuop_func_noret op_8158_24_nf; +extern cpuop_func_noret op_8158_24_ff; +extern cpuop_func_noret op_8160_24_nf; +extern cpuop_func_noret op_8160_24_ff; +extern cpuop_func_noret op_8168_24_nf; +extern cpuop_func_noret op_8168_24_ff; +extern cpuop_func_noret op_8170_24_nf; +extern cpuop_func_noret op_8170_24_ff; +extern cpuop_func_noret op_8178_24_nf; +extern cpuop_func_noret op_8178_24_ff; +extern cpuop_func_noret op_8179_24_nf; +extern cpuop_func_noret op_8179_24_ff; +extern cpuop_func_noret op_8180_24_nf; +extern cpuop_func_noret op_8180_24_ff; +extern cpuop_func_noret op_8188_24_nf; +extern cpuop_func_noret op_8188_24_ff; +extern cpuop_func_noret op_8190_24_nf; +extern cpuop_func_noret op_8190_24_ff; +extern cpuop_func_noret op_8198_24_nf; +extern cpuop_func_noret op_8198_24_ff; +extern cpuop_func_noret op_81a0_24_nf; +extern cpuop_func_noret op_81a0_24_ff; +extern cpuop_func_noret op_81a8_24_nf; +extern cpuop_func_noret op_81a8_24_ff; +extern cpuop_func_noret op_81b0_24_nf; +extern cpuop_func_noret op_81b0_24_ff; +extern cpuop_func_noret op_81b8_24_nf; +extern cpuop_func_noret op_81b8_24_ff; +extern cpuop_func_noret op_81b9_24_nf; +extern cpuop_func_noret op_81b9_24_ff; +extern cpuop_func_noret op_81c0_24_nf; +extern cpuop_func_noret op_81c0_24_ff; +extern cpuop_func_noret op_81d0_24_nf; +extern cpuop_func_noret op_81d0_24_ff; +extern cpuop_func_noret op_81d8_24_nf; +extern cpuop_func_noret op_81d8_24_ff; +extern cpuop_func_noret op_81e0_24_nf; +extern cpuop_func_noret op_81e0_24_ff; +extern cpuop_func_noret op_81e8_24_nf; +extern cpuop_func_noret op_81e8_24_ff; +extern cpuop_func_noret op_81f0_24_nf; +extern cpuop_func_noret op_81f0_24_ff; +extern cpuop_func_noret op_81f8_24_nf; +extern cpuop_func_noret op_81f8_24_ff; +extern cpuop_func_noret op_81f9_24_nf; +extern cpuop_func_noret op_81f9_24_ff; +extern cpuop_func_noret op_81fa_24_nf; +extern cpuop_func_noret op_81fa_24_ff; +extern cpuop_func_noret op_81fb_24_nf; +extern cpuop_func_noret op_81fb_24_ff; +extern cpuop_func_noret op_81fc_24_nf; +extern cpuop_func_noret op_81fc_24_ff; +extern cpuop_func_noret op_9000_24_nf; +extern cpuop_func_noret op_9000_24_ff; +extern cpuop_func_noret op_9010_24_nf; +extern cpuop_func_noret op_9010_24_ff; +extern cpuop_func_noret op_9018_24_nf; +extern cpuop_func_noret op_9018_24_ff; +extern cpuop_func_noret op_9020_24_nf; +extern cpuop_func_noret op_9020_24_ff; +extern cpuop_func_noret op_9028_24_nf; +extern cpuop_func_noret op_9028_24_ff; +extern cpuop_func_noret op_9030_24_nf; +extern cpuop_func_noret op_9030_24_ff; +extern cpuop_func_noret op_9038_24_nf; +extern cpuop_func_noret op_9038_24_ff; +extern cpuop_func_noret op_9039_24_nf; +extern cpuop_func_noret op_9039_24_ff; +extern cpuop_func_noret op_903a_24_nf; +extern cpuop_func_noret op_903a_24_ff; +extern cpuop_func_noret op_903b_24_nf; +extern cpuop_func_noret op_903b_24_ff; +extern cpuop_func_noret op_903c_24_nf; +extern cpuop_func_noret op_903c_24_ff; +extern cpuop_func_noret op_9040_24_nf; +extern cpuop_func_noret op_9040_24_ff; +extern cpuop_func_noret op_9048_24_nf; +extern cpuop_func_noret op_9048_24_ff; +extern cpuop_func_noret op_9050_24_nf; +extern cpuop_func_noret op_9050_24_ff; +extern cpuop_func_noret op_9058_24_nf; +extern cpuop_func_noret op_9058_24_ff; +extern cpuop_func_noret op_9060_24_nf; +extern cpuop_func_noret op_9060_24_ff; +extern cpuop_func_noret op_9068_24_nf; +extern cpuop_func_noret op_9068_24_ff; +extern cpuop_func_noret op_9070_24_nf; +extern cpuop_func_noret op_9070_24_ff; +extern cpuop_func_noret op_9078_24_nf; +extern cpuop_func_noret op_9078_24_ff; +extern cpuop_func_noret op_9079_24_nf; +extern cpuop_func_noret op_9079_24_ff; +extern cpuop_func_noret op_907a_24_nf; +extern cpuop_func_noret op_907a_24_ff; +extern cpuop_func_noret op_907b_24_nf; +extern cpuop_func_noret op_907b_24_ff; +extern cpuop_func_noret op_907c_24_nf; +extern cpuop_func_noret op_907c_24_ff; +extern cpuop_func_noret op_9080_24_nf; +extern cpuop_func_noret op_9080_24_ff; +extern cpuop_func_noret op_9088_24_nf; +extern cpuop_func_noret op_9088_24_ff; +extern cpuop_func_noret op_9090_24_nf; +extern cpuop_func_noret op_9090_24_ff; +extern cpuop_func_noret op_9098_24_nf; +extern cpuop_func_noret op_9098_24_ff; +extern cpuop_func_noret op_90a0_24_nf; +extern cpuop_func_noret op_90a0_24_ff; +extern cpuop_func_noret op_90a8_24_nf; +extern cpuop_func_noret op_90a8_24_ff; +extern cpuop_func_noret op_90b0_24_nf; +extern cpuop_func_noret op_90b0_24_ff; +extern cpuop_func_noret op_90b8_24_nf; +extern cpuop_func_noret op_90b8_24_ff; +extern cpuop_func_noret op_90b9_24_nf; +extern cpuop_func_noret op_90b9_24_ff; +extern cpuop_func_noret op_90ba_24_nf; +extern cpuop_func_noret op_90ba_24_ff; +extern cpuop_func_noret op_90bb_24_nf; +extern cpuop_func_noret op_90bb_24_ff; +extern cpuop_func_noret op_90bc_24_nf; +extern cpuop_func_noret op_90bc_24_ff; +extern cpuop_func_noret op_90c0_24_nf; +extern cpuop_func_noret op_90c0_24_ff; +extern cpuop_func_noret op_90c8_24_nf; +extern cpuop_func_noret op_90c8_24_ff; +extern cpuop_func_noret op_90d0_24_nf; +extern cpuop_func_noret op_90d0_24_ff; +extern cpuop_func_noret op_90d8_24_nf; +extern cpuop_func_noret op_90d8_24_ff; +extern cpuop_func_noret op_90e0_24_nf; +extern cpuop_func_noret op_90e0_24_ff; +extern cpuop_func_noret op_90e8_24_nf; +extern cpuop_func_noret op_90e8_24_ff; +extern cpuop_func_noret op_90f0_24_nf; +extern cpuop_func_noret op_90f0_24_ff; +extern cpuop_func_noret op_90f8_24_nf; +extern cpuop_func_noret op_90f8_24_ff; +extern cpuop_func_noret op_90f9_24_nf; +extern cpuop_func_noret op_90f9_24_ff; +extern cpuop_func_noret op_90fa_24_nf; +extern cpuop_func_noret op_90fa_24_ff; +extern cpuop_func_noret op_90fb_24_nf; +extern cpuop_func_noret op_90fb_24_ff; +extern cpuop_func_noret op_90fc_24_nf; +extern cpuop_func_noret op_90fc_24_ff; +extern cpuop_func_noret op_9100_24_nf; +extern cpuop_func_noret op_9100_24_ff; +extern cpuop_func_noret op_9108_24_nf; +extern cpuop_func_noret op_9108_24_ff; +extern cpuop_func_noret op_9110_24_nf; +extern cpuop_func_noret op_9110_24_ff; +extern cpuop_func_noret op_9118_24_nf; +extern cpuop_func_noret op_9118_24_ff; +extern cpuop_func_noret op_9120_24_nf; +extern cpuop_func_noret op_9120_24_ff; +extern cpuop_func_noret op_9128_24_nf; +extern cpuop_func_noret op_9128_24_ff; +extern cpuop_func_noret op_9130_24_nf; +extern cpuop_func_noret op_9130_24_ff; +extern cpuop_func_noret op_9138_24_nf; +extern cpuop_func_noret op_9138_24_ff; +extern cpuop_func_noret op_9139_24_nf; +extern cpuop_func_noret op_9139_24_ff; +extern cpuop_func_noret op_9140_24_nf; +extern cpuop_func_noret op_9140_24_ff; +extern cpuop_func_noret op_9148_24_nf; +extern cpuop_func_noret op_9148_24_ff; +extern cpuop_func_noret op_9150_24_nf; +extern cpuop_func_noret op_9150_24_ff; +extern cpuop_func_noret op_9158_24_nf; +extern cpuop_func_noret op_9158_24_ff; +extern cpuop_func_noret op_9160_24_nf; +extern cpuop_func_noret op_9160_24_ff; +extern cpuop_func_noret op_9168_24_nf; +extern cpuop_func_noret op_9168_24_ff; +extern cpuop_func_noret op_9170_24_nf; +extern cpuop_func_noret op_9170_24_ff; +extern cpuop_func_noret op_9178_24_nf; +extern cpuop_func_noret op_9178_24_ff; +extern cpuop_func_noret op_9179_24_nf; +extern cpuop_func_noret op_9179_24_ff; +extern cpuop_func_noret op_9180_24_nf; +extern cpuop_func_noret op_9180_24_ff; +extern cpuop_func_noret op_9188_24_nf; +extern cpuop_func_noret op_9188_24_ff; +extern cpuop_func_noret op_9190_24_nf; +extern cpuop_func_noret op_9190_24_ff; +extern cpuop_func_noret op_9198_24_nf; +extern cpuop_func_noret op_9198_24_ff; +extern cpuop_func_noret op_91a0_24_nf; +extern cpuop_func_noret op_91a0_24_ff; +extern cpuop_func_noret op_91a8_24_nf; +extern cpuop_func_noret op_91a8_24_ff; +extern cpuop_func_noret op_91b0_24_nf; +extern cpuop_func_noret op_91b0_24_ff; +extern cpuop_func_noret op_91b8_24_nf; +extern cpuop_func_noret op_91b8_24_ff; +extern cpuop_func_noret op_91b9_24_nf; +extern cpuop_func_noret op_91b9_24_ff; +extern cpuop_func_noret op_91c0_24_nf; +extern cpuop_func_noret op_91c0_24_ff; +extern cpuop_func_noret op_91c8_24_nf; +extern cpuop_func_noret op_91c8_24_ff; +extern cpuop_func_noret op_91d0_24_nf; +extern cpuop_func_noret op_91d0_24_ff; +extern cpuop_func_noret op_91d8_24_nf; +extern cpuop_func_noret op_91d8_24_ff; +extern cpuop_func_noret op_91e0_24_nf; +extern cpuop_func_noret op_91e0_24_ff; +extern cpuop_func_noret op_91e8_24_nf; +extern cpuop_func_noret op_91e8_24_ff; +extern cpuop_func_noret op_91f0_24_nf; +extern cpuop_func_noret op_91f0_24_ff; +extern cpuop_func_noret op_91f8_24_nf; +extern cpuop_func_noret op_91f8_24_ff; +extern cpuop_func_noret op_91f9_24_nf; +extern cpuop_func_noret op_91f9_24_ff; +extern cpuop_func_noret op_91fa_24_nf; +extern cpuop_func_noret op_91fa_24_ff; +extern cpuop_func_noret op_91fb_24_nf; +extern cpuop_func_noret op_91fb_24_ff; +extern cpuop_func_noret op_91fc_24_nf; +extern cpuop_func_noret op_91fc_24_ff; +extern cpuop_func_noret op_b000_24_nf; +extern cpuop_func_noret op_b000_24_ff; +extern cpuop_func_noret op_b010_24_nf; +extern cpuop_func_noret op_b010_24_ff; +extern cpuop_func_noret op_b018_24_nf; +extern cpuop_func_noret op_b018_24_ff; +extern cpuop_func_noret op_b020_24_nf; +extern cpuop_func_noret op_b020_24_ff; +extern cpuop_func_noret op_b028_24_nf; +extern cpuop_func_noret op_b028_24_ff; +extern cpuop_func_noret op_b030_24_nf; +extern cpuop_func_noret op_b030_24_ff; +extern cpuop_func_noret op_b038_24_nf; +extern cpuop_func_noret op_b038_24_ff; +extern cpuop_func_noret op_b039_24_nf; +extern cpuop_func_noret op_b039_24_ff; +extern cpuop_func_noret op_b03a_24_nf; +extern cpuop_func_noret op_b03a_24_ff; +extern cpuop_func_noret op_b03b_24_nf; +extern cpuop_func_noret op_b03b_24_ff; +extern cpuop_func_noret op_b03c_24_nf; +extern cpuop_func_noret op_b03c_24_ff; +extern cpuop_func_noret op_b040_24_nf; +extern cpuop_func_noret op_b040_24_ff; +extern cpuop_func_noret op_b048_24_nf; +extern cpuop_func_noret op_b048_24_ff; +extern cpuop_func_noret op_b050_24_nf; +extern cpuop_func_noret op_b050_24_ff; +extern cpuop_func_noret op_b058_24_nf; +extern cpuop_func_noret op_b058_24_ff; +extern cpuop_func_noret op_b060_24_nf; +extern cpuop_func_noret op_b060_24_ff; +extern cpuop_func_noret op_b068_24_nf; +extern cpuop_func_noret op_b068_24_ff; +extern cpuop_func_noret op_b070_24_nf; +extern cpuop_func_noret op_b070_24_ff; +extern cpuop_func_noret op_b078_24_nf; +extern cpuop_func_noret op_b078_24_ff; +extern cpuop_func_noret op_b079_24_nf; +extern cpuop_func_noret op_b079_24_ff; +extern cpuop_func_noret op_b07a_24_nf; +extern cpuop_func_noret op_b07a_24_ff; +extern cpuop_func_noret op_b07b_24_nf; +extern cpuop_func_noret op_b07b_24_ff; +extern cpuop_func_noret op_b07c_24_nf; +extern cpuop_func_noret op_b07c_24_ff; +extern cpuop_func_noret op_b080_24_nf; +extern cpuop_func_noret op_b080_24_ff; +extern cpuop_func_noret op_b088_24_nf; +extern cpuop_func_noret op_b088_24_ff; +extern cpuop_func_noret op_b090_24_nf; +extern cpuop_func_noret op_b090_24_ff; +extern cpuop_func_noret op_b098_24_nf; +extern cpuop_func_noret op_b098_24_ff; +extern cpuop_func_noret op_b0a0_24_nf; +extern cpuop_func_noret op_b0a0_24_ff; +extern cpuop_func_noret op_b0a8_24_nf; +extern cpuop_func_noret op_b0a8_24_ff; +extern cpuop_func_noret op_b0b0_24_nf; +extern cpuop_func_noret op_b0b0_24_ff; +extern cpuop_func_noret op_b0b8_24_nf; +extern cpuop_func_noret op_b0b8_24_ff; +extern cpuop_func_noret op_b0b9_24_nf; +extern cpuop_func_noret op_b0b9_24_ff; +extern cpuop_func_noret op_b0ba_24_nf; +extern cpuop_func_noret op_b0ba_24_ff; +extern cpuop_func_noret op_b0bb_24_nf; +extern cpuop_func_noret op_b0bb_24_ff; +extern cpuop_func_noret op_b0bc_24_nf; +extern cpuop_func_noret op_b0bc_24_ff; +extern cpuop_func_noret op_b0c0_24_nf; +extern cpuop_func_noret op_b0c0_24_ff; +extern cpuop_func_noret op_b0c8_24_nf; +extern cpuop_func_noret op_b0c8_24_ff; +extern cpuop_func_noret op_b0d0_24_nf; +extern cpuop_func_noret op_b0d0_24_ff; +extern cpuop_func_noret op_b0d8_24_nf; +extern cpuop_func_noret op_b0d8_24_ff; +extern cpuop_func_noret op_b0e0_24_nf; +extern cpuop_func_noret op_b0e0_24_ff; +extern cpuop_func_noret op_b0e8_24_nf; +extern cpuop_func_noret op_b0e8_24_ff; +extern cpuop_func_noret op_b0f0_24_nf; +extern cpuop_func_noret op_b0f0_24_ff; +extern cpuop_func_noret op_b0f8_24_nf; +extern cpuop_func_noret op_b0f8_24_ff; +extern cpuop_func_noret op_b0f9_24_nf; +extern cpuop_func_noret op_b0f9_24_ff; +extern cpuop_func_noret op_b0fa_24_nf; +extern cpuop_func_noret op_b0fa_24_ff; +extern cpuop_func_noret op_b0fb_24_nf; +extern cpuop_func_noret op_b0fb_24_ff; +extern cpuop_func_noret op_b0fc_24_nf; +extern cpuop_func_noret op_b0fc_24_ff; +extern cpuop_func_noret op_b100_24_nf; +extern cpuop_func_noret op_b100_24_ff; +extern cpuop_func_noret op_b108_24_nf; +extern cpuop_func_noret op_b108_24_ff; +extern cpuop_func_noret op_b110_24_nf; +extern cpuop_func_noret op_b110_24_ff; +extern cpuop_func_noret op_b118_24_nf; +extern cpuop_func_noret op_b118_24_ff; +extern cpuop_func_noret op_b120_24_nf; +extern cpuop_func_noret op_b120_24_ff; +extern cpuop_func_noret op_b128_24_nf; +extern cpuop_func_noret op_b128_24_ff; +extern cpuop_func_noret op_b130_24_nf; +extern cpuop_func_noret op_b130_24_ff; +extern cpuop_func_noret op_b138_24_nf; +extern cpuop_func_noret op_b138_24_ff; +extern cpuop_func_noret op_b139_24_nf; +extern cpuop_func_noret op_b139_24_ff; +extern cpuop_func_noret op_b140_24_nf; +extern cpuop_func_noret op_b140_24_ff; +extern cpuop_func_noret op_b148_24_nf; +extern cpuop_func_noret op_b148_24_ff; +extern cpuop_func_noret op_b150_24_nf; +extern cpuop_func_noret op_b150_24_ff; +extern cpuop_func_noret op_b158_24_nf; +extern cpuop_func_noret op_b158_24_ff; +extern cpuop_func_noret op_b160_24_nf; +extern cpuop_func_noret op_b160_24_ff; +extern cpuop_func_noret op_b168_24_nf; +extern cpuop_func_noret op_b168_24_ff; +extern cpuop_func_noret op_b170_24_nf; +extern cpuop_func_noret op_b170_24_ff; +extern cpuop_func_noret op_b178_24_nf; +extern cpuop_func_noret op_b178_24_ff; +extern cpuop_func_noret op_b179_24_nf; +extern cpuop_func_noret op_b179_24_ff; +extern cpuop_func_noret op_b180_24_nf; +extern cpuop_func_noret op_b180_24_ff; +extern cpuop_func_noret op_b188_24_nf; +extern cpuop_func_noret op_b188_24_ff; +extern cpuop_func_noret op_b190_24_nf; +extern cpuop_func_noret op_b190_24_ff; +extern cpuop_func_noret op_b198_24_nf; +extern cpuop_func_noret op_b198_24_ff; +extern cpuop_func_noret op_b1a0_24_nf; +extern cpuop_func_noret op_b1a0_24_ff; +extern cpuop_func_noret op_b1a8_24_nf; +extern cpuop_func_noret op_b1a8_24_ff; +extern cpuop_func_noret op_b1b0_24_nf; +extern cpuop_func_noret op_b1b0_24_ff; +extern cpuop_func_noret op_b1b8_24_nf; +extern cpuop_func_noret op_b1b8_24_ff; +extern cpuop_func_noret op_b1b9_24_nf; +extern cpuop_func_noret op_b1b9_24_ff; +extern cpuop_func_noret op_b1c0_24_nf; +extern cpuop_func_noret op_b1c0_24_ff; +extern cpuop_func_noret op_b1c8_24_nf; +extern cpuop_func_noret op_b1c8_24_ff; +extern cpuop_func_noret op_b1d0_24_nf; +extern cpuop_func_noret op_b1d0_24_ff; +extern cpuop_func_noret op_b1d8_24_nf; +extern cpuop_func_noret op_b1d8_24_ff; +extern cpuop_func_noret op_b1e0_24_nf; +extern cpuop_func_noret op_b1e0_24_ff; +extern cpuop_func_noret op_b1e8_24_nf; +extern cpuop_func_noret op_b1e8_24_ff; +extern cpuop_func_noret op_b1f0_24_nf; +extern cpuop_func_noret op_b1f0_24_ff; +extern cpuop_func_noret op_b1f8_24_nf; +extern cpuop_func_noret op_b1f8_24_ff; +extern cpuop_func_noret op_b1f9_24_nf; +extern cpuop_func_noret op_b1f9_24_ff; +extern cpuop_func_noret op_b1fa_24_nf; +extern cpuop_func_noret op_b1fa_24_ff; +extern cpuop_func_noret op_b1fb_24_nf; +extern cpuop_func_noret op_b1fb_24_ff; +extern cpuop_func_noret op_b1fc_24_nf; +extern cpuop_func_noret op_b1fc_24_ff; +extern cpuop_func_noret op_c000_24_nf; +extern cpuop_func_noret op_c000_24_ff; +extern cpuop_func_noret op_c010_24_nf; +extern cpuop_func_noret op_c010_24_ff; +extern cpuop_func_noret op_c018_24_nf; +extern cpuop_func_noret op_c018_24_ff; +extern cpuop_func_noret op_c020_24_nf; +extern cpuop_func_noret op_c020_24_ff; +extern cpuop_func_noret op_c028_24_nf; +extern cpuop_func_noret op_c028_24_ff; +extern cpuop_func_noret op_c030_24_nf; +extern cpuop_func_noret op_c030_24_ff; +extern cpuop_func_noret op_c038_24_nf; +extern cpuop_func_noret op_c038_24_ff; +extern cpuop_func_noret op_c039_24_nf; +extern cpuop_func_noret op_c039_24_ff; +extern cpuop_func_noret op_c03a_24_nf; +extern cpuop_func_noret op_c03a_24_ff; +extern cpuop_func_noret op_c03b_24_nf; +extern cpuop_func_noret op_c03b_24_ff; +extern cpuop_func_noret op_c03c_24_nf; +extern cpuop_func_noret op_c03c_24_ff; +extern cpuop_func_noret op_c040_24_nf; +extern cpuop_func_noret op_c040_24_ff; +extern cpuop_func_noret op_c050_24_nf; +extern cpuop_func_noret op_c050_24_ff; +extern cpuop_func_noret op_c058_24_nf; +extern cpuop_func_noret op_c058_24_ff; +extern cpuop_func_noret op_c060_24_nf; +extern cpuop_func_noret op_c060_24_ff; +extern cpuop_func_noret op_c068_24_nf; +extern cpuop_func_noret op_c068_24_ff; +extern cpuop_func_noret op_c070_24_nf; +extern cpuop_func_noret op_c070_24_ff; +extern cpuop_func_noret op_c078_24_nf; +extern cpuop_func_noret op_c078_24_ff; +extern cpuop_func_noret op_c079_24_nf; +extern cpuop_func_noret op_c079_24_ff; +extern cpuop_func_noret op_c07a_24_nf; +extern cpuop_func_noret op_c07a_24_ff; +extern cpuop_func_noret op_c07b_24_nf; +extern cpuop_func_noret op_c07b_24_ff; +extern cpuop_func_noret op_c07c_24_nf; +extern cpuop_func_noret op_c07c_24_ff; +extern cpuop_func_noret op_c080_24_nf; +extern cpuop_func_noret op_c080_24_ff; +extern cpuop_func_noret op_c090_24_nf; +extern cpuop_func_noret op_c090_24_ff; +extern cpuop_func_noret op_c098_24_nf; +extern cpuop_func_noret op_c098_24_ff; +extern cpuop_func_noret op_c0a0_24_nf; +extern cpuop_func_noret op_c0a0_24_ff; +extern cpuop_func_noret op_c0a8_24_nf; +extern cpuop_func_noret op_c0a8_24_ff; +extern cpuop_func_noret op_c0b0_24_nf; +extern cpuop_func_noret op_c0b0_24_ff; +extern cpuop_func_noret op_c0b8_24_nf; +extern cpuop_func_noret op_c0b8_24_ff; +extern cpuop_func_noret op_c0b9_24_nf; +extern cpuop_func_noret op_c0b9_24_ff; +extern cpuop_func_noret op_c0ba_24_nf; +extern cpuop_func_noret op_c0ba_24_ff; +extern cpuop_func_noret op_c0bb_24_nf; +extern cpuop_func_noret op_c0bb_24_ff; +extern cpuop_func_noret op_c0bc_24_nf; +extern cpuop_func_noret op_c0bc_24_ff; +extern cpuop_func_noret op_c0c0_24_nf; +extern cpuop_func_noret op_c0c0_24_ff; +extern cpuop_func_noret op_c0d0_24_nf; +extern cpuop_func_noret op_c0d0_24_ff; +extern cpuop_func_noret op_c0d8_24_nf; +extern cpuop_func_noret op_c0d8_24_ff; +extern cpuop_func_noret op_c0e0_24_nf; +extern cpuop_func_noret op_c0e0_24_ff; +extern cpuop_func_noret op_c0e8_24_nf; +extern cpuop_func_noret op_c0e8_24_ff; +extern cpuop_func_noret op_c0f0_24_nf; +extern cpuop_func_noret op_c0f0_24_ff; +extern cpuop_func_noret op_c0f8_24_nf; +extern cpuop_func_noret op_c0f8_24_ff; +extern cpuop_func_noret op_c0f9_24_nf; +extern cpuop_func_noret op_c0f9_24_ff; +extern cpuop_func_noret op_c0fa_24_nf; +extern cpuop_func_noret op_c0fa_24_ff; +extern cpuop_func_noret op_c0fb_24_nf; +extern cpuop_func_noret op_c0fb_24_ff; +extern cpuop_func_noret op_c0fc_24_nf; +extern cpuop_func_noret op_c0fc_24_ff; +extern cpuop_func_noret op_c100_24_nf; +extern cpuop_func_noret op_c100_24_ff; +extern cpuop_func_noret op_c108_24_nf; +extern cpuop_func_noret op_c108_24_ff; +extern cpuop_func_noret op_c110_24_nf; +extern cpuop_func_noret op_c110_24_ff; +extern cpuop_func_noret op_c118_24_nf; +extern cpuop_func_noret op_c118_24_ff; +extern cpuop_func_noret op_c120_24_nf; +extern cpuop_func_noret op_c120_24_ff; +extern cpuop_func_noret op_c128_24_nf; +extern cpuop_func_noret op_c128_24_ff; +extern cpuop_func_noret op_c130_24_nf; +extern cpuop_func_noret op_c130_24_ff; +extern cpuop_func_noret op_c138_24_nf; +extern cpuop_func_noret op_c138_24_ff; +extern cpuop_func_noret op_c139_24_nf; +extern cpuop_func_noret op_c139_24_ff; +extern cpuop_func_noret op_c140_24_nf; +extern cpuop_func_noret op_c140_24_ff; +extern cpuop_func_noret op_c148_24_nf; +extern cpuop_func_noret op_c148_24_ff; +extern cpuop_func_noret op_c150_24_nf; +extern cpuop_func_noret op_c150_24_ff; +extern cpuop_func_noret op_c158_24_nf; +extern cpuop_func_noret op_c158_24_ff; +extern cpuop_func_noret op_c160_24_nf; +extern cpuop_func_noret op_c160_24_ff; +extern cpuop_func_noret op_c168_24_nf; +extern cpuop_func_noret op_c168_24_ff; +extern cpuop_func_noret op_c170_24_nf; +extern cpuop_func_noret op_c170_24_ff; +extern cpuop_func_noret op_c178_24_nf; +extern cpuop_func_noret op_c178_24_ff; +extern cpuop_func_noret op_c179_24_nf; +extern cpuop_func_noret op_c179_24_ff; +extern cpuop_func_noret op_c188_24_nf; +extern cpuop_func_noret op_c188_24_ff; +extern cpuop_func_noret op_c190_24_nf; +extern cpuop_func_noret op_c190_24_ff; +extern cpuop_func_noret op_c198_24_nf; +extern cpuop_func_noret op_c198_24_ff; +extern cpuop_func_noret op_c1a0_24_nf; +extern cpuop_func_noret op_c1a0_24_ff; +extern cpuop_func_noret op_c1a8_24_nf; +extern cpuop_func_noret op_c1a8_24_ff; +extern cpuop_func_noret op_c1b0_24_nf; +extern cpuop_func_noret op_c1b0_24_ff; +extern cpuop_func_noret op_c1b8_24_nf; +extern cpuop_func_noret op_c1b8_24_ff; +extern cpuop_func_noret op_c1b9_24_nf; +extern cpuop_func_noret op_c1b9_24_ff; +extern cpuop_func_noret op_c1c0_24_nf; +extern cpuop_func_noret op_c1c0_24_ff; +extern cpuop_func_noret op_c1d0_24_nf; +extern cpuop_func_noret op_c1d0_24_ff; +extern cpuop_func_noret op_c1d8_24_nf; +extern cpuop_func_noret op_c1d8_24_ff; +extern cpuop_func_noret op_c1e0_24_nf; +extern cpuop_func_noret op_c1e0_24_ff; +extern cpuop_func_noret op_c1e8_24_nf; +extern cpuop_func_noret op_c1e8_24_ff; +extern cpuop_func_noret op_c1f0_24_nf; +extern cpuop_func_noret op_c1f0_24_ff; +extern cpuop_func_noret op_c1f8_24_nf; +extern cpuop_func_noret op_c1f8_24_ff; +extern cpuop_func_noret op_c1f9_24_nf; +extern cpuop_func_noret op_c1f9_24_ff; +extern cpuop_func_noret op_c1fa_24_nf; +extern cpuop_func_noret op_c1fa_24_ff; +extern cpuop_func_noret op_c1fb_24_nf; +extern cpuop_func_noret op_c1fb_24_ff; +extern cpuop_func_noret op_c1fc_24_nf; +extern cpuop_func_noret op_c1fc_24_ff; +extern cpuop_func_noret op_d000_24_nf; +extern cpuop_func_noret op_d000_24_ff; +extern cpuop_func_noret op_d010_24_nf; +extern cpuop_func_noret op_d010_24_ff; +extern cpuop_func_noret op_d018_24_nf; +extern cpuop_func_noret op_d018_24_ff; +extern cpuop_func_noret op_d020_24_nf; +extern cpuop_func_noret op_d020_24_ff; +extern cpuop_func_noret op_d028_24_nf; +extern cpuop_func_noret op_d028_24_ff; +extern cpuop_func_noret op_d030_24_nf; +extern cpuop_func_noret op_d030_24_ff; +extern cpuop_func_noret op_d038_24_nf; +extern cpuop_func_noret op_d038_24_ff; +extern cpuop_func_noret op_d039_24_nf; +extern cpuop_func_noret op_d039_24_ff; +extern cpuop_func_noret op_d03a_24_nf; +extern cpuop_func_noret op_d03a_24_ff; +extern cpuop_func_noret op_d03b_24_nf; +extern cpuop_func_noret op_d03b_24_ff; +extern cpuop_func_noret op_d03c_24_nf; +extern cpuop_func_noret op_d03c_24_ff; +extern cpuop_func_noret op_d040_24_nf; +extern cpuop_func_noret op_d040_24_ff; +extern cpuop_func_noret op_d048_24_nf; +extern cpuop_func_noret op_d048_24_ff; +extern cpuop_func_noret op_d050_24_nf; +extern cpuop_func_noret op_d050_24_ff; +extern cpuop_func_noret op_d058_24_nf; +extern cpuop_func_noret op_d058_24_ff; +extern cpuop_func_noret op_d060_24_nf; +extern cpuop_func_noret op_d060_24_ff; +extern cpuop_func_noret op_d068_24_nf; +extern cpuop_func_noret op_d068_24_ff; +extern cpuop_func_noret op_d070_24_nf; +extern cpuop_func_noret op_d070_24_ff; +extern cpuop_func_noret op_d078_24_nf; +extern cpuop_func_noret op_d078_24_ff; +extern cpuop_func_noret op_d079_24_nf; +extern cpuop_func_noret op_d079_24_ff; +extern cpuop_func_noret op_d07a_24_nf; +extern cpuop_func_noret op_d07a_24_ff; +extern cpuop_func_noret op_d07b_24_nf; +extern cpuop_func_noret op_d07b_24_ff; +extern cpuop_func_noret op_d07c_24_nf; +extern cpuop_func_noret op_d07c_24_ff; +extern cpuop_func_noret op_d080_24_nf; +extern cpuop_func_noret op_d080_24_ff; +extern cpuop_func_noret op_d088_24_nf; +extern cpuop_func_noret op_d088_24_ff; +extern cpuop_func_noret op_d090_24_nf; +extern cpuop_func_noret op_d090_24_ff; +extern cpuop_func_noret op_d098_24_nf; +extern cpuop_func_noret op_d098_24_ff; +extern cpuop_func_noret op_d0a0_24_nf; +extern cpuop_func_noret op_d0a0_24_ff; +extern cpuop_func_noret op_d0a8_24_nf; +extern cpuop_func_noret op_d0a8_24_ff; +extern cpuop_func_noret op_d0b0_24_nf; +extern cpuop_func_noret op_d0b0_24_ff; +extern cpuop_func_noret op_d0b8_24_nf; +extern cpuop_func_noret op_d0b8_24_ff; +extern cpuop_func_noret op_d0b9_24_nf; +extern cpuop_func_noret op_d0b9_24_ff; +extern cpuop_func_noret op_d0ba_24_nf; +extern cpuop_func_noret op_d0ba_24_ff; +extern cpuop_func_noret op_d0bb_24_nf; +extern cpuop_func_noret op_d0bb_24_ff; +extern cpuop_func_noret op_d0bc_24_nf; +extern cpuop_func_noret op_d0bc_24_ff; +extern cpuop_func_noret op_d0c0_24_nf; +extern cpuop_func_noret op_d0c0_24_ff; +extern cpuop_func_noret op_d0c8_24_nf; +extern cpuop_func_noret op_d0c8_24_ff; +extern cpuop_func_noret op_d0d0_24_nf; +extern cpuop_func_noret op_d0d0_24_ff; +extern cpuop_func_noret op_d0d8_24_nf; +extern cpuop_func_noret op_d0d8_24_ff; +extern cpuop_func_noret op_d0e0_24_nf; +extern cpuop_func_noret op_d0e0_24_ff; +extern cpuop_func_noret op_d0e8_24_nf; +extern cpuop_func_noret op_d0e8_24_ff; +extern cpuop_func_noret op_d0f0_24_nf; +extern cpuop_func_noret op_d0f0_24_ff; +extern cpuop_func_noret op_d0f8_24_nf; +extern cpuop_func_noret op_d0f8_24_ff; +extern cpuop_func_noret op_d0f9_24_nf; +extern cpuop_func_noret op_d0f9_24_ff; +extern cpuop_func_noret op_d0fa_24_nf; +extern cpuop_func_noret op_d0fa_24_ff; +extern cpuop_func_noret op_d0fb_24_nf; +extern cpuop_func_noret op_d0fb_24_ff; +extern cpuop_func_noret op_d0fc_24_nf; +extern cpuop_func_noret op_d0fc_24_ff; +extern cpuop_func_noret op_d100_24_nf; +extern cpuop_func_noret op_d100_24_ff; +extern cpuop_func_noret op_d108_24_nf; +extern cpuop_func_noret op_d108_24_ff; +extern cpuop_func_noret op_d110_24_nf; +extern cpuop_func_noret op_d110_24_ff; +extern cpuop_func_noret op_d118_24_nf; +extern cpuop_func_noret op_d118_24_ff; +extern cpuop_func_noret op_d120_24_nf; +extern cpuop_func_noret op_d120_24_ff; +extern cpuop_func_noret op_d128_24_nf; +extern cpuop_func_noret op_d128_24_ff; +extern cpuop_func_noret op_d130_24_nf; +extern cpuop_func_noret op_d130_24_ff; +extern cpuop_func_noret op_d138_24_nf; +extern cpuop_func_noret op_d138_24_ff; +extern cpuop_func_noret op_d139_24_nf; +extern cpuop_func_noret op_d139_24_ff; +extern cpuop_func_noret op_d140_24_nf; +extern cpuop_func_noret op_d140_24_ff; +extern cpuop_func_noret op_d148_24_nf; +extern cpuop_func_noret op_d148_24_ff; +extern cpuop_func_noret op_d150_24_nf; +extern cpuop_func_noret op_d150_24_ff; +extern cpuop_func_noret op_d158_24_nf; +extern cpuop_func_noret op_d158_24_ff; +extern cpuop_func_noret op_d160_24_nf; +extern cpuop_func_noret op_d160_24_ff; +extern cpuop_func_noret op_d168_24_nf; +extern cpuop_func_noret op_d168_24_ff; +extern cpuop_func_noret op_d170_24_nf; +extern cpuop_func_noret op_d170_24_ff; +extern cpuop_func_noret op_d178_24_nf; +extern cpuop_func_noret op_d178_24_ff; +extern cpuop_func_noret op_d179_24_nf; +extern cpuop_func_noret op_d179_24_ff; +extern cpuop_func_noret op_d180_24_nf; +extern cpuop_func_noret op_d180_24_ff; +extern cpuop_func_noret op_d188_24_nf; +extern cpuop_func_noret op_d188_24_ff; +extern cpuop_func_noret op_d190_24_nf; +extern cpuop_func_noret op_d190_24_ff; +extern cpuop_func_noret op_d198_24_nf; +extern cpuop_func_noret op_d198_24_ff; +extern cpuop_func_noret op_d1a0_24_nf; +extern cpuop_func_noret op_d1a0_24_ff; +extern cpuop_func_noret op_d1a8_24_nf; +extern cpuop_func_noret op_d1a8_24_ff; +extern cpuop_func_noret op_d1b0_24_nf; +extern cpuop_func_noret op_d1b0_24_ff; +extern cpuop_func_noret op_d1b8_24_nf; +extern cpuop_func_noret op_d1b8_24_ff; +extern cpuop_func_noret op_d1b9_24_nf; +extern cpuop_func_noret op_d1b9_24_ff; +extern cpuop_func_noret op_d1c0_24_nf; +extern cpuop_func_noret op_d1c0_24_ff; +extern cpuop_func_noret op_d1c8_24_nf; +extern cpuop_func_noret op_d1c8_24_ff; +extern cpuop_func_noret op_d1d0_24_nf; +extern cpuop_func_noret op_d1d0_24_ff; +extern cpuop_func_noret op_d1d8_24_nf; +extern cpuop_func_noret op_d1d8_24_ff; +extern cpuop_func_noret op_d1e0_24_nf; +extern cpuop_func_noret op_d1e0_24_ff; +extern cpuop_func_noret op_d1e8_24_nf; +extern cpuop_func_noret op_d1e8_24_ff; +extern cpuop_func_noret op_d1f0_24_nf; +extern cpuop_func_noret op_d1f0_24_ff; +extern cpuop_func_noret op_d1f8_24_nf; +extern cpuop_func_noret op_d1f8_24_ff; +extern cpuop_func_noret op_d1f9_24_nf; +extern cpuop_func_noret op_d1f9_24_ff; +extern cpuop_func_noret op_d1fa_24_nf; +extern cpuop_func_noret op_d1fa_24_ff; +extern cpuop_func_noret op_d1fb_24_nf; +extern cpuop_func_noret op_d1fb_24_ff; +extern cpuop_func_noret op_d1fc_24_nf; +extern cpuop_func_noret op_d1fc_24_ff; +extern cpuop_func_noret op_e000_24_nf; +extern cpuop_func_noret op_e000_24_ff; +extern cpuop_func_noret op_e008_24_nf; +extern cpuop_func_noret op_e008_24_ff; +extern cpuop_func_noret op_e010_24_nf; +extern cpuop_func_noret op_e010_24_ff; +extern cpuop_func_noret op_e018_24_nf; +extern cpuop_func_noret op_e018_24_ff; +extern cpuop_func_noret op_e020_24_nf; +extern cpuop_func_noret op_e020_24_ff; +extern cpuop_func_noret op_e028_24_nf; +extern cpuop_func_noret op_e028_24_ff; +extern cpuop_func_noret op_e030_24_nf; +extern cpuop_func_noret op_e030_24_ff; +extern cpuop_func_noret op_e038_24_nf; +extern cpuop_func_noret op_e038_24_ff; +extern cpuop_func_noret op_e040_24_nf; +extern cpuop_func_noret op_e040_24_ff; +extern cpuop_func_noret op_e048_24_nf; +extern cpuop_func_noret op_e048_24_ff; +extern cpuop_func_noret op_e050_24_nf; +extern cpuop_func_noret op_e050_24_ff; +extern cpuop_func_noret op_e058_24_nf; +extern cpuop_func_noret op_e058_24_ff; +extern cpuop_func_noret op_e060_24_nf; +extern cpuop_func_noret op_e060_24_ff; +extern cpuop_func_noret op_e068_24_nf; +extern cpuop_func_noret op_e068_24_ff; +extern cpuop_func_noret op_e070_24_nf; +extern cpuop_func_noret op_e070_24_ff; +extern cpuop_func_noret op_e078_24_nf; +extern cpuop_func_noret op_e078_24_ff; +extern cpuop_func_noret op_e080_24_nf; +extern cpuop_func_noret op_e080_24_ff; +extern cpuop_func_noret op_e088_24_nf; +extern cpuop_func_noret op_e088_24_ff; +extern cpuop_func_noret op_e090_24_nf; +extern cpuop_func_noret op_e090_24_ff; +extern cpuop_func_noret op_e098_24_nf; +extern cpuop_func_noret op_e098_24_ff; +extern cpuop_func_noret op_e0a0_24_nf; +extern cpuop_func_noret op_e0a0_24_ff; +extern cpuop_func_noret op_e0a8_24_nf; +extern cpuop_func_noret op_e0a8_24_ff; +extern cpuop_func_noret op_e0b0_24_nf; +extern cpuop_func_noret op_e0b0_24_ff; +extern cpuop_func_noret op_e0b8_24_nf; +extern cpuop_func_noret op_e0b8_24_ff; +extern cpuop_func_noret op_e0d0_24_nf; +extern cpuop_func_noret op_e0d0_24_ff; +extern cpuop_func_noret op_e0d8_24_nf; +extern cpuop_func_noret op_e0d8_24_ff; +extern cpuop_func_noret op_e0e0_24_nf; +extern cpuop_func_noret op_e0e0_24_ff; +extern cpuop_func_noret op_e0e8_24_nf; +extern cpuop_func_noret op_e0e8_24_ff; +extern cpuop_func_noret op_e0f0_24_nf; +extern cpuop_func_noret op_e0f0_24_ff; +extern cpuop_func_noret op_e0f8_24_nf; +extern cpuop_func_noret op_e0f8_24_ff; +extern cpuop_func_noret op_e0f9_24_nf; +extern cpuop_func_noret op_e0f9_24_ff; +extern cpuop_func_noret op_e100_24_nf; +extern cpuop_func_noret op_e100_24_ff; +extern cpuop_func_noret op_e108_24_nf; +extern cpuop_func_noret op_e108_24_ff; +extern cpuop_func_noret op_e110_24_nf; +extern cpuop_func_noret op_e110_24_ff; +extern cpuop_func_noret op_e118_24_nf; +extern cpuop_func_noret op_e118_24_ff; +extern cpuop_func_noret op_e120_24_nf; +extern cpuop_func_noret op_e120_24_ff; +extern cpuop_func_noret op_e128_24_nf; +extern cpuop_func_noret op_e128_24_ff; +extern cpuop_func_noret op_e130_24_nf; +extern cpuop_func_noret op_e130_24_ff; +extern cpuop_func_noret op_e138_24_nf; +extern cpuop_func_noret op_e138_24_ff; +extern cpuop_func_noret op_e140_24_nf; +extern cpuop_func_noret op_e140_24_ff; +extern cpuop_func_noret op_e148_24_nf; +extern cpuop_func_noret op_e148_24_ff; +extern cpuop_func_noret op_e150_24_nf; +extern cpuop_func_noret op_e150_24_ff; +extern cpuop_func_noret op_e158_24_nf; +extern cpuop_func_noret op_e158_24_ff; +extern cpuop_func_noret op_e160_24_nf; +extern cpuop_func_noret op_e160_24_ff; +extern cpuop_func_noret op_e168_24_nf; +extern cpuop_func_noret op_e168_24_ff; +extern cpuop_func_noret op_e170_24_nf; +extern cpuop_func_noret op_e170_24_ff; +extern cpuop_func_noret op_e178_24_nf; +extern cpuop_func_noret op_e178_24_ff; +extern cpuop_func_noret op_e180_24_nf; +extern cpuop_func_noret op_e180_24_ff; +extern cpuop_func_noret op_e188_24_nf; +extern cpuop_func_noret op_e188_24_ff; +extern cpuop_func_noret op_e190_24_nf; +extern cpuop_func_noret op_e190_24_ff; +extern cpuop_func_noret op_e198_24_nf; +extern cpuop_func_noret op_e198_24_ff; +extern cpuop_func_noret op_e1a0_24_nf; +extern cpuop_func_noret op_e1a0_24_ff; +extern cpuop_func_noret op_e1a8_24_nf; +extern cpuop_func_noret op_e1a8_24_ff; +extern cpuop_func_noret op_e1b0_24_nf; +extern cpuop_func_noret op_e1b0_24_ff; +extern cpuop_func_noret op_e1b8_24_nf; +extern cpuop_func_noret op_e1b8_24_ff; +extern cpuop_func_noret op_e1d0_24_nf; +extern cpuop_func_noret op_e1d0_24_ff; +extern cpuop_func_noret op_e1d8_24_nf; +extern cpuop_func_noret op_e1d8_24_ff; +extern cpuop_func_noret op_e1e0_24_nf; +extern cpuop_func_noret op_e1e0_24_ff; +extern cpuop_func_noret op_e1e8_24_nf; +extern cpuop_func_noret op_e1e8_24_ff; +extern cpuop_func_noret op_e1f0_24_nf; +extern cpuop_func_noret op_e1f0_24_ff; +extern cpuop_func_noret op_e1f8_24_nf; +extern cpuop_func_noret op_e1f8_24_ff; +extern cpuop_func_noret op_e1f9_24_nf; +extern cpuop_func_noret op_e1f9_24_ff; +extern cpuop_func_noret op_e2d0_24_nf; +extern cpuop_func_noret op_e2d0_24_ff; +extern cpuop_func_noret op_e2d8_24_nf; +extern cpuop_func_noret op_e2d8_24_ff; +extern cpuop_func_noret op_e2e0_24_nf; +extern cpuop_func_noret op_e2e0_24_ff; +extern cpuop_func_noret op_e2e8_24_nf; +extern cpuop_func_noret op_e2e8_24_ff; +extern cpuop_func_noret op_e2f0_24_nf; +extern cpuop_func_noret op_e2f0_24_ff; +extern cpuop_func_noret op_e2f8_24_nf; +extern cpuop_func_noret op_e2f8_24_ff; +extern cpuop_func_noret op_e2f9_24_nf; +extern cpuop_func_noret op_e2f9_24_ff; +extern cpuop_func_noret op_e3d0_24_nf; +extern cpuop_func_noret op_e3d0_24_ff; +extern cpuop_func_noret op_e3d8_24_nf; +extern cpuop_func_noret op_e3d8_24_ff; +extern cpuop_func_noret op_e3e0_24_nf; +extern cpuop_func_noret op_e3e0_24_ff; +extern cpuop_func_noret op_e3e8_24_nf; +extern cpuop_func_noret op_e3e8_24_ff; +extern cpuop_func_noret op_e3f0_24_nf; +extern cpuop_func_noret op_e3f0_24_ff; +extern cpuop_func_noret op_e3f8_24_nf; +extern cpuop_func_noret op_e3f8_24_ff; +extern cpuop_func_noret op_e3f9_24_nf; +extern cpuop_func_noret op_e3f9_24_ff; +extern cpuop_func_noret op_e4d0_24_nf; +extern cpuop_func_noret op_e4d0_24_ff; +extern cpuop_func_noret op_e4d8_24_nf; +extern cpuop_func_noret op_e4d8_24_ff; +extern cpuop_func_noret op_e4e0_24_nf; +extern cpuop_func_noret op_e4e0_24_ff; +extern cpuop_func_noret op_e4e8_24_nf; +extern cpuop_func_noret op_e4e8_24_ff; +extern cpuop_func_noret op_e4f0_24_nf; +extern cpuop_func_noret op_e4f0_24_ff; +extern cpuop_func_noret op_e4f8_24_nf; +extern cpuop_func_noret op_e4f8_24_ff; +extern cpuop_func_noret op_e4f9_24_nf; +extern cpuop_func_noret op_e4f9_24_ff; +extern cpuop_func_noret op_e5d0_24_nf; +extern cpuop_func_noret op_e5d0_24_ff; +extern cpuop_func_noret op_e5d8_24_nf; +extern cpuop_func_noret op_e5d8_24_ff; +extern cpuop_func_noret op_e5e0_24_nf; +extern cpuop_func_noret op_e5e0_24_ff; +extern cpuop_func_noret op_e5e8_24_nf; +extern cpuop_func_noret op_e5e8_24_ff; +extern cpuop_func_noret op_e5f0_24_nf; +extern cpuop_func_noret op_e5f0_24_ff; +extern cpuop_func_noret op_e5f8_24_nf; +extern cpuop_func_noret op_e5f8_24_ff; +extern cpuop_func_noret op_e5f9_24_nf; +extern cpuop_func_noret op_e5f9_24_ff; +extern cpuop_func_noret op_e6d0_24_nf; +extern cpuop_func_noret op_e6d0_24_ff; +extern cpuop_func_noret op_e6d8_24_nf; +extern cpuop_func_noret op_e6d8_24_ff; +extern cpuop_func_noret op_e6e0_24_nf; +extern cpuop_func_noret op_e6e0_24_ff; +extern cpuop_func_noret op_e6e8_24_nf; +extern cpuop_func_noret op_e6e8_24_ff; +extern cpuop_func_noret op_e6f0_24_nf; +extern cpuop_func_noret op_e6f0_24_ff; +extern cpuop_func_noret op_e6f8_24_nf; +extern cpuop_func_noret op_e6f8_24_ff; +extern cpuop_func_noret op_e6f9_24_nf; +extern cpuop_func_noret op_e6f9_24_ff; +extern cpuop_func_noret op_e7d0_24_nf; +extern cpuop_func_noret op_e7d0_24_ff; +extern cpuop_func_noret op_e7d8_24_nf; +extern cpuop_func_noret op_e7d8_24_ff; +extern cpuop_func_noret op_e7e0_24_nf; +extern cpuop_func_noret op_e7e0_24_ff; +extern cpuop_func_noret op_e7e8_24_nf; +extern cpuop_func_noret op_e7e8_24_ff; +extern cpuop_func_noret op_e7f0_24_nf; +extern cpuop_func_noret op_e7f0_24_ff; +extern cpuop_func_noret op_e7f8_24_nf; +extern cpuop_func_noret op_e7f8_24_ff; +extern cpuop_func_noret op_e7f9_24_nf; +extern cpuop_func_noret op_e7f9_24_ff; +extern cpuop_func_noret op_e8c0_24_nf; +extern cpuop_func_noret op_e8c0_24_ff; +extern cpuop_func_noret op_e8d0_24_nf; +extern cpuop_func_noret op_e8d0_24_ff; +extern cpuop_func_noret op_e8e8_24_nf; +extern cpuop_func_noret op_e8e8_24_ff; +extern cpuop_func_noret op_e8f0_24_nf; +extern cpuop_func_noret op_e8f0_24_ff; +extern cpuop_func_noret op_e8f8_24_nf; +extern cpuop_func_noret op_e8f8_24_ff; +extern cpuop_func_noret op_e8f9_24_nf; +extern cpuop_func_noret op_e8f9_24_ff; +extern cpuop_func_noret op_e8fa_24_nf; +extern cpuop_func_noret op_e8fa_24_ff; +extern cpuop_func_noret op_e8fb_24_nf; +extern cpuop_func_noret op_e8fb_24_ff; +extern cpuop_func_noret op_e9c0_24_nf; +extern cpuop_func_noret op_e9c0_24_ff; +extern cpuop_func_noret op_e9d0_24_nf; +extern cpuop_func_noret op_e9d0_24_ff; +extern cpuop_func_noret op_e9e8_24_nf; +extern cpuop_func_noret op_e9e8_24_ff; +extern cpuop_func_noret op_e9f0_24_nf; +extern cpuop_func_noret op_e9f0_24_ff; +extern cpuop_func_noret op_e9f8_24_nf; +extern cpuop_func_noret op_e9f8_24_ff; +extern cpuop_func_noret op_e9f9_24_nf; +extern cpuop_func_noret op_e9f9_24_ff; +extern cpuop_func_noret op_e9fa_24_nf; +extern cpuop_func_noret op_e9fa_24_ff; +extern cpuop_func_noret op_e9fb_24_nf; +extern cpuop_func_noret op_e9fb_24_ff; +extern cpuop_func_noret op_eac0_24_nf; +extern cpuop_func_noret op_eac0_24_ff; +extern cpuop_func_noret op_ead0_24_nf; +extern cpuop_func_noret op_ead0_24_ff; +extern cpuop_func_noret op_eae8_24_nf; +extern cpuop_func_noret op_eae8_24_ff; +extern cpuop_func_noret op_eaf0_24_nf; +extern cpuop_func_noret op_eaf0_24_ff; +extern cpuop_func_noret op_eaf8_24_nf; +extern cpuop_func_noret op_eaf8_24_ff; +extern cpuop_func_noret op_eaf9_24_nf; +extern cpuop_func_noret op_eaf9_24_ff; +extern cpuop_func_noret op_ebc0_24_nf; +extern cpuop_func_noret op_ebc0_24_ff; +extern cpuop_func_noret op_ebd0_24_nf; +extern cpuop_func_noret op_ebd0_24_ff; +extern cpuop_func_noret op_ebe8_24_nf; +extern cpuop_func_noret op_ebe8_24_ff; +extern cpuop_func_noret op_ebf0_24_nf; +extern cpuop_func_noret op_ebf0_24_ff; +extern cpuop_func_noret op_ebf8_24_nf; +extern cpuop_func_noret op_ebf8_24_ff; +extern cpuop_func_noret op_ebf9_24_nf; +extern cpuop_func_noret op_ebf9_24_ff; +extern cpuop_func_noret op_ebfa_24_nf; +extern cpuop_func_noret op_ebfa_24_ff; +extern cpuop_func_noret op_ebfb_24_nf; +extern cpuop_func_noret op_ebfb_24_ff; +extern cpuop_func_noret op_ecc0_24_nf; +extern cpuop_func_noret op_ecc0_24_ff; +extern cpuop_func_noret op_ecd0_24_nf; +extern cpuop_func_noret op_ecd0_24_ff; +extern cpuop_func_noret op_ece8_24_nf; +extern cpuop_func_noret op_ece8_24_ff; +extern cpuop_func_noret op_ecf0_24_nf; +extern cpuop_func_noret op_ecf0_24_ff; +extern cpuop_func_noret op_ecf8_24_nf; +extern cpuop_func_noret op_ecf8_24_ff; +extern cpuop_func_noret op_ecf9_24_nf; +extern cpuop_func_noret op_ecf9_24_ff; +extern cpuop_func_noret op_edc0_24_nf; +extern cpuop_func_noret op_edc0_24_ff; +extern cpuop_func_noret op_edd0_24_nf; +extern cpuop_func_noret op_edd0_24_ff; +extern cpuop_func_noret op_ede8_24_nf; +extern cpuop_func_noret op_ede8_24_ff; +extern cpuop_func_noret op_edf0_24_nf; +extern cpuop_func_noret op_edf0_24_ff; +extern cpuop_func_noret op_edf8_24_nf; +extern cpuop_func_noret op_edf8_24_ff; +extern cpuop_func_noret op_edf9_24_nf; +extern cpuop_func_noret op_edf9_24_ff; +extern cpuop_func_noret op_edfa_24_nf; +extern cpuop_func_noret op_edfa_24_ff; +extern cpuop_func_noret op_edfb_24_nf; +extern cpuop_func_noret op_edfb_24_ff; +extern cpuop_func_noret op_eec0_24_nf; +extern cpuop_func_noret op_eec0_24_ff; +extern cpuop_func_noret op_eed0_24_nf; +extern cpuop_func_noret op_eed0_24_ff; +extern cpuop_func_noret op_eee8_24_nf; +extern cpuop_func_noret op_eee8_24_ff; +extern cpuop_func_noret op_eef0_24_nf; +extern cpuop_func_noret op_eef0_24_ff; +extern cpuop_func_noret op_eef8_24_nf; +extern cpuop_func_noret op_eef8_24_ff; +extern cpuop_func_noret op_eef9_24_nf; +extern cpuop_func_noret op_eef9_24_ff; +extern cpuop_func_noret op_efc0_24_nf; +extern cpuop_func_noret op_efc0_24_ff; +extern cpuop_func_noret op_efd0_24_nf; +extern cpuop_func_noret op_efd0_24_ff; +extern cpuop_func_noret op_efe8_24_nf; +extern cpuop_func_noret op_efe8_24_ff; +extern cpuop_func_noret op_eff0_24_nf; +extern cpuop_func_noret op_eff0_24_ff; +extern cpuop_func_noret op_eff8_24_nf; +extern cpuop_func_noret op_eff8_24_ff; +extern cpuop_func_noret op_eff9_24_nf; +extern cpuop_func_noret op_eff9_24_ff; +extern cpuop_func_noret op_f000_24_nf; +extern cpuop_func_noret op_f000_24_ff; +extern cpuop_func_noret op_f008_24_nf; +extern cpuop_func_noret op_f008_24_ff; +extern cpuop_func_noret op_f010_24_nf; +extern cpuop_func_noret op_f010_24_ff; +extern cpuop_func_noret op_f018_24_nf; +extern cpuop_func_noret op_f018_24_ff; +extern cpuop_func_noret op_f020_24_nf; +extern cpuop_func_noret op_f020_24_ff; +extern cpuop_func_noret op_f028_24_nf; +extern cpuop_func_noret op_f028_24_ff; +extern cpuop_func_noret op_f030_24_nf; +extern cpuop_func_noret op_f030_24_ff; +extern cpuop_func_noret op_f038_24_nf; +extern cpuop_func_noret op_f038_24_ff; +extern cpuop_func_noret op_f039_24_nf; +extern cpuop_func_noret op_f039_24_ff; +extern cpuop_func_noret op_f200_24_nf; +extern cpuop_func_noret op_f200_24_ff; +extern cpuop_func_noret op_f208_24_nf; +extern cpuop_func_noret op_f208_24_ff; +extern cpuop_func_noret op_f210_24_nf; +extern cpuop_func_noret op_f210_24_ff; +extern cpuop_func_noret op_f218_24_nf; +extern cpuop_func_noret op_f218_24_ff; +extern cpuop_func_noret op_f220_24_nf; +extern cpuop_func_noret op_f220_24_ff; +extern cpuop_func_noret op_f228_24_nf; +extern cpuop_func_noret op_f228_24_ff; +extern cpuop_func_noret op_f230_24_nf; +extern cpuop_func_noret op_f230_24_ff; +extern cpuop_func_noret op_f238_24_nf; +extern cpuop_func_noret op_f238_24_ff; +extern cpuop_func_noret op_f239_24_nf; +extern cpuop_func_noret op_f239_24_ff; +extern cpuop_func_noret op_f23a_24_nf; +extern cpuop_func_noret op_f23a_24_ff; +extern cpuop_func_noret op_f23b_24_nf; +extern cpuop_func_noret op_f23b_24_ff; +extern cpuop_func_noret op_f23c_24_nf; +extern cpuop_func_noret op_f23c_24_ff; +extern cpuop_func_noret op_f240_24_nf; +extern cpuop_func_noret op_f240_24_ff; +extern cpuop_func_noret op_f248_24_nf; +extern cpuop_func_noret op_f248_24_ff; +extern cpuop_func_noret op_f250_24_nf; +extern cpuop_func_noret op_f250_24_ff; +extern cpuop_func_noret op_f258_24_nf; +extern cpuop_func_noret op_f258_24_ff; +extern cpuop_func_noret op_f260_24_nf; +extern cpuop_func_noret op_f260_24_ff; +extern cpuop_func_noret op_f268_24_nf; +extern cpuop_func_noret op_f268_24_ff; +extern cpuop_func_noret op_f270_24_nf; +extern cpuop_func_noret op_f270_24_ff; +extern cpuop_func_noret op_f278_24_nf; +extern cpuop_func_noret op_f278_24_ff; +extern cpuop_func_noret op_f279_24_nf; +extern cpuop_func_noret op_f279_24_ff; +extern cpuop_func_noret op_f27a_24_nf; +extern cpuop_func_noret op_f27a_24_ff; +extern cpuop_func_noret op_f27b_24_nf; +extern cpuop_func_noret op_f27b_24_ff; +extern cpuop_func_noret op_f27c_24_nf; +extern cpuop_func_noret op_f27c_24_ff; +extern cpuop_func_noret op_f280_24_nf; +extern cpuop_func_noret op_f280_24_ff; +extern cpuop_func_noret op_f2c0_24_nf; +extern cpuop_func_noret op_f2c0_24_ff; +extern cpuop_func_noret op_f310_24_nf; +extern cpuop_func_noret op_f310_24_ff; +extern cpuop_func_noret op_f320_24_nf; +extern cpuop_func_noret op_f320_24_ff; +extern cpuop_func_noret op_f328_24_nf; +extern cpuop_func_noret op_f328_24_ff; +extern cpuop_func_noret op_f330_24_nf; +extern cpuop_func_noret op_f330_24_ff; +extern cpuop_func_noret op_f338_24_nf; +extern cpuop_func_noret op_f338_24_ff; +extern cpuop_func_noret op_f339_24_nf; +extern cpuop_func_noret op_f339_24_ff; +extern cpuop_func_noret op_f350_24_nf; +extern cpuop_func_noret op_f350_24_ff; +extern cpuop_func_noret op_f358_24_nf; +extern cpuop_func_noret op_f358_24_ff; +extern cpuop_func_noret op_f368_24_nf; +extern cpuop_func_noret op_f368_24_ff; +extern cpuop_func_noret op_f370_24_nf; +extern cpuop_func_noret op_f370_24_ff; +extern cpuop_func_noret op_f378_24_nf; +extern cpuop_func_noret op_f378_24_ff; +extern cpuop_func_noret op_f379_24_nf; +extern cpuop_func_noret op_f379_24_ff; +extern cpuop_func_noret op_f37a_24_nf; +extern cpuop_func_noret op_f37a_24_ff; +extern cpuop_func_noret op_f37b_24_nf; +extern cpuop_func_noret op_f37b_24_ff; +extern cpuop_func_noret op_f408_24_nf; +extern cpuop_func_noret op_f408_24_ff; +extern cpuop_func_noret op_f410_24_nf; +extern cpuop_func_noret op_f410_24_ff; +extern cpuop_func_noret op_f418_24_nf; +extern cpuop_func_noret op_f418_24_ff; +extern cpuop_func_noret op_f419_24_nf; +extern cpuop_func_noret op_f419_24_ff; +extern cpuop_func_noret op_f41a_24_nf; +extern cpuop_func_noret op_f41a_24_ff; +extern cpuop_func_noret op_f41b_24_nf; +extern cpuop_func_noret op_f41b_24_ff; +extern cpuop_func_noret op_f41c_24_nf; +extern cpuop_func_noret op_f41c_24_ff; +extern cpuop_func_noret op_f41d_24_nf; +extern cpuop_func_noret op_f41d_24_ff; +extern cpuop_func_noret op_f41e_24_nf; +extern cpuop_func_noret op_f41e_24_ff; +extern cpuop_func_noret op_f41f_24_nf; +extern cpuop_func_noret op_f41f_24_ff; +extern cpuop_func_noret op_f428_24_nf; +extern cpuop_func_noret op_f428_24_ff; +extern cpuop_func_noret op_f430_24_nf; +extern cpuop_func_noret op_f430_24_ff; +extern cpuop_func_noret op_f438_24_nf; +extern cpuop_func_noret op_f438_24_ff; +extern cpuop_func_noret op_f439_24_nf; +extern cpuop_func_noret op_f439_24_ff; +extern cpuop_func_noret op_f43a_24_nf; +extern cpuop_func_noret op_f43a_24_ff; +extern cpuop_func_noret op_f43b_24_nf; +extern cpuop_func_noret op_f43b_24_ff; +extern cpuop_func_noret op_f43c_24_nf; +extern cpuop_func_noret op_f43c_24_ff; +extern cpuop_func_noret op_f43d_24_nf; +extern cpuop_func_noret op_f43d_24_ff; +extern cpuop_func_noret op_f43e_24_nf; +extern cpuop_func_noret op_f43e_24_ff; +extern cpuop_func_noret op_f43f_24_nf; +extern cpuop_func_noret op_f43f_24_ff; +extern cpuop_func_noret op_f500_24_nf; +extern cpuop_func_noret op_f500_24_ff; +extern cpuop_func_noret op_f508_24_nf; +extern cpuop_func_noret op_f508_24_ff; +extern cpuop_func_noret op_f510_24_nf; +extern cpuop_func_noret op_f510_24_ff; +extern cpuop_func_noret op_f518_24_nf; +extern cpuop_func_noret op_f518_24_ff; +extern cpuop_func_noret op_f548_24_nf; +extern cpuop_func_noret op_f548_24_ff; +extern cpuop_func_noret op_f568_24_nf; +extern cpuop_func_noret op_f568_24_ff; +extern cpuop_func_noret op_f588_24_nf; +extern cpuop_func_noret op_f588_24_ff; +extern cpuop_func_noret op_f5c8_24_nf; +extern cpuop_func_noret op_f5c8_24_ff; +extern cpuop_func_noret op_f600_24_nf; +extern cpuop_func_noret op_f600_24_ff; +extern cpuop_func_noret op_f608_24_nf; +extern cpuop_func_noret op_f608_24_ff; +extern cpuop_func_noret op_f610_24_nf; +extern cpuop_func_noret op_f610_24_ff; +extern cpuop_func_noret op_f618_24_nf; +extern cpuop_func_noret op_f618_24_ff; +extern cpuop_func_noret op_f620_24_nf; +extern cpuop_func_noret op_f620_24_ff; +extern cpuop_func_noret op_f800_24_nf; +extern cpuop_func_noret op_f800_24_ff; +extern cpuop_func_noret op_003c_25_nf; +extern cpuop_func_noret op_003c_25_ff; +extern cpuop_func_noret op_007c_25_nf; +extern cpuop_func_noret op_007c_25_ff; +extern cpuop_func_noret op_023c_25_nf; +extern cpuop_func_noret op_023c_25_ff; +extern cpuop_func_noret op_027c_25_nf; +extern cpuop_func_noret op_027c_25_ff; +extern cpuop_func_noret op_0a3c_25_nf; +extern cpuop_func_noret op_0a3c_25_ff; +extern cpuop_func_noret op_0a7c_25_nf; +extern cpuop_func_noret op_0a7c_25_ff; +extern cpuop_func_noret op_0ad0_25_nf; +extern cpuop_func_noret op_0ad0_25_ff; +extern cpuop_func_noret op_0ad8_25_nf; +extern cpuop_func_noret op_0ad8_25_ff; +extern cpuop_func_noret op_0ae0_25_nf; +extern cpuop_func_noret op_0ae0_25_ff; +extern cpuop_func_noret op_0ae8_25_nf; +extern cpuop_func_noret op_0ae8_25_ff; +extern cpuop_func_noret op_0af0_25_nf; +extern cpuop_func_noret op_0af0_25_ff; +extern cpuop_func_noret op_0af8_25_nf; +extern cpuop_func_noret op_0af8_25_ff; +extern cpuop_func_noret op_0af9_25_nf; +extern cpuop_func_noret op_0af9_25_ff; +extern cpuop_func_noret op_0cd0_25_nf; +extern cpuop_func_noret op_0cd0_25_ff; +extern cpuop_func_noret op_0cd8_25_nf; +extern cpuop_func_noret op_0cd8_25_ff; +extern cpuop_func_noret op_0ce0_25_nf; +extern cpuop_func_noret op_0ce0_25_ff; +extern cpuop_func_noret op_0ce8_25_nf; +extern cpuop_func_noret op_0ce8_25_ff; +extern cpuop_func_noret op_0cf0_25_nf; +extern cpuop_func_noret op_0cf0_25_ff; +extern cpuop_func_noret op_0cf8_25_nf; +extern cpuop_func_noret op_0cf8_25_ff; +extern cpuop_func_noret op_0cf9_25_nf; +extern cpuop_func_noret op_0cf9_25_ff; +extern cpuop_func_noret op_0cfc_25_nf; +extern cpuop_func_noret op_0cfc_25_ff; +extern cpuop_func_noret op_0e10_25_nf; +extern cpuop_func_noret op_0e10_25_ff; +extern cpuop_func_noret op_0e18_25_nf; +extern cpuop_func_noret op_0e18_25_ff; +extern cpuop_func_noret op_0e20_25_nf; +extern cpuop_func_noret op_0e20_25_ff; +extern cpuop_func_noret op_0e28_25_nf; +extern cpuop_func_noret op_0e28_25_ff; +extern cpuop_func_noret op_0e30_25_nf; +extern cpuop_func_noret op_0e30_25_ff; +extern cpuop_func_noret op_0e38_25_nf; +extern cpuop_func_noret op_0e38_25_ff; +extern cpuop_func_noret op_0e39_25_nf; +extern cpuop_func_noret op_0e39_25_ff; +extern cpuop_func_noret op_0e50_25_nf; +extern cpuop_func_noret op_0e50_25_ff; +extern cpuop_func_noret op_0e58_25_nf; +extern cpuop_func_noret op_0e58_25_ff; +extern cpuop_func_noret op_0e60_25_nf; +extern cpuop_func_noret op_0e60_25_ff; +extern cpuop_func_noret op_0e68_25_nf; +extern cpuop_func_noret op_0e68_25_ff; +extern cpuop_func_noret op_0e70_25_nf; +extern cpuop_func_noret op_0e70_25_ff; +extern cpuop_func_noret op_0e78_25_nf; +extern cpuop_func_noret op_0e78_25_ff; +extern cpuop_func_noret op_0e79_25_nf; +extern cpuop_func_noret op_0e79_25_ff; +extern cpuop_func_noret op_0e90_25_nf; +extern cpuop_func_noret op_0e90_25_ff; +extern cpuop_func_noret op_0e98_25_nf; +extern cpuop_func_noret op_0e98_25_ff; +extern cpuop_func_noret op_0ea0_25_nf; +extern cpuop_func_noret op_0ea0_25_ff; +extern cpuop_func_noret op_0ea8_25_nf; +extern cpuop_func_noret op_0ea8_25_ff; +extern cpuop_func_noret op_0eb0_25_nf; +extern cpuop_func_noret op_0eb0_25_ff; +extern cpuop_func_noret op_0eb8_25_nf; +extern cpuop_func_noret op_0eb8_25_ff; +extern cpuop_func_noret op_0eb9_25_nf; +extern cpuop_func_noret op_0eb9_25_ff; +extern cpuop_func_noret op_0ed0_25_nf; +extern cpuop_func_noret op_0ed0_25_ff; +extern cpuop_func_noret op_0ed8_25_nf; +extern cpuop_func_noret op_0ed8_25_ff; +extern cpuop_func_noret op_0ee0_25_nf; +extern cpuop_func_noret op_0ee0_25_ff; +extern cpuop_func_noret op_0ee8_25_nf; +extern cpuop_func_noret op_0ee8_25_ff; +extern cpuop_func_noret op_0ef0_25_nf; +extern cpuop_func_noret op_0ef0_25_ff; +extern cpuop_func_noret op_0ef8_25_nf; +extern cpuop_func_noret op_0ef8_25_ff; +extern cpuop_func_noret op_0ef9_25_nf; +extern cpuop_func_noret op_0ef9_25_ff; +extern cpuop_func_noret op_0efc_25_nf; +extern cpuop_func_noret op_0efc_25_ff; +extern cpuop_func_noret op_4808_25_nf; +extern cpuop_func_noret op_4808_25_ff; +extern cpuop_func_noret op_4e50_25_nf; +extern cpuop_func_noret op_4e50_25_ff; +extern cpuop_func_noret op_4e60_25_nf; +extern cpuop_func_noret op_4e60_25_ff; +extern cpuop_func_noret op_4e71_25_nf; +extern cpuop_func_noret op_4e71_25_ff; +extern cpuop_func_noret op_4e72_25_nf; +extern cpuop_func_noret op_4e72_25_ff; +extern cpuop_func_noret op_4e73_25_nf; +extern cpuop_func_noret op_4e73_25_ff; +extern cpuop_func_noret op_4e77_25_nf; +extern cpuop_func_noret op_4e77_25_ff; +extern cpuop_func_noret op_4e7b_25_nf; +extern cpuop_func_noret op_4e7b_25_ff; +extern cpuop_func_noret op_f500_25_nf; +extern cpuop_func_noret op_f500_25_ff; +extern cpuop_func_noret op_f508_25_nf; +extern cpuop_func_noret op_f508_25_ff; +extern cpuop_func_noret op_f510_25_nf; +extern cpuop_func_noret op_f510_25_ff; +extern cpuop_func_noret op_f518_25_nf; +extern cpuop_func_noret op_f518_25_ff; +extern cpuop_func_noret op_f548_25_nf; +extern cpuop_func_noret op_f548_25_ff; +extern cpuop_func_noret op_f568_25_nf; +extern cpuop_func_noret op_f568_25_ff; +extern cpuop_func op_0000_31_nf; +extern cpuop_func op_0000_31_ff; +extern cpuop_func op_0010_31_nf; +extern cpuop_func op_0010_31_ff; +extern cpuop_func op_0018_31_nf; +extern cpuop_func op_0018_31_ff; +extern cpuop_func op_0020_31_nf; +extern cpuop_func op_0020_31_ff; +extern cpuop_func op_0028_31_nf; +extern cpuop_func op_0028_31_ff; +extern cpuop_func op_0030_31_nf; +extern cpuop_func op_0030_31_ff; +extern cpuop_func op_0038_31_nf; +extern cpuop_func op_0038_31_ff; +extern cpuop_func op_0039_31_nf; +extern cpuop_func op_0039_31_ff; +extern cpuop_func op_003c_31_nf; +extern cpuop_func op_003c_31_ff; +extern cpuop_func op_0040_31_nf; +extern cpuop_func op_0040_31_ff; +extern cpuop_func op_0050_31_nf; +extern cpuop_func op_0050_31_ff; +extern cpuop_func op_0058_31_nf; +extern cpuop_func op_0058_31_ff; +extern cpuop_func op_0060_31_nf; +extern cpuop_func op_0060_31_ff; +extern cpuop_func op_0068_31_nf; +extern cpuop_func op_0068_31_ff; +extern cpuop_func op_0070_31_nf; +extern cpuop_func op_0070_31_ff; +extern cpuop_func op_0078_31_nf; +extern cpuop_func op_0078_31_ff; +extern cpuop_func op_0079_31_nf; +extern cpuop_func op_0079_31_ff; +extern cpuop_func op_007c_31_nf; +extern cpuop_func op_007c_31_ff; +extern cpuop_func op_0080_31_nf; +extern cpuop_func op_0080_31_ff; +extern cpuop_func op_0090_31_nf; +extern cpuop_func op_0090_31_ff; +extern cpuop_func op_0098_31_nf; +extern cpuop_func op_0098_31_ff; +extern cpuop_func op_00a0_31_nf; +extern cpuop_func op_00a0_31_ff; +extern cpuop_func op_00a8_31_nf; +extern cpuop_func op_00a8_31_ff; +extern cpuop_func op_00b0_31_nf; +extern cpuop_func op_00b0_31_ff; +extern cpuop_func op_00b8_31_nf; +extern cpuop_func op_00b8_31_ff; +extern cpuop_func op_00b9_31_nf; +extern cpuop_func op_00b9_31_ff; +extern cpuop_func op_00d0_31_nf; +extern cpuop_func op_00d0_31_ff; +extern cpuop_func op_00e8_31_nf; +extern cpuop_func op_00e8_31_ff; +extern cpuop_func op_00f0_31_nf; +extern cpuop_func op_00f0_31_ff; +extern cpuop_func op_00f8_31_nf; +extern cpuop_func op_00f8_31_ff; +extern cpuop_func op_00f9_31_nf; +extern cpuop_func op_00f9_31_ff; +extern cpuop_func op_00fa_31_nf; +extern cpuop_func op_00fa_31_ff; +extern cpuop_func op_00fb_31_nf; +extern cpuop_func op_00fb_31_ff; +extern cpuop_func op_0100_31_nf; +extern cpuop_func op_0100_31_ff; +extern cpuop_func op_0108_31_nf; +extern cpuop_func op_0108_31_ff; +extern cpuop_func op_0110_31_nf; +extern cpuop_func op_0110_31_ff; +extern cpuop_func op_0118_31_nf; +extern cpuop_func op_0118_31_ff; +extern cpuop_func op_0120_31_nf; +extern cpuop_func op_0120_31_ff; +extern cpuop_func op_0128_31_nf; +extern cpuop_func op_0128_31_ff; +extern cpuop_func op_0130_31_nf; +extern cpuop_func op_0130_31_ff; +extern cpuop_func op_0138_31_nf; +extern cpuop_func op_0138_31_ff; +extern cpuop_func op_0139_31_nf; +extern cpuop_func op_0139_31_ff; +extern cpuop_func op_013a_31_nf; +extern cpuop_func op_013a_31_ff; +extern cpuop_func op_013b_31_nf; +extern cpuop_func op_013b_31_ff; +extern cpuop_func op_013c_31_nf; +extern cpuop_func op_013c_31_ff; +extern cpuop_func op_0140_31_nf; +extern cpuop_func op_0140_31_ff; +extern cpuop_func op_0148_31_nf; +extern cpuop_func op_0148_31_ff; +extern cpuop_func op_0150_31_nf; +extern cpuop_func op_0150_31_ff; +extern cpuop_func op_0158_31_nf; +extern cpuop_func op_0158_31_ff; +extern cpuop_func op_0160_31_nf; +extern cpuop_func op_0160_31_ff; +extern cpuop_func op_0168_31_nf; +extern cpuop_func op_0168_31_ff; +extern cpuop_func op_0170_31_nf; +extern cpuop_func op_0170_31_ff; +extern cpuop_func op_0178_31_nf; +extern cpuop_func op_0178_31_ff; +extern cpuop_func op_0179_31_nf; +extern cpuop_func op_0179_31_ff; +extern cpuop_func op_0180_31_nf; +extern cpuop_func op_0180_31_ff; +extern cpuop_func op_0188_31_nf; +extern cpuop_func op_0188_31_ff; +extern cpuop_func op_0190_31_nf; +extern cpuop_func op_0190_31_ff; +extern cpuop_func op_0198_31_nf; +extern cpuop_func op_0198_31_ff; +extern cpuop_func op_01a0_31_nf; +extern cpuop_func op_01a0_31_ff; +extern cpuop_func op_01a8_31_nf; +extern cpuop_func op_01a8_31_ff; +extern cpuop_func op_01b0_31_nf; +extern cpuop_func op_01b0_31_ff; +extern cpuop_func op_01b8_31_nf; +extern cpuop_func op_01b8_31_ff; +extern cpuop_func op_01b9_31_nf; +extern cpuop_func op_01b9_31_ff; +extern cpuop_func op_01c0_31_nf; +extern cpuop_func op_01c0_31_ff; +extern cpuop_func op_01c8_31_nf; +extern cpuop_func op_01c8_31_ff; +extern cpuop_func op_01d0_31_nf; +extern cpuop_func op_01d0_31_ff; +extern cpuop_func op_01d8_31_nf; +extern cpuop_func op_01d8_31_ff; +extern cpuop_func op_01e0_31_nf; +extern cpuop_func op_01e0_31_ff; +extern cpuop_func op_01e8_31_nf; +extern cpuop_func op_01e8_31_ff; +extern cpuop_func op_01f0_31_nf; +extern cpuop_func op_01f0_31_ff; +extern cpuop_func op_01f8_31_nf; +extern cpuop_func op_01f8_31_ff; +extern cpuop_func op_01f9_31_nf; +extern cpuop_func op_01f9_31_ff; +extern cpuop_func op_0200_31_nf; +extern cpuop_func op_0200_31_ff; +extern cpuop_func op_0210_31_nf; +extern cpuop_func op_0210_31_ff; +extern cpuop_func op_0218_31_nf; +extern cpuop_func op_0218_31_ff; +extern cpuop_func op_0220_31_nf; +extern cpuop_func op_0220_31_ff; +extern cpuop_func op_0228_31_nf; +extern cpuop_func op_0228_31_ff; +extern cpuop_func op_0230_31_nf; +extern cpuop_func op_0230_31_ff; +extern cpuop_func op_0238_31_nf; +extern cpuop_func op_0238_31_ff; +extern cpuop_func op_0239_31_nf; +extern cpuop_func op_0239_31_ff; +extern cpuop_func op_023c_31_nf; +extern cpuop_func op_023c_31_ff; +extern cpuop_func op_0240_31_nf; +extern cpuop_func op_0240_31_ff; +extern cpuop_func op_0250_31_nf; +extern cpuop_func op_0250_31_ff; +extern cpuop_func op_0258_31_nf; +extern cpuop_func op_0258_31_ff; +extern cpuop_func op_0260_31_nf; +extern cpuop_func op_0260_31_ff; +extern cpuop_func op_0268_31_nf; +extern cpuop_func op_0268_31_ff; +extern cpuop_func op_0270_31_nf; +extern cpuop_func op_0270_31_ff; +extern cpuop_func op_0278_31_nf; +extern cpuop_func op_0278_31_ff; +extern cpuop_func op_0279_31_nf; +extern cpuop_func op_0279_31_ff; +extern cpuop_func op_027c_31_nf; +extern cpuop_func op_027c_31_ff; +extern cpuop_func op_0280_31_nf; +extern cpuop_func op_0280_31_ff; +extern cpuop_func op_0290_31_nf; +extern cpuop_func op_0290_31_ff; +extern cpuop_func op_0298_31_nf; +extern cpuop_func op_0298_31_ff; +extern cpuop_func op_02a0_31_nf; +extern cpuop_func op_02a0_31_ff; +extern cpuop_func op_02a8_31_nf; +extern cpuop_func op_02a8_31_ff; +extern cpuop_func op_02b0_31_nf; +extern cpuop_func op_02b0_31_ff; +extern cpuop_func op_02b8_31_nf; +extern cpuop_func op_02b8_31_ff; +extern cpuop_func op_02b9_31_nf; +extern cpuop_func op_02b9_31_ff; +extern cpuop_func op_02d0_31_nf; +extern cpuop_func op_02d0_31_ff; +extern cpuop_func op_02e8_31_nf; +extern cpuop_func op_02e8_31_ff; +extern cpuop_func op_02f0_31_nf; +extern cpuop_func op_02f0_31_ff; +extern cpuop_func op_02f8_31_nf; +extern cpuop_func op_02f8_31_ff; +extern cpuop_func op_02f9_31_nf; +extern cpuop_func op_02f9_31_ff; +extern cpuop_func op_02fa_31_nf; +extern cpuop_func op_02fa_31_ff; +extern cpuop_func op_02fb_31_nf; +extern cpuop_func op_02fb_31_ff; +extern cpuop_func op_0400_31_nf; +extern cpuop_func op_0400_31_ff; +extern cpuop_func op_0410_31_nf; +extern cpuop_func op_0410_31_ff; +extern cpuop_func op_0418_31_nf; +extern cpuop_func op_0418_31_ff; +extern cpuop_func op_0420_31_nf; +extern cpuop_func op_0420_31_ff; +extern cpuop_func op_0428_31_nf; +extern cpuop_func op_0428_31_ff; +extern cpuop_func op_0430_31_nf; +extern cpuop_func op_0430_31_ff; +extern cpuop_func op_0438_31_nf; +extern cpuop_func op_0438_31_ff; +extern cpuop_func op_0439_31_nf; +extern cpuop_func op_0439_31_ff; +extern cpuop_func op_0440_31_nf; +extern cpuop_func op_0440_31_ff; +extern cpuop_func op_0450_31_nf; +extern cpuop_func op_0450_31_ff; +extern cpuop_func op_0458_31_nf; +extern cpuop_func op_0458_31_ff; +extern cpuop_func op_0460_31_nf; +extern cpuop_func op_0460_31_ff; +extern cpuop_func op_0468_31_nf; +extern cpuop_func op_0468_31_ff; +extern cpuop_func op_0470_31_nf; +extern cpuop_func op_0470_31_ff; +extern cpuop_func op_0478_31_nf; +extern cpuop_func op_0478_31_ff; +extern cpuop_func op_0479_31_nf; +extern cpuop_func op_0479_31_ff; +extern cpuop_func op_0480_31_nf; +extern cpuop_func op_0480_31_ff; +extern cpuop_func op_0490_31_nf; +extern cpuop_func op_0490_31_ff; +extern cpuop_func op_0498_31_nf; +extern cpuop_func op_0498_31_ff; +extern cpuop_func op_04a0_31_nf; +extern cpuop_func op_04a0_31_ff; +extern cpuop_func op_04a8_31_nf; +extern cpuop_func op_04a8_31_ff; +extern cpuop_func op_04b0_31_nf; +extern cpuop_func op_04b0_31_ff; +extern cpuop_func op_04b8_31_nf; +extern cpuop_func op_04b8_31_ff; +extern cpuop_func op_04b9_31_nf; +extern cpuop_func op_04b9_31_ff; +extern cpuop_func op_04d0_31_nf; +extern cpuop_func op_04d0_31_ff; +extern cpuop_func op_04e8_31_nf; +extern cpuop_func op_04e8_31_ff; +extern cpuop_func op_04f0_31_nf; +extern cpuop_func op_04f0_31_ff; +extern cpuop_func op_04f8_31_nf; +extern cpuop_func op_04f8_31_ff; +extern cpuop_func op_04f9_31_nf; +extern cpuop_func op_04f9_31_ff; +extern cpuop_func op_04fa_31_nf; +extern cpuop_func op_04fa_31_ff; +extern cpuop_func op_04fb_31_nf; +extern cpuop_func op_04fb_31_ff; +extern cpuop_func op_0600_31_nf; +extern cpuop_func op_0600_31_ff; +extern cpuop_func op_0610_31_nf; +extern cpuop_func op_0610_31_ff; +extern cpuop_func op_0618_31_nf; +extern cpuop_func op_0618_31_ff; +extern cpuop_func op_0620_31_nf; +extern cpuop_func op_0620_31_ff; +extern cpuop_func op_0628_31_nf; +extern cpuop_func op_0628_31_ff; +extern cpuop_func op_0630_31_nf; +extern cpuop_func op_0630_31_ff; +extern cpuop_func op_0638_31_nf; +extern cpuop_func op_0638_31_ff; +extern cpuop_func op_0639_31_nf; +extern cpuop_func op_0639_31_ff; +extern cpuop_func op_0640_31_nf; +extern cpuop_func op_0640_31_ff; +extern cpuop_func op_0650_31_nf; +extern cpuop_func op_0650_31_ff; +extern cpuop_func op_0658_31_nf; +extern cpuop_func op_0658_31_ff; +extern cpuop_func op_0660_31_nf; +extern cpuop_func op_0660_31_ff; +extern cpuop_func op_0668_31_nf; +extern cpuop_func op_0668_31_ff; +extern cpuop_func op_0670_31_nf; +extern cpuop_func op_0670_31_ff; +extern cpuop_func op_0678_31_nf; +extern cpuop_func op_0678_31_ff; +extern cpuop_func op_0679_31_nf; +extern cpuop_func op_0679_31_ff; +extern cpuop_func op_0680_31_nf; +extern cpuop_func op_0680_31_ff; +extern cpuop_func op_0690_31_nf; +extern cpuop_func op_0690_31_ff; +extern cpuop_func op_0698_31_nf; +extern cpuop_func op_0698_31_ff; +extern cpuop_func op_06a0_31_nf; +extern cpuop_func op_06a0_31_ff; +extern cpuop_func op_06a8_31_nf; +extern cpuop_func op_06a8_31_ff; +extern cpuop_func op_06b0_31_nf; +extern cpuop_func op_06b0_31_ff; +extern cpuop_func op_06b8_31_nf; +extern cpuop_func op_06b8_31_ff; +extern cpuop_func op_06b9_31_nf; +extern cpuop_func op_06b9_31_ff; +extern cpuop_func op_06c0_31_nf; +extern cpuop_func op_06c0_31_ff; +extern cpuop_func op_06c8_31_nf; +extern cpuop_func op_06c8_31_ff; +extern cpuop_func op_06d0_31_nf; +extern cpuop_func op_06d0_31_ff; +extern cpuop_func op_06e8_31_nf; +extern cpuop_func op_06e8_31_ff; +extern cpuop_func op_06f0_31_nf; +extern cpuop_func op_06f0_31_ff; +extern cpuop_func op_06f8_31_nf; +extern cpuop_func op_06f8_31_ff; +extern cpuop_func op_06f9_31_nf; +extern cpuop_func op_06f9_31_ff; +extern cpuop_func op_06fa_31_nf; +extern cpuop_func op_06fa_31_ff; +extern cpuop_func op_06fb_31_nf; +extern cpuop_func op_06fb_31_ff; +extern cpuop_func op_0800_31_nf; +extern cpuop_func op_0800_31_ff; +extern cpuop_func op_0810_31_nf; +extern cpuop_func op_0810_31_ff; +extern cpuop_func op_0818_31_nf; +extern cpuop_func op_0818_31_ff; +extern cpuop_func op_0820_31_nf; +extern cpuop_func op_0820_31_ff; +extern cpuop_func op_0828_31_nf; +extern cpuop_func op_0828_31_ff; +extern cpuop_func op_0830_31_nf; +extern cpuop_func op_0830_31_ff; +extern cpuop_func op_0838_31_nf; +extern cpuop_func op_0838_31_ff; +extern cpuop_func op_0839_31_nf; +extern cpuop_func op_0839_31_ff; +extern cpuop_func op_083a_31_nf; +extern cpuop_func op_083a_31_ff; +extern cpuop_func op_083b_31_nf; +extern cpuop_func op_083b_31_ff; +extern cpuop_func op_0840_31_nf; +extern cpuop_func op_0840_31_ff; +extern cpuop_func op_0850_31_nf; +extern cpuop_func op_0850_31_ff; +extern cpuop_func op_0858_31_nf; +extern cpuop_func op_0858_31_ff; +extern cpuop_func op_0860_31_nf; +extern cpuop_func op_0860_31_ff; +extern cpuop_func op_0868_31_nf; +extern cpuop_func op_0868_31_ff; +extern cpuop_func op_0870_31_nf; +extern cpuop_func op_0870_31_ff; +extern cpuop_func op_0878_31_nf; +extern cpuop_func op_0878_31_ff; +extern cpuop_func op_0879_31_nf; +extern cpuop_func op_0879_31_ff; +extern cpuop_func op_0880_31_nf; +extern cpuop_func op_0880_31_ff; +extern cpuop_func op_0890_31_nf; +extern cpuop_func op_0890_31_ff; +extern cpuop_func op_0898_31_nf; +extern cpuop_func op_0898_31_ff; +extern cpuop_func op_08a0_31_nf; +extern cpuop_func op_08a0_31_ff; +extern cpuop_func op_08a8_31_nf; +extern cpuop_func op_08a8_31_ff; +extern cpuop_func op_08b0_31_nf; +extern cpuop_func op_08b0_31_ff; +extern cpuop_func op_08b8_31_nf; +extern cpuop_func op_08b8_31_ff; +extern cpuop_func op_08b9_31_nf; +extern cpuop_func op_08b9_31_ff; +extern cpuop_func op_08c0_31_nf; +extern cpuop_func op_08c0_31_ff; +extern cpuop_func op_08d0_31_nf; +extern cpuop_func op_08d0_31_ff; +extern cpuop_func op_08d8_31_nf; +extern cpuop_func op_08d8_31_ff; +extern cpuop_func op_08e0_31_nf; +extern cpuop_func op_08e0_31_ff; +extern cpuop_func op_08e8_31_nf; +extern cpuop_func op_08e8_31_ff; +extern cpuop_func op_08f0_31_nf; +extern cpuop_func op_08f0_31_ff; +extern cpuop_func op_08f8_31_nf; +extern cpuop_func op_08f8_31_ff; +extern cpuop_func op_08f9_31_nf; +extern cpuop_func op_08f9_31_ff; +extern cpuop_func op_0a00_31_nf; +extern cpuop_func op_0a00_31_ff; +extern cpuop_func op_0a10_31_nf; +extern cpuop_func op_0a10_31_ff; +extern cpuop_func op_0a18_31_nf; +extern cpuop_func op_0a18_31_ff; +extern cpuop_func op_0a20_31_nf; +extern cpuop_func op_0a20_31_ff; +extern cpuop_func op_0a28_31_nf; +extern cpuop_func op_0a28_31_ff; +extern cpuop_func op_0a30_31_nf; +extern cpuop_func op_0a30_31_ff; +extern cpuop_func op_0a38_31_nf; +extern cpuop_func op_0a38_31_ff; +extern cpuop_func op_0a39_31_nf; +extern cpuop_func op_0a39_31_ff; +extern cpuop_func op_0a3c_31_nf; +extern cpuop_func op_0a3c_31_ff; +extern cpuop_func op_0a40_31_nf; +extern cpuop_func op_0a40_31_ff; +extern cpuop_func op_0a50_31_nf; +extern cpuop_func op_0a50_31_ff; +extern cpuop_func op_0a58_31_nf; +extern cpuop_func op_0a58_31_ff; +extern cpuop_func op_0a60_31_nf; +extern cpuop_func op_0a60_31_ff; +extern cpuop_func op_0a68_31_nf; +extern cpuop_func op_0a68_31_ff; +extern cpuop_func op_0a70_31_nf; +extern cpuop_func op_0a70_31_ff; +extern cpuop_func op_0a78_31_nf; +extern cpuop_func op_0a78_31_ff; +extern cpuop_func op_0a79_31_nf; +extern cpuop_func op_0a79_31_ff; +extern cpuop_func op_0a7c_31_nf; +extern cpuop_func op_0a7c_31_ff; +extern cpuop_func op_0a80_31_nf; +extern cpuop_func op_0a80_31_ff; +extern cpuop_func op_0a90_31_nf; +extern cpuop_func op_0a90_31_ff; +extern cpuop_func op_0a98_31_nf; +extern cpuop_func op_0a98_31_ff; +extern cpuop_func op_0aa0_31_nf; +extern cpuop_func op_0aa0_31_ff; +extern cpuop_func op_0aa8_31_nf; +extern cpuop_func op_0aa8_31_ff; +extern cpuop_func op_0ab0_31_nf; +extern cpuop_func op_0ab0_31_ff; +extern cpuop_func op_0ab8_31_nf; +extern cpuop_func op_0ab8_31_ff; +extern cpuop_func op_0ab9_31_nf; +extern cpuop_func op_0ab9_31_ff; +extern cpuop_func op_0ad0_31_nf; +extern cpuop_func op_0ad0_31_ff; +extern cpuop_func op_0ad8_31_nf; +extern cpuop_func op_0ad8_31_ff; +extern cpuop_func op_0ae0_31_nf; +extern cpuop_func op_0ae0_31_ff; +extern cpuop_func op_0ae8_31_nf; +extern cpuop_func op_0ae8_31_ff; +extern cpuop_func op_0af0_31_nf; +extern cpuop_func op_0af0_31_ff; +extern cpuop_func op_0af8_31_nf; +extern cpuop_func op_0af8_31_ff; +extern cpuop_func op_0af9_31_nf; +extern cpuop_func op_0af9_31_ff; +extern cpuop_func op_0c00_31_nf; +extern cpuop_func op_0c00_31_ff; +extern cpuop_func op_0c10_31_nf; +extern cpuop_func op_0c10_31_ff; +extern cpuop_func op_0c18_31_nf; +extern cpuop_func op_0c18_31_ff; +extern cpuop_func op_0c20_31_nf; +extern cpuop_func op_0c20_31_ff; +extern cpuop_func op_0c28_31_nf; +extern cpuop_func op_0c28_31_ff; +extern cpuop_func op_0c30_31_nf; +extern cpuop_func op_0c30_31_ff; +extern cpuop_func op_0c38_31_nf; +extern cpuop_func op_0c38_31_ff; +extern cpuop_func op_0c39_31_nf; +extern cpuop_func op_0c39_31_ff; +extern cpuop_func op_0c3a_31_nf; +extern cpuop_func op_0c3a_31_ff; +extern cpuop_func op_0c3b_31_nf; +extern cpuop_func op_0c3b_31_ff; +extern cpuop_func op_0c40_31_nf; +extern cpuop_func op_0c40_31_ff; +extern cpuop_func op_0c50_31_nf; +extern cpuop_func op_0c50_31_ff; +extern cpuop_func op_0c58_31_nf; +extern cpuop_func op_0c58_31_ff; +extern cpuop_func op_0c60_31_nf; +extern cpuop_func op_0c60_31_ff; +extern cpuop_func op_0c68_31_nf; +extern cpuop_func op_0c68_31_ff; +extern cpuop_func op_0c70_31_nf; +extern cpuop_func op_0c70_31_ff; +extern cpuop_func op_0c78_31_nf; +extern cpuop_func op_0c78_31_ff; +extern cpuop_func op_0c79_31_nf; +extern cpuop_func op_0c79_31_ff; +extern cpuop_func op_0c7a_31_nf; +extern cpuop_func op_0c7a_31_ff; +extern cpuop_func op_0c7b_31_nf; +extern cpuop_func op_0c7b_31_ff; +extern cpuop_func op_0c80_31_nf; +extern cpuop_func op_0c80_31_ff; +extern cpuop_func op_0c90_31_nf; +extern cpuop_func op_0c90_31_ff; +extern cpuop_func op_0c98_31_nf; +extern cpuop_func op_0c98_31_ff; +extern cpuop_func op_0ca0_31_nf; +extern cpuop_func op_0ca0_31_ff; +extern cpuop_func op_0ca8_31_nf; +extern cpuop_func op_0ca8_31_ff; +extern cpuop_func op_0cb0_31_nf; +extern cpuop_func op_0cb0_31_ff; +extern cpuop_func op_0cb8_31_nf; +extern cpuop_func op_0cb8_31_ff; +extern cpuop_func op_0cb9_31_nf; +extern cpuop_func op_0cb9_31_ff; +extern cpuop_func op_0cba_31_nf; +extern cpuop_func op_0cba_31_ff; +extern cpuop_func op_0cbb_31_nf; +extern cpuop_func op_0cbb_31_ff; +extern cpuop_func op_0cd0_31_nf; +extern cpuop_func op_0cd0_31_ff; +extern cpuop_func op_0cd8_31_nf; +extern cpuop_func op_0cd8_31_ff; +extern cpuop_func op_0ce0_31_nf; +extern cpuop_func op_0ce0_31_ff; +extern cpuop_func op_0ce8_31_nf; +extern cpuop_func op_0ce8_31_ff; +extern cpuop_func op_0cf0_31_nf; +extern cpuop_func op_0cf0_31_ff; +extern cpuop_func op_0cf8_31_nf; +extern cpuop_func op_0cf8_31_ff; +extern cpuop_func op_0cf9_31_nf; +extern cpuop_func op_0cf9_31_ff; +extern cpuop_func op_0cfc_31_nf; +extern cpuop_func op_0cfc_31_ff; +extern cpuop_func op_0e10_31_nf; +extern cpuop_func op_0e10_31_ff; +extern cpuop_func op_0e18_31_nf; +extern cpuop_func op_0e18_31_ff; +extern cpuop_func op_0e20_31_nf; +extern cpuop_func op_0e20_31_ff; +extern cpuop_func op_0e28_31_nf; +extern cpuop_func op_0e28_31_ff; +extern cpuop_func op_0e30_31_nf; +extern cpuop_func op_0e30_31_ff; +extern cpuop_func op_0e38_31_nf; +extern cpuop_func op_0e38_31_ff; +extern cpuop_func op_0e39_31_nf; +extern cpuop_func op_0e39_31_ff; +extern cpuop_func op_0e50_31_nf; +extern cpuop_func op_0e50_31_ff; +extern cpuop_func op_0e58_31_nf; +extern cpuop_func op_0e58_31_ff; +extern cpuop_func op_0e60_31_nf; +extern cpuop_func op_0e60_31_ff; +extern cpuop_func op_0e68_31_nf; +extern cpuop_func op_0e68_31_ff; +extern cpuop_func op_0e70_31_nf; +extern cpuop_func op_0e70_31_ff; +extern cpuop_func op_0e78_31_nf; +extern cpuop_func op_0e78_31_ff; +extern cpuop_func op_0e79_31_nf; +extern cpuop_func op_0e79_31_ff; +extern cpuop_func op_0e90_31_nf; +extern cpuop_func op_0e90_31_ff; +extern cpuop_func op_0e98_31_nf; +extern cpuop_func op_0e98_31_ff; +extern cpuop_func op_0ea0_31_nf; +extern cpuop_func op_0ea0_31_ff; +extern cpuop_func op_0ea8_31_nf; +extern cpuop_func op_0ea8_31_ff; +extern cpuop_func op_0eb0_31_nf; +extern cpuop_func op_0eb0_31_ff; +extern cpuop_func op_0eb8_31_nf; +extern cpuop_func op_0eb8_31_ff; +extern cpuop_func op_0eb9_31_nf; +extern cpuop_func op_0eb9_31_ff; +extern cpuop_func op_0ed0_31_nf; +extern cpuop_func op_0ed0_31_ff; +extern cpuop_func op_0ed8_31_nf; +extern cpuop_func op_0ed8_31_ff; +extern cpuop_func op_0ee0_31_nf; +extern cpuop_func op_0ee0_31_ff; +extern cpuop_func op_0ee8_31_nf; +extern cpuop_func op_0ee8_31_ff; +extern cpuop_func op_0ef0_31_nf; +extern cpuop_func op_0ef0_31_ff; +extern cpuop_func op_0ef8_31_nf; +extern cpuop_func op_0ef8_31_ff; +extern cpuop_func op_0ef9_31_nf; +extern cpuop_func op_0ef9_31_ff; +extern cpuop_func op_0efc_31_nf; +extern cpuop_func op_0efc_31_ff; +extern cpuop_func op_1000_31_nf; +extern cpuop_func op_1000_31_ff; +extern cpuop_func op_1010_31_nf; +extern cpuop_func op_1010_31_ff; +extern cpuop_func op_1018_31_nf; +extern cpuop_func op_1018_31_ff; +extern cpuop_func op_1020_31_nf; +extern cpuop_func op_1020_31_ff; +extern cpuop_func op_1028_31_nf; +extern cpuop_func op_1028_31_ff; +extern cpuop_func op_1030_31_nf; +extern cpuop_func op_1030_31_ff; +extern cpuop_func op_1038_31_nf; +extern cpuop_func op_1038_31_ff; +extern cpuop_func op_1039_31_nf; +extern cpuop_func op_1039_31_ff; +extern cpuop_func op_103a_31_nf; +extern cpuop_func op_103a_31_ff; +extern cpuop_func op_103b_31_nf; +extern cpuop_func op_103b_31_ff; +extern cpuop_func op_103c_31_nf; +extern cpuop_func op_103c_31_ff; +extern cpuop_func op_1080_31_nf; +extern cpuop_func op_1080_31_ff; +extern cpuop_func op_1090_31_nf; +extern cpuop_func op_1090_31_ff; +extern cpuop_func op_1098_31_nf; +extern cpuop_func op_1098_31_ff; +extern cpuop_func op_10a0_31_nf; +extern cpuop_func op_10a0_31_ff; +extern cpuop_func op_10a8_31_nf; +extern cpuop_func op_10a8_31_ff; +extern cpuop_func op_10b0_31_nf; +extern cpuop_func op_10b0_31_ff; +extern cpuop_func op_10b8_31_nf; +extern cpuop_func op_10b8_31_ff; +extern cpuop_func op_10b9_31_nf; +extern cpuop_func op_10b9_31_ff; +extern cpuop_func op_10ba_31_nf; +extern cpuop_func op_10ba_31_ff; +extern cpuop_func op_10bb_31_nf; +extern cpuop_func op_10bb_31_ff; +extern cpuop_func op_10bc_31_nf; +extern cpuop_func op_10bc_31_ff; +extern cpuop_func op_10c0_31_nf; +extern cpuop_func op_10c0_31_ff; +extern cpuop_func op_10d0_31_nf; +extern cpuop_func op_10d0_31_ff; +extern cpuop_func op_10d8_31_nf; +extern cpuop_func op_10d8_31_ff; +extern cpuop_func op_10e0_31_nf; +extern cpuop_func op_10e0_31_ff; +extern cpuop_func op_10e8_31_nf; +extern cpuop_func op_10e8_31_ff; +extern cpuop_func op_10f0_31_nf; +extern cpuop_func op_10f0_31_ff; +extern cpuop_func op_10f8_31_nf; +extern cpuop_func op_10f8_31_ff; +extern cpuop_func op_10f9_31_nf; +extern cpuop_func op_10f9_31_ff; +extern cpuop_func op_10fa_31_nf; +extern cpuop_func op_10fa_31_ff; +extern cpuop_func op_10fb_31_nf; +extern cpuop_func op_10fb_31_ff; +extern cpuop_func op_10fc_31_nf; +extern cpuop_func op_10fc_31_ff; +extern cpuop_func op_1100_31_nf; +extern cpuop_func op_1100_31_ff; +extern cpuop_func op_1110_31_nf; +extern cpuop_func op_1110_31_ff; +extern cpuop_func op_1118_31_nf; +extern cpuop_func op_1118_31_ff; +extern cpuop_func op_1120_31_nf; +extern cpuop_func op_1120_31_ff; +extern cpuop_func op_1128_31_nf; +extern cpuop_func op_1128_31_ff; +extern cpuop_func op_1130_31_nf; +extern cpuop_func op_1130_31_ff; +extern cpuop_func op_1138_31_nf; +extern cpuop_func op_1138_31_ff; +extern cpuop_func op_1139_31_nf; +extern cpuop_func op_1139_31_ff; +extern cpuop_func op_113a_31_nf; +extern cpuop_func op_113a_31_ff; +extern cpuop_func op_113b_31_nf; +extern cpuop_func op_113b_31_ff; +extern cpuop_func op_113c_31_nf; +extern cpuop_func op_113c_31_ff; +extern cpuop_func op_1140_31_nf; +extern cpuop_func op_1140_31_ff; +extern cpuop_func op_1150_31_nf; +extern cpuop_func op_1150_31_ff; +extern cpuop_func op_1158_31_nf; +extern cpuop_func op_1158_31_ff; +extern cpuop_func op_1160_31_nf; +extern cpuop_func op_1160_31_ff; +extern cpuop_func op_1168_31_nf; +extern cpuop_func op_1168_31_ff; +extern cpuop_func op_1170_31_nf; +extern cpuop_func op_1170_31_ff; +extern cpuop_func op_1178_31_nf; +extern cpuop_func op_1178_31_ff; +extern cpuop_func op_1179_31_nf; +extern cpuop_func op_1179_31_ff; +extern cpuop_func op_117a_31_nf; +extern cpuop_func op_117a_31_ff; +extern cpuop_func op_117b_31_nf; +extern cpuop_func op_117b_31_ff; +extern cpuop_func op_117c_31_nf; +extern cpuop_func op_117c_31_ff; +extern cpuop_func op_1180_31_nf; +extern cpuop_func op_1180_31_ff; +extern cpuop_func op_1190_31_nf; +extern cpuop_func op_1190_31_ff; +extern cpuop_func op_1198_31_nf; +extern cpuop_func op_1198_31_ff; +extern cpuop_func op_11a0_31_nf; +extern cpuop_func op_11a0_31_ff; +extern cpuop_func op_11a8_31_nf; +extern cpuop_func op_11a8_31_ff; +extern cpuop_func op_11b0_31_nf; +extern cpuop_func op_11b0_31_ff; +extern cpuop_func op_11b8_31_nf; +extern cpuop_func op_11b8_31_ff; +extern cpuop_func op_11b9_31_nf; +extern cpuop_func op_11b9_31_ff; +extern cpuop_func op_11ba_31_nf; +extern cpuop_func op_11ba_31_ff; +extern cpuop_func op_11bb_31_nf; +extern cpuop_func op_11bb_31_ff; +extern cpuop_func op_11bc_31_nf; +extern cpuop_func op_11bc_31_ff; +extern cpuop_func op_11c0_31_nf; +extern cpuop_func op_11c0_31_ff; +extern cpuop_func op_11d0_31_nf; +extern cpuop_func op_11d0_31_ff; +extern cpuop_func op_11d8_31_nf; +extern cpuop_func op_11d8_31_ff; +extern cpuop_func op_11e0_31_nf; +extern cpuop_func op_11e0_31_ff; +extern cpuop_func op_11e8_31_nf; +extern cpuop_func op_11e8_31_ff; +extern cpuop_func op_11f0_31_nf; +extern cpuop_func op_11f0_31_ff; +extern cpuop_func op_11f8_31_nf; +extern cpuop_func op_11f8_31_ff; +extern cpuop_func op_11f9_31_nf; +extern cpuop_func op_11f9_31_ff; +extern cpuop_func op_11fa_31_nf; +extern cpuop_func op_11fa_31_ff; +extern cpuop_func op_11fb_31_nf; +extern cpuop_func op_11fb_31_ff; +extern cpuop_func op_11fc_31_nf; +extern cpuop_func op_11fc_31_ff; +extern cpuop_func op_13c0_31_nf; +extern cpuop_func op_13c0_31_ff; +extern cpuop_func op_13d0_31_nf; +extern cpuop_func op_13d0_31_ff; +extern cpuop_func op_13d8_31_nf; +extern cpuop_func op_13d8_31_ff; +extern cpuop_func op_13e0_31_nf; +extern cpuop_func op_13e0_31_ff; +extern cpuop_func op_13e8_31_nf; +extern cpuop_func op_13e8_31_ff; +extern cpuop_func op_13f0_31_nf; +extern cpuop_func op_13f0_31_ff; +extern cpuop_func op_13f8_31_nf; +extern cpuop_func op_13f8_31_ff; +extern cpuop_func op_13f9_31_nf; +extern cpuop_func op_13f9_31_ff; +extern cpuop_func op_13fa_31_nf; +extern cpuop_func op_13fa_31_ff; +extern cpuop_func op_13fb_31_nf; +extern cpuop_func op_13fb_31_ff; +extern cpuop_func op_13fc_31_nf; +extern cpuop_func op_13fc_31_ff; +extern cpuop_func op_2000_31_nf; +extern cpuop_func op_2000_31_ff; +extern cpuop_func op_2008_31_nf; +extern cpuop_func op_2008_31_ff; +extern cpuop_func op_2010_31_nf; +extern cpuop_func op_2010_31_ff; +extern cpuop_func op_2018_31_nf; +extern cpuop_func op_2018_31_ff; +extern cpuop_func op_2020_31_nf; +extern cpuop_func op_2020_31_ff; +extern cpuop_func op_2028_31_nf; +extern cpuop_func op_2028_31_ff; +extern cpuop_func op_2030_31_nf; +extern cpuop_func op_2030_31_ff; +extern cpuop_func op_2038_31_nf; +extern cpuop_func op_2038_31_ff; +extern cpuop_func op_2039_31_nf; +extern cpuop_func op_2039_31_ff; +extern cpuop_func op_203a_31_nf; +extern cpuop_func op_203a_31_ff; +extern cpuop_func op_203b_31_nf; +extern cpuop_func op_203b_31_ff; +extern cpuop_func op_203c_31_nf; +extern cpuop_func op_203c_31_ff; +extern cpuop_func op_2040_31_nf; +extern cpuop_func op_2040_31_ff; +extern cpuop_func op_2048_31_nf; +extern cpuop_func op_2048_31_ff; +extern cpuop_func op_2050_31_nf; +extern cpuop_func op_2050_31_ff; +extern cpuop_func op_2058_31_nf; +extern cpuop_func op_2058_31_ff; +extern cpuop_func op_2060_31_nf; +extern cpuop_func op_2060_31_ff; +extern cpuop_func op_2068_31_nf; +extern cpuop_func op_2068_31_ff; +extern cpuop_func op_2070_31_nf; +extern cpuop_func op_2070_31_ff; +extern cpuop_func op_2078_31_nf; +extern cpuop_func op_2078_31_ff; +extern cpuop_func op_2079_31_nf; +extern cpuop_func op_2079_31_ff; +extern cpuop_func op_207a_31_nf; +extern cpuop_func op_207a_31_ff; +extern cpuop_func op_207b_31_nf; +extern cpuop_func op_207b_31_ff; +extern cpuop_func op_207c_31_nf; +extern cpuop_func op_207c_31_ff; +extern cpuop_func op_2080_31_nf; +extern cpuop_func op_2080_31_ff; +extern cpuop_func op_2088_31_nf; +extern cpuop_func op_2088_31_ff; +extern cpuop_func op_2090_31_nf; +extern cpuop_func op_2090_31_ff; +extern cpuop_func op_2098_31_nf; +extern cpuop_func op_2098_31_ff; +extern cpuop_func op_20a0_31_nf; +extern cpuop_func op_20a0_31_ff; +extern cpuop_func op_20a8_31_nf; +extern cpuop_func op_20a8_31_ff; +extern cpuop_func op_20b0_31_nf; +extern cpuop_func op_20b0_31_ff; +extern cpuop_func op_20b8_31_nf; +extern cpuop_func op_20b8_31_ff; +extern cpuop_func op_20b9_31_nf; +extern cpuop_func op_20b9_31_ff; +extern cpuop_func op_20ba_31_nf; +extern cpuop_func op_20ba_31_ff; +extern cpuop_func op_20bb_31_nf; +extern cpuop_func op_20bb_31_ff; +extern cpuop_func op_20bc_31_nf; +extern cpuop_func op_20bc_31_ff; +extern cpuop_func op_20c0_31_nf; +extern cpuop_func op_20c0_31_ff; +extern cpuop_func op_20c8_31_nf; +extern cpuop_func op_20c8_31_ff; +extern cpuop_func op_20d0_31_nf; +extern cpuop_func op_20d0_31_ff; +extern cpuop_func op_20d8_31_nf; +extern cpuop_func op_20d8_31_ff; +extern cpuop_func op_20e0_31_nf; +extern cpuop_func op_20e0_31_ff; +extern cpuop_func op_20e8_31_nf; +extern cpuop_func op_20e8_31_ff; +extern cpuop_func op_20f0_31_nf; +extern cpuop_func op_20f0_31_ff; +extern cpuop_func op_20f8_31_nf; +extern cpuop_func op_20f8_31_ff; +extern cpuop_func op_20f9_31_nf; +extern cpuop_func op_20f9_31_ff; +extern cpuop_func op_20fa_31_nf; +extern cpuop_func op_20fa_31_ff; +extern cpuop_func op_20fb_31_nf; +extern cpuop_func op_20fb_31_ff; +extern cpuop_func op_20fc_31_nf; +extern cpuop_func op_20fc_31_ff; +extern cpuop_func op_2100_31_nf; +extern cpuop_func op_2100_31_ff; +extern cpuop_func op_2108_31_nf; +extern cpuop_func op_2108_31_ff; +extern cpuop_func op_2110_31_nf; +extern cpuop_func op_2110_31_ff; +extern cpuop_func op_2118_31_nf; +extern cpuop_func op_2118_31_ff; +extern cpuop_func op_2120_31_nf; +extern cpuop_func op_2120_31_ff; +extern cpuop_func op_2128_31_nf; +extern cpuop_func op_2128_31_ff; +extern cpuop_func op_2130_31_nf; +extern cpuop_func op_2130_31_ff; +extern cpuop_func op_2138_31_nf; +extern cpuop_func op_2138_31_ff; +extern cpuop_func op_2139_31_nf; +extern cpuop_func op_2139_31_ff; +extern cpuop_func op_213a_31_nf; +extern cpuop_func op_213a_31_ff; +extern cpuop_func op_213b_31_nf; +extern cpuop_func op_213b_31_ff; +extern cpuop_func op_213c_31_nf; +extern cpuop_func op_213c_31_ff; +extern cpuop_func op_2140_31_nf; +extern cpuop_func op_2140_31_ff; +extern cpuop_func op_2148_31_nf; +extern cpuop_func op_2148_31_ff; +extern cpuop_func op_2150_31_nf; +extern cpuop_func op_2150_31_ff; +extern cpuop_func op_2158_31_nf; +extern cpuop_func op_2158_31_ff; +extern cpuop_func op_2160_31_nf; +extern cpuop_func op_2160_31_ff; +extern cpuop_func op_2168_31_nf; +extern cpuop_func op_2168_31_ff; +extern cpuop_func op_2170_31_nf; +extern cpuop_func op_2170_31_ff; +extern cpuop_func op_2178_31_nf; +extern cpuop_func op_2178_31_ff; +extern cpuop_func op_2179_31_nf; +extern cpuop_func op_2179_31_ff; +extern cpuop_func op_217a_31_nf; +extern cpuop_func op_217a_31_ff; +extern cpuop_func op_217b_31_nf; +extern cpuop_func op_217b_31_ff; +extern cpuop_func op_217c_31_nf; +extern cpuop_func op_217c_31_ff; +extern cpuop_func op_2180_31_nf; +extern cpuop_func op_2180_31_ff; +extern cpuop_func op_2188_31_nf; +extern cpuop_func op_2188_31_ff; +extern cpuop_func op_2190_31_nf; +extern cpuop_func op_2190_31_ff; +extern cpuop_func op_2198_31_nf; +extern cpuop_func op_2198_31_ff; +extern cpuop_func op_21a0_31_nf; +extern cpuop_func op_21a0_31_ff; +extern cpuop_func op_21a8_31_nf; +extern cpuop_func op_21a8_31_ff; +extern cpuop_func op_21b0_31_nf; +extern cpuop_func op_21b0_31_ff; +extern cpuop_func op_21b8_31_nf; +extern cpuop_func op_21b8_31_ff; +extern cpuop_func op_21b9_31_nf; +extern cpuop_func op_21b9_31_ff; +extern cpuop_func op_21ba_31_nf; +extern cpuop_func op_21ba_31_ff; +extern cpuop_func op_21bb_31_nf; +extern cpuop_func op_21bb_31_ff; +extern cpuop_func op_21bc_31_nf; +extern cpuop_func op_21bc_31_ff; +extern cpuop_func op_21c0_31_nf; +extern cpuop_func op_21c0_31_ff; +extern cpuop_func op_21c8_31_nf; +extern cpuop_func op_21c8_31_ff; +extern cpuop_func op_21d0_31_nf; +extern cpuop_func op_21d0_31_ff; +extern cpuop_func op_21d8_31_nf; +extern cpuop_func op_21d8_31_ff; +extern cpuop_func op_21e0_31_nf; +extern cpuop_func op_21e0_31_ff; +extern cpuop_func op_21e8_31_nf; +extern cpuop_func op_21e8_31_ff; +extern cpuop_func op_21f0_31_nf; +extern cpuop_func op_21f0_31_ff; +extern cpuop_func op_21f8_31_nf; +extern cpuop_func op_21f8_31_ff; +extern cpuop_func op_21f9_31_nf; +extern cpuop_func op_21f9_31_ff; +extern cpuop_func op_21fa_31_nf; +extern cpuop_func op_21fa_31_ff; +extern cpuop_func op_21fb_31_nf; +extern cpuop_func op_21fb_31_ff; +extern cpuop_func op_21fc_31_nf; +extern cpuop_func op_21fc_31_ff; +extern cpuop_func op_23c0_31_nf; +extern cpuop_func op_23c0_31_ff; +extern cpuop_func op_23c8_31_nf; +extern cpuop_func op_23c8_31_ff; +extern cpuop_func op_23d0_31_nf; +extern cpuop_func op_23d0_31_ff; +extern cpuop_func op_23d8_31_nf; +extern cpuop_func op_23d8_31_ff; +extern cpuop_func op_23e0_31_nf; +extern cpuop_func op_23e0_31_ff; +extern cpuop_func op_23e8_31_nf; +extern cpuop_func op_23e8_31_ff; +extern cpuop_func op_23f0_31_nf; +extern cpuop_func op_23f0_31_ff; +extern cpuop_func op_23f8_31_nf; +extern cpuop_func op_23f8_31_ff; +extern cpuop_func op_23f9_31_nf; +extern cpuop_func op_23f9_31_ff; +extern cpuop_func op_23fa_31_nf; +extern cpuop_func op_23fa_31_ff; +extern cpuop_func op_23fb_31_nf; +extern cpuop_func op_23fb_31_ff; +extern cpuop_func op_23fc_31_nf; +extern cpuop_func op_23fc_31_ff; +extern cpuop_func op_3000_31_nf; +extern cpuop_func op_3000_31_ff; +extern cpuop_func op_3008_31_nf; +extern cpuop_func op_3008_31_ff; +extern cpuop_func op_3010_31_nf; +extern cpuop_func op_3010_31_ff; +extern cpuop_func op_3018_31_nf; +extern cpuop_func op_3018_31_ff; +extern cpuop_func op_3020_31_nf; +extern cpuop_func op_3020_31_ff; +extern cpuop_func op_3028_31_nf; +extern cpuop_func op_3028_31_ff; +extern cpuop_func op_3030_31_nf; +extern cpuop_func op_3030_31_ff; +extern cpuop_func op_3038_31_nf; +extern cpuop_func op_3038_31_ff; +extern cpuop_func op_3039_31_nf; +extern cpuop_func op_3039_31_ff; +extern cpuop_func op_303a_31_nf; +extern cpuop_func op_303a_31_ff; +extern cpuop_func op_303b_31_nf; +extern cpuop_func op_303b_31_ff; +extern cpuop_func op_303c_31_nf; +extern cpuop_func op_303c_31_ff; +extern cpuop_func op_3040_31_nf; +extern cpuop_func op_3040_31_ff; +extern cpuop_func op_3048_31_nf; +extern cpuop_func op_3048_31_ff; +extern cpuop_func op_3050_31_nf; +extern cpuop_func op_3050_31_ff; +extern cpuop_func op_3058_31_nf; +extern cpuop_func op_3058_31_ff; +extern cpuop_func op_3060_31_nf; +extern cpuop_func op_3060_31_ff; +extern cpuop_func op_3068_31_nf; +extern cpuop_func op_3068_31_ff; +extern cpuop_func op_3070_31_nf; +extern cpuop_func op_3070_31_ff; +extern cpuop_func op_3078_31_nf; +extern cpuop_func op_3078_31_ff; +extern cpuop_func op_3079_31_nf; +extern cpuop_func op_3079_31_ff; +extern cpuop_func op_307a_31_nf; +extern cpuop_func op_307a_31_ff; +extern cpuop_func op_307b_31_nf; +extern cpuop_func op_307b_31_ff; +extern cpuop_func op_307c_31_nf; +extern cpuop_func op_307c_31_ff; +extern cpuop_func op_3080_31_nf; +extern cpuop_func op_3080_31_ff; +extern cpuop_func op_3088_31_nf; +extern cpuop_func op_3088_31_ff; +extern cpuop_func op_3090_31_nf; +extern cpuop_func op_3090_31_ff; +extern cpuop_func op_3098_31_nf; +extern cpuop_func op_3098_31_ff; +extern cpuop_func op_30a0_31_nf; +extern cpuop_func op_30a0_31_ff; +extern cpuop_func op_30a8_31_nf; +extern cpuop_func op_30a8_31_ff; +extern cpuop_func op_30b0_31_nf; +extern cpuop_func op_30b0_31_ff; +extern cpuop_func op_30b8_31_nf; +extern cpuop_func op_30b8_31_ff; +extern cpuop_func op_30b9_31_nf; +extern cpuop_func op_30b9_31_ff; +extern cpuop_func op_30ba_31_nf; +extern cpuop_func op_30ba_31_ff; +extern cpuop_func op_30bb_31_nf; +extern cpuop_func op_30bb_31_ff; +extern cpuop_func op_30bc_31_nf; +extern cpuop_func op_30bc_31_ff; +extern cpuop_func op_30c0_31_nf; +extern cpuop_func op_30c0_31_ff; +extern cpuop_func op_30c8_31_nf; +extern cpuop_func op_30c8_31_ff; +extern cpuop_func op_30d0_31_nf; +extern cpuop_func op_30d0_31_ff; +extern cpuop_func op_30d8_31_nf; +extern cpuop_func op_30d8_31_ff; +extern cpuop_func op_30e0_31_nf; +extern cpuop_func op_30e0_31_ff; +extern cpuop_func op_30e8_31_nf; +extern cpuop_func op_30e8_31_ff; +extern cpuop_func op_30f0_31_nf; +extern cpuop_func op_30f0_31_ff; +extern cpuop_func op_30f8_31_nf; +extern cpuop_func op_30f8_31_ff; +extern cpuop_func op_30f9_31_nf; +extern cpuop_func op_30f9_31_ff; +extern cpuop_func op_30fa_31_nf; +extern cpuop_func op_30fa_31_ff; +extern cpuop_func op_30fb_31_nf; +extern cpuop_func op_30fb_31_ff; +extern cpuop_func op_30fc_31_nf; +extern cpuop_func op_30fc_31_ff; +extern cpuop_func op_3100_31_nf; +extern cpuop_func op_3100_31_ff; +extern cpuop_func op_3108_31_nf; +extern cpuop_func op_3108_31_ff; +extern cpuop_func op_3110_31_nf; +extern cpuop_func op_3110_31_ff; +extern cpuop_func op_3118_31_nf; +extern cpuop_func op_3118_31_ff; +extern cpuop_func op_3120_31_nf; +extern cpuop_func op_3120_31_ff; +extern cpuop_func op_3128_31_nf; +extern cpuop_func op_3128_31_ff; +extern cpuop_func op_3130_31_nf; +extern cpuop_func op_3130_31_ff; +extern cpuop_func op_3138_31_nf; +extern cpuop_func op_3138_31_ff; +extern cpuop_func op_3139_31_nf; +extern cpuop_func op_3139_31_ff; +extern cpuop_func op_313a_31_nf; +extern cpuop_func op_313a_31_ff; +extern cpuop_func op_313b_31_nf; +extern cpuop_func op_313b_31_ff; +extern cpuop_func op_313c_31_nf; +extern cpuop_func op_313c_31_ff; +extern cpuop_func op_3140_31_nf; +extern cpuop_func op_3140_31_ff; +extern cpuop_func op_3148_31_nf; +extern cpuop_func op_3148_31_ff; +extern cpuop_func op_3150_31_nf; +extern cpuop_func op_3150_31_ff; +extern cpuop_func op_3158_31_nf; +extern cpuop_func op_3158_31_ff; +extern cpuop_func op_3160_31_nf; +extern cpuop_func op_3160_31_ff; +extern cpuop_func op_3168_31_nf; +extern cpuop_func op_3168_31_ff; +extern cpuop_func op_3170_31_nf; +extern cpuop_func op_3170_31_ff; +extern cpuop_func op_3178_31_nf; +extern cpuop_func op_3178_31_ff; +extern cpuop_func op_3179_31_nf; +extern cpuop_func op_3179_31_ff; +extern cpuop_func op_317a_31_nf; +extern cpuop_func op_317a_31_ff; +extern cpuop_func op_317b_31_nf; +extern cpuop_func op_317b_31_ff; +extern cpuop_func op_317c_31_nf; +extern cpuop_func op_317c_31_ff; +extern cpuop_func op_3180_31_nf; +extern cpuop_func op_3180_31_ff; +extern cpuop_func op_3188_31_nf; +extern cpuop_func op_3188_31_ff; +extern cpuop_func op_3190_31_nf; +extern cpuop_func op_3190_31_ff; +extern cpuop_func op_3198_31_nf; +extern cpuop_func op_3198_31_ff; +extern cpuop_func op_31a0_31_nf; +extern cpuop_func op_31a0_31_ff; +extern cpuop_func op_31a8_31_nf; +extern cpuop_func op_31a8_31_ff; +extern cpuop_func op_31b0_31_nf; +extern cpuop_func op_31b0_31_ff; +extern cpuop_func op_31b8_31_nf; +extern cpuop_func op_31b8_31_ff; +extern cpuop_func op_31b9_31_nf; +extern cpuop_func op_31b9_31_ff; +extern cpuop_func op_31ba_31_nf; +extern cpuop_func op_31ba_31_ff; +extern cpuop_func op_31bb_31_nf; +extern cpuop_func op_31bb_31_ff; +extern cpuop_func op_31bc_31_nf; +extern cpuop_func op_31bc_31_ff; +extern cpuop_func op_31c0_31_nf; +extern cpuop_func op_31c0_31_ff; +extern cpuop_func op_31c8_31_nf; +extern cpuop_func op_31c8_31_ff; +extern cpuop_func op_31d0_31_nf; +extern cpuop_func op_31d0_31_ff; +extern cpuop_func op_31d8_31_nf; +extern cpuop_func op_31d8_31_ff; +extern cpuop_func op_31e0_31_nf; +extern cpuop_func op_31e0_31_ff; +extern cpuop_func op_31e8_31_nf; +extern cpuop_func op_31e8_31_ff; +extern cpuop_func op_31f0_31_nf; +extern cpuop_func op_31f0_31_ff; +extern cpuop_func op_31f8_31_nf; +extern cpuop_func op_31f8_31_ff; +extern cpuop_func op_31f9_31_nf; +extern cpuop_func op_31f9_31_ff; +extern cpuop_func op_31fa_31_nf; +extern cpuop_func op_31fa_31_ff; +extern cpuop_func op_31fb_31_nf; +extern cpuop_func op_31fb_31_ff; +extern cpuop_func op_31fc_31_nf; +extern cpuop_func op_31fc_31_ff; +extern cpuop_func op_33c0_31_nf; +extern cpuop_func op_33c0_31_ff; +extern cpuop_func op_33c8_31_nf; +extern cpuop_func op_33c8_31_ff; +extern cpuop_func op_33d0_31_nf; +extern cpuop_func op_33d0_31_ff; +extern cpuop_func op_33d8_31_nf; +extern cpuop_func op_33d8_31_ff; +extern cpuop_func op_33e0_31_nf; +extern cpuop_func op_33e0_31_ff; +extern cpuop_func op_33e8_31_nf; +extern cpuop_func op_33e8_31_ff; +extern cpuop_func op_33f0_31_nf; +extern cpuop_func op_33f0_31_ff; +extern cpuop_func op_33f8_31_nf; +extern cpuop_func op_33f8_31_ff; +extern cpuop_func op_33f9_31_nf; +extern cpuop_func op_33f9_31_ff; +extern cpuop_func op_33fa_31_nf; +extern cpuop_func op_33fa_31_ff; +extern cpuop_func op_33fb_31_nf; +extern cpuop_func op_33fb_31_ff; +extern cpuop_func op_33fc_31_nf; +extern cpuop_func op_33fc_31_ff; +extern cpuop_func op_4000_31_nf; +extern cpuop_func op_4000_31_ff; +extern cpuop_func op_4010_31_nf; +extern cpuop_func op_4010_31_ff; +extern cpuop_func op_4018_31_nf; +extern cpuop_func op_4018_31_ff; +extern cpuop_func op_4020_31_nf; +extern cpuop_func op_4020_31_ff; +extern cpuop_func op_4028_31_nf; +extern cpuop_func op_4028_31_ff; +extern cpuop_func op_4030_31_nf; +extern cpuop_func op_4030_31_ff; +extern cpuop_func op_4038_31_nf; +extern cpuop_func op_4038_31_ff; +extern cpuop_func op_4039_31_nf; +extern cpuop_func op_4039_31_ff; +extern cpuop_func op_4040_31_nf; +extern cpuop_func op_4040_31_ff; +extern cpuop_func op_4050_31_nf; +extern cpuop_func op_4050_31_ff; +extern cpuop_func op_4058_31_nf; +extern cpuop_func op_4058_31_ff; +extern cpuop_func op_4060_31_nf; +extern cpuop_func op_4060_31_ff; +extern cpuop_func op_4068_31_nf; +extern cpuop_func op_4068_31_ff; +extern cpuop_func op_4070_31_nf; +extern cpuop_func op_4070_31_ff; +extern cpuop_func op_4078_31_nf; +extern cpuop_func op_4078_31_ff; +extern cpuop_func op_4079_31_nf; +extern cpuop_func op_4079_31_ff; +extern cpuop_func op_4080_31_nf; +extern cpuop_func op_4080_31_ff; +extern cpuop_func op_4090_31_nf; +extern cpuop_func op_4090_31_ff; +extern cpuop_func op_4098_31_nf; +extern cpuop_func op_4098_31_ff; +extern cpuop_func op_40a0_31_nf; +extern cpuop_func op_40a0_31_ff; +extern cpuop_func op_40a8_31_nf; +extern cpuop_func op_40a8_31_ff; +extern cpuop_func op_40b0_31_nf; +extern cpuop_func op_40b0_31_ff; +extern cpuop_func op_40b8_31_nf; +extern cpuop_func op_40b8_31_ff; +extern cpuop_func op_40b9_31_nf; +extern cpuop_func op_40b9_31_ff; +extern cpuop_func op_40c0_31_nf; +extern cpuop_func op_40c0_31_ff; +extern cpuop_func op_40d0_31_nf; +extern cpuop_func op_40d0_31_ff; +extern cpuop_func op_40d8_31_nf; +extern cpuop_func op_40d8_31_ff; +extern cpuop_func op_40e0_31_nf; +extern cpuop_func op_40e0_31_ff; +extern cpuop_func op_40e8_31_nf; +extern cpuop_func op_40e8_31_ff; +extern cpuop_func op_40f0_31_nf; +extern cpuop_func op_40f0_31_ff; +extern cpuop_func op_40f8_31_nf; +extern cpuop_func op_40f8_31_ff; +extern cpuop_func op_40f9_31_nf; +extern cpuop_func op_40f9_31_ff; +extern cpuop_func op_4100_31_nf; +extern cpuop_func op_4100_31_ff; +extern cpuop_func op_4110_31_nf; +extern cpuop_func op_4110_31_ff; +extern cpuop_func op_4118_31_nf; +extern cpuop_func op_4118_31_ff; +extern cpuop_func op_4120_31_nf; +extern cpuop_func op_4120_31_ff; +extern cpuop_func op_4128_31_nf; +extern cpuop_func op_4128_31_ff; +extern cpuop_func op_4130_31_nf; +extern cpuop_func op_4130_31_ff; +extern cpuop_func op_4138_31_nf; +extern cpuop_func op_4138_31_ff; +extern cpuop_func op_4139_31_nf; +extern cpuop_func op_4139_31_ff; +extern cpuop_func op_413a_31_nf; +extern cpuop_func op_413a_31_ff; +extern cpuop_func op_413b_31_nf; +extern cpuop_func op_413b_31_ff; +extern cpuop_func op_413c_31_nf; +extern cpuop_func op_413c_31_ff; +extern cpuop_func op_4180_31_nf; +extern cpuop_func op_4180_31_ff; +extern cpuop_func op_4190_31_nf; +extern cpuop_func op_4190_31_ff; +extern cpuop_func op_4198_31_nf; +extern cpuop_func op_4198_31_ff; +extern cpuop_func op_41a0_31_nf; +extern cpuop_func op_41a0_31_ff; +extern cpuop_func op_41a8_31_nf; +extern cpuop_func op_41a8_31_ff; +extern cpuop_func op_41b0_31_nf; +extern cpuop_func op_41b0_31_ff; +extern cpuop_func op_41b8_31_nf; +extern cpuop_func op_41b8_31_ff; +extern cpuop_func op_41b9_31_nf; +extern cpuop_func op_41b9_31_ff; +extern cpuop_func op_41ba_31_nf; +extern cpuop_func op_41ba_31_ff; +extern cpuop_func op_41bb_31_nf; +extern cpuop_func op_41bb_31_ff; +extern cpuop_func op_41bc_31_nf; +extern cpuop_func op_41bc_31_ff; +extern cpuop_func op_41d0_31_nf; +extern cpuop_func op_41d0_31_ff; +extern cpuop_func op_41e8_31_nf; +extern cpuop_func op_41e8_31_ff; +extern cpuop_func op_41f0_31_nf; +extern cpuop_func op_41f0_31_ff; +extern cpuop_func op_41f8_31_nf; +extern cpuop_func op_41f8_31_ff; +extern cpuop_func op_41f9_31_nf; +extern cpuop_func op_41f9_31_ff; +extern cpuop_func op_41fa_31_nf; +extern cpuop_func op_41fa_31_ff; +extern cpuop_func op_41fb_31_nf; +extern cpuop_func op_41fb_31_ff; +extern cpuop_func op_4200_31_nf; +extern cpuop_func op_4200_31_ff; +extern cpuop_func op_4210_31_nf; +extern cpuop_func op_4210_31_ff; +extern cpuop_func op_4218_31_nf; +extern cpuop_func op_4218_31_ff; +extern cpuop_func op_4220_31_nf; +extern cpuop_func op_4220_31_ff; +extern cpuop_func op_4228_31_nf; +extern cpuop_func op_4228_31_ff; +extern cpuop_func op_4230_31_nf; +extern cpuop_func op_4230_31_ff; +extern cpuop_func op_4238_31_nf; +extern cpuop_func op_4238_31_ff; +extern cpuop_func op_4239_31_nf; +extern cpuop_func op_4239_31_ff; +extern cpuop_func op_4240_31_nf; +extern cpuop_func op_4240_31_ff; +extern cpuop_func op_4250_31_nf; +extern cpuop_func op_4250_31_ff; +extern cpuop_func op_4258_31_nf; +extern cpuop_func op_4258_31_ff; +extern cpuop_func op_4260_31_nf; +extern cpuop_func op_4260_31_ff; +extern cpuop_func op_4268_31_nf; +extern cpuop_func op_4268_31_ff; +extern cpuop_func op_4270_31_nf; +extern cpuop_func op_4270_31_ff; +extern cpuop_func op_4278_31_nf; +extern cpuop_func op_4278_31_ff; +extern cpuop_func op_4279_31_nf; +extern cpuop_func op_4279_31_ff; +extern cpuop_func op_4280_31_nf; +extern cpuop_func op_4280_31_ff; +extern cpuop_func op_4290_31_nf; +extern cpuop_func op_4290_31_ff; +extern cpuop_func op_4298_31_nf; +extern cpuop_func op_4298_31_ff; +extern cpuop_func op_42a0_31_nf; +extern cpuop_func op_42a0_31_ff; +extern cpuop_func op_42a8_31_nf; +extern cpuop_func op_42a8_31_ff; +extern cpuop_func op_42b0_31_nf; +extern cpuop_func op_42b0_31_ff; +extern cpuop_func op_42b8_31_nf; +extern cpuop_func op_42b8_31_ff; +extern cpuop_func op_42b9_31_nf; +extern cpuop_func op_42b9_31_ff; +extern cpuop_func op_42c0_31_nf; +extern cpuop_func op_42c0_31_ff; +extern cpuop_func op_42d0_31_nf; +extern cpuop_func op_42d0_31_ff; +extern cpuop_func op_42d8_31_nf; +extern cpuop_func op_42d8_31_ff; +extern cpuop_func op_42e0_31_nf; +extern cpuop_func op_42e0_31_ff; +extern cpuop_func op_42e8_31_nf; +extern cpuop_func op_42e8_31_ff; +extern cpuop_func op_42f0_31_nf; +extern cpuop_func op_42f0_31_ff; +extern cpuop_func op_42f8_31_nf; +extern cpuop_func op_42f8_31_ff; +extern cpuop_func op_42f9_31_nf; +extern cpuop_func op_42f9_31_ff; +extern cpuop_func op_4400_31_nf; +extern cpuop_func op_4400_31_ff; +extern cpuop_func op_4410_31_nf; +extern cpuop_func op_4410_31_ff; +extern cpuop_func op_4418_31_nf; +extern cpuop_func op_4418_31_ff; +extern cpuop_func op_4420_31_nf; +extern cpuop_func op_4420_31_ff; +extern cpuop_func op_4428_31_nf; +extern cpuop_func op_4428_31_ff; +extern cpuop_func op_4430_31_nf; +extern cpuop_func op_4430_31_ff; +extern cpuop_func op_4438_31_nf; +extern cpuop_func op_4438_31_ff; +extern cpuop_func op_4439_31_nf; +extern cpuop_func op_4439_31_ff; +extern cpuop_func op_4440_31_nf; +extern cpuop_func op_4440_31_ff; +extern cpuop_func op_4450_31_nf; +extern cpuop_func op_4450_31_ff; +extern cpuop_func op_4458_31_nf; +extern cpuop_func op_4458_31_ff; +extern cpuop_func op_4460_31_nf; +extern cpuop_func op_4460_31_ff; +extern cpuop_func op_4468_31_nf; +extern cpuop_func op_4468_31_ff; +extern cpuop_func op_4470_31_nf; +extern cpuop_func op_4470_31_ff; +extern cpuop_func op_4478_31_nf; +extern cpuop_func op_4478_31_ff; +extern cpuop_func op_4479_31_nf; +extern cpuop_func op_4479_31_ff; +extern cpuop_func op_4480_31_nf; +extern cpuop_func op_4480_31_ff; +extern cpuop_func op_4490_31_nf; +extern cpuop_func op_4490_31_ff; +extern cpuop_func op_4498_31_nf; +extern cpuop_func op_4498_31_ff; +extern cpuop_func op_44a0_31_nf; +extern cpuop_func op_44a0_31_ff; +extern cpuop_func op_44a8_31_nf; +extern cpuop_func op_44a8_31_ff; +extern cpuop_func op_44b0_31_nf; +extern cpuop_func op_44b0_31_ff; +extern cpuop_func op_44b8_31_nf; +extern cpuop_func op_44b8_31_ff; +extern cpuop_func op_44b9_31_nf; +extern cpuop_func op_44b9_31_ff; +extern cpuop_func op_44c0_31_nf; +extern cpuop_func op_44c0_31_ff; +extern cpuop_func op_44d0_31_nf; +extern cpuop_func op_44d0_31_ff; +extern cpuop_func op_44d8_31_nf; +extern cpuop_func op_44d8_31_ff; +extern cpuop_func op_44e0_31_nf; +extern cpuop_func op_44e0_31_ff; +extern cpuop_func op_44e8_31_nf; +extern cpuop_func op_44e8_31_ff; +extern cpuop_func op_44f0_31_nf; +extern cpuop_func op_44f0_31_ff; +extern cpuop_func op_44f8_31_nf; +extern cpuop_func op_44f8_31_ff; +extern cpuop_func op_44f9_31_nf; +extern cpuop_func op_44f9_31_ff; +extern cpuop_func op_44fa_31_nf; +extern cpuop_func op_44fa_31_ff; +extern cpuop_func op_44fb_31_nf; +extern cpuop_func op_44fb_31_ff; +extern cpuop_func op_44fc_31_nf; +extern cpuop_func op_44fc_31_ff; +extern cpuop_func op_4600_31_nf; +extern cpuop_func op_4600_31_ff; +extern cpuop_func op_4610_31_nf; +extern cpuop_func op_4610_31_ff; +extern cpuop_func op_4618_31_nf; +extern cpuop_func op_4618_31_ff; +extern cpuop_func op_4620_31_nf; +extern cpuop_func op_4620_31_ff; +extern cpuop_func op_4628_31_nf; +extern cpuop_func op_4628_31_ff; +extern cpuop_func op_4630_31_nf; +extern cpuop_func op_4630_31_ff; +extern cpuop_func op_4638_31_nf; +extern cpuop_func op_4638_31_ff; +extern cpuop_func op_4639_31_nf; +extern cpuop_func op_4639_31_ff; +extern cpuop_func op_4640_31_nf; +extern cpuop_func op_4640_31_ff; +extern cpuop_func op_4650_31_nf; +extern cpuop_func op_4650_31_ff; +extern cpuop_func op_4658_31_nf; +extern cpuop_func op_4658_31_ff; +extern cpuop_func op_4660_31_nf; +extern cpuop_func op_4660_31_ff; +extern cpuop_func op_4668_31_nf; +extern cpuop_func op_4668_31_ff; +extern cpuop_func op_4670_31_nf; +extern cpuop_func op_4670_31_ff; +extern cpuop_func op_4678_31_nf; +extern cpuop_func op_4678_31_ff; +extern cpuop_func op_4679_31_nf; +extern cpuop_func op_4679_31_ff; +extern cpuop_func op_4680_31_nf; +extern cpuop_func op_4680_31_ff; +extern cpuop_func op_4690_31_nf; +extern cpuop_func op_4690_31_ff; +extern cpuop_func op_4698_31_nf; +extern cpuop_func op_4698_31_ff; +extern cpuop_func op_46a0_31_nf; +extern cpuop_func op_46a0_31_ff; +extern cpuop_func op_46a8_31_nf; +extern cpuop_func op_46a8_31_ff; +extern cpuop_func op_46b0_31_nf; +extern cpuop_func op_46b0_31_ff; +extern cpuop_func op_46b8_31_nf; +extern cpuop_func op_46b8_31_ff; +extern cpuop_func op_46b9_31_nf; +extern cpuop_func op_46b9_31_ff; +extern cpuop_func op_46c0_31_nf; +extern cpuop_func op_46c0_31_ff; +extern cpuop_func op_46d0_31_nf; +extern cpuop_func op_46d0_31_ff; +extern cpuop_func op_46d8_31_nf; +extern cpuop_func op_46d8_31_ff; +extern cpuop_func op_46e0_31_nf; +extern cpuop_func op_46e0_31_ff; +extern cpuop_func op_46e8_31_nf; +extern cpuop_func op_46e8_31_ff; +extern cpuop_func op_46f0_31_nf; +extern cpuop_func op_46f0_31_ff; +extern cpuop_func op_46f8_31_nf; +extern cpuop_func op_46f8_31_ff; +extern cpuop_func op_46f9_31_nf; +extern cpuop_func op_46f9_31_ff; +extern cpuop_func op_46fa_31_nf; +extern cpuop_func op_46fa_31_ff; +extern cpuop_func op_46fb_31_nf; +extern cpuop_func op_46fb_31_ff; +extern cpuop_func op_46fc_31_nf; +extern cpuop_func op_46fc_31_ff; +extern cpuop_func op_4800_31_nf; +extern cpuop_func op_4800_31_ff; +extern cpuop_func op_4808_31_nf; +extern cpuop_func op_4808_31_ff; +extern cpuop_func op_4810_31_nf; +extern cpuop_func op_4810_31_ff; +extern cpuop_func op_4818_31_nf; +extern cpuop_func op_4818_31_ff; +extern cpuop_func op_4820_31_nf; +extern cpuop_func op_4820_31_ff; +extern cpuop_func op_4828_31_nf; +extern cpuop_func op_4828_31_ff; +extern cpuop_func op_4830_31_nf; +extern cpuop_func op_4830_31_ff; +extern cpuop_func op_4838_31_nf; +extern cpuop_func op_4838_31_ff; +extern cpuop_func op_4839_31_nf; +extern cpuop_func op_4839_31_ff; +extern cpuop_func op_4840_31_nf; +extern cpuop_func op_4840_31_ff; +extern cpuop_func op_4848_31_nf; +extern cpuop_func op_4848_31_ff; +extern cpuop_func op_4850_31_nf; +extern cpuop_func op_4850_31_ff; +extern cpuop_func op_4868_31_nf; +extern cpuop_func op_4868_31_ff; +extern cpuop_func op_4870_31_nf; +extern cpuop_func op_4870_31_ff; +extern cpuop_func op_4878_31_nf; +extern cpuop_func op_4878_31_ff; +extern cpuop_func op_4879_31_nf; +extern cpuop_func op_4879_31_ff; +extern cpuop_func op_487a_31_nf; +extern cpuop_func op_487a_31_ff; +extern cpuop_func op_487b_31_nf; +extern cpuop_func op_487b_31_ff; +extern cpuop_func op_4880_31_nf; +extern cpuop_func op_4880_31_ff; +extern cpuop_func op_4890_31_nf; +extern cpuop_func op_4890_31_ff; +extern cpuop_func op_48a0_31_nf; +extern cpuop_func op_48a0_31_ff; +extern cpuop_func op_48a8_31_nf; +extern cpuop_func op_48a8_31_ff; +extern cpuop_func op_48b0_31_nf; +extern cpuop_func op_48b0_31_ff; +extern cpuop_func op_48b8_31_nf; +extern cpuop_func op_48b8_31_ff; +extern cpuop_func op_48b9_31_nf; +extern cpuop_func op_48b9_31_ff; +extern cpuop_func op_48c0_31_nf; +extern cpuop_func op_48c0_31_ff; +extern cpuop_func op_48d0_31_nf; +extern cpuop_func op_48d0_31_ff; +extern cpuop_func op_48e0_31_nf; +extern cpuop_func op_48e0_31_ff; +extern cpuop_func op_48e8_31_nf; +extern cpuop_func op_48e8_31_ff; +extern cpuop_func op_48f0_31_nf; +extern cpuop_func op_48f0_31_ff; +extern cpuop_func op_48f8_31_nf; +extern cpuop_func op_48f8_31_ff; +extern cpuop_func op_48f9_31_nf; +extern cpuop_func op_48f9_31_ff; +extern cpuop_func op_49c0_31_nf; +extern cpuop_func op_49c0_31_ff; +extern cpuop_func op_4a00_31_nf; +extern cpuop_func op_4a00_31_ff; +extern cpuop_func op_4a10_31_nf; +extern cpuop_func op_4a10_31_ff; +extern cpuop_func op_4a18_31_nf; +extern cpuop_func op_4a18_31_ff; +extern cpuop_func op_4a20_31_nf; +extern cpuop_func op_4a20_31_ff; +extern cpuop_func op_4a28_31_nf; +extern cpuop_func op_4a28_31_ff; +extern cpuop_func op_4a30_31_nf; +extern cpuop_func op_4a30_31_ff; +extern cpuop_func op_4a38_31_nf; +extern cpuop_func op_4a38_31_ff; +extern cpuop_func op_4a39_31_nf; +extern cpuop_func op_4a39_31_ff; +extern cpuop_func op_4a3a_31_nf; +extern cpuop_func op_4a3a_31_ff; +extern cpuop_func op_4a3b_31_nf; +extern cpuop_func op_4a3b_31_ff; +extern cpuop_func op_4a3c_31_nf; +extern cpuop_func op_4a3c_31_ff; +extern cpuop_func op_4a40_31_nf; +extern cpuop_func op_4a40_31_ff; +extern cpuop_func op_4a48_31_nf; +extern cpuop_func op_4a48_31_ff; +extern cpuop_func op_4a50_31_nf; +extern cpuop_func op_4a50_31_ff; +extern cpuop_func op_4a58_31_nf; +extern cpuop_func op_4a58_31_ff; +extern cpuop_func op_4a60_31_nf; +extern cpuop_func op_4a60_31_ff; +extern cpuop_func op_4a68_31_nf; +extern cpuop_func op_4a68_31_ff; +extern cpuop_func op_4a70_31_nf; +extern cpuop_func op_4a70_31_ff; +extern cpuop_func op_4a78_31_nf; +extern cpuop_func op_4a78_31_ff; +extern cpuop_func op_4a79_31_nf; +extern cpuop_func op_4a79_31_ff; +extern cpuop_func op_4a7a_31_nf; +extern cpuop_func op_4a7a_31_ff; +extern cpuop_func op_4a7b_31_nf; +extern cpuop_func op_4a7b_31_ff; +extern cpuop_func op_4a7c_31_nf; +extern cpuop_func op_4a7c_31_ff; +extern cpuop_func op_4a80_31_nf; +extern cpuop_func op_4a80_31_ff; +extern cpuop_func op_4a88_31_nf; +extern cpuop_func op_4a88_31_ff; +extern cpuop_func op_4a90_31_nf; +extern cpuop_func op_4a90_31_ff; +extern cpuop_func op_4a98_31_nf; +extern cpuop_func op_4a98_31_ff; +extern cpuop_func op_4aa0_31_nf; +extern cpuop_func op_4aa0_31_ff; +extern cpuop_func op_4aa8_31_nf; +extern cpuop_func op_4aa8_31_ff; +extern cpuop_func op_4ab0_31_nf; +extern cpuop_func op_4ab0_31_ff; +extern cpuop_func op_4ab8_31_nf; +extern cpuop_func op_4ab8_31_ff; +extern cpuop_func op_4ab9_31_nf; +extern cpuop_func op_4ab9_31_ff; +extern cpuop_func op_4aba_31_nf; +extern cpuop_func op_4aba_31_ff; +extern cpuop_func op_4abb_31_nf; +extern cpuop_func op_4abb_31_ff; +extern cpuop_func op_4abc_31_nf; +extern cpuop_func op_4abc_31_ff; +extern cpuop_func op_4ac0_31_nf; +extern cpuop_func op_4ac0_31_ff; +extern cpuop_func op_4ad0_31_nf; +extern cpuop_func op_4ad0_31_ff; +extern cpuop_func op_4ad8_31_nf; +extern cpuop_func op_4ad8_31_ff; +extern cpuop_func op_4ae0_31_nf; +extern cpuop_func op_4ae0_31_ff; +extern cpuop_func op_4ae8_31_nf; +extern cpuop_func op_4ae8_31_ff; +extern cpuop_func op_4af0_31_nf; +extern cpuop_func op_4af0_31_ff; +extern cpuop_func op_4af8_31_nf; +extern cpuop_func op_4af8_31_ff; +extern cpuop_func op_4af9_31_nf; +extern cpuop_func op_4af9_31_ff; +extern cpuop_func op_4c00_31_nf; +extern cpuop_func op_4c00_31_ff; +extern cpuop_func op_4c10_31_nf; +extern cpuop_func op_4c10_31_ff; +extern cpuop_func op_4c18_31_nf; +extern cpuop_func op_4c18_31_ff; +extern cpuop_func op_4c20_31_nf; +extern cpuop_func op_4c20_31_ff; +extern cpuop_func op_4c28_31_nf; +extern cpuop_func op_4c28_31_ff; +extern cpuop_func op_4c30_31_nf; +extern cpuop_func op_4c30_31_ff; +extern cpuop_func op_4c38_31_nf; +extern cpuop_func op_4c38_31_ff; +extern cpuop_func op_4c39_31_nf; +extern cpuop_func op_4c39_31_ff; +extern cpuop_func op_4c3a_31_nf; +extern cpuop_func op_4c3a_31_ff; +extern cpuop_func op_4c3b_31_nf; +extern cpuop_func op_4c3b_31_ff; +extern cpuop_func op_4c3c_31_nf; +extern cpuop_func op_4c3c_31_ff; +extern cpuop_func op_4c40_31_nf; +extern cpuop_func op_4c40_31_ff; +extern cpuop_func op_4c50_31_nf; +extern cpuop_func op_4c50_31_ff; +extern cpuop_func op_4c58_31_nf; +extern cpuop_func op_4c58_31_ff; +extern cpuop_func op_4c60_31_nf; +extern cpuop_func op_4c60_31_ff; +extern cpuop_func op_4c68_31_nf; +extern cpuop_func op_4c68_31_ff; +extern cpuop_func op_4c70_31_nf; +extern cpuop_func op_4c70_31_ff; +extern cpuop_func op_4c78_31_nf; +extern cpuop_func op_4c78_31_ff; +extern cpuop_func op_4c79_31_nf; +extern cpuop_func op_4c79_31_ff; +extern cpuop_func op_4c7a_31_nf; +extern cpuop_func op_4c7a_31_ff; +extern cpuop_func op_4c7b_31_nf; +extern cpuop_func op_4c7b_31_ff; +extern cpuop_func op_4c7c_31_nf; +extern cpuop_func op_4c7c_31_ff; +extern cpuop_func op_4c90_31_nf; +extern cpuop_func op_4c90_31_ff; +extern cpuop_func op_4c98_31_nf; +extern cpuop_func op_4c98_31_ff; +extern cpuop_func op_4ca8_31_nf; +extern cpuop_func op_4ca8_31_ff; +extern cpuop_func op_4cb0_31_nf; +extern cpuop_func op_4cb0_31_ff; +extern cpuop_func op_4cb8_31_nf; +extern cpuop_func op_4cb8_31_ff; +extern cpuop_func op_4cb9_31_nf; +extern cpuop_func op_4cb9_31_ff; +extern cpuop_func op_4cba_31_nf; +extern cpuop_func op_4cba_31_ff; +extern cpuop_func op_4cbb_31_nf; +extern cpuop_func op_4cbb_31_ff; +extern cpuop_func op_4cd0_31_nf; +extern cpuop_func op_4cd0_31_ff; +extern cpuop_func op_4cd8_31_nf; +extern cpuop_func op_4cd8_31_ff; +extern cpuop_func op_4ce8_31_nf; +extern cpuop_func op_4ce8_31_ff; +extern cpuop_func op_4cf0_31_nf; +extern cpuop_func op_4cf0_31_ff; +extern cpuop_func op_4cf8_31_nf; +extern cpuop_func op_4cf8_31_ff; +extern cpuop_func op_4cf9_31_nf; +extern cpuop_func op_4cf9_31_ff; +extern cpuop_func op_4cfa_31_nf; +extern cpuop_func op_4cfa_31_ff; +extern cpuop_func op_4cfb_31_nf; +extern cpuop_func op_4cfb_31_ff; +extern cpuop_func op_4e40_31_nf; +extern cpuop_func op_4e40_31_ff; +extern cpuop_func op_4e50_31_nf; +extern cpuop_func op_4e50_31_ff; +extern cpuop_func op_4e58_31_nf; +extern cpuop_func op_4e58_31_ff; +extern cpuop_func op_4e60_31_nf; +extern cpuop_func op_4e60_31_ff; +extern cpuop_func op_4e68_31_nf; +extern cpuop_func op_4e68_31_ff; +extern cpuop_func op_4e70_31_nf; +extern cpuop_func op_4e70_31_ff; +extern cpuop_func op_4e71_31_nf; +extern cpuop_func op_4e71_31_ff; +extern cpuop_func op_4e72_31_nf; +extern cpuop_func op_4e72_31_ff; +extern cpuop_func op_4e73_31_nf; +extern cpuop_func op_4e73_31_ff; +extern cpuop_func op_4e74_31_nf; +extern cpuop_func op_4e74_31_ff; +extern cpuop_func op_4e75_31_nf; +extern cpuop_func op_4e75_31_ff; +extern cpuop_func op_4e76_31_nf; +extern cpuop_func op_4e76_31_ff; +extern cpuop_func op_4e77_31_nf; +extern cpuop_func op_4e77_31_ff; +extern cpuop_func op_4e7a_31_nf; +extern cpuop_func op_4e7a_31_ff; +extern cpuop_func op_4e7b_31_nf; +extern cpuop_func op_4e7b_31_ff; +extern cpuop_func op_4e90_31_nf; +extern cpuop_func op_4e90_31_ff; +extern cpuop_func op_4ea8_31_nf; +extern cpuop_func op_4ea8_31_ff; +extern cpuop_func op_4eb0_31_nf; +extern cpuop_func op_4eb0_31_ff; +extern cpuop_func op_4eb8_31_nf; +extern cpuop_func op_4eb8_31_ff; +extern cpuop_func op_4eb9_31_nf; +extern cpuop_func op_4eb9_31_ff; +extern cpuop_func op_4eba_31_nf; +extern cpuop_func op_4eba_31_ff; +extern cpuop_func op_4ebb_31_nf; +extern cpuop_func op_4ebb_31_ff; +extern cpuop_func op_4ed0_31_nf; +extern cpuop_func op_4ed0_31_ff; +extern cpuop_func op_4ee8_31_nf; +extern cpuop_func op_4ee8_31_ff; +extern cpuop_func op_4ef0_31_nf; +extern cpuop_func op_4ef0_31_ff; +extern cpuop_func op_4ef8_31_nf; +extern cpuop_func op_4ef8_31_ff; +extern cpuop_func op_4ef9_31_nf; +extern cpuop_func op_4ef9_31_ff; +extern cpuop_func op_4efa_31_nf; +extern cpuop_func op_4efa_31_ff; +extern cpuop_func op_4efb_31_nf; +extern cpuop_func op_4efb_31_ff; +extern cpuop_func op_5000_31_nf; +extern cpuop_func op_5000_31_ff; +extern cpuop_func op_5010_31_nf; +extern cpuop_func op_5010_31_ff; +extern cpuop_func op_5018_31_nf; +extern cpuop_func op_5018_31_ff; +extern cpuop_func op_5020_31_nf; +extern cpuop_func op_5020_31_ff; +extern cpuop_func op_5028_31_nf; +extern cpuop_func op_5028_31_ff; +extern cpuop_func op_5030_31_nf; +extern cpuop_func op_5030_31_ff; +extern cpuop_func op_5038_31_nf; +extern cpuop_func op_5038_31_ff; +extern cpuop_func op_5039_31_nf; +extern cpuop_func op_5039_31_ff; +extern cpuop_func op_5040_31_nf; +extern cpuop_func op_5040_31_ff; +extern cpuop_func op_5048_31_nf; +extern cpuop_func op_5048_31_ff; +extern cpuop_func op_5050_31_nf; +extern cpuop_func op_5050_31_ff; +extern cpuop_func op_5058_31_nf; +extern cpuop_func op_5058_31_ff; +extern cpuop_func op_5060_31_nf; +extern cpuop_func op_5060_31_ff; +extern cpuop_func op_5068_31_nf; +extern cpuop_func op_5068_31_ff; +extern cpuop_func op_5070_31_nf; +extern cpuop_func op_5070_31_ff; +extern cpuop_func op_5078_31_nf; +extern cpuop_func op_5078_31_ff; +extern cpuop_func op_5079_31_nf; +extern cpuop_func op_5079_31_ff; +extern cpuop_func op_5080_31_nf; +extern cpuop_func op_5080_31_ff; +extern cpuop_func op_5088_31_nf; +extern cpuop_func op_5088_31_ff; +extern cpuop_func op_5090_31_nf; +extern cpuop_func op_5090_31_ff; +extern cpuop_func op_5098_31_nf; +extern cpuop_func op_5098_31_ff; +extern cpuop_func op_50a0_31_nf; +extern cpuop_func op_50a0_31_ff; +extern cpuop_func op_50a8_31_nf; +extern cpuop_func op_50a8_31_ff; +extern cpuop_func op_50b0_31_nf; +extern cpuop_func op_50b0_31_ff; +extern cpuop_func op_50b8_31_nf; +extern cpuop_func op_50b8_31_ff; +extern cpuop_func op_50b9_31_nf; +extern cpuop_func op_50b9_31_ff; +extern cpuop_func op_50c0_31_nf; +extern cpuop_func op_50c0_31_ff; +extern cpuop_func op_50c8_31_nf; +extern cpuop_func op_50c8_31_ff; +extern cpuop_func op_50d0_31_nf; +extern cpuop_func op_50d0_31_ff; +extern cpuop_func op_50d8_31_nf; +extern cpuop_func op_50d8_31_ff; +extern cpuop_func op_50e0_31_nf; +extern cpuop_func op_50e0_31_ff; +extern cpuop_func op_50e8_31_nf; +extern cpuop_func op_50e8_31_ff; +extern cpuop_func op_50f0_31_nf; +extern cpuop_func op_50f0_31_ff; +extern cpuop_func op_50f8_31_nf; +extern cpuop_func op_50f8_31_ff; +extern cpuop_func op_50f9_31_nf; +extern cpuop_func op_50f9_31_ff; +extern cpuop_func op_50fa_31_nf; +extern cpuop_func op_50fa_31_ff; +extern cpuop_func op_50fb_31_nf; +extern cpuop_func op_50fb_31_ff; +extern cpuop_func op_50fc_31_nf; +extern cpuop_func op_50fc_31_ff; +extern cpuop_func op_5100_31_nf; +extern cpuop_func op_5100_31_ff; +extern cpuop_func op_5110_31_nf; +extern cpuop_func op_5110_31_ff; +extern cpuop_func op_5118_31_nf; +extern cpuop_func op_5118_31_ff; +extern cpuop_func op_5120_31_nf; +extern cpuop_func op_5120_31_ff; +extern cpuop_func op_5128_31_nf; +extern cpuop_func op_5128_31_ff; +extern cpuop_func op_5130_31_nf; +extern cpuop_func op_5130_31_ff; +extern cpuop_func op_5138_31_nf; +extern cpuop_func op_5138_31_ff; +extern cpuop_func op_5139_31_nf; +extern cpuop_func op_5139_31_ff; +extern cpuop_func op_5140_31_nf; +extern cpuop_func op_5140_31_ff; +extern cpuop_func op_5148_31_nf; +extern cpuop_func op_5148_31_ff; +extern cpuop_func op_5150_31_nf; +extern cpuop_func op_5150_31_ff; +extern cpuop_func op_5158_31_nf; +extern cpuop_func op_5158_31_ff; +extern cpuop_func op_5160_31_nf; +extern cpuop_func op_5160_31_ff; +extern cpuop_func op_5168_31_nf; +extern cpuop_func op_5168_31_ff; +extern cpuop_func op_5170_31_nf; +extern cpuop_func op_5170_31_ff; +extern cpuop_func op_5178_31_nf; +extern cpuop_func op_5178_31_ff; +extern cpuop_func op_5179_31_nf; +extern cpuop_func op_5179_31_ff; +extern cpuop_func op_5180_31_nf; +extern cpuop_func op_5180_31_ff; +extern cpuop_func op_5188_31_nf; +extern cpuop_func op_5188_31_ff; +extern cpuop_func op_5190_31_nf; +extern cpuop_func op_5190_31_ff; +extern cpuop_func op_5198_31_nf; +extern cpuop_func op_5198_31_ff; +extern cpuop_func op_51a0_31_nf; +extern cpuop_func op_51a0_31_ff; +extern cpuop_func op_51a8_31_nf; +extern cpuop_func op_51a8_31_ff; +extern cpuop_func op_51b0_31_nf; +extern cpuop_func op_51b0_31_ff; +extern cpuop_func op_51b8_31_nf; +extern cpuop_func op_51b8_31_ff; +extern cpuop_func op_51b9_31_nf; +extern cpuop_func op_51b9_31_ff; +extern cpuop_func op_51c0_31_nf; +extern cpuop_func op_51c0_31_ff; +extern cpuop_func op_51c8_31_nf; +extern cpuop_func op_51c8_31_ff; +extern cpuop_func op_51d0_31_nf; +extern cpuop_func op_51d0_31_ff; +extern cpuop_func op_51d8_31_nf; +extern cpuop_func op_51d8_31_ff; +extern cpuop_func op_51e0_31_nf; +extern cpuop_func op_51e0_31_ff; +extern cpuop_func op_51e8_31_nf; +extern cpuop_func op_51e8_31_ff; +extern cpuop_func op_51f0_31_nf; +extern cpuop_func op_51f0_31_ff; +extern cpuop_func op_51f8_31_nf; +extern cpuop_func op_51f8_31_ff; +extern cpuop_func op_51f9_31_nf; +extern cpuop_func op_51f9_31_ff; +extern cpuop_func op_51fa_31_nf; +extern cpuop_func op_51fa_31_ff; +extern cpuop_func op_51fb_31_nf; +extern cpuop_func op_51fb_31_ff; +extern cpuop_func op_51fc_31_nf; +extern cpuop_func op_51fc_31_ff; +extern cpuop_func op_52c0_31_nf; +extern cpuop_func op_52c0_31_ff; +extern cpuop_func op_52c8_31_nf; +extern cpuop_func op_52c8_31_ff; +extern cpuop_func op_52d0_31_nf; +extern cpuop_func op_52d0_31_ff; +extern cpuop_func op_52d8_31_nf; +extern cpuop_func op_52d8_31_ff; +extern cpuop_func op_52e0_31_nf; +extern cpuop_func op_52e0_31_ff; +extern cpuop_func op_52e8_31_nf; +extern cpuop_func op_52e8_31_ff; +extern cpuop_func op_52f0_31_nf; +extern cpuop_func op_52f0_31_ff; +extern cpuop_func op_52f8_31_nf; +extern cpuop_func op_52f8_31_ff; +extern cpuop_func op_52f9_31_nf; +extern cpuop_func op_52f9_31_ff; +extern cpuop_func op_52fa_31_nf; +extern cpuop_func op_52fa_31_ff; +extern cpuop_func op_52fb_31_nf; +extern cpuop_func op_52fb_31_ff; +extern cpuop_func op_52fc_31_nf; +extern cpuop_func op_52fc_31_ff; +extern cpuop_func op_53c0_31_nf; +extern cpuop_func op_53c0_31_ff; +extern cpuop_func op_53c8_31_nf; +extern cpuop_func op_53c8_31_ff; +extern cpuop_func op_53d0_31_nf; +extern cpuop_func op_53d0_31_ff; +extern cpuop_func op_53d8_31_nf; +extern cpuop_func op_53d8_31_ff; +extern cpuop_func op_53e0_31_nf; +extern cpuop_func op_53e0_31_ff; +extern cpuop_func op_53e8_31_nf; +extern cpuop_func op_53e8_31_ff; +extern cpuop_func op_53f0_31_nf; +extern cpuop_func op_53f0_31_ff; +extern cpuop_func op_53f8_31_nf; +extern cpuop_func op_53f8_31_ff; +extern cpuop_func op_53f9_31_nf; +extern cpuop_func op_53f9_31_ff; +extern cpuop_func op_53fa_31_nf; +extern cpuop_func op_53fa_31_ff; +extern cpuop_func op_53fb_31_nf; +extern cpuop_func op_53fb_31_ff; +extern cpuop_func op_53fc_31_nf; +extern cpuop_func op_53fc_31_ff; +extern cpuop_func op_54c0_31_nf; +extern cpuop_func op_54c0_31_ff; +extern cpuop_func op_54c8_31_nf; +extern cpuop_func op_54c8_31_ff; +extern cpuop_func op_54d0_31_nf; +extern cpuop_func op_54d0_31_ff; +extern cpuop_func op_54d8_31_nf; +extern cpuop_func op_54d8_31_ff; +extern cpuop_func op_54e0_31_nf; +extern cpuop_func op_54e0_31_ff; +extern cpuop_func op_54e8_31_nf; +extern cpuop_func op_54e8_31_ff; +extern cpuop_func op_54f0_31_nf; +extern cpuop_func op_54f0_31_ff; +extern cpuop_func op_54f8_31_nf; +extern cpuop_func op_54f8_31_ff; +extern cpuop_func op_54f9_31_nf; +extern cpuop_func op_54f9_31_ff; +extern cpuop_func op_54fa_31_nf; +extern cpuop_func op_54fa_31_ff; +extern cpuop_func op_54fb_31_nf; +extern cpuop_func op_54fb_31_ff; +extern cpuop_func op_54fc_31_nf; +extern cpuop_func op_54fc_31_ff; +extern cpuop_func op_55c0_31_nf; +extern cpuop_func op_55c0_31_ff; +extern cpuop_func op_55c8_31_nf; +extern cpuop_func op_55c8_31_ff; +extern cpuop_func op_55d0_31_nf; +extern cpuop_func op_55d0_31_ff; +extern cpuop_func op_55d8_31_nf; +extern cpuop_func op_55d8_31_ff; +extern cpuop_func op_55e0_31_nf; +extern cpuop_func op_55e0_31_ff; +extern cpuop_func op_55e8_31_nf; +extern cpuop_func op_55e8_31_ff; +extern cpuop_func op_55f0_31_nf; +extern cpuop_func op_55f0_31_ff; +extern cpuop_func op_55f8_31_nf; +extern cpuop_func op_55f8_31_ff; +extern cpuop_func op_55f9_31_nf; +extern cpuop_func op_55f9_31_ff; +extern cpuop_func op_55fa_31_nf; +extern cpuop_func op_55fa_31_ff; +extern cpuop_func op_55fb_31_nf; +extern cpuop_func op_55fb_31_ff; +extern cpuop_func op_55fc_31_nf; +extern cpuop_func op_55fc_31_ff; +extern cpuop_func op_56c0_31_nf; +extern cpuop_func op_56c0_31_ff; +extern cpuop_func op_56c8_31_nf; +extern cpuop_func op_56c8_31_ff; +extern cpuop_func op_56d0_31_nf; +extern cpuop_func op_56d0_31_ff; +extern cpuop_func op_56d8_31_nf; +extern cpuop_func op_56d8_31_ff; +extern cpuop_func op_56e0_31_nf; +extern cpuop_func op_56e0_31_ff; +extern cpuop_func op_56e8_31_nf; +extern cpuop_func op_56e8_31_ff; +extern cpuop_func op_56f0_31_nf; +extern cpuop_func op_56f0_31_ff; +extern cpuop_func op_56f8_31_nf; +extern cpuop_func op_56f8_31_ff; +extern cpuop_func op_56f9_31_nf; +extern cpuop_func op_56f9_31_ff; +extern cpuop_func op_56fa_31_nf; +extern cpuop_func op_56fa_31_ff; +extern cpuop_func op_56fb_31_nf; +extern cpuop_func op_56fb_31_ff; +extern cpuop_func op_56fc_31_nf; +extern cpuop_func op_56fc_31_ff; +extern cpuop_func op_57c0_31_nf; +extern cpuop_func op_57c0_31_ff; +extern cpuop_func op_57c8_31_nf; +extern cpuop_func op_57c8_31_ff; +extern cpuop_func op_57d0_31_nf; +extern cpuop_func op_57d0_31_ff; +extern cpuop_func op_57d8_31_nf; +extern cpuop_func op_57d8_31_ff; +extern cpuop_func op_57e0_31_nf; +extern cpuop_func op_57e0_31_ff; +extern cpuop_func op_57e8_31_nf; +extern cpuop_func op_57e8_31_ff; +extern cpuop_func op_57f0_31_nf; +extern cpuop_func op_57f0_31_ff; +extern cpuop_func op_57f8_31_nf; +extern cpuop_func op_57f8_31_ff; +extern cpuop_func op_57f9_31_nf; +extern cpuop_func op_57f9_31_ff; +extern cpuop_func op_57fa_31_nf; +extern cpuop_func op_57fa_31_ff; +extern cpuop_func op_57fb_31_nf; +extern cpuop_func op_57fb_31_ff; +extern cpuop_func op_57fc_31_nf; +extern cpuop_func op_57fc_31_ff; +extern cpuop_func op_58c0_31_nf; +extern cpuop_func op_58c0_31_ff; +extern cpuop_func op_58c8_31_nf; +extern cpuop_func op_58c8_31_ff; +extern cpuop_func op_58d0_31_nf; +extern cpuop_func op_58d0_31_ff; +extern cpuop_func op_58d8_31_nf; +extern cpuop_func op_58d8_31_ff; +extern cpuop_func op_58e0_31_nf; +extern cpuop_func op_58e0_31_ff; +extern cpuop_func op_58e8_31_nf; +extern cpuop_func op_58e8_31_ff; +extern cpuop_func op_58f0_31_nf; +extern cpuop_func op_58f0_31_ff; +extern cpuop_func op_58f8_31_nf; +extern cpuop_func op_58f8_31_ff; +extern cpuop_func op_58f9_31_nf; +extern cpuop_func op_58f9_31_ff; +extern cpuop_func op_58fa_31_nf; +extern cpuop_func op_58fa_31_ff; +extern cpuop_func op_58fb_31_nf; +extern cpuop_func op_58fb_31_ff; +extern cpuop_func op_58fc_31_nf; +extern cpuop_func op_58fc_31_ff; +extern cpuop_func op_59c0_31_nf; +extern cpuop_func op_59c0_31_ff; +extern cpuop_func op_59c8_31_nf; +extern cpuop_func op_59c8_31_ff; +extern cpuop_func op_59d0_31_nf; +extern cpuop_func op_59d0_31_ff; +extern cpuop_func op_59d8_31_nf; +extern cpuop_func op_59d8_31_ff; +extern cpuop_func op_59e0_31_nf; +extern cpuop_func op_59e0_31_ff; +extern cpuop_func op_59e8_31_nf; +extern cpuop_func op_59e8_31_ff; +extern cpuop_func op_59f0_31_nf; +extern cpuop_func op_59f0_31_ff; +extern cpuop_func op_59f8_31_nf; +extern cpuop_func op_59f8_31_ff; +extern cpuop_func op_59f9_31_nf; +extern cpuop_func op_59f9_31_ff; +extern cpuop_func op_59fa_31_nf; +extern cpuop_func op_59fa_31_ff; +extern cpuop_func op_59fb_31_nf; +extern cpuop_func op_59fb_31_ff; +extern cpuop_func op_59fc_31_nf; +extern cpuop_func op_59fc_31_ff; +extern cpuop_func op_5ac0_31_nf; +extern cpuop_func op_5ac0_31_ff; +extern cpuop_func op_5ac8_31_nf; +extern cpuop_func op_5ac8_31_ff; +extern cpuop_func op_5ad0_31_nf; +extern cpuop_func op_5ad0_31_ff; +extern cpuop_func op_5ad8_31_nf; +extern cpuop_func op_5ad8_31_ff; +extern cpuop_func op_5ae0_31_nf; +extern cpuop_func op_5ae0_31_ff; +extern cpuop_func op_5ae8_31_nf; +extern cpuop_func op_5ae8_31_ff; +extern cpuop_func op_5af0_31_nf; +extern cpuop_func op_5af0_31_ff; +extern cpuop_func op_5af8_31_nf; +extern cpuop_func op_5af8_31_ff; +extern cpuop_func op_5af9_31_nf; +extern cpuop_func op_5af9_31_ff; +extern cpuop_func op_5afa_31_nf; +extern cpuop_func op_5afa_31_ff; +extern cpuop_func op_5afb_31_nf; +extern cpuop_func op_5afb_31_ff; +extern cpuop_func op_5afc_31_nf; +extern cpuop_func op_5afc_31_ff; +extern cpuop_func op_5bc0_31_nf; +extern cpuop_func op_5bc0_31_ff; +extern cpuop_func op_5bc8_31_nf; +extern cpuop_func op_5bc8_31_ff; +extern cpuop_func op_5bd0_31_nf; +extern cpuop_func op_5bd0_31_ff; +extern cpuop_func op_5bd8_31_nf; +extern cpuop_func op_5bd8_31_ff; +extern cpuop_func op_5be0_31_nf; +extern cpuop_func op_5be0_31_ff; +extern cpuop_func op_5be8_31_nf; +extern cpuop_func op_5be8_31_ff; +extern cpuop_func op_5bf0_31_nf; +extern cpuop_func op_5bf0_31_ff; +extern cpuop_func op_5bf8_31_nf; +extern cpuop_func op_5bf8_31_ff; +extern cpuop_func op_5bf9_31_nf; +extern cpuop_func op_5bf9_31_ff; +extern cpuop_func op_5bfa_31_nf; +extern cpuop_func op_5bfa_31_ff; +extern cpuop_func op_5bfb_31_nf; +extern cpuop_func op_5bfb_31_ff; +extern cpuop_func op_5bfc_31_nf; +extern cpuop_func op_5bfc_31_ff; +extern cpuop_func op_5cc0_31_nf; +extern cpuop_func op_5cc0_31_ff; +extern cpuop_func op_5cc8_31_nf; +extern cpuop_func op_5cc8_31_ff; +extern cpuop_func op_5cd0_31_nf; +extern cpuop_func op_5cd0_31_ff; +extern cpuop_func op_5cd8_31_nf; +extern cpuop_func op_5cd8_31_ff; +extern cpuop_func op_5ce0_31_nf; +extern cpuop_func op_5ce0_31_ff; +extern cpuop_func op_5ce8_31_nf; +extern cpuop_func op_5ce8_31_ff; +extern cpuop_func op_5cf0_31_nf; +extern cpuop_func op_5cf0_31_ff; +extern cpuop_func op_5cf8_31_nf; +extern cpuop_func op_5cf8_31_ff; +extern cpuop_func op_5cf9_31_nf; +extern cpuop_func op_5cf9_31_ff; +extern cpuop_func op_5cfa_31_nf; +extern cpuop_func op_5cfa_31_ff; +extern cpuop_func op_5cfb_31_nf; +extern cpuop_func op_5cfb_31_ff; +extern cpuop_func op_5cfc_31_nf; +extern cpuop_func op_5cfc_31_ff; +extern cpuop_func op_5dc0_31_nf; +extern cpuop_func op_5dc0_31_ff; +extern cpuop_func op_5dc8_31_nf; +extern cpuop_func op_5dc8_31_ff; +extern cpuop_func op_5dd0_31_nf; +extern cpuop_func op_5dd0_31_ff; +extern cpuop_func op_5dd8_31_nf; +extern cpuop_func op_5dd8_31_ff; +extern cpuop_func op_5de0_31_nf; +extern cpuop_func op_5de0_31_ff; +extern cpuop_func op_5de8_31_nf; +extern cpuop_func op_5de8_31_ff; +extern cpuop_func op_5df0_31_nf; +extern cpuop_func op_5df0_31_ff; +extern cpuop_func op_5df8_31_nf; +extern cpuop_func op_5df8_31_ff; +extern cpuop_func op_5df9_31_nf; +extern cpuop_func op_5df9_31_ff; +extern cpuop_func op_5dfa_31_nf; +extern cpuop_func op_5dfa_31_ff; +extern cpuop_func op_5dfb_31_nf; +extern cpuop_func op_5dfb_31_ff; +extern cpuop_func op_5dfc_31_nf; +extern cpuop_func op_5dfc_31_ff; +extern cpuop_func op_5ec0_31_nf; +extern cpuop_func op_5ec0_31_ff; +extern cpuop_func op_5ec8_31_nf; +extern cpuop_func op_5ec8_31_ff; +extern cpuop_func op_5ed0_31_nf; +extern cpuop_func op_5ed0_31_ff; +extern cpuop_func op_5ed8_31_nf; +extern cpuop_func op_5ed8_31_ff; +extern cpuop_func op_5ee0_31_nf; +extern cpuop_func op_5ee0_31_ff; +extern cpuop_func op_5ee8_31_nf; +extern cpuop_func op_5ee8_31_ff; +extern cpuop_func op_5ef0_31_nf; +extern cpuop_func op_5ef0_31_ff; +extern cpuop_func op_5ef8_31_nf; +extern cpuop_func op_5ef8_31_ff; +extern cpuop_func op_5ef9_31_nf; +extern cpuop_func op_5ef9_31_ff; +extern cpuop_func op_5efa_31_nf; +extern cpuop_func op_5efa_31_ff; +extern cpuop_func op_5efb_31_nf; +extern cpuop_func op_5efb_31_ff; +extern cpuop_func op_5efc_31_nf; +extern cpuop_func op_5efc_31_ff; +extern cpuop_func op_5fc0_31_nf; +extern cpuop_func op_5fc0_31_ff; +extern cpuop_func op_5fc8_31_nf; +extern cpuop_func op_5fc8_31_ff; +extern cpuop_func op_5fd0_31_nf; +extern cpuop_func op_5fd0_31_ff; +extern cpuop_func op_5fd8_31_nf; +extern cpuop_func op_5fd8_31_ff; +extern cpuop_func op_5fe0_31_nf; +extern cpuop_func op_5fe0_31_ff; +extern cpuop_func op_5fe8_31_nf; +extern cpuop_func op_5fe8_31_ff; +extern cpuop_func op_5ff0_31_nf; +extern cpuop_func op_5ff0_31_ff; +extern cpuop_func op_5ff8_31_nf; +extern cpuop_func op_5ff8_31_ff; +extern cpuop_func op_5ff9_31_nf; +extern cpuop_func op_5ff9_31_ff; +extern cpuop_func op_5ffa_31_nf; +extern cpuop_func op_5ffa_31_ff; +extern cpuop_func op_5ffb_31_nf; +extern cpuop_func op_5ffb_31_ff; +extern cpuop_func op_5ffc_31_nf; +extern cpuop_func op_5ffc_31_ff; +extern cpuop_func op_6000_31_nf; +extern cpuop_func op_6000_31_ff; +extern cpuop_func op_6001_31_nf; +extern cpuop_func op_6001_31_ff; +extern cpuop_func op_60ff_31_nf; +extern cpuop_func op_60ff_31_ff; +extern cpuop_func op_6100_31_nf; +extern cpuop_func op_6100_31_ff; +extern cpuop_func op_6101_31_nf; +extern cpuop_func op_6101_31_ff; +extern cpuop_func op_61ff_31_nf; +extern cpuop_func op_61ff_31_ff; +extern cpuop_func op_6200_31_nf; +extern cpuop_func op_6200_31_ff; +extern cpuop_func op_6201_31_nf; +extern cpuop_func op_6201_31_ff; +extern cpuop_func op_62ff_31_nf; +extern cpuop_func op_62ff_31_ff; +extern cpuop_func op_6300_31_nf; +extern cpuop_func op_6300_31_ff; +extern cpuop_func op_6301_31_nf; +extern cpuop_func op_6301_31_ff; +extern cpuop_func op_63ff_31_nf; +extern cpuop_func op_63ff_31_ff; +extern cpuop_func op_6400_31_nf; +extern cpuop_func op_6400_31_ff; +extern cpuop_func op_6401_31_nf; +extern cpuop_func op_6401_31_ff; +extern cpuop_func op_64ff_31_nf; +extern cpuop_func op_64ff_31_ff; +extern cpuop_func op_6500_31_nf; +extern cpuop_func op_6500_31_ff; +extern cpuop_func op_6501_31_nf; +extern cpuop_func op_6501_31_ff; +extern cpuop_func op_65ff_31_nf; +extern cpuop_func op_65ff_31_ff; +extern cpuop_func op_6600_31_nf; +extern cpuop_func op_6600_31_ff; +extern cpuop_func op_6601_31_nf; +extern cpuop_func op_6601_31_ff; +extern cpuop_func op_66ff_31_nf; +extern cpuop_func op_66ff_31_ff; +extern cpuop_func op_6700_31_nf; +extern cpuop_func op_6700_31_ff; +extern cpuop_func op_6701_31_nf; +extern cpuop_func op_6701_31_ff; +extern cpuop_func op_67ff_31_nf; +extern cpuop_func op_67ff_31_ff; +extern cpuop_func op_6800_31_nf; +extern cpuop_func op_6800_31_ff; +extern cpuop_func op_6801_31_nf; +extern cpuop_func op_6801_31_ff; +extern cpuop_func op_68ff_31_nf; +extern cpuop_func op_68ff_31_ff; +extern cpuop_func op_6900_31_nf; +extern cpuop_func op_6900_31_ff; +extern cpuop_func op_6901_31_nf; +extern cpuop_func op_6901_31_ff; +extern cpuop_func op_69ff_31_nf; +extern cpuop_func op_69ff_31_ff; +extern cpuop_func op_6a00_31_nf; +extern cpuop_func op_6a00_31_ff; +extern cpuop_func op_6a01_31_nf; +extern cpuop_func op_6a01_31_ff; +extern cpuop_func op_6aff_31_nf; +extern cpuop_func op_6aff_31_ff; +extern cpuop_func op_6b00_31_nf; +extern cpuop_func op_6b00_31_ff; +extern cpuop_func op_6b01_31_nf; +extern cpuop_func op_6b01_31_ff; +extern cpuop_func op_6bff_31_nf; +extern cpuop_func op_6bff_31_ff; +extern cpuop_func op_6c00_31_nf; +extern cpuop_func op_6c00_31_ff; +extern cpuop_func op_6c01_31_nf; +extern cpuop_func op_6c01_31_ff; +extern cpuop_func op_6cff_31_nf; +extern cpuop_func op_6cff_31_ff; +extern cpuop_func op_6d00_31_nf; +extern cpuop_func op_6d00_31_ff; +extern cpuop_func op_6d01_31_nf; +extern cpuop_func op_6d01_31_ff; +extern cpuop_func op_6dff_31_nf; +extern cpuop_func op_6dff_31_ff; +extern cpuop_func op_6e00_31_nf; +extern cpuop_func op_6e00_31_ff; +extern cpuop_func op_6e01_31_nf; +extern cpuop_func op_6e01_31_ff; +extern cpuop_func op_6eff_31_nf; +extern cpuop_func op_6eff_31_ff; +extern cpuop_func op_6f00_31_nf; +extern cpuop_func op_6f00_31_ff; +extern cpuop_func op_6f01_31_nf; +extern cpuop_func op_6f01_31_ff; +extern cpuop_func op_6fff_31_nf; +extern cpuop_func op_6fff_31_ff; +extern cpuop_func op_7000_31_nf; +extern cpuop_func op_7000_31_ff; +extern cpuop_func op_8000_31_nf; +extern cpuop_func op_8000_31_ff; +extern cpuop_func op_8010_31_nf; +extern cpuop_func op_8010_31_ff; +extern cpuop_func op_8018_31_nf; +extern cpuop_func op_8018_31_ff; +extern cpuop_func op_8020_31_nf; +extern cpuop_func op_8020_31_ff; +extern cpuop_func op_8028_31_nf; +extern cpuop_func op_8028_31_ff; +extern cpuop_func op_8030_31_nf; +extern cpuop_func op_8030_31_ff; +extern cpuop_func op_8038_31_nf; +extern cpuop_func op_8038_31_ff; +extern cpuop_func op_8039_31_nf; +extern cpuop_func op_8039_31_ff; +extern cpuop_func op_803a_31_nf; +extern cpuop_func op_803a_31_ff; +extern cpuop_func op_803b_31_nf; +extern cpuop_func op_803b_31_ff; +extern cpuop_func op_803c_31_nf; +extern cpuop_func op_803c_31_ff; +extern cpuop_func op_8040_31_nf; +extern cpuop_func op_8040_31_ff; +extern cpuop_func op_8050_31_nf; +extern cpuop_func op_8050_31_ff; +extern cpuop_func op_8058_31_nf; +extern cpuop_func op_8058_31_ff; +extern cpuop_func op_8060_31_nf; +extern cpuop_func op_8060_31_ff; +extern cpuop_func op_8068_31_nf; +extern cpuop_func op_8068_31_ff; +extern cpuop_func op_8070_31_nf; +extern cpuop_func op_8070_31_ff; +extern cpuop_func op_8078_31_nf; +extern cpuop_func op_8078_31_ff; +extern cpuop_func op_8079_31_nf; +extern cpuop_func op_8079_31_ff; +extern cpuop_func op_807a_31_nf; +extern cpuop_func op_807a_31_ff; +extern cpuop_func op_807b_31_nf; +extern cpuop_func op_807b_31_ff; +extern cpuop_func op_807c_31_nf; +extern cpuop_func op_807c_31_ff; +extern cpuop_func op_8080_31_nf; +extern cpuop_func op_8080_31_ff; +extern cpuop_func op_8090_31_nf; +extern cpuop_func op_8090_31_ff; +extern cpuop_func op_8098_31_nf; +extern cpuop_func op_8098_31_ff; +extern cpuop_func op_80a0_31_nf; +extern cpuop_func op_80a0_31_ff; +extern cpuop_func op_80a8_31_nf; +extern cpuop_func op_80a8_31_ff; +extern cpuop_func op_80b0_31_nf; +extern cpuop_func op_80b0_31_ff; +extern cpuop_func op_80b8_31_nf; +extern cpuop_func op_80b8_31_ff; +extern cpuop_func op_80b9_31_nf; +extern cpuop_func op_80b9_31_ff; +extern cpuop_func op_80ba_31_nf; +extern cpuop_func op_80ba_31_ff; +extern cpuop_func op_80bb_31_nf; +extern cpuop_func op_80bb_31_ff; +extern cpuop_func op_80bc_31_nf; +extern cpuop_func op_80bc_31_ff; +extern cpuop_func op_80c0_31_nf; +extern cpuop_func op_80c0_31_ff; +extern cpuop_func op_80d0_31_nf; +extern cpuop_func op_80d0_31_ff; +extern cpuop_func op_80d8_31_nf; +extern cpuop_func op_80d8_31_ff; +extern cpuop_func op_80e0_31_nf; +extern cpuop_func op_80e0_31_ff; +extern cpuop_func op_80e8_31_nf; +extern cpuop_func op_80e8_31_ff; +extern cpuop_func op_80f0_31_nf; +extern cpuop_func op_80f0_31_ff; +extern cpuop_func op_80f8_31_nf; +extern cpuop_func op_80f8_31_ff; +extern cpuop_func op_80f9_31_nf; +extern cpuop_func op_80f9_31_ff; +extern cpuop_func op_80fa_31_nf; +extern cpuop_func op_80fa_31_ff; +extern cpuop_func op_80fb_31_nf; +extern cpuop_func op_80fb_31_ff; +extern cpuop_func op_80fc_31_nf; +extern cpuop_func op_80fc_31_ff; +extern cpuop_func op_8100_31_nf; +extern cpuop_func op_8100_31_ff; +extern cpuop_func op_8108_31_nf; +extern cpuop_func op_8108_31_ff; +extern cpuop_func op_8110_31_nf; +extern cpuop_func op_8110_31_ff; +extern cpuop_func op_8118_31_nf; +extern cpuop_func op_8118_31_ff; +extern cpuop_func op_8120_31_nf; +extern cpuop_func op_8120_31_ff; +extern cpuop_func op_8128_31_nf; +extern cpuop_func op_8128_31_ff; +extern cpuop_func op_8130_31_nf; +extern cpuop_func op_8130_31_ff; +extern cpuop_func op_8138_31_nf; +extern cpuop_func op_8138_31_ff; +extern cpuop_func op_8139_31_nf; +extern cpuop_func op_8139_31_ff; +extern cpuop_func op_8140_31_nf; +extern cpuop_func op_8140_31_ff; +extern cpuop_func op_8148_31_nf; +extern cpuop_func op_8148_31_ff; +extern cpuop_func op_8150_31_nf; +extern cpuop_func op_8150_31_ff; +extern cpuop_func op_8158_31_nf; +extern cpuop_func op_8158_31_ff; +extern cpuop_func op_8160_31_nf; +extern cpuop_func op_8160_31_ff; +extern cpuop_func op_8168_31_nf; +extern cpuop_func op_8168_31_ff; +extern cpuop_func op_8170_31_nf; +extern cpuop_func op_8170_31_ff; +extern cpuop_func op_8178_31_nf; +extern cpuop_func op_8178_31_ff; +extern cpuop_func op_8179_31_nf; +extern cpuop_func op_8179_31_ff; +extern cpuop_func op_8180_31_nf; +extern cpuop_func op_8180_31_ff; +extern cpuop_func op_8188_31_nf; +extern cpuop_func op_8188_31_ff; +extern cpuop_func op_8190_31_nf; +extern cpuop_func op_8190_31_ff; +extern cpuop_func op_8198_31_nf; +extern cpuop_func op_8198_31_ff; +extern cpuop_func op_81a0_31_nf; +extern cpuop_func op_81a0_31_ff; +extern cpuop_func op_81a8_31_nf; +extern cpuop_func op_81a8_31_ff; +extern cpuop_func op_81b0_31_nf; +extern cpuop_func op_81b0_31_ff; +extern cpuop_func op_81b8_31_nf; +extern cpuop_func op_81b8_31_ff; +extern cpuop_func op_81b9_31_nf; +extern cpuop_func op_81b9_31_ff; +extern cpuop_func op_81c0_31_nf; +extern cpuop_func op_81c0_31_ff; +extern cpuop_func op_81d0_31_nf; +extern cpuop_func op_81d0_31_ff; +extern cpuop_func op_81d8_31_nf; +extern cpuop_func op_81d8_31_ff; +extern cpuop_func op_81e0_31_nf; +extern cpuop_func op_81e0_31_ff; +extern cpuop_func op_81e8_31_nf; +extern cpuop_func op_81e8_31_ff; +extern cpuop_func op_81f0_31_nf; +extern cpuop_func op_81f0_31_ff; +extern cpuop_func op_81f8_31_nf; +extern cpuop_func op_81f8_31_ff; +extern cpuop_func op_81f9_31_nf; +extern cpuop_func op_81f9_31_ff; +extern cpuop_func op_81fa_31_nf; +extern cpuop_func op_81fa_31_ff; +extern cpuop_func op_81fb_31_nf; +extern cpuop_func op_81fb_31_ff; +extern cpuop_func op_81fc_31_nf; +extern cpuop_func op_81fc_31_ff; +extern cpuop_func op_9000_31_nf; +extern cpuop_func op_9000_31_ff; +extern cpuop_func op_9010_31_nf; +extern cpuop_func op_9010_31_ff; +extern cpuop_func op_9018_31_nf; +extern cpuop_func op_9018_31_ff; +extern cpuop_func op_9020_31_nf; +extern cpuop_func op_9020_31_ff; +extern cpuop_func op_9028_31_nf; +extern cpuop_func op_9028_31_ff; +extern cpuop_func op_9030_31_nf; +extern cpuop_func op_9030_31_ff; +extern cpuop_func op_9038_31_nf; +extern cpuop_func op_9038_31_ff; +extern cpuop_func op_9039_31_nf; +extern cpuop_func op_9039_31_ff; +extern cpuop_func op_903a_31_nf; +extern cpuop_func op_903a_31_ff; +extern cpuop_func op_903b_31_nf; +extern cpuop_func op_903b_31_ff; +extern cpuop_func op_903c_31_nf; +extern cpuop_func op_903c_31_ff; +extern cpuop_func op_9040_31_nf; +extern cpuop_func op_9040_31_ff; +extern cpuop_func op_9048_31_nf; +extern cpuop_func op_9048_31_ff; +extern cpuop_func op_9050_31_nf; +extern cpuop_func op_9050_31_ff; +extern cpuop_func op_9058_31_nf; +extern cpuop_func op_9058_31_ff; +extern cpuop_func op_9060_31_nf; +extern cpuop_func op_9060_31_ff; +extern cpuop_func op_9068_31_nf; +extern cpuop_func op_9068_31_ff; +extern cpuop_func op_9070_31_nf; +extern cpuop_func op_9070_31_ff; +extern cpuop_func op_9078_31_nf; +extern cpuop_func op_9078_31_ff; +extern cpuop_func op_9079_31_nf; +extern cpuop_func op_9079_31_ff; +extern cpuop_func op_907a_31_nf; +extern cpuop_func op_907a_31_ff; +extern cpuop_func op_907b_31_nf; +extern cpuop_func op_907b_31_ff; +extern cpuop_func op_907c_31_nf; +extern cpuop_func op_907c_31_ff; +extern cpuop_func op_9080_31_nf; +extern cpuop_func op_9080_31_ff; +extern cpuop_func op_9088_31_nf; +extern cpuop_func op_9088_31_ff; +extern cpuop_func op_9090_31_nf; +extern cpuop_func op_9090_31_ff; +extern cpuop_func op_9098_31_nf; +extern cpuop_func op_9098_31_ff; +extern cpuop_func op_90a0_31_nf; +extern cpuop_func op_90a0_31_ff; +extern cpuop_func op_90a8_31_nf; +extern cpuop_func op_90a8_31_ff; +extern cpuop_func op_90b0_31_nf; +extern cpuop_func op_90b0_31_ff; +extern cpuop_func op_90b8_31_nf; +extern cpuop_func op_90b8_31_ff; +extern cpuop_func op_90b9_31_nf; +extern cpuop_func op_90b9_31_ff; +extern cpuop_func op_90ba_31_nf; +extern cpuop_func op_90ba_31_ff; +extern cpuop_func op_90bb_31_nf; +extern cpuop_func op_90bb_31_ff; +extern cpuop_func op_90bc_31_nf; +extern cpuop_func op_90bc_31_ff; +extern cpuop_func op_90c0_31_nf; +extern cpuop_func op_90c0_31_ff; +extern cpuop_func op_90c8_31_nf; +extern cpuop_func op_90c8_31_ff; +extern cpuop_func op_90d0_31_nf; +extern cpuop_func op_90d0_31_ff; +extern cpuop_func op_90d8_31_nf; +extern cpuop_func op_90d8_31_ff; +extern cpuop_func op_90e0_31_nf; +extern cpuop_func op_90e0_31_ff; +extern cpuop_func op_90e8_31_nf; +extern cpuop_func op_90e8_31_ff; +extern cpuop_func op_90f0_31_nf; +extern cpuop_func op_90f0_31_ff; +extern cpuop_func op_90f8_31_nf; +extern cpuop_func op_90f8_31_ff; +extern cpuop_func op_90f9_31_nf; +extern cpuop_func op_90f9_31_ff; +extern cpuop_func op_90fa_31_nf; +extern cpuop_func op_90fa_31_ff; +extern cpuop_func op_90fb_31_nf; +extern cpuop_func op_90fb_31_ff; +extern cpuop_func op_90fc_31_nf; +extern cpuop_func op_90fc_31_ff; +extern cpuop_func op_9100_31_nf; +extern cpuop_func op_9100_31_ff; +extern cpuop_func op_9108_31_nf; +extern cpuop_func op_9108_31_ff; +extern cpuop_func op_9110_31_nf; +extern cpuop_func op_9110_31_ff; +extern cpuop_func op_9118_31_nf; +extern cpuop_func op_9118_31_ff; +extern cpuop_func op_9120_31_nf; +extern cpuop_func op_9120_31_ff; +extern cpuop_func op_9128_31_nf; +extern cpuop_func op_9128_31_ff; +extern cpuop_func op_9130_31_nf; +extern cpuop_func op_9130_31_ff; +extern cpuop_func op_9138_31_nf; +extern cpuop_func op_9138_31_ff; +extern cpuop_func op_9139_31_nf; +extern cpuop_func op_9139_31_ff; +extern cpuop_func op_9140_31_nf; +extern cpuop_func op_9140_31_ff; +extern cpuop_func op_9148_31_nf; +extern cpuop_func op_9148_31_ff; +extern cpuop_func op_9150_31_nf; +extern cpuop_func op_9150_31_ff; +extern cpuop_func op_9158_31_nf; +extern cpuop_func op_9158_31_ff; +extern cpuop_func op_9160_31_nf; +extern cpuop_func op_9160_31_ff; +extern cpuop_func op_9168_31_nf; +extern cpuop_func op_9168_31_ff; +extern cpuop_func op_9170_31_nf; +extern cpuop_func op_9170_31_ff; +extern cpuop_func op_9178_31_nf; +extern cpuop_func op_9178_31_ff; +extern cpuop_func op_9179_31_nf; +extern cpuop_func op_9179_31_ff; +extern cpuop_func op_9180_31_nf; +extern cpuop_func op_9180_31_ff; +extern cpuop_func op_9188_31_nf; +extern cpuop_func op_9188_31_ff; +extern cpuop_func op_9190_31_nf; +extern cpuop_func op_9190_31_ff; +extern cpuop_func op_9198_31_nf; +extern cpuop_func op_9198_31_ff; +extern cpuop_func op_91a0_31_nf; +extern cpuop_func op_91a0_31_ff; +extern cpuop_func op_91a8_31_nf; +extern cpuop_func op_91a8_31_ff; +extern cpuop_func op_91b0_31_nf; +extern cpuop_func op_91b0_31_ff; +extern cpuop_func op_91b8_31_nf; +extern cpuop_func op_91b8_31_ff; +extern cpuop_func op_91b9_31_nf; +extern cpuop_func op_91b9_31_ff; +extern cpuop_func op_91c0_31_nf; +extern cpuop_func op_91c0_31_ff; +extern cpuop_func op_91c8_31_nf; +extern cpuop_func op_91c8_31_ff; +extern cpuop_func op_91d0_31_nf; +extern cpuop_func op_91d0_31_ff; +extern cpuop_func op_91d8_31_nf; +extern cpuop_func op_91d8_31_ff; +extern cpuop_func op_91e0_31_nf; +extern cpuop_func op_91e0_31_ff; +extern cpuop_func op_91e8_31_nf; +extern cpuop_func op_91e8_31_ff; +extern cpuop_func op_91f0_31_nf; +extern cpuop_func op_91f0_31_ff; +extern cpuop_func op_91f8_31_nf; +extern cpuop_func op_91f8_31_ff; +extern cpuop_func op_91f9_31_nf; +extern cpuop_func op_91f9_31_ff; +extern cpuop_func op_91fa_31_nf; +extern cpuop_func op_91fa_31_ff; +extern cpuop_func op_91fb_31_nf; +extern cpuop_func op_91fb_31_ff; +extern cpuop_func op_91fc_31_nf; +extern cpuop_func op_91fc_31_ff; +extern cpuop_func op_b000_31_nf; +extern cpuop_func op_b000_31_ff; +extern cpuop_func op_b010_31_nf; +extern cpuop_func op_b010_31_ff; +extern cpuop_func op_b018_31_nf; +extern cpuop_func op_b018_31_ff; +extern cpuop_func op_b020_31_nf; +extern cpuop_func op_b020_31_ff; +extern cpuop_func op_b028_31_nf; +extern cpuop_func op_b028_31_ff; +extern cpuop_func op_b030_31_nf; +extern cpuop_func op_b030_31_ff; +extern cpuop_func op_b038_31_nf; +extern cpuop_func op_b038_31_ff; +extern cpuop_func op_b039_31_nf; +extern cpuop_func op_b039_31_ff; +extern cpuop_func op_b03a_31_nf; +extern cpuop_func op_b03a_31_ff; +extern cpuop_func op_b03b_31_nf; +extern cpuop_func op_b03b_31_ff; +extern cpuop_func op_b03c_31_nf; +extern cpuop_func op_b03c_31_ff; +extern cpuop_func op_b040_31_nf; +extern cpuop_func op_b040_31_ff; +extern cpuop_func op_b048_31_nf; +extern cpuop_func op_b048_31_ff; +extern cpuop_func op_b050_31_nf; +extern cpuop_func op_b050_31_ff; +extern cpuop_func op_b058_31_nf; +extern cpuop_func op_b058_31_ff; +extern cpuop_func op_b060_31_nf; +extern cpuop_func op_b060_31_ff; +extern cpuop_func op_b068_31_nf; +extern cpuop_func op_b068_31_ff; +extern cpuop_func op_b070_31_nf; +extern cpuop_func op_b070_31_ff; +extern cpuop_func op_b078_31_nf; +extern cpuop_func op_b078_31_ff; +extern cpuop_func op_b079_31_nf; +extern cpuop_func op_b079_31_ff; +extern cpuop_func op_b07a_31_nf; +extern cpuop_func op_b07a_31_ff; +extern cpuop_func op_b07b_31_nf; +extern cpuop_func op_b07b_31_ff; +extern cpuop_func op_b07c_31_nf; +extern cpuop_func op_b07c_31_ff; +extern cpuop_func op_b080_31_nf; +extern cpuop_func op_b080_31_ff; +extern cpuop_func op_b088_31_nf; +extern cpuop_func op_b088_31_ff; +extern cpuop_func op_b090_31_nf; +extern cpuop_func op_b090_31_ff; +extern cpuop_func op_b098_31_nf; +extern cpuop_func op_b098_31_ff; +extern cpuop_func op_b0a0_31_nf; +extern cpuop_func op_b0a0_31_ff; +extern cpuop_func op_b0a8_31_nf; +extern cpuop_func op_b0a8_31_ff; +extern cpuop_func op_b0b0_31_nf; +extern cpuop_func op_b0b0_31_ff; +extern cpuop_func op_b0b8_31_nf; +extern cpuop_func op_b0b8_31_ff; +extern cpuop_func op_b0b9_31_nf; +extern cpuop_func op_b0b9_31_ff; +extern cpuop_func op_b0ba_31_nf; +extern cpuop_func op_b0ba_31_ff; +extern cpuop_func op_b0bb_31_nf; +extern cpuop_func op_b0bb_31_ff; +extern cpuop_func op_b0bc_31_nf; +extern cpuop_func op_b0bc_31_ff; +extern cpuop_func op_b0c0_31_nf; +extern cpuop_func op_b0c0_31_ff; +extern cpuop_func op_b0c8_31_nf; +extern cpuop_func op_b0c8_31_ff; +extern cpuop_func op_b0d0_31_nf; +extern cpuop_func op_b0d0_31_ff; +extern cpuop_func op_b0d8_31_nf; +extern cpuop_func op_b0d8_31_ff; +extern cpuop_func op_b0e0_31_nf; +extern cpuop_func op_b0e0_31_ff; +extern cpuop_func op_b0e8_31_nf; +extern cpuop_func op_b0e8_31_ff; +extern cpuop_func op_b0f0_31_nf; +extern cpuop_func op_b0f0_31_ff; +extern cpuop_func op_b0f8_31_nf; +extern cpuop_func op_b0f8_31_ff; +extern cpuop_func op_b0f9_31_nf; +extern cpuop_func op_b0f9_31_ff; +extern cpuop_func op_b0fa_31_nf; +extern cpuop_func op_b0fa_31_ff; +extern cpuop_func op_b0fb_31_nf; +extern cpuop_func op_b0fb_31_ff; +extern cpuop_func op_b0fc_31_nf; +extern cpuop_func op_b0fc_31_ff; +extern cpuop_func op_b100_31_nf; +extern cpuop_func op_b100_31_ff; +extern cpuop_func op_b108_31_nf; +extern cpuop_func op_b108_31_ff; +extern cpuop_func op_b110_31_nf; +extern cpuop_func op_b110_31_ff; +extern cpuop_func op_b118_31_nf; +extern cpuop_func op_b118_31_ff; +extern cpuop_func op_b120_31_nf; +extern cpuop_func op_b120_31_ff; +extern cpuop_func op_b128_31_nf; +extern cpuop_func op_b128_31_ff; +extern cpuop_func op_b130_31_nf; +extern cpuop_func op_b130_31_ff; +extern cpuop_func op_b138_31_nf; +extern cpuop_func op_b138_31_ff; +extern cpuop_func op_b139_31_nf; +extern cpuop_func op_b139_31_ff; +extern cpuop_func op_b140_31_nf; +extern cpuop_func op_b140_31_ff; +extern cpuop_func op_b148_31_nf; +extern cpuop_func op_b148_31_ff; +extern cpuop_func op_b150_31_nf; +extern cpuop_func op_b150_31_ff; +extern cpuop_func op_b158_31_nf; +extern cpuop_func op_b158_31_ff; +extern cpuop_func op_b160_31_nf; +extern cpuop_func op_b160_31_ff; +extern cpuop_func op_b168_31_nf; +extern cpuop_func op_b168_31_ff; +extern cpuop_func op_b170_31_nf; +extern cpuop_func op_b170_31_ff; +extern cpuop_func op_b178_31_nf; +extern cpuop_func op_b178_31_ff; +extern cpuop_func op_b179_31_nf; +extern cpuop_func op_b179_31_ff; +extern cpuop_func op_b180_31_nf; +extern cpuop_func op_b180_31_ff; +extern cpuop_func op_b188_31_nf; +extern cpuop_func op_b188_31_ff; +extern cpuop_func op_b190_31_nf; +extern cpuop_func op_b190_31_ff; +extern cpuop_func op_b198_31_nf; +extern cpuop_func op_b198_31_ff; +extern cpuop_func op_b1a0_31_nf; +extern cpuop_func op_b1a0_31_ff; +extern cpuop_func op_b1a8_31_nf; +extern cpuop_func op_b1a8_31_ff; +extern cpuop_func op_b1b0_31_nf; +extern cpuop_func op_b1b0_31_ff; +extern cpuop_func op_b1b8_31_nf; +extern cpuop_func op_b1b8_31_ff; +extern cpuop_func op_b1b9_31_nf; +extern cpuop_func op_b1b9_31_ff; +extern cpuop_func op_b1c0_31_nf; +extern cpuop_func op_b1c0_31_ff; +extern cpuop_func op_b1c8_31_nf; +extern cpuop_func op_b1c8_31_ff; +extern cpuop_func op_b1d0_31_nf; +extern cpuop_func op_b1d0_31_ff; +extern cpuop_func op_b1d8_31_nf; +extern cpuop_func op_b1d8_31_ff; +extern cpuop_func op_b1e0_31_nf; +extern cpuop_func op_b1e0_31_ff; +extern cpuop_func op_b1e8_31_nf; +extern cpuop_func op_b1e8_31_ff; +extern cpuop_func op_b1f0_31_nf; +extern cpuop_func op_b1f0_31_ff; +extern cpuop_func op_b1f8_31_nf; +extern cpuop_func op_b1f8_31_ff; +extern cpuop_func op_b1f9_31_nf; +extern cpuop_func op_b1f9_31_ff; +extern cpuop_func op_b1fa_31_nf; +extern cpuop_func op_b1fa_31_ff; +extern cpuop_func op_b1fb_31_nf; +extern cpuop_func op_b1fb_31_ff; +extern cpuop_func op_b1fc_31_nf; +extern cpuop_func op_b1fc_31_ff; +extern cpuop_func op_c000_31_nf; +extern cpuop_func op_c000_31_ff; +extern cpuop_func op_c010_31_nf; +extern cpuop_func op_c010_31_ff; +extern cpuop_func op_c018_31_nf; +extern cpuop_func op_c018_31_ff; +extern cpuop_func op_c020_31_nf; +extern cpuop_func op_c020_31_ff; +extern cpuop_func op_c028_31_nf; +extern cpuop_func op_c028_31_ff; +extern cpuop_func op_c030_31_nf; +extern cpuop_func op_c030_31_ff; +extern cpuop_func op_c038_31_nf; +extern cpuop_func op_c038_31_ff; +extern cpuop_func op_c039_31_nf; +extern cpuop_func op_c039_31_ff; +extern cpuop_func op_c03a_31_nf; +extern cpuop_func op_c03a_31_ff; +extern cpuop_func op_c03b_31_nf; +extern cpuop_func op_c03b_31_ff; +extern cpuop_func op_c03c_31_nf; +extern cpuop_func op_c03c_31_ff; +extern cpuop_func op_c040_31_nf; +extern cpuop_func op_c040_31_ff; +extern cpuop_func op_c050_31_nf; +extern cpuop_func op_c050_31_ff; +extern cpuop_func op_c058_31_nf; +extern cpuop_func op_c058_31_ff; +extern cpuop_func op_c060_31_nf; +extern cpuop_func op_c060_31_ff; +extern cpuop_func op_c068_31_nf; +extern cpuop_func op_c068_31_ff; +extern cpuop_func op_c070_31_nf; +extern cpuop_func op_c070_31_ff; +extern cpuop_func op_c078_31_nf; +extern cpuop_func op_c078_31_ff; +extern cpuop_func op_c079_31_nf; +extern cpuop_func op_c079_31_ff; +extern cpuop_func op_c07a_31_nf; +extern cpuop_func op_c07a_31_ff; +extern cpuop_func op_c07b_31_nf; +extern cpuop_func op_c07b_31_ff; +extern cpuop_func op_c07c_31_nf; +extern cpuop_func op_c07c_31_ff; +extern cpuop_func op_c080_31_nf; +extern cpuop_func op_c080_31_ff; +extern cpuop_func op_c090_31_nf; +extern cpuop_func op_c090_31_ff; +extern cpuop_func op_c098_31_nf; +extern cpuop_func op_c098_31_ff; +extern cpuop_func op_c0a0_31_nf; +extern cpuop_func op_c0a0_31_ff; +extern cpuop_func op_c0a8_31_nf; +extern cpuop_func op_c0a8_31_ff; +extern cpuop_func op_c0b0_31_nf; +extern cpuop_func op_c0b0_31_ff; +extern cpuop_func op_c0b8_31_nf; +extern cpuop_func op_c0b8_31_ff; +extern cpuop_func op_c0b9_31_nf; +extern cpuop_func op_c0b9_31_ff; +extern cpuop_func op_c0ba_31_nf; +extern cpuop_func op_c0ba_31_ff; +extern cpuop_func op_c0bb_31_nf; +extern cpuop_func op_c0bb_31_ff; +extern cpuop_func op_c0bc_31_nf; +extern cpuop_func op_c0bc_31_ff; +extern cpuop_func op_c0c0_31_nf; +extern cpuop_func op_c0c0_31_ff; +extern cpuop_func op_c0d0_31_nf; +extern cpuop_func op_c0d0_31_ff; +extern cpuop_func op_c0d8_31_nf; +extern cpuop_func op_c0d8_31_ff; +extern cpuop_func op_c0e0_31_nf; +extern cpuop_func op_c0e0_31_ff; +extern cpuop_func op_c0e8_31_nf; +extern cpuop_func op_c0e8_31_ff; +extern cpuop_func op_c0f0_31_nf; +extern cpuop_func op_c0f0_31_ff; +extern cpuop_func op_c0f8_31_nf; +extern cpuop_func op_c0f8_31_ff; +extern cpuop_func op_c0f9_31_nf; +extern cpuop_func op_c0f9_31_ff; +extern cpuop_func op_c0fa_31_nf; +extern cpuop_func op_c0fa_31_ff; +extern cpuop_func op_c0fb_31_nf; +extern cpuop_func op_c0fb_31_ff; +extern cpuop_func op_c0fc_31_nf; +extern cpuop_func op_c0fc_31_ff; +extern cpuop_func op_c100_31_nf; +extern cpuop_func op_c100_31_ff; +extern cpuop_func op_c108_31_nf; +extern cpuop_func op_c108_31_ff; +extern cpuop_func op_c110_31_nf; +extern cpuop_func op_c110_31_ff; +extern cpuop_func op_c118_31_nf; +extern cpuop_func op_c118_31_ff; +extern cpuop_func op_c120_31_nf; +extern cpuop_func op_c120_31_ff; +extern cpuop_func op_c128_31_nf; +extern cpuop_func op_c128_31_ff; +extern cpuop_func op_c130_31_nf; +extern cpuop_func op_c130_31_ff; +extern cpuop_func op_c138_31_nf; +extern cpuop_func op_c138_31_ff; +extern cpuop_func op_c139_31_nf; +extern cpuop_func op_c139_31_ff; +extern cpuop_func op_c140_31_nf; +extern cpuop_func op_c140_31_ff; +extern cpuop_func op_c148_31_nf; +extern cpuop_func op_c148_31_ff; +extern cpuop_func op_c150_31_nf; +extern cpuop_func op_c150_31_ff; +extern cpuop_func op_c158_31_nf; +extern cpuop_func op_c158_31_ff; +extern cpuop_func op_c160_31_nf; +extern cpuop_func op_c160_31_ff; +extern cpuop_func op_c168_31_nf; +extern cpuop_func op_c168_31_ff; +extern cpuop_func op_c170_31_nf; +extern cpuop_func op_c170_31_ff; +extern cpuop_func op_c178_31_nf; +extern cpuop_func op_c178_31_ff; +extern cpuop_func op_c179_31_nf; +extern cpuop_func op_c179_31_ff; +extern cpuop_func op_c188_31_nf; +extern cpuop_func op_c188_31_ff; +extern cpuop_func op_c190_31_nf; +extern cpuop_func op_c190_31_ff; +extern cpuop_func op_c198_31_nf; +extern cpuop_func op_c198_31_ff; +extern cpuop_func op_c1a0_31_nf; +extern cpuop_func op_c1a0_31_ff; +extern cpuop_func op_c1a8_31_nf; +extern cpuop_func op_c1a8_31_ff; +extern cpuop_func op_c1b0_31_nf; +extern cpuop_func op_c1b0_31_ff; +extern cpuop_func op_c1b8_31_nf; +extern cpuop_func op_c1b8_31_ff; +extern cpuop_func op_c1b9_31_nf; +extern cpuop_func op_c1b9_31_ff; +extern cpuop_func op_c1c0_31_nf; +extern cpuop_func op_c1c0_31_ff; +extern cpuop_func op_c1d0_31_nf; +extern cpuop_func op_c1d0_31_ff; +extern cpuop_func op_c1d8_31_nf; +extern cpuop_func op_c1d8_31_ff; +extern cpuop_func op_c1e0_31_nf; +extern cpuop_func op_c1e0_31_ff; +extern cpuop_func op_c1e8_31_nf; +extern cpuop_func op_c1e8_31_ff; +extern cpuop_func op_c1f0_31_nf; +extern cpuop_func op_c1f0_31_ff; +extern cpuop_func op_c1f8_31_nf; +extern cpuop_func op_c1f8_31_ff; +extern cpuop_func op_c1f9_31_nf; +extern cpuop_func op_c1f9_31_ff; +extern cpuop_func op_c1fa_31_nf; +extern cpuop_func op_c1fa_31_ff; +extern cpuop_func op_c1fb_31_nf; +extern cpuop_func op_c1fb_31_ff; +extern cpuop_func op_c1fc_31_nf; +extern cpuop_func op_c1fc_31_ff; +extern cpuop_func op_d000_31_nf; +extern cpuop_func op_d000_31_ff; +extern cpuop_func op_d010_31_nf; +extern cpuop_func op_d010_31_ff; +extern cpuop_func op_d018_31_nf; +extern cpuop_func op_d018_31_ff; +extern cpuop_func op_d020_31_nf; +extern cpuop_func op_d020_31_ff; +extern cpuop_func op_d028_31_nf; +extern cpuop_func op_d028_31_ff; +extern cpuop_func op_d030_31_nf; +extern cpuop_func op_d030_31_ff; +extern cpuop_func op_d038_31_nf; +extern cpuop_func op_d038_31_ff; +extern cpuop_func op_d039_31_nf; +extern cpuop_func op_d039_31_ff; +extern cpuop_func op_d03a_31_nf; +extern cpuop_func op_d03a_31_ff; +extern cpuop_func op_d03b_31_nf; +extern cpuop_func op_d03b_31_ff; +extern cpuop_func op_d03c_31_nf; +extern cpuop_func op_d03c_31_ff; +extern cpuop_func op_d040_31_nf; +extern cpuop_func op_d040_31_ff; +extern cpuop_func op_d048_31_nf; +extern cpuop_func op_d048_31_ff; +extern cpuop_func op_d050_31_nf; +extern cpuop_func op_d050_31_ff; +extern cpuop_func op_d058_31_nf; +extern cpuop_func op_d058_31_ff; +extern cpuop_func op_d060_31_nf; +extern cpuop_func op_d060_31_ff; +extern cpuop_func op_d068_31_nf; +extern cpuop_func op_d068_31_ff; +extern cpuop_func op_d070_31_nf; +extern cpuop_func op_d070_31_ff; +extern cpuop_func op_d078_31_nf; +extern cpuop_func op_d078_31_ff; +extern cpuop_func op_d079_31_nf; +extern cpuop_func op_d079_31_ff; +extern cpuop_func op_d07a_31_nf; +extern cpuop_func op_d07a_31_ff; +extern cpuop_func op_d07b_31_nf; +extern cpuop_func op_d07b_31_ff; +extern cpuop_func op_d07c_31_nf; +extern cpuop_func op_d07c_31_ff; +extern cpuop_func op_d080_31_nf; +extern cpuop_func op_d080_31_ff; +extern cpuop_func op_d088_31_nf; +extern cpuop_func op_d088_31_ff; +extern cpuop_func op_d090_31_nf; +extern cpuop_func op_d090_31_ff; +extern cpuop_func op_d098_31_nf; +extern cpuop_func op_d098_31_ff; +extern cpuop_func op_d0a0_31_nf; +extern cpuop_func op_d0a0_31_ff; +extern cpuop_func op_d0a8_31_nf; +extern cpuop_func op_d0a8_31_ff; +extern cpuop_func op_d0b0_31_nf; +extern cpuop_func op_d0b0_31_ff; +extern cpuop_func op_d0b8_31_nf; +extern cpuop_func op_d0b8_31_ff; +extern cpuop_func op_d0b9_31_nf; +extern cpuop_func op_d0b9_31_ff; +extern cpuop_func op_d0ba_31_nf; +extern cpuop_func op_d0ba_31_ff; +extern cpuop_func op_d0bb_31_nf; +extern cpuop_func op_d0bb_31_ff; +extern cpuop_func op_d0bc_31_nf; +extern cpuop_func op_d0bc_31_ff; +extern cpuop_func op_d0c0_31_nf; +extern cpuop_func op_d0c0_31_ff; +extern cpuop_func op_d0c8_31_nf; +extern cpuop_func op_d0c8_31_ff; +extern cpuop_func op_d0d0_31_nf; +extern cpuop_func op_d0d0_31_ff; +extern cpuop_func op_d0d8_31_nf; +extern cpuop_func op_d0d8_31_ff; +extern cpuop_func op_d0e0_31_nf; +extern cpuop_func op_d0e0_31_ff; +extern cpuop_func op_d0e8_31_nf; +extern cpuop_func op_d0e8_31_ff; +extern cpuop_func op_d0f0_31_nf; +extern cpuop_func op_d0f0_31_ff; +extern cpuop_func op_d0f8_31_nf; +extern cpuop_func op_d0f8_31_ff; +extern cpuop_func op_d0f9_31_nf; +extern cpuop_func op_d0f9_31_ff; +extern cpuop_func op_d0fa_31_nf; +extern cpuop_func op_d0fa_31_ff; +extern cpuop_func op_d0fb_31_nf; +extern cpuop_func op_d0fb_31_ff; +extern cpuop_func op_d0fc_31_nf; +extern cpuop_func op_d0fc_31_ff; +extern cpuop_func op_d100_31_nf; +extern cpuop_func op_d100_31_ff; +extern cpuop_func op_d108_31_nf; +extern cpuop_func op_d108_31_ff; +extern cpuop_func op_d110_31_nf; +extern cpuop_func op_d110_31_ff; +extern cpuop_func op_d118_31_nf; +extern cpuop_func op_d118_31_ff; +extern cpuop_func op_d120_31_nf; +extern cpuop_func op_d120_31_ff; +extern cpuop_func op_d128_31_nf; +extern cpuop_func op_d128_31_ff; +extern cpuop_func op_d130_31_nf; +extern cpuop_func op_d130_31_ff; +extern cpuop_func op_d138_31_nf; +extern cpuop_func op_d138_31_ff; +extern cpuop_func op_d139_31_nf; +extern cpuop_func op_d139_31_ff; +extern cpuop_func op_d140_31_nf; +extern cpuop_func op_d140_31_ff; +extern cpuop_func op_d148_31_nf; +extern cpuop_func op_d148_31_ff; +extern cpuop_func op_d150_31_nf; +extern cpuop_func op_d150_31_ff; +extern cpuop_func op_d158_31_nf; +extern cpuop_func op_d158_31_ff; +extern cpuop_func op_d160_31_nf; +extern cpuop_func op_d160_31_ff; +extern cpuop_func op_d168_31_nf; +extern cpuop_func op_d168_31_ff; +extern cpuop_func op_d170_31_nf; +extern cpuop_func op_d170_31_ff; +extern cpuop_func op_d178_31_nf; +extern cpuop_func op_d178_31_ff; +extern cpuop_func op_d179_31_nf; +extern cpuop_func op_d179_31_ff; +extern cpuop_func op_d180_31_nf; +extern cpuop_func op_d180_31_ff; +extern cpuop_func op_d188_31_nf; +extern cpuop_func op_d188_31_ff; +extern cpuop_func op_d190_31_nf; +extern cpuop_func op_d190_31_ff; +extern cpuop_func op_d198_31_nf; +extern cpuop_func op_d198_31_ff; +extern cpuop_func op_d1a0_31_nf; +extern cpuop_func op_d1a0_31_ff; +extern cpuop_func op_d1a8_31_nf; +extern cpuop_func op_d1a8_31_ff; +extern cpuop_func op_d1b0_31_nf; +extern cpuop_func op_d1b0_31_ff; +extern cpuop_func op_d1b8_31_nf; +extern cpuop_func op_d1b8_31_ff; +extern cpuop_func op_d1b9_31_nf; +extern cpuop_func op_d1b9_31_ff; +extern cpuop_func op_d1c0_31_nf; +extern cpuop_func op_d1c0_31_ff; +extern cpuop_func op_d1c8_31_nf; +extern cpuop_func op_d1c8_31_ff; +extern cpuop_func op_d1d0_31_nf; +extern cpuop_func op_d1d0_31_ff; +extern cpuop_func op_d1d8_31_nf; +extern cpuop_func op_d1d8_31_ff; +extern cpuop_func op_d1e0_31_nf; +extern cpuop_func op_d1e0_31_ff; +extern cpuop_func op_d1e8_31_nf; +extern cpuop_func op_d1e8_31_ff; +extern cpuop_func op_d1f0_31_nf; +extern cpuop_func op_d1f0_31_ff; +extern cpuop_func op_d1f8_31_nf; +extern cpuop_func op_d1f8_31_ff; +extern cpuop_func op_d1f9_31_nf; +extern cpuop_func op_d1f9_31_ff; +extern cpuop_func op_d1fa_31_nf; +extern cpuop_func op_d1fa_31_ff; +extern cpuop_func op_d1fb_31_nf; +extern cpuop_func op_d1fb_31_ff; +extern cpuop_func op_d1fc_31_nf; +extern cpuop_func op_d1fc_31_ff; +extern cpuop_func op_e000_31_nf; +extern cpuop_func op_e000_31_ff; +extern cpuop_func op_e008_31_nf; +extern cpuop_func op_e008_31_ff; +extern cpuop_func op_e010_31_nf; +extern cpuop_func op_e010_31_ff; +extern cpuop_func op_e018_31_nf; +extern cpuop_func op_e018_31_ff; +extern cpuop_func op_e020_31_nf; +extern cpuop_func op_e020_31_ff; +extern cpuop_func op_e028_31_nf; +extern cpuop_func op_e028_31_ff; +extern cpuop_func op_e030_31_nf; +extern cpuop_func op_e030_31_ff; +extern cpuop_func op_e038_31_nf; +extern cpuop_func op_e038_31_ff; +extern cpuop_func op_e040_31_nf; +extern cpuop_func op_e040_31_ff; +extern cpuop_func op_e048_31_nf; +extern cpuop_func op_e048_31_ff; +extern cpuop_func op_e050_31_nf; +extern cpuop_func op_e050_31_ff; +extern cpuop_func op_e058_31_nf; +extern cpuop_func op_e058_31_ff; +extern cpuop_func op_e060_31_nf; +extern cpuop_func op_e060_31_ff; +extern cpuop_func op_e068_31_nf; +extern cpuop_func op_e068_31_ff; +extern cpuop_func op_e070_31_nf; +extern cpuop_func op_e070_31_ff; +extern cpuop_func op_e078_31_nf; +extern cpuop_func op_e078_31_ff; +extern cpuop_func op_e080_31_nf; +extern cpuop_func op_e080_31_ff; +extern cpuop_func op_e088_31_nf; +extern cpuop_func op_e088_31_ff; +extern cpuop_func op_e090_31_nf; +extern cpuop_func op_e090_31_ff; +extern cpuop_func op_e098_31_nf; +extern cpuop_func op_e098_31_ff; +extern cpuop_func op_e0a0_31_nf; +extern cpuop_func op_e0a0_31_ff; +extern cpuop_func op_e0a8_31_nf; +extern cpuop_func op_e0a8_31_ff; +extern cpuop_func op_e0b0_31_nf; +extern cpuop_func op_e0b0_31_ff; +extern cpuop_func op_e0b8_31_nf; +extern cpuop_func op_e0b8_31_ff; +extern cpuop_func op_e0d0_31_nf; +extern cpuop_func op_e0d0_31_ff; +extern cpuop_func op_e0d8_31_nf; +extern cpuop_func op_e0d8_31_ff; +extern cpuop_func op_e0e0_31_nf; +extern cpuop_func op_e0e0_31_ff; +extern cpuop_func op_e0e8_31_nf; +extern cpuop_func op_e0e8_31_ff; +extern cpuop_func op_e0f0_31_nf; +extern cpuop_func op_e0f0_31_ff; +extern cpuop_func op_e0f8_31_nf; +extern cpuop_func op_e0f8_31_ff; +extern cpuop_func op_e0f9_31_nf; +extern cpuop_func op_e0f9_31_ff; +extern cpuop_func op_e100_31_nf; +extern cpuop_func op_e100_31_ff; +extern cpuop_func op_e108_31_nf; +extern cpuop_func op_e108_31_ff; +extern cpuop_func op_e110_31_nf; +extern cpuop_func op_e110_31_ff; +extern cpuop_func op_e118_31_nf; +extern cpuop_func op_e118_31_ff; +extern cpuop_func op_e120_31_nf; +extern cpuop_func op_e120_31_ff; +extern cpuop_func op_e128_31_nf; +extern cpuop_func op_e128_31_ff; +extern cpuop_func op_e130_31_nf; +extern cpuop_func op_e130_31_ff; +extern cpuop_func op_e138_31_nf; +extern cpuop_func op_e138_31_ff; +extern cpuop_func op_e140_31_nf; +extern cpuop_func op_e140_31_ff; +extern cpuop_func op_e148_31_nf; +extern cpuop_func op_e148_31_ff; +extern cpuop_func op_e150_31_nf; +extern cpuop_func op_e150_31_ff; +extern cpuop_func op_e158_31_nf; +extern cpuop_func op_e158_31_ff; +extern cpuop_func op_e160_31_nf; +extern cpuop_func op_e160_31_ff; +extern cpuop_func op_e168_31_nf; +extern cpuop_func op_e168_31_ff; +extern cpuop_func op_e170_31_nf; +extern cpuop_func op_e170_31_ff; +extern cpuop_func op_e178_31_nf; +extern cpuop_func op_e178_31_ff; +extern cpuop_func op_e180_31_nf; +extern cpuop_func op_e180_31_ff; +extern cpuop_func op_e188_31_nf; +extern cpuop_func op_e188_31_ff; +extern cpuop_func op_e190_31_nf; +extern cpuop_func op_e190_31_ff; +extern cpuop_func op_e198_31_nf; +extern cpuop_func op_e198_31_ff; +extern cpuop_func op_e1a0_31_nf; +extern cpuop_func op_e1a0_31_ff; +extern cpuop_func op_e1a8_31_nf; +extern cpuop_func op_e1a8_31_ff; +extern cpuop_func op_e1b0_31_nf; +extern cpuop_func op_e1b0_31_ff; +extern cpuop_func op_e1b8_31_nf; +extern cpuop_func op_e1b8_31_ff; +extern cpuop_func op_e1d0_31_nf; +extern cpuop_func op_e1d0_31_ff; +extern cpuop_func op_e1d8_31_nf; +extern cpuop_func op_e1d8_31_ff; +extern cpuop_func op_e1e0_31_nf; +extern cpuop_func op_e1e0_31_ff; +extern cpuop_func op_e1e8_31_nf; +extern cpuop_func op_e1e8_31_ff; +extern cpuop_func op_e1f0_31_nf; +extern cpuop_func op_e1f0_31_ff; +extern cpuop_func op_e1f8_31_nf; +extern cpuop_func op_e1f8_31_ff; +extern cpuop_func op_e1f9_31_nf; +extern cpuop_func op_e1f9_31_ff; +extern cpuop_func op_e2d0_31_nf; +extern cpuop_func op_e2d0_31_ff; +extern cpuop_func op_e2d8_31_nf; +extern cpuop_func op_e2d8_31_ff; +extern cpuop_func op_e2e0_31_nf; +extern cpuop_func op_e2e0_31_ff; +extern cpuop_func op_e2e8_31_nf; +extern cpuop_func op_e2e8_31_ff; +extern cpuop_func op_e2f0_31_nf; +extern cpuop_func op_e2f0_31_ff; +extern cpuop_func op_e2f8_31_nf; +extern cpuop_func op_e2f8_31_ff; +extern cpuop_func op_e2f9_31_nf; +extern cpuop_func op_e2f9_31_ff; +extern cpuop_func op_e3d0_31_nf; +extern cpuop_func op_e3d0_31_ff; +extern cpuop_func op_e3d8_31_nf; +extern cpuop_func op_e3d8_31_ff; +extern cpuop_func op_e3e0_31_nf; +extern cpuop_func op_e3e0_31_ff; +extern cpuop_func op_e3e8_31_nf; +extern cpuop_func op_e3e8_31_ff; +extern cpuop_func op_e3f0_31_nf; +extern cpuop_func op_e3f0_31_ff; +extern cpuop_func op_e3f8_31_nf; +extern cpuop_func op_e3f8_31_ff; +extern cpuop_func op_e3f9_31_nf; +extern cpuop_func op_e3f9_31_ff; +extern cpuop_func op_e4d0_31_nf; +extern cpuop_func op_e4d0_31_ff; +extern cpuop_func op_e4d8_31_nf; +extern cpuop_func op_e4d8_31_ff; +extern cpuop_func op_e4e0_31_nf; +extern cpuop_func op_e4e0_31_ff; +extern cpuop_func op_e4e8_31_nf; +extern cpuop_func op_e4e8_31_ff; +extern cpuop_func op_e4f0_31_nf; +extern cpuop_func op_e4f0_31_ff; +extern cpuop_func op_e4f8_31_nf; +extern cpuop_func op_e4f8_31_ff; +extern cpuop_func op_e4f9_31_nf; +extern cpuop_func op_e4f9_31_ff; +extern cpuop_func op_e5d0_31_nf; +extern cpuop_func op_e5d0_31_ff; +extern cpuop_func op_e5d8_31_nf; +extern cpuop_func op_e5d8_31_ff; +extern cpuop_func op_e5e0_31_nf; +extern cpuop_func op_e5e0_31_ff; +extern cpuop_func op_e5e8_31_nf; +extern cpuop_func op_e5e8_31_ff; +extern cpuop_func op_e5f0_31_nf; +extern cpuop_func op_e5f0_31_ff; +extern cpuop_func op_e5f8_31_nf; +extern cpuop_func op_e5f8_31_ff; +extern cpuop_func op_e5f9_31_nf; +extern cpuop_func op_e5f9_31_ff; +extern cpuop_func op_e6d0_31_nf; +extern cpuop_func op_e6d0_31_ff; +extern cpuop_func op_e6d8_31_nf; +extern cpuop_func op_e6d8_31_ff; +extern cpuop_func op_e6e0_31_nf; +extern cpuop_func op_e6e0_31_ff; +extern cpuop_func op_e6e8_31_nf; +extern cpuop_func op_e6e8_31_ff; +extern cpuop_func op_e6f0_31_nf; +extern cpuop_func op_e6f0_31_ff; +extern cpuop_func op_e6f8_31_nf; +extern cpuop_func op_e6f8_31_ff; +extern cpuop_func op_e6f9_31_nf; +extern cpuop_func op_e6f9_31_ff; +extern cpuop_func op_e7d0_31_nf; +extern cpuop_func op_e7d0_31_ff; +extern cpuop_func op_e7d8_31_nf; +extern cpuop_func op_e7d8_31_ff; +extern cpuop_func op_e7e0_31_nf; +extern cpuop_func op_e7e0_31_ff; +extern cpuop_func op_e7e8_31_nf; +extern cpuop_func op_e7e8_31_ff; +extern cpuop_func op_e7f0_31_nf; +extern cpuop_func op_e7f0_31_ff; +extern cpuop_func op_e7f8_31_nf; +extern cpuop_func op_e7f8_31_ff; +extern cpuop_func op_e7f9_31_nf; +extern cpuop_func op_e7f9_31_ff; +extern cpuop_func op_e8c0_31_nf; +extern cpuop_func op_e8c0_31_ff; +extern cpuop_func op_e8d0_31_nf; +extern cpuop_func op_e8d0_31_ff; +extern cpuop_func op_e8e8_31_nf; +extern cpuop_func op_e8e8_31_ff; +extern cpuop_func op_e8f0_31_nf; +extern cpuop_func op_e8f0_31_ff; +extern cpuop_func op_e8f8_31_nf; +extern cpuop_func op_e8f8_31_ff; +extern cpuop_func op_e8f9_31_nf; +extern cpuop_func op_e8f9_31_ff; +extern cpuop_func op_e8fa_31_nf; +extern cpuop_func op_e8fa_31_ff; +extern cpuop_func op_e8fb_31_nf; +extern cpuop_func op_e8fb_31_ff; +extern cpuop_func op_e9c0_31_nf; +extern cpuop_func op_e9c0_31_ff; +extern cpuop_func op_e9d0_31_nf; +extern cpuop_func op_e9d0_31_ff; +extern cpuop_func op_e9e8_31_nf; +extern cpuop_func op_e9e8_31_ff; +extern cpuop_func op_e9f0_31_nf; +extern cpuop_func op_e9f0_31_ff; +extern cpuop_func op_e9f8_31_nf; +extern cpuop_func op_e9f8_31_ff; +extern cpuop_func op_e9f9_31_nf; +extern cpuop_func op_e9f9_31_ff; +extern cpuop_func op_e9fa_31_nf; +extern cpuop_func op_e9fa_31_ff; +extern cpuop_func op_e9fb_31_nf; +extern cpuop_func op_e9fb_31_ff; +extern cpuop_func op_eac0_31_nf; +extern cpuop_func op_eac0_31_ff; +extern cpuop_func op_ead0_31_nf; +extern cpuop_func op_ead0_31_ff; +extern cpuop_func op_eae8_31_nf; +extern cpuop_func op_eae8_31_ff; +extern cpuop_func op_eaf0_31_nf; +extern cpuop_func op_eaf0_31_ff; +extern cpuop_func op_eaf8_31_nf; +extern cpuop_func op_eaf8_31_ff; +extern cpuop_func op_eaf9_31_nf; +extern cpuop_func op_eaf9_31_ff; +extern cpuop_func op_ebc0_31_nf; +extern cpuop_func op_ebc0_31_ff; +extern cpuop_func op_ebd0_31_nf; +extern cpuop_func op_ebd0_31_ff; +extern cpuop_func op_ebe8_31_nf; +extern cpuop_func op_ebe8_31_ff; +extern cpuop_func op_ebf0_31_nf; +extern cpuop_func op_ebf0_31_ff; +extern cpuop_func op_ebf8_31_nf; +extern cpuop_func op_ebf8_31_ff; +extern cpuop_func op_ebf9_31_nf; +extern cpuop_func op_ebf9_31_ff; +extern cpuop_func op_ebfa_31_nf; +extern cpuop_func op_ebfa_31_ff; +extern cpuop_func op_ebfb_31_nf; +extern cpuop_func op_ebfb_31_ff; +extern cpuop_func op_ecc0_31_nf; +extern cpuop_func op_ecc0_31_ff; +extern cpuop_func op_ecd0_31_nf; +extern cpuop_func op_ecd0_31_ff; +extern cpuop_func op_ece8_31_nf; +extern cpuop_func op_ece8_31_ff; +extern cpuop_func op_ecf0_31_nf; +extern cpuop_func op_ecf0_31_ff; +extern cpuop_func op_ecf8_31_nf; +extern cpuop_func op_ecf8_31_ff; +extern cpuop_func op_ecf9_31_nf; +extern cpuop_func op_ecf9_31_ff; +extern cpuop_func op_edc0_31_nf; +extern cpuop_func op_edc0_31_ff; +extern cpuop_func op_edd0_31_nf; +extern cpuop_func op_edd0_31_ff; +extern cpuop_func op_ede8_31_nf; +extern cpuop_func op_ede8_31_ff; +extern cpuop_func op_edf0_31_nf; +extern cpuop_func op_edf0_31_ff; +extern cpuop_func op_edf8_31_nf; +extern cpuop_func op_edf8_31_ff; +extern cpuop_func op_edf9_31_nf; +extern cpuop_func op_edf9_31_ff; +extern cpuop_func op_edfa_31_nf; +extern cpuop_func op_edfa_31_ff; +extern cpuop_func op_edfb_31_nf; +extern cpuop_func op_edfb_31_ff; +extern cpuop_func op_eec0_31_nf; +extern cpuop_func op_eec0_31_ff; +extern cpuop_func op_eed0_31_nf; +extern cpuop_func op_eed0_31_ff; +extern cpuop_func op_eee8_31_nf; +extern cpuop_func op_eee8_31_ff; +extern cpuop_func op_eef0_31_nf; +extern cpuop_func op_eef0_31_ff; +extern cpuop_func op_eef8_31_nf; +extern cpuop_func op_eef8_31_ff; +extern cpuop_func op_eef9_31_nf; +extern cpuop_func op_eef9_31_ff; +extern cpuop_func op_efc0_31_nf; +extern cpuop_func op_efc0_31_ff; +extern cpuop_func op_efd0_31_nf; +extern cpuop_func op_efd0_31_ff; +extern cpuop_func op_efe8_31_nf; +extern cpuop_func op_efe8_31_ff; +extern cpuop_func op_eff0_31_nf; +extern cpuop_func op_eff0_31_ff; +extern cpuop_func op_eff8_31_nf; +extern cpuop_func op_eff8_31_ff; +extern cpuop_func op_eff9_31_nf; +extern cpuop_func op_eff9_31_ff; +extern cpuop_func op_f000_31_nf; +extern cpuop_func op_f000_31_ff; +extern cpuop_func op_f008_31_nf; +extern cpuop_func op_f008_31_ff; +extern cpuop_func op_f010_31_nf; +extern cpuop_func op_f010_31_ff; +extern cpuop_func op_f018_31_nf; +extern cpuop_func op_f018_31_ff; +extern cpuop_func op_f020_31_nf; +extern cpuop_func op_f020_31_ff; +extern cpuop_func op_f028_31_nf; +extern cpuop_func op_f028_31_ff; +extern cpuop_func op_f030_31_nf; +extern cpuop_func op_f030_31_ff; +extern cpuop_func op_f038_31_nf; +extern cpuop_func op_f038_31_ff; +extern cpuop_func op_f039_31_nf; +extern cpuop_func op_f039_31_ff; +extern cpuop_func op_f200_31_nf; +extern cpuop_func op_f200_31_ff; +extern cpuop_func op_f208_31_nf; +extern cpuop_func op_f208_31_ff; +extern cpuop_func op_f210_31_nf; +extern cpuop_func op_f210_31_ff; +extern cpuop_func op_f218_31_nf; +extern cpuop_func op_f218_31_ff; +extern cpuop_func op_f220_31_nf; +extern cpuop_func op_f220_31_ff; +extern cpuop_func op_f228_31_nf; +extern cpuop_func op_f228_31_ff; +extern cpuop_func op_f230_31_nf; +extern cpuop_func op_f230_31_ff; +extern cpuop_func op_f238_31_nf; +extern cpuop_func op_f238_31_ff; +extern cpuop_func op_f239_31_nf; +extern cpuop_func op_f239_31_ff; +extern cpuop_func op_f23a_31_nf; +extern cpuop_func op_f23a_31_ff; +extern cpuop_func op_f23b_31_nf; +extern cpuop_func op_f23b_31_ff; +extern cpuop_func op_f23c_31_nf; +extern cpuop_func op_f23c_31_ff; +extern cpuop_func op_f240_31_nf; +extern cpuop_func op_f240_31_ff; +extern cpuop_func op_f248_31_nf; +extern cpuop_func op_f248_31_ff; +extern cpuop_func op_f250_31_nf; +extern cpuop_func op_f250_31_ff; +extern cpuop_func op_f258_31_nf; +extern cpuop_func op_f258_31_ff; +extern cpuop_func op_f260_31_nf; +extern cpuop_func op_f260_31_ff; +extern cpuop_func op_f268_31_nf; +extern cpuop_func op_f268_31_ff; +extern cpuop_func op_f270_31_nf; +extern cpuop_func op_f270_31_ff; +extern cpuop_func op_f278_31_nf; +extern cpuop_func op_f278_31_ff; +extern cpuop_func op_f279_31_nf; +extern cpuop_func op_f279_31_ff; +extern cpuop_func op_f27a_31_nf; +extern cpuop_func op_f27a_31_ff; +extern cpuop_func op_f27b_31_nf; +extern cpuop_func op_f27b_31_ff; +extern cpuop_func op_f27c_31_nf; +extern cpuop_func op_f27c_31_ff; +extern cpuop_func op_f280_31_nf; +extern cpuop_func op_f280_31_ff; +extern cpuop_func op_f2c0_31_nf; +extern cpuop_func op_f2c0_31_ff; +extern cpuop_func op_f310_31_nf; +extern cpuop_func op_f310_31_ff; +extern cpuop_func op_f320_31_nf; +extern cpuop_func op_f320_31_ff; +extern cpuop_func op_f328_31_nf; +extern cpuop_func op_f328_31_ff; +extern cpuop_func op_f330_31_nf; +extern cpuop_func op_f330_31_ff; +extern cpuop_func op_f338_31_nf; +extern cpuop_func op_f338_31_ff; +extern cpuop_func op_f339_31_nf; +extern cpuop_func op_f339_31_ff; +extern cpuop_func op_f350_31_nf; +extern cpuop_func op_f350_31_ff; +extern cpuop_func op_f358_31_nf; +extern cpuop_func op_f358_31_ff; +extern cpuop_func op_f368_31_nf; +extern cpuop_func op_f368_31_ff; +extern cpuop_func op_f370_31_nf; +extern cpuop_func op_f370_31_ff; +extern cpuop_func op_f378_31_nf; +extern cpuop_func op_f378_31_ff; +extern cpuop_func op_f379_31_nf; +extern cpuop_func op_f379_31_ff; +extern cpuop_func op_f37a_31_nf; +extern cpuop_func op_f37a_31_ff; +extern cpuop_func op_f37b_31_nf; +extern cpuop_func op_f37b_31_ff; +extern cpuop_func op_f408_31_nf; +extern cpuop_func op_f408_31_ff; +extern cpuop_func op_f410_31_nf; +extern cpuop_func op_f410_31_ff; +extern cpuop_func op_f418_31_nf; +extern cpuop_func op_f418_31_ff; +extern cpuop_func op_f419_31_nf; +extern cpuop_func op_f419_31_ff; +extern cpuop_func op_f41a_31_nf; +extern cpuop_func op_f41a_31_ff; +extern cpuop_func op_f41b_31_nf; +extern cpuop_func op_f41b_31_ff; +extern cpuop_func op_f41c_31_nf; +extern cpuop_func op_f41c_31_ff; +extern cpuop_func op_f41d_31_nf; +extern cpuop_func op_f41d_31_ff; +extern cpuop_func op_f41e_31_nf; +extern cpuop_func op_f41e_31_ff; +extern cpuop_func op_f41f_31_nf; +extern cpuop_func op_f41f_31_ff; +extern cpuop_func op_f428_31_nf; +extern cpuop_func op_f428_31_ff; +extern cpuop_func op_f430_31_nf; +extern cpuop_func op_f430_31_ff; +extern cpuop_func op_f438_31_nf; +extern cpuop_func op_f438_31_ff; +extern cpuop_func op_f439_31_nf; +extern cpuop_func op_f439_31_ff; +extern cpuop_func op_f43a_31_nf; +extern cpuop_func op_f43a_31_ff; +extern cpuop_func op_f43b_31_nf; +extern cpuop_func op_f43b_31_ff; +extern cpuop_func op_f43c_31_nf; +extern cpuop_func op_f43c_31_ff; +extern cpuop_func op_f43d_31_nf; +extern cpuop_func op_f43d_31_ff; +extern cpuop_func op_f43e_31_nf; +extern cpuop_func op_f43e_31_ff; +extern cpuop_func op_f43f_31_nf; +extern cpuop_func op_f43f_31_ff; +extern cpuop_func op_f500_31_nf; +extern cpuop_func op_f500_31_ff; +extern cpuop_func op_f508_31_nf; +extern cpuop_func op_f508_31_ff; +extern cpuop_func op_f510_31_nf; +extern cpuop_func op_f510_31_ff; +extern cpuop_func op_f518_31_nf; +extern cpuop_func op_f518_31_ff; +extern cpuop_func op_f548_31_nf; +extern cpuop_func op_f548_31_ff; +extern cpuop_func op_f568_31_nf; +extern cpuop_func op_f568_31_ff; +extern cpuop_func op_f600_31_nf; +extern cpuop_func op_f600_31_ff; +extern cpuop_func op_f608_31_nf; +extern cpuop_func op_f608_31_ff; +extern cpuop_func op_f610_31_nf; +extern cpuop_func op_f610_31_ff; +extern cpuop_func op_f618_31_nf; +extern cpuop_func op_f618_31_ff; +extern cpuop_func op_f620_31_nf; +extern cpuop_func op_f620_31_ff; +extern cpuop_func op_0000_32_nf; +extern cpuop_func op_0000_32_ff; +extern cpuop_func op_0010_32_nf; +extern cpuop_func op_0010_32_ff; +extern cpuop_func op_0018_32_nf; +extern cpuop_func op_0018_32_ff; +extern cpuop_func op_0020_32_nf; +extern cpuop_func op_0020_32_ff; +extern cpuop_func op_0028_32_nf; +extern cpuop_func op_0028_32_ff; +extern cpuop_func op_0030_32_nf; +extern cpuop_func op_0030_32_ff; +extern cpuop_func op_0038_32_nf; +extern cpuop_func op_0038_32_ff; +extern cpuop_func op_0039_32_nf; +extern cpuop_func op_0039_32_ff; +extern cpuop_func op_003c_32_nf; +extern cpuop_func op_003c_32_ff; +extern cpuop_func op_0040_32_nf; +extern cpuop_func op_0040_32_ff; +extern cpuop_func op_0050_32_nf; +extern cpuop_func op_0050_32_ff; +extern cpuop_func op_0058_32_nf; +extern cpuop_func op_0058_32_ff; +extern cpuop_func op_0060_32_nf; +extern cpuop_func op_0060_32_ff; +extern cpuop_func op_0068_32_nf; +extern cpuop_func op_0068_32_ff; +extern cpuop_func op_0070_32_nf; +extern cpuop_func op_0070_32_ff; +extern cpuop_func op_0078_32_nf; +extern cpuop_func op_0078_32_ff; +extern cpuop_func op_0079_32_nf; +extern cpuop_func op_0079_32_ff; +extern cpuop_func op_007c_32_nf; +extern cpuop_func op_007c_32_ff; +extern cpuop_func op_0080_32_nf; +extern cpuop_func op_0080_32_ff; +extern cpuop_func op_0090_32_nf; +extern cpuop_func op_0090_32_ff; +extern cpuop_func op_0098_32_nf; +extern cpuop_func op_0098_32_ff; +extern cpuop_func op_00a0_32_nf; +extern cpuop_func op_00a0_32_ff; +extern cpuop_func op_00a8_32_nf; +extern cpuop_func op_00a8_32_ff; +extern cpuop_func op_00b0_32_nf; +extern cpuop_func op_00b0_32_ff; +extern cpuop_func op_00b8_32_nf; +extern cpuop_func op_00b8_32_ff; +extern cpuop_func op_00b9_32_nf; +extern cpuop_func op_00b9_32_ff; +extern cpuop_func op_00d0_32_nf; +extern cpuop_func op_00d0_32_ff; +extern cpuop_func op_00e8_32_nf; +extern cpuop_func op_00e8_32_ff; +extern cpuop_func op_00f0_32_nf; +extern cpuop_func op_00f0_32_ff; +extern cpuop_func op_00f8_32_nf; +extern cpuop_func op_00f8_32_ff; +extern cpuop_func op_00f9_32_nf; +extern cpuop_func op_00f9_32_ff; +extern cpuop_func op_00fa_32_nf; +extern cpuop_func op_00fa_32_ff; +extern cpuop_func op_00fb_32_nf; +extern cpuop_func op_00fb_32_ff; +extern cpuop_func op_0100_32_nf; +extern cpuop_func op_0100_32_ff; +extern cpuop_func op_0108_32_nf; +extern cpuop_func op_0108_32_ff; +extern cpuop_func op_0110_32_nf; +extern cpuop_func op_0110_32_ff; +extern cpuop_func op_0118_32_nf; +extern cpuop_func op_0118_32_ff; +extern cpuop_func op_0120_32_nf; +extern cpuop_func op_0120_32_ff; +extern cpuop_func op_0128_32_nf; +extern cpuop_func op_0128_32_ff; +extern cpuop_func op_0130_32_nf; +extern cpuop_func op_0130_32_ff; +extern cpuop_func op_0138_32_nf; +extern cpuop_func op_0138_32_ff; +extern cpuop_func op_0139_32_nf; +extern cpuop_func op_0139_32_ff; +extern cpuop_func op_013a_32_nf; +extern cpuop_func op_013a_32_ff; +extern cpuop_func op_013b_32_nf; +extern cpuop_func op_013b_32_ff; +extern cpuop_func op_013c_32_nf; +extern cpuop_func op_013c_32_ff; +extern cpuop_func op_0140_32_nf; +extern cpuop_func op_0140_32_ff; +extern cpuop_func op_0148_32_nf; +extern cpuop_func op_0148_32_ff; +extern cpuop_func op_0150_32_nf; +extern cpuop_func op_0150_32_ff; +extern cpuop_func op_0158_32_nf; +extern cpuop_func op_0158_32_ff; +extern cpuop_func op_0160_32_nf; +extern cpuop_func op_0160_32_ff; +extern cpuop_func op_0168_32_nf; +extern cpuop_func op_0168_32_ff; +extern cpuop_func op_0170_32_nf; +extern cpuop_func op_0170_32_ff; +extern cpuop_func op_0178_32_nf; +extern cpuop_func op_0178_32_ff; +extern cpuop_func op_0179_32_nf; +extern cpuop_func op_0179_32_ff; +extern cpuop_func op_0180_32_nf; +extern cpuop_func op_0180_32_ff; +extern cpuop_func op_0188_32_nf; +extern cpuop_func op_0188_32_ff; +extern cpuop_func op_0190_32_nf; +extern cpuop_func op_0190_32_ff; +extern cpuop_func op_0198_32_nf; +extern cpuop_func op_0198_32_ff; +extern cpuop_func op_01a0_32_nf; +extern cpuop_func op_01a0_32_ff; +extern cpuop_func op_01a8_32_nf; +extern cpuop_func op_01a8_32_ff; +extern cpuop_func op_01b0_32_nf; +extern cpuop_func op_01b0_32_ff; +extern cpuop_func op_01b8_32_nf; +extern cpuop_func op_01b8_32_ff; +extern cpuop_func op_01b9_32_nf; +extern cpuop_func op_01b9_32_ff; +extern cpuop_func op_01c0_32_nf; +extern cpuop_func op_01c0_32_ff; +extern cpuop_func op_01c8_32_nf; +extern cpuop_func op_01c8_32_ff; +extern cpuop_func op_01d0_32_nf; +extern cpuop_func op_01d0_32_ff; +extern cpuop_func op_01d8_32_nf; +extern cpuop_func op_01d8_32_ff; +extern cpuop_func op_01e0_32_nf; +extern cpuop_func op_01e0_32_ff; +extern cpuop_func op_01e8_32_nf; +extern cpuop_func op_01e8_32_ff; +extern cpuop_func op_01f0_32_nf; +extern cpuop_func op_01f0_32_ff; +extern cpuop_func op_01f8_32_nf; +extern cpuop_func op_01f8_32_ff; +extern cpuop_func op_01f9_32_nf; +extern cpuop_func op_01f9_32_ff; +extern cpuop_func op_0200_32_nf; +extern cpuop_func op_0200_32_ff; +extern cpuop_func op_0210_32_nf; +extern cpuop_func op_0210_32_ff; +extern cpuop_func op_0218_32_nf; +extern cpuop_func op_0218_32_ff; +extern cpuop_func op_0220_32_nf; +extern cpuop_func op_0220_32_ff; +extern cpuop_func op_0228_32_nf; +extern cpuop_func op_0228_32_ff; +extern cpuop_func op_0230_32_nf; +extern cpuop_func op_0230_32_ff; +extern cpuop_func op_0238_32_nf; +extern cpuop_func op_0238_32_ff; +extern cpuop_func op_0239_32_nf; +extern cpuop_func op_0239_32_ff; +extern cpuop_func op_023c_32_nf; +extern cpuop_func op_023c_32_ff; +extern cpuop_func op_0240_32_nf; +extern cpuop_func op_0240_32_ff; +extern cpuop_func op_0250_32_nf; +extern cpuop_func op_0250_32_ff; +extern cpuop_func op_0258_32_nf; +extern cpuop_func op_0258_32_ff; +extern cpuop_func op_0260_32_nf; +extern cpuop_func op_0260_32_ff; +extern cpuop_func op_0268_32_nf; +extern cpuop_func op_0268_32_ff; +extern cpuop_func op_0270_32_nf; +extern cpuop_func op_0270_32_ff; +extern cpuop_func op_0278_32_nf; +extern cpuop_func op_0278_32_ff; +extern cpuop_func op_0279_32_nf; +extern cpuop_func op_0279_32_ff; +extern cpuop_func op_027c_32_nf; +extern cpuop_func op_027c_32_ff; +extern cpuop_func op_0280_32_nf; +extern cpuop_func op_0280_32_ff; +extern cpuop_func op_0290_32_nf; +extern cpuop_func op_0290_32_ff; +extern cpuop_func op_0298_32_nf; +extern cpuop_func op_0298_32_ff; +extern cpuop_func op_02a0_32_nf; +extern cpuop_func op_02a0_32_ff; +extern cpuop_func op_02a8_32_nf; +extern cpuop_func op_02a8_32_ff; +extern cpuop_func op_02b0_32_nf; +extern cpuop_func op_02b0_32_ff; +extern cpuop_func op_02b8_32_nf; +extern cpuop_func op_02b8_32_ff; +extern cpuop_func op_02b9_32_nf; +extern cpuop_func op_02b9_32_ff; +extern cpuop_func op_02d0_32_nf; +extern cpuop_func op_02d0_32_ff; +extern cpuop_func op_02e8_32_nf; +extern cpuop_func op_02e8_32_ff; +extern cpuop_func op_02f0_32_nf; +extern cpuop_func op_02f0_32_ff; +extern cpuop_func op_02f8_32_nf; +extern cpuop_func op_02f8_32_ff; +extern cpuop_func op_02f9_32_nf; +extern cpuop_func op_02f9_32_ff; +extern cpuop_func op_02fa_32_nf; +extern cpuop_func op_02fa_32_ff; +extern cpuop_func op_02fb_32_nf; +extern cpuop_func op_02fb_32_ff; +extern cpuop_func op_0400_32_nf; +extern cpuop_func op_0400_32_ff; +extern cpuop_func op_0410_32_nf; +extern cpuop_func op_0410_32_ff; +extern cpuop_func op_0418_32_nf; +extern cpuop_func op_0418_32_ff; +extern cpuop_func op_0420_32_nf; +extern cpuop_func op_0420_32_ff; +extern cpuop_func op_0428_32_nf; +extern cpuop_func op_0428_32_ff; +extern cpuop_func op_0430_32_nf; +extern cpuop_func op_0430_32_ff; +extern cpuop_func op_0438_32_nf; +extern cpuop_func op_0438_32_ff; +extern cpuop_func op_0439_32_nf; +extern cpuop_func op_0439_32_ff; +extern cpuop_func op_0440_32_nf; +extern cpuop_func op_0440_32_ff; +extern cpuop_func op_0450_32_nf; +extern cpuop_func op_0450_32_ff; +extern cpuop_func op_0458_32_nf; +extern cpuop_func op_0458_32_ff; +extern cpuop_func op_0460_32_nf; +extern cpuop_func op_0460_32_ff; +extern cpuop_func op_0468_32_nf; +extern cpuop_func op_0468_32_ff; +extern cpuop_func op_0470_32_nf; +extern cpuop_func op_0470_32_ff; +extern cpuop_func op_0478_32_nf; +extern cpuop_func op_0478_32_ff; +extern cpuop_func op_0479_32_nf; +extern cpuop_func op_0479_32_ff; +extern cpuop_func op_0480_32_nf; +extern cpuop_func op_0480_32_ff; +extern cpuop_func op_0490_32_nf; +extern cpuop_func op_0490_32_ff; +extern cpuop_func op_0498_32_nf; +extern cpuop_func op_0498_32_ff; +extern cpuop_func op_04a0_32_nf; +extern cpuop_func op_04a0_32_ff; +extern cpuop_func op_04a8_32_nf; +extern cpuop_func op_04a8_32_ff; +extern cpuop_func op_04b0_32_nf; +extern cpuop_func op_04b0_32_ff; +extern cpuop_func op_04b8_32_nf; +extern cpuop_func op_04b8_32_ff; +extern cpuop_func op_04b9_32_nf; +extern cpuop_func op_04b9_32_ff; +extern cpuop_func op_04d0_32_nf; +extern cpuop_func op_04d0_32_ff; +extern cpuop_func op_04e8_32_nf; +extern cpuop_func op_04e8_32_ff; +extern cpuop_func op_04f0_32_nf; +extern cpuop_func op_04f0_32_ff; +extern cpuop_func op_04f8_32_nf; +extern cpuop_func op_04f8_32_ff; +extern cpuop_func op_04f9_32_nf; +extern cpuop_func op_04f9_32_ff; +extern cpuop_func op_04fa_32_nf; +extern cpuop_func op_04fa_32_ff; +extern cpuop_func op_04fb_32_nf; +extern cpuop_func op_04fb_32_ff; +extern cpuop_func op_0600_32_nf; +extern cpuop_func op_0600_32_ff; +extern cpuop_func op_0610_32_nf; +extern cpuop_func op_0610_32_ff; +extern cpuop_func op_0618_32_nf; +extern cpuop_func op_0618_32_ff; +extern cpuop_func op_0620_32_nf; +extern cpuop_func op_0620_32_ff; +extern cpuop_func op_0628_32_nf; +extern cpuop_func op_0628_32_ff; +extern cpuop_func op_0630_32_nf; +extern cpuop_func op_0630_32_ff; +extern cpuop_func op_0638_32_nf; +extern cpuop_func op_0638_32_ff; +extern cpuop_func op_0639_32_nf; +extern cpuop_func op_0639_32_ff; +extern cpuop_func op_0640_32_nf; +extern cpuop_func op_0640_32_ff; +extern cpuop_func op_0650_32_nf; +extern cpuop_func op_0650_32_ff; +extern cpuop_func op_0658_32_nf; +extern cpuop_func op_0658_32_ff; +extern cpuop_func op_0660_32_nf; +extern cpuop_func op_0660_32_ff; +extern cpuop_func op_0668_32_nf; +extern cpuop_func op_0668_32_ff; +extern cpuop_func op_0670_32_nf; +extern cpuop_func op_0670_32_ff; +extern cpuop_func op_0678_32_nf; +extern cpuop_func op_0678_32_ff; +extern cpuop_func op_0679_32_nf; +extern cpuop_func op_0679_32_ff; +extern cpuop_func op_0680_32_nf; +extern cpuop_func op_0680_32_ff; +extern cpuop_func op_0690_32_nf; +extern cpuop_func op_0690_32_ff; +extern cpuop_func op_0698_32_nf; +extern cpuop_func op_0698_32_ff; +extern cpuop_func op_06a0_32_nf; +extern cpuop_func op_06a0_32_ff; +extern cpuop_func op_06a8_32_nf; +extern cpuop_func op_06a8_32_ff; +extern cpuop_func op_06b0_32_nf; +extern cpuop_func op_06b0_32_ff; +extern cpuop_func op_06b8_32_nf; +extern cpuop_func op_06b8_32_ff; +extern cpuop_func op_06b9_32_nf; +extern cpuop_func op_06b9_32_ff; +extern cpuop_func op_06c0_32_nf; +extern cpuop_func op_06c0_32_ff; +extern cpuop_func op_06c8_32_nf; +extern cpuop_func op_06c8_32_ff; +extern cpuop_func op_06d0_32_nf; +extern cpuop_func op_06d0_32_ff; +extern cpuop_func op_06e8_32_nf; +extern cpuop_func op_06e8_32_ff; +extern cpuop_func op_06f0_32_nf; +extern cpuop_func op_06f0_32_ff; +extern cpuop_func op_06f8_32_nf; +extern cpuop_func op_06f8_32_ff; +extern cpuop_func op_06f9_32_nf; +extern cpuop_func op_06f9_32_ff; +extern cpuop_func op_06fa_32_nf; +extern cpuop_func op_06fa_32_ff; +extern cpuop_func op_06fb_32_nf; +extern cpuop_func op_06fb_32_ff; +extern cpuop_func op_0800_32_nf; +extern cpuop_func op_0800_32_ff; +extern cpuop_func op_0810_32_nf; +extern cpuop_func op_0810_32_ff; +extern cpuop_func op_0818_32_nf; +extern cpuop_func op_0818_32_ff; +extern cpuop_func op_0820_32_nf; +extern cpuop_func op_0820_32_ff; +extern cpuop_func op_0828_32_nf; +extern cpuop_func op_0828_32_ff; +extern cpuop_func op_0830_32_nf; +extern cpuop_func op_0830_32_ff; +extern cpuop_func op_0838_32_nf; +extern cpuop_func op_0838_32_ff; +extern cpuop_func op_0839_32_nf; +extern cpuop_func op_0839_32_ff; +extern cpuop_func op_083a_32_nf; +extern cpuop_func op_083a_32_ff; +extern cpuop_func op_083b_32_nf; +extern cpuop_func op_083b_32_ff; +extern cpuop_func op_0840_32_nf; +extern cpuop_func op_0840_32_ff; +extern cpuop_func op_0850_32_nf; +extern cpuop_func op_0850_32_ff; +extern cpuop_func op_0858_32_nf; +extern cpuop_func op_0858_32_ff; +extern cpuop_func op_0860_32_nf; +extern cpuop_func op_0860_32_ff; +extern cpuop_func op_0868_32_nf; +extern cpuop_func op_0868_32_ff; +extern cpuop_func op_0870_32_nf; +extern cpuop_func op_0870_32_ff; +extern cpuop_func op_0878_32_nf; +extern cpuop_func op_0878_32_ff; +extern cpuop_func op_0879_32_nf; +extern cpuop_func op_0879_32_ff; +extern cpuop_func op_0880_32_nf; +extern cpuop_func op_0880_32_ff; +extern cpuop_func op_0890_32_nf; +extern cpuop_func op_0890_32_ff; +extern cpuop_func op_0898_32_nf; +extern cpuop_func op_0898_32_ff; +extern cpuop_func op_08a0_32_nf; +extern cpuop_func op_08a0_32_ff; +extern cpuop_func op_08a8_32_nf; +extern cpuop_func op_08a8_32_ff; +extern cpuop_func op_08b0_32_nf; +extern cpuop_func op_08b0_32_ff; +extern cpuop_func op_08b8_32_nf; +extern cpuop_func op_08b8_32_ff; +extern cpuop_func op_08b9_32_nf; +extern cpuop_func op_08b9_32_ff; +extern cpuop_func op_08c0_32_nf; +extern cpuop_func op_08c0_32_ff; +extern cpuop_func op_08d0_32_nf; +extern cpuop_func op_08d0_32_ff; +extern cpuop_func op_08d8_32_nf; +extern cpuop_func op_08d8_32_ff; +extern cpuop_func op_08e0_32_nf; +extern cpuop_func op_08e0_32_ff; +extern cpuop_func op_08e8_32_nf; +extern cpuop_func op_08e8_32_ff; +extern cpuop_func op_08f0_32_nf; +extern cpuop_func op_08f0_32_ff; +extern cpuop_func op_08f8_32_nf; +extern cpuop_func op_08f8_32_ff; +extern cpuop_func op_08f9_32_nf; +extern cpuop_func op_08f9_32_ff; +extern cpuop_func op_0a00_32_nf; +extern cpuop_func op_0a00_32_ff; +extern cpuop_func op_0a10_32_nf; +extern cpuop_func op_0a10_32_ff; +extern cpuop_func op_0a18_32_nf; +extern cpuop_func op_0a18_32_ff; +extern cpuop_func op_0a20_32_nf; +extern cpuop_func op_0a20_32_ff; +extern cpuop_func op_0a28_32_nf; +extern cpuop_func op_0a28_32_ff; +extern cpuop_func op_0a30_32_nf; +extern cpuop_func op_0a30_32_ff; +extern cpuop_func op_0a38_32_nf; +extern cpuop_func op_0a38_32_ff; +extern cpuop_func op_0a39_32_nf; +extern cpuop_func op_0a39_32_ff; +extern cpuop_func op_0a3c_32_nf; +extern cpuop_func op_0a3c_32_ff; +extern cpuop_func op_0a40_32_nf; +extern cpuop_func op_0a40_32_ff; +extern cpuop_func op_0a50_32_nf; +extern cpuop_func op_0a50_32_ff; +extern cpuop_func op_0a58_32_nf; +extern cpuop_func op_0a58_32_ff; +extern cpuop_func op_0a60_32_nf; +extern cpuop_func op_0a60_32_ff; +extern cpuop_func op_0a68_32_nf; +extern cpuop_func op_0a68_32_ff; +extern cpuop_func op_0a70_32_nf; +extern cpuop_func op_0a70_32_ff; +extern cpuop_func op_0a78_32_nf; +extern cpuop_func op_0a78_32_ff; +extern cpuop_func op_0a79_32_nf; +extern cpuop_func op_0a79_32_ff; +extern cpuop_func op_0a7c_32_nf; +extern cpuop_func op_0a7c_32_ff; +extern cpuop_func op_0a80_32_nf; +extern cpuop_func op_0a80_32_ff; +extern cpuop_func op_0a90_32_nf; +extern cpuop_func op_0a90_32_ff; +extern cpuop_func op_0a98_32_nf; +extern cpuop_func op_0a98_32_ff; +extern cpuop_func op_0aa0_32_nf; +extern cpuop_func op_0aa0_32_ff; +extern cpuop_func op_0aa8_32_nf; +extern cpuop_func op_0aa8_32_ff; +extern cpuop_func op_0ab0_32_nf; +extern cpuop_func op_0ab0_32_ff; +extern cpuop_func op_0ab8_32_nf; +extern cpuop_func op_0ab8_32_ff; +extern cpuop_func op_0ab9_32_nf; +extern cpuop_func op_0ab9_32_ff; +extern cpuop_func op_0ad0_32_nf; +extern cpuop_func op_0ad0_32_ff; +extern cpuop_func op_0ad8_32_nf; +extern cpuop_func op_0ad8_32_ff; +extern cpuop_func op_0ae0_32_nf; +extern cpuop_func op_0ae0_32_ff; +extern cpuop_func op_0ae8_32_nf; +extern cpuop_func op_0ae8_32_ff; +extern cpuop_func op_0af0_32_nf; +extern cpuop_func op_0af0_32_ff; +extern cpuop_func op_0af8_32_nf; +extern cpuop_func op_0af8_32_ff; +extern cpuop_func op_0af9_32_nf; +extern cpuop_func op_0af9_32_ff; +extern cpuop_func op_0c00_32_nf; +extern cpuop_func op_0c00_32_ff; +extern cpuop_func op_0c10_32_nf; +extern cpuop_func op_0c10_32_ff; +extern cpuop_func op_0c18_32_nf; +extern cpuop_func op_0c18_32_ff; +extern cpuop_func op_0c20_32_nf; +extern cpuop_func op_0c20_32_ff; +extern cpuop_func op_0c28_32_nf; +extern cpuop_func op_0c28_32_ff; +extern cpuop_func op_0c30_32_nf; +extern cpuop_func op_0c30_32_ff; +extern cpuop_func op_0c38_32_nf; +extern cpuop_func op_0c38_32_ff; +extern cpuop_func op_0c39_32_nf; +extern cpuop_func op_0c39_32_ff; +extern cpuop_func op_0c3a_32_nf; +extern cpuop_func op_0c3a_32_ff; +extern cpuop_func op_0c3b_32_nf; +extern cpuop_func op_0c3b_32_ff; +extern cpuop_func op_0c40_32_nf; +extern cpuop_func op_0c40_32_ff; +extern cpuop_func op_0c50_32_nf; +extern cpuop_func op_0c50_32_ff; +extern cpuop_func op_0c58_32_nf; +extern cpuop_func op_0c58_32_ff; +extern cpuop_func op_0c60_32_nf; +extern cpuop_func op_0c60_32_ff; +extern cpuop_func op_0c68_32_nf; +extern cpuop_func op_0c68_32_ff; +extern cpuop_func op_0c70_32_nf; +extern cpuop_func op_0c70_32_ff; +extern cpuop_func op_0c78_32_nf; +extern cpuop_func op_0c78_32_ff; +extern cpuop_func op_0c79_32_nf; +extern cpuop_func op_0c79_32_ff; +extern cpuop_func op_0c7a_32_nf; +extern cpuop_func op_0c7a_32_ff; +extern cpuop_func op_0c7b_32_nf; +extern cpuop_func op_0c7b_32_ff; +extern cpuop_func op_0c80_32_nf; +extern cpuop_func op_0c80_32_ff; +extern cpuop_func op_0c90_32_nf; +extern cpuop_func op_0c90_32_ff; +extern cpuop_func op_0c98_32_nf; +extern cpuop_func op_0c98_32_ff; +extern cpuop_func op_0ca0_32_nf; +extern cpuop_func op_0ca0_32_ff; +extern cpuop_func op_0ca8_32_nf; +extern cpuop_func op_0ca8_32_ff; +extern cpuop_func op_0cb0_32_nf; +extern cpuop_func op_0cb0_32_ff; +extern cpuop_func op_0cb8_32_nf; +extern cpuop_func op_0cb8_32_ff; +extern cpuop_func op_0cb9_32_nf; +extern cpuop_func op_0cb9_32_ff; +extern cpuop_func op_0cba_32_nf; +extern cpuop_func op_0cba_32_ff; +extern cpuop_func op_0cbb_32_nf; +extern cpuop_func op_0cbb_32_ff; +extern cpuop_func op_0cd0_32_nf; +extern cpuop_func op_0cd0_32_ff; +extern cpuop_func op_0cd8_32_nf; +extern cpuop_func op_0cd8_32_ff; +extern cpuop_func op_0ce0_32_nf; +extern cpuop_func op_0ce0_32_ff; +extern cpuop_func op_0ce8_32_nf; +extern cpuop_func op_0ce8_32_ff; +extern cpuop_func op_0cf0_32_nf; +extern cpuop_func op_0cf0_32_ff; +extern cpuop_func op_0cf8_32_nf; +extern cpuop_func op_0cf8_32_ff; +extern cpuop_func op_0cf9_32_nf; +extern cpuop_func op_0cf9_32_ff; +extern cpuop_func op_0cfc_32_nf; +extern cpuop_func op_0cfc_32_ff; +extern cpuop_func op_0e10_32_nf; +extern cpuop_func op_0e10_32_ff; +extern cpuop_func op_0e18_32_nf; +extern cpuop_func op_0e18_32_ff; +extern cpuop_func op_0e20_32_nf; +extern cpuop_func op_0e20_32_ff; +extern cpuop_func op_0e28_32_nf; +extern cpuop_func op_0e28_32_ff; +extern cpuop_func op_0e30_32_nf; +extern cpuop_func op_0e30_32_ff; +extern cpuop_func op_0e38_32_nf; +extern cpuop_func op_0e38_32_ff; +extern cpuop_func op_0e39_32_nf; +extern cpuop_func op_0e39_32_ff; +extern cpuop_func op_0e50_32_nf; +extern cpuop_func op_0e50_32_ff; +extern cpuop_func op_0e58_32_nf; +extern cpuop_func op_0e58_32_ff; +extern cpuop_func op_0e60_32_nf; +extern cpuop_func op_0e60_32_ff; +extern cpuop_func op_0e68_32_nf; +extern cpuop_func op_0e68_32_ff; +extern cpuop_func op_0e70_32_nf; +extern cpuop_func op_0e70_32_ff; +extern cpuop_func op_0e78_32_nf; +extern cpuop_func op_0e78_32_ff; +extern cpuop_func op_0e79_32_nf; +extern cpuop_func op_0e79_32_ff; +extern cpuop_func op_0e90_32_nf; +extern cpuop_func op_0e90_32_ff; +extern cpuop_func op_0e98_32_nf; +extern cpuop_func op_0e98_32_ff; +extern cpuop_func op_0ea0_32_nf; +extern cpuop_func op_0ea0_32_ff; +extern cpuop_func op_0ea8_32_nf; +extern cpuop_func op_0ea8_32_ff; +extern cpuop_func op_0eb0_32_nf; +extern cpuop_func op_0eb0_32_ff; +extern cpuop_func op_0eb8_32_nf; +extern cpuop_func op_0eb8_32_ff; +extern cpuop_func op_0eb9_32_nf; +extern cpuop_func op_0eb9_32_ff; +extern cpuop_func op_0ed0_32_nf; +extern cpuop_func op_0ed0_32_ff; +extern cpuop_func op_0ed8_32_nf; +extern cpuop_func op_0ed8_32_ff; +extern cpuop_func op_0ee0_32_nf; +extern cpuop_func op_0ee0_32_ff; +extern cpuop_func op_0ee8_32_nf; +extern cpuop_func op_0ee8_32_ff; +extern cpuop_func op_0ef0_32_nf; +extern cpuop_func op_0ef0_32_ff; +extern cpuop_func op_0ef8_32_nf; +extern cpuop_func op_0ef8_32_ff; +extern cpuop_func op_0ef9_32_nf; +extern cpuop_func op_0ef9_32_ff; +extern cpuop_func op_0efc_32_nf; +extern cpuop_func op_0efc_32_ff; +extern cpuop_func op_1000_32_nf; +extern cpuop_func op_1000_32_ff; +extern cpuop_func op_1010_32_nf; +extern cpuop_func op_1010_32_ff; +extern cpuop_func op_1018_32_nf; +extern cpuop_func op_1018_32_ff; +extern cpuop_func op_1020_32_nf; +extern cpuop_func op_1020_32_ff; +extern cpuop_func op_1028_32_nf; +extern cpuop_func op_1028_32_ff; +extern cpuop_func op_1030_32_nf; +extern cpuop_func op_1030_32_ff; +extern cpuop_func op_1038_32_nf; +extern cpuop_func op_1038_32_ff; +extern cpuop_func op_1039_32_nf; +extern cpuop_func op_1039_32_ff; +extern cpuop_func op_103a_32_nf; +extern cpuop_func op_103a_32_ff; +extern cpuop_func op_103b_32_nf; +extern cpuop_func op_103b_32_ff; +extern cpuop_func op_103c_32_nf; +extern cpuop_func op_103c_32_ff; +extern cpuop_func op_1080_32_nf; +extern cpuop_func op_1080_32_ff; +extern cpuop_func op_1090_32_nf; +extern cpuop_func op_1090_32_ff; +extern cpuop_func op_1098_32_nf; +extern cpuop_func op_1098_32_ff; +extern cpuop_func op_10a0_32_nf; +extern cpuop_func op_10a0_32_ff; +extern cpuop_func op_10a8_32_nf; +extern cpuop_func op_10a8_32_ff; +extern cpuop_func op_10b0_32_nf; +extern cpuop_func op_10b0_32_ff; +extern cpuop_func op_10b8_32_nf; +extern cpuop_func op_10b8_32_ff; +extern cpuop_func op_10b9_32_nf; +extern cpuop_func op_10b9_32_ff; +extern cpuop_func op_10ba_32_nf; +extern cpuop_func op_10ba_32_ff; +extern cpuop_func op_10bb_32_nf; +extern cpuop_func op_10bb_32_ff; +extern cpuop_func op_10bc_32_nf; +extern cpuop_func op_10bc_32_ff; +extern cpuop_func op_10c0_32_nf; +extern cpuop_func op_10c0_32_ff; +extern cpuop_func op_10d0_32_nf; +extern cpuop_func op_10d0_32_ff; +extern cpuop_func op_10d8_32_nf; +extern cpuop_func op_10d8_32_ff; +extern cpuop_func op_10e0_32_nf; +extern cpuop_func op_10e0_32_ff; +extern cpuop_func op_10e8_32_nf; +extern cpuop_func op_10e8_32_ff; +extern cpuop_func op_10f0_32_nf; +extern cpuop_func op_10f0_32_ff; +extern cpuop_func op_10f8_32_nf; +extern cpuop_func op_10f8_32_ff; +extern cpuop_func op_10f9_32_nf; +extern cpuop_func op_10f9_32_ff; +extern cpuop_func op_10fa_32_nf; +extern cpuop_func op_10fa_32_ff; +extern cpuop_func op_10fb_32_nf; +extern cpuop_func op_10fb_32_ff; +extern cpuop_func op_10fc_32_nf; +extern cpuop_func op_10fc_32_ff; +extern cpuop_func op_1100_32_nf; +extern cpuop_func op_1100_32_ff; +extern cpuop_func op_1110_32_nf; +extern cpuop_func op_1110_32_ff; +extern cpuop_func op_1118_32_nf; +extern cpuop_func op_1118_32_ff; +extern cpuop_func op_1120_32_nf; +extern cpuop_func op_1120_32_ff; +extern cpuop_func op_1128_32_nf; +extern cpuop_func op_1128_32_ff; +extern cpuop_func op_1130_32_nf; +extern cpuop_func op_1130_32_ff; +extern cpuop_func op_1138_32_nf; +extern cpuop_func op_1138_32_ff; +extern cpuop_func op_1139_32_nf; +extern cpuop_func op_1139_32_ff; +extern cpuop_func op_113a_32_nf; +extern cpuop_func op_113a_32_ff; +extern cpuop_func op_113b_32_nf; +extern cpuop_func op_113b_32_ff; +extern cpuop_func op_113c_32_nf; +extern cpuop_func op_113c_32_ff; +extern cpuop_func op_1140_32_nf; +extern cpuop_func op_1140_32_ff; +extern cpuop_func op_1150_32_nf; +extern cpuop_func op_1150_32_ff; +extern cpuop_func op_1158_32_nf; +extern cpuop_func op_1158_32_ff; +extern cpuop_func op_1160_32_nf; +extern cpuop_func op_1160_32_ff; +extern cpuop_func op_1168_32_nf; +extern cpuop_func op_1168_32_ff; +extern cpuop_func op_1170_32_nf; +extern cpuop_func op_1170_32_ff; +extern cpuop_func op_1178_32_nf; +extern cpuop_func op_1178_32_ff; +extern cpuop_func op_1179_32_nf; +extern cpuop_func op_1179_32_ff; +extern cpuop_func op_117a_32_nf; +extern cpuop_func op_117a_32_ff; +extern cpuop_func op_117b_32_nf; +extern cpuop_func op_117b_32_ff; +extern cpuop_func op_117c_32_nf; +extern cpuop_func op_117c_32_ff; +extern cpuop_func op_1180_32_nf; +extern cpuop_func op_1180_32_ff; +extern cpuop_func op_1190_32_nf; +extern cpuop_func op_1190_32_ff; +extern cpuop_func op_1198_32_nf; +extern cpuop_func op_1198_32_ff; +extern cpuop_func op_11a0_32_nf; +extern cpuop_func op_11a0_32_ff; +extern cpuop_func op_11a8_32_nf; +extern cpuop_func op_11a8_32_ff; +extern cpuop_func op_11b0_32_nf; +extern cpuop_func op_11b0_32_ff; +extern cpuop_func op_11b8_32_nf; +extern cpuop_func op_11b8_32_ff; +extern cpuop_func op_11b9_32_nf; +extern cpuop_func op_11b9_32_ff; +extern cpuop_func op_11ba_32_nf; +extern cpuop_func op_11ba_32_ff; +extern cpuop_func op_11bb_32_nf; +extern cpuop_func op_11bb_32_ff; +extern cpuop_func op_11bc_32_nf; +extern cpuop_func op_11bc_32_ff; +extern cpuop_func op_11c0_32_nf; +extern cpuop_func op_11c0_32_ff; +extern cpuop_func op_11d0_32_nf; +extern cpuop_func op_11d0_32_ff; +extern cpuop_func op_11d8_32_nf; +extern cpuop_func op_11d8_32_ff; +extern cpuop_func op_11e0_32_nf; +extern cpuop_func op_11e0_32_ff; +extern cpuop_func op_11e8_32_nf; +extern cpuop_func op_11e8_32_ff; +extern cpuop_func op_11f0_32_nf; +extern cpuop_func op_11f0_32_ff; +extern cpuop_func op_11f8_32_nf; +extern cpuop_func op_11f8_32_ff; +extern cpuop_func op_11f9_32_nf; +extern cpuop_func op_11f9_32_ff; +extern cpuop_func op_11fa_32_nf; +extern cpuop_func op_11fa_32_ff; +extern cpuop_func op_11fb_32_nf; +extern cpuop_func op_11fb_32_ff; +extern cpuop_func op_11fc_32_nf; +extern cpuop_func op_11fc_32_ff; +extern cpuop_func op_13c0_32_nf; +extern cpuop_func op_13c0_32_ff; +extern cpuop_func op_13d0_32_nf; +extern cpuop_func op_13d0_32_ff; +extern cpuop_func op_13d8_32_nf; +extern cpuop_func op_13d8_32_ff; +extern cpuop_func op_13e0_32_nf; +extern cpuop_func op_13e0_32_ff; +extern cpuop_func op_13e8_32_nf; +extern cpuop_func op_13e8_32_ff; +extern cpuop_func op_13f0_32_nf; +extern cpuop_func op_13f0_32_ff; +extern cpuop_func op_13f8_32_nf; +extern cpuop_func op_13f8_32_ff; +extern cpuop_func op_13f9_32_nf; +extern cpuop_func op_13f9_32_ff; +extern cpuop_func op_13fa_32_nf; +extern cpuop_func op_13fa_32_ff; +extern cpuop_func op_13fb_32_nf; +extern cpuop_func op_13fb_32_ff; +extern cpuop_func op_13fc_32_nf; +extern cpuop_func op_13fc_32_ff; +extern cpuop_func op_2000_32_nf; +extern cpuop_func op_2000_32_ff; +extern cpuop_func op_2008_32_nf; +extern cpuop_func op_2008_32_ff; +extern cpuop_func op_2010_32_nf; +extern cpuop_func op_2010_32_ff; +extern cpuop_func op_2018_32_nf; +extern cpuop_func op_2018_32_ff; +extern cpuop_func op_2020_32_nf; +extern cpuop_func op_2020_32_ff; +extern cpuop_func op_2028_32_nf; +extern cpuop_func op_2028_32_ff; +extern cpuop_func op_2030_32_nf; +extern cpuop_func op_2030_32_ff; +extern cpuop_func op_2038_32_nf; +extern cpuop_func op_2038_32_ff; +extern cpuop_func op_2039_32_nf; +extern cpuop_func op_2039_32_ff; +extern cpuop_func op_203a_32_nf; +extern cpuop_func op_203a_32_ff; +extern cpuop_func op_203b_32_nf; +extern cpuop_func op_203b_32_ff; +extern cpuop_func op_203c_32_nf; +extern cpuop_func op_203c_32_ff; +extern cpuop_func op_2040_32_nf; +extern cpuop_func op_2040_32_ff; +extern cpuop_func op_2048_32_nf; +extern cpuop_func op_2048_32_ff; +extern cpuop_func op_2050_32_nf; +extern cpuop_func op_2050_32_ff; +extern cpuop_func op_2058_32_nf; +extern cpuop_func op_2058_32_ff; +extern cpuop_func op_2060_32_nf; +extern cpuop_func op_2060_32_ff; +extern cpuop_func op_2068_32_nf; +extern cpuop_func op_2068_32_ff; +extern cpuop_func op_2070_32_nf; +extern cpuop_func op_2070_32_ff; +extern cpuop_func op_2078_32_nf; +extern cpuop_func op_2078_32_ff; +extern cpuop_func op_2079_32_nf; +extern cpuop_func op_2079_32_ff; +extern cpuop_func op_207a_32_nf; +extern cpuop_func op_207a_32_ff; +extern cpuop_func op_207b_32_nf; +extern cpuop_func op_207b_32_ff; +extern cpuop_func op_207c_32_nf; +extern cpuop_func op_207c_32_ff; +extern cpuop_func op_2080_32_nf; +extern cpuop_func op_2080_32_ff; +extern cpuop_func op_2088_32_nf; +extern cpuop_func op_2088_32_ff; +extern cpuop_func op_2090_32_nf; +extern cpuop_func op_2090_32_ff; +extern cpuop_func op_2098_32_nf; +extern cpuop_func op_2098_32_ff; +extern cpuop_func op_20a0_32_nf; +extern cpuop_func op_20a0_32_ff; +extern cpuop_func op_20a8_32_nf; +extern cpuop_func op_20a8_32_ff; +extern cpuop_func op_20b0_32_nf; +extern cpuop_func op_20b0_32_ff; +extern cpuop_func op_20b8_32_nf; +extern cpuop_func op_20b8_32_ff; +extern cpuop_func op_20b9_32_nf; +extern cpuop_func op_20b9_32_ff; +extern cpuop_func op_20ba_32_nf; +extern cpuop_func op_20ba_32_ff; +extern cpuop_func op_20bb_32_nf; +extern cpuop_func op_20bb_32_ff; +extern cpuop_func op_20bc_32_nf; +extern cpuop_func op_20bc_32_ff; +extern cpuop_func op_20c0_32_nf; +extern cpuop_func op_20c0_32_ff; +extern cpuop_func op_20c8_32_nf; +extern cpuop_func op_20c8_32_ff; +extern cpuop_func op_20d0_32_nf; +extern cpuop_func op_20d0_32_ff; +extern cpuop_func op_20d8_32_nf; +extern cpuop_func op_20d8_32_ff; +extern cpuop_func op_20e0_32_nf; +extern cpuop_func op_20e0_32_ff; +extern cpuop_func op_20e8_32_nf; +extern cpuop_func op_20e8_32_ff; +extern cpuop_func op_20f0_32_nf; +extern cpuop_func op_20f0_32_ff; +extern cpuop_func op_20f8_32_nf; +extern cpuop_func op_20f8_32_ff; +extern cpuop_func op_20f9_32_nf; +extern cpuop_func op_20f9_32_ff; +extern cpuop_func op_20fa_32_nf; +extern cpuop_func op_20fa_32_ff; +extern cpuop_func op_20fb_32_nf; +extern cpuop_func op_20fb_32_ff; +extern cpuop_func op_20fc_32_nf; +extern cpuop_func op_20fc_32_ff; +extern cpuop_func op_2100_32_nf; +extern cpuop_func op_2100_32_ff; +extern cpuop_func op_2108_32_nf; +extern cpuop_func op_2108_32_ff; +extern cpuop_func op_2110_32_nf; +extern cpuop_func op_2110_32_ff; +extern cpuop_func op_2118_32_nf; +extern cpuop_func op_2118_32_ff; +extern cpuop_func op_2120_32_nf; +extern cpuop_func op_2120_32_ff; +extern cpuop_func op_2128_32_nf; +extern cpuop_func op_2128_32_ff; +extern cpuop_func op_2130_32_nf; +extern cpuop_func op_2130_32_ff; +extern cpuop_func op_2138_32_nf; +extern cpuop_func op_2138_32_ff; +extern cpuop_func op_2139_32_nf; +extern cpuop_func op_2139_32_ff; +extern cpuop_func op_213a_32_nf; +extern cpuop_func op_213a_32_ff; +extern cpuop_func op_213b_32_nf; +extern cpuop_func op_213b_32_ff; +extern cpuop_func op_213c_32_nf; +extern cpuop_func op_213c_32_ff; +extern cpuop_func op_2140_32_nf; +extern cpuop_func op_2140_32_ff; +extern cpuop_func op_2148_32_nf; +extern cpuop_func op_2148_32_ff; +extern cpuop_func op_2150_32_nf; +extern cpuop_func op_2150_32_ff; +extern cpuop_func op_2158_32_nf; +extern cpuop_func op_2158_32_ff; +extern cpuop_func op_2160_32_nf; +extern cpuop_func op_2160_32_ff; +extern cpuop_func op_2168_32_nf; +extern cpuop_func op_2168_32_ff; +extern cpuop_func op_2170_32_nf; +extern cpuop_func op_2170_32_ff; +extern cpuop_func op_2178_32_nf; +extern cpuop_func op_2178_32_ff; +extern cpuop_func op_2179_32_nf; +extern cpuop_func op_2179_32_ff; +extern cpuop_func op_217a_32_nf; +extern cpuop_func op_217a_32_ff; +extern cpuop_func op_217b_32_nf; +extern cpuop_func op_217b_32_ff; +extern cpuop_func op_217c_32_nf; +extern cpuop_func op_217c_32_ff; +extern cpuop_func op_2180_32_nf; +extern cpuop_func op_2180_32_ff; +extern cpuop_func op_2188_32_nf; +extern cpuop_func op_2188_32_ff; +extern cpuop_func op_2190_32_nf; +extern cpuop_func op_2190_32_ff; +extern cpuop_func op_2198_32_nf; +extern cpuop_func op_2198_32_ff; +extern cpuop_func op_21a0_32_nf; +extern cpuop_func op_21a0_32_ff; +extern cpuop_func op_21a8_32_nf; +extern cpuop_func op_21a8_32_ff; +extern cpuop_func op_21b0_32_nf; +extern cpuop_func op_21b0_32_ff; +extern cpuop_func op_21b8_32_nf; +extern cpuop_func op_21b8_32_ff; +extern cpuop_func op_21b9_32_nf; +extern cpuop_func op_21b9_32_ff; +extern cpuop_func op_21ba_32_nf; +extern cpuop_func op_21ba_32_ff; +extern cpuop_func op_21bb_32_nf; +extern cpuop_func op_21bb_32_ff; +extern cpuop_func op_21bc_32_nf; +extern cpuop_func op_21bc_32_ff; +extern cpuop_func op_21c0_32_nf; +extern cpuop_func op_21c0_32_ff; +extern cpuop_func op_21c8_32_nf; +extern cpuop_func op_21c8_32_ff; +extern cpuop_func op_21d0_32_nf; +extern cpuop_func op_21d0_32_ff; +extern cpuop_func op_21d8_32_nf; +extern cpuop_func op_21d8_32_ff; +extern cpuop_func op_21e0_32_nf; +extern cpuop_func op_21e0_32_ff; +extern cpuop_func op_21e8_32_nf; +extern cpuop_func op_21e8_32_ff; +extern cpuop_func op_21f0_32_nf; +extern cpuop_func op_21f0_32_ff; +extern cpuop_func op_21f8_32_nf; +extern cpuop_func op_21f8_32_ff; +extern cpuop_func op_21f9_32_nf; +extern cpuop_func op_21f9_32_ff; +extern cpuop_func op_21fa_32_nf; +extern cpuop_func op_21fa_32_ff; +extern cpuop_func op_21fb_32_nf; +extern cpuop_func op_21fb_32_ff; +extern cpuop_func op_21fc_32_nf; +extern cpuop_func op_21fc_32_ff; +extern cpuop_func op_23c0_32_nf; +extern cpuop_func op_23c0_32_ff; +extern cpuop_func op_23c8_32_nf; +extern cpuop_func op_23c8_32_ff; +extern cpuop_func op_23d0_32_nf; +extern cpuop_func op_23d0_32_ff; +extern cpuop_func op_23d8_32_nf; +extern cpuop_func op_23d8_32_ff; +extern cpuop_func op_23e0_32_nf; +extern cpuop_func op_23e0_32_ff; +extern cpuop_func op_23e8_32_nf; +extern cpuop_func op_23e8_32_ff; +extern cpuop_func op_23f0_32_nf; +extern cpuop_func op_23f0_32_ff; +extern cpuop_func op_23f8_32_nf; +extern cpuop_func op_23f8_32_ff; +extern cpuop_func op_23f9_32_nf; +extern cpuop_func op_23f9_32_ff; +extern cpuop_func op_23fa_32_nf; +extern cpuop_func op_23fa_32_ff; +extern cpuop_func op_23fb_32_nf; +extern cpuop_func op_23fb_32_ff; +extern cpuop_func op_23fc_32_nf; +extern cpuop_func op_23fc_32_ff; +extern cpuop_func op_3000_32_nf; +extern cpuop_func op_3000_32_ff; +extern cpuop_func op_3008_32_nf; +extern cpuop_func op_3008_32_ff; +extern cpuop_func op_3010_32_nf; +extern cpuop_func op_3010_32_ff; +extern cpuop_func op_3018_32_nf; +extern cpuop_func op_3018_32_ff; +extern cpuop_func op_3020_32_nf; +extern cpuop_func op_3020_32_ff; +extern cpuop_func op_3028_32_nf; +extern cpuop_func op_3028_32_ff; +extern cpuop_func op_3030_32_nf; +extern cpuop_func op_3030_32_ff; +extern cpuop_func op_3038_32_nf; +extern cpuop_func op_3038_32_ff; +extern cpuop_func op_3039_32_nf; +extern cpuop_func op_3039_32_ff; +extern cpuop_func op_303a_32_nf; +extern cpuop_func op_303a_32_ff; +extern cpuop_func op_303b_32_nf; +extern cpuop_func op_303b_32_ff; +extern cpuop_func op_303c_32_nf; +extern cpuop_func op_303c_32_ff; +extern cpuop_func op_3040_32_nf; +extern cpuop_func op_3040_32_ff; +extern cpuop_func op_3048_32_nf; +extern cpuop_func op_3048_32_ff; +extern cpuop_func op_3050_32_nf; +extern cpuop_func op_3050_32_ff; +extern cpuop_func op_3058_32_nf; +extern cpuop_func op_3058_32_ff; +extern cpuop_func op_3060_32_nf; +extern cpuop_func op_3060_32_ff; +extern cpuop_func op_3068_32_nf; +extern cpuop_func op_3068_32_ff; +extern cpuop_func op_3070_32_nf; +extern cpuop_func op_3070_32_ff; +extern cpuop_func op_3078_32_nf; +extern cpuop_func op_3078_32_ff; +extern cpuop_func op_3079_32_nf; +extern cpuop_func op_3079_32_ff; +extern cpuop_func op_307a_32_nf; +extern cpuop_func op_307a_32_ff; +extern cpuop_func op_307b_32_nf; +extern cpuop_func op_307b_32_ff; +extern cpuop_func op_307c_32_nf; +extern cpuop_func op_307c_32_ff; +extern cpuop_func op_3080_32_nf; +extern cpuop_func op_3080_32_ff; +extern cpuop_func op_3088_32_nf; +extern cpuop_func op_3088_32_ff; +extern cpuop_func op_3090_32_nf; +extern cpuop_func op_3090_32_ff; +extern cpuop_func op_3098_32_nf; +extern cpuop_func op_3098_32_ff; +extern cpuop_func op_30a0_32_nf; +extern cpuop_func op_30a0_32_ff; +extern cpuop_func op_30a8_32_nf; +extern cpuop_func op_30a8_32_ff; +extern cpuop_func op_30b0_32_nf; +extern cpuop_func op_30b0_32_ff; +extern cpuop_func op_30b8_32_nf; +extern cpuop_func op_30b8_32_ff; +extern cpuop_func op_30b9_32_nf; +extern cpuop_func op_30b9_32_ff; +extern cpuop_func op_30ba_32_nf; +extern cpuop_func op_30ba_32_ff; +extern cpuop_func op_30bb_32_nf; +extern cpuop_func op_30bb_32_ff; +extern cpuop_func op_30bc_32_nf; +extern cpuop_func op_30bc_32_ff; +extern cpuop_func op_30c0_32_nf; +extern cpuop_func op_30c0_32_ff; +extern cpuop_func op_30c8_32_nf; +extern cpuop_func op_30c8_32_ff; +extern cpuop_func op_30d0_32_nf; +extern cpuop_func op_30d0_32_ff; +extern cpuop_func op_30d8_32_nf; +extern cpuop_func op_30d8_32_ff; +extern cpuop_func op_30e0_32_nf; +extern cpuop_func op_30e0_32_ff; +extern cpuop_func op_30e8_32_nf; +extern cpuop_func op_30e8_32_ff; +extern cpuop_func op_30f0_32_nf; +extern cpuop_func op_30f0_32_ff; +extern cpuop_func op_30f8_32_nf; +extern cpuop_func op_30f8_32_ff; +extern cpuop_func op_30f9_32_nf; +extern cpuop_func op_30f9_32_ff; +extern cpuop_func op_30fa_32_nf; +extern cpuop_func op_30fa_32_ff; +extern cpuop_func op_30fb_32_nf; +extern cpuop_func op_30fb_32_ff; +extern cpuop_func op_30fc_32_nf; +extern cpuop_func op_30fc_32_ff; +extern cpuop_func op_3100_32_nf; +extern cpuop_func op_3100_32_ff; +extern cpuop_func op_3108_32_nf; +extern cpuop_func op_3108_32_ff; +extern cpuop_func op_3110_32_nf; +extern cpuop_func op_3110_32_ff; +extern cpuop_func op_3118_32_nf; +extern cpuop_func op_3118_32_ff; +extern cpuop_func op_3120_32_nf; +extern cpuop_func op_3120_32_ff; +extern cpuop_func op_3128_32_nf; +extern cpuop_func op_3128_32_ff; +extern cpuop_func op_3130_32_nf; +extern cpuop_func op_3130_32_ff; +extern cpuop_func op_3138_32_nf; +extern cpuop_func op_3138_32_ff; +extern cpuop_func op_3139_32_nf; +extern cpuop_func op_3139_32_ff; +extern cpuop_func op_313a_32_nf; +extern cpuop_func op_313a_32_ff; +extern cpuop_func op_313b_32_nf; +extern cpuop_func op_313b_32_ff; +extern cpuop_func op_313c_32_nf; +extern cpuop_func op_313c_32_ff; +extern cpuop_func op_3140_32_nf; +extern cpuop_func op_3140_32_ff; +extern cpuop_func op_3148_32_nf; +extern cpuop_func op_3148_32_ff; +extern cpuop_func op_3150_32_nf; +extern cpuop_func op_3150_32_ff; +extern cpuop_func op_3158_32_nf; +extern cpuop_func op_3158_32_ff; +extern cpuop_func op_3160_32_nf; +extern cpuop_func op_3160_32_ff; +extern cpuop_func op_3168_32_nf; +extern cpuop_func op_3168_32_ff; +extern cpuop_func op_3170_32_nf; +extern cpuop_func op_3170_32_ff; +extern cpuop_func op_3178_32_nf; +extern cpuop_func op_3178_32_ff; +extern cpuop_func op_3179_32_nf; +extern cpuop_func op_3179_32_ff; +extern cpuop_func op_317a_32_nf; +extern cpuop_func op_317a_32_ff; +extern cpuop_func op_317b_32_nf; +extern cpuop_func op_317b_32_ff; +extern cpuop_func op_317c_32_nf; +extern cpuop_func op_317c_32_ff; +extern cpuop_func op_3180_32_nf; +extern cpuop_func op_3180_32_ff; +extern cpuop_func op_3188_32_nf; +extern cpuop_func op_3188_32_ff; +extern cpuop_func op_3190_32_nf; +extern cpuop_func op_3190_32_ff; +extern cpuop_func op_3198_32_nf; +extern cpuop_func op_3198_32_ff; +extern cpuop_func op_31a0_32_nf; +extern cpuop_func op_31a0_32_ff; +extern cpuop_func op_31a8_32_nf; +extern cpuop_func op_31a8_32_ff; +extern cpuop_func op_31b0_32_nf; +extern cpuop_func op_31b0_32_ff; +extern cpuop_func op_31b8_32_nf; +extern cpuop_func op_31b8_32_ff; +extern cpuop_func op_31b9_32_nf; +extern cpuop_func op_31b9_32_ff; +extern cpuop_func op_31ba_32_nf; +extern cpuop_func op_31ba_32_ff; +extern cpuop_func op_31bb_32_nf; +extern cpuop_func op_31bb_32_ff; +extern cpuop_func op_31bc_32_nf; +extern cpuop_func op_31bc_32_ff; +extern cpuop_func op_31c0_32_nf; +extern cpuop_func op_31c0_32_ff; +extern cpuop_func op_31c8_32_nf; +extern cpuop_func op_31c8_32_ff; +extern cpuop_func op_31d0_32_nf; +extern cpuop_func op_31d0_32_ff; +extern cpuop_func op_31d8_32_nf; +extern cpuop_func op_31d8_32_ff; +extern cpuop_func op_31e0_32_nf; +extern cpuop_func op_31e0_32_ff; +extern cpuop_func op_31e8_32_nf; +extern cpuop_func op_31e8_32_ff; +extern cpuop_func op_31f0_32_nf; +extern cpuop_func op_31f0_32_ff; +extern cpuop_func op_31f8_32_nf; +extern cpuop_func op_31f8_32_ff; +extern cpuop_func op_31f9_32_nf; +extern cpuop_func op_31f9_32_ff; +extern cpuop_func op_31fa_32_nf; +extern cpuop_func op_31fa_32_ff; +extern cpuop_func op_31fb_32_nf; +extern cpuop_func op_31fb_32_ff; +extern cpuop_func op_31fc_32_nf; +extern cpuop_func op_31fc_32_ff; +extern cpuop_func op_33c0_32_nf; +extern cpuop_func op_33c0_32_ff; +extern cpuop_func op_33c8_32_nf; +extern cpuop_func op_33c8_32_ff; +extern cpuop_func op_33d0_32_nf; +extern cpuop_func op_33d0_32_ff; +extern cpuop_func op_33d8_32_nf; +extern cpuop_func op_33d8_32_ff; +extern cpuop_func op_33e0_32_nf; +extern cpuop_func op_33e0_32_ff; +extern cpuop_func op_33e8_32_nf; +extern cpuop_func op_33e8_32_ff; +extern cpuop_func op_33f0_32_nf; +extern cpuop_func op_33f0_32_ff; +extern cpuop_func op_33f8_32_nf; +extern cpuop_func op_33f8_32_ff; +extern cpuop_func op_33f9_32_nf; +extern cpuop_func op_33f9_32_ff; +extern cpuop_func op_33fa_32_nf; +extern cpuop_func op_33fa_32_ff; +extern cpuop_func op_33fb_32_nf; +extern cpuop_func op_33fb_32_ff; +extern cpuop_func op_33fc_32_nf; +extern cpuop_func op_33fc_32_ff; +extern cpuop_func op_4000_32_nf; +extern cpuop_func op_4000_32_ff; +extern cpuop_func op_4010_32_nf; +extern cpuop_func op_4010_32_ff; +extern cpuop_func op_4018_32_nf; +extern cpuop_func op_4018_32_ff; +extern cpuop_func op_4020_32_nf; +extern cpuop_func op_4020_32_ff; +extern cpuop_func op_4028_32_nf; +extern cpuop_func op_4028_32_ff; +extern cpuop_func op_4030_32_nf; +extern cpuop_func op_4030_32_ff; +extern cpuop_func op_4038_32_nf; +extern cpuop_func op_4038_32_ff; +extern cpuop_func op_4039_32_nf; +extern cpuop_func op_4039_32_ff; +extern cpuop_func op_4040_32_nf; +extern cpuop_func op_4040_32_ff; +extern cpuop_func op_4050_32_nf; +extern cpuop_func op_4050_32_ff; +extern cpuop_func op_4058_32_nf; +extern cpuop_func op_4058_32_ff; +extern cpuop_func op_4060_32_nf; +extern cpuop_func op_4060_32_ff; +extern cpuop_func op_4068_32_nf; +extern cpuop_func op_4068_32_ff; +extern cpuop_func op_4070_32_nf; +extern cpuop_func op_4070_32_ff; +extern cpuop_func op_4078_32_nf; +extern cpuop_func op_4078_32_ff; +extern cpuop_func op_4079_32_nf; +extern cpuop_func op_4079_32_ff; +extern cpuop_func op_4080_32_nf; +extern cpuop_func op_4080_32_ff; +extern cpuop_func op_4090_32_nf; +extern cpuop_func op_4090_32_ff; +extern cpuop_func op_4098_32_nf; +extern cpuop_func op_4098_32_ff; +extern cpuop_func op_40a0_32_nf; +extern cpuop_func op_40a0_32_ff; +extern cpuop_func op_40a8_32_nf; +extern cpuop_func op_40a8_32_ff; +extern cpuop_func op_40b0_32_nf; +extern cpuop_func op_40b0_32_ff; +extern cpuop_func op_40b8_32_nf; +extern cpuop_func op_40b8_32_ff; +extern cpuop_func op_40b9_32_nf; +extern cpuop_func op_40b9_32_ff; +extern cpuop_func op_40c0_32_nf; +extern cpuop_func op_40c0_32_ff; +extern cpuop_func op_40d0_32_nf; +extern cpuop_func op_40d0_32_ff; +extern cpuop_func op_40d8_32_nf; +extern cpuop_func op_40d8_32_ff; +extern cpuop_func op_40e0_32_nf; +extern cpuop_func op_40e0_32_ff; +extern cpuop_func op_40e8_32_nf; +extern cpuop_func op_40e8_32_ff; +extern cpuop_func op_40f0_32_nf; +extern cpuop_func op_40f0_32_ff; +extern cpuop_func op_40f8_32_nf; +extern cpuop_func op_40f8_32_ff; +extern cpuop_func op_40f9_32_nf; +extern cpuop_func op_40f9_32_ff; +extern cpuop_func op_4100_32_nf; +extern cpuop_func op_4100_32_ff; +extern cpuop_func op_4110_32_nf; +extern cpuop_func op_4110_32_ff; +extern cpuop_func op_4118_32_nf; +extern cpuop_func op_4118_32_ff; +extern cpuop_func op_4120_32_nf; +extern cpuop_func op_4120_32_ff; +extern cpuop_func op_4128_32_nf; +extern cpuop_func op_4128_32_ff; +extern cpuop_func op_4130_32_nf; +extern cpuop_func op_4130_32_ff; +extern cpuop_func op_4138_32_nf; +extern cpuop_func op_4138_32_ff; +extern cpuop_func op_4139_32_nf; +extern cpuop_func op_4139_32_ff; +extern cpuop_func op_413a_32_nf; +extern cpuop_func op_413a_32_ff; +extern cpuop_func op_413b_32_nf; +extern cpuop_func op_413b_32_ff; +extern cpuop_func op_413c_32_nf; +extern cpuop_func op_413c_32_ff; +extern cpuop_func op_4180_32_nf; +extern cpuop_func op_4180_32_ff; +extern cpuop_func op_4190_32_nf; +extern cpuop_func op_4190_32_ff; +extern cpuop_func op_4198_32_nf; +extern cpuop_func op_4198_32_ff; +extern cpuop_func op_41a0_32_nf; +extern cpuop_func op_41a0_32_ff; +extern cpuop_func op_41a8_32_nf; +extern cpuop_func op_41a8_32_ff; +extern cpuop_func op_41b0_32_nf; +extern cpuop_func op_41b0_32_ff; +extern cpuop_func op_41b8_32_nf; +extern cpuop_func op_41b8_32_ff; +extern cpuop_func op_41b9_32_nf; +extern cpuop_func op_41b9_32_ff; +extern cpuop_func op_41ba_32_nf; +extern cpuop_func op_41ba_32_ff; +extern cpuop_func op_41bb_32_nf; +extern cpuop_func op_41bb_32_ff; +extern cpuop_func op_41bc_32_nf; +extern cpuop_func op_41bc_32_ff; +extern cpuop_func op_41d0_32_nf; +extern cpuop_func op_41d0_32_ff; +extern cpuop_func op_41e8_32_nf; +extern cpuop_func op_41e8_32_ff; +extern cpuop_func op_41f0_32_nf; +extern cpuop_func op_41f0_32_ff; +extern cpuop_func op_41f8_32_nf; +extern cpuop_func op_41f8_32_ff; +extern cpuop_func op_41f9_32_nf; +extern cpuop_func op_41f9_32_ff; +extern cpuop_func op_41fa_32_nf; +extern cpuop_func op_41fa_32_ff; +extern cpuop_func op_41fb_32_nf; +extern cpuop_func op_41fb_32_ff; +extern cpuop_func op_4200_32_nf; +extern cpuop_func op_4200_32_ff; +extern cpuop_func op_4210_32_nf; +extern cpuop_func op_4210_32_ff; +extern cpuop_func op_4218_32_nf; +extern cpuop_func op_4218_32_ff; +extern cpuop_func op_4220_32_nf; +extern cpuop_func op_4220_32_ff; +extern cpuop_func op_4228_32_nf; +extern cpuop_func op_4228_32_ff; +extern cpuop_func op_4230_32_nf; +extern cpuop_func op_4230_32_ff; +extern cpuop_func op_4238_32_nf; +extern cpuop_func op_4238_32_ff; +extern cpuop_func op_4239_32_nf; +extern cpuop_func op_4239_32_ff; +extern cpuop_func op_4240_32_nf; +extern cpuop_func op_4240_32_ff; +extern cpuop_func op_4250_32_nf; +extern cpuop_func op_4250_32_ff; +extern cpuop_func op_4258_32_nf; +extern cpuop_func op_4258_32_ff; +extern cpuop_func op_4260_32_nf; +extern cpuop_func op_4260_32_ff; +extern cpuop_func op_4268_32_nf; +extern cpuop_func op_4268_32_ff; +extern cpuop_func op_4270_32_nf; +extern cpuop_func op_4270_32_ff; +extern cpuop_func op_4278_32_nf; +extern cpuop_func op_4278_32_ff; +extern cpuop_func op_4279_32_nf; +extern cpuop_func op_4279_32_ff; +extern cpuop_func op_4280_32_nf; +extern cpuop_func op_4280_32_ff; +extern cpuop_func op_4290_32_nf; +extern cpuop_func op_4290_32_ff; +extern cpuop_func op_4298_32_nf; +extern cpuop_func op_4298_32_ff; +extern cpuop_func op_42a0_32_nf; +extern cpuop_func op_42a0_32_ff; +extern cpuop_func op_42a8_32_nf; +extern cpuop_func op_42a8_32_ff; +extern cpuop_func op_42b0_32_nf; +extern cpuop_func op_42b0_32_ff; +extern cpuop_func op_42b8_32_nf; +extern cpuop_func op_42b8_32_ff; +extern cpuop_func op_42b9_32_nf; +extern cpuop_func op_42b9_32_ff; +extern cpuop_func op_42c0_32_nf; +extern cpuop_func op_42c0_32_ff; +extern cpuop_func op_42d0_32_nf; +extern cpuop_func op_42d0_32_ff; +extern cpuop_func op_42d8_32_nf; +extern cpuop_func op_42d8_32_ff; +extern cpuop_func op_42e0_32_nf; +extern cpuop_func op_42e0_32_ff; +extern cpuop_func op_42e8_32_nf; +extern cpuop_func op_42e8_32_ff; +extern cpuop_func op_42f0_32_nf; +extern cpuop_func op_42f0_32_ff; +extern cpuop_func op_42f8_32_nf; +extern cpuop_func op_42f8_32_ff; +extern cpuop_func op_42f9_32_nf; +extern cpuop_func op_42f9_32_ff; +extern cpuop_func op_4400_32_nf; +extern cpuop_func op_4400_32_ff; +extern cpuop_func op_4410_32_nf; +extern cpuop_func op_4410_32_ff; +extern cpuop_func op_4418_32_nf; +extern cpuop_func op_4418_32_ff; +extern cpuop_func op_4420_32_nf; +extern cpuop_func op_4420_32_ff; +extern cpuop_func op_4428_32_nf; +extern cpuop_func op_4428_32_ff; +extern cpuop_func op_4430_32_nf; +extern cpuop_func op_4430_32_ff; +extern cpuop_func op_4438_32_nf; +extern cpuop_func op_4438_32_ff; +extern cpuop_func op_4439_32_nf; +extern cpuop_func op_4439_32_ff; +extern cpuop_func op_4440_32_nf; +extern cpuop_func op_4440_32_ff; +extern cpuop_func op_4450_32_nf; +extern cpuop_func op_4450_32_ff; +extern cpuop_func op_4458_32_nf; +extern cpuop_func op_4458_32_ff; +extern cpuop_func op_4460_32_nf; +extern cpuop_func op_4460_32_ff; +extern cpuop_func op_4468_32_nf; +extern cpuop_func op_4468_32_ff; +extern cpuop_func op_4470_32_nf; +extern cpuop_func op_4470_32_ff; +extern cpuop_func op_4478_32_nf; +extern cpuop_func op_4478_32_ff; +extern cpuop_func op_4479_32_nf; +extern cpuop_func op_4479_32_ff; +extern cpuop_func op_4480_32_nf; +extern cpuop_func op_4480_32_ff; +extern cpuop_func op_4490_32_nf; +extern cpuop_func op_4490_32_ff; +extern cpuop_func op_4498_32_nf; +extern cpuop_func op_4498_32_ff; +extern cpuop_func op_44a0_32_nf; +extern cpuop_func op_44a0_32_ff; +extern cpuop_func op_44a8_32_nf; +extern cpuop_func op_44a8_32_ff; +extern cpuop_func op_44b0_32_nf; +extern cpuop_func op_44b0_32_ff; +extern cpuop_func op_44b8_32_nf; +extern cpuop_func op_44b8_32_ff; +extern cpuop_func op_44b9_32_nf; +extern cpuop_func op_44b9_32_ff; +extern cpuop_func op_44c0_32_nf; +extern cpuop_func op_44c0_32_ff; +extern cpuop_func op_44d0_32_nf; +extern cpuop_func op_44d0_32_ff; +extern cpuop_func op_44d8_32_nf; +extern cpuop_func op_44d8_32_ff; +extern cpuop_func op_44e0_32_nf; +extern cpuop_func op_44e0_32_ff; +extern cpuop_func op_44e8_32_nf; +extern cpuop_func op_44e8_32_ff; +extern cpuop_func op_44f0_32_nf; +extern cpuop_func op_44f0_32_ff; +extern cpuop_func op_44f8_32_nf; +extern cpuop_func op_44f8_32_ff; +extern cpuop_func op_44f9_32_nf; +extern cpuop_func op_44f9_32_ff; +extern cpuop_func op_44fa_32_nf; +extern cpuop_func op_44fa_32_ff; +extern cpuop_func op_44fb_32_nf; +extern cpuop_func op_44fb_32_ff; +extern cpuop_func op_44fc_32_nf; +extern cpuop_func op_44fc_32_ff; +extern cpuop_func op_4600_32_nf; +extern cpuop_func op_4600_32_ff; +extern cpuop_func op_4610_32_nf; +extern cpuop_func op_4610_32_ff; +extern cpuop_func op_4618_32_nf; +extern cpuop_func op_4618_32_ff; +extern cpuop_func op_4620_32_nf; +extern cpuop_func op_4620_32_ff; +extern cpuop_func op_4628_32_nf; +extern cpuop_func op_4628_32_ff; +extern cpuop_func op_4630_32_nf; +extern cpuop_func op_4630_32_ff; +extern cpuop_func op_4638_32_nf; +extern cpuop_func op_4638_32_ff; +extern cpuop_func op_4639_32_nf; +extern cpuop_func op_4639_32_ff; +extern cpuop_func op_4640_32_nf; +extern cpuop_func op_4640_32_ff; +extern cpuop_func op_4650_32_nf; +extern cpuop_func op_4650_32_ff; +extern cpuop_func op_4658_32_nf; +extern cpuop_func op_4658_32_ff; +extern cpuop_func op_4660_32_nf; +extern cpuop_func op_4660_32_ff; +extern cpuop_func op_4668_32_nf; +extern cpuop_func op_4668_32_ff; +extern cpuop_func op_4670_32_nf; +extern cpuop_func op_4670_32_ff; +extern cpuop_func op_4678_32_nf; +extern cpuop_func op_4678_32_ff; +extern cpuop_func op_4679_32_nf; +extern cpuop_func op_4679_32_ff; +extern cpuop_func op_4680_32_nf; +extern cpuop_func op_4680_32_ff; +extern cpuop_func op_4690_32_nf; +extern cpuop_func op_4690_32_ff; +extern cpuop_func op_4698_32_nf; +extern cpuop_func op_4698_32_ff; +extern cpuop_func op_46a0_32_nf; +extern cpuop_func op_46a0_32_ff; +extern cpuop_func op_46a8_32_nf; +extern cpuop_func op_46a8_32_ff; +extern cpuop_func op_46b0_32_nf; +extern cpuop_func op_46b0_32_ff; +extern cpuop_func op_46b8_32_nf; +extern cpuop_func op_46b8_32_ff; +extern cpuop_func op_46b9_32_nf; +extern cpuop_func op_46b9_32_ff; +extern cpuop_func op_46c0_32_nf; +extern cpuop_func op_46c0_32_ff; +extern cpuop_func op_46d0_32_nf; +extern cpuop_func op_46d0_32_ff; +extern cpuop_func op_46d8_32_nf; +extern cpuop_func op_46d8_32_ff; +extern cpuop_func op_46e0_32_nf; +extern cpuop_func op_46e0_32_ff; +extern cpuop_func op_46e8_32_nf; +extern cpuop_func op_46e8_32_ff; +extern cpuop_func op_46f0_32_nf; +extern cpuop_func op_46f0_32_ff; +extern cpuop_func op_46f8_32_nf; +extern cpuop_func op_46f8_32_ff; +extern cpuop_func op_46f9_32_nf; +extern cpuop_func op_46f9_32_ff; +extern cpuop_func op_46fa_32_nf; +extern cpuop_func op_46fa_32_ff; +extern cpuop_func op_46fb_32_nf; +extern cpuop_func op_46fb_32_ff; +extern cpuop_func op_46fc_32_nf; +extern cpuop_func op_46fc_32_ff; +extern cpuop_func op_4800_32_nf; +extern cpuop_func op_4800_32_ff; +extern cpuop_func op_4808_32_nf; +extern cpuop_func op_4808_32_ff; +extern cpuop_func op_4810_32_nf; +extern cpuop_func op_4810_32_ff; +extern cpuop_func op_4818_32_nf; +extern cpuop_func op_4818_32_ff; +extern cpuop_func op_4820_32_nf; +extern cpuop_func op_4820_32_ff; +extern cpuop_func op_4828_32_nf; +extern cpuop_func op_4828_32_ff; +extern cpuop_func op_4830_32_nf; +extern cpuop_func op_4830_32_ff; +extern cpuop_func op_4838_32_nf; +extern cpuop_func op_4838_32_ff; +extern cpuop_func op_4839_32_nf; +extern cpuop_func op_4839_32_ff; +extern cpuop_func op_4840_32_nf; +extern cpuop_func op_4840_32_ff; +extern cpuop_func op_4848_32_nf; +extern cpuop_func op_4848_32_ff; +extern cpuop_func op_4850_32_nf; +extern cpuop_func op_4850_32_ff; +extern cpuop_func op_4868_32_nf; +extern cpuop_func op_4868_32_ff; +extern cpuop_func op_4870_32_nf; +extern cpuop_func op_4870_32_ff; +extern cpuop_func op_4878_32_nf; +extern cpuop_func op_4878_32_ff; +extern cpuop_func op_4879_32_nf; +extern cpuop_func op_4879_32_ff; +extern cpuop_func op_487a_32_nf; +extern cpuop_func op_487a_32_ff; +extern cpuop_func op_487b_32_nf; +extern cpuop_func op_487b_32_ff; +extern cpuop_func op_4880_32_nf; +extern cpuop_func op_4880_32_ff; +extern cpuop_func op_4890_32_nf; +extern cpuop_func op_4890_32_ff; +extern cpuop_func op_48a0_32_nf; +extern cpuop_func op_48a0_32_ff; +extern cpuop_func op_48a8_32_nf; +extern cpuop_func op_48a8_32_ff; +extern cpuop_func op_48b0_32_nf; +extern cpuop_func op_48b0_32_ff; +extern cpuop_func op_48b8_32_nf; +extern cpuop_func op_48b8_32_ff; +extern cpuop_func op_48b9_32_nf; +extern cpuop_func op_48b9_32_ff; +extern cpuop_func op_48c0_32_nf; +extern cpuop_func op_48c0_32_ff; +extern cpuop_func op_48d0_32_nf; +extern cpuop_func op_48d0_32_ff; +extern cpuop_func op_48e0_32_nf; +extern cpuop_func op_48e0_32_ff; +extern cpuop_func op_48e8_32_nf; +extern cpuop_func op_48e8_32_ff; +extern cpuop_func op_48f0_32_nf; +extern cpuop_func op_48f0_32_ff; +extern cpuop_func op_48f8_32_nf; +extern cpuop_func op_48f8_32_ff; +extern cpuop_func op_48f9_32_nf; +extern cpuop_func op_48f9_32_ff; +extern cpuop_func op_49c0_32_nf; +extern cpuop_func op_49c0_32_ff; +extern cpuop_func op_4a00_32_nf; +extern cpuop_func op_4a00_32_ff; +extern cpuop_func op_4a10_32_nf; +extern cpuop_func op_4a10_32_ff; +extern cpuop_func op_4a18_32_nf; +extern cpuop_func op_4a18_32_ff; +extern cpuop_func op_4a20_32_nf; +extern cpuop_func op_4a20_32_ff; +extern cpuop_func op_4a28_32_nf; +extern cpuop_func op_4a28_32_ff; +extern cpuop_func op_4a30_32_nf; +extern cpuop_func op_4a30_32_ff; +extern cpuop_func op_4a38_32_nf; +extern cpuop_func op_4a38_32_ff; +extern cpuop_func op_4a39_32_nf; +extern cpuop_func op_4a39_32_ff; +extern cpuop_func op_4a3a_32_nf; +extern cpuop_func op_4a3a_32_ff; +extern cpuop_func op_4a3b_32_nf; +extern cpuop_func op_4a3b_32_ff; +extern cpuop_func op_4a3c_32_nf; +extern cpuop_func op_4a3c_32_ff; +extern cpuop_func op_4a40_32_nf; +extern cpuop_func op_4a40_32_ff; +extern cpuop_func op_4a48_32_nf; +extern cpuop_func op_4a48_32_ff; +extern cpuop_func op_4a50_32_nf; +extern cpuop_func op_4a50_32_ff; +extern cpuop_func op_4a58_32_nf; +extern cpuop_func op_4a58_32_ff; +extern cpuop_func op_4a60_32_nf; +extern cpuop_func op_4a60_32_ff; +extern cpuop_func op_4a68_32_nf; +extern cpuop_func op_4a68_32_ff; +extern cpuop_func op_4a70_32_nf; +extern cpuop_func op_4a70_32_ff; +extern cpuop_func op_4a78_32_nf; +extern cpuop_func op_4a78_32_ff; +extern cpuop_func op_4a79_32_nf; +extern cpuop_func op_4a79_32_ff; +extern cpuop_func op_4a7a_32_nf; +extern cpuop_func op_4a7a_32_ff; +extern cpuop_func op_4a7b_32_nf; +extern cpuop_func op_4a7b_32_ff; +extern cpuop_func op_4a7c_32_nf; +extern cpuop_func op_4a7c_32_ff; +extern cpuop_func op_4a80_32_nf; +extern cpuop_func op_4a80_32_ff; +extern cpuop_func op_4a88_32_nf; +extern cpuop_func op_4a88_32_ff; +extern cpuop_func op_4a90_32_nf; +extern cpuop_func op_4a90_32_ff; +extern cpuop_func op_4a98_32_nf; +extern cpuop_func op_4a98_32_ff; +extern cpuop_func op_4aa0_32_nf; +extern cpuop_func op_4aa0_32_ff; +extern cpuop_func op_4aa8_32_nf; +extern cpuop_func op_4aa8_32_ff; +extern cpuop_func op_4ab0_32_nf; +extern cpuop_func op_4ab0_32_ff; +extern cpuop_func op_4ab8_32_nf; +extern cpuop_func op_4ab8_32_ff; +extern cpuop_func op_4ab9_32_nf; +extern cpuop_func op_4ab9_32_ff; +extern cpuop_func op_4aba_32_nf; +extern cpuop_func op_4aba_32_ff; +extern cpuop_func op_4abb_32_nf; +extern cpuop_func op_4abb_32_ff; +extern cpuop_func op_4abc_32_nf; +extern cpuop_func op_4abc_32_ff; +extern cpuop_func op_4ac0_32_nf; +extern cpuop_func op_4ac0_32_ff; +extern cpuop_func op_4ad0_32_nf; +extern cpuop_func op_4ad0_32_ff; +extern cpuop_func op_4ad8_32_nf; +extern cpuop_func op_4ad8_32_ff; +extern cpuop_func op_4ae0_32_nf; +extern cpuop_func op_4ae0_32_ff; +extern cpuop_func op_4ae8_32_nf; +extern cpuop_func op_4ae8_32_ff; +extern cpuop_func op_4af0_32_nf; +extern cpuop_func op_4af0_32_ff; +extern cpuop_func op_4af8_32_nf; +extern cpuop_func op_4af8_32_ff; +extern cpuop_func op_4af9_32_nf; +extern cpuop_func op_4af9_32_ff; +extern cpuop_func op_4c00_32_nf; +extern cpuop_func op_4c00_32_ff; +extern cpuop_func op_4c10_32_nf; +extern cpuop_func op_4c10_32_ff; +extern cpuop_func op_4c18_32_nf; +extern cpuop_func op_4c18_32_ff; +extern cpuop_func op_4c20_32_nf; +extern cpuop_func op_4c20_32_ff; +extern cpuop_func op_4c28_32_nf; +extern cpuop_func op_4c28_32_ff; +extern cpuop_func op_4c30_32_nf; +extern cpuop_func op_4c30_32_ff; +extern cpuop_func op_4c38_32_nf; +extern cpuop_func op_4c38_32_ff; +extern cpuop_func op_4c39_32_nf; +extern cpuop_func op_4c39_32_ff; +extern cpuop_func op_4c3a_32_nf; +extern cpuop_func op_4c3a_32_ff; +extern cpuop_func op_4c3b_32_nf; +extern cpuop_func op_4c3b_32_ff; +extern cpuop_func op_4c3c_32_nf; +extern cpuop_func op_4c3c_32_ff; +extern cpuop_func op_4c40_32_nf; +extern cpuop_func op_4c40_32_ff; +extern cpuop_func op_4c50_32_nf; +extern cpuop_func op_4c50_32_ff; +extern cpuop_func op_4c58_32_nf; +extern cpuop_func op_4c58_32_ff; +extern cpuop_func op_4c60_32_nf; +extern cpuop_func op_4c60_32_ff; +extern cpuop_func op_4c68_32_nf; +extern cpuop_func op_4c68_32_ff; +extern cpuop_func op_4c70_32_nf; +extern cpuop_func op_4c70_32_ff; +extern cpuop_func op_4c78_32_nf; +extern cpuop_func op_4c78_32_ff; +extern cpuop_func op_4c79_32_nf; +extern cpuop_func op_4c79_32_ff; +extern cpuop_func op_4c7a_32_nf; +extern cpuop_func op_4c7a_32_ff; +extern cpuop_func op_4c7b_32_nf; +extern cpuop_func op_4c7b_32_ff; +extern cpuop_func op_4c7c_32_nf; +extern cpuop_func op_4c7c_32_ff; +extern cpuop_func op_4c90_32_nf; +extern cpuop_func op_4c90_32_ff; +extern cpuop_func op_4c98_32_nf; +extern cpuop_func op_4c98_32_ff; +extern cpuop_func op_4ca8_32_nf; +extern cpuop_func op_4ca8_32_ff; +extern cpuop_func op_4cb0_32_nf; +extern cpuop_func op_4cb0_32_ff; +extern cpuop_func op_4cb8_32_nf; +extern cpuop_func op_4cb8_32_ff; +extern cpuop_func op_4cb9_32_nf; +extern cpuop_func op_4cb9_32_ff; +extern cpuop_func op_4cba_32_nf; +extern cpuop_func op_4cba_32_ff; +extern cpuop_func op_4cbb_32_nf; +extern cpuop_func op_4cbb_32_ff; +extern cpuop_func op_4cd0_32_nf; +extern cpuop_func op_4cd0_32_ff; +extern cpuop_func op_4cd8_32_nf; +extern cpuop_func op_4cd8_32_ff; +extern cpuop_func op_4ce8_32_nf; +extern cpuop_func op_4ce8_32_ff; +extern cpuop_func op_4cf0_32_nf; +extern cpuop_func op_4cf0_32_ff; +extern cpuop_func op_4cf8_32_nf; +extern cpuop_func op_4cf8_32_ff; +extern cpuop_func op_4cf9_32_nf; +extern cpuop_func op_4cf9_32_ff; +extern cpuop_func op_4cfa_32_nf; +extern cpuop_func op_4cfa_32_ff; +extern cpuop_func op_4cfb_32_nf; +extern cpuop_func op_4cfb_32_ff; +extern cpuop_func op_4e40_32_nf; +extern cpuop_func op_4e40_32_ff; +extern cpuop_func op_4e50_32_nf; +extern cpuop_func op_4e50_32_ff; +extern cpuop_func op_4e58_32_nf; +extern cpuop_func op_4e58_32_ff; +extern cpuop_func op_4e60_32_nf; +extern cpuop_func op_4e60_32_ff; +extern cpuop_func op_4e68_32_nf; +extern cpuop_func op_4e68_32_ff; +extern cpuop_func op_4e70_32_nf; +extern cpuop_func op_4e70_32_ff; +extern cpuop_func op_4e71_32_nf; +extern cpuop_func op_4e71_32_ff; +extern cpuop_func op_4e72_32_nf; +extern cpuop_func op_4e72_32_ff; +extern cpuop_func op_4e73_32_nf; +extern cpuop_func op_4e73_32_ff; +extern cpuop_func op_4e74_32_nf; +extern cpuop_func op_4e74_32_ff; +extern cpuop_func op_4e75_32_nf; +extern cpuop_func op_4e75_32_ff; +extern cpuop_func op_4e76_32_nf; +extern cpuop_func op_4e76_32_ff; +extern cpuop_func op_4e77_32_nf; +extern cpuop_func op_4e77_32_ff; +extern cpuop_func op_4e7a_32_nf; +extern cpuop_func op_4e7a_32_ff; +extern cpuop_func op_4e7b_32_nf; +extern cpuop_func op_4e7b_32_ff; +extern cpuop_func op_4e90_32_nf; +extern cpuop_func op_4e90_32_ff; +extern cpuop_func op_4ea8_32_nf; +extern cpuop_func op_4ea8_32_ff; +extern cpuop_func op_4eb0_32_nf; +extern cpuop_func op_4eb0_32_ff; +extern cpuop_func op_4eb8_32_nf; +extern cpuop_func op_4eb8_32_ff; +extern cpuop_func op_4eb9_32_nf; +extern cpuop_func op_4eb9_32_ff; +extern cpuop_func op_4eba_32_nf; +extern cpuop_func op_4eba_32_ff; +extern cpuop_func op_4ebb_32_nf; +extern cpuop_func op_4ebb_32_ff; +extern cpuop_func op_4ed0_32_nf; +extern cpuop_func op_4ed0_32_ff; +extern cpuop_func op_4ee8_32_nf; +extern cpuop_func op_4ee8_32_ff; +extern cpuop_func op_4ef0_32_nf; +extern cpuop_func op_4ef0_32_ff; +extern cpuop_func op_4ef8_32_nf; +extern cpuop_func op_4ef8_32_ff; +extern cpuop_func op_4ef9_32_nf; +extern cpuop_func op_4ef9_32_ff; +extern cpuop_func op_4efa_32_nf; +extern cpuop_func op_4efa_32_ff; +extern cpuop_func op_4efb_32_nf; +extern cpuop_func op_4efb_32_ff; +extern cpuop_func op_5000_32_nf; +extern cpuop_func op_5000_32_ff; +extern cpuop_func op_5010_32_nf; +extern cpuop_func op_5010_32_ff; +extern cpuop_func op_5018_32_nf; +extern cpuop_func op_5018_32_ff; +extern cpuop_func op_5020_32_nf; +extern cpuop_func op_5020_32_ff; +extern cpuop_func op_5028_32_nf; +extern cpuop_func op_5028_32_ff; +extern cpuop_func op_5030_32_nf; +extern cpuop_func op_5030_32_ff; +extern cpuop_func op_5038_32_nf; +extern cpuop_func op_5038_32_ff; +extern cpuop_func op_5039_32_nf; +extern cpuop_func op_5039_32_ff; +extern cpuop_func op_5040_32_nf; +extern cpuop_func op_5040_32_ff; +extern cpuop_func op_5048_32_nf; +extern cpuop_func op_5048_32_ff; +extern cpuop_func op_5050_32_nf; +extern cpuop_func op_5050_32_ff; +extern cpuop_func op_5058_32_nf; +extern cpuop_func op_5058_32_ff; +extern cpuop_func op_5060_32_nf; +extern cpuop_func op_5060_32_ff; +extern cpuop_func op_5068_32_nf; +extern cpuop_func op_5068_32_ff; +extern cpuop_func op_5070_32_nf; +extern cpuop_func op_5070_32_ff; +extern cpuop_func op_5078_32_nf; +extern cpuop_func op_5078_32_ff; +extern cpuop_func op_5079_32_nf; +extern cpuop_func op_5079_32_ff; +extern cpuop_func op_5080_32_nf; +extern cpuop_func op_5080_32_ff; +extern cpuop_func op_5088_32_nf; +extern cpuop_func op_5088_32_ff; +extern cpuop_func op_5090_32_nf; +extern cpuop_func op_5090_32_ff; +extern cpuop_func op_5098_32_nf; +extern cpuop_func op_5098_32_ff; +extern cpuop_func op_50a0_32_nf; +extern cpuop_func op_50a0_32_ff; +extern cpuop_func op_50a8_32_nf; +extern cpuop_func op_50a8_32_ff; +extern cpuop_func op_50b0_32_nf; +extern cpuop_func op_50b0_32_ff; +extern cpuop_func op_50b8_32_nf; +extern cpuop_func op_50b8_32_ff; +extern cpuop_func op_50b9_32_nf; +extern cpuop_func op_50b9_32_ff; +extern cpuop_func op_50c0_32_nf; +extern cpuop_func op_50c0_32_ff; +extern cpuop_func op_50c8_32_nf; +extern cpuop_func op_50c8_32_ff; +extern cpuop_func op_50d0_32_nf; +extern cpuop_func op_50d0_32_ff; +extern cpuop_func op_50d8_32_nf; +extern cpuop_func op_50d8_32_ff; +extern cpuop_func op_50e0_32_nf; +extern cpuop_func op_50e0_32_ff; +extern cpuop_func op_50e8_32_nf; +extern cpuop_func op_50e8_32_ff; +extern cpuop_func op_50f0_32_nf; +extern cpuop_func op_50f0_32_ff; +extern cpuop_func op_50f8_32_nf; +extern cpuop_func op_50f8_32_ff; +extern cpuop_func op_50f9_32_nf; +extern cpuop_func op_50f9_32_ff; +extern cpuop_func op_50fa_32_nf; +extern cpuop_func op_50fa_32_ff; +extern cpuop_func op_50fb_32_nf; +extern cpuop_func op_50fb_32_ff; +extern cpuop_func op_50fc_32_nf; +extern cpuop_func op_50fc_32_ff; +extern cpuop_func op_5100_32_nf; +extern cpuop_func op_5100_32_ff; +extern cpuop_func op_5110_32_nf; +extern cpuop_func op_5110_32_ff; +extern cpuop_func op_5118_32_nf; +extern cpuop_func op_5118_32_ff; +extern cpuop_func op_5120_32_nf; +extern cpuop_func op_5120_32_ff; +extern cpuop_func op_5128_32_nf; +extern cpuop_func op_5128_32_ff; +extern cpuop_func op_5130_32_nf; +extern cpuop_func op_5130_32_ff; +extern cpuop_func op_5138_32_nf; +extern cpuop_func op_5138_32_ff; +extern cpuop_func op_5139_32_nf; +extern cpuop_func op_5139_32_ff; +extern cpuop_func op_5140_32_nf; +extern cpuop_func op_5140_32_ff; +extern cpuop_func op_5148_32_nf; +extern cpuop_func op_5148_32_ff; +extern cpuop_func op_5150_32_nf; +extern cpuop_func op_5150_32_ff; +extern cpuop_func op_5158_32_nf; +extern cpuop_func op_5158_32_ff; +extern cpuop_func op_5160_32_nf; +extern cpuop_func op_5160_32_ff; +extern cpuop_func op_5168_32_nf; +extern cpuop_func op_5168_32_ff; +extern cpuop_func op_5170_32_nf; +extern cpuop_func op_5170_32_ff; +extern cpuop_func op_5178_32_nf; +extern cpuop_func op_5178_32_ff; +extern cpuop_func op_5179_32_nf; +extern cpuop_func op_5179_32_ff; +extern cpuop_func op_5180_32_nf; +extern cpuop_func op_5180_32_ff; +extern cpuop_func op_5188_32_nf; +extern cpuop_func op_5188_32_ff; +extern cpuop_func op_5190_32_nf; +extern cpuop_func op_5190_32_ff; +extern cpuop_func op_5198_32_nf; +extern cpuop_func op_5198_32_ff; +extern cpuop_func op_51a0_32_nf; +extern cpuop_func op_51a0_32_ff; +extern cpuop_func op_51a8_32_nf; +extern cpuop_func op_51a8_32_ff; +extern cpuop_func op_51b0_32_nf; +extern cpuop_func op_51b0_32_ff; +extern cpuop_func op_51b8_32_nf; +extern cpuop_func op_51b8_32_ff; +extern cpuop_func op_51b9_32_nf; +extern cpuop_func op_51b9_32_ff; +extern cpuop_func op_51c0_32_nf; +extern cpuop_func op_51c0_32_ff; +extern cpuop_func op_51c8_32_nf; +extern cpuop_func op_51c8_32_ff; +extern cpuop_func op_51d0_32_nf; +extern cpuop_func op_51d0_32_ff; +extern cpuop_func op_51d8_32_nf; +extern cpuop_func op_51d8_32_ff; +extern cpuop_func op_51e0_32_nf; +extern cpuop_func op_51e0_32_ff; +extern cpuop_func op_51e8_32_nf; +extern cpuop_func op_51e8_32_ff; +extern cpuop_func op_51f0_32_nf; +extern cpuop_func op_51f0_32_ff; +extern cpuop_func op_51f8_32_nf; +extern cpuop_func op_51f8_32_ff; +extern cpuop_func op_51f9_32_nf; +extern cpuop_func op_51f9_32_ff; +extern cpuop_func op_51fa_32_nf; +extern cpuop_func op_51fa_32_ff; +extern cpuop_func op_51fb_32_nf; +extern cpuop_func op_51fb_32_ff; +extern cpuop_func op_51fc_32_nf; +extern cpuop_func op_51fc_32_ff; +extern cpuop_func op_52c0_32_nf; +extern cpuop_func op_52c0_32_ff; +extern cpuop_func op_52c8_32_nf; +extern cpuop_func op_52c8_32_ff; +extern cpuop_func op_52d0_32_nf; +extern cpuop_func op_52d0_32_ff; +extern cpuop_func op_52d8_32_nf; +extern cpuop_func op_52d8_32_ff; +extern cpuop_func op_52e0_32_nf; +extern cpuop_func op_52e0_32_ff; +extern cpuop_func op_52e8_32_nf; +extern cpuop_func op_52e8_32_ff; +extern cpuop_func op_52f0_32_nf; +extern cpuop_func op_52f0_32_ff; +extern cpuop_func op_52f8_32_nf; +extern cpuop_func op_52f8_32_ff; +extern cpuop_func op_52f9_32_nf; +extern cpuop_func op_52f9_32_ff; +extern cpuop_func op_52fa_32_nf; +extern cpuop_func op_52fa_32_ff; +extern cpuop_func op_52fb_32_nf; +extern cpuop_func op_52fb_32_ff; +extern cpuop_func op_52fc_32_nf; +extern cpuop_func op_52fc_32_ff; +extern cpuop_func op_53c0_32_nf; +extern cpuop_func op_53c0_32_ff; +extern cpuop_func op_53c8_32_nf; +extern cpuop_func op_53c8_32_ff; +extern cpuop_func op_53d0_32_nf; +extern cpuop_func op_53d0_32_ff; +extern cpuop_func op_53d8_32_nf; +extern cpuop_func op_53d8_32_ff; +extern cpuop_func op_53e0_32_nf; +extern cpuop_func op_53e0_32_ff; +extern cpuop_func op_53e8_32_nf; +extern cpuop_func op_53e8_32_ff; +extern cpuop_func op_53f0_32_nf; +extern cpuop_func op_53f0_32_ff; +extern cpuop_func op_53f8_32_nf; +extern cpuop_func op_53f8_32_ff; +extern cpuop_func op_53f9_32_nf; +extern cpuop_func op_53f9_32_ff; +extern cpuop_func op_53fa_32_nf; +extern cpuop_func op_53fa_32_ff; +extern cpuop_func op_53fb_32_nf; +extern cpuop_func op_53fb_32_ff; +extern cpuop_func op_53fc_32_nf; +extern cpuop_func op_53fc_32_ff; +extern cpuop_func op_54c0_32_nf; +extern cpuop_func op_54c0_32_ff; +extern cpuop_func op_54c8_32_nf; +extern cpuop_func op_54c8_32_ff; +extern cpuop_func op_54d0_32_nf; +extern cpuop_func op_54d0_32_ff; +extern cpuop_func op_54d8_32_nf; +extern cpuop_func op_54d8_32_ff; +extern cpuop_func op_54e0_32_nf; +extern cpuop_func op_54e0_32_ff; +extern cpuop_func op_54e8_32_nf; +extern cpuop_func op_54e8_32_ff; +extern cpuop_func op_54f0_32_nf; +extern cpuop_func op_54f0_32_ff; +extern cpuop_func op_54f8_32_nf; +extern cpuop_func op_54f8_32_ff; +extern cpuop_func op_54f9_32_nf; +extern cpuop_func op_54f9_32_ff; +extern cpuop_func op_54fa_32_nf; +extern cpuop_func op_54fa_32_ff; +extern cpuop_func op_54fb_32_nf; +extern cpuop_func op_54fb_32_ff; +extern cpuop_func op_54fc_32_nf; +extern cpuop_func op_54fc_32_ff; +extern cpuop_func op_55c0_32_nf; +extern cpuop_func op_55c0_32_ff; +extern cpuop_func op_55c8_32_nf; +extern cpuop_func op_55c8_32_ff; +extern cpuop_func op_55d0_32_nf; +extern cpuop_func op_55d0_32_ff; +extern cpuop_func op_55d8_32_nf; +extern cpuop_func op_55d8_32_ff; +extern cpuop_func op_55e0_32_nf; +extern cpuop_func op_55e0_32_ff; +extern cpuop_func op_55e8_32_nf; +extern cpuop_func op_55e8_32_ff; +extern cpuop_func op_55f0_32_nf; +extern cpuop_func op_55f0_32_ff; +extern cpuop_func op_55f8_32_nf; +extern cpuop_func op_55f8_32_ff; +extern cpuop_func op_55f9_32_nf; +extern cpuop_func op_55f9_32_ff; +extern cpuop_func op_55fa_32_nf; +extern cpuop_func op_55fa_32_ff; +extern cpuop_func op_55fb_32_nf; +extern cpuop_func op_55fb_32_ff; +extern cpuop_func op_55fc_32_nf; +extern cpuop_func op_55fc_32_ff; +extern cpuop_func op_56c0_32_nf; +extern cpuop_func op_56c0_32_ff; +extern cpuop_func op_56c8_32_nf; +extern cpuop_func op_56c8_32_ff; +extern cpuop_func op_56d0_32_nf; +extern cpuop_func op_56d0_32_ff; +extern cpuop_func op_56d8_32_nf; +extern cpuop_func op_56d8_32_ff; +extern cpuop_func op_56e0_32_nf; +extern cpuop_func op_56e0_32_ff; +extern cpuop_func op_56e8_32_nf; +extern cpuop_func op_56e8_32_ff; +extern cpuop_func op_56f0_32_nf; +extern cpuop_func op_56f0_32_ff; +extern cpuop_func op_56f8_32_nf; +extern cpuop_func op_56f8_32_ff; +extern cpuop_func op_56f9_32_nf; +extern cpuop_func op_56f9_32_ff; +extern cpuop_func op_56fa_32_nf; +extern cpuop_func op_56fa_32_ff; +extern cpuop_func op_56fb_32_nf; +extern cpuop_func op_56fb_32_ff; +extern cpuop_func op_56fc_32_nf; +extern cpuop_func op_56fc_32_ff; +extern cpuop_func op_57c0_32_nf; +extern cpuop_func op_57c0_32_ff; +extern cpuop_func op_57c8_32_nf; +extern cpuop_func op_57c8_32_ff; +extern cpuop_func op_57d0_32_nf; +extern cpuop_func op_57d0_32_ff; +extern cpuop_func op_57d8_32_nf; +extern cpuop_func op_57d8_32_ff; +extern cpuop_func op_57e0_32_nf; +extern cpuop_func op_57e0_32_ff; +extern cpuop_func op_57e8_32_nf; +extern cpuop_func op_57e8_32_ff; +extern cpuop_func op_57f0_32_nf; +extern cpuop_func op_57f0_32_ff; +extern cpuop_func op_57f8_32_nf; +extern cpuop_func op_57f8_32_ff; +extern cpuop_func op_57f9_32_nf; +extern cpuop_func op_57f9_32_ff; +extern cpuop_func op_57fa_32_nf; +extern cpuop_func op_57fa_32_ff; +extern cpuop_func op_57fb_32_nf; +extern cpuop_func op_57fb_32_ff; +extern cpuop_func op_57fc_32_nf; +extern cpuop_func op_57fc_32_ff; +extern cpuop_func op_58c0_32_nf; +extern cpuop_func op_58c0_32_ff; +extern cpuop_func op_58c8_32_nf; +extern cpuop_func op_58c8_32_ff; +extern cpuop_func op_58d0_32_nf; +extern cpuop_func op_58d0_32_ff; +extern cpuop_func op_58d8_32_nf; +extern cpuop_func op_58d8_32_ff; +extern cpuop_func op_58e0_32_nf; +extern cpuop_func op_58e0_32_ff; +extern cpuop_func op_58e8_32_nf; +extern cpuop_func op_58e8_32_ff; +extern cpuop_func op_58f0_32_nf; +extern cpuop_func op_58f0_32_ff; +extern cpuop_func op_58f8_32_nf; +extern cpuop_func op_58f8_32_ff; +extern cpuop_func op_58f9_32_nf; +extern cpuop_func op_58f9_32_ff; +extern cpuop_func op_58fa_32_nf; +extern cpuop_func op_58fa_32_ff; +extern cpuop_func op_58fb_32_nf; +extern cpuop_func op_58fb_32_ff; +extern cpuop_func op_58fc_32_nf; +extern cpuop_func op_58fc_32_ff; +extern cpuop_func op_59c0_32_nf; +extern cpuop_func op_59c0_32_ff; +extern cpuop_func op_59c8_32_nf; +extern cpuop_func op_59c8_32_ff; +extern cpuop_func op_59d0_32_nf; +extern cpuop_func op_59d0_32_ff; +extern cpuop_func op_59d8_32_nf; +extern cpuop_func op_59d8_32_ff; +extern cpuop_func op_59e0_32_nf; +extern cpuop_func op_59e0_32_ff; +extern cpuop_func op_59e8_32_nf; +extern cpuop_func op_59e8_32_ff; +extern cpuop_func op_59f0_32_nf; +extern cpuop_func op_59f0_32_ff; +extern cpuop_func op_59f8_32_nf; +extern cpuop_func op_59f8_32_ff; +extern cpuop_func op_59f9_32_nf; +extern cpuop_func op_59f9_32_ff; +extern cpuop_func op_59fa_32_nf; +extern cpuop_func op_59fa_32_ff; +extern cpuop_func op_59fb_32_nf; +extern cpuop_func op_59fb_32_ff; +extern cpuop_func op_59fc_32_nf; +extern cpuop_func op_59fc_32_ff; +extern cpuop_func op_5ac0_32_nf; +extern cpuop_func op_5ac0_32_ff; +extern cpuop_func op_5ac8_32_nf; +extern cpuop_func op_5ac8_32_ff; +extern cpuop_func op_5ad0_32_nf; +extern cpuop_func op_5ad0_32_ff; +extern cpuop_func op_5ad8_32_nf; +extern cpuop_func op_5ad8_32_ff; +extern cpuop_func op_5ae0_32_nf; +extern cpuop_func op_5ae0_32_ff; +extern cpuop_func op_5ae8_32_nf; +extern cpuop_func op_5ae8_32_ff; +extern cpuop_func op_5af0_32_nf; +extern cpuop_func op_5af0_32_ff; +extern cpuop_func op_5af8_32_nf; +extern cpuop_func op_5af8_32_ff; +extern cpuop_func op_5af9_32_nf; +extern cpuop_func op_5af9_32_ff; +extern cpuop_func op_5afa_32_nf; +extern cpuop_func op_5afa_32_ff; +extern cpuop_func op_5afb_32_nf; +extern cpuop_func op_5afb_32_ff; +extern cpuop_func op_5afc_32_nf; +extern cpuop_func op_5afc_32_ff; +extern cpuop_func op_5bc0_32_nf; +extern cpuop_func op_5bc0_32_ff; +extern cpuop_func op_5bc8_32_nf; +extern cpuop_func op_5bc8_32_ff; +extern cpuop_func op_5bd0_32_nf; +extern cpuop_func op_5bd0_32_ff; +extern cpuop_func op_5bd8_32_nf; +extern cpuop_func op_5bd8_32_ff; +extern cpuop_func op_5be0_32_nf; +extern cpuop_func op_5be0_32_ff; +extern cpuop_func op_5be8_32_nf; +extern cpuop_func op_5be8_32_ff; +extern cpuop_func op_5bf0_32_nf; +extern cpuop_func op_5bf0_32_ff; +extern cpuop_func op_5bf8_32_nf; +extern cpuop_func op_5bf8_32_ff; +extern cpuop_func op_5bf9_32_nf; +extern cpuop_func op_5bf9_32_ff; +extern cpuop_func op_5bfa_32_nf; +extern cpuop_func op_5bfa_32_ff; +extern cpuop_func op_5bfb_32_nf; +extern cpuop_func op_5bfb_32_ff; +extern cpuop_func op_5bfc_32_nf; +extern cpuop_func op_5bfc_32_ff; +extern cpuop_func op_5cc0_32_nf; +extern cpuop_func op_5cc0_32_ff; +extern cpuop_func op_5cc8_32_nf; +extern cpuop_func op_5cc8_32_ff; +extern cpuop_func op_5cd0_32_nf; +extern cpuop_func op_5cd0_32_ff; +extern cpuop_func op_5cd8_32_nf; +extern cpuop_func op_5cd8_32_ff; +extern cpuop_func op_5ce0_32_nf; +extern cpuop_func op_5ce0_32_ff; +extern cpuop_func op_5ce8_32_nf; +extern cpuop_func op_5ce8_32_ff; +extern cpuop_func op_5cf0_32_nf; +extern cpuop_func op_5cf0_32_ff; +extern cpuop_func op_5cf8_32_nf; +extern cpuop_func op_5cf8_32_ff; +extern cpuop_func op_5cf9_32_nf; +extern cpuop_func op_5cf9_32_ff; +extern cpuop_func op_5cfa_32_nf; +extern cpuop_func op_5cfa_32_ff; +extern cpuop_func op_5cfb_32_nf; +extern cpuop_func op_5cfb_32_ff; +extern cpuop_func op_5cfc_32_nf; +extern cpuop_func op_5cfc_32_ff; +extern cpuop_func op_5dc0_32_nf; +extern cpuop_func op_5dc0_32_ff; +extern cpuop_func op_5dc8_32_nf; +extern cpuop_func op_5dc8_32_ff; +extern cpuop_func op_5dd0_32_nf; +extern cpuop_func op_5dd0_32_ff; +extern cpuop_func op_5dd8_32_nf; +extern cpuop_func op_5dd8_32_ff; +extern cpuop_func op_5de0_32_nf; +extern cpuop_func op_5de0_32_ff; +extern cpuop_func op_5de8_32_nf; +extern cpuop_func op_5de8_32_ff; +extern cpuop_func op_5df0_32_nf; +extern cpuop_func op_5df0_32_ff; +extern cpuop_func op_5df8_32_nf; +extern cpuop_func op_5df8_32_ff; +extern cpuop_func op_5df9_32_nf; +extern cpuop_func op_5df9_32_ff; +extern cpuop_func op_5dfa_32_nf; +extern cpuop_func op_5dfa_32_ff; +extern cpuop_func op_5dfb_32_nf; +extern cpuop_func op_5dfb_32_ff; +extern cpuop_func op_5dfc_32_nf; +extern cpuop_func op_5dfc_32_ff; +extern cpuop_func op_5ec0_32_nf; +extern cpuop_func op_5ec0_32_ff; +extern cpuop_func op_5ec8_32_nf; +extern cpuop_func op_5ec8_32_ff; +extern cpuop_func op_5ed0_32_nf; +extern cpuop_func op_5ed0_32_ff; +extern cpuop_func op_5ed8_32_nf; +extern cpuop_func op_5ed8_32_ff; +extern cpuop_func op_5ee0_32_nf; +extern cpuop_func op_5ee0_32_ff; +extern cpuop_func op_5ee8_32_nf; +extern cpuop_func op_5ee8_32_ff; +extern cpuop_func op_5ef0_32_nf; +extern cpuop_func op_5ef0_32_ff; +extern cpuop_func op_5ef8_32_nf; +extern cpuop_func op_5ef8_32_ff; +extern cpuop_func op_5ef9_32_nf; +extern cpuop_func op_5ef9_32_ff; +extern cpuop_func op_5efa_32_nf; +extern cpuop_func op_5efa_32_ff; +extern cpuop_func op_5efb_32_nf; +extern cpuop_func op_5efb_32_ff; +extern cpuop_func op_5efc_32_nf; +extern cpuop_func op_5efc_32_ff; +extern cpuop_func op_5fc0_32_nf; +extern cpuop_func op_5fc0_32_ff; +extern cpuop_func op_5fc8_32_nf; +extern cpuop_func op_5fc8_32_ff; +extern cpuop_func op_5fd0_32_nf; +extern cpuop_func op_5fd0_32_ff; +extern cpuop_func op_5fd8_32_nf; +extern cpuop_func op_5fd8_32_ff; +extern cpuop_func op_5fe0_32_nf; +extern cpuop_func op_5fe0_32_ff; +extern cpuop_func op_5fe8_32_nf; +extern cpuop_func op_5fe8_32_ff; +extern cpuop_func op_5ff0_32_nf; +extern cpuop_func op_5ff0_32_ff; +extern cpuop_func op_5ff8_32_nf; +extern cpuop_func op_5ff8_32_ff; +extern cpuop_func op_5ff9_32_nf; +extern cpuop_func op_5ff9_32_ff; +extern cpuop_func op_5ffa_32_nf; +extern cpuop_func op_5ffa_32_ff; +extern cpuop_func op_5ffb_32_nf; +extern cpuop_func op_5ffb_32_ff; +extern cpuop_func op_5ffc_32_nf; +extern cpuop_func op_5ffc_32_ff; +extern cpuop_func op_6000_32_nf; +extern cpuop_func op_6000_32_ff; +extern cpuop_func op_6001_32_nf; +extern cpuop_func op_6001_32_ff; +extern cpuop_func op_60ff_32_nf; +extern cpuop_func op_60ff_32_ff; +extern cpuop_func op_6100_32_nf; +extern cpuop_func op_6100_32_ff; +extern cpuop_func op_6101_32_nf; +extern cpuop_func op_6101_32_ff; +extern cpuop_func op_61ff_32_nf; +extern cpuop_func op_61ff_32_ff; +extern cpuop_func op_6200_32_nf; +extern cpuop_func op_6200_32_ff; +extern cpuop_func op_6201_32_nf; +extern cpuop_func op_6201_32_ff; +extern cpuop_func op_62ff_32_nf; +extern cpuop_func op_62ff_32_ff; +extern cpuop_func op_6300_32_nf; +extern cpuop_func op_6300_32_ff; +extern cpuop_func op_6301_32_nf; +extern cpuop_func op_6301_32_ff; +extern cpuop_func op_63ff_32_nf; +extern cpuop_func op_63ff_32_ff; +extern cpuop_func op_6400_32_nf; +extern cpuop_func op_6400_32_ff; +extern cpuop_func op_6401_32_nf; +extern cpuop_func op_6401_32_ff; +extern cpuop_func op_64ff_32_nf; +extern cpuop_func op_64ff_32_ff; +extern cpuop_func op_6500_32_nf; +extern cpuop_func op_6500_32_ff; +extern cpuop_func op_6501_32_nf; +extern cpuop_func op_6501_32_ff; +extern cpuop_func op_65ff_32_nf; +extern cpuop_func op_65ff_32_ff; +extern cpuop_func op_6600_32_nf; +extern cpuop_func op_6600_32_ff; +extern cpuop_func op_6601_32_nf; +extern cpuop_func op_6601_32_ff; +extern cpuop_func op_66ff_32_nf; +extern cpuop_func op_66ff_32_ff; +extern cpuop_func op_6700_32_nf; +extern cpuop_func op_6700_32_ff; +extern cpuop_func op_6701_32_nf; +extern cpuop_func op_6701_32_ff; +extern cpuop_func op_67ff_32_nf; +extern cpuop_func op_67ff_32_ff; +extern cpuop_func op_6800_32_nf; +extern cpuop_func op_6800_32_ff; +extern cpuop_func op_6801_32_nf; +extern cpuop_func op_6801_32_ff; +extern cpuop_func op_68ff_32_nf; +extern cpuop_func op_68ff_32_ff; +extern cpuop_func op_6900_32_nf; +extern cpuop_func op_6900_32_ff; +extern cpuop_func op_6901_32_nf; +extern cpuop_func op_6901_32_ff; +extern cpuop_func op_69ff_32_nf; +extern cpuop_func op_69ff_32_ff; +extern cpuop_func op_6a00_32_nf; +extern cpuop_func op_6a00_32_ff; +extern cpuop_func op_6a01_32_nf; +extern cpuop_func op_6a01_32_ff; +extern cpuop_func op_6aff_32_nf; +extern cpuop_func op_6aff_32_ff; +extern cpuop_func op_6b00_32_nf; +extern cpuop_func op_6b00_32_ff; +extern cpuop_func op_6b01_32_nf; +extern cpuop_func op_6b01_32_ff; +extern cpuop_func op_6bff_32_nf; +extern cpuop_func op_6bff_32_ff; +extern cpuop_func op_6c00_32_nf; +extern cpuop_func op_6c00_32_ff; +extern cpuop_func op_6c01_32_nf; +extern cpuop_func op_6c01_32_ff; +extern cpuop_func op_6cff_32_nf; +extern cpuop_func op_6cff_32_ff; +extern cpuop_func op_6d00_32_nf; +extern cpuop_func op_6d00_32_ff; +extern cpuop_func op_6d01_32_nf; +extern cpuop_func op_6d01_32_ff; +extern cpuop_func op_6dff_32_nf; +extern cpuop_func op_6dff_32_ff; +extern cpuop_func op_6e00_32_nf; +extern cpuop_func op_6e00_32_ff; +extern cpuop_func op_6e01_32_nf; +extern cpuop_func op_6e01_32_ff; +extern cpuop_func op_6eff_32_nf; +extern cpuop_func op_6eff_32_ff; +extern cpuop_func op_6f00_32_nf; +extern cpuop_func op_6f00_32_ff; +extern cpuop_func op_6f01_32_nf; +extern cpuop_func op_6f01_32_ff; +extern cpuop_func op_6fff_32_nf; +extern cpuop_func op_6fff_32_ff; +extern cpuop_func op_7000_32_nf; +extern cpuop_func op_7000_32_ff; +extern cpuop_func op_8000_32_nf; +extern cpuop_func op_8000_32_ff; +extern cpuop_func op_8010_32_nf; +extern cpuop_func op_8010_32_ff; +extern cpuop_func op_8018_32_nf; +extern cpuop_func op_8018_32_ff; +extern cpuop_func op_8020_32_nf; +extern cpuop_func op_8020_32_ff; +extern cpuop_func op_8028_32_nf; +extern cpuop_func op_8028_32_ff; +extern cpuop_func op_8030_32_nf; +extern cpuop_func op_8030_32_ff; +extern cpuop_func op_8038_32_nf; +extern cpuop_func op_8038_32_ff; +extern cpuop_func op_8039_32_nf; +extern cpuop_func op_8039_32_ff; +extern cpuop_func op_803a_32_nf; +extern cpuop_func op_803a_32_ff; +extern cpuop_func op_803b_32_nf; +extern cpuop_func op_803b_32_ff; +extern cpuop_func op_803c_32_nf; +extern cpuop_func op_803c_32_ff; +extern cpuop_func op_8040_32_nf; +extern cpuop_func op_8040_32_ff; +extern cpuop_func op_8050_32_nf; +extern cpuop_func op_8050_32_ff; +extern cpuop_func op_8058_32_nf; +extern cpuop_func op_8058_32_ff; +extern cpuop_func op_8060_32_nf; +extern cpuop_func op_8060_32_ff; +extern cpuop_func op_8068_32_nf; +extern cpuop_func op_8068_32_ff; +extern cpuop_func op_8070_32_nf; +extern cpuop_func op_8070_32_ff; +extern cpuop_func op_8078_32_nf; +extern cpuop_func op_8078_32_ff; +extern cpuop_func op_8079_32_nf; +extern cpuop_func op_8079_32_ff; +extern cpuop_func op_807a_32_nf; +extern cpuop_func op_807a_32_ff; +extern cpuop_func op_807b_32_nf; +extern cpuop_func op_807b_32_ff; +extern cpuop_func op_807c_32_nf; +extern cpuop_func op_807c_32_ff; +extern cpuop_func op_8080_32_nf; +extern cpuop_func op_8080_32_ff; +extern cpuop_func op_8090_32_nf; +extern cpuop_func op_8090_32_ff; +extern cpuop_func op_8098_32_nf; +extern cpuop_func op_8098_32_ff; +extern cpuop_func op_80a0_32_nf; +extern cpuop_func op_80a0_32_ff; +extern cpuop_func op_80a8_32_nf; +extern cpuop_func op_80a8_32_ff; +extern cpuop_func op_80b0_32_nf; +extern cpuop_func op_80b0_32_ff; +extern cpuop_func op_80b8_32_nf; +extern cpuop_func op_80b8_32_ff; +extern cpuop_func op_80b9_32_nf; +extern cpuop_func op_80b9_32_ff; +extern cpuop_func op_80ba_32_nf; +extern cpuop_func op_80ba_32_ff; +extern cpuop_func op_80bb_32_nf; +extern cpuop_func op_80bb_32_ff; +extern cpuop_func op_80bc_32_nf; +extern cpuop_func op_80bc_32_ff; +extern cpuop_func op_80c0_32_nf; +extern cpuop_func op_80c0_32_ff; +extern cpuop_func op_80d0_32_nf; +extern cpuop_func op_80d0_32_ff; +extern cpuop_func op_80d8_32_nf; +extern cpuop_func op_80d8_32_ff; +extern cpuop_func op_80e0_32_nf; +extern cpuop_func op_80e0_32_ff; +extern cpuop_func op_80e8_32_nf; +extern cpuop_func op_80e8_32_ff; +extern cpuop_func op_80f0_32_nf; +extern cpuop_func op_80f0_32_ff; +extern cpuop_func op_80f8_32_nf; +extern cpuop_func op_80f8_32_ff; +extern cpuop_func op_80f9_32_nf; +extern cpuop_func op_80f9_32_ff; +extern cpuop_func op_80fa_32_nf; +extern cpuop_func op_80fa_32_ff; +extern cpuop_func op_80fb_32_nf; +extern cpuop_func op_80fb_32_ff; +extern cpuop_func op_80fc_32_nf; +extern cpuop_func op_80fc_32_ff; +extern cpuop_func op_8100_32_nf; +extern cpuop_func op_8100_32_ff; +extern cpuop_func op_8108_32_nf; +extern cpuop_func op_8108_32_ff; +extern cpuop_func op_8110_32_nf; +extern cpuop_func op_8110_32_ff; +extern cpuop_func op_8118_32_nf; +extern cpuop_func op_8118_32_ff; +extern cpuop_func op_8120_32_nf; +extern cpuop_func op_8120_32_ff; +extern cpuop_func op_8128_32_nf; +extern cpuop_func op_8128_32_ff; +extern cpuop_func op_8130_32_nf; +extern cpuop_func op_8130_32_ff; +extern cpuop_func op_8138_32_nf; +extern cpuop_func op_8138_32_ff; +extern cpuop_func op_8139_32_nf; +extern cpuop_func op_8139_32_ff; +extern cpuop_func op_8140_32_nf; +extern cpuop_func op_8140_32_ff; +extern cpuop_func op_8148_32_nf; +extern cpuop_func op_8148_32_ff; +extern cpuop_func op_8150_32_nf; +extern cpuop_func op_8150_32_ff; +extern cpuop_func op_8158_32_nf; +extern cpuop_func op_8158_32_ff; +extern cpuop_func op_8160_32_nf; +extern cpuop_func op_8160_32_ff; +extern cpuop_func op_8168_32_nf; +extern cpuop_func op_8168_32_ff; +extern cpuop_func op_8170_32_nf; +extern cpuop_func op_8170_32_ff; +extern cpuop_func op_8178_32_nf; +extern cpuop_func op_8178_32_ff; +extern cpuop_func op_8179_32_nf; +extern cpuop_func op_8179_32_ff; +extern cpuop_func op_8180_32_nf; +extern cpuop_func op_8180_32_ff; +extern cpuop_func op_8188_32_nf; +extern cpuop_func op_8188_32_ff; +extern cpuop_func op_8190_32_nf; +extern cpuop_func op_8190_32_ff; +extern cpuop_func op_8198_32_nf; +extern cpuop_func op_8198_32_ff; +extern cpuop_func op_81a0_32_nf; +extern cpuop_func op_81a0_32_ff; +extern cpuop_func op_81a8_32_nf; +extern cpuop_func op_81a8_32_ff; +extern cpuop_func op_81b0_32_nf; +extern cpuop_func op_81b0_32_ff; +extern cpuop_func op_81b8_32_nf; +extern cpuop_func op_81b8_32_ff; +extern cpuop_func op_81b9_32_nf; +extern cpuop_func op_81b9_32_ff; +extern cpuop_func op_81c0_32_nf; +extern cpuop_func op_81c0_32_ff; +extern cpuop_func op_81d0_32_nf; +extern cpuop_func op_81d0_32_ff; +extern cpuop_func op_81d8_32_nf; +extern cpuop_func op_81d8_32_ff; +extern cpuop_func op_81e0_32_nf; +extern cpuop_func op_81e0_32_ff; +extern cpuop_func op_81e8_32_nf; +extern cpuop_func op_81e8_32_ff; +extern cpuop_func op_81f0_32_nf; +extern cpuop_func op_81f0_32_ff; +extern cpuop_func op_81f8_32_nf; +extern cpuop_func op_81f8_32_ff; +extern cpuop_func op_81f9_32_nf; +extern cpuop_func op_81f9_32_ff; +extern cpuop_func op_81fa_32_nf; +extern cpuop_func op_81fa_32_ff; +extern cpuop_func op_81fb_32_nf; +extern cpuop_func op_81fb_32_ff; +extern cpuop_func op_81fc_32_nf; +extern cpuop_func op_81fc_32_ff; +extern cpuop_func op_9000_32_nf; +extern cpuop_func op_9000_32_ff; +extern cpuop_func op_9010_32_nf; +extern cpuop_func op_9010_32_ff; +extern cpuop_func op_9018_32_nf; +extern cpuop_func op_9018_32_ff; +extern cpuop_func op_9020_32_nf; +extern cpuop_func op_9020_32_ff; +extern cpuop_func op_9028_32_nf; +extern cpuop_func op_9028_32_ff; +extern cpuop_func op_9030_32_nf; +extern cpuop_func op_9030_32_ff; +extern cpuop_func op_9038_32_nf; +extern cpuop_func op_9038_32_ff; +extern cpuop_func op_9039_32_nf; +extern cpuop_func op_9039_32_ff; +extern cpuop_func op_903a_32_nf; +extern cpuop_func op_903a_32_ff; +extern cpuop_func op_903b_32_nf; +extern cpuop_func op_903b_32_ff; +extern cpuop_func op_903c_32_nf; +extern cpuop_func op_903c_32_ff; +extern cpuop_func op_9040_32_nf; +extern cpuop_func op_9040_32_ff; +extern cpuop_func op_9048_32_nf; +extern cpuop_func op_9048_32_ff; +extern cpuop_func op_9050_32_nf; +extern cpuop_func op_9050_32_ff; +extern cpuop_func op_9058_32_nf; +extern cpuop_func op_9058_32_ff; +extern cpuop_func op_9060_32_nf; +extern cpuop_func op_9060_32_ff; +extern cpuop_func op_9068_32_nf; +extern cpuop_func op_9068_32_ff; +extern cpuop_func op_9070_32_nf; +extern cpuop_func op_9070_32_ff; +extern cpuop_func op_9078_32_nf; +extern cpuop_func op_9078_32_ff; +extern cpuop_func op_9079_32_nf; +extern cpuop_func op_9079_32_ff; +extern cpuop_func op_907a_32_nf; +extern cpuop_func op_907a_32_ff; +extern cpuop_func op_907b_32_nf; +extern cpuop_func op_907b_32_ff; +extern cpuop_func op_907c_32_nf; +extern cpuop_func op_907c_32_ff; +extern cpuop_func op_9080_32_nf; +extern cpuop_func op_9080_32_ff; +extern cpuop_func op_9088_32_nf; +extern cpuop_func op_9088_32_ff; +extern cpuop_func op_9090_32_nf; +extern cpuop_func op_9090_32_ff; +extern cpuop_func op_9098_32_nf; +extern cpuop_func op_9098_32_ff; +extern cpuop_func op_90a0_32_nf; +extern cpuop_func op_90a0_32_ff; +extern cpuop_func op_90a8_32_nf; +extern cpuop_func op_90a8_32_ff; +extern cpuop_func op_90b0_32_nf; +extern cpuop_func op_90b0_32_ff; +extern cpuop_func op_90b8_32_nf; +extern cpuop_func op_90b8_32_ff; +extern cpuop_func op_90b9_32_nf; +extern cpuop_func op_90b9_32_ff; +extern cpuop_func op_90ba_32_nf; +extern cpuop_func op_90ba_32_ff; +extern cpuop_func op_90bb_32_nf; +extern cpuop_func op_90bb_32_ff; +extern cpuop_func op_90bc_32_nf; +extern cpuop_func op_90bc_32_ff; +extern cpuop_func op_90c0_32_nf; +extern cpuop_func op_90c0_32_ff; +extern cpuop_func op_90c8_32_nf; +extern cpuop_func op_90c8_32_ff; +extern cpuop_func op_90d0_32_nf; +extern cpuop_func op_90d0_32_ff; +extern cpuop_func op_90d8_32_nf; +extern cpuop_func op_90d8_32_ff; +extern cpuop_func op_90e0_32_nf; +extern cpuop_func op_90e0_32_ff; +extern cpuop_func op_90e8_32_nf; +extern cpuop_func op_90e8_32_ff; +extern cpuop_func op_90f0_32_nf; +extern cpuop_func op_90f0_32_ff; +extern cpuop_func op_90f8_32_nf; +extern cpuop_func op_90f8_32_ff; +extern cpuop_func op_90f9_32_nf; +extern cpuop_func op_90f9_32_ff; +extern cpuop_func op_90fa_32_nf; +extern cpuop_func op_90fa_32_ff; +extern cpuop_func op_90fb_32_nf; +extern cpuop_func op_90fb_32_ff; +extern cpuop_func op_90fc_32_nf; +extern cpuop_func op_90fc_32_ff; +extern cpuop_func op_9100_32_nf; +extern cpuop_func op_9100_32_ff; +extern cpuop_func op_9108_32_nf; +extern cpuop_func op_9108_32_ff; +extern cpuop_func op_9110_32_nf; +extern cpuop_func op_9110_32_ff; +extern cpuop_func op_9118_32_nf; +extern cpuop_func op_9118_32_ff; +extern cpuop_func op_9120_32_nf; +extern cpuop_func op_9120_32_ff; +extern cpuop_func op_9128_32_nf; +extern cpuop_func op_9128_32_ff; +extern cpuop_func op_9130_32_nf; +extern cpuop_func op_9130_32_ff; +extern cpuop_func op_9138_32_nf; +extern cpuop_func op_9138_32_ff; +extern cpuop_func op_9139_32_nf; +extern cpuop_func op_9139_32_ff; +extern cpuop_func op_9140_32_nf; +extern cpuop_func op_9140_32_ff; +extern cpuop_func op_9148_32_nf; +extern cpuop_func op_9148_32_ff; +extern cpuop_func op_9150_32_nf; +extern cpuop_func op_9150_32_ff; +extern cpuop_func op_9158_32_nf; +extern cpuop_func op_9158_32_ff; +extern cpuop_func op_9160_32_nf; +extern cpuop_func op_9160_32_ff; +extern cpuop_func op_9168_32_nf; +extern cpuop_func op_9168_32_ff; +extern cpuop_func op_9170_32_nf; +extern cpuop_func op_9170_32_ff; +extern cpuop_func op_9178_32_nf; +extern cpuop_func op_9178_32_ff; +extern cpuop_func op_9179_32_nf; +extern cpuop_func op_9179_32_ff; +extern cpuop_func op_9180_32_nf; +extern cpuop_func op_9180_32_ff; +extern cpuop_func op_9188_32_nf; +extern cpuop_func op_9188_32_ff; +extern cpuop_func op_9190_32_nf; +extern cpuop_func op_9190_32_ff; +extern cpuop_func op_9198_32_nf; +extern cpuop_func op_9198_32_ff; +extern cpuop_func op_91a0_32_nf; +extern cpuop_func op_91a0_32_ff; +extern cpuop_func op_91a8_32_nf; +extern cpuop_func op_91a8_32_ff; +extern cpuop_func op_91b0_32_nf; +extern cpuop_func op_91b0_32_ff; +extern cpuop_func op_91b8_32_nf; +extern cpuop_func op_91b8_32_ff; +extern cpuop_func op_91b9_32_nf; +extern cpuop_func op_91b9_32_ff; +extern cpuop_func op_91c0_32_nf; +extern cpuop_func op_91c0_32_ff; +extern cpuop_func op_91c8_32_nf; +extern cpuop_func op_91c8_32_ff; +extern cpuop_func op_91d0_32_nf; +extern cpuop_func op_91d0_32_ff; +extern cpuop_func op_91d8_32_nf; +extern cpuop_func op_91d8_32_ff; +extern cpuop_func op_91e0_32_nf; +extern cpuop_func op_91e0_32_ff; +extern cpuop_func op_91e8_32_nf; +extern cpuop_func op_91e8_32_ff; +extern cpuop_func op_91f0_32_nf; +extern cpuop_func op_91f0_32_ff; +extern cpuop_func op_91f8_32_nf; +extern cpuop_func op_91f8_32_ff; +extern cpuop_func op_91f9_32_nf; +extern cpuop_func op_91f9_32_ff; +extern cpuop_func op_91fa_32_nf; +extern cpuop_func op_91fa_32_ff; +extern cpuop_func op_91fb_32_nf; +extern cpuop_func op_91fb_32_ff; +extern cpuop_func op_91fc_32_nf; +extern cpuop_func op_91fc_32_ff; +extern cpuop_func op_b000_32_nf; +extern cpuop_func op_b000_32_ff; +extern cpuop_func op_b010_32_nf; +extern cpuop_func op_b010_32_ff; +extern cpuop_func op_b018_32_nf; +extern cpuop_func op_b018_32_ff; +extern cpuop_func op_b020_32_nf; +extern cpuop_func op_b020_32_ff; +extern cpuop_func op_b028_32_nf; +extern cpuop_func op_b028_32_ff; +extern cpuop_func op_b030_32_nf; +extern cpuop_func op_b030_32_ff; +extern cpuop_func op_b038_32_nf; +extern cpuop_func op_b038_32_ff; +extern cpuop_func op_b039_32_nf; +extern cpuop_func op_b039_32_ff; +extern cpuop_func op_b03a_32_nf; +extern cpuop_func op_b03a_32_ff; +extern cpuop_func op_b03b_32_nf; +extern cpuop_func op_b03b_32_ff; +extern cpuop_func op_b03c_32_nf; +extern cpuop_func op_b03c_32_ff; +extern cpuop_func op_b040_32_nf; +extern cpuop_func op_b040_32_ff; +extern cpuop_func op_b048_32_nf; +extern cpuop_func op_b048_32_ff; +extern cpuop_func op_b050_32_nf; +extern cpuop_func op_b050_32_ff; +extern cpuop_func op_b058_32_nf; +extern cpuop_func op_b058_32_ff; +extern cpuop_func op_b060_32_nf; +extern cpuop_func op_b060_32_ff; +extern cpuop_func op_b068_32_nf; +extern cpuop_func op_b068_32_ff; +extern cpuop_func op_b070_32_nf; +extern cpuop_func op_b070_32_ff; +extern cpuop_func op_b078_32_nf; +extern cpuop_func op_b078_32_ff; +extern cpuop_func op_b079_32_nf; +extern cpuop_func op_b079_32_ff; +extern cpuop_func op_b07a_32_nf; +extern cpuop_func op_b07a_32_ff; +extern cpuop_func op_b07b_32_nf; +extern cpuop_func op_b07b_32_ff; +extern cpuop_func op_b07c_32_nf; +extern cpuop_func op_b07c_32_ff; +extern cpuop_func op_b080_32_nf; +extern cpuop_func op_b080_32_ff; +extern cpuop_func op_b088_32_nf; +extern cpuop_func op_b088_32_ff; +extern cpuop_func op_b090_32_nf; +extern cpuop_func op_b090_32_ff; +extern cpuop_func op_b098_32_nf; +extern cpuop_func op_b098_32_ff; +extern cpuop_func op_b0a0_32_nf; +extern cpuop_func op_b0a0_32_ff; +extern cpuop_func op_b0a8_32_nf; +extern cpuop_func op_b0a8_32_ff; +extern cpuop_func op_b0b0_32_nf; +extern cpuop_func op_b0b0_32_ff; +extern cpuop_func op_b0b8_32_nf; +extern cpuop_func op_b0b8_32_ff; +extern cpuop_func op_b0b9_32_nf; +extern cpuop_func op_b0b9_32_ff; +extern cpuop_func op_b0ba_32_nf; +extern cpuop_func op_b0ba_32_ff; +extern cpuop_func op_b0bb_32_nf; +extern cpuop_func op_b0bb_32_ff; +extern cpuop_func op_b0bc_32_nf; +extern cpuop_func op_b0bc_32_ff; +extern cpuop_func op_b0c0_32_nf; +extern cpuop_func op_b0c0_32_ff; +extern cpuop_func op_b0c8_32_nf; +extern cpuop_func op_b0c8_32_ff; +extern cpuop_func op_b0d0_32_nf; +extern cpuop_func op_b0d0_32_ff; +extern cpuop_func op_b0d8_32_nf; +extern cpuop_func op_b0d8_32_ff; +extern cpuop_func op_b0e0_32_nf; +extern cpuop_func op_b0e0_32_ff; +extern cpuop_func op_b0e8_32_nf; +extern cpuop_func op_b0e8_32_ff; +extern cpuop_func op_b0f0_32_nf; +extern cpuop_func op_b0f0_32_ff; +extern cpuop_func op_b0f8_32_nf; +extern cpuop_func op_b0f8_32_ff; +extern cpuop_func op_b0f9_32_nf; +extern cpuop_func op_b0f9_32_ff; +extern cpuop_func op_b0fa_32_nf; +extern cpuop_func op_b0fa_32_ff; +extern cpuop_func op_b0fb_32_nf; +extern cpuop_func op_b0fb_32_ff; +extern cpuop_func op_b0fc_32_nf; +extern cpuop_func op_b0fc_32_ff; +extern cpuop_func op_b100_32_nf; +extern cpuop_func op_b100_32_ff; +extern cpuop_func op_b108_32_nf; +extern cpuop_func op_b108_32_ff; +extern cpuop_func op_b110_32_nf; +extern cpuop_func op_b110_32_ff; +extern cpuop_func op_b118_32_nf; +extern cpuop_func op_b118_32_ff; +extern cpuop_func op_b120_32_nf; +extern cpuop_func op_b120_32_ff; +extern cpuop_func op_b128_32_nf; +extern cpuop_func op_b128_32_ff; +extern cpuop_func op_b130_32_nf; +extern cpuop_func op_b130_32_ff; +extern cpuop_func op_b138_32_nf; +extern cpuop_func op_b138_32_ff; +extern cpuop_func op_b139_32_nf; +extern cpuop_func op_b139_32_ff; +extern cpuop_func op_b140_32_nf; +extern cpuop_func op_b140_32_ff; +extern cpuop_func op_b148_32_nf; +extern cpuop_func op_b148_32_ff; +extern cpuop_func op_b150_32_nf; +extern cpuop_func op_b150_32_ff; +extern cpuop_func op_b158_32_nf; +extern cpuop_func op_b158_32_ff; +extern cpuop_func op_b160_32_nf; +extern cpuop_func op_b160_32_ff; +extern cpuop_func op_b168_32_nf; +extern cpuop_func op_b168_32_ff; +extern cpuop_func op_b170_32_nf; +extern cpuop_func op_b170_32_ff; +extern cpuop_func op_b178_32_nf; +extern cpuop_func op_b178_32_ff; +extern cpuop_func op_b179_32_nf; +extern cpuop_func op_b179_32_ff; +extern cpuop_func op_b180_32_nf; +extern cpuop_func op_b180_32_ff; +extern cpuop_func op_b188_32_nf; +extern cpuop_func op_b188_32_ff; +extern cpuop_func op_b190_32_nf; +extern cpuop_func op_b190_32_ff; +extern cpuop_func op_b198_32_nf; +extern cpuop_func op_b198_32_ff; +extern cpuop_func op_b1a0_32_nf; +extern cpuop_func op_b1a0_32_ff; +extern cpuop_func op_b1a8_32_nf; +extern cpuop_func op_b1a8_32_ff; +extern cpuop_func op_b1b0_32_nf; +extern cpuop_func op_b1b0_32_ff; +extern cpuop_func op_b1b8_32_nf; +extern cpuop_func op_b1b8_32_ff; +extern cpuop_func op_b1b9_32_nf; +extern cpuop_func op_b1b9_32_ff; +extern cpuop_func op_b1c0_32_nf; +extern cpuop_func op_b1c0_32_ff; +extern cpuop_func op_b1c8_32_nf; +extern cpuop_func op_b1c8_32_ff; +extern cpuop_func op_b1d0_32_nf; +extern cpuop_func op_b1d0_32_ff; +extern cpuop_func op_b1d8_32_nf; +extern cpuop_func op_b1d8_32_ff; +extern cpuop_func op_b1e0_32_nf; +extern cpuop_func op_b1e0_32_ff; +extern cpuop_func op_b1e8_32_nf; +extern cpuop_func op_b1e8_32_ff; +extern cpuop_func op_b1f0_32_nf; +extern cpuop_func op_b1f0_32_ff; +extern cpuop_func op_b1f8_32_nf; +extern cpuop_func op_b1f8_32_ff; +extern cpuop_func op_b1f9_32_nf; +extern cpuop_func op_b1f9_32_ff; +extern cpuop_func op_b1fa_32_nf; +extern cpuop_func op_b1fa_32_ff; +extern cpuop_func op_b1fb_32_nf; +extern cpuop_func op_b1fb_32_ff; +extern cpuop_func op_b1fc_32_nf; +extern cpuop_func op_b1fc_32_ff; +extern cpuop_func op_c000_32_nf; +extern cpuop_func op_c000_32_ff; +extern cpuop_func op_c010_32_nf; +extern cpuop_func op_c010_32_ff; +extern cpuop_func op_c018_32_nf; +extern cpuop_func op_c018_32_ff; +extern cpuop_func op_c020_32_nf; +extern cpuop_func op_c020_32_ff; +extern cpuop_func op_c028_32_nf; +extern cpuop_func op_c028_32_ff; +extern cpuop_func op_c030_32_nf; +extern cpuop_func op_c030_32_ff; +extern cpuop_func op_c038_32_nf; +extern cpuop_func op_c038_32_ff; +extern cpuop_func op_c039_32_nf; +extern cpuop_func op_c039_32_ff; +extern cpuop_func op_c03a_32_nf; +extern cpuop_func op_c03a_32_ff; +extern cpuop_func op_c03b_32_nf; +extern cpuop_func op_c03b_32_ff; +extern cpuop_func op_c03c_32_nf; +extern cpuop_func op_c03c_32_ff; +extern cpuop_func op_c040_32_nf; +extern cpuop_func op_c040_32_ff; +extern cpuop_func op_c050_32_nf; +extern cpuop_func op_c050_32_ff; +extern cpuop_func op_c058_32_nf; +extern cpuop_func op_c058_32_ff; +extern cpuop_func op_c060_32_nf; +extern cpuop_func op_c060_32_ff; +extern cpuop_func op_c068_32_nf; +extern cpuop_func op_c068_32_ff; +extern cpuop_func op_c070_32_nf; +extern cpuop_func op_c070_32_ff; +extern cpuop_func op_c078_32_nf; +extern cpuop_func op_c078_32_ff; +extern cpuop_func op_c079_32_nf; +extern cpuop_func op_c079_32_ff; +extern cpuop_func op_c07a_32_nf; +extern cpuop_func op_c07a_32_ff; +extern cpuop_func op_c07b_32_nf; +extern cpuop_func op_c07b_32_ff; +extern cpuop_func op_c07c_32_nf; +extern cpuop_func op_c07c_32_ff; +extern cpuop_func op_c080_32_nf; +extern cpuop_func op_c080_32_ff; +extern cpuop_func op_c090_32_nf; +extern cpuop_func op_c090_32_ff; +extern cpuop_func op_c098_32_nf; +extern cpuop_func op_c098_32_ff; +extern cpuop_func op_c0a0_32_nf; +extern cpuop_func op_c0a0_32_ff; +extern cpuop_func op_c0a8_32_nf; +extern cpuop_func op_c0a8_32_ff; +extern cpuop_func op_c0b0_32_nf; +extern cpuop_func op_c0b0_32_ff; +extern cpuop_func op_c0b8_32_nf; +extern cpuop_func op_c0b8_32_ff; +extern cpuop_func op_c0b9_32_nf; +extern cpuop_func op_c0b9_32_ff; +extern cpuop_func op_c0ba_32_nf; +extern cpuop_func op_c0ba_32_ff; +extern cpuop_func op_c0bb_32_nf; +extern cpuop_func op_c0bb_32_ff; +extern cpuop_func op_c0bc_32_nf; +extern cpuop_func op_c0bc_32_ff; +extern cpuop_func op_c0c0_32_nf; +extern cpuop_func op_c0c0_32_ff; +extern cpuop_func op_c0d0_32_nf; +extern cpuop_func op_c0d0_32_ff; +extern cpuop_func op_c0d8_32_nf; +extern cpuop_func op_c0d8_32_ff; +extern cpuop_func op_c0e0_32_nf; +extern cpuop_func op_c0e0_32_ff; +extern cpuop_func op_c0e8_32_nf; +extern cpuop_func op_c0e8_32_ff; +extern cpuop_func op_c0f0_32_nf; +extern cpuop_func op_c0f0_32_ff; +extern cpuop_func op_c0f8_32_nf; +extern cpuop_func op_c0f8_32_ff; +extern cpuop_func op_c0f9_32_nf; +extern cpuop_func op_c0f9_32_ff; +extern cpuop_func op_c0fa_32_nf; +extern cpuop_func op_c0fa_32_ff; +extern cpuop_func op_c0fb_32_nf; +extern cpuop_func op_c0fb_32_ff; +extern cpuop_func op_c0fc_32_nf; +extern cpuop_func op_c0fc_32_ff; +extern cpuop_func op_c100_32_nf; +extern cpuop_func op_c100_32_ff; +extern cpuop_func op_c108_32_nf; +extern cpuop_func op_c108_32_ff; +extern cpuop_func op_c110_32_nf; +extern cpuop_func op_c110_32_ff; +extern cpuop_func op_c118_32_nf; +extern cpuop_func op_c118_32_ff; +extern cpuop_func op_c120_32_nf; +extern cpuop_func op_c120_32_ff; +extern cpuop_func op_c128_32_nf; +extern cpuop_func op_c128_32_ff; +extern cpuop_func op_c130_32_nf; +extern cpuop_func op_c130_32_ff; +extern cpuop_func op_c138_32_nf; +extern cpuop_func op_c138_32_ff; +extern cpuop_func op_c139_32_nf; +extern cpuop_func op_c139_32_ff; +extern cpuop_func op_c140_32_nf; +extern cpuop_func op_c140_32_ff; +extern cpuop_func op_c148_32_nf; +extern cpuop_func op_c148_32_ff; +extern cpuop_func op_c150_32_nf; +extern cpuop_func op_c150_32_ff; +extern cpuop_func op_c158_32_nf; +extern cpuop_func op_c158_32_ff; +extern cpuop_func op_c160_32_nf; +extern cpuop_func op_c160_32_ff; +extern cpuop_func op_c168_32_nf; +extern cpuop_func op_c168_32_ff; +extern cpuop_func op_c170_32_nf; +extern cpuop_func op_c170_32_ff; +extern cpuop_func op_c178_32_nf; +extern cpuop_func op_c178_32_ff; +extern cpuop_func op_c179_32_nf; +extern cpuop_func op_c179_32_ff; +extern cpuop_func op_c188_32_nf; +extern cpuop_func op_c188_32_ff; +extern cpuop_func op_c190_32_nf; +extern cpuop_func op_c190_32_ff; +extern cpuop_func op_c198_32_nf; +extern cpuop_func op_c198_32_ff; +extern cpuop_func op_c1a0_32_nf; +extern cpuop_func op_c1a0_32_ff; +extern cpuop_func op_c1a8_32_nf; +extern cpuop_func op_c1a8_32_ff; +extern cpuop_func op_c1b0_32_nf; +extern cpuop_func op_c1b0_32_ff; +extern cpuop_func op_c1b8_32_nf; +extern cpuop_func op_c1b8_32_ff; +extern cpuop_func op_c1b9_32_nf; +extern cpuop_func op_c1b9_32_ff; +extern cpuop_func op_c1c0_32_nf; +extern cpuop_func op_c1c0_32_ff; +extern cpuop_func op_c1d0_32_nf; +extern cpuop_func op_c1d0_32_ff; +extern cpuop_func op_c1d8_32_nf; +extern cpuop_func op_c1d8_32_ff; +extern cpuop_func op_c1e0_32_nf; +extern cpuop_func op_c1e0_32_ff; +extern cpuop_func op_c1e8_32_nf; +extern cpuop_func op_c1e8_32_ff; +extern cpuop_func op_c1f0_32_nf; +extern cpuop_func op_c1f0_32_ff; +extern cpuop_func op_c1f8_32_nf; +extern cpuop_func op_c1f8_32_ff; +extern cpuop_func op_c1f9_32_nf; +extern cpuop_func op_c1f9_32_ff; +extern cpuop_func op_c1fa_32_nf; +extern cpuop_func op_c1fa_32_ff; +extern cpuop_func op_c1fb_32_nf; +extern cpuop_func op_c1fb_32_ff; +extern cpuop_func op_c1fc_32_nf; +extern cpuop_func op_c1fc_32_ff; +extern cpuop_func op_d000_32_nf; +extern cpuop_func op_d000_32_ff; +extern cpuop_func op_d010_32_nf; +extern cpuop_func op_d010_32_ff; +extern cpuop_func op_d018_32_nf; +extern cpuop_func op_d018_32_ff; +extern cpuop_func op_d020_32_nf; +extern cpuop_func op_d020_32_ff; +extern cpuop_func op_d028_32_nf; +extern cpuop_func op_d028_32_ff; +extern cpuop_func op_d030_32_nf; +extern cpuop_func op_d030_32_ff; +extern cpuop_func op_d038_32_nf; +extern cpuop_func op_d038_32_ff; +extern cpuop_func op_d039_32_nf; +extern cpuop_func op_d039_32_ff; +extern cpuop_func op_d03a_32_nf; +extern cpuop_func op_d03a_32_ff; +extern cpuop_func op_d03b_32_nf; +extern cpuop_func op_d03b_32_ff; +extern cpuop_func op_d03c_32_nf; +extern cpuop_func op_d03c_32_ff; +extern cpuop_func op_d040_32_nf; +extern cpuop_func op_d040_32_ff; +extern cpuop_func op_d048_32_nf; +extern cpuop_func op_d048_32_ff; +extern cpuop_func op_d050_32_nf; +extern cpuop_func op_d050_32_ff; +extern cpuop_func op_d058_32_nf; +extern cpuop_func op_d058_32_ff; +extern cpuop_func op_d060_32_nf; +extern cpuop_func op_d060_32_ff; +extern cpuop_func op_d068_32_nf; +extern cpuop_func op_d068_32_ff; +extern cpuop_func op_d070_32_nf; +extern cpuop_func op_d070_32_ff; +extern cpuop_func op_d078_32_nf; +extern cpuop_func op_d078_32_ff; +extern cpuop_func op_d079_32_nf; +extern cpuop_func op_d079_32_ff; +extern cpuop_func op_d07a_32_nf; +extern cpuop_func op_d07a_32_ff; +extern cpuop_func op_d07b_32_nf; +extern cpuop_func op_d07b_32_ff; +extern cpuop_func op_d07c_32_nf; +extern cpuop_func op_d07c_32_ff; +extern cpuop_func op_d080_32_nf; +extern cpuop_func op_d080_32_ff; +extern cpuop_func op_d088_32_nf; +extern cpuop_func op_d088_32_ff; +extern cpuop_func op_d090_32_nf; +extern cpuop_func op_d090_32_ff; +extern cpuop_func op_d098_32_nf; +extern cpuop_func op_d098_32_ff; +extern cpuop_func op_d0a0_32_nf; +extern cpuop_func op_d0a0_32_ff; +extern cpuop_func op_d0a8_32_nf; +extern cpuop_func op_d0a8_32_ff; +extern cpuop_func op_d0b0_32_nf; +extern cpuop_func op_d0b0_32_ff; +extern cpuop_func op_d0b8_32_nf; +extern cpuop_func op_d0b8_32_ff; +extern cpuop_func op_d0b9_32_nf; +extern cpuop_func op_d0b9_32_ff; +extern cpuop_func op_d0ba_32_nf; +extern cpuop_func op_d0ba_32_ff; +extern cpuop_func op_d0bb_32_nf; +extern cpuop_func op_d0bb_32_ff; +extern cpuop_func op_d0bc_32_nf; +extern cpuop_func op_d0bc_32_ff; +extern cpuop_func op_d0c0_32_nf; +extern cpuop_func op_d0c0_32_ff; +extern cpuop_func op_d0c8_32_nf; +extern cpuop_func op_d0c8_32_ff; +extern cpuop_func op_d0d0_32_nf; +extern cpuop_func op_d0d0_32_ff; +extern cpuop_func op_d0d8_32_nf; +extern cpuop_func op_d0d8_32_ff; +extern cpuop_func op_d0e0_32_nf; +extern cpuop_func op_d0e0_32_ff; +extern cpuop_func op_d0e8_32_nf; +extern cpuop_func op_d0e8_32_ff; +extern cpuop_func op_d0f0_32_nf; +extern cpuop_func op_d0f0_32_ff; +extern cpuop_func op_d0f8_32_nf; +extern cpuop_func op_d0f8_32_ff; +extern cpuop_func op_d0f9_32_nf; +extern cpuop_func op_d0f9_32_ff; +extern cpuop_func op_d0fa_32_nf; +extern cpuop_func op_d0fa_32_ff; +extern cpuop_func op_d0fb_32_nf; +extern cpuop_func op_d0fb_32_ff; +extern cpuop_func op_d0fc_32_nf; +extern cpuop_func op_d0fc_32_ff; +extern cpuop_func op_d100_32_nf; +extern cpuop_func op_d100_32_ff; +extern cpuop_func op_d108_32_nf; +extern cpuop_func op_d108_32_ff; +extern cpuop_func op_d110_32_nf; +extern cpuop_func op_d110_32_ff; +extern cpuop_func op_d118_32_nf; +extern cpuop_func op_d118_32_ff; +extern cpuop_func op_d120_32_nf; +extern cpuop_func op_d120_32_ff; +extern cpuop_func op_d128_32_nf; +extern cpuop_func op_d128_32_ff; +extern cpuop_func op_d130_32_nf; +extern cpuop_func op_d130_32_ff; +extern cpuop_func op_d138_32_nf; +extern cpuop_func op_d138_32_ff; +extern cpuop_func op_d139_32_nf; +extern cpuop_func op_d139_32_ff; +extern cpuop_func op_d140_32_nf; +extern cpuop_func op_d140_32_ff; +extern cpuop_func op_d148_32_nf; +extern cpuop_func op_d148_32_ff; +extern cpuop_func op_d150_32_nf; +extern cpuop_func op_d150_32_ff; +extern cpuop_func op_d158_32_nf; +extern cpuop_func op_d158_32_ff; +extern cpuop_func op_d160_32_nf; +extern cpuop_func op_d160_32_ff; +extern cpuop_func op_d168_32_nf; +extern cpuop_func op_d168_32_ff; +extern cpuop_func op_d170_32_nf; +extern cpuop_func op_d170_32_ff; +extern cpuop_func op_d178_32_nf; +extern cpuop_func op_d178_32_ff; +extern cpuop_func op_d179_32_nf; +extern cpuop_func op_d179_32_ff; +extern cpuop_func op_d180_32_nf; +extern cpuop_func op_d180_32_ff; +extern cpuop_func op_d188_32_nf; +extern cpuop_func op_d188_32_ff; +extern cpuop_func op_d190_32_nf; +extern cpuop_func op_d190_32_ff; +extern cpuop_func op_d198_32_nf; +extern cpuop_func op_d198_32_ff; +extern cpuop_func op_d1a0_32_nf; +extern cpuop_func op_d1a0_32_ff; +extern cpuop_func op_d1a8_32_nf; +extern cpuop_func op_d1a8_32_ff; +extern cpuop_func op_d1b0_32_nf; +extern cpuop_func op_d1b0_32_ff; +extern cpuop_func op_d1b8_32_nf; +extern cpuop_func op_d1b8_32_ff; +extern cpuop_func op_d1b9_32_nf; +extern cpuop_func op_d1b9_32_ff; +extern cpuop_func op_d1c0_32_nf; +extern cpuop_func op_d1c0_32_ff; +extern cpuop_func op_d1c8_32_nf; +extern cpuop_func op_d1c8_32_ff; +extern cpuop_func op_d1d0_32_nf; +extern cpuop_func op_d1d0_32_ff; +extern cpuop_func op_d1d8_32_nf; +extern cpuop_func op_d1d8_32_ff; +extern cpuop_func op_d1e0_32_nf; +extern cpuop_func op_d1e0_32_ff; +extern cpuop_func op_d1e8_32_nf; +extern cpuop_func op_d1e8_32_ff; +extern cpuop_func op_d1f0_32_nf; +extern cpuop_func op_d1f0_32_ff; +extern cpuop_func op_d1f8_32_nf; +extern cpuop_func op_d1f8_32_ff; +extern cpuop_func op_d1f9_32_nf; +extern cpuop_func op_d1f9_32_ff; +extern cpuop_func op_d1fa_32_nf; +extern cpuop_func op_d1fa_32_ff; +extern cpuop_func op_d1fb_32_nf; +extern cpuop_func op_d1fb_32_ff; +extern cpuop_func op_d1fc_32_nf; +extern cpuop_func op_d1fc_32_ff; +extern cpuop_func op_e000_32_nf; +extern cpuop_func op_e000_32_ff; +extern cpuop_func op_e008_32_nf; +extern cpuop_func op_e008_32_ff; +extern cpuop_func op_e010_32_nf; +extern cpuop_func op_e010_32_ff; +extern cpuop_func op_e018_32_nf; +extern cpuop_func op_e018_32_ff; +extern cpuop_func op_e020_32_nf; +extern cpuop_func op_e020_32_ff; +extern cpuop_func op_e028_32_nf; +extern cpuop_func op_e028_32_ff; +extern cpuop_func op_e030_32_nf; +extern cpuop_func op_e030_32_ff; +extern cpuop_func op_e038_32_nf; +extern cpuop_func op_e038_32_ff; +extern cpuop_func op_e040_32_nf; +extern cpuop_func op_e040_32_ff; +extern cpuop_func op_e048_32_nf; +extern cpuop_func op_e048_32_ff; +extern cpuop_func op_e050_32_nf; +extern cpuop_func op_e050_32_ff; +extern cpuop_func op_e058_32_nf; +extern cpuop_func op_e058_32_ff; +extern cpuop_func op_e060_32_nf; +extern cpuop_func op_e060_32_ff; +extern cpuop_func op_e068_32_nf; +extern cpuop_func op_e068_32_ff; +extern cpuop_func op_e070_32_nf; +extern cpuop_func op_e070_32_ff; +extern cpuop_func op_e078_32_nf; +extern cpuop_func op_e078_32_ff; +extern cpuop_func op_e080_32_nf; +extern cpuop_func op_e080_32_ff; +extern cpuop_func op_e088_32_nf; +extern cpuop_func op_e088_32_ff; +extern cpuop_func op_e090_32_nf; +extern cpuop_func op_e090_32_ff; +extern cpuop_func op_e098_32_nf; +extern cpuop_func op_e098_32_ff; +extern cpuop_func op_e0a0_32_nf; +extern cpuop_func op_e0a0_32_ff; +extern cpuop_func op_e0a8_32_nf; +extern cpuop_func op_e0a8_32_ff; +extern cpuop_func op_e0b0_32_nf; +extern cpuop_func op_e0b0_32_ff; +extern cpuop_func op_e0b8_32_nf; +extern cpuop_func op_e0b8_32_ff; +extern cpuop_func op_e0d0_32_nf; +extern cpuop_func op_e0d0_32_ff; +extern cpuop_func op_e0d8_32_nf; +extern cpuop_func op_e0d8_32_ff; +extern cpuop_func op_e0e0_32_nf; +extern cpuop_func op_e0e0_32_ff; +extern cpuop_func op_e0e8_32_nf; +extern cpuop_func op_e0e8_32_ff; +extern cpuop_func op_e0f0_32_nf; +extern cpuop_func op_e0f0_32_ff; +extern cpuop_func op_e0f8_32_nf; +extern cpuop_func op_e0f8_32_ff; +extern cpuop_func op_e0f9_32_nf; +extern cpuop_func op_e0f9_32_ff; +extern cpuop_func op_e100_32_nf; +extern cpuop_func op_e100_32_ff; +extern cpuop_func op_e108_32_nf; +extern cpuop_func op_e108_32_ff; +extern cpuop_func op_e110_32_nf; +extern cpuop_func op_e110_32_ff; +extern cpuop_func op_e118_32_nf; +extern cpuop_func op_e118_32_ff; +extern cpuop_func op_e120_32_nf; +extern cpuop_func op_e120_32_ff; +extern cpuop_func op_e128_32_nf; +extern cpuop_func op_e128_32_ff; +extern cpuop_func op_e130_32_nf; +extern cpuop_func op_e130_32_ff; +extern cpuop_func op_e138_32_nf; +extern cpuop_func op_e138_32_ff; +extern cpuop_func op_e140_32_nf; +extern cpuop_func op_e140_32_ff; +extern cpuop_func op_e148_32_nf; +extern cpuop_func op_e148_32_ff; +extern cpuop_func op_e150_32_nf; +extern cpuop_func op_e150_32_ff; +extern cpuop_func op_e158_32_nf; +extern cpuop_func op_e158_32_ff; +extern cpuop_func op_e160_32_nf; +extern cpuop_func op_e160_32_ff; +extern cpuop_func op_e168_32_nf; +extern cpuop_func op_e168_32_ff; +extern cpuop_func op_e170_32_nf; +extern cpuop_func op_e170_32_ff; +extern cpuop_func op_e178_32_nf; +extern cpuop_func op_e178_32_ff; +extern cpuop_func op_e180_32_nf; +extern cpuop_func op_e180_32_ff; +extern cpuop_func op_e188_32_nf; +extern cpuop_func op_e188_32_ff; +extern cpuop_func op_e190_32_nf; +extern cpuop_func op_e190_32_ff; +extern cpuop_func op_e198_32_nf; +extern cpuop_func op_e198_32_ff; +extern cpuop_func op_e1a0_32_nf; +extern cpuop_func op_e1a0_32_ff; +extern cpuop_func op_e1a8_32_nf; +extern cpuop_func op_e1a8_32_ff; +extern cpuop_func op_e1b0_32_nf; +extern cpuop_func op_e1b0_32_ff; +extern cpuop_func op_e1b8_32_nf; +extern cpuop_func op_e1b8_32_ff; +extern cpuop_func op_e1d0_32_nf; +extern cpuop_func op_e1d0_32_ff; +extern cpuop_func op_e1d8_32_nf; +extern cpuop_func op_e1d8_32_ff; +extern cpuop_func op_e1e0_32_nf; +extern cpuop_func op_e1e0_32_ff; +extern cpuop_func op_e1e8_32_nf; +extern cpuop_func op_e1e8_32_ff; +extern cpuop_func op_e1f0_32_nf; +extern cpuop_func op_e1f0_32_ff; +extern cpuop_func op_e1f8_32_nf; +extern cpuop_func op_e1f8_32_ff; +extern cpuop_func op_e1f9_32_nf; +extern cpuop_func op_e1f9_32_ff; +extern cpuop_func op_e2d0_32_nf; +extern cpuop_func op_e2d0_32_ff; +extern cpuop_func op_e2d8_32_nf; +extern cpuop_func op_e2d8_32_ff; +extern cpuop_func op_e2e0_32_nf; +extern cpuop_func op_e2e0_32_ff; +extern cpuop_func op_e2e8_32_nf; +extern cpuop_func op_e2e8_32_ff; +extern cpuop_func op_e2f0_32_nf; +extern cpuop_func op_e2f0_32_ff; +extern cpuop_func op_e2f8_32_nf; +extern cpuop_func op_e2f8_32_ff; +extern cpuop_func op_e2f9_32_nf; +extern cpuop_func op_e2f9_32_ff; +extern cpuop_func op_e3d0_32_nf; +extern cpuop_func op_e3d0_32_ff; +extern cpuop_func op_e3d8_32_nf; +extern cpuop_func op_e3d8_32_ff; +extern cpuop_func op_e3e0_32_nf; +extern cpuop_func op_e3e0_32_ff; +extern cpuop_func op_e3e8_32_nf; +extern cpuop_func op_e3e8_32_ff; +extern cpuop_func op_e3f0_32_nf; +extern cpuop_func op_e3f0_32_ff; +extern cpuop_func op_e3f8_32_nf; +extern cpuop_func op_e3f8_32_ff; +extern cpuop_func op_e3f9_32_nf; +extern cpuop_func op_e3f9_32_ff; +extern cpuop_func op_e4d0_32_nf; +extern cpuop_func op_e4d0_32_ff; +extern cpuop_func op_e4d8_32_nf; +extern cpuop_func op_e4d8_32_ff; +extern cpuop_func op_e4e0_32_nf; +extern cpuop_func op_e4e0_32_ff; +extern cpuop_func op_e4e8_32_nf; +extern cpuop_func op_e4e8_32_ff; +extern cpuop_func op_e4f0_32_nf; +extern cpuop_func op_e4f0_32_ff; +extern cpuop_func op_e4f8_32_nf; +extern cpuop_func op_e4f8_32_ff; +extern cpuop_func op_e4f9_32_nf; +extern cpuop_func op_e4f9_32_ff; +extern cpuop_func op_e5d0_32_nf; +extern cpuop_func op_e5d0_32_ff; +extern cpuop_func op_e5d8_32_nf; +extern cpuop_func op_e5d8_32_ff; +extern cpuop_func op_e5e0_32_nf; +extern cpuop_func op_e5e0_32_ff; +extern cpuop_func op_e5e8_32_nf; +extern cpuop_func op_e5e8_32_ff; +extern cpuop_func op_e5f0_32_nf; +extern cpuop_func op_e5f0_32_ff; +extern cpuop_func op_e5f8_32_nf; +extern cpuop_func op_e5f8_32_ff; +extern cpuop_func op_e5f9_32_nf; +extern cpuop_func op_e5f9_32_ff; +extern cpuop_func op_e6d0_32_nf; +extern cpuop_func op_e6d0_32_ff; +extern cpuop_func op_e6d8_32_nf; +extern cpuop_func op_e6d8_32_ff; +extern cpuop_func op_e6e0_32_nf; +extern cpuop_func op_e6e0_32_ff; +extern cpuop_func op_e6e8_32_nf; +extern cpuop_func op_e6e8_32_ff; +extern cpuop_func op_e6f0_32_nf; +extern cpuop_func op_e6f0_32_ff; +extern cpuop_func op_e6f8_32_nf; +extern cpuop_func op_e6f8_32_ff; +extern cpuop_func op_e6f9_32_nf; +extern cpuop_func op_e6f9_32_ff; +extern cpuop_func op_e7d0_32_nf; +extern cpuop_func op_e7d0_32_ff; +extern cpuop_func op_e7d8_32_nf; +extern cpuop_func op_e7d8_32_ff; +extern cpuop_func op_e7e0_32_nf; +extern cpuop_func op_e7e0_32_ff; +extern cpuop_func op_e7e8_32_nf; +extern cpuop_func op_e7e8_32_ff; +extern cpuop_func op_e7f0_32_nf; +extern cpuop_func op_e7f0_32_ff; +extern cpuop_func op_e7f8_32_nf; +extern cpuop_func op_e7f8_32_ff; +extern cpuop_func op_e7f9_32_nf; +extern cpuop_func op_e7f9_32_ff; +extern cpuop_func op_e8c0_32_nf; +extern cpuop_func op_e8c0_32_ff; +extern cpuop_func op_e8d0_32_nf; +extern cpuop_func op_e8d0_32_ff; +extern cpuop_func op_e8e8_32_nf; +extern cpuop_func op_e8e8_32_ff; +extern cpuop_func op_e8f0_32_nf; +extern cpuop_func op_e8f0_32_ff; +extern cpuop_func op_e8f8_32_nf; +extern cpuop_func op_e8f8_32_ff; +extern cpuop_func op_e8f9_32_nf; +extern cpuop_func op_e8f9_32_ff; +extern cpuop_func op_e8fa_32_nf; +extern cpuop_func op_e8fa_32_ff; +extern cpuop_func op_e8fb_32_nf; +extern cpuop_func op_e8fb_32_ff; +extern cpuop_func op_e9c0_32_nf; +extern cpuop_func op_e9c0_32_ff; +extern cpuop_func op_e9d0_32_nf; +extern cpuop_func op_e9d0_32_ff; +extern cpuop_func op_e9e8_32_nf; +extern cpuop_func op_e9e8_32_ff; +extern cpuop_func op_e9f0_32_nf; +extern cpuop_func op_e9f0_32_ff; +extern cpuop_func op_e9f8_32_nf; +extern cpuop_func op_e9f8_32_ff; +extern cpuop_func op_e9f9_32_nf; +extern cpuop_func op_e9f9_32_ff; +extern cpuop_func op_e9fa_32_nf; +extern cpuop_func op_e9fa_32_ff; +extern cpuop_func op_e9fb_32_nf; +extern cpuop_func op_e9fb_32_ff; +extern cpuop_func op_eac0_32_nf; +extern cpuop_func op_eac0_32_ff; +extern cpuop_func op_ead0_32_nf; +extern cpuop_func op_ead0_32_ff; +extern cpuop_func op_eae8_32_nf; +extern cpuop_func op_eae8_32_ff; +extern cpuop_func op_eaf0_32_nf; +extern cpuop_func op_eaf0_32_ff; +extern cpuop_func op_eaf8_32_nf; +extern cpuop_func op_eaf8_32_ff; +extern cpuop_func op_eaf9_32_nf; +extern cpuop_func op_eaf9_32_ff; +extern cpuop_func op_ebc0_32_nf; +extern cpuop_func op_ebc0_32_ff; +extern cpuop_func op_ebd0_32_nf; +extern cpuop_func op_ebd0_32_ff; +extern cpuop_func op_ebe8_32_nf; +extern cpuop_func op_ebe8_32_ff; +extern cpuop_func op_ebf0_32_nf; +extern cpuop_func op_ebf0_32_ff; +extern cpuop_func op_ebf8_32_nf; +extern cpuop_func op_ebf8_32_ff; +extern cpuop_func op_ebf9_32_nf; +extern cpuop_func op_ebf9_32_ff; +extern cpuop_func op_ebfa_32_nf; +extern cpuop_func op_ebfa_32_ff; +extern cpuop_func op_ebfb_32_nf; +extern cpuop_func op_ebfb_32_ff; +extern cpuop_func op_ecc0_32_nf; +extern cpuop_func op_ecc0_32_ff; +extern cpuop_func op_ecd0_32_nf; +extern cpuop_func op_ecd0_32_ff; +extern cpuop_func op_ece8_32_nf; +extern cpuop_func op_ece8_32_ff; +extern cpuop_func op_ecf0_32_nf; +extern cpuop_func op_ecf0_32_ff; +extern cpuop_func op_ecf8_32_nf; +extern cpuop_func op_ecf8_32_ff; +extern cpuop_func op_ecf9_32_nf; +extern cpuop_func op_ecf9_32_ff; +extern cpuop_func op_edc0_32_nf; +extern cpuop_func op_edc0_32_ff; +extern cpuop_func op_edd0_32_nf; +extern cpuop_func op_edd0_32_ff; +extern cpuop_func op_ede8_32_nf; +extern cpuop_func op_ede8_32_ff; +extern cpuop_func op_edf0_32_nf; +extern cpuop_func op_edf0_32_ff; +extern cpuop_func op_edf8_32_nf; +extern cpuop_func op_edf8_32_ff; +extern cpuop_func op_edf9_32_nf; +extern cpuop_func op_edf9_32_ff; +extern cpuop_func op_edfa_32_nf; +extern cpuop_func op_edfa_32_ff; +extern cpuop_func op_edfb_32_nf; +extern cpuop_func op_edfb_32_ff; +extern cpuop_func op_eec0_32_nf; +extern cpuop_func op_eec0_32_ff; +extern cpuop_func op_eed0_32_nf; +extern cpuop_func op_eed0_32_ff; +extern cpuop_func op_eee8_32_nf; +extern cpuop_func op_eee8_32_ff; +extern cpuop_func op_eef0_32_nf; +extern cpuop_func op_eef0_32_ff; +extern cpuop_func op_eef8_32_nf; +extern cpuop_func op_eef8_32_ff; +extern cpuop_func op_eef9_32_nf; +extern cpuop_func op_eef9_32_ff; +extern cpuop_func op_efc0_32_nf; +extern cpuop_func op_efc0_32_ff; +extern cpuop_func op_efd0_32_nf; +extern cpuop_func op_efd0_32_ff; +extern cpuop_func op_efe8_32_nf; +extern cpuop_func op_efe8_32_ff; +extern cpuop_func op_eff0_32_nf; +extern cpuop_func op_eff0_32_ff; +extern cpuop_func op_eff8_32_nf; +extern cpuop_func op_eff8_32_ff; +extern cpuop_func op_eff9_32_nf; +extern cpuop_func op_eff9_32_ff; +extern cpuop_func op_f000_32_nf; +extern cpuop_func op_f000_32_ff; +extern cpuop_func op_f008_32_nf; +extern cpuop_func op_f008_32_ff; +extern cpuop_func op_f010_32_nf; +extern cpuop_func op_f010_32_ff; +extern cpuop_func op_f018_32_nf; +extern cpuop_func op_f018_32_ff; +extern cpuop_func op_f020_32_nf; +extern cpuop_func op_f020_32_ff; +extern cpuop_func op_f028_32_nf; +extern cpuop_func op_f028_32_ff; +extern cpuop_func op_f030_32_nf; +extern cpuop_func op_f030_32_ff; +extern cpuop_func op_f038_32_nf; +extern cpuop_func op_f038_32_ff; +extern cpuop_func op_f039_32_nf; +extern cpuop_func op_f039_32_ff; +extern cpuop_func op_f200_32_nf; +extern cpuop_func op_f200_32_ff; +extern cpuop_func op_f208_32_nf; +extern cpuop_func op_f208_32_ff; +extern cpuop_func op_f210_32_nf; +extern cpuop_func op_f210_32_ff; +extern cpuop_func op_f218_32_nf; +extern cpuop_func op_f218_32_ff; +extern cpuop_func op_f220_32_nf; +extern cpuop_func op_f220_32_ff; +extern cpuop_func op_f228_32_nf; +extern cpuop_func op_f228_32_ff; +extern cpuop_func op_f230_32_nf; +extern cpuop_func op_f230_32_ff; +extern cpuop_func op_f238_32_nf; +extern cpuop_func op_f238_32_ff; +extern cpuop_func op_f239_32_nf; +extern cpuop_func op_f239_32_ff; +extern cpuop_func op_f23a_32_nf; +extern cpuop_func op_f23a_32_ff; +extern cpuop_func op_f23b_32_nf; +extern cpuop_func op_f23b_32_ff; +extern cpuop_func op_f23c_32_nf; +extern cpuop_func op_f23c_32_ff; +extern cpuop_func op_f240_32_nf; +extern cpuop_func op_f240_32_ff; +extern cpuop_func op_f248_32_nf; +extern cpuop_func op_f248_32_ff; +extern cpuop_func op_f250_32_nf; +extern cpuop_func op_f250_32_ff; +extern cpuop_func op_f258_32_nf; +extern cpuop_func op_f258_32_ff; +extern cpuop_func op_f260_32_nf; +extern cpuop_func op_f260_32_ff; +extern cpuop_func op_f268_32_nf; +extern cpuop_func op_f268_32_ff; +extern cpuop_func op_f270_32_nf; +extern cpuop_func op_f270_32_ff; +extern cpuop_func op_f278_32_nf; +extern cpuop_func op_f278_32_ff; +extern cpuop_func op_f279_32_nf; +extern cpuop_func op_f279_32_ff; +extern cpuop_func op_f27a_32_nf; +extern cpuop_func op_f27a_32_ff; +extern cpuop_func op_f27b_32_nf; +extern cpuop_func op_f27b_32_ff; +extern cpuop_func op_f27c_32_nf; +extern cpuop_func op_f27c_32_ff; +extern cpuop_func op_f280_32_nf; +extern cpuop_func op_f280_32_ff; +extern cpuop_func op_f2c0_32_nf; +extern cpuop_func op_f2c0_32_ff; +extern cpuop_func op_f310_32_nf; +extern cpuop_func op_f310_32_ff; +extern cpuop_func op_f320_32_nf; +extern cpuop_func op_f320_32_ff; +extern cpuop_func op_f328_32_nf; +extern cpuop_func op_f328_32_ff; +extern cpuop_func op_f330_32_nf; +extern cpuop_func op_f330_32_ff; +extern cpuop_func op_f338_32_nf; +extern cpuop_func op_f338_32_ff; +extern cpuop_func op_f339_32_nf; +extern cpuop_func op_f339_32_ff; +extern cpuop_func op_f350_32_nf; +extern cpuop_func op_f350_32_ff; +extern cpuop_func op_f358_32_nf; +extern cpuop_func op_f358_32_ff; +extern cpuop_func op_f368_32_nf; +extern cpuop_func op_f368_32_ff; +extern cpuop_func op_f370_32_nf; +extern cpuop_func op_f370_32_ff; +extern cpuop_func op_f378_32_nf; +extern cpuop_func op_f378_32_ff; +extern cpuop_func op_f379_32_nf; +extern cpuop_func op_f379_32_ff; +extern cpuop_func op_f37a_32_nf; +extern cpuop_func op_f37a_32_ff; +extern cpuop_func op_f37b_32_nf; +extern cpuop_func op_f37b_32_ff; +extern cpuop_func op_0000_33_nf; +extern cpuop_func op_0000_33_ff; +extern cpuop_func op_0010_33_nf; +extern cpuop_func op_0010_33_ff; +extern cpuop_func op_0018_33_nf; +extern cpuop_func op_0018_33_ff; +extern cpuop_func op_0020_33_nf; +extern cpuop_func op_0020_33_ff; +extern cpuop_func op_0028_33_nf; +extern cpuop_func op_0028_33_ff; +extern cpuop_func op_0030_33_nf; +extern cpuop_func op_0030_33_ff; +extern cpuop_func op_0038_33_nf; +extern cpuop_func op_0038_33_ff; +extern cpuop_func op_0039_33_nf; +extern cpuop_func op_0039_33_ff; +extern cpuop_func op_003c_33_nf; +extern cpuop_func op_003c_33_ff; +extern cpuop_func op_0040_33_nf; +extern cpuop_func op_0040_33_ff; +extern cpuop_func op_0050_33_nf; +extern cpuop_func op_0050_33_ff; +extern cpuop_func op_0058_33_nf; +extern cpuop_func op_0058_33_ff; +extern cpuop_func op_0060_33_nf; +extern cpuop_func op_0060_33_ff; +extern cpuop_func op_0068_33_nf; +extern cpuop_func op_0068_33_ff; +extern cpuop_func op_0070_33_nf; +extern cpuop_func op_0070_33_ff; +extern cpuop_func op_0078_33_nf; +extern cpuop_func op_0078_33_ff; +extern cpuop_func op_0079_33_nf; +extern cpuop_func op_0079_33_ff; +extern cpuop_func op_007c_33_nf; +extern cpuop_func op_007c_33_ff; +extern cpuop_func op_0080_33_nf; +extern cpuop_func op_0080_33_ff; +extern cpuop_func op_0090_33_nf; +extern cpuop_func op_0090_33_ff; +extern cpuop_func op_0098_33_nf; +extern cpuop_func op_0098_33_ff; +extern cpuop_func op_00a0_33_nf; +extern cpuop_func op_00a0_33_ff; +extern cpuop_func op_00a8_33_nf; +extern cpuop_func op_00a8_33_ff; +extern cpuop_func op_00b0_33_nf; +extern cpuop_func op_00b0_33_ff; +extern cpuop_func op_00b8_33_nf; +extern cpuop_func op_00b8_33_ff; +extern cpuop_func op_00b9_33_nf; +extern cpuop_func op_00b9_33_ff; +extern cpuop_func op_00d0_33_nf; +extern cpuop_func op_00d0_33_ff; +extern cpuop_func op_00e8_33_nf; +extern cpuop_func op_00e8_33_ff; +extern cpuop_func op_00f0_33_nf; +extern cpuop_func op_00f0_33_ff; +extern cpuop_func op_00f8_33_nf; +extern cpuop_func op_00f8_33_ff; +extern cpuop_func op_00f9_33_nf; +extern cpuop_func op_00f9_33_ff; +extern cpuop_func op_00fa_33_nf; +extern cpuop_func op_00fa_33_ff; +extern cpuop_func op_00fb_33_nf; +extern cpuop_func op_00fb_33_ff; +extern cpuop_func op_0100_33_nf; +extern cpuop_func op_0100_33_ff; +extern cpuop_func op_0108_33_nf; +extern cpuop_func op_0108_33_ff; +extern cpuop_func op_0110_33_nf; +extern cpuop_func op_0110_33_ff; +extern cpuop_func op_0118_33_nf; +extern cpuop_func op_0118_33_ff; +extern cpuop_func op_0120_33_nf; +extern cpuop_func op_0120_33_ff; +extern cpuop_func op_0128_33_nf; +extern cpuop_func op_0128_33_ff; +extern cpuop_func op_0130_33_nf; +extern cpuop_func op_0130_33_ff; +extern cpuop_func op_0138_33_nf; +extern cpuop_func op_0138_33_ff; +extern cpuop_func op_0139_33_nf; +extern cpuop_func op_0139_33_ff; +extern cpuop_func op_013a_33_nf; +extern cpuop_func op_013a_33_ff; +extern cpuop_func op_013b_33_nf; +extern cpuop_func op_013b_33_ff; +extern cpuop_func op_013c_33_nf; +extern cpuop_func op_013c_33_ff; +extern cpuop_func op_0140_33_nf; +extern cpuop_func op_0140_33_ff; +extern cpuop_func op_0148_33_nf; +extern cpuop_func op_0148_33_ff; +extern cpuop_func op_0150_33_nf; +extern cpuop_func op_0150_33_ff; +extern cpuop_func op_0158_33_nf; +extern cpuop_func op_0158_33_ff; +extern cpuop_func op_0160_33_nf; +extern cpuop_func op_0160_33_ff; +extern cpuop_func op_0168_33_nf; +extern cpuop_func op_0168_33_ff; +extern cpuop_func op_0170_33_nf; +extern cpuop_func op_0170_33_ff; +extern cpuop_func op_0178_33_nf; +extern cpuop_func op_0178_33_ff; +extern cpuop_func op_0179_33_nf; +extern cpuop_func op_0179_33_ff; +extern cpuop_func op_0180_33_nf; +extern cpuop_func op_0180_33_ff; +extern cpuop_func op_0188_33_nf; +extern cpuop_func op_0188_33_ff; +extern cpuop_func op_0190_33_nf; +extern cpuop_func op_0190_33_ff; +extern cpuop_func op_0198_33_nf; +extern cpuop_func op_0198_33_ff; +extern cpuop_func op_01a0_33_nf; +extern cpuop_func op_01a0_33_ff; +extern cpuop_func op_01a8_33_nf; +extern cpuop_func op_01a8_33_ff; +extern cpuop_func op_01b0_33_nf; +extern cpuop_func op_01b0_33_ff; +extern cpuop_func op_01b8_33_nf; +extern cpuop_func op_01b8_33_ff; +extern cpuop_func op_01b9_33_nf; +extern cpuop_func op_01b9_33_ff; +extern cpuop_func op_01c0_33_nf; +extern cpuop_func op_01c0_33_ff; +extern cpuop_func op_01c8_33_nf; +extern cpuop_func op_01c8_33_ff; +extern cpuop_func op_01d0_33_nf; +extern cpuop_func op_01d0_33_ff; +extern cpuop_func op_01d8_33_nf; +extern cpuop_func op_01d8_33_ff; +extern cpuop_func op_01e0_33_nf; +extern cpuop_func op_01e0_33_ff; +extern cpuop_func op_01e8_33_nf; +extern cpuop_func op_01e8_33_ff; +extern cpuop_func op_01f0_33_nf; +extern cpuop_func op_01f0_33_ff; +extern cpuop_func op_01f8_33_nf; +extern cpuop_func op_01f8_33_ff; +extern cpuop_func op_01f9_33_nf; +extern cpuop_func op_01f9_33_ff; +extern cpuop_func op_0200_33_nf; +extern cpuop_func op_0200_33_ff; +extern cpuop_func op_0210_33_nf; +extern cpuop_func op_0210_33_ff; +extern cpuop_func op_0218_33_nf; +extern cpuop_func op_0218_33_ff; +extern cpuop_func op_0220_33_nf; +extern cpuop_func op_0220_33_ff; +extern cpuop_func op_0228_33_nf; +extern cpuop_func op_0228_33_ff; +extern cpuop_func op_0230_33_nf; +extern cpuop_func op_0230_33_ff; +extern cpuop_func op_0238_33_nf; +extern cpuop_func op_0238_33_ff; +extern cpuop_func op_0239_33_nf; +extern cpuop_func op_0239_33_ff; +extern cpuop_func op_023c_33_nf; +extern cpuop_func op_023c_33_ff; +extern cpuop_func op_0240_33_nf; +extern cpuop_func op_0240_33_ff; +extern cpuop_func op_0250_33_nf; +extern cpuop_func op_0250_33_ff; +extern cpuop_func op_0258_33_nf; +extern cpuop_func op_0258_33_ff; +extern cpuop_func op_0260_33_nf; +extern cpuop_func op_0260_33_ff; +extern cpuop_func op_0268_33_nf; +extern cpuop_func op_0268_33_ff; +extern cpuop_func op_0270_33_nf; +extern cpuop_func op_0270_33_ff; +extern cpuop_func op_0278_33_nf; +extern cpuop_func op_0278_33_ff; +extern cpuop_func op_0279_33_nf; +extern cpuop_func op_0279_33_ff; +extern cpuop_func op_027c_33_nf; +extern cpuop_func op_027c_33_ff; +extern cpuop_func op_0280_33_nf; +extern cpuop_func op_0280_33_ff; +extern cpuop_func op_0290_33_nf; +extern cpuop_func op_0290_33_ff; +extern cpuop_func op_0298_33_nf; +extern cpuop_func op_0298_33_ff; +extern cpuop_func op_02a0_33_nf; +extern cpuop_func op_02a0_33_ff; +extern cpuop_func op_02a8_33_nf; +extern cpuop_func op_02a8_33_ff; +extern cpuop_func op_02b0_33_nf; +extern cpuop_func op_02b0_33_ff; +extern cpuop_func op_02b8_33_nf; +extern cpuop_func op_02b8_33_ff; +extern cpuop_func op_02b9_33_nf; +extern cpuop_func op_02b9_33_ff; +extern cpuop_func op_02d0_33_nf; +extern cpuop_func op_02d0_33_ff; +extern cpuop_func op_02e8_33_nf; +extern cpuop_func op_02e8_33_ff; +extern cpuop_func op_02f0_33_nf; +extern cpuop_func op_02f0_33_ff; +extern cpuop_func op_02f8_33_nf; +extern cpuop_func op_02f8_33_ff; +extern cpuop_func op_02f9_33_nf; +extern cpuop_func op_02f9_33_ff; +extern cpuop_func op_02fa_33_nf; +extern cpuop_func op_02fa_33_ff; +extern cpuop_func op_02fb_33_nf; +extern cpuop_func op_02fb_33_ff; +extern cpuop_func op_0400_33_nf; +extern cpuop_func op_0400_33_ff; +extern cpuop_func op_0410_33_nf; +extern cpuop_func op_0410_33_ff; +extern cpuop_func op_0418_33_nf; +extern cpuop_func op_0418_33_ff; +extern cpuop_func op_0420_33_nf; +extern cpuop_func op_0420_33_ff; +extern cpuop_func op_0428_33_nf; +extern cpuop_func op_0428_33_ff; +extern cpuop_func op_0430_33_nf; +extern cpuop_func op_0430_33_ff; +extern cpuop_func op_0438_33_nf; +extern cpuop_func op_0438_33_ff; +extern cpuop_func op_0439_33_nf; +extern cpuop_func op_0439_33_ff; +extern cpuop_func op_0440_33_nf; +extern cpuop_func op_0440_33_ff; +extern cpuop_func op_0450_33_nf; +extern cpuop_func op_0450_33_ff; +extern cpuop_func op_0458_33_nf; +extern cpuop_func op_0458_33_ff; +extern cpuop_func op_0460_33_nf; +extern cpuop_func op_0460_33_ff; +extern cpuop_func op_0468_33_nf; +extern cpuop_func op_0468_33_ff; +extern cpuop_func op_0470_33_nf; +extern cpuop_func op_0470_33_ff; +extern cpuop_func op_0478_33_nf; +extern cpuop_func op_0478_33_ff; +extern cpuop_func op_0479_33_nf; +extern cpuop_func op_0479_33_ff; +extern cpuop_func op_0480_33_nf; +extern cpuop_func op_0480_33_ff; +extern cpuop_func op_0490_33_nf; +extern cpuop_func op_0490_33_ff; +extern cpuop_func op_0498_33_nf; +extern cpuop_func op_0498_33_ff; +extern cpuop_func op_04a0_33_nf; +extern cpuop_func op_04a0_33_ff; +extern cpuop_func op_04a8_33_nf; +extern cpuop_func op_04a8_33_ff; +extern cpuop_func op_04b0_33_nf; +extern cpuop_func op_04b0_33_ff; +extern cpuop_func op_04b8_33_nf; +extern cpuop_func op_04b8_33_ff; +extern cpuop_func op_04b9_33_nf; +extern cpuop_func op_04b9_33_ff; +extern cpuop_func op_04d0_33_nf; +extern cpuop_func op_04d0_33_ff; +extern cpuop_func op_04e8_33_nf; +extern cpuop_func op_04e8_33_ff; +extern cpuop_func op_04f0_33_nf; +extern cpuop_func op_04f0_33_ff; +extern cpuop_func op_04f8_33_nf; +extern cpuop_func op_04f8_33_ff; +extern cpuop_func op_04f9_33_nf; +extern cpuop_func op_04f9_33_ff; +extern cpuop_func op_04fa_33_nf; +extern cpuop_func op_04fa_33_ff; +extern cpuop_func op_04fb_33_nf; +extern cpuop_func op_04fb_33_ff; +extern cpuop_func op_0600_33_nf; +extern cpuop_func op_0600_33_ff; +extern cpuop_func op_0610_33_nf; +extern cpuop_func op_0610_33_ff; +extern cpuop_func op_0618_33_nf; +extern cpuop_func op_0618_33_ff; +extern cpuop_func op_0620_33_nf; +extern cpuop_func op_0620_33_ff; +extern cpuop_func op_0628_33_nf; +extern cpuop_func op_0628_33_ff; +extern cpuop_func op_0630_33_nf; +extern cpuop_func op_0630_33_ff; +extern cpuop_func op_0638_33_nf; +extern cpuop_func op_0638_33_ff; +extern cpuop_func op_0639_33_nf; +extern cpuop_func op_0639_33_ff; +extern cpuop_func op_0640_33_nf; +extern cpuop_func op_0640_33_ff; +extern cpuop_func op_0650_33_nf; +extern cpuop_func op_0650_33_ff; +extern cpuop_func op_0658_33_nf; +extern cpuop_func op_0658_33_ff; +extern cpuop_func op_0660_33_nf; +extern cpuop_func op_0660_33_ff; +extern cpuop_func op_0668_33_nf; +extern cpuop_func op_0668_33_ff; +extern cpuop_func op_0670_33_nf; +extern cpuop_func op_0670_33_ff; +extern cpuop_func op_0678_33_nf; +extern cpuop_func op_0678_33_ff; +extern cpuop_func op_0679_33_nf; +extern cpuop_func op_0679_33_ff; +extern cpuop_func op_0680_33_nf; +extern cpuop_func op_0680_33_ff; +extern cpuop_func op_0690_33_nf; +extern cpuop_func op_0690_33_ff; +extern cpuop_func op_0698_33_nf; +extern cpuop_func op_0698_33_ff; +extern cpuop_func op_06a0_33_nf; +extern cpuop_func op_06a0_33_ff; +extern cpuop_func op_06a8_33_nf; +extern cpuop_func op_06a8_33_ff; +extern cpuop_func op_06b0_33_nf; +extern cpuop_func op_06b0_33_ff; +extern cpuop_func op_06b8_33_nf; +extern cpuop_func op_06b8_33_ff; +extern cpuop_func op_06b9_33_nf; +extern cpuop_func op_06b9_33_ff; +extern cpuop_func op_06c0_33_nf; +extern cpuop_func op_06c0_33_ff; +extern cpuop_func op_06c8_33_nf; +extern cpuop_func op_06c8_33_ff; +extern cpuop_func op_06d0_33_nf; +extern cpuop_func op_06d0_33_ff; +extern cpuop_func op_06e8_33_nf; +extern cpuop_func op_06e8_33_ff; +extern cpuop_func op_06f0_33_nf; +extern cpuop_func op_06f0_33_ff; +extern cpuop_func op_06f8_33_nf; +extern cpuop_func op_06f8_33_ff; +extern cpuop_func op_06f9_33_nf; +extern cpuop_func op_06f9_33_ff; +extern cpuop_func op_06fa_33_nf; +extern cpuop_func op_06fa_33_ff; +extern cpuop_func op_06fb_33_nf; +extern cpuop_func op_06fb_33_ff; +extern cpuop_func op_0800_33_nf; +extern cpuop_func op_0800_33_ff; +extern cpuop_func op_0810_33_nf; +extern cpuop_func op_0810_33_ff; +extern cpuop_func op_0818_33_nf; +extern cpuop_func op_0818_33_ff; +extern cpuop_func op_0820_33_nf; +extern cpuop_func op_0820_33_ff; +extern cpuop_func op_0828_33_nf; +extern cpuop_func op_0828_33_ff; +extern cpuop_func op_0830_33_nf; +extern cpuop_func op_0830_33_ff; +extern cpuop_func op_0838_33_nf; +extern cpuop_func op_0838_33_ff; +extern cpuop_func op_0839_33_nf; +extern cpuop_func op_0839_33_ff; +extern cpuop_func op_083a_33_nf; +extern cpuop_func op_083a_33_ff; +extern cpuop_func op_083b_33_nf; +extern cpuop_func op_083b_33_ff; +extern cpuop_func op_0840_33_nf; +extern cpuop_func op_0840_33_ff; +extern cpuop_func op_0850_33_nf; +extern cpuop_func op_0850_33_ff; +extern cpuop_func op_0858_33_nf; +extern cpuop_func op_0858_33_ff; +extern cpuop_func op_0860_33_nf; +extern cpuop_func op_0860_33_ff; +extern cpuop_func op_0868_33_nf; +extern cpuop_func op_0868_33_ff; +extern cpuop_func op_0870_33_nf; +extern cpuop_func op_0870_33_ff; +extern cpuop_func op_0878_33_nf; +extern cpuop_func op_0878_33_ff; +extern cpuop_func op_0879_33_nf; +extern cpuop_func op_0879_33_ff; +extern cpuop_func op_0880_33_nf; +extern cpuop_func op_0880_33_ff; +extern cpuop_func op_0890_33_nf; +extern cpuop_func op_0890_33_ff; +extern cpuop_func op_0898_33_nf; +extern cpuop_func op_0898_33_ff; +extern cpuop_func op_08a0_33_nf; +extern cpuop_func op_08a0_33_ff; +extern cpuop_func op_08a8_33_nf; +extern cpuop_func op_08a8_33_ff; +extern cpuop_func op_08b0_33_nf; +extern cpuop_func op_08b0_33_ff; +extern cpuop_func op_08b8_33_nf; +extern cpuop_func op_08b8_33_ff; +extern cpuop_func op_08b9_33_nf; +extern cpuop_func op_08b9_33_ff; +extern cpuop_func op_08c0_33_nf; +extern cpuop_func op_08c0_33_ff; +extern cpuop_func op_08d0_33_nf; +extern cpuop_func op_08d0_33_ff; +extern cpuop_func op_08d8_33_nf; +extern cpuop_func op_08d8_33_ff; +extern cpuop_func op_08e0_33_nf; +extern cpuop_func op_08e0_33_ff; +extern cpuop_func op_08e8_33_nf; +extern cpuop_func op_08e8_33_ff; +extern cpuop_func op_08f0_33_nf; +extern cpuop_func op_08f0_33_ff; +extern cpuop_func op_08f8_33_nf; +extern cpuop_func op_08f8_33_ff; +extern cpuop_func op_08f9_33_nf; +extern cpuop_func op_08f9_33_ff; +extern cpuop_func op_0a00_33_nf; +extern cpuop_func op_0a00_33_ff; +extern cpuop_func op_0a10_33_nf; +extern cpuop_func op_0a10_33_ff; +extern cpuop_func op_0a18_33_nf; +extern cpuop_func op_0a18_33_ff; +extern cpuop_func op_0a20_33_nf; +extern cpuop_func op_0a20_33_ff; +extern cpuop_func op_0a28_33_nf; +extern cpuop_func op_0a28_33_ff; +extern cpuop_func op_0a30_33_nf; +extern cpuop_func op_0a30_33_ff; +extern cpuop_func op_0a38_33_nf; +extern cpuop_func op_0a38_33_ff; +extern cpuop_func op_0a39_33_nf; +extern cpuop_func op_0a39_33_ff; +extern cpuop_func op_0a3c_33_nf; +extern cpuop_func op_0a3c_33_ff; +extern cpuop_func op_0a40_33_nf; +extern cpuop_func op_0a40_33_ff; +extern cpuop_func op_0a50_33_nf; +extern cpuop_func op_0a50_33_ff; +extern cpuop_func op_0a58_33_nf; +extern cpuop_func op_0a58_33_ff; +extern cpuop_func op_0a60_33_nf; +extern cpuop_func op_0a60_33_ff; +extern cpuop_func op_0a68_33_nf; +extern cpuop_func op_0a68_33_ff; +extern cpuop_func op_0a70_33_nf; +extern cpuop_func op_0a70_33_ff; +extern cpuop_func op_0a78_33_nf; +extern cpuop_func op_0a78_33_ff; +extern cpuop_func op_0a79_33_nf; +extern cpuop_func op_0a79_33_ff; +extern cpuop_func op_0a7c_33_nf; +extern cpuop_func op_0a7c_33_ff; +extern cpuop_func op_0a80_33_nf; +extern cpuop_func op_0a80_33_ff; +extern cpuop_func op_0a90_33_nf; +extern cpuop_func op_0a90_33_ff; +extern cpuop_func op_0a98_33_nf; +extern cpuop_func op_0a98_33_ff; +extern cpuop_func op_0aa0_33_nf; +extern cpuop_func op_0aa0_33_ff; +extern cpuop_func op_0aa8_33_nf; +extern cpuop_func op_0aa8_33_ff; +extern cpuop_func op_0ab0_33_nf; +extern cpuop_func op_0ab0_33_ff; +extern cpuop_func op_0ab8_33_nf; +extern cpuop_func op_0ab8_33_ff; +extern cpuop_func op_0ab9_33_nf; +extern cpuop_func op_0ab9_33_ff; +extern cpuop_func op_0ad0_33_nf; +extern cpuop_func op_0ad0_33_ff; +extern cpuop_func op_0ad8_33_nf; +extern cpuop_func op_0ad8_33_ff; +extern cpuop_func op_0ae0_33_nf; +extern cpuop_func op_0ae0_33_ff; +extern cpuop_func op_0ae8_33_nf; +extern cpuop_func op_0ae8_33_ff; +extern cpuop_func op_0af0_33_nf; +extern cpuop_func op_0af0_33_ff; +extern cpuop_func op_0af8_33_nf; +extern cpuop_func op_0af8_33_ff; +extern cpuop_func op_0af9_33_nf; +extern cpuop_func op_0af9_33_ff; +extern cpuop_func op_0c00_33_nf; +extern cpuop_func op_0c00_33_ff; +extern cpuop_func op_0c10_33_nf; +extern cpuop_func op_0c10_33_ff; +extern cpuop_func op_0c18_33_nf; +extern cpuop_func op_0c18_33_ff; +extern cpuop_func op_0c20_33_nf; +extern cpuop_func op_0c20_33_ff; +extern cpuop_func op_0c28_33_nf; +extern cpuop_func op_0c28_33_ff; +extern cpuop_func op_0c30_33_nf; +extern cpuop_func op_0c30_33_ff; +extern cpuop_func op_0c38_33_nf; +extern cpuop_func op_0c38_33_ff; +extern cpuop_func op_0c39_33_nf; +extern cpuop_func op_0c39_33_ff; +extern cpuop_func op_0c3a_33_nf; +extern cpuop_func op_0c3a_33_ff; +extern cpuop_func op_0c3b_33_nf; +extern cpuop_func op_0c3b_33_ff; +extern cpuop_func op_0c40_33_nf; +extern cpuop_func op_0c40_33_ff; +extern cpuop_func op_0c50_33_nf; +extern cpuop_func op_0c50_33_ff; +extern cpuop_func op_0c58_33_nf; +extern cpuop_func op_0c58_33_ff; +extern cpuop_func op_0c60_33_nf; +extern cpuop_func op_0c60_33_ff; +extern cpuop_func op_0c68_33_nf; +extern cpuop_func op_0c68_33_ff; +extern cpuop_func op_0c70_33_nf; +extern cpuop_func op_0c70_33_ff; +extern cpuop_func op_0c78_33_nf; +extern cpuop_func op_0c78_33_ff; +extern cpuop_func op_0c79_33_nf; +extern cpuop_func op_0c79_33_ff; +extern cpuop_func op_0c7a_33_nf; +extern cpuop_func op_0c7a_33_ff; +extern cpuop_func op_0c7b_33_nf; +extern cpuop_func op_0c7b_33_ff; +extern cpuop_func op_0c80_33_nf; +extern cpuop_func op_0c80_33_ff; +extern cpuop_func op_0c90_33_nf; +extern cpuop_func op_0c90_33_ff; +extern cpuop_func op_0c98_33_nf; +extern cpuop_func op_0c98_33_ff; +extern cpuop_func op_0ca0_33_nf; +extern cpuop_func op_0ca0_33_ff; +extern cpuop_func op_0ca8_33_nf; +extern cpuop_func op_0ca8_33_ff; +extern cpuop_func op_0cb0_33_nf; +extern cpuop_func op_0cb0_33_ff; +extern cpuop_func op_0cb8_33_nf; +extern cpuop_func op_0cb8_33_ff; +extern cpuop_func op_0cb9_33_nf; +extern cpuop_func op_0cb9_33_ff; +extern cpuop_func op_0cba_33_nf; +extern cpuop_func op_0cba_33_ff; +extern cpuop_func op_0cbb_33_nf; +extern cpuop_func op_0cbb_33_ff; +extern cpuop_func op_0cd0_33_nf; +extern cpuop_func op_0cd0_33_ff; +extern cpuop_func op_0cd8_33_nf; +extern cpuop_func op_0cd8_33_ff; +extern cpuop_func op_0ce0_33_nf; +extern cpuop_func op_0ce0_33_ff; +extern cpuop_func op_0ce8_33_nf; +extern cpuop_func op_0ce8_33_ff; +extern cpuop_func op_0cf0_33_nf; +extern cpuop_func op_0cf0_33_ff; +extern cpuop_func op_0cf8_33_nf; +extern cpuop_func op_0cf8_33_ff; +extern cpuop_func op_0cf9_33_nf; +extern cpuop_func op_0cf9_33_ff; +extern cpuop_func op_0cfc_33_nf; +extern cpuop_func op_0cfc_33_ff; +extern cpuop_func op_0e10_33_nf; +extern cpuop_func op_0e10_33_ff; +extern cpuop_func op_0e18_33_nf; +extern cpuop_func op_0e18_33_ff; +extern cpuop_func op_0e20_33_nf; +extern cpuop_func op_0e20_33_ff; +extern cpuop_func op_0e28_33_nf; +extern cpuop_func op_0e28_33_ff; +extern cpuop_func op_0e30_33_nf; +extern cpuop_func op_0e30_33_ff; +extern cpuop_func op_0e38_33_nf; +extern cpuop_func op_0e38_33_ff; +extern cpuop_func op_0e39_33_nf; +extern cpuop_func op_0e39_33_ff; +extern cpuop_func op_0e50_33_nf; +extern cpuop_func op_0e50_33_ff; +extern cpuop_func op_0e58_33_nf; +extern cpuop_func op_0e58_33_ff; +extern cpuop_func op_0e60_33_nf; +extern cpuop_func op_0e60_33_ff; +extern cpuop_func op_0e68_33_nf; +extern cpuop_func op_0e68_33_ff; +extern cpuop_func op_0e70_33_nf; +extern cpuop_func op_0e70_33_ff; +extern cpuop_func op_0e78_33_nf; +extern cpuop_func op_0e78_33_ff; +extern cpuop_func op_0e79_33_nf; +extern cpuop_func op_0e79_33_ff; +extern cpuop_func op_0e90_33_nf; +extern cpuop_func op_0e90_33_ff; +extern cpuop_func op_0e98_33_nf; +extern cpuop_func op_0e98_33_ff; +extern cpuop_func op_0ea0_33_nf; +extern cpuop_func op_0ea0_33_ff; +extern cpuop_func op_0ea8_33_nf; +extern cpuop_func op_0ea8_33_ff; +extern cpuop_func op_0eb0_33_nf; +extern cpuop_func op_0eb0_33_ff; +extern cpuop_func op_0eb8_33_nf; +extern cpuop_func op_0eb8_33_ff; +extern cpuop_func op_0eb9_33_nf; +extern cpuop_func op_0eb9_33_ff; +extern cpuop_func op_0ed0_33_nf; +extern cpuop_func op_0ed0_33_ff; +extern cpuop_func op_0ed8_33_nf; +extern cpuop_func op_0ed8_33_ff; +extern cpuop_func op_0ee0_33_nf; +extern cpuop_func op_0ee0_33_ff; +extern cpuop_func op_0ee8_33_nf; +extern cpuop_func op_0ee8_33_ff; +extern cpuop_func op_0ef0_33_nf; +extern cpuop_func op_0ef0_33_ff; +extern cpuop_func op_0ef8_33_nf; +extern cpuop_func op_0ef8_33_ff; +extern cpuop_func op_0ef9_33_nf; +extern cpuop_func op_0ef9_33_ff; +extern cpuop_func op_0efc_33_nf; +extern cpuop_func op_0efc_33_ff; +extern cpuop_func op_1000_33_nf; +extern cpuop_func op_1000_33_ff; +extern cpuop_func op_1010_33_nf; +extern cpuop_func op_1010_33_ff; +extern cpuop_func op_1018_33_nf; +extern cpuop_func op_1018_33_ff; +extern cpuop_func op_1020_33_nf; +extern cpuop_func op_1020_33_ff; +extern cpuop_func op_1028_33_nf; +extern cpuop_func op_1028_33_ff; +extern cpuop_func op_1030_33_nf; +extern cpuop_func op_1030_33_ff; +extern cpuop_func op_1038_33_nf; +extern cpuop_func op_1038_33_ff; +extern cpuop_func op_1039_33_nf; +extern cpuop_func op_1039_33_ff; +extern cpuop_func op_103a_33_nf; +extern cpuop_func op_103a_33_ff; +extern cpuop_func op_103b_33_nf; +extern cpuop_func op_103b_33_ff; +extern cpuop_func op_103c_33_nf; +extern cpuop_func op_103c_33_ff; +extern cpuop_func op_1080_33_nf; +extern cpuop_func op_1080_33_ff; +extern cpuop_func op_1090_33_nf; +extern cpuop_func op_1090_33_ff; +extern cpuop_func op_1098_33_nf; +extern cpuop_func op_1098_33_ff; +extern cpuop_func op_10a0_33_nf; +extern cpuop_func op_10a0_33_ff; +extern cpuop_func op_10a8_33_nf; +extern cpuop_func op_10a8_33_ff; +extern cpuop_func op_10b0_33_nf; +extern cpuop_func op_10b0_33_ff; +extern cpuop_func op_10b8_33_nf; +extern cpuop_func op_10b8_33_ff; +extern cpuop_func op_10b9_33_nf; +extern cpuop_func op_10b9_33_ff; +extern cpuop_func op_10ba_33_nf; +extern cpuop_func op_10ba_33_ff; +extern cpuop_func op_10bb_33_nf; +extern cpuop_func op_10bb_33_ff; +extern cpuop_func op_10bc_33_nf; +extern cpuop_func op_10bc_33_ff; +extern cpuop_func op_10c0_33_nf; +extern cpuop_func op_10c0_33_ff; +extern cpuop_func op_10d0_33_nf; +extern cpuop_func op_10d0_33_ff; +extern cpuop_func op_10d8_33_nf; +extern cpuop_func op_10d8_33_ff; +extern cpuop_func op_10e0_33_nf; +extern cpuop_func op_10e0_33_ff; +extern cpuop_func op_10e8_33_nf; +extern cpuop_func op_10e8_33_ff; +extern cpuop_func op_10f0_33_nf; +extern cpuop_func op_10f0_33_ff; +extern cpuop_func op_10f8_33_nf; +extern cpuop_func op_10f8_33_ff; +extern cpuop_func op_10f9_33_nf; +extern cpuop_func op_10f9_33_ff; +extern cpuop_func op_10fa_33_nf; +extern cpuop_func op_10fa_33_ff; +extern cpuop_func op_10fb_33_nf; +extern cpuop_func op_10fb_33_ff; +extern cpuop_func op_10fc_33_nf; +extern cpuop_func op_10fc_33_ff; +extern cpuop_func op_1100_33_nf; +extern cpuop_func op_1100_33_ff; +extern cpuop_func op_1110_33_nf; +extern cpuop_func op_1110_33_ff; +extern cpuop_func op_1118_33_nf; +extern cpuop_func op_1118_33_ff; +extern cpuop_func op_1120_33_nf; +extern cpuop_func op_1120_33_ff; +extern cpuop_func op_1128_33_nf; +extern cpuop_func op_1128_33_ff; +extern cpuop_func op_1130_33_nf; +extern cpuop_func op_1130_33_ff; +extern cpuop_func op_1138_33_nf; +extern cpuop_func op_1138_33_ff; +extern cpuop_func op_1139_33_nf; +extern cpuop_func op_1139_33_ff; +extern cpuop_func op_113a_33_nf; +extern cpuop_func op_113a_33_ff; +extern cpuop_func op_113b_33_nf; +extern cpuop_func op_113b_33_ff; +extern cpuop_func op_113c_33_nf; +extern cpuop_func op_113c_33_ff; +extern cpuop_func op_1140_33_nf; +extern cpuop_func op_1140_33_ff; +extern cpuop_func op_1150_33_nf; +extern cpuop_func op_1150_33_ff; +extern cpuop_func op_1158_33_nf; +extern cpuop_func op_1158_33_ff; +extern cpuop_func op_1160_33_nf; +extern cpuop_func op_1160_33_ff; +extern cpuop_func op_1168_33_nf; +extern cpuop_func op_1168_33_ff; +extern cpuop_func op_1170_33_nf; +extern cpuop_func op_1170_33_ff; +extern cpuop_func op_1178_33_nf; +extern cpuop_func op_1178_33_ff; +extern cpuop_func op_1179_33_nf; +extern cpuop_func op_1179_33_ff; +extern cpuop_func op_117a_33_nf; +extern cpuop_func op_117a_33_ff; +extern cpuop_func op_117b_33_nf; +extern cpuop_func op_117b_33_ff; +extern cpuop_func op_117c_33_nf; +extern cpuop_func op_117c_33_ff; +extern cpuop_func op_1180_33_nf; +extern cpuop_func op_1180_33_ff; +extern cpuop_func op_1190_33_nf; +extern cpuop_func op_1190_33_ff; +extern cpuop_func op_1198_33_nf; +extern cpuop_func op_1198_33_ff; +extern cpuop_func op_11a0_33_nf; +extern cpuop_func op_11a0_33_ff; +extern cpuop_func op_11a8_33_nf; +extern cpuop_func op_11a8_33_ff; +extern cpuop_func op_11b0_33_nf; +extern cpuop_func op_11b0_33_ff; +extern cpuop_func op_11b8_33_nf; +extern cpuop_func op_11b8_33_ff; +extern cpuop_func op_11b9_33_nf; +extern cpuop_func op_11b9_33_ff; +extern cpuop_func op_11ba_33_nf; +extern cpuop_func op_11ba_33_ff; +extern cpuop_func op_11bb_33_nf; +extern cpuop_func op_11bb_33_ff; +extern cpuop_func op_11bc_33_nf; +extern cpuop_func op_11bc_33_ff; +extern cpuop_func op_11c0_33_nf; +extern cpuop_func op_11c0_33_ff; +extern cpuop_func op_11d0_33_nf; +extern cpuop_func op_11d0_33_ff; +extern cpuop_func op_11d8_33_nf; +extern cpuop_func op_11d8_33_ff; +extern cpuop_func op_11e0_33_nf; +extern cpuop_func op_11e0_33_ff; +extern cpuop_func op_11e8_33_nf; +extern cpuop_func op_11e8_33_ff; +extern cpuop_func op_11f0_33_nf; +extern cpuop_func op_11f0_33_ff; +extern cpuop_func op_11f8_33_nf; +extern cpuop_func op_11f8_33_ff; +extern cpuop_func op_11f9_33_nf; +extern cpuop_func op_11f9_33_ff; +extern cpuop_func op_11fa_33_nf; +extern cpuop_func op_11fa_33_ff; +extern cpuop_func op_11fb_33_nf; +extern cpuop_func op_11fb_33_ff; +extern cpuop_func op_11fc_33_nf; +extern cpuop_func op_11fc_33_ff; +extern cpuop_func op_13c0_33_nf; +extern cpuop_func op_13c0_33_ff; +extern cpuop_func op_13d0_33_nf; +extern cpuop_func op_13d0_33_ff; +extern cpuop_func op_13d8_33_nf; +extern cpuop_func op_13d8_33_ff; +extern cpuop_func op_13e0_33_nf; +extern cpuop_func op_13e0_33_ff; +extern cpuop_func op_13e8_33_nf; +extern cpuop_func op_13e8_33_ff; +extern cpuop_func op_13f0_33_nf; +extern cpuop_func op_13f0_33_ff; +extern cpuop_func op_13f8_33_nf; +extern cpuop_func op_13f8_33_ff; +extern cpuop_func op_13f9_33_nf; +extern cpuop_func op_13f9_33_ff; +extern cpuop_func op_13fa_33_nf; +extern cpuop_func op_13fa_33_ff; +extern cpuop_func op_13fb_33_nf; +extern cpuop_func op_13fb_33_ff; +extern cpuop_func op_13fc_33_nf; +extern cpuop_func op_13fc_33_ff; +extern cpuop_func op_2000_33_nf; +extern cpuop_func op_2000_33_ff; +extern cpuop_func op_2008_33_nf; +extern cpuop_func op_2008_33_ff; +extern cpuop_func op_2010_33_nf; +extern cpuop_func op_2010_33_ff; +extern cpuop_func op_2018_33_nf; +extern cpuop_func op_2018_33_ff; +extern cpuop_func op_2020_33_nf; +extern cpuop_func op_2020_33_ff; +extern cpuop_func op_2028_33_nf; +extern cpuop_func op_2028_33_ff; +extern cpuop_func op_2030_33_nf; +extern cpuop_func op_2030_33_ff; +extern cpuop_func op_2038_33_nf; +extern cpuop_func op_2038_33_ff; +extern cpuop_func op_2039_33_nf; +extern cpuop_func op_2039_33_ff; +extern cpuop_func op_203a_33_nf; +extern cpuop_func op_203a_33_ff; +extern cpuop_func op_203b_33_nf; +extern cpuop_func op_203b_33_ff; +extern cpuop_func op_203c_33_nf; +extern cpuop_func op_203c_33_ff; +extern cpuop_func op_2040_33_nf; +extern cpuop_func op_2040_33_ff; +extern cpuop_func op_2048_33_nf; +extern cpuop_func op_2048_33_ff; +extern cpuop_func op_2050_33_nf; +extern cpuop_func op_2050_33_ff; +extern cpuop_func op_2058_33_nf; +extern cpuop_func op_2058_33_ff; +extern cpuop_func op_2060_33_nf; +extern cpuop_func op_2060_33_ff; +extern cpuop_func op_2068_33_nf; +extern cpuop_func op_2068_33_ff; +extern cpuop_func op_2070_33_nf; +extern cpuop_func op_2070_33_ff; +extern cpuop_func op_2078_33_nf; +extern cpuop_func op_2078_33_ff; +extern cpuop_func op_2079_33_nf; +extern cpuop_func op_2079_33_ff; +extern cpuop_func op_207a_33_nf; +extern cpuop_func op_207a_33_ff; +extern cpuop_func op_207b_33_nf; +extern cpuop_func op_207b_33_ff; +extern cpuop_func op_207c_33_nf; +extern cpuop_func op_207c_33_ff; +extern cpuop_func op_2080_33_nf; +extern cpuop_func op_2080_33_ff; +extern cpuop_func op_2088_33_nf; +extern cpuop_func op_2088_33_ff; +extern cpuop_func op_2090_33_nf; +extern cpuop_func op_2090_33_ff; +extern cpuop_func op_2098_33_nf; +extern cpuop_func op_2098_33_ff; +extern cpuop_func op_20a0_33_nf; +extern cpuop_func op_20a0_33_ff; +extern cpuop_func op_20a8_33_nf; +extern cpuop_func op_20a8_33_ff; +extern cpuop_func op_20b0_33_nf; +extern cpuop_func op_20b0_33_ff; +extern cpuop_func op_20b8_33_nf; +extern cpuop_func op_20b8_33_ff; +extern cpuop_func op_20b9_33_nf; +extern cpuop_func op_20b9_33_ff; +extern cpuop_func op_20ba_33_nf; +extern cpuop_func op_20ba_33_ff; +extern cpuop_func op_20bb_33_nf; +extern cpuop_func op_20bb_33_ff; +extern cpuop_func op_20bc_33_nf; +extern cpuop_func op_20bc_33_ff; +extern cpuop_func op_20c0_33_nf; +extern cpuop_func op_20c0_33_ff; +extern cpuop_func op_20c8_33_nf; +extern cpuop_func op_20c8_33_ff; +extern cpuop_func op_20d0_33_nf; +extern cpuop_func op_20d0_33_ff; +extern cpuop_func op_20d8_33_nf; +extern cpuop_func op_20d8_33_ff; +extern cpuop_func op_20e0_33_nf; +extern cpuop_func op_20e0_33_ff; +extern cpuop_func op_20e8_33_nf; +extern cpuop_func op_20e8_33_ff; +extern cpuop_func op_20f0_33_nf; +extern cpuop_func op_20f0_33_ff; +extern cpuop_func op_20f8_33_nf; +extern cpuop_func op_20f8_33_ff; +extern cpuop_func op_20f9_33_nf; +extern cpuop_func op_20f9_33_ff; +extern cpuop_func op_20fa_33_nf; +extern cpuop_func op_20fa_33_ff; +extern cpuop_func op_20fb_33_nf; +extern cpuop_func op_20fb_33_ff; +extern cpuop_func op_20fc_33_nf; +extern cpuop_func op_20fc_33_ff; +extern cpuop_func op_2100_33_nf; +extern cpuop_func op_2100_33_ff; +extern cpuop_func op_2108_33_nf; +extern cpuop_func op_2108_33_ff; +extern cpuop_func op_2110_33_nf; +extern cpuop_func op_2110_33_ff; +extern cpuop_func op_2118_33_nf; +extern cpuop_func op_2118_33_ff; +extern cpuop_func op_2120_33_nf; +extern cpuop_func op_2120_33_ff; +extern cpuop_func op_2128_33_nf; +extern cpuop_func op_2128_33_ff; +extern cpuop_func op_2130_33_nf; +extern cpuop_func op_2130_33_ff; +extern cpuop_func op_2138_33_nf; +extern cpuop_func op_2138_33_ff; +extern cpuop_func op_2139_33_nf; +extern cpuop_func op_2139_33_ff; +extern cpuop_func op_213a_33_nf; +extern cpuop_func op_213a_33_ff; +extern cpuop_func op_213b_33_nf; +extern cpuop_func op_213b_33_ff; +extern cpuop_func op_213c_33_nf; +extern cpuop_func op_213c_33_ff; +extern cpuop_func op_2140_33_nf; +extern cpuop_func op_2140_33_ff; +extern cpuop_func op_2148_33_nf; +extern cpuop_func op_2148_33_ff; +extern cpuop_func op_2150_33_nf; +extern cpuop_func op_2150_33_ff; +extern cpuop_func op_2158_33_nf; +extern cpuop_func op_2158_33_ff; +extern cpuop_func op_2160_33_nf; +extern cpuop_func op_2160_33_ff; +extern cpuop_func op_2168_33_nf; +extern cpuop_func op_2168_33_ff; +extern cpuop_func op_2170_33_nf; +extern cpuop_func op_2170_33_ff; +extern cpuop_func op_2178_33_nf; +extern cpuop_func op_2178_33_ff; +extern cpuop_func op_2179_33_nf; +extern cpuop_func op_2179_33_ff; +extern cpuop_func op_217a_33_nf; +extern cpuop_func op_217a_33_ff; +extern cpuop_func op_217b_33_nf; +extern cpuop_func op_217b_33_ff; +extern cpuop_func op_217c_33_nf; +extern cpuop_func op_217c_33_ff; +extern cpuop_func op_2180_33_nf; +extern cpuop_func op_2180_33_ff; +extern cpuop_func op_2188_33_nf; +extern cpuop_func op_2188_33_ff; +extern cpuop_func op_2190_33_nf; +extern cpuop_func op_2190_33_ff; +extern cpuop_func op_2198_33_nf; +extern cpuop_func op_2198_33_ff; +extern cpuop_func op_21a0_33_nf; +extern cpuop_func op_21a0_33_ff; +extern cpuop_func op_21a8_33_nf; +extern cpuop_func op_21a8_33_ff; +extern cpuop_func op_21b0_33_nf; +extern cpuop_func op_21b0_33_ff; +extern cpuop_func op_21b8_33_nf; +extern cpuop_func op_21b8_33_ff; +extern cpuop_func op_21b9_33_nf; +extern cpuop_func op_21b9_33_ff; +extern cpuop_func op_21ba_33_nf; +extern cpuop_func op_21ba_33_ff; +extern cpuop_func op_21bb_33_nf; +extern cpuop_func op_21bb_33_ff; +extern cpuop_func op_21bc_33_nf; +extern cpuop_func op_21bc_33_ff; +extern cpuop_func op_21c0_33_nf; +extern cpuop_func op_21c0_33_ff; +extern cpuop_func op_21c8_33_nf; +extern cpuop_func op_21c8_33_ff; +extern cpuop_func op_21d0_33_nf; +extern cpuop_func op_21d0_33_ff; +extern cpuop_func op_21d8_33_nf; +extern cpuop_func op_21d8_33_ff; +extern cpuop_func op_21e0_33_nf; +extern cpuop_func op_21e0_33_ff; +extern cpuop_func op_21e8_33_nf; +extern cpuop_func op_21e8_33_ff; +extern cpuop_func op_21f0_33_nf; +extern cpuop_func op_21f0_33_ff; +extern cpuop_func op_21f8_33_nf; +extern cpuop_func op_21f8_33_ff; +extern cpuop_func op_21f9_33_nf; +extern cpuop_func op_21f9_33_ff; +extern cpuop_func op_21fa_33_nf; +extern cpuop_func op_21fa_33_ff; +extern cpuop_func op_21fb_33_nf; +extern cpuop_func op_21fb_33_ff; +extern cpuop_func op_21fc_33_nf; +extern cpuop_func op_21fc_33_ff; +extern cpuop_func op_23c0_33_nf; +extern cpuop_func op_23c0_33_ff; +extern cpuop_func op_23c8_33_nf; +extern cpuop_func op_23c8_33_ff; +extern cpuop_func op_23d0_33_nf; +extern cpuop_func op_23d0_33_ff; +extern cpuop_func op_23d8_33_nf; +extern cpuop_func op_23d8_33_ff; +extern cpuop_func op_23e0_33_nf; +extern cpuop_func op_23e0_33_ff; +extern cpuop_func op_23e8_33_nf; +extern cpuop_func op_23e8_33_ff; +extern cpuop_func op_23f0_33_nf; +extern cpuop_func op_23f0_33_ff; +extern cpuop_func op_23f8_33_nf; +extern cpuop_func op_23f8_33_ff; +extern cpuop_func op_23f9_33_nf; +extern cpuop_func op_23f9_33_ff; +extern cpuop_func op_23fa_33_nf; +extern cpuop_func op_23fa_33_ff; +extern cpuop_func op_23fb_33_nf; +extern cpuop_func op_23fb_33_ff; +extern cpuop_func op_23fc_33_nf; +extern cpuop_func op_23fc_33_ff; +extern cpuop_func op_3000_33_nf; +extern cpuop_func op_3000_33_ff; +extern cpuop_func op_3008_33_nf; +extern cpuop_func op_3008_33_ff; +extern cpuop_func op_3010_33_nf; +extern cpuop_func op_3010_33_ff; +extern cpuop_func op_3018_33_nf; +extern cpuop_func op_3018_33_ff; +extern cpuop_func op_3020_33_nf; +extern cpuop_func op_3020_33_ff; +extern cpuop_func op_3028_33_nf; +extern cpuop_func op_3028_33_ff; +extern cpuop_func op_3030_33_nf; +extern cpuop_func op_3030_33_ff; +extern cpuop_func op_3038_33_nf; +extern cpuop_func op_3038_33_ff; +extern cpuop_func op_3039_33_nf; +extern cpuop_func op_3039_33_ff; +extern cpuop_func op_303a_33_nf; +extern cpuop_func op_303a_33_ff; +extern cpuop_func op_303b_33_nf; +extern cpuop_func op_303b_33_ff; +extern cpuop_func op_303c_33_nf; +extern cpuop_func op_303c_33_ff; +extern cpuop_func op_3040_33_nf; +extern cpuop_func op_3040_33_ff; +extern cpuop_func op_3048_33_nf; +extern cpuop_func op_3048_33_ff; +extern cpuop_func op_3050_33_nf; +extern cpuop_func op_3050_33_ff; +extern cpuop_func op_3058_33_nf; +extern cpuop_func op_3058_33_ff; +extern cpuop_func op_3060_33_nf; +extern cpuop_func op_3060_33_ff; +extern cpuop_func op_3068_33_nf; +extern cpuop_func op_3068_33_ff; +extern cpuop_func op_3070_33_nf; +extern cpuop_func op_3070_33_ff; +extern cpuop_func op_3078_33_nf; +extern cpuop_func op_3078_33_ff; +extern cpuop_func op_3079_33_nf; +extern cpuop_func op_3079_33_ff; +extern cpuop_func op_307a_33_nf; +extern cpuop_func op_307a_33_ff; +extern cpuop_func op_307b_33_nf; +extern cpuop_func op_307b_33_ff; +extern cpuop_func op_307c_33_nf; +extern cpuop_func op_307c_33_ff; +extern cpuop_func op_3080_33_nf; +extern cpuop_func op_3080_33_ff; +extern cpuop_func op_3088_33_nf; +extern cpuop_func op_3088_33_ff; +extern cpuop_func op_3090_33_nf; +extern cpuop_func op_3090_33_ff; +extern cpuop_func op_3098_33_nf; +extern cpuop_func op_3098_33_ff; +extern cpuop_func op_30a0_33_nf; +extern cpuop_func op_30a0_33_ff; +extern cpuop_func op_30a8_33_nf; +extern cpuop_func op_30a8_33_ff; +extern cpuop_func op_30b0_33_nf; +extern cpuop_func op_30b0_33_ff; +extern cpuop_func op_30b8_33_nf; +extern cpuop_func op_30b8_33_ff; +extern cpuop_func op_30b9_33_nf; +extern cpuop_func op_30b9_33_ff; +extern cpuop_func op_30ba_33_nf; +extern cpuop_func op_30ba_33_ff; +extern cpuop_func op_30bb_33_nf; +extern cpuop_func op_30bb_33_ff; +extern cpuop_func op_30bc_33_nf; +extern cpuop_func op_30bc_33_ff; +extern cpuop_func op_30c0_33_nf; +extern cpuop_func op_30c0_33_ff; +extern cpuop_func op_30c8_33_nf; +extern cpuop_func op_30c8_33_ff; +extern cpuop_func op_30d0_33_nf; +extern cpuop_func op_30d0_33_ff; +extern cpuop_func op_30d8_33_nf; +extern cpuop_func op_30d8_33_ff; +extern cpuop_func op_30e0_33_nf; +extern cpuop_func op_30e0_33_ff; +extern cpuop_func op_30e8_33_nf; +extern cpuop_func op_30e8_33_ff; +extern cpuop_func op_30f0_33_nf; +extern cpuop_func op_30f0_33_ff; +extern cpuop_func op_30f8_33_nf; +extern cpuop_func op_30f8_33_ff; +extern cpuop_func op_30f9_33_nf; +extern cpuop_func op_30f9_33_ff; +extern cpuop_func op_30fa_33_nf; +extern cpuop_func op_30fa_33_ff; +extern cpuop_func op_30fb_33_nf; +extern cpuop_func op_30fb_33_ff; +extern cpuop_func op_30fc_33_nf; +extern cpuop_func op_30fc_33_ff; +extern cpuop_func op_3100_33_nf; +extern cpuop_func op_3100_33_ff; +extern cpuop_func op_3108_33_nf; +extern cpuop_func op_3108_33_ff; +extern cpuop_func op_3110_33_nf; +extern cpuop_func op_3110_33_ff; +extern cpuop_func op_3118_33_nf; +extern cpuop_func op_3118_33_ff; +extern cpuop_func op_3120_33_nf; +extern cpuop_func op_3120_33_ff; +extern cpuop_func op_3128_33_nf; +extern cpuop_func op_3128_33_ff; +extern cpuop_func op_3130_33_nf; +extern cpuop_func op_3130_33_ff; +extern cpuop_func op_3138_33_nf; +extern cpuop_func op_3138_33_ff; +extern cpuop_func op_3139_33_nf; +extern cpuop_func op_3139_33_ff; +extern cpuop_func op_313a_33_nf; +extern cpuop_func op_313a_33_ff; +extern cpuop_func op_313b_33_nf; +extern cpuop_func op_313b_33_ff; +extern cpuop_func op_313c_33_nf; +extern cpuop_func op_313c_33_ff; +extern cpuop_func op_3140_33_nf; +extern cpuop_func op_3140_33_ff; +extern cpuop_func op_3148_33_nf; +extern cpuop_func op_3148_33_ff; +extern cpuop_func op_3150_33_nf; +extern cpuop_func op_3150_33_ff; +extern cpuop_func op_3158_33_nf; +extern cpuop_func op_3158_33_ff; +extern cpuop_func op_3160_33_nf; +extern cpuop_func op_3160_33_ff; +extern cpuop_func op_3168_33_nf; +extern cpuop_func op_3168_33_ff; +extern cpuop_func op_3170_33_nf; +extern cpuop_func op_3170_33_ff; +extern cpuop_func op_3178_33_nf; +extern cpuop_func op_3178_33_ff; +extern cpuop_func op_3179_33_nf; +extern cpuop_func op_3179_33_ff; +extern cpuop_func op_317a_33_nf; +extern cpuop_func op_317a_33_ff; +extern cpuop_func op_317b_33_nf; +extern cpuop_func op_317b_33_ff; +extern cpuop_func op_317c_33_nf; +extern cpuop_func op_317c_33_ff; +extern cpuop_func op_3180_33_nf; +extern cpuop_func op_3180_33_ff; +extern cpuop_func op_3188_33_nf; +extern cpuop_func op_3188_33_ff; +extern cpuop_func op_3190_33_nf; +extern cpuop_func op_3190_33_ff; +extern cpuop_func op_3198_33_nf; +extern cpuop_func op_3198_33_ff; +extern cpuop_func op_31a0_33_nf; +extern cpuop_func op_31a0_33_ff; +extern cpuop_func op_31a8_33_nf; +extern cpuop_func op_31a8_33_ff; +extern cpuop_func op_31b0_33_nf; +extern cpuop_func op_31b0_33_ff; +extern cpuop_func op_31b8_33_nf; +extern cpuop_func op_31b8_33_ff; +extern cpuop_func op_31b9_33_nf; +extern cpuop_func op_31b9_33_ff; +extern cpuop_func op_31ba_33_nf; +extern cpuop_func op_31ba_33_ff; +extern cpuop_func op_31bb_33_nf; +extern cpuop_func op_31bb_33_ff; +extern cpuop_func op_31bc_33_nf; +extern cpuop_func op_31bc_33_ff; +extern cpuop_func op_31c0_33_nf; +extern cpuop_func op_31c0_33_ff; +extern cpuop_func op_31c8_33_nf; +extern cpuop_func op_31c8_33_ff; +extern cpuop_func op_31d0_33_nf; +extern cpuop_func op_31d0_33_ff; +extern cpuop_func op_31d8_33_nf; +extern cpuop_func op_31d8_33_ff; +extern cpuop_func op_31e0_33_nf; +extern cpuop_func op_31e0_33_ff; +extern cpuop_func op_31e8_33_nf; +extern cpuop_func op_31e8_33_ff; +extern cpuop_func op_31f0_33_nf; +extern cpuop_func op_31f0_33_ff; +extern cpuop_func op_31f8_33_nf; +extern cpuop_func op_31f8_33_ff; +extern cpuop_func op_31f9_33_nf; +extern cpuop_func op_31f9_33_ff; +extern cpuop_func op_31fa_33_nf; +extern cpuop_func op_31fa_33_ff; +extern cpuop_func op_31fb_33_nf; +extern cpuop_func op_31fb_33_ff; +extern cpuop_func op_31fc_33_nf; +extern cpuop_func op_31fc_33_ff; +extern cpuop_func op_33c0_33_nf; +extern cpuop_func op_33c0_33_ff; +extern cpuop_func op_33c8_33_nf; +extern cpuop_func op_33c8_33_ff; +extern cpuop_func op_33d0_33_nf; +extern cpuop_func op_33d0_33_ff; +extern cpuop_func op_33d8_33_nf; +extern cpuop_func op_33d8_33_ff; +extern cpuop_func op_33e0_33_nf; +extern cpuop_func op_33e0_33_ff; +extern cpuop_func op_33e8_33_nf; +extern cpuop_func op_33e8_33_ff; +extern cpuop_func op_33f0_33_nf; +extern cpuop_func op_33f0_33_ff; +extern cpuop_func op_33f8_33_nf; +extern cpuop_func op_33f8_33_ff; +extern cpuop_func op_33f9_33_nf; +extern cpuop_func op_33f9_33_ff; +extern cpuop_func op_33fa_33_nf; +extern cpuop_func op_33fa_33_ff; +extern cpuop_func op_33fb_33_nf; +extern cpuop_func op_33fb_33_ff; +extern cpuop_func op_33fc_33_nf; +extern cpuop_func op_33fc_33_ff; +extern cpuop_func op_4000_33_nf; +extern cpuop_func op_4000_33_ff; +extern cpuop_func op_4010_33_nf; +extern cpuop_func op_4010_33_ff; +extern cpuop_func op_4018_33_nf; +extern cpuop_func op_4018_33_ff; +extern cpuop_func op_4020_33_nf; +extern cpuop_func op_4020_33_ff; +extern cpuop_func op_4028_33_nf; +extern cpuop_func op_4028_33_ff; +extern cpuop_func op_4030_33_nf; +extern cpuop_func op_4030_33_ff; +extern cpuop_func op_4038_33_nf; +extern cpuop_func op_4038_33_ff; +extern cpuop_func op_4039_33_nf; +extern cpuop_func op_4039_33_ff; +extern cpuop_func op_4040_33_nf; +extern cpuop_func op_4040_33_ff; +extern cpuop_func op_4050_33_nf; +extern cpuop_func op_4050_33_ff; +extern cpuop_func op_4058_33_nf; +extern cpuop_func op_4058_33_ff; +extern cpuop_func op_4060_33_nf; +extern cpuop_func op_4060_33_ff; +extern cpuop_func op_4068_33_nf; +extern cpuop_func op_4068_33_ff; +extern cpuop_func op_4070_33_nf; +extern cpuop_func op_4070_33_ff; +extern cpuop_func op_4078_33_nf; +extern cpuop_func op_4078_33_ff; +extern cpuop_func op_4079_33_nf; +extern cpuop_func op_4079_33_ff; +extern cpuop_func op_4080_33_nf; +extern cpuop_func op_4080_33_ff; +extern cpuop_func op_4090_33_nf; +extern cpuop_func op_4090_33_ff; +extern cpuop_func op_4098_33_nf; +extern cpuop_func op_4098_33_ff; +extern cpuop_func op_40a0_33_nf; +extern cpuop_func op_40a0_33_ff; +extern cpuop_func op_40a8_33_nf; +extern cpuop_func op_40a8_33_ff; +extern cpuop_func op_40b0_33_nf; +extern cpuop_func op_40b0_33_ff; +extern cpuop_func op_40b8_33_nf; +extern cpuop_func op_40b8_33_ff; +extern cpuop_func op_40b9_33_nf; +extern cpuop_func op_40b9_33_ff; +extern cpuop_func op_40c0_33_nf; +extern cpuop_func op_40c0_33_ff; +extern cpuop_func op_40d0_33_nf; +extern cpuop_func op_40d0_33_ff; +extern cpuop_func op_40d8_33_nf; +extern cpuop_func op_40d8_33_ff; +extern cpuop_func op_40e0_33_nf; +extern cpuop_func op_40e0_33_ff; +extern cpuop_func op_40e8_33_nf; +extern cpuop_func op_40e8_33_ff; +extern cpuop_func op_40f0_33_nf; +extern cpuop_func op_40f0_33_ff; +extern cpuop_func op_40f8_33_nf; +extern cpuop_func op_40f8_33_ff; +extern cpuop_func op_40f9_33_nf; +extern cpuop_func op_40f9_33_ff; +extern cpuop_func op_4100_33_nf; +extern cpuop_func op_4100_33_ff; +extern cpuop_func op_4110_33_nf; +extern cpuop_func op_4110_33_ff; +extern cpuop_func op_4118_33_nf; +extern cpuop_func op_4118_33_ff; +extern cpuop_func op_4120_33_nf; +extern cpuop_func op_4120_33_ff; +extern cpuop_func op_4128_33_nf; +extern cpuop_func op_4128_33_ff; +extern cpuop_func op_4130_33_nf; +extern cpuop_func op_4130_33_ff; +extern cpuop_func op_4138_33_nf; +extern cpuop_func op_4138_33_ff; +extern cpuop_func op_4139_33_nf; +extern cpuop_func op_4139_33_ff; +extern cpuop_func op_413a_33_nf; +extern cpuop_func op_413a_33_ff; +extern cpuop_func op_413b_33_nf; +extern cpuop_func op_413b_33_ff; +extern cpuop_func op_413c_33_nf; +extern cpuop_func op_413c_33_ff; +extern cpuop_func op_4180_33_nf; +extern cpuop_func op_4180_33_ff; +extern cpuop_func op_4190_33_nf; +extern cpuop_func op_4190_33_ff; +extern cpuop_func op_4198_33_nf; +extern cpuop_func op_4198_33_ff; +extern cpuop_func op_41a0_33_nf; +extern cpuop_func op_41a0_33_ff; +extern cpuop_func op_41a8_33_nf; +extern cpuop_func op_41a8_33_ff; +extern cpuop_func op_41b0_33_nf; +extern cpuop_func op_41b0_33_ff; +extern cpuop_func op_41b8_33_nf; +extern cpuop_func op_41b8_33_ff; +extern cpuop_func op_41b9_33_nf; +extern cpuop_func op_41b9_33_ff; +extern cpuop_func op_41ba_33_nf; +extern cpuop_func op_41ba_33_ff; +extern cpuop_func op_41bb_33_nf; +extern cpuop_func op_41bb_33_ff; +extern cpuop_func op_41bc_33_nf; +extern cpuop_func op_41bc_33_ff; +extern cpuop_func op_41d0_33_nf; +extern cpuop_func op_41d0_33_ff; +extern cpuop_func op_41e8_33_nf; +extern cpuop_func op_41e8_33_ff; +extern cpuop_func op_41f0_33_nf; +extern cpuop_func op_41f0_33_ff; +extern cpuop_func op_41f8_33_nf; +extern cpuop_func op_41f8_33_ff; +extern cpuop_func op_41f9_33_nf; +extern cpuop_func op_41f9_33_ff; +extern cpuop_func op_41fa_33_nf; +extern cpuop_func op_41fa_33_ff; +extern cpuop_func op_41fb_33_nf; +extern cpuop_func op_41fb_33_ff; +extern cpuop_func op_4200_33_nf; +extern cpuop_func op_4200_33_ff; +extern cpuop_func op_4210_33_nf; +extern cpuop_func op_4210_33_ff; +extern cpuop_func op_4218_33_nf; +extern cpuop_func op_4218_33_ff; +extern cpuop_func op_4220_33_nf; +extern cpuop_func op_4220_33_ff; +extern cpuop_func op_4228_33_nf; +extern cpuop_func op_4228_33_ff; +extern cpuop_func op_4230_33_nf; +extern cpuop_func op_4230_33_ff; +extern cpuop_func op_4238_33_nf; +extern cpuop_func op_4238_33_ff; +extern cpuop_func op_4239_33_nf; +extern cpuop_func op_4239_33_ff; +extern cpuop_func op_4240_33_nf; +extern cpuop_func op_4240_33_ff; +extern cpuop_func op_4250_33_nf; +extern cpuop_func op_4250_33_ff; +extern cpuop_func op_4258_33_nf; +extern cpuop_func op_4258_33_ff; +extern cpuop_func op_4260_33_nf; +extern cpuop_func op_4260_33_ff; +extern cpuop_func op_4268_33_nf; +extern cpuop_func op_4268_33_ff; +extern cpuop_func op_4270_33_nf; +extern cpuop_func op_4270_33_ff; +extern cpuop_func op_4278_33_nf; +extern cpuop_func op_4278_33_ff; +extern cpuop_func op_4279_33_nf; +extern cpuop_func op_4279_33_ff; +extern cpuop_func op_4280_33_nf; +extern cpuop_func op_4280_33_ff; +extern cpuop_func op_4290_33_nf; +extern cpuop_func op_4290_33_ff; +extern cpuop_func op_4298_33_nf; +extern cpuop_func op_4298_33_ff; +extern cpuop_func op_42a0_33_nf; +extern cpuop_func op_42a0_33_ff; +extern cpuop_func op_42a8_33_nf; +extern cpuop_func op_42a8_33_ff; +extern cpuop_func op_42b0_33_nf; +extern cpuop_func op_42b0_33_ff; +extern cpuop_func op_42b8_33_nf; +extern cpuop_func op_42b8_33_ff; +extern cpuop_func op_42b9_33_nf; +extern cpuop_func op_42b9_33_ff; +extern cpuop_func op_42c0_33_nf; +extern cpuop_func op_42c0_33_ff; +extern cpuop_func op_42d0_33_nf; +extern cpuop_func op_42d0_33_ff; +extern cpuop_func op_42d8_33_nf; +extern cpuop_func op_42d8_33_ff; +extern cpuop_func op_42e0_33_nf; +extern cpuop_func op_42e0_33_ff; +extern cpuop_func op_42e8_33_nf; +extern cpuop_func op_42e8_33_ff; +extern cpuop_func op_42f0_33_nf; +extern cpuop_func op_42f0_33_ff; +extern cpuop_func op_42f8_33_nf; +extern cpuop_func op_42f8_33_ff; +extern cpuop_func op_42f9_33_nf; +extern cpuop_func op_42f9_33_ff; +extern cpuop_func op_4400_33_nf; +extern cpuop_func op_4400_33_ff; +extern cpuop_func op_4410_33_nf; +extern cpuop_func op_4410_33_ff; +extern cpuop_func op_4418_33_nf; +extern cpuop_func op_4418_33_ff; +extern cpuop_func op_4420_33_nf; +extern cpuop_func op_4420_33_ff; +extern cpuop_func op_4428_33_nf; +extern cpuop_func op_4428_33_ff; +extern cpuop_func op_4430_33_nf; +extern cpuop_func op_4430_33_ff; +extern cpuop_func op_4438_33_nf; +extern cpuop_func op_4438_33_ff; +extern cpuop_func op_4439_33_nf; +extern cpuop_func op_4439_33_ff; +extern cpuop_func op_4440_33_nf; +extern cpuop_func op_4440_33_ff; +extern cpuop_func op_4450_33_nf; +extern cpuop_func op_4450_33_ff; +extern cpuop_func op_4458_33_nf; +extern cpuop_func op_4458_33_ff; +extern cpuop_func op_4460_33_nf; +extern cpuop_func op_4460_33_ff; +extern cpuop_func op_4468_33_nf; +extern cpuop_func op_4468_33_ff; +extern cpuop_func op_4470_33_nf; +extern cpuop_func op_4470_33_ff; +extern cpuop_func op_4478_33_nf; +extern cpuop_func op_4478_33_ff; +extern cpuop_func op_4479_33_nf; +extern cpuop_func op_4479_33_ff; +extern cpuop_func op_4480_33_nf; +extern cpuop_func op_4480_33_ff; +extern cpuop_func op_4490_33_nf; +extern cpuop_func op_4490_33_ff; +extern cpuop_func op_4498_33_nf; +extern cpuop_func op_4498_33_ff; +extern cpuop_func op_44a0_33_nf; +extern cpuop_func op_44a0_33_ff; +extern cpuop_func op_44a8_33_nf; +extern cpuop_func op_44a8_33_ff; +extern cpuop_func op_44b0_33_nf; +extern cpuop_func op_44b0_33_ff; +extern cpuop_func op_44b8_33_nf; +extern cpuop_func op_44b8_33_ff; +extern cpuop_func op_44b9_33_nf; +extern cpuop_func op_44b9_33_ff; +extern cpuop_func op_44c0_33_nf; +extern cpuop_func op_44c0_33_ff; +extern cpuop_func op_44d0_33_nf; +extern cpuop_func op_44d0_33_ff; +extern cpuop_func op_44d8_33_nf; +extern cpuop_func op_44d8_33_ff; +extern cpuop_func op_44e0_33_nf; +extern cpuop_func op_44e0_33_ff; +extern cpuop_func op_44e8_33_nf; +extern cpuop_func op_44e8_33_ff; +extern cpuop_func op_44f0_33_nf; +extern cpuop_func op_44f0_33_ff; +extern cpuop_func op_44f8_33_nf; +extern cpuop_func op_44f8_33_ff; +extern cpuop_func op_44f9_33_nf; +extern cpuop_func op_44f9_33_ff; +extern cpuop_func op_44fa_33_nf; +extern cpuop_func op_44fa_33_ff; +extern cpuop_func op_44fb_33_nf; +extern cpuop_func op_44fb_33_ff; +extern cpuop_func op_44fc_33_nf; +extern cpuop_func op_44fc_33_ff; +extern cpuop_func op_4600_33_nf; +extern cpuop_func op_4600_33_ff; +extern cpuop_func op_4610_33_nf; +extern cpuop_func op_4610_33_ff; +extern cpuop_func op_4618_33_nf; +extern cpuop_func op_4618_33_ff; +extern cpuop_func op_4620_33_nf; +extern cpuop_func op_4620_33_ff; +extern cpuop_func op_4628_33_nf; +extern cpuop_func op_4628_33_ff; +extern cpuop_func op_4630_33_nf; +extern cpuop_func op_4630_33_ff; +extern cpuop_func op_4638_33_nf; +extern cpuop_func op_4638_33_ff; +extern cpuop_func op_4639_33_nf; +extern cpuop_func op_4639_33_ff; +extern cpuop_func op_4640_33_nf; +extern cpuop_func op_4640_33_ff; +extern cpuop_func op_4650_33_nf; +extern cpuop_func op_4650_33_ff; +extern cpuop_func op_4658_33_nf; +extern cpuop_func op_4658_33_ff; +extern cpuop_func op_4660_33_nf; +extern cpuop_func op_4660_33_ff; +extern cpuop_func op_4668_33_nf; +extern cpuop_func op_4668_33_ff; +extern cpuop_func op_4670_33_nf; +extern cpuop_func op_4670_33_ff; +extern cpuop_func op_4678_33_nf; +extern cpuop_func op_4678_33_ff; +extern cpuop_func op_4679_33_nf; +extern cpuop_func op_4679_33_ff; +extern cpuop_func op_4680_33_nf; +extern cpuop_func op_4680_33_ff; +extern cpuop_func op_4690_33_nf; +extern cpuop_func op_4690_33_ff; +extern cpuop_func op_4698_33_nf; +extern cpuop_func op_4698_33_ff; +extern cpuop_func op_46a0_33_nf; +extern cpuop_func op_46a0_33_ff; +extern cpuop_func op_46a8_33_nf; +extern cpuop_func op_46a8_33_ff; +extern cpuop_func op_46b0_33_nf; +extern cpuop_func op_46b0_33_ff; +extern cpuop_func op_46b8_33_nf; +extern cpuop_func op_46b8_33_ff; +extern cpuop_func op_46b9_33_nf; +extern cpuop_func op_46b9_33_ff; +extern cpuop_func op_46c0_33_nf; +extern cpuop_func op_46c0_33_ff; +extern cpuop_func op_46d0_33_nf; +extern cpuop_func op_46d0_33_ff; +extern cpuop_func op_46d8_33_nf; +extern cpuop_func op_46d8_33_ff; +extern cpuop_func op_46e0_33_nf; +extern cpuop_func op_46e0_33_ff; +extern cpuop_func op_46e8_33_nf; +extern cpuop_func op_46e8_33_ff; +extern cpuop_func op_46f0_33_nf; +extern cpuop_func op_46f0_33_ff; +extern cpuop_func op_46f8_33_nf; +extern cpuop_func op_46f8_33_ff; +extern cpuop_func op_46f9_33_nf; +extern cpuop_func op_46f9_33_ff; +extern cpuop_func op_46fa_33_nf; +extern cpuop_func op_46fa_33_ff; +extern cpuop_func op_46fb_33_nf; +extern cpuop_func op_46fb_33_ff; +extern cpuop_func op_46fc_33_nf; +extern cpuop_func op_46fc_33_ff; +extern cpuop_func op_4800_33_nf; +extern cpuop_func op_4800_33_ff; +extern cpuop_func op_4808_33_nf; +extern cpuop_func op_4808_33_ff; +extern cpuop_func op_4810_33_nf; +extern cpuop_func op_4810_33_ff; +extern cpuop_func op_4818_33_nf; +extern cpuop_func op_4818_33_ff; +extern cpuop_func op_4820_33_nf; +extern cpuop_func op_4820_33_ff; +extern cpuop_func op_4828_33_nf; +extern cpuop_func op_4828_33_ff; +extern cpuop_func op_4830_33_nf; +extern cpuop_func op_4830_33_ff; +extern cpuop_func op_4838_33_nf; +extern cpuop_func op_4838_33_ff; +extern cpuop_func op_4839_33_nf; +extern cpuop_func op_4839_33_ff; +extern cpuop_func op_4840_33_nf; +extern cpuop_func op_4840_33_ff; +extern cpuop_func op_4848_33_nf; +extern cpuop_func op_4848_33_ff; +extern cpuop_func op_4850_33_nf; +extern cpuop_func op_4850_33_ff; +extern cpuop_func op_4868_33_nf; +extern cpuop_func op_4868_33_ff; +extern cpuop_func op_4870_33_nf; +extern cpuop_func op_4870_33_ff; +extern cpuop_func op_4878_33_nf; +extern cpuop_func op_4878_33_ff; +extern cpuop_func op_4879_33_nf; +extern cpuop_func op_4879_33_ff; +extern cpuop_func op_487a_33_nf; +extern cpuop_func op_487a_33_ff; +extern cpuop_func op_487b_33_nf; +extern cpuop_func op_487b_33_ff; +extern cpuop_func op_4880_33_nf; +extern cpuop_func op_4880_33_ff; +extern cpuop_func op_4890_33_nf; +extern cpuop_func op_4890_33_ff; +extern cpuop_func op_48a0_33_nf; +extern cpuop_func op_48a0_33_ff; +extern cpuop_func op_48a8_33_nf; +extern cpuop_func op_48a8_33_ff; +extern cpuop_func op_48b0_33_nf; +extern cpuop_func op_48b0_33_ff; +extern cpuop_func op_48b8_33_nf; +extern cpuop_func op_48b8_33_ff; +extern cpuop_func op_48b9_33_nf; +extern cpuop_func op_48b9_33_ff; +extern cpuop_func op_48c0_33_nf; +extern cpuop_func op_48c0_33_ff; +extern cpuop_func op_48d0_33_nf; +extern cpuop_func op_48d0_33_ff; +extern cpuop_func op_48e0_33_nf; +extern cpuop_func op_48e0_33_ff; +extern cpuop_func op_48e8_33_nf; +extern cpuop_func op_48e8_33_ff; +extern cpuop_func op_48f0_33_nf; +extern cpuop_func op_48f0_33_ff; +extern cpuop_func op_48f8_33_nf; +extern cpuop_func op_48f8_33_ff; +extern cpuop_func op_48f9_33_nf; +extern cpuop_func op_48f9_33_ff; +extern cpuop_func op_49c0_33_nf; +extern cpuop_func op_49c0_33_ff; +extern cpuop_func op_4a00_33_nf; +extern cpuop_func op_4a00_33_ff; +extern cpuop_func op_4a10_33_nf; +extern cpuop_func op_4a10_33_ff; +extern cpuop_func op_4a18_33_nf; +extern cpuop_func op_4a18_33_ff; +extern cpuop_func op_4a20_33_nf; +extern cpuop_func op_4a20_33_ff; +extern cpuop_func op_4a28_33_nf; +extern cpuop_func op_4a28_33_ff; +extern cpuop_func op_4a30_33_nf; +extern cpuop_func op_4a30_33_ff; +extern cpuop_func op_4a38_33_nf; +extern cpuop_func op_4a38_33_ff; +extern cpuop_func op_4a39_33_nf; +extern cpuop_func op_4a39_33_ff; +extern cpuop_func op_4a3a_33_nf; +extern cpuop_func op_4a3a_33_ff; +extern cpuop_func op_4a3b_33_nf; +extern cpuop_func op_4a3b_33_ff; +extern cpuop_func op_4a3c_33_nf; +extern cpuop_func op_4a3c_33_ff; +extern cpuop_func op_4a40_33_nf; +extern cpuop_func op_4a40_33_ff; +extern cpuop_func op_4a48_33_nf; +extern cpuop_func op_4a48_33_ff; +extern cpuop_func op_4a50_33_nf; +extern cpuop_func op_4a50_33_ff; +extern cpuop_func op_4a58_33_nf; +extern cpuop_func op_4a58_33_ff; +extern cpuop_func op_4a60_33_nf; +extern cpuop_func op_4a60_33_ff; +extern cpuop_func op_4a68_33_nf; +extern cpuop_func op_4a68_33_ff; +extern cpuop_func op_4a70_33_nf; +extern cpuop_func op_4a70_33_ff; +extern cpuop_func op_4a78_33_nf; +extern cpuop_func op_4a78_33_ff; +extern cpuop_func op_4a79_33_nf; +extern cpuop_func op_4a79_33_ff; +extern cpuop_func op_4a7a_33_nf; +extern cpuop_func op_4a7a_33_ff; +extern cpuop_func op_4a7b_33_nf; +extern cpuop_func op_4a7b_33_ff; +extern cpuop_func op_4a7c_33_nf; +extern cpuop_func op_4a7c_33_ff; +extern cpuop_func op_4a80_33_nf; +extern cpuop_func op_4a80_33_ff; +extern cpuop_func op_4a88_33_nf; +extern cpuop_func op_4a88_33_ff; +extern cpuop_func op_4a90_33_nf; +extern cpuop_func op_4a90_33_ff; +extern cpuop_func op_4a98_33_nf; +extern cpuop_func op_4a98_33_ff; +extern cpuop_func op_4aa0_33_nf; +extern cpuop_func op_4aa0_33_ff; +extern cpuop_func op_4aa8_33_nf; +extern cpuop_func op_4aa8_33_ff; +extern cpuop_func op_4ab0_33_nf; +extern cpuop_func op_4ab0_33_ff; +extern cpuop_func op_4ab8_33_nf; +extern cpuop_func op_4ab8_33_ff; +extern cpuop_func op_4ab9_33_nf; +extern cpuop_func op_4ab9_33_ff; +extern cpuop_func op_4aba_33_nf; +extern cpuop_func op_4aba_33_ff; +extern cpuop_func op_4abb_33_nf; +extern cpuop_func op_4abb_33_ff; +extern cpuop_func op_4abc_33_nf; +extern cpuop_func op_4abc_33_ff; +extern cpuop_func op_4ac0_33_nf; +extern cpuop_func op_4ac0_33_ff; +extern cpuop_func op_4ac8_33_nf; +extern cpuop_func op_4ac8_33_ff; +extern cpuop_func op_4acc_33_nf; +extern cpuop_func op_4acc_33_ff; +extern cpuop_func op_4ad0_33_nf; +extern cpuop_func op_4ad0_33_ff; +extern cpuop_func op_4ad8_33_nf; +extern cpuop_func op_4ad8_33_ff; +extern cpuop_func op_4ae0_33_nf; +extern cpuop_func op_4ae0_33_ff; +extern cpuop_func op_4ae8_33_nf; +extern cpuop_func op_4ae8_33_ff; +extern cpuop_func op_4af0_33_nf; +extern cpuop_func op_4af0_33_ff; +extern cpuop_func op_4af8_33_nf; +extern cpuop_func op_4af8_33_ff; +extern cpuop_func op_4af9_33_nf; +extern cpuop_func op_4af9_33_ff; +extern cpuop_func op_4c00_33_nf; +extern cpuop_func op_4c00_33_ff; +extern cpuop_func op_4c10_33_nf; +extern cpuop_func op_4c10_33_ff; +extern cpuop_func op_4c18_33_nf; +extern cpuop_func op_4c18_33_ff; +extern cpuop_func op_4c20_33_nf; +extern cpuop_func op_4c20_33_ff; +extern cpuop_func op_4c28_33_nf; +extern cpuop_func op_4c28_33_ff; +extern cpuop_func op_4c30_33_nf; +extern cpuop_func op_4c30_33_ff; +extern cpuop_func op_4c38_33_nf; +extern cpuop_func op_4c38_33_ff; +extern cpuop_func op_4c39_33_nf; +extern cpuop_func op_4c39_33_ff; +extern cpuop_func op_4c3a_33_nf; +extern cpuop_func op_4c3a_33_ff; +extern cpuop_func op_4c3b_33_nf; +extern cpuop_func op_4c3b_33_ff; +extern cpuop_func op_4c3c_33_nf; +extern cpuop_func op_4c3c_33_ff; +extern cpuop_func op_4c40_33_nf; +extern cpuop_func op_4c40_33_ff; +extern cpuop_func op_4c50_33_nf; +extern cpuop_func op_4c50_33_ff; +extern cpuop_func op_4c58_33_nf; +extern cpuop_func op_4c58_33_ff; +extern cpuop_func op_4c60_33_nf; +extern cpuop_func op_4c60_33_ff; +extern cpuop_func op_4c68_33_nf; +extern cpuop_func op_4c68_33_ff; +extern cpuop_func op_4c70_33_nf; +extern cpuop_func op_4c70_33_ff; +extern cpuop_func op_4c78_33_nf; +extern cpuop_func op_4c78_33_ff; +extern cpuop_func op_4c79_33_nf; +extern cpuop_func op_4c79_33_ff; +extern cpuop_func op_4c7a_33_nf; +extern cpuop_func op_4c7a_33_ff; +extern cpuop_func op_4c7b_33_nf; +extern cpuop_func op_4c7b_33_ff; +extern cpuop_func op_4c7c_33_nf; +extern cpuop_func op_4c7c_33_ff; +extern cpuop_func op_4c90_33_nf; +extern cpuop_func op_4c90_33_ff; +extern cpuop_func op_4c98_33_nf; +extern cpuop_func op_4c98_33_ff; +extern cpuop_func op_4ca8_33_nf; +extern cpuop_func op_4ca8_33_ff; +extern cpuop_func op_4cb0_33_nf; +extern cpuop_func op_4cb0_33_ff; +extern cpuop_func op_4cb8_33_nf; +extern cpuop_func op_4cb8_33_ff; +extern cpuop_func op_4cb9_33_nf; +extern cpuop_func op_4cb9_33_ff; +extern cpuop_func op_4cba_33_nf; +extern cpuop_func op_4cba_33_ff; +extern cpuop_func op_4cbb_33_nf; +extern cpuop_func op_4cbb_33_ff; +extern cpuop_func op_4cd0_33_nf; +extern cpuop_func op_4cd0_33_ff; +extern cpuop_func op_4cd8_33_nf; +extern cpuop_func op_4cd8_33_ff; +extern cpuop_func op_4ce8_33_nf; +extern cpuop_func op_4ce8_33_ff; +extern cpuop_func op_4cf0_33_nf; +extern cpuop_func op_4cf0_33_ff; +extern cpuop_func op_4cf8_33_nf; +extern cpuop_func op_4cf8_33_ff; +extern cpuop_func op_4cf9_33_nf; +extern cpuop_func op_4cf9_33_ff; +extern cpuop_func op_4cfa_33_nf; +extern cpuop_func op_4cfa_33_ff; +extern cpuop_func op_4cfb_33_nf; +extern cpuop_func op_4cfb_33_ff; +extern cpuop_func op_4e40_33_nf; +extern cpuop_func op_4e40_33_ff; +extern cpuop_func op_4e50_33_nf; +extern cpuop_func op_4e50_33_ff; +extern cpuop_func op_4e58_33_nf; +extern cpuop_func op_4e58_33_ff; +extern cpuop_func op_4e60_33_nf; +extern cpuop_func op_4e60_33_ff; +extern cpuop_func op_4e68_33_nf; +extern cpuop_func op_4e68_33_ff; +extern cpuop_func op_4e70_33_nf; +extern cpuop_func op_4e70_33_ff; +extern cpuop_func op_4e71_33_nf; +extern cpuop_func op_4e71_33_ff; +extern cpuop_func op_4e72_33_nf; +extern cpuop_func op_4e72_33_ff; +extern cpuop_func op_4e73_33_nf; +extern cpuop_func op_4e73_33_ff; +extern cpuop_func op_4e74_33_nf; +extern cpuop_func op_4e74_33_ff; +extern cpuop_func op_4e75_33_nf; +extern cpuop_func op_4e75_33_ff; +extern cpuop_func op_4e76_33_nf; +extern cpuop_func op_4e76_33_ff; +extern cpuop_func op_4e77_33_nf; +extern cpuop_func op_4e77_33_ff; +extern cpuop_func op_4e7a_33_nf; +extern cpuop_func op_4e7a_33_ff; +extern cpuop_func op_4e7b_33_nf; +extern cpuop_func op_4e7b_33_ff; +extern cpuop_func op_4e90_33_nf; +extern cpuop_func op_4e90_33_ff; +extern cpuop_func op_4ea8_33_nf; +extern cpuop_func op_4ea8_33_ff; +extern cpuop_func op_4eb0_33_nf; +extern cpuop_func op_4eb0_33_ff; +extern cpuop_func op_4eb8_33_nf; +extern cpuop_func op_4eb8_33_ff; +extern cpuop_func op_4eb9_33_nf; +extern cpuop_func op_4eb9_33_ff; +extern cpuop_func op_4eba_33_nf; +extern cpuop_func op_4eba_33_ff; +extern cpuop_func op_4ebb_33_nf; +extern cpuop_func op_4ebb_33_ff; +extern cpuop_func op_4ed0_33_nf; +extern cpuop_func op_4ed0_33_ff; +extern cpuop_func op_4ee8_33_nf; +extern cpuop_func op_4ee8_33_ff; +extern cpuop_func op_4ef0_33_nf; +extern cpuop_func op_4ef0_33_ff; +extern cpuop_func op_4ef8_33_nf; +extern cpuop_func op_4ef8_33_ff; +extern cpuop_func op_4ef9_33_nf; +extern cpuop_func op_4ef9_33_ff; +extern cpuop_func op_4efa_33_nf; +extern cpuop_func op_4efa_33_ff; +extern cpuop_func op_4efb_33_nf; +extern cpuop_func op_4efb_33_ff; +extern cpuop_func op_5000_33_nf; +extern cpuop_func op_5000_33_ff; +extern cpuop_func op_5010_33_nf; +extern cpuop_func op_5010_33_ff; +extern cpuop_func op_5018_33_nf; +extern cpuop_func op_5018_33_ff; +extern cpuop_func op_5020_33_nf; +extern cpuop_func op_5020_33_ff; +extern cpuop_func op_5028_33_nf; +extern cpuop_func op_5028_33_ff; +extern cpuop_func op_5030_33_nf; +extern cpuop_func op_5030_33_ff; +extern cpuop_func op_5038_33_nf; +extern cpuop_func op_5038_33_ff; +extern cpuop_func op_5039_33_nf; +extern cpuop_func op_5039_33_ff; +extern cpuop_func op_5040_33_nf; +extern cpuop_func op_5040_33_ff; +extern cpuop_func op_5048_33_nf; +extern cpuop_func op_5048_33_ff; +extern cpuop_func op_5050_33_nf; +extern cpuop_func op_5050_33_ff; +extern cpuop_func op_5058_33_nf; +extern cpuop_func op_5058_33_ff; +extern cpuop_func op_5060_33_nf; +extern cpuop_func op_5060_33_ff; +extern cpuop_func op_5068_33_nf; +extern cpuop_func op_5068_33_ff; +extern cpuop_func op_5070_33_nf; +extern cpuop_func op_5070_33_ff; +extern cpuop_func op_5078_33_nf; +extern cpuop_func op_5078_33_ff; +extern cpuop_func op_5079_33_nf; +extern cpuop_func op_5079_33_ff; +extern cpuop_func op_5080_33_nf; +extern cpuop_func op_5080_33_ff; +extern cpuop_func op_5088_33_nf; +extern cpuop_func op_5088_33_ff; +extern cpuop_func op_5090_33_nf; +extern cpuop_func op_5090_33_ff; +extern cpuop_func op_5098_33_nf; +extern cpuop_func op_5098_33_ff; +extern cpuop_func op_50a0_33_nf; +extern cpuop_func op_50a0_33_ff; +extern cpuop_func op_50a8_33_nf; +extern cpuop_func op_50a8_33_ff; +extern cpuop_func op_50b0_33_nf; +extern cpuop_func op_50b0_33_ff; +extern cpuop_func op_50b8_33_nf; +extern cpuop_func op_50b8_33_ff; +extern cpuop_func op_50b9_33_nf; +extern cpuop_func op_50b9_33_ff; +extern cpuop_func op_50c0_33_nf; +extern cpuop_func op_50c0_33_ff; +extern cpuop_func op_50c8_33_nf; +extern cpuop_func op_50c8_33_ff; +extern cpuop_func op_50d0_33_nf; +extern cpuop_func op_50d0_33_ff; +extern cpuop_func op_50d8_33_nf; +extern cpuop_func op_50d8_33_ff; +extern cpuop_func op_50e0_33_nf; +extern cpuop_func op_50e0_33_ff; +extern cpuop_func op_50e8_33_nf; +extern cpuop_func op_50e8_33_ff; +extern cpuop_func op_50f0_33_nf; +extern cpuop_func op_50f0_33_ff; +extern cpuop_func op_50f8_33_nf; +extern cpuop_func op_50f8_33_ff; +extern cpuop_func op_50f9_33_nf; +extern cpuop_func op_50f9_33_ff; +extern cpuop_func op_50fa_33_nf; +extern cpuop_func op_50fa_33_ff; +extern cpuop_func op_50fb_33_nf; +extern cpuop_func op_50fb_33_ff; +extern cpuop_func op_50fc_33_nf; +extern cpuop_func op_50fc_33_ff; +extern cpuop_func op_5100_33_nf; +extern cpuop_func op_5100_33_ff; +extern cpuop_func op_5110_33_nf; +extern cpuop_func op_5110_33_ff; +extern cpuop_func op_5118_33_nf; +extern cpuop_func op_5118_33_ff; +extern cpuop_func op_5120_33_nf; +extern cpuop_func op_5120_33_ff; +extern cpuop_func op_5128_33_nf; +extern cpuop_func op_5128_33_ff; +extern cpuop_func op_5130_33_nf; +extern cpuop_func op_5130_33_ff; +extern cpuop_func op_5138_33_nf; +extern cpuop_func op_5138_33_ff; +extern cpuop_func op_5139_33_nf; +extern cpuop_func op_5139_33_ff; +extern cpuop_func op_5140_33_nf; +extern cpuop_func op_5140_33_ff; +extern cpuop_func op_5148_33_nf; +extern cpuop_func op_5148_33_ff; +extern cpuop_func op_5150_33_nf; +extern cpuop_func op_5150_33_ff; +extern cpuop_func op_5158_33_nf; +extern cpuop_func op_5158_33_ff; +extern cpuop_func op_5160_33_nf; +extern cpuop_func op_5160_33_ff; +extern cpuop_func op_5168_33_nf; +extern cpuop_func op_5168_33_ff; +extern cpuop_func op_5170_33_nf; +extern cpuop_func op_5170_33_ff; +extern cpuop_func op_5178_33_nf; +extern cpuop_func op_5178_33_ff; +extern cpuop_func op_5179_33_nf; +extern cpuop_func op_5179_33_ff; +extern cpuop_func op_5180_33_nf; +extern cpuop_func op_5180_33_ff; +extern cpuop_func op_5188_33_nf; +extern cpuop_func op_5188_33_ff; +extern cpuop_func op_5190_33_nf; +extern cpuop_func op_5190_33_ff; +extern cpuop_func op_5198_33_nf; +extern cpuop_func op_5198_33_ff; +extern cpuop_func op_51a0_33_nf; +extern cpuop_func op_51a0_33_ff; +extern cpuop_func op_51a8_33_nf; +extern cpuop_func op_51a8_33_ff; +extern cpuop_func op_51b0_33_nf; +extern cpuop_func op_51b0_33_ff; +extern cpuop_func op_51b8_33_nf; +extern cpuop_func op_51b8_33_ff; +extern cpuop_func op_51b9_33_nf; +extern cpuop_func op_51b9_33_ff; +extern cpuop_func op_51c0_33_nf; +extern cpuop_func op_51c0_33_ff; +extern cpuop_func op_51c8_33_nf; +extern cpuop_func op_51c8_33_ff; +extern cpuop_func op_51d0_33_nf; +extern cpuop_func op_51d0_33_ff; +extern cpuop_func op_51d8_33_nf; +extern cpuop_func op_51d8_33_ff; +extern cpuop_func op_51e0_33_nf; +extern cpuop_func op_51e0_33_ff; +extern cpuop_func op_51e8_33_nf; +extern cpuop_func op_51e8_33_ff; +extern cpuop_func op_51f0_33_nf; +extern cpuop_func op_51f0_33_ff; +extern cpuop_func op_51f8_33_nf; +extern cpuop_func op_51f8_33_ff; +extern cpuop_func op_51f9_33_nf; +extern cpuop_func op_51f9_33_ff; +extern cpuop_func op_51fa_33_nf; +extern cpuop_func op_51fa_33_ff; +extern cpuop_func op_51fb_33_nf; +extern cpuop_func op_51fb_33_ff; +extern cpuop_func op_51fc_33_nf; +extern cpuop_func op_51fc_33_ff; +extern cpuop_func op_52c0_33_nf; +extern cpuop_func op_52c0_33_ff; +extern cpuop_func op_52c8_33_nf; +extern cpuop_func op_52c8_33_ff; +extern cpuop_func op_52d0_33_nf; +extern cpuop_func op_52d0_33_ff; +extern cpuop_func op_52d8_33_nf; +extern cpuop_func op_52d8_33_ff; +extern cpuop_func op_52e0_33_nf; +extern cpuop_func op_52e0_33_ff; +extern cpuop_func op_52e8_33_nf; +extern cpuop_func op_52e8_33_ff; +extern cpuop_func op_52f0_33_nf; +extern cpuop_func op_52f0_33_ff; +extern cpuop_func op_52f8_33_nf; +extern cpuop_func op_52f8_33_ff; +extern cpuop_func op_52f9_33_nf; +extern cpuop_func op_52f9_33_ff; +extern cpuop_func op_52fa_33_nf; +extern cpuop_func op_52fa_33_ff; +extern cpuop_func op_52fb_33_nf; +extern cpuop_func op_52fb_33_ff; +extern cpuop_func op_52fc_33_nf; +extern cpuop_func op_52fc_33_ff; +extern cpuop_func op_53c0_33_nf; +extern cpuop_func op_53c0_33_ff; +extern cpuop_func op_53c8_33_nf; +extern cpuop_func op_53c8_33_ff; +extern cpuop_func op_53d0_33_nf; +extern cpuop_func op_53d0_33_ff; +extern cpuop_func op_53d8_33_nf; +extern cpuop_func op_53d8_33_ff; +extern cpuop_func op_53e0_33_nf; +extern cpuop_func op_53e0_33_ff; +extern cpuop_func op_53e8_33_nf; +extern cpuop_func op_53e8_33_ff; +extern cpuop_func op_53f0_33_nf; +extern cpuop_func op_53f0_33_ff; +extern cpuop_func op_53f8_33_nf; +extern cpuop_func op_53f8_33_ff; +extern cpuop_func op_53f9_33_nf; +extern cpuop_func op_53f9_33_ff; +extern cpuop_func op_53fa_33_nf; +extern cpuop_func op_53fa_33_ff; +extern cpuop_func op_53fb_33_nf; +extern cpuop_func op_53fb_33_ff; +extern cpuop_func op_53fc_33_nf; +extern cpuop_func op_53fc_33_ff; +extern cpuop_func op_54c0_33_nf; +extern cpuop_func op_54c0_33_ff; +extern cpuop_func op_54c8_33_nf; +extern cpuop_func op_54c8_33_ff; +extern cpuop_func op_54d0_33_nf; +extern cpuop_func op_54d0_33_ff; +extern cpuop_func op_54d8_33_nf; +extern cpuop_func op_54d8_33_ff; +extern cpuop_func op_54e0_33_nf; +extern cpuop_func op_54e0_33_ff; +extern cpuop_func op_54e8_33_nf; +extern cpuop_func op_54e8_33_ff; +extern cpuop_func op_54f0_33_nf; +extern cpuop_func op_54f0_33_ff; +extern cpuop_func op_54f8_33_nf; +extern cpuop_func op_54f8_33_ff; +extern cpuop_func op_54f9_33_nf; +extern cpuop_func op_54f9_33_ff; +extern cpuop_func op_54fa_33_nf; +extern cpuop_func op_54fa_33_ff; +extern cpuop_func op_54fb_33_nf; +extern cpuop_func op_54fb_33_ff; +extern cpuop_func op_54fc_33_nf; +extern cpuop_func op_54fc_33_ff; +extern cpuop_func op_55c0_33_nf; +extern cpuop_func op_55c0_33_ff; +extern cpuop_func op_55c8_33_nf; +extern cpuop_func op_55c8_33_ff; +extern cpuop_func op_55d0_33_nf; +extern cpuop_func op_55d0_33_ff; +extern cpuop_func op_55d8_33_nf; +extern cpuop_func op_55d8_33_ff; +extern cpuop_func op_55e0_33_nf; +extern cpuop_func op_55e0_33_ff; +extern cpuop_func op_55e8_33_nf; +extern cpuop_func op_55e8_33_ff; +extern cpuop_func op_55f0_33_nf; +extern cpuop_func op_55f0_33_ff; +extern cpuop_func op_55f8_33_nf; +extern cpuop_func op_55f8_33_ff; +extern cpuop_func op_55f9_33_nf; +extern cpuop_func op_55f9_33_ff; +extern cpuop_func op_55fa_33_nf; +extern cpuop_func op_55fa_33_ff; +extern cpuop_func op_55fb_33_nf; +extern cpuop_func op_55fb_33_ff; +extern cpuop_func op_55fc_33_nf; +extern cpuop_func op_55fc_33_ff; +extern cpuop_func op_56c0_33_nf; +extern cpuop_func op_56c0_33_ff; +extern cpuop_func op_56c8_33_nf; +extern cpuop_func op_56c8_33_ff; +extern cpuop_func op_56d0_33_nf; +extern cpuop_func op_56d0_33_ff; +extern cpuop_func op_56d8_33_nf; +extern cpuop_func op_56d8_33_ff; +extern cpuop_func op_56e0_33_nf; +extern cpuop_func op_56e0_33_ff; +extern cpuop_func op_56e8_33_nf; +extern cpuop_func op_56e8_33_ff; +extern cpuop_func op_56f0_33_nf; +extern cpuop_func op_56f0_33_ff; +extern cpuop_func op_56f8_33_nf; +extern cpuop_func op_56f8_33_ff; +extern cpuop_func op_56f9_33_nf; +extern cpuop_func op_56f9_33_ff; +extern cpuop_func op_56fa_33_nf; +extern cpuop_func op_56fa_33_ff; +extern cpuop_func op_56fb_33_nf; +extern cpuop_func op_56fb_33_ff; +extern cpuop_func op_56fc_33_nf; +extern cpuop_func op_56fc_33_ff; +extern cpuop_func op_57c0_33_nf; +extern cpuop_func op_57c0_33_ff; +extern cpuop_func op_57c8_33_nf; +extern cpuop_func op_57c8_33_ff; +extern cpuop_func op_57d0_33_nf; +extern cpuop_func op_57d0_33_ff; +extern cpuop_func op_57d8_33_nf; +extern cpuop_func op_57d8_33_ff; +extern cpuop_func op_57e0_33_nf; +extern cpuop_func op_57e0_33_ff; +extern cpuop_func op_57e8_33_nf; +extern cpuop_func op_57e8_33_ff; +extern cpuop_func op_57f0_33_nf; +extern cpuop_func op_57f0_33_ff; +extern cpuop_func op_57f8_33_nf; +extern cpuop_func op_57f8_33_ff; +extern cpuop_func op_57f9_33_nf; +extern cpuop_func op_57f9_33_ff; +extern cpuop_func op_57fa_33_nf; +extern cpuop_func op_57fa_33_ff; +extern cpuop_func op_57fb_33_nf; +extern cpuop_func op_57fb_33_ff; +extern cpuop_func op_57fc_33_nf; +extern cpuop_func op_57fc_33_ff; +extern cpuop_func op_58c0_33_nf; +extern cpuop_func op_58c0_33_ff; +extern cpuop_func op_58c8_33_nf; +extern cpuop_func op_58c8_33_ff; +extern cpuop_func op_58d0_33_nf; +extern cpuop_func op_58d0_33_ff; +extern cpuop_func op_58d8_33_nf; +extern cpuop_func op_58d8_33_ff; +extern cpuop_func op_58e0_33_nf; +extern cpuop_func op_58e0_33_ff; +extern cpuop_func op_58e8_33_nf; +extern cpuop_func op_58e8_33_ff; +extern cpuop_func op_58f0_33_nf; +extern cpuop_func op_58f0_33_ff; +extern cpuop_func op_58f8_33_nf; +extern cpuop_func op_58f8_33_ff; +extern cpuop_func op_58f9_33_nf; +extern cpuop_func op_58f9_33_ff; +extern cpuop_func op_58fa_33_nf; +extern cpuop_func op_58fa_33_ff; +extern cpuop_func op_58fb_33_nf; +extern cpuop_func op_58fb_33_ff; +extern cpuop_func op_58fc_33_nf; +extern cpuop_func op_58fc_33_ff; +extern cpuop_func op_59c0_33_nf; +extern cpuop_func op_59c0_33_ff; +extern cpuop_func op_59c8_33_nf; +extern cpuop_func op_59c8_33_ff; +extern cpuop_func op_59d0_33_nf; +extern cpuop_func op_59d0_33_ff; +extern cpuop_func op_59d8_33_nf; +extern cpuop_func op_59d8_33_ff; +extern cpuop_func op_59e0_33_nf; +extern cpuop_func op_59e0_33_ff; +extern cpuop_func op_59e8_33_nf; +extern cpuop_func op_59e8_33_ff; +extern cpuop_func op_59f0_33_nf; +extern cpuop_func op_59f0_33_ff; +extern cpuop_func op_59f8_33_nf; +extern cpuop_func op_59f8_33_ff; +extern cpuop_func op_59f9_33_nf; +extern cpuop_func op_59f9_33_ff; +extern cpuop_func op_59fa_33_nf; +extern cpuop_func op_59fa_33_ff; +extern cpuop_func op_59fb_33_nf; +extern cpuop_func op_59fb_33_ff; +extern cpuop_func op_59fc_33_nf; +extern cpuop_func op_59fc_33_ff; +extern cpuop_func op_5ac0_33_nf; +extern cpuop_func op_5ac0_33_ff; +extern cpuop_func op_5ac8_33_nf; +extern cpuop_func op_5ac8_33_ff; +extern cpuop_func op_5ad0_33_nf; +extern cpuop_func op_5ad0_33_ff; +extern cpuop_func op_5ad8_33_nf; +extern cpuop_func op_5ad8_33_ff; +extern cpuop_func op_5ae0_33_nf; +extern cpuop_func op_5ae0_33_ff; +extern cpuop_func op_5ae8_33_nf; +extern cpuop_func op_5ae8_33_ff; +extern cpuop_func op_5af0_33_nf; +extern cpuop_func op_5af0_33_ff; +extern cpuop_func op_5af8_33_nf; +extern cpuop_func op_5af8_33_ff; +extern cpuop_func op_5af9_33_nf; +extern cpuop_func op_5af9_33_ff; +extern cpuop_func op_5afa_33_nf; +extern cpuop_func op_5afa_33_ff; +extern cpuop_func op_5afb_33_nf; +extern cpuop_func op_5afb_33_ff; +extern cpuop_func op_5afc_33_nf; +extern cpuop_func op_5afc_33_ff; +extern cpuop_func op_5bc0_33_nf; +extern cpuop_func op_5bc0_33_ff; +extern cpuop_func op_5bc8_33_nf; +extern cpuop_func op_5bc8_33_ff; +extern cpuop_func op_5bd0_33_nf; +extern cpuop_func op_5bd0_33_ff; +extern cpuop_func op_5bd8_33_nf; +extern cpuop_func op_5bd8_33_ff; +extern cpuop_func op_5be0_33_nf; +extern cpuop_func op_5be0_33_ff; +extern cpuop_func op_5be8_33_nf; +extern cpuop_func op_5be8_33_ff; +extern cpuop_func op_5bf0_33_nf; +extern cpuop_func op_5bf0_33_ff; +extern cpuop_func op_5bf8_33_nf; +extern cpuop_func op_5bf8_33_ff; +extern cpuop_func op_5bf9_33_nf; +extern cpuop_func op_5bf9_33_ff; +extern cpuop_func op_5bfa_33_nf; +extern cpuop_func op_5bfa_33_ff; +extern cpuop_func op_5bfb_33_nf; +extern cpuop_func op_5bfb_33_ff; +extern cpuop_func op_5bfc_33_nf; +extern cpuop_func op_5bfc_33_ff; +extern cpuop_func op_5cc0_33_nf; +extern cpuop_func op_5cc0_33_ff; +extern cpuop_func op_5cc8_33_nf; +extern cpuop_func op_5cc8_33_ff; +extern cpuop_func op_5cd0_33_nf; +extern cpuop_func op_5cd0_33_ff; +extern cpuop_func op_5cd8_33_nf; +extern cpuop_func op_5cd8_33_ff; +extern cpuop_func op_5ce0_33_nf; +extern cpuop_func op_5ce0_33_ff; +extern cpuop_func op_5ce8_33_nf; +extern cpuop_func op_5ce8_33_ff; +extern cpuop_func op_5cf0_33_nf; +extern cpuop_func op_5cf0_33_ff; +extern cpuop_func op_5cf8_33_nf; +extern cpuop_func op_5cf8_33_ff; +extern cpuop_func op_5cf9_33_nf; +extern cpuop_func op_5cf9_33_ff; +extern cpuop_func op_5cfa_33_nf; +extern cpuop_func op_5cfa_33_ff; +extern cpuop_func op_5cfb_33_nf; +extern cpuop_func op_5cfb_33_ff; +extern cpuop_func op_5cfc_33_nf; +extern cpuop_func op_5cfc_33_ff; +extern cpuop_func op_5dc0_33_nf; +extern cpuop_func op_5dc0_33_ff; +extern cpuop_func op_5dc8_33_nf; +extern cpuop_func op_5dc8_33_ff; +extern cpuop_func op_5dd0_33_nf; +extern cpuop_func op_5dd0_33_ff; +extern cpuop_func op_5dd8_33_nf; +extern cpuop_func op_5dd8_33_ff; +extern cpuop_func op_5de0_33_nf; +extern cpuop_func op_5de0_33_ff; +extern cpuop_func op_5de8_33_nf; +extern cpuop_func op_5de8_33_ff; +extern cpuop_func op_5df0_33_nf; +extern cpuop_func op_5df0_33_ff; +extern cpuop_func op_5df8_33_nf; +extern cpuop_func op_5df8_33_ff; +extern cpuop_func op_5df9_33_nf; +extern cpuop_func op_5df9_33_ff; +extern cpuop_func op_5dfa_33_nf; +extern cpuop_func op_5dfa_33_ff; +extern cpuop_func op_5dfb_33_nf; +extern cpuop_func op_5dfb_33_ff; +extern cpuop_func op_5dfc_33_nf; +extern cpuop_func op_5dfc_33_ff; +extern cpuop_func op_5ec0_33_nf; +extern cpuop_func op_5ec0_33_ff; +extern cpuop_func op_5ec8_33_nf; +extern cpuop_func op_5ec8_33_ff; +extern cpuop_func op_5ed0_33_nf; +extern cpuop_func op_5ed0_33_ff; +extern cpuop_func op_5ed8_33_nf; +extern cpuop_func op_5ed8_33_ff; +extern cpuop_func op_5ee0_33_nf; +extern cpuop_func op_5ee0_33_ff; +extern cpuop_func op_5ee8_33_nf; +extern cpuop_func op_5ee8_33_ff; +extern cpuop_func op_5ef0_33_nf; +extern cpuop_func op_5ef0_33_ff; +extern cpuop_func op_5ef8_33_nf; +extern cpuop_func op_5ef8_33_ff; +extern cpuop_func op_5ef9_33_nf; +extern cpuop_func op_5ef9_33_ff; +extern cpuop_func op_5efa_33_nf; +extern cpuop_func op_5efa_33_ff; +extern cpuop_func op_5efb_33_nf; +extern cpuop_func op_5efb_33_ff; +extern cpuop_func op_5efc_33_nf; +extern cpuop_func op_5efc_33_ff; +extern cpuop_func op_5fc0_33_nf; +extern cpuop_func op_5fc0_33_ff; +extern cpuop_func op_5fc8_33_nf; +extern cpuop_func op_5fc8_33_ff; +extern cpuop_func op_5fd0_33_nf; +extern cpuop_func op_5fd0_33_ff; +extern cpuop_func op_5fd8_33_nf; +extern cpuop_func op_5fd8_33_ff; +extern cpuop_func op_5fe0_33_nf; +extern cpuop_func op_5fe0_33_ff; +extern cpuop_func op_5fe8_33_nf; +extern cpuop_func op_5fe8_33_ff; +extern cpuop_func op_5ff0_33_nf; +extern cpuop_func op_5ff0_33_ff; +extern cpuop_func op_5ff8_33_nf; +extern cpuop_func op_5ff8_33_ff; +extern cpuop_func op_5ff9_33_nf; +extern cpuop_func op_5ff9_33_ff; +extern cpuop_func op_5ffa_33_nf; +extern cpuop_func op_5ffa_33_ff; +extern cpuop_func op_5ffb_33_nf; +extern cpuop_func op_5ffb_33_ff; +extern cpuop_func op_5ffc_33_nf; +extern cpuop_func op_5ffc_33_ff; +extern cpuop_func op_6000_33_nf; +extern cpuop_func op_6000_33_ff; +extern cpuop_func op_6001_33_nf; +extern cpuop_func op_6001_33_ff; +extern cpuop_func op_60ff_33_nf; +extern cpuop_func op_60ff_33_ff; +extern cpuop_func op_6100_33_nf; +extern cpuop_func op_6100_33_ff; +extern cpuop_func op_6101_33_nf; +extern cpuop_func op_6101_33_ff; +extern cpuop_func op_61ff_33_nf; +extern cpuop_func op_61ff_33_ff; +extern cpuop_func op_6200_33_nf; +extern cpuop_func op_6200_33_ff; +extern cpuop_func op_6201_33_nf; +extern cpuop_func op_6201_33_ff; +extern cpuop_func op_62ff_33_nf; +extern cpuop_func op_62ff_33_ff; +extern cpuop_func op_6300_33_nf; +extern cpuop_func op_6300_33_ff; +extern cpuop_func op_6301_33_nf; +extern cpuop_func op_6301_33_ff; +extern cpuop_func op_63ff_33_nf; +extern cpuop_func op_63ff_33_ff; +extern cpuop_func op_6400_33_nf; +extern cpuop_func op_6400_33_ff; +extern cpuop_func op_6401_33_nf; +extern cpuop_func op_6401_33_ff; +extern cpuop_func op_64ff_33_nf; +extern cpuop_func op_64ff_33_ff; +extern cpuop_func op_6500_33_nf; +extern cpuop_func op_6500_33_ff; +extern cpuop_func op_6501_33_nf; +extern cpuop_func op_6501_33_ff; +extern cpuop_func op_65ff_33_nf; +extern cpuop_func op_65ff_33_ff; +extern cpuop_func op_6600_33_nf; +extern cpuop_func op_6600_33_ff; +extern cpuop_func op_6601_33_nf; +extern cpuop_func op_6601_33_ff; +extern cpuop_func op_66ff_33_nf; +extern cpuop_func op_66ff_33_ff; +extern cpuop_func op_6700_33_nf; +extern cpuop_func op_6700_33_ff; +extern cpuop_func op_6701_33_nf; +extern cpuop_func op_6701_33_ff; +extern cpuop_func op_67ff_33_nf; +extern cpuop_func op_67ff_33_ff; +extern cpuop_func op_6800_33_nf; +extern cpuop_func op_6800_33_ff; +extern cpuop_func op_6801_33_nf; +extern cpuop_func op_6801_33_ff; +extern cpuop_func op_68ff_33_nf; +extern cpuop_func op_68ff_33_ff; +extern cpuop_func op_6900_33_nf; +extern cpuop_func op_6900_33_ff; +extern cpuop_func op_6901_33_nf; +extern cpuop_func op_6901_33_ff; +extern cpuop_func op_69ff_33_nf; +extern cpuop_func op_69ff_33_ff; +extern cpuop_func op_6a00_33_nf; +extern cpuop_func op_6a00_33_ff; +extern cpuop_func op_6a01_33_nf; +extern cpuop_func op_6a01_33_ff; +extern cpuop_func op_6aff_33_nf; +extern cpuop_func op_6aff_33_ff; +extern cpuop_func op_6b00_33_nf; +extern cpuop_func op_6b00_33_ff; +extern cpuop_func op_6b01_33_nf; +extern cpuop_func op_6b01_33_ff; +extern cpuop_func op_6bff_33_nf; +extern cpuop_func op_6bff_33_ff; +extern cpuop_func op_6c00_33_nf; +extern cpuop_func op_6c00_33_ff; +extern cpuop_func op_6c01_33_nf; +extern cpuop_func op_6c01_33_ff; +extern cpuop_func op_6cff_33_nf; +extern cpuop_func op_6cff_33_ff; +extern cpuop_func op_6d00_33_nf; +extern cpuop_func op_6d00_33_ff; +extern cpuop_func op_6d01_33_nf; +extern cpuop_func op_6d01_33_ff; +extern cpuop_func op_6dff_33_nf; +extern cpuop_func op_6dff_33_ff; +extern cpuop_func op_6e00_33_nf; +extern cpuop_func op_6e00_33_ff; +extern cpuop_func op_6e01_33_nf; +extern cpuop_func op_6e01_33_ff; +extern cpuop_func op_6eff_33_nf; +extern cpuop_func op_6eff_33_ff; +extern cpuop_func op_6f00_33_nf; +extern cpuop_func op_6f00_33_ff; +extern cpuop_func op_6f01_33_nf; +extern cpuop_func op_6f01_33_ff; +extern cpuop_func op_6fff_33_nf; +extern cpuop_func op_6fff_33_ff; +extern cpuop_func op_7000_33_nf; +extern cpuop_func op_7000_33_ff; +extern cpuop_func op_8000_33_nf; +extern cpuop_func op_8000_33_ff; +extern cpuop_func op_8010_33_nf; +extern cpuop_func op_8010_33_ff; +extern cpuop_func op_8018_33_nf; +extern cpuop_func op_8018_33_ff; +extern cpuop_func op_8020_33_nf; +extern cpuop_func op_8020_33_ff; +extern cpuop_func op_8028_33_nf; +extern cpuop_func op_8028_33_ff; +extern cpuop_func op_8030_33_nf; +extern cpuop_func op_8030_33_ff; +extern cpuop_func op_8038_33_nf; +extern cpuop_func op_8038_33_ff; +extern cpuop_func op_8039_33_nf; +extern cpuop_func op_8039_33_ff; +extern cpuop_func op_803a_33_nf; +extern cpuop_func op_803a_33_ff; +extern cpuop_func op_803b_33_nf; +extern cpuop_func op_803b_33_ff; +extern cpuop_func op_803c_33_nf; +extern cpuop_func op_803c_33_ff; +extern cpuop_func op_8040_33_nf; +extern cpuop_func op_8040_33_ff; +extern cpuop_func op_8050_33_nf; +extern cpuop_func op_8050_33_ff; +extern cpuop_func op_8058_33_nf; +extern cpuop_func op_8058_33_ff; +extern cpuop_func op_8060_33_nf; +extern cpuop_func op_8060_33_ff; +extern cpuop_func op_8068_33_nf; +extern cpuop_func op_8068_33_ff; +extern cpuop_func op_8070_33_nf; +extern cpuop_func op_8070_33_ff; +extern cpuop_func op_8078_33_nf; +extern cpuop_func op_8078_33_ff; +extern cpuop_func op_8079_33_nf; +extern cpuop_func op_8079_33_ff; +extern cpuop_func op_807a_33_nf; +extern cpuop_func op_807a_33_ff; +extern cpuop_func op_807b_33_nf; +extern cpuop_func op_807b_33_ff; +extern cpuop_func op_807c_33_nf; +extern cpuop_func op_807c_33_ff; +extern cpuop_func op_8080_33_nf; +extern cpuop_func op_8080_33_ff; +extern cpuop_func op_8090_33_nf; +extern cpuop_func op_8090_33_ff; +extern cpuop_func op_8098_33_nf; +extern cpuop_func op_8098_33_ff; +extern cpuop_func op_80a0_33_nf; +extern cpuop_func op_80a0_33_ff; +extern cpuop_func op_80a8_33_nf; +extern cpuop_func op_80a8_33_ff; +extern cpuop_func op_80b0_33_nf; +extern cpuop_func op_80b0_33_ff; +extern cpuop_func op_80b8_33_nf; +extern cpuop_func op_80b8_33_ff; +extern cpuop_func op_80b9_33_nf; +extern cpuop_func op_80b9_33_ff; +extern cpuop_func op_80ba_33_nf; +extern cpuop_func op_80ba_33_ff; +extern cpuop_func op_80bb_33_nf; +extern cpuop_func op_80bb_33_ff; +extern cpuop_func op_80bc_33_nf; +extern cpuop_func op_80bc_33_ff; +extern cpuop_func op_80c0_33_nf; +extern cpuop_func op_80c0_33_ff; +extern cpuop_func op_80d0_33_nf; +extern cpuop_func op_80d0_33_ff; +extern cpuop_func op_80d8_33_nf; +extern cpuop_func op_80d8_33_ff; +extern cpuop_func op_80e0_33_nf; +extern cpuop_func op_80e0_33_ff; +extern cpuop_func op_80e8_33_nf; +extern cpuop_func op_80e8_33_ff; +extern cpuop_func op_80f0_33_nf; +extern cpuop_func op_80f0_33_ff; +extern cpuop_func op_80f8_33_nf; +extern cpuop_func op_80f8_33_ff; +extern cpuop_func op_80f9_33_nf; +extern cpuop_func op_80f9_33_ff; +extern cpuop_func op_80fa_33_nf; +extern cpuop_func op_80fa_33_ff; +extern cpuop_func op_80fb_33_nf; +extern cpuop_func op_80fb_33_ff; +extern cpuop_func op_80fc_33_nf; +extern cpuop_func op_80fc_33_ff; +extern cpuop_func op_8100_33_nf; +extern cpuop_func op_8100_33_ff; +extern cpuop_func op_8108_33_nf; +extern cpuop_func op_8108_33_ff; +extern cpuop_func op_8110_33_nf; +extern cpuop_func op_8110_33_ff; +extern cpuop_func op_8118_33_nf; +extern cpuop_func op_8118_33_ff; +extern cpuop_func op_8120_33_nf; +extern cpuop_func op_8120_33_ff; +extern cpuop_func op_8128_33_nf; +extern cpuop_func op_8128_33_ff; +extern cpuop_func op_8130_33_nf; +extern cpuop_func op_8130_33_ff; +extern cpuop_func op_8138_33_nf; +extern cpuop_func op_8138_33_ff; +extern cpuop_func op_8139_33_nf; +extern cpuop_func op_8139_33_ff; +extern cpuop_func op_8140_33_nf; +extern cpuop_func op_8140_33_ff; +extern cpuop_func op_8148_33_nf; +extern cpuop_func op_8148_33_ff; +extern cpuop_func op_8150_33_nf; +extern cpuop_func op_8150_33_ff; +extern cpuop_func op_8158_33_nf; +extern cpuop_func op_8158_33_ff; +extern cpuop_func op_8160_33_nf; +extern cpuop_func op_8160_33_ff; +extern cpuop_func op_8168_33_nf; +extern cpuop_func op_8168_33_ff; +extern cpuop_func op_8170_33_nf; +extern cpuop_func op_8170_33_ff; +extern cpuop_func op_8178_33_nf; +extern cpuop_func op_8178_33_ff; +extern cpuop_func op_8179_33_nf; +extern cpuop_func op_8179_33_ff; +extern cpuop_func op_8180_33_nf; +extern cpuop_func op_8180_33_ff; +extern cpuop_func op_8188_33_nf; +extern cpuop_func op_8188_33_ff; +extern cpuop_func op_8190_33_nf; +extern cpuop_func op_8190_33_ff; +extern cpuop_func op_8198_33_nf; +extern cpuop_func op_8198_33_ff; +extern cpuop_func op_81a0_33_nf; +extern cpuop_func op_81a0_33_ff; +extern cpuop_func op_81a8_33_nf; +extern cpuop_func op_81a8_33_ff; +extern cpuop_func op_81b0_33_nf; +extern cpuop_func op_81b0_33_ff; +extern cpuop_func op_81b8_33_nf; +extern cpuop_func op_81b8_33_ff; +extern cpuop_func op_81b9_33_nf; +extern cpuop_func op_81b9_33_ff; +extern cpuop_func op_81c0_33_nf; +extern cpuop_func op_81c0_33_ff; +extern cpuop_func op_81d0_33_nf; +extern cpuop_func op_81d0_33_ff; +extern cpuop_func op_81d8_33_nf; +extern cpuop_func op_81d8_33_ff; +extern cpuop_func op_81e0_33_nf; +extern cpuop_func op_81e0_33_ff; +extern cpuop_func op_81e8_33_nf; +extern cpuop_func op_81e8_33_ff; +extern cpuop_func op_81f0_33_nf; +extern cpuop_func op_81f0_33_ff; +extern cpuop_func op_81f8_33_nf; +extern cpuop_func op_81f8_33_ff; +extern cpuop_func op_81f9_33_nf; +extern cpuop_func op_81f9_33_ff; +extern cpuop_func op_81fa_33_nf; +extern cpuop_func op_81fa_33_ff; +extern cpuop_func op_81fb_33_nf; +extern cpuop_func op_81fb_33_ff; +extern cpuop_func op_81fc_33_nf; +extern cpuop_func op_81fc_33_ff; +extern cpuop_func op_9000_33_nf; +extern cpuop_func op_9000_33_ff; +extern cpuop_func op_9010_33_nf; +extern cpuop_func op_9010_33_ff; +extern cpuop_func op_9018_33_nf; +extern cpuop_func op_9018_33_ff; +extern cpuop_func op_9020_33_nf; +extern cpuop_func op_9020_33_ff; +extern cpuop_func op_9028_33_nf; +extern cpuop_func op_9028_33_ff; +extern cpuop_func op_9030_33_nf; +extern cpuop_func op_9030_33_ff; +extern cpuop_func op_9038_33_nf; +extern cpuop_func op_9038_33_ff; +extern cpuop_func op_9039_33_nf; +extern cpuop_func op_9039_33_ff; +extern cpuop_func op_903a_33_nf; +extern cpuop_func op_903a_33_ff; +extern cpuop_func op_903b_33_nf; +extern cpuop_func op_903b_33_ff; +extern cpuop_func op_903c_33_nf; +extern cpuop_func op_903c_33_ff; +extern cpuop_func op_9040_33_nf; +extern cpuop_func op_9040_33_ff; +extern cpuop_func op_9048_33_nf; +extern cpuop_func op_9048_33_ff; +extern cpuop_func op_9050_33_nf; +extern cpuop_func op_9050_33_ff; +extern cpuop_func op_9058_33_nf; +extern cpuop_func op_9058_33_ff; +extern cpuop_func op_9060_33_nf; +extern cpuop_func op_9060_33_ff; +extern cpuop_func op_9068_33_nf; +extern cpuop_func op_9068_33_ff; +extern cpuop_func op_9070_33_nf; +extern cpuop_func op_9070_33_ff; +extern cpuop_func op_9078_33_nf; +extern cpuop_func op_9078_33_ff; +extern cpuop_func op_9079_33_nf; +extern cpuop_func op_9079_33_ff; +extern cpuop_func op_907a_33_nf; +extern cpuop_func op_907a_33_ff; +extern cpuop_func op_907b_33_nf; +extern cpuop_func op_907b_33_ff; +extern cpuop_func op_907c_33_nf; +extern cpuop_func op_907c_33_ff; +extern cpuop_func op_9080_33_nf; +extern cpuop_func op_9080_33_ff; +extern cpuop_func op_9088_33_nf; +extern cpuop_func op_9088_33_ff; +extern cpuop_func op_9090_33_nf; +extern cpuop_func op_9090_33_ff; +extern cpuop_func op_9098_33_nf; +extern cpuop_func op_9098_33_ff; +extern cpuop_func op_90a0_33_nf; +extern cpuop_func op_90a0_33_ff; +extern cpuop_func op_90a8_33_nf; +extern cpuop_func op_90a8_33_ff; +extern cpuop_func op_90b0_33_nf; +extern cpuop_func op_90b0_33_ff; +extern cpuop_func op_90b8_33_nf; +extern cpuop_func op_90b8_33_ff; +extern cpuop_func op_90b9_33_nf; +extern cpuop_func op_90b9_33_ff; +extern cpuop_func op_90ba_33_nf; +extern cpuop_func op_90ba_33_ff; +extern cpuop_func op_90bb_33_nf; +extern cpuop_func op_90bb_33_ff; +extern cpuop_func op_90bc_33_nf; +extern cpuop_func op_90bc_33_ff; +extern cpuop_func op_90c0_33_nf; +extern cpuop_func op_90c0_33_ff; +extern cpuop_func op_90c8_33_nf; +extern cpuop_func op_90c8_33_ff; +extern cpuop_func op_90d0_33_nf; +extern cpuop_func op_90d0_33_ff; +extern cpuop_func op_90d8_33_nf; +extern cpuop_func op_90d8_33_ff; +extern cpuop_func op_90e0_33_nf; +extern cpuop_func op_90e0_33_ff; +extern cpuop_func op_90e8_33_nf; +extern cpuop_func op_90e8_33_ff; +extern cpuop_func op_90f0_33_nf; +extern cpuop_func op_90f0_33_ff; +extern cpuop_func op_90f8_33_nf; +extern cpuop_func op_90f8_33_ff; +extern cpuop_func op_90f9_33_nf; +extern cpuop_func op_90f9_33_ff; +extern cpuop_func op_90fa_33_nf; +extern cpuop_func op_90fa_33_ff; +extern cpuop_func op_90fb_33_nf; +extern cpuop_func op_90fb_33_ff; +extern cpuop_func op_90fc_33_nf; +extern cpuop_func op_90fc_33_ff; +extern cpuop_func op_9100_33_nf; +extern cpuop_func op_9100_33_ff; +extern cpuop_func op_9108_33_nf; +extern cpuop_func op_9108_33_ff; +extern cpuop_func op_9110_33_nf; +extern cpuop_func op_9110_33_ff; +extern cpuop_func op_9118_33_nf; +extern cpuop_func op_9118_33_ff; +extern cpuop_func op_9120_33_nf; +extern cpuop_func op_9120_33_ff; +extern cpuop_func op_9128_33_nf; +extern cpuop_func op_9128_33_ff; +extern cpuop_func op_9130_33_nf; +extern cpuop_func op_9130_33_ff; +extern cpuop_func op_9138_33_nf; +extern cpuop_func op_9138_33_ff; +extern cpuop_func op_9139_33_nf; +extern cpuop_func op_9139_33_ff; +extern cpuop_func op_9140_33_nf; +extern cpuop_func op_9140_33_ff; +extern cpuop_func op_9148_33_nf; +extern cpuop_func op_9148_33_ff; +extern cpuop_func op_9150_33_nf; +extern cpuop_func op_9150_33_ff; +extern cpuop_func op_9158_33_nf; +extern cpuop_func op_9158_33_ff; +extern cpuop_func op_9160_33_nf; +extern cpuop_func op_9160_33_ff; +extern cpuop_func op_9168_33_nf; +extern cpuop_func op_9168_33_ff; +extern cpuop_func op_9170_33_nf; +extern cpuop_func op_9170_33_ff; +extern cpuop_func op_9178_33_nf; +extern cpuop_func op_9178_33_ff; +extern cpuop_func op_9179_33_nf; +extern cpuop_func op_9179_33_ff; +extern cpuop_func op_9180_33_nf; +extern cpuop_func op_9180_33_ff; +extern cpuop_func op_9188_33_nf; +extern cpuop_func op_9188_33_ff; +extern cpuop_func op_9190_33_nf; +extern cpuop_func op_9190_33_ff; +extern cpuop_func op_9198_33_nf; +extern cpuop_func op_9198_33_ff; +extern cpuop_func op_91a0_33_nf; +extern cpuop_func op_91a0_33_ff; +extern cpuop_func op_91a8_33_nf; +extern cpuop_func op_91a8_33_ff; +extern cpuop_func op_91b0_33_nf; +extern cpuop_func op_91b0_33_ff; +extern cpuop_func op_91b8_33_nf; +extern cpuop_func op_91b8_33_ff; +extern cpuop_func op_91b9_33_nf; +extern cpuop_func op_91b9_33_ff; +extern cpuop_func op_91c0_33_nf; +extern cpuop_func op_91c0_33_ff; +extern cpuop_func op_91c8_33_nf; +extern cpuop_func op_91c8_33_ff; +extern cpuop_func op_91d0_33_nf; +extern cpuop_func op_91d0_33_ff; +extern cpuop_func op_91d8_33_nf; +extern cpuop_func op_91d8_33_ff; +extern cpuop_func op_91e0_33_nf; +extern cpuop_func op_91e0_33_ff; +extern cpuop_func op_91e8_33_nf; +extern cpuop_func op_91e8_33_ff; +extern cpuop_func op_91f0_33_nf; +extern cpuop_func op_91f0_33_ff; +extern cpuop_func op_91f8_33_nf; +extern cpuop_func op_91f8_33_ff; +extern cpuop_func op_91f9_33_nf; +extern cpuop_func op_91f9_33_ff; +extern cpuop_func op_91fa_33_nf; +extern cpuop_func op_91fa_33_ff; +extern cpuop_func op_91fb_33_nf; +extern cpuop_func op_91fb_33_ff; +extern cpuop_func op_91fc_33_nf; +extern cpuop_func op_91fc_33_ff; +extern cpuop_func op_b000_33_nf; +extern cpuop_func op_b000_33_ff; +extern cpuop_func op_b010_33_nf; +extern cpuop_func op_b010_33_ff; +extern cpuop_func op_b018_33_nf; +extern cpuop_func op_b018_33_ff; +extern cpuop_func op_b020_33_nf; +extern cpuop_func op_b020_33_ff; +extern cpuop_func op_b028_33_nf; +extern cpuop_func op_b028_33_ff; +extern cpuop_func op_b030_33_nf; +extern cpuop_func op_b030_33_ff; +extern cpuop_func op_b038_33_nf; +extern cpuop_func op_b038_33_ff; +extern cpuop_func op_b039_33_nf; +extern cpuop_func op_b039_33_ff; +extern cpuop_func op_b03a_33_nf; +extern cpuop_func op_b03a_33_ff; +extern cpuop_func op_b03b_33_nf; +extern cpuop_func op_b03b_33_ff; +extern cpuop_func op_b03c_33_nf; +extern cpuop_func op_b03c_33_ff; +extern cpuop_func op_b040_33_nf; +extern cpuop_func op_b040_33_ff; +extern cpuop_func op_b048_33_nf; +extern cpuop_func op_b048_33_ff; +extern cpuop_func op_b050_33_nf; +extern cpuop_func op_b050_33_ff; +extern cpuop_func op_b058_33_nf; +extern cpuop_func op_b058_33_ff; +extern cpuop_func op_b060_33_nf; +extern cpuop_func op_b060_33_ff; +extern cpuop_func op_b068_33_nf; +extern cpuop_func op_b068_33_ff; +extern cpuop_func op_b070_33_nf; +extern cpuop_func op_b070_33_ff; +extern cpuop_func op_b078_33_nf; +extern cpuop_func op_b078_33_ff; +extern cpuop_func op_b079_33_nf; +extern cpuop_func op_b079_33_ff; +extern cpuop_func op_b07a_33_nf; +extern cpuop_func op_b07a_33_ff; +extern cpuop_func op_b07b_33_nf; +extern cpuop_func op_b07b_33_ff; +extern cpuop_func op_b07c_33_nf; +extern cpuop_func op_b07c_33_ff; +extern cpuop_func op_b080_33_nf; +extern cpuop_func op_b080_33_ff; +extern cpuop_func op_b088_33_nf; +extern cpuop_func op_b088_33_ff; +extern cpuop_func op_b090_33_nf; +extern cpuop_func op_b090_33_ff; +extern cpuop_func op_b098_33_nf; +extern cpuop_func op_b098_33_ff; +extern cpuop_func op_b0a0_33_nf; +extern cpuop_func op_b0a0_33_ff; +extern cpuop_func op_b0a8_33_nf; +extern cpuop_func op_b0a8_33_ff; +extern cpuop_func op_b0b0_33_nf; +extern cpuop_func op_b0b0_33_ff; +extern cpuop_func op_b0b8_33_nf; +extern cpuop_func op_b0b8_33_ff; +extern cpuop_func op_b0b9_33_nf; +extern cpuop_func op_b0b9_33_ff; +extern cpuop_func op_b0ba_33_nf; +extern cpuop_func op_b0ba_33_ff; +extern cpuop_func op_b0bb_33_nf; +extern cpuop_func op_b0bb_33_ff; +extern cpuop_func op_b0bc_33_nf; +extern cpuop_func op_b0bc_33_ff; +extern cpuop_func op_b0c0_33_nf; +extern cpuop_func op_b0c0_33_ff; +extern cpuop_func op_b0c8_33_nf; +extern cpuop_func op_b0c8_33_ff; +extern cpuop_func op_b0d0_33_nf; +extern cpuop_func op_b0d0_33_ff; +extern cpuop_func op_b0d8_33_nf; +extern cpuop_func op_b0d8_33_ff; +extern cpuop_func op_b0e0_33_nf; +extern cpuop_func op_b0e0_33_ff; +extern cpuop_func op_b0e8_33_nf; +extern cpuop_func op_b0e8_33_ff; +extern cpuop_func op_b0f0_33_nf; +extern cpuop_func op_b0f0_33_ff; +extern cpuop_func op_b0f8_33_nf; +extern cpuop_func op_b0f8_33_ff; +extern cpuop_func op_b0f9_33_nf; +extern cpuop_func op_b0f9_33_ff; +extern cpuop_func op_b0fa_33_nf; +extern cpuop_func op_b0fa_33_ff; +extern cpuop_func op_b0fb_33_nf; +extern cpuop_func op_b0fb_33_ff; +extern cpuop_func op_b0fc_33_nf; +extern cpuop_func op_b0fc_33_ff; +extern cpuop_func op_b100_33_nf; +extern cpuop_func op_b100_33_ff; +extern cpuop_func op_b108_33_nf; +extern cpuop_func op_b108_33_ff; +extern cpuop_func op_b110_33_nf; +extern cpuop_func op_b110_33_ff; +extern cpuop_func op_b118_33_nf; +extern cpuop_func op_b118_33_ff; +extern cpuop_func op_b120_33_nf; +extern cpuop_func op_b120_33_ff; +extern cpuop_func op_b128_33_nf; +extern cpuop_func op_b128_33_ff; +extern cpuop_func op_b130_33_nf; +extern cpuop_func op_b130_33_ff; +extern cpuop_func op_b138_33_nf; +extern cpuop_func op_b138_33_ff; +extern cpuop_func op_b139_33_nf; +extern cpuop_func op_b139_33_ff; +extern cpuop_func op_b140_33_nf; +extern cpuop_func op_b140_33_ff; +extern cpuop_func op_b148_33_nf; +extern cpuop_func op_b148_33_ff; +extern cpuop_func op_b150_33_nf; +extern cpuop_func op_b150_33_ff; +extern cpuop_func op_b158_33_nf; +extern cpuop_func op_b158_33_ff; +extern cpuop_func op_b160_33_nf; +extern cpuop_func op_b160_33_ff; +extern cpuop_func op_b168_33_nf; +extern cpuop_func op_b168_33_ff; +extern cpuop_func op_b170_33_nf; +extern cpuop_func op_b170_33_ff; +extern cpuop_func op_b178_33_nf; +extern cpuop_func op_b178_33_ff; +extern cpuop_func op_b179_33_nf; +extern cpuop_func op_b179_33_ff; +extern cpuop_func op_b180_33_nf; +extern cpuop_func op_b180_33_ff; +extern cpuop_func op_b188_33_nf; +extern cpuop_func op_b188_33_ff; +extern cpuop_func op_b190_33_nf; +extern cpuop_func op_b190_33_ff; +extern cpuop_func op_b198_33_nf; +extern cpuop_func op_b198_33_ff; +extern cpuop_func op_b1a0_33_nf; +extern cpuop_func op_b1a0_33_ff; +extern cpuop_func op_b1a8_33_nf; +extern cpuop_func op_b1a8_33_ff; +extern cpuop_func op_b1b0_33_nf; +extern cpuop_func op_b1b0_33_ff; +extern cpuop_func op_b1b8_33_nf; +extern cpuop_func op_b1b8_33_ff; +extern cpuop_func op_b1b9_33_nf; +extern cpuop_func op_b1b9_33_ff; +extern cpuop_func op_b1c0_33_nf; +extern cpuop_func op_b1c0_33_ff; +extern cpuop_func op_b1c8_33_nf; +extern cpuop_func op_b1c8_33_ff; +extern cpuop_func op_b1d0_33_nf; +extern cpuop_func op_b1d0_33_ff; +extern cpuop_func op_b1d8_33_nf; +extern cpuop_func op_b1d8_33_ff; +extern cpuop_func op_b1e0_33_nf; +extern cpuop_func op_b1e0_33_ff; +extern cpuop_func op_b1e8_33_nf; +extern cpuop_func op_b1e8_33_ff; +extern cpuop_func op_b1f0_33_nf; +extern cpuop_func op_b1f0_33_ff; +extern cpuop_func op_b1f8_33_nf; +extern cpuop_func op_b1f8_33_ff; +extern cpuop_func op_b1f9_33_nf; +extern cpuop_func op_b1f9_33_ff; +extern cpuop_func op_b1fa_33_nf; +extern cpuop_func op_b1fa_33_ff; +extern cpuop_func op_b1fb_33_nf; +extern cpuop_func op_b1fb_33_ff; +extern cpuop_func op_b1fc_33_nf; +extern cpuop_func op_b1fc_33_ff; +extern cpuop_func op_c000_33_nf; +extern cpuop_func op_c000_33_ff; +extern cpuop_func op_c010_33_nf; +extern cpuop_func op_c010_33_ff; +extern cpuop_func op_c018_33_nf; +extern cpuop_func op_c018_33_ff; +extern cpuop_func op_c020_33_nf; +extern cpuop_func op_c020_33_ff; +extern cpuop_func op_c028_33_nf; +extern cpuop_func op_c028_33_ff; +extern cpuop_func op_c030_33_nf; +extern cpuop_func op_c030_33_ff; +extern cpuop_func op_c038_33_nf; +extern cpuop_func op_c038_33_ff; +extern cpuop_func op_c039_33_nf; +extern cpuop_func op_c039_33_ff; +extern cpuop_func op_c03a_33_nf; +extern cpuop_func op_c03a_33_ff; +extern cpuop_func op_c03b_33_nf; +extern cpuop_func op_c03b_33_ff; +extern cpuop_func op_c03c_33_nf; +extern cpuop_func op_c03c_33_ff; +extern cpuop_func op_c040_33_nf; +extern cpuop_func op_c040_33_ff; +extern cpuop_func op_c050_33_nf; +extern cpuop_func op_c050_33_ff; +extern cpuop_func op_c058_33_nf; +extern cpuop_func op_c058_33_ff; +extern cpuop_func op_c060_33_nf; +extern cpuop_func op_c060_33_ff; +extern cpuop_func op_c068_33_nf; +extern cpuop_func op_c068_33_ff; +extern cpuop_func op_c070_33_nf; +extern cpuop_func op_c070_33_ff; +extern cpuop_func op_c078_33_nf; +extern cpuop_func op_c078_33_ff; +extern cpuop_func op_c079_33_nf; +extern cpuop_func op_c079_33_ff; +extern cpuop_func op_c07a_33_nf; +extern cpuop_func op_c07a_33_ff; +extern cpuop_func op_c07b_33_nf; +extern cpuop_func op_c07b_33_ff; +extern cpuop_func op_c07c_33_nf; +extern cpuop_func op_c07c_33_ff; +extern cpuop_func op_c080_33_nf; +extern cpuop_func op_c080_33_ff; +extern cpuop_func op_c090_33_nf; +extern cpuop_func op_c090_33_ff; +extern cpuop_func op_c098_33_nf; +extern cpuop_func op_c098_33_ff; +extern cpuop_func op_c0a0_33_nf; +extern cpuop_func op_c0a0_33_ff; +extern cpuop_func op_c0a8_33_nf; +extern cpuop_func op_c0a8_33_ff; +extern cpuop_func op_c0b0_33_nf; +extern cpuop_func op_c0b0_33_ff; +extern cpuop_func op_c0b8_33_nf; +extern cpuop_func op_c0b8_33_ff; +extern cpuop_func op_c0b9_33_nf; +extern cpuop_func op_c0b9_33_ff; +extern cpuop_func op_c0ba_33_nf; +extern cpuop_func op_c0ba_33_ff; +extern cpuop_func op_c0bb_33_nf; +extern cpuop_func op_c0bb_33_ff; +extern cpuop_func op_c0bc_33_nf; +extern cpuop_func op_c0bc_33_ff; +extern cpuop_func op_c0c0_33_nf; +extern cpuop_func op_c0c0_33_ff; +extern cpuop_func op_c0d0_33_nf; +extern cpuop_func op_c0d0_33_ff; +extern cpuop_func op_c0d8_33_nf; +extern cpuop_func op_c0d8_33_ff; +extern cpuop_func op_c0e0_33_nf; +extern cpuop_func op_c0e0_33_ff; +extern cpuop_func op_c0e8_33_nf; +extern cpuop_func op_c0e8_33_ff; +extern cpuop_func op_c0f0_33_nf; +extern cpuop_func op_c0f0_33_ff; +extern cpuop_func op_c0f8_33_nf; +extern cpuop_func op_c0f8_33_ff; +extern cpuop_func op_c0f9_33_nf; +extern cpuop_func op_c0f9_33_ff; +extern cpuop_func op_c0fa_33_nf; +extern cpuop_func op_c0fa_33_ff; +extern cpuop_func op_c0fb_33_nf; +extern cpuop_func op_c0fb_33_ff; +extern cpuop_func op_c0fc_33_nf; +extern cpuop_func op_c0fc_33_ff; +extern cpuop_func op_c100_33_nf; +extern cpuop_func op_c100_33_ff; +extern cpuop_func op_c108_33_nf; +extern cpuop_func op_c108_33_ff; +extern cpuop_func op_c110_33_nf; +extern cpuop_func op_c110_33_ff; +extern cpuop_func op_c118_33_nf; +extern cpuop_func op_c118_33_ff; +extern cpuop_func op_c120_33_nf; +extern cpuop_func op_c120_33_ff; +extern cpuop_func op_c128_33_nf; +extern cpuop_func op_c128_33_ff; +extern cpuop_func op_c130_33_nf; +extern cpuop_func op_c130_33_ff; +extern cpuop_func op_c138_33_nf; +extern cpuop_func op_c138_33_ff; +extern cpuop_func op_c139_33_nf; +extern cpuop_func op_c139_33_ff; +extern cpuop_func op_c140_33_nf; +extern cpuop_func op_c140_33_ff; +extern cpuop_func op_c148_33_nf; +extern cpuop_func op_c148_33_ff; +extern cpuop_func op_c150_33_nf; +extern cpuop_func op_c150_33_ff; +extern cpuop_func op_c158_33_nf; +extern cpuop_func op_c158_33_ff; +extern cpuop_func op_c160_33_nf; +extern cpuop_func op_c160_33_ff; +extern cpuop_func op_c168_33_nf; +extern cpuop_func op_c168_33_ff; +extern cpuop_func op_c170_33_nf; +extern cpuop_func op_c170_33_ff; +extern cpuop_func op_c178_33_nf; +extern cpuop_func op_c178_33_ff; +extern cpuop_func op_c179_33_nf; +extern cpuop_func op_c179_33_ff; +extern cpuop_func op_c188_33_nf; +extern cpuop_func op_c188_33_ff; +extern cpuop_func op_c190_33_nf; +extern cpuop_func op_c190_33_ff; +extern cpuop_func op_c198_33_nf; +extern cpuop_func op_c198_33_ff; +extern cpuop_func op_c1a0_33_nf; +extern cpuop_func op_c1a0_33_ff; +extern cpuop_func op_c1a8_33_nf; +extern cpuop_func op_c1a8_33_ff; +extern cpuop_func op_c1b0_33_nf; +extern cpuop_func op_c1b0_33_ff; +extern cpuop_func op_c1b8_33_nf; +extern cpuop_func op_c1b8_33_ff; +extern cpuop_func op_c1b9_33_nf; +extern cpuop_func op_c1b9_33_ff; +extern cpuop_func op_c1c0_33_nf; +extern cpuop_func op_c1c0_33_ff; +extern cpuop_func op_c1d0_33_nf; +extern cpuop_func op_c1d0_33_ff; +extern cpuop_func op_c1d8_33_nf; +extern cpuop_func op_c1d8_33_ff; +extern cpuop_func op_c1e0_33_nf; +extern cpuop_func op_c1e0_33_ff; +extern cpuop_func op_c1e8_33_nf; +extern cpuop_func op_c1e8_33_ff; +extern cpuop_func op_c1f0_33_nf; +extern cpuop_func op_c1f0_33_ff; +extern cpuop_func op_c1f8_33_nf; +extern cpuop_func op_c1f8_33_ff; +extern cpuop_func op_c1f9_33_nf; +extern cpuop_func op_c1f9_33_ff; +extern cpuop_func op_c1fa_33_nf; +extern cpuop_func op_c1fa_33_ff; +extern cpuop_func op_c1fb_33_nf; +extern cpuop_func op_c1fb_33_ff; +extern cpuop_func op_c1fc_33_nf; +extern cpuop_func op_c1fc_33_ff; +extern cpuop_func op_d000_33_nf; +extern cpuop_func op_d000_33_ff; +extern cpuop_func op_d010_33_nf; +extern cpuop_func op_d010_33_ff; +extern cpuop_func op_d018_33_nf; +extern cpuop_func op_d018_33_ff; +extern cpuop_func op_d020_33_nf; +extern cpuop_func op_d020_33_ff; +extern cpuop_func op_d028_33_nf; +extern cpuop_func op_d028_33_ff; +extern cpuop_func op_d030_33_nf; +extern cpuop_func op_d030_33_ff; +extern cpuop_func op_d038_33_nf; +extern cpuop_func op_d038_33_ff; +extern cpuop_func op_d039_33_nf; +extern cpuop_func op_d039_33_ff; +extern cpuop_func op_d03a_33_nf; +extern cpuop_func op_d03a_33_ff; +extern cpuop_func op_d03b_33_nf; +extern cpuop_func op_d03b_33_ff; +extern cpuop_func op_d03c_33_nf; +extern cpuop_func op_d03c_33_ff; +extern cpuop_func op_d040_33_nf; +extern cpuop_func op_d040_33_ff; +extern cpuop_func op_d048_33_nf; +extern cpuop_func op_d048_33_ff; +extern cpuop_func op_d050_33_nf; +extern cpuop_func op_d050_33_ff; +extern cpuop_func op_d058_33_nf; +extern cpuop_func op_d058_33_ff; +extern cpuop_func op_d060_33_nf; +extern cpuop_func op_d060_33_ff; +extern cpuop_func op_d068_33_nf; +extern cpuop_func op_d068_33_ff; +extern cpuop_func op_d070_33_nf; +extern cpuop_func op_d070_33_ff; +extern cpuop_func op_d078_33_nf; +extern cpuop_func op_d078_33_ff; +extern cpuop_func op_d079_33_nf; +extern cpuop_func op_d079_33_ff; +extern cpuop_func op_d07a_33_nf; +extern cpuop_func op_d07a_33_ff; +extern cpuop_func op_d07b_33_nf; +extern cpuop_func op_d07b_33_ff; +extern cpuop_func op_d07c_33_nf; +extern cpuop_func op_d07c_33_ff; +extern cpuop_func op_d080_33_nf; +extern cpuop_func op_d080_33_ff; +extern cpuop_func op_d088_33_nf; +extern cpuop_func op_d088_33_ff; +extern cpuop_func op_d090_33_nf; +extern cpuop_func op_d090_33_ff; +extern cpuop_func op_d098_33_nf; +extern cpuop_func op_d098_33_ff; +extern cpuop_func op_d0a0_33_nf; +extern cpuop_func op_d0a0_33_ff; +extern cpuop_func op_d0a8_33_nf; +extern cpuop_func op_d0a8_33_ff; +extern cpuop_func op_d0b0_33_nf; +extern cpuop_func op_d0b0_33_ff; +extern cpuop_func op_d0b8_33_nf; +extern cpuop_func op_d0b8_33_ff; +extern cpuop_func op_d0b9_33_nf; +extern cpuop_func op_d0b9_33_ff; +extern cpuop_func op_d0ba_33_nf; +extern cpuop_func op_d0ba_33_ff; +extern cpuop_func op_d0bb_33_nf; +extern cpuop_func op_d0bb_33_ff; +extern cpuop_func op_d0bc_33_nf; +extern cpuop_func op_d0bc_33_ff; +extern cpuop_func op_d0c0_33_nf; +extern cpuop_func op_d0c0_33_ff; +extern cpuop_func op_d0c8_33_nf; +extern cpuop_func op_d0c8_33_ff; +extern cpuop_func op_d0d0_33_nf; +extern cpuop_func op_d0d0_33_ff; +extern cpuop_func op_d0d8_33_nf; +extern cpuop_func op_d0d8_33_ff; +extern cpuop_func op_d0e0_33_nf; +extern cpuop_func op_d0e0_33_ff; +extern cpuop_func op_d0e8_33_nf; +extern cpuop_func op_d0e8_33_ff; +extern cpuop_func op_d0f0_33_nf; +extern cpuop_func op_d0f0_33_ff; +extern cpuop_func op_d0f8_33_nf; +extern cpuop_func op_d0f8_33_ff; +extern cpuop_func op_d0f9_33_nf; +extern cpuop_func op_d0f9_33_ff; +extern cpuop_func op_d0fa_33_nf; +extern cpuop_func op_d0fa_33_ff; +extern cpuop_func op_d0fb_33_nf; +extern cpuop_func op_d0fb_33_ff; +extern cpuop_func op_d0fc_33_nf; +extern cpuop_func op_d0fc_33_ff; +extern cpuop_func op_d100_33_nf; +extern cpuop_func op_d100_33_ff; +extern cpuop_func op_d108_33_nf; +extern cpuop_func op_d108_33_ff; +extern cpuop_func op_d110_33_nf; +extern cpuop_func op_d110_33_ff; +extern cpuop_func op_d118_33_nf; +extern cpuop_func op_d118_33_ff; +extern cpuop_func op_d120_33_nf; +extern cpuop_func op_d120_33_ff; +extern cpuop_func op_d128_33_nf; +extern cpuop_func op_d128_33_ff; +extern cpuop_func op_d130_33_nf; +extern cpuop_func op_d130_33_ff; +extern cpuop_func op_d138_33_nf; +extern cpuop_func op_d138_33_ff; +extern cpuop_func op_d139_33_nf; +extern cpuop_func op_d139_33_ff; +extern cpuop_func op_d140_33_nf; +extern cpuop_func op_d140_33_ff; +extern cpuop_func op_d148_33_nf; +extern cpuop_func op_d148_33_ff; +extern cpuop_func op_d150_33_nf; +extern cpuop_func op_d150_33_ff; +extern cpuop_func op_d158_33_nf; +extern cpuop_func op_d158_33_ff; +extern cpuop_func op_d160_33_nf; +extern cpuop_func op_d160_33_ff; +extern cpuop_func op_d168_33_nf; +extern cpuop_func op_d168_33_ff; +extern cpuop_func op_d170_33_nf; +extern cpuop_func op_d170_33_ff; +extern cpuop_func op_d178_33_nf; +extern cpuop_func op_d178_33_ff; +extern cpuop_func op_d179_33_nf; +extern cpuop_func op_d179_33_ff; +extern cpuop_func op_d180_33_nf; +extern cpuop_func op_d180_33_ff; +extern cpuop_func op_d188_33_nf; +extern cpuop_func op_d188_33_ff; +extern cpuop_func op_d190_33_nf; +extern cpuop_func op_d190_33_ff; +extern cpuop_func op_d198_33_nf; +extern cpuop_func op_d198_33_ff; +extern cpuop_func op_d1a0_33_nf; +extern cpuop_func op_d1a0_33_ff; +extern cpuop_func op_d1a8_33_nf; +extern cpuop_func op_d1a8_33_ff; +extern cpuop_func op_d1b0_33_nf; +extern cpuop_func op_d1b0_33_ff; +extern cpuop_func op_d1b8_33_nf; +extern cpuop_func op_d1b8_33_ff; +extern cpuop_func op_d1b9_33_nf; +extern cpuop_func op_d1b9_33_ff; +extern cpuop_func op_d1c0_33_nf; +extern cpuop_func op_d1c0_33_ff; +extern cpuop_func op_d1c8_33_nf; +extern cpuop_func op_d1c8_33_ff; +extern cpuop_func op_d1d0_33_nf; +extern cpuop_func op_d1d0_33_ff; +extern cpuop_func op_d1d8_33_nf; +extern cpuop_func op_d1d8_33_ff; +extern cpuop_func op_d1e0_33_nf; +extern cpuop_func op_d1e0_33_ff; +extern cpuop_func op_d1e8_33_nf; +extern cpuop_func op_d1e8_33_ff; +extern cpuop_func op_d1f0_33_nf; +extern cpuop_func op_d1f0_33_ff; +extern cpuop_func op_d1f8_33_nf; +extern cpuop_func op_d1f8_33_ff; +extern cpuop_func op_d1f9_33_nf; +extern cpuop_func op_d1f9_33_ff; +extern cpuop_func op_d1fa_33_nf; +extern cpuop_func op_d1fa_33_ff; +extern cpuop_func op_d1fb_33_nf; +extern cpuop_func op_d1fb_33_ff; +extern cpuop_func op_d1fc_33_nf; +extern cpuop_func op_d1fc_33_ff; +extern cpuop_func op_e000_33_nf; +extern cpuop_func op_e000_33_ff; +extern cpuop_func op_e008_33_nf; +extern cpuop_func op_e008_33_ff; +extern cpuop_func op_e010_33_nf; +extern cpuop_func op_e010_33_ff; +extern cpuop_func op_e018_33_nf; +extern cpuop_func op_e018_33_ff; +extern cpuop_func op_e020_33_nf; +extern cpuop_func op_e020_33_ff; +extern cpuop_func op_e028_33_nf; +extern cpuop_func op_e028_33_ff; +extern cpuop_func op_e030_33_nf; +extern cpuop_func op_e030_33_ff; +extern cpuop_func op_e038_33_nf; +extern cpuop_func op_e038_33_ff; +extern cpuop_func op_e040_33_nf; +extern cpuop_func op_e040_33_ff; +extern cpuop_func op_e048_33_nf; +extern cpuop_func op_e048_33_ff; +extern cpuop_func op_e050_33_nf; +extern cpuop_func op_e050_33_ff; +extern cpuop_func op_e058_33_nf; +extern cpuop_func op_e058_33_ff; +extern cpuop_func op_e060_33_nf; +extern cpuop_func op_e060_33_ff; +extern cpuop_func op_e068_33_nf; +extern cpuop_func op_e068_33_ff; +extern cpuop_func op_e070_33_nf; +extern cpuop_func op_e070_33_ff; +extern cpuop_func op_e078_33_nf; +extern cpuop_func op_e078_33_ff; +extern cpuop_func op_e080_33_nf; +extern cpuop_func op_e080_33_ff; +extern cpuop_func op_e088_33_nf; +extern cpuop_func op_e088_33_ff; +extern cpuop_func op_e090_33_nf; +extern cpuop_func op_e090_33_ff; +extern cpuop_func op_e098_33_nf; +extern cpuop_func op_e098_33_ff; +extern cpuop_func op_e0a0_33_nf; +extern cpuop_func op_e0a0_33_ff; +extern cpuop_func op_e0a8_33_nf; +extern cpuop_func op_e0a8_33_ff; +extern cpuop_func op_e0b0_33_nf; +extern cpuop_func op_e0b0_33_ff; +extern cpuop_func op_e0b8_33_nf; +extern cpuop_func op_e0b8_33_ff; +extern cpuop_func op_e0d0_33_nf; +extern cpuop_func op_e0d0_33_ff; +extern cpuop_func op_e0d8_33_nf; +extern cpuop_func op_e0d8_33_ff; +extern cpuop_func op_e0e0_33_nf; +extern cpuop_func op_e0e0_33_ff; +extern cpuop_func op_e0e8_33_nf; +extern cpuop_func op_e0e8_33_ff; +extern cpuop_func op_e0f0_33_nf; +extern cpuop_func op_e0f0_33_ff; +extern cpuop_func op_e0f8_33_nf; +extern cpuop_func op_e0f8_33_ff; +extern cpuop_func op_e0f9_33_nf; +extern cpuop_func op_e0f9_33_ff; +extern cpuop_func op_e100_33_nf; +extern cpuop_func op_e100_33_ff; +extern cpuop_func op_e108_33_nf; +extern cpuop_func op_e108_33_ff; +extern cpuop_func op_e110_33_nf; +extern cpuop_func op_e110_33_ff; +extern cpuop_func op_e118_33_nf; +extern cpuop_func op_e118_33_ff; +extern cpuop_func op_e120_33_nf; +extern cpuop_func op_e120_33_ff; +extern cpuop_func op_e128_33_nf; +extern cpuop_func op_e128_33_ff; +extern cpuop_func op_e130_33_nf; +extern cpuop_func op_e130_33_ff; +extern cpuop_func op_e138_33_nf; +extern cpuop_func op_e138_33_ff; +extern cpuop_func op_e140_33_nf; +extern cpuop_func op_e140_33_ff; +extern cpuop_func op_e148_33_nf; +extern cpuop_func op_e148_33_ff; +extern cpuop_func op_e150_33_nf; +extern cpuop_func op_e150_33_ff; +extern cpuop_func op_e158_33_nf; +extern cpuop_func op_e158_33_ff; +extern cpuop_func op_e160_33_nf; +extern cpuop_func op_e160_33_ff; +extern cpuop_func op_e168_33_nf; +extern cpuop_func op_e168_33_ff; +extern cpuop_func op_e170_33_nf; +extern cpuop_func op_e170_33_ff; +extern cpuop_func op_e178_33_nf; +extern cpuop_func op_e178_33_ff; +extern cpuop_func op_e180_33_nf; +extern cpuop_func op_e180_33_ff; +extern cpuop_func op_e188_33_nf; +extern cpuop_func op_e188_33_ff; +extern cpuop_func op_e190_33_nf; +extern cpuop_func op_e190_33_ff; +extern cpuop_func op_e198_33_nf; +extern cpuop_func op_e198_33_ff; +extern cpuop_func op_e1a0_33_nf; +extern cpuop_func op_e1a0_33_ff; +extern cpuop_func op_e1a8_33_nf; +extern cpuop_func op_e1a8_33_ff; +extern cpuop_func op_e1b0_33_nf; +extern cpuop_func op_e1b0_33_ff; +extern cpuop_func op_e1b8_33_nf; +extern cpuop_func op_e1b8_33_ff; +extern cpuop_func op_e1d0_33_nf; +extern cpuop_func op_e1d0_33_ff; +extern cpuop_func op_e1d8_33_nf; +extern cpuop_func op_e1d8_33_ff; +extern cpuop_func op_e1e0_33_nf; +extern cpuop_func op_e1e0_33_ff; +extern cpuop_func op_e1e8_33_nf; +extern cpuop_func op_e1e8_33_ff; +extern cpuop_func op_e1f0_33_nf; +extern cpuop_func op_e1f0_33_ff; +extern cpuop_func op_e1f8_33_nf; +extern cpuop_func op_e1f8_33_ff; +extern cpuop_func op_e1f9_33_nf; +extern cpuop_func op_e1f9_33_ff; +extern cpuop_func op_e2d0_33_nf; +extern cpuop_func op_e2d0_33_ff; +extern cpuop_func op_e2d8_33_nf; +extern cpuop_func op_e2d8_33_ff; +extern cpuop_func op_e2e0_33_nf; +extern cpuop_func op_e2e0_33_ff; +extern cpuop_func op_e2e8_33_nf; +extern cpuop_func op_e2e8_33_ff; +extern cpuop_func op_e2f0_33_nf; +extern cpuop_func op_e2f0_33_ff; +extern cpuop_func op_e2f8_33_nf; +extern cpuop_func op_e2f8_33_ff; +extern cpuop_func op_e2f9_33_nf; +extern cpuop_func op_e2f9_33_ff; +extern cpuop_func op_e3d0_33_nf; +extern cpuop_func op_e3d0_33_ff; +extern cpuop_func op_e3d8_33_nf; +extern cpuop_func op_e3d8_33_ff; +extern cpuop_func op_e3e0_33_nf; +extern cpuop_func op_e3e0_33_ff; +extern cpuop_func op_e3e8_33_nf; +extern cpuop_func op_e3e8_33_ff; +extern cpuop_func op_e3f0_33_nf; +extern cpuop_func op_e3f0_33_ff; +extern cpuop_func op_e3f8_33_nf; +extern cpuop_func op_e3f8_33_ff; +extern cpuop_func op_e3f9_33_nf; +extern cpuop_func op_e3f9_33_ff; +extern cpuop_func op_e4d0_33_nf; +extern cpuop_func op_e4d0_33_ff; +extern cpuop_func op_e4d8_33_nf; +extern cpuop_func op_e4d8_33_ff; +extern cpuop_func op_e4e0_33_nf; +extern cpuop_func op_e4e0_33_ff; +extern cpuop_func op_e4e8_33_nf; +extern cpuop_func op_e4e8_33_ff; +extern cpuop_func op_e4f0_33_nf; +extern cpuop_func op_e4f0_33_ff; +extern cpuop_func op_e4f8_33_nf; +extern cpuop_func op_e4f8_33_ff; +extern cpuop_func op_e4f9_33_nf; +extern cpuop_func op_e4f9_33_ff; +extern cpuop_func op_e5d0_33_nf; +extern cpuop_func op_e5d0_33_ff; +extern cpuop_func op_e5d8_33_nf; +extern cpuop_func op_e5d8_33_ff; +extern cpuop_func op_e5e0_33_nf; +extern cpuop_func op_e5e0_33_ff; +extern cpuop_func op_e5e8_33_nf; +extern cpuop_func op_e5e8_33_ff; +extern cpuop_func op_e5f0_33_nf; +extern cpuop_func op_e5f0_33_ff; +extern cpuop_func op_e5f8_33_nf; +extern cpuop_func op_e5f8_33_ff; +extern cpuop_func op_e5f9_33_nf; +extern cpuop_func op_e5f9_33_ff; +extern cpuop_func op_e6d0_33_nf; +extern cpuop_func op_e6d0_33_ff; +extern cpuop_func op_e6d8_33_nf; +extern cpuop_func op_e6d8_33_ff; +extern cpuop_func op_e6e0_33_nf; +extern cpuop_func op_e6e0_33_ff; +extern cpuop_func op_e6e8_33_nf; +extern cpuop_func op_e6e8_33_ff; +extern cpuop_func op_e6f0_33_nf; +extern cpuop_func op_e6f0_33_ff; +extern cpuop_func op_e6f8_33_nf; +extern cpuop_func op_e6f8_33_ff; +extern cpuop_func op_e6f9_33_nf; +extern cpuop_func op_e6f9_33_ff; +extern cpuop_func op_e7d0_33_nf; +extern cpuop_func op_e7d0_33_ff; +extern cpuop_func op_e7d8_33_nf; +extern cpuop_func op_e7d8_33_ff; +extern cpuop_func op_e7e0_33_nf; +extern cpuop_func op_e7e0_33_ff; +extern cpuop_func op_e7e8_33_nf; +extern cpuop_func op_e7e8_33_ff; +extern cpuop_func op_e7f0_33_nf; +extern cpuop_func op_e7f0_33_ff; +extern cpuop_func op_e7f8_33_nf; +extern cpuop_func op_e7f8_33_ff; +extern cpuop_func op_e7f9_33_nf; +extern cpuop_func op_e7f9_33_ff; +extern cpuop_func op_e8c0_33_nf; +extern cpuop_func op_e8c0_33_ff; +extern cpuop_func op_e8d0_33_nf; +extern cpuop_func op_e8d0_33_ff; +extern cpuop_func op_e8e8_33_nf; +extern cpuop_func op_e8e8_33_ff; +extern cpuop_func op_e8f0_33_nf; +extern cpuop_func op_e8f0_33_ff; +extern cpuop_func op_e8f8_33_nf; +extern cpuop_func op_e8f8_33_ff; +extern cpuop_func op_e8f9_33_nf; +extern cpuop_func op_e8f9_33_ff; +extern cpuop_func op_e8fa_33_nf; +extern cpuop_func op_e8fa_33_ff; +extern cpuop_func op_e8fb_33_nf; +extern cpuop_func op_e8fb_33_ff; +extern cpuop_func op_e9c0_33_nf; +extern cpuop_func op_e9c0_33_ff; +extern cpuop_func op_e9d0_33_nf; +extern cpuop_func op_e9d0_33_ff; +extern cpuop_func op_e9e8_33_nf; +extern cpuop_func op_e9e8_33_ff; +extern cpuop_func op_e9f0_33_nf; +extern cpuop_func op_e9f0_33_ff; +extern cpuop_func op_e9f8_33_nf; +extern cpuop_func op_e9f8_33_ff; +extern cpuop_func op_e9f9_33_nf; +extern cpuop_func op_e9f9_33_ff; +extern cpuop_func op_e9fa_33_nf; +extern cpuop_func op_e9fa_33_ff; +extern cpuop_func op_e9fb_33_nf; +extern cpuop_func op_e9fb_33_ff; +extern cpuop_func op_eac0_33_nf; +extern cpuop_func op_eac0_33_ff; +extern cpuop_func op_ead0_33_nf; +extern cpuop_func op_ead0_33_ff; +extern cpuop_func op_eae8_33_nf; +extern cpuop_func op_eae8_33_ff; +extern cpuop_func op_eaf0_33_nf; +extern cpuop_func op_eaf0_33_ff; +extern cpuop_func op_eaf8_33_nf; +extern cpuop_func op_eaf8_33_ff; +extern cpuop_func op_eaf9_33_nf; +extern cpuop_func op_eaf9_33_ff; +extern cpuop_func op_ebc0_33_nf; +extern cpuop_func op_ebc0_33_ff; +extern cpuop_func op_ebd0_33_nf; +extern cpuop_func op_ebd0_33_ff; +extern cpuop_func op_ebe8_33_nf; +extern cpuop_func op_ebe8_33_ff; +extern cpuop_func op_ebf0_33_nf; +extern cpuop_func op_ebf0_33_ff; +extern cpuop_func op_ebf8_33_nf; +extern cpuop_func op_ebf8_33_ff; +extern cpuop_func op_ebf9_33_nf; +extern cpuop_func op_ebf9_33_ff; +extern cpuop_func op_ebfa_33_nf; +extern cpuop_func op_ebfa_33_ff; +extern cpuop_func op_ebfb_33_nf; +extern cpuop_func op_ebfb_33_ff; +extern cpuop_func op_ecc0_33_nf; +extern cpuop_func op_ecc0_33_ff; +extern cpuop_func op_ecd0_33_nf; +extern cpuop_func op_ecd0_33_ff; +extern cpuop_func op_ece8_33_nf; +extern cpuop_func op_ece8_33_ff; +extern cpuop_func op_ecf0_33_nf; +extern cpuop_func op_ecf0_33_ff; +extern cpuop_func op_ecf8_33_nf; +extern cpuop_func op_ecf8_33_ff; +extern cpuop_func op_ecf9_33_nf; +extern cpuop_func op_ecf9_33_ff; +extern cpuop_func op_edc0_33_nf; +extern cpuop_func op_edc0_33_ff; +extern cpuop_func op_edd0_33_nf; +extern cpuop_func op_edd0_33_ff; +extern cpuop_func op_ede8_33_nf; +extern cpuop_func op_ede8_33_ff; +extern cpuop_func op_edf0_33_nf; +extern cpuop_func op_edf0_33_ff; +extern cpuop_func op_edf8_33_nf; +extern cpuop_func op_edf8_33_ff; +extern cpuop_func op_edf9_33_nf; +extern cpuop_func op_edf9_33_ff; +extern cpuop_func op_edfa_33_nf; +extern cpuop_func op_edfa_33_ff; +extern cpuop_func op_edfb_33_nf; +extern cpuop_func op_edfb_33_ff; +extern cpuop_func op_eec0_33_nf; +extern cpuop_func op_eec0_33_ff; +extern cpuop_func op_eed0_33_nf; +extern cpuop_func op_eed0_33_ff; +extern cpuop_func op_eee8_33_nf; +extern cpuop_func op_eee8_33_ff; +extern cpuop_func op_eef0_33_nf; +extern cpuop_func op_eef0_33_ff; +extern cpuop_func op_eef8_33_nf; +extern cpuop_func op_eef8_33_ff; +extern cpuop_func op_eef9_33_nf; +extern cpuop_func op_eef9_33_ff; +extern cpuop_func op_efc0_33_nf; +extern cpuop_func op_efc0_33_ff; +extern cpuop_func op_efd0_33_nf; +extern cpuop_func op_efd0_33_ff; +extern cpuop_func op_efe8_33_nf; +extern cpuop_func op_efe8_33_ff; +extern cpuop_func op_eff0_33_nf; +extern cpuop_func op_eff0_33_ff; +extern cpuop_func op_eff8_33_nf; +extern cpuop_func op_eff8_33_ff; +extern cpuop_func op_eff9_33_nf; +extern cpuop_func op_eff9_33_ff; +extern cpuop_func op_f000_33_nf; +extern cpuop_func op_f000_33_ff; +extern cpuop_func op_f008_33_nf; +extern cpuop_func op_f008_33_ff; +extern cpuop_func op_f010_33_nf; +extern cpuop_func op_f010_33_ff; +extern cpuop_func op_f018_33_nf; +extern cpuop_func op_f018_33_ff; +extern cpuop_func op_f020_33_nf; +extern cpuop_func op_f020_33_ff; +extern cpuop_func op_f028_33_nf; +extern cpuop_func op_f028_33_ff; +extern cpuop_func op_f030_33_nf; +extern cpuop_func op_f030_33_ff; +extern cpuop_func op_f038_33_nf; +extern cpuop_func op_f038_33_ff; +extern cpuop_func op_f039_33_nf; +extern cpuop_func op_f039_33_ff; +extern cpuop_func op_f200_33_nf; +extern cpuop_func op_f200_33_ff; +extern cpuop_func op_f208_33_nf; +extern cpuop_func op_f208_33_ff; +extern cpuop_func op_f210_33_nf; +extern cpuop_func op_f210_33_ff; +extern cpuop_func op_f218_33_nf; +extern cpuop_func op_f218_33_ff; +extern cpuop_func op_f220_33_nf; +extern cpuop_func op_f220_33_ff; +extern cpuop_func op_f228_33_nf; +extern cpuop_func op_f228_33_ff; +extern cpuop_func op_f230_33_nf; +extern cpuop_func op_f230_33_ff; +extern cpuop_func op_f238_33_nf; +extern cpuop_func op_f238_33_ff; +extern cpuop_func op_f239_33_nf; +extern cpuop_func op_f239_33_ff; +extern cpuop_func op_f23a_33_nf; +extern cpuop_func op_f23a_33_ff; +extern cpuop_func op_f23b_33_nf; +extern cpuop_func op_f23b_33_ff; +extern cpuop_func op_f23c_33_nf; +extern cpuop_func op_f23c_33_ff; +extern cpuop_func op_f240_33_nf; +extern cpuop_func op_f240_33_ff; +extern cpuop_func op_f248_33_nf; +extern cpuop_func op_f248_33_ff; +extern cpuop_func op_f250_33_nf; +extern cpuop_func op_f250_33_ff; +extern cpuop_func op_f258_33_nf; +extern cpuop_func op_f258_33_ff; +extern cpuop_func op_f260_33_nf; +extern cpuop_func op_f260_33_ff; +extern cpuop_func op_f268_33_nf; +extern cpuop_func op_f268_33_ff; +extern cpuop_func op_f270_33_nf; +extern cpuop_func op_f270_33_ff; +extern cpuop_func op_f278_33_nf; +extern cpuop_func op_f278_33_ff; +extern cpuop_func op_f279_33_nf; +extern cpuop_func op_f279_33_ff; +extern cpuop_func op_f27a_33_nf; +extern cpuop_func op_f27a_33_ff; +extern cpuop_func op_f27b_33_nf; +extern cpuop_func op_f27b_33_ff; +extern cpuop_func op_f27c_33_nf; +extern cpuop_func op_f27c_33_ff; +extern cpuop_func op_f280_33_nf; +extern cpuop_func op_f280_33_ff; +extern cpuop_func op_f2c0_33_nf; +extern cpuop_func op_f2c0_33_ff; +extern cpuop_func op_f310_33_nf; +extern cpuop_func op_f310_33_ff; +extern cpuop_func op_f320_33_nf; +extern cpuop_func op_f320_33_ff; +extern cpuop_func op_f328_33_nf; +extern cpuop_func op_f328_33_ff; +extern cpuop_func op_f330_33_nf; +extern cpuop_func op_f330_33_ff; +extern cpuop_func op_f338_33_nf; +extern cpuop_func op_f338_33_ff; +extern cpuop_func op_f339_33_nf; +extern cpuop_func op_f339_33_ff; +extern cpuop_func op_f350_33_nf; +extern cpuop_func op_f350_33_ff; +extern cpuop_func op_f358_33_nf; +extern cpuop_func op_f358_33_ff; +extern cpuop_func op_f368_33_nf; +extern cpuop_func op_f368_33_ff; +extern cpuop_func op_f370_33_nf; +extern cpuop_func op_f370_33_ff; +extern cpuop_func op_f378_33_nf; +extern cpuop_func op_f378_33_ff; +extern cpuop_func op_f379_33_nf; +extern cpuop_func op_f379_33_ff; +extern cpuop_func op_f37a_33_nf; +extern cpuop_func op_f37a_33_ff; +extern cpuop_func op_f37b_33_nf; +extern cpuop_func op_f37b_33_ff; +extern cpuop_func op_f408_33_nf; +extern cpuop_func op_f408_33_ff; +extern cpuop_func op_f410_33_nf; +extern cpuop_func op_f410_33_ff; +extern cpuop_func op_f418_33_nf; +extern cpuop_func op_f418_33_ff; +extern cpuop_func op_f419_33_nf; +extern cpuop_func op_f419_33_ff; +extern cpuop_func op_f41a_33_nf; +extern cpuop_func op_f41a_33_ff; +extern cpuop_func op_f41b_33_nf; +extern cpuop_func op_f41b_33_ff; +extern cpuop_func op_f41c_33_nf; +extern cpuop_func op_f41c_33_ff; +extern cpuop_func op_f41d_33_nf; +extern cpuop_func op_f41d_33_ff; +extern cpuop_func op_f41e_33_nf; +extern cpuop_func op_f41e_33_ff; +extern cpuop_func op_f41f_33_nf; +extern cpuop_func op_f41f_33_ff; +extern cpuop_func op_f428_33_nf; +extern cpuop_func op_f428_33_ff; +extern cpuop_func op_f430_33_nf; +extern cpuop_func op_f430_33_ff; +extern cpuop_func op_f438_33_nf; +extern cpuop_func op_f438_33_ff; +extern cpuop_func op_f439_33_nf; +extern cpuop_func op_f439_33_ff; +extern cpuop_func op_f43a_33_nf; +extern cpuop_func op_f43a_33_ff; +extern cpuop_func op_f43b_33_nf; +extern cpuop_func op_f43b_33_ff; +extern cpuop_func op_f43c_33_nf; +extern cpuop_func op_f43c_33_ff; +extern cpuop_func op_f43d_33_nf; +extern cpuop_func op_f43d_33_ff; +extern cpuop_func op_f43e_33_nf; +extern cpuop_func op_f43e_33_ff; +extern cpuop_func op_f43f_33_nf; +extern cpuop_func op_f43f_33_ff; +extern cpuop_func op_f500_33_nf; +extern cpuop_func op_f500_33_ff; +extern cpuop_func op_f508_33_nf; +extern cpuop_func op_f508_33_ff; +extern cpuop_func op_f510_33_nf; +extern cpuop_func op_f510_33_ff; +extern cpuop_func op_f518_33_nf; +extern cpuop_func op_f518_33_ff; +extern cpuop_func op_f548_33_nf; +extern cpuop_func op_f548_33_ff; +extern cpuop_func op_f568_33_nf; +extern cpuop_func op_f568_33_ff; +extern cpuop_func op_f588_33_nf; +extern cpuop_func op_f588_33_ff; +extern cpuop_func op_f5c8_33_nf; +extern cpuop_func op_f5c8_33_ff; +extern cpuop_func op_f600_33_nf; +extern cpuop_func op_f600_33_ff; +extern cpuop_func op_f608_33_nf; +extern cpuop_func op_f608_33_ff; +extern cpuop_func op_f610_33_nf; +extern cpuop_func op_f610_33_ff; +extern cpuop_func op_f618_33_nf; +extern cpuop_func op_f618_33_ff; +extern cpuop_func op_f620_33_nf; +extern cpuop_func op_f620_33_ff; +extern cpuop_func op_f800_33_nf; +extern cpuop_func op_f800_33_ff; +extern cpuop_func op_0000_34_nf; +extern cpuop_func op_0000_34_ff; +extern cpuop_func op_0010_34_nf; +extern cpuop_func op_0010_34_ff; +extern cpuop_func op_0018_34_nf; +extern cpuop_func op_0018_34_ff; +extern cpuop_func op_0020_34_nf; +extern cpuop_func op_0020_34_ff; +extern cpuop_func op_0028_34_nf; +extern cpuop_func op_0028_34_ff; +extern cpuop_func op_0030_34_nf; +extern cpuop_func op_0030_34_ff; +extern cpuop_func op_0038_34_nf; +extern cpuop_func op_0038_34_ff; +extern cpuop_func op_0039_34_nf; +extern cpuop_func op_0039_34_ff; +extern cpuop_func op_003c_34_nf; +extern cpuop_func op_003c_34_ff; +extern cpuop_func op_0040_34_nf; +extern cpuop_func op_0040_34_ff; +extern cpuop_func op_0050_34_nf; +extern cpuop_func op_0050_34_ff; +extern cpuop_func op_0058_34_nf; +extern cpuop_func op_0058_34_ff; +extern cpuop_func op_0060_34_nf; +extern cpuop_func op_0060_34_ff; +extern cpuop_func op_0068_34_nf; +extern cpuop_func op_0068_34_ff; +extern cpuop_func op_0070_34_nf; +extern cpuop_func op_0070_34_ff; +extern cpuop_func op_0078_34_nf; +extern cpuop_func op_0078_34_ff; +extern cpuop_func op_0079_34_nf; +extern cpuop_func op_0079_34_ff; +extern cpuop_func op_007c_34_nf; +extern cpuop_func op_007c_34_ff; +extern cpuop_func op_0080_34_nf; +extern cpuop_func op_0080_34_ff; +extern cpuop_func op_0090_34_nf; +extern cpuop_func op_0090_34_ff; +extern cpuop_func op_0098_34_nf; +extern cpuop_func op_0098_34_ff; +extern cpuop_func op_00a0_34_nf; +extern cpuop_func op_00a0_34_ff; +extern cpuop_func op_00a8_34_nf; +extern cpuop_func op_00a8_34_ff; +extern cpuop_func op_00b0_34_nf; +extern cpuop_func op_00b0_34_ff; +extern cpuop_func op_00b8_34_nf; +extern cpuop_func op_00b8_34_ff; +extern cpuop_func op_00b9_34_nf; +extern cpuop_func op_00b9_34_ff; +extern cpuop_func op_00d0_34_nf; +extern cpuop_func op_00d0_34_ff; +extern cpuop_func op_00e8_34_nf; +extern cpuop_func op_00e8_34_ff; +extern cpuop_func op_00f0_34_nf; +extern cpuop_func op_00f0_34_ff; +extern cpuop_func op_00f8_34_nf; +extern cpuop_func op_00f8_34_ff; +extern cpuop_func op_00f9_34_nf; +extern cpuop_func op_00f9_34_ff; +extern cpuop_func op_00fa_34_nf; +extern cpuop_func op_00fa_34_ff; +extern cpuop_func op_00fb_34_nf; +extern cpuop_func op_00fb_34_ff; +extern cpuop_func op_0100_34_nf; +extern cpuop_func op_0100_34_ff; +extern cpuop_func op_0108_34_nf; +extern cpuop_func op_0108_34_ff; +extern cpuop_func op_0110_34_nf; +extern cpuop_func op_0110_34_ff; +extern cpuop_func op_0118_34_nf; +extern cpuop_func op_0118_34_ff; +extern cpuop_func op_0120_34_nf; +extern cpuop_func op_0120_34_ff; +extern cpuop_func op_0128_34_nf; +extern cpuop_func op_0128_34_ff; +extern cpuop_func op_0130_34_nf; +extern cpuop_func op_0130_34_ff; +extern cpuop_func op_0138_34_nf; +extern cpuop_func op_0138_34_ff; +extern cpuop_func op_0139_34_nf; +extern cpuop_func op_0139_34_ff; +extern cpuop_func op_013a_34_nf; +extern cpuop_func op_013a_34_ff; +extern cpuop_func op_013b_34_nf; +extern cpuop_func op_013b_34_ff; +extern cpuop_func op_013c_34_nf; +extern cpuop_func op_013c_34_ff; +extern cpuop_func op_0140_34_nf; +extern cpuop_func op_0140_34_ff; +extern cpuop_func op_0148_34_nf; +extern cpuop_func op_0148_34_ff; +extern cpuop_func op_0150_34_nf; +extern cpuop_func op_0150_34_ff; +extern cpuop_func op_0158_34_nf; +extern cpuop_func op_0158_34_ff; +extern cpuop_func op_0160_34_nf; +extern cpuop_func op_0160_34_ff; +extern cpuop_func op_0168_34_nf; +extern cpuop_func op_0168_34_ff; +extern cpuop_func op_0170_34_nf; +extern cpuop_func op_0170_34_ff; +extern cpuop_func op_0178_34_nf; +extern cpuop_func op_0178_34_ff; +extern cpuop_func op_0179_34_nf; +extern cpuop_func op_0179_34_ff; +extern cpuop_func op_0180_34_nf; +extern cpuop_func op_0180_34_ff; +extern cpuop_func op_0188_34_nf; +extern cpuop_func op_0188_34_ff; +extern cpuop_func op_0190_34_nf; +extern cpuop_func op_0190_34_ff; +extern cpuop_func op_0198_34_nf; +extern cpuop_func op_0198_34_ff; +extern cpuop_func op_01a0_34_nf; +extern cpuop_func op_01a0_34_ff; +extern cpuop_func op_01a8_34_nf; +extern cpuop_func op_01a8_34_ff; +extern cpuop_func op_01b0_34_nf; +extern cpuop_func op_01b0_34_ff; +extern cpuop_func op_01b8_34_nf; +extern cpuop_func op_01b8_34_ff; +extern cpuop_func op_01b9_34_nf; +extern cpuop_func op_01b9_34_ff; +extern cpuop_func op_01c0_34_nf; +extern cpuop_func op_01c0_34_ff; +extern cpuop_func op_01c8_34_nf; +extern cpuop_func op_01c8_34_ff; +extern cpuop_func op_01d0_34_nf; +extern cpuop_func op_01d0_34_ff; +extern cpuop_func op_01d8_34_nf; +extern cpuop_func op_01d8_34_ff; +extern cpuop_func op_01e0_34_nf; +extern cpuop_func op_01e0_34_ff; +extern cpuop_func op_01e8_34_nf; +extern cpuop_func op_01e8_34_ff; +extern cpuop_func op_01f0_34_nf; +extern cpuop_func op_01f0_34_ff; +extern cpuop_func op_01f8_34_nf; +extern cpuop_func op_01f8_34_ff; +extern cpuop_func op_01f9_34_nf; +extern cpuop_func op_01f9_34_ff; +extern cpuop_func op_0200_34_nf; +extern cpuop_func op_0200_34_ff; +extern cpuop_func op_0210_34_nf; +extern cpuop_func op_0210_34_ff; +extern cpuop_func op_0218_34_nf; +extern cpuop_func op_0218_34_ff; +extern cpuop_func op_0220_34_nf; +extern cpuop_func op_0220_34_ff; +extern cpuop_func op_0228_34_nf; +extern cpuop_func op_0228_34_ff; +extern cpuop_func op_0230_34_nf; +extern cpuop_func op_0230_34_ff; +extern cpuop_func op_0238_34_nf; +extern cpuop_func op_0238_34_ff; +extern cpuop_func op_0239_34_nf; +extern cpuop_func op_0239_34_ff; +extern cpuop_func op_023c_34_nf; +extern cpuop_func op_023c_34_ff; +extern cpuop_func op_0240_34_nf; +extern cpuop_func op_0240_34_ff; +extern cpuop_func op_0250_34_nf; +extern cpuop_func op_0250_34_ff; +extern cpuop_func op_0258_34_nf; +extern cpuop_func op_0258_34_ff; +extern cpuop_func op_0260_34_nf; +extern cpuop_func op_0260_34_ff; +extern cpuop_func op_0268_34_nf; +extern cpuop_func op_0268_34_ff; +extern cpuop_func op_0270_34_nf; +extern cpuop_func op_0270_34_ff; +extern cpuop_func op_0278_34_nf; +extern cpuop_func op_0278_34_ff; +extern cpuop_func op_0279_34_nf; +extern cpuop_func op_0279_34_ff; +extern cpuop_func op_027c_34_nf; +extern cpuop_func op_027c_34_ff; +extern cpuop_func op_0280_34_nf; +extern cpuop_func op_0280_34_ff; +extern cpuop_func op_0290_34_nf; +extern cpuop_func op_0290_34_ff; +extern cpuop_func op_0298_34_nf; +extern cpuop_func op_0298_34_ff; +extern cpuop_func op_02a0_34_nf; +extern cpuop_func op_02a0_34_ff; +extern cpuop_func op_02a8_34_nf; +extern cpuop_func op_02a8_34_ff; +extern cpuop_func op_02b0_34_nf; +extern cpuop_func op_02b0_34_ff; +extern cpuop_func op_02b8_34_nf; +extern cpuop_func op_02b8_34_ff; +extern cpuop_func op_02b9_34_nf; +extern cpuop_func op_02b9_34_ff; +extern cpuop_func op_02d0_34_nf; +extern cpuop_func op_02d0_34_ff; +extern cpuop_func op_02e8_34_nf; +extern cpuop_func op_02e8_34_ff; +extern cpuop_func op_02f0_34_nf; +extern cpuop_func op_02f0_34_ff; +extern cpuop_func op_02f8_34_nf; +extern cpuop_func op_02f8_34_ff; +extern cpuop_func op_02f9_34_nf; +extern cpuop_func op_02f9_34_ff; +extern cpuop_func op_02fa_34_nf; +extern cpuop_func op_02fa_34_ff; +extern cpuop_func op_02fb_34_nf; +extern cpuop_func op_02fb_34_ff; +extern cpuop_func op_0400_34_nf; +extern cpuop_func op_0400_34_ff; +extern cpuop_func op_0410_34_nf; +extern cpuop_func op_0410_34_ff; +extern cpuop_func op_0418_34_nf; +extern cpuop_func op_0418_34_ff; +extern cpuop_func op_0420_34_nf; +extern cpuop_func op_0420_34_ff; +extern cpuop_func op_0428_34_nf; +extern cpuop_func op_0428_34_ff; +extern cpuop_func op_0430_34_nf; +extern cpuop_func op_0430_34_ff; +extern cpuop_func op_0438_34_nf; +extern cpuop_func op_0438_34_ff; +extern cpuop_func op_0439_34_nf; +extern cpuop_func op_0439_34_ff; +extern cpuop_func op_0440_34_nf; +extern cpuop_func op_0440_34_ff; +extern cpuop_func op_0450_34_nf; +extern cpuop_func op_0450_34_ff; +extern cpuop_func op_0458_34_nf; +extern cpuop_func op_0458_34_ff; +extern cpuop_func op_0460_34_nf; +extern cpuop_func op_0460_34_ff; +extern cpuop_func op_0468_34_nf; +extern cpuop_func op_0468_34_ff; +extern cpuop_func op_0470_34_nf; +extern cpuop_func op_0470_34_ff; +extern cpuop_func op_0478_34_nf; +extern cpuop_func op_0478_34_ff; +extern cpuop_func op_0479_34_nf; +extern cpuop_func op_0479_34_ff; +extern cpuop_func op_0480_34_nf; +extern cpuop_func op_0480_34_ff; +extern cpuop_func op_0490_34_nf; +extern cpuop_func op_0490_34_ff; +extern cpuop_func op_0498_34_nf; +extern cpuop_func op_0498_34_ff; +extern cpuop_func op_04a0_34_nf; +extern cpuop_func op_04a0_34_ff; +extern cpuop_func op_04a8_34_nf; +extern cpuop_func op_04a8_34_ff; +extern cpuop_func op_04b0_34_nf; +extern cpuop_func op_04b0_34_ff; +extern cpuop_func op_04b8_34_nf; +extern cpuop_func op_04b8_34_ff; +extern cpuop_func op_04b9_34_nf; +extern cpuop_func op_04b9_34_ff; +extern cpuop_func op_04d0_34_nf; +extern cpuop_func op_04d0_34_ff; +extern cpuop_func op_04e8_34_nf; +extern cpuop_func op_04e8_34_ff; +extern cpuop_func op_04f0_34_nf; +extern cpuop_func op_04f0_34_ff; +extern cpuop_func op_04f8_34_nf; +extern cpuop_func op_04f8_34_ff; +extern cpuop_func op_04f9_34_nf; +extern cpuop_func op_04f9_34_ff; +extern cpuop_func op_04fa_34_nf; +extern cpuop_func op_04fa_34_ff; +extern cpuop_func op_04fb_34_nf; +extern cpuop_func op_04fb_34_ff; +extern cpuop_func op_0600_34_nf; +extern cpuop_func op_0600_34_ff; +extern cpuop_func op_0610_34_nf; +extern cpuop_func op_0610_34_ff; +extern cpuop_func op_0618_34_nf; +extern cpuop_func op_0618_34_ff; +extern cpuop_func op_0620_34_nf; +extern cpuop_func op_0620_34_ff; +extern cpuop_func op_0628_34_nf; +extern cpuop_func op_0628_34_ff; +extern cpuop_func op_0630_34_nf; +extern cpuop_func op_0630_34_ff; +extern cpuop_func op_0638_34_nf; +extern cpuop_func op_0638_34_ff; +extern cpuop_func op_0639_34_nf; +extern cpuop_func op_0639_34_ff; +extern cpuop_func op_0640_34_nf; +extern cpuop_func op_0640_34_ff; +extern cpuop_func op_0650_34_nf; +extern cpuop_func op_0650_34_ff; +extern cpuop_func op_0658_34_nf; +extern cpuop_func op_0658_34_ff; +extern cpuop_func op_0660_34_nf; +extern cpuop_func op_0660_34_ff; +extern cpuop_func op_0668_34_nf; +extern cpuop_func op_0668_34_ff; +extern cpuop_func op_0670_34_nf; +extern cpuop_func op_0670_34_ff; +extern cpuop_func op_0678_34_nf; +extern cpuop_func op_0678_34_ff; +extern cpuop_func op_0679_34_nf; +extern cpuop_func op_0679_34_ff; +extern cpuop_func op_0680_34_nf; +extern cpuop_func op_0680_34_ff; +extern cpuop_func op_0690_34_nf; +extern cpuop_func op_0690_34_ff; +extern cpuop_func op_0698_34_nf; +extern cpuop_func op_0698_34_ff; +extern cpuop_func op_06a0_34_nf; +extern cpuop_func op_06a0_34_ff; +extern cpuop_func op_06a8_34_nf; +extern cpuop_func op_06a8_34_ff; +extern cpuop_func op_06b0_34_nf; +extern cpuop_func op_06b0_34_ff; +extern cpuop_func op_06b8_34_nf; +extern cpuop_func op_06b8_34_ff; +extern cpuop_func op_06b9_34_nf; +extern cpuop_func op_06b9_34_ff; +extern cpuop_func op_06c0_34_nf; +extern cpuop_func op_06c0_34_ff; +extern cpuop_func op_06c8_34_nf; +extern cpuop_func op_06c8_34_ff; +extern cpuop_func op_06d0_34_nf; +extern cpuop_func op_06d0_34_ff; +extern cpuop_func op_06e8_34_nf; +extern cpuop_func op_06e8_34_ff; +extern cpuop_func op_06f0_34_nf; +extern cpuop_func op_06f0_34_ff; +extern cpuop_func op_06f8_34_nf; +extern cpuop_func op_06f8_34_ff; +extern cpuop_func op_06f9_34_nf; +extern cpuop_func op_06f9_34_ff; +extern cpuop_func op_06fa_34_nf; +extern cpuop_func op_06fa_34_ff; +extern cpuop_func op_06fb_34_nf; +extern cpuop_func op_06fb_34_ff; +extern cpuop_func op_0800_34_nf; +extern cpuop_func op_0800_34_ff; +extern cpuop_func op_0810_34_nf; +extern cpuop_func op_0810_34_ff; +extern cpuop_func op_0818_34_nf; +extern cpuop_func op_0818_34_ff; +extern cpuop_func op_0820_34_nf; +extern cpuop_func op_0820_34_ff; +extern cpuop_func op_0828_34_nf; +extern cpuop_func op_0828_34_ff; +extern cpuop_func op_0830_34_nf; +extern cpuop_func op_0830_34_ff; +extern cpuop_func op_0838_34_nf; +extern cpuop_func op_0838_34_ff; +extern cpuop_func op_0839_34_nf; +extern cpuop_func op_0839_34_ff; +extern cpuop_func op_083a_34_nf; +extern cpuop_func op_083a_34_ff; +extern cpuop_func op_083b_34_nf; +extern cpuop_func op_083b_34_ff; +extern cpuop_func op_0840_34_nf; +extern cpuop_func op_0840_34_ff; +extern cpuop_func op_0850_34_nf; +extern cpuop_func op_0850_34_ff; +extern cpuop_func op_0858_34_nf; +extern cpuop_func op_0858_34_ff; +extern cpuop_func op_0860_34_nf; +extern cpuop_func op_0860_34_ff; +extern cpuop_func op_0868_34_nf; +extern cpuop_func op_0868_34_ff; +extern cpuop_func op_0870_34_nf; +extern cpuop_func op_0870_34_ff; +extern cpuop_func op_0878_34_nf; +extern cpuop_func op_0878_34_ff; +extern cpuop_func op_0879_34_nf; +extern cpuop_func op_0879_34_ff; +extern cpuop_func op_0880_34_nf; +extern cpuop_func op_0880_34_ff; +extern cpuop_func op_0890_34_nf; +extern cpuop_func op_0890_34_ff; +extern cpuop_func op_0898_34_nf; +extern cpuop_func op_0898_34_ff; +extern cpuop_func op_08a0_34_nf; +extern cpuop_func op_08a0_34_ff; +extern cpuop_func op_08a8_34_nf; +extern cpuop_func op_08a8_34_ff; +extern cpuop_func op_08b0_34_nf; +extern cpuop_func op_08b0_34_ff; +extern cpuop_func op_08b8_34_nf; +extern cpuop_func op_08b8_34_ff; +extern cpuop_func op_08b9_34_nf; +extern cpuop_func op_08b9_34_ff; +extern cpuop_func op_08c0_34_nf; +extern cpuop_func op_08c0_34_ff; +extern cpuop_func op_08d0_34_nf; +extern cpuop_func op_08d0_34_ff; +extern cpuop_func op_08d8_34_nf; +extern cpuop_func op_08d8_34_ff; +extern cpuop_func op_08e0_34_nf; +extern cpuop_func op_08e0_34_ff; +extern cpuop_func op_08e8_34_nf; +extern cpuop_func op_08e8_34_ff; +extern cpuop_func op_08f0_34_nf; +extern cpuop_func op_08f0_34_ff; +extern cpuop_func op_08f8_34_nf; +extern cpuop_func op_08f8_34_ff; +extern cpuop_func op_08f9_34_nf; +extern cpuop_func op_08f9_34_ff; +extern cpuop_func op_0a00_34_nf; +extern cpuop_func op_0a00_34_ff; +extern cpuop_func op_0a10_34_nf; +extern cpuop_func op_0a10_34_ff; +extern cpuop_func op_0a18_34_nf; +extern cpuop_func op_0a18_34_ff; +extern cpuop_func op_0a20_34_nf; +extern cpuop_func op_0a20_34_ff; +extern cpuop_func op_0a28_34_nf; +extern cpuop_func op_0a28_34_ff; +extern cpuop_func op_0a30_34_nf; +extern cpuop_func op_0a30_34_ff; +extern cpuop_func op_0a38_34_nf; +extern cpuop_func op_0a38_34_ff; +extern cpuop_func op_0a39_34_nf; +extern cpuop_func op_0a39_34_ff; +extern cpuop_func op_0a3c_34_nf; +extern cpuop_func op_0a3c_34_ff; +extern cpuop_func op_0a40_34_nf; +extern cpuop_func op_0a40_34_ff; +extern cpuop_func op_0a50_34_nf; +extern cpuop_func op_0a50_34_ff; +extern cpuop_func op_0a58_34_nf; +extern cpuop_func op_0a58_34_ff; +extern cpuop_func op_0a60_34_nf; +extern cpuop_func op_0a60_34_ff; +extern cpuop_func op_0a68_34_nf; +extern cpuop_func op_0a68_34_ff; +extern cpuop_func op_0a70_34_nf; +extern cpuop_func op_0a70_34_ff; +extern cpuop_func op_0a78_34_nf; +extern cpuop_func op_0a78_34_ff; +extern cpuop_func op_0a79_34_nf; +extern cpuop_func op_0a79_34_ff; +extern cpuop_func op_0a7c_34_nf; +extern cpuop_func op_0a7c_34_ff; +extern cpuop_func op_0a80_34_nf; +extern cpuop_func op_0a80_34_ff; +extern cpuop_func op_0a90_34_nf; +extern cpuop_func op_0a90_34_ff; +extern cpuop_func op_0a98_34_nf; +extern cpuop_func op_0a98_34_ff; +extern cpuop_func op_0aa0_34_nf; +extern cpuop_func op_0aa0_34_ff; +extern cpuop_func op_0aa8_34_nf; +extern cpuop_func op_0aa8_34_ff; +extern cpuop_func op_0ab0_34_nf; +extern cpuop_func op_0ab0_34_ff; +extern cpuop_func op_0ab8_34_nf; +extern cpuop_func op_0ab8_34_ff; +extern cpuop_func op_0ab9_34_nf; +extern cpuop_func op_0ab9_34_ff; +extern cpuop_func op_0ad0_34_nf; +extern cpuop_func op_0ad0_34_ff; +extern cpuop_func op_0ad8_34_nf; +extern cpuop_func op_0ad8_34_ff; +extern cpuop_func op_0ae0_34_nf; +extern cpuop_func op_0ae0_34_ff; +extern cpuop_func op_0ae8_34_nf; +extern cpuop_func op_0ae8_34_ff; +extern cpuop_func op_0af0_34_nf; +extern cpuop_func op_0af0_34_ff; +extern cpuop_func op_0af8_34_nf; +extern cpuop_func op_0af8_34_ff; +extern cpuop_func op_0af9_34_nf; +extern cpuop_func op_0af9_34_ff; +extern cpuop_func op_0c00_34_nf; +extern cpuop_func op_0c00_34_ff; +extern cpuop_func op_0c10_34_nf; +extern cpuop_func op_0c10_34_ff; +extern cpuop_func op_0c18_34_nf; +extern cpuop_func op_0c18_34_ff; +extern cpuop_func op_0c20_34_nf; +extern cpuop_func op_0c20_34_ff; +extern cpuop_func op_0c28_34_nf; +extern cpuop_func op_0c28_34_ff; +extern cpuop_func op_0c30_34_nf; +extern cpuop_func op_0c30_34_ff; +extern cpuop_func op_0c38_34_nf; +extern cpuop_func op_0c38_34_ff; +extern cpuop_func op_0c39_34_nf; +extern cpuop_func op_0c39_34_ff; +extern cpuop_func op_0c3a_34_nf; +extern cpuop_func op_0c3a_34_ff; +extern cpuop_func op_0c3b_34_nf; +extern cpuop_func op_0c3b_34_ff; +extern cpuop_func op_0c40_34_nf; +extern cpuop_func op_0c40_34_ff; +extern cpuop_func op_0c50_34_nf; +extern cpuop_func op_0c50_34_ff; +extern cpuop_func op_0c58_34_nf; +extern cpuop_func op_0c58_34_ff; +extern cpuop_func op_0c60_34_nf; +extern cpuop_func op_0c60_34_ff; +extern cpuop_func op_0c68_34_nf; +extern cpuop_func op_0c68_34_ff; +extern cpuop_func op_0c70_34_nf; +extern cpuop_func op_0c70_34_ff; +extern cpuop_func op_0c78_34_nf; +extern cpuop_func op_0c78_34_ff; +extern cpuop_func op_0c79_34_nf; +extern cpuop_func op_0c79_34_ff; +extern cpuop_func op_0c7a_34_nf; +extern cpuop_func op_0c7a_34_ff; +extern cpuop_func op_0c7b_34_nf; +extern cpuop_func op_0c7b_34_ff; +extern cpuop_func op_0c80_34_nf; +extern cpuop_func op_0c80_34_ff; +extern cpuop_func op_0c90_34_nf; +extern cpuop_func op_0c90_34_ff; +extern cpuop_func op_0c98_34_nf; +extern cpuop_func op_0c98_34_ff; +extern cpuop_func op_0ca0_34_nf; +extern cpuop_func op_0ca0_34_ff; +extern cpuop_func op_0ca8_34_nf; +extern cpuop_func op_0ca8_34_ff; +extern cpuop_func op_0cb0_34_nf; +extern cpuop_func op_0cb0_34_ff; +extern cpuop_func op_0cb8_34_nf; +extern cpuop_func op_0cb8_34_ff; +extern cpuop_func op_0cb9_34_nf; +extern cpuop_func op_0cb9_34_ff; +extern cpuop_func op_0cba_34_nf; +extern cpuop_func op_0cba_34_ff; +extern cpuop_func op_0cbb_34_nf; +extern cpuop_func op_0cbb_34_ff; +extern cpuop_func op_0cd0_34_nf; +extern cpuop_func op_0cd0_34_ff; +extern cpuop_func op_0cd8_34_nf; +extern cpuop_func op_0cd8_34_ff; +extern cpuop_func op_0ce0_34_nf; +extern cpuop_func op_0ce0_34_ff; +extern cpuop_func op_0ce8_34_nf; +extern cpuop_func op_0ce8_34_ff; +extern cpuop_func op_0cf0_34_nf; +extern cpuop_func op_0cf0_34_ff; +extern cpuop_func op_0cf8_34_nf; +extern cpuop_func op_0cf8_34_ff; +extern cpuop_func op_0cf9_34_nf; +extern cpuop_func op_0cf9_34_ff; +extern cpuop_func op_0cfc_34_nf; +extern cpuop_func op_0cfc_34_ff; +extern cpuop_func op_0e10_34_nf; +extern cpuop_func op_0e10_34_ff; +extern cpuop_func op_0e18_34_nf; +extern cpuop_func op_0e18_34_ff; +extern cpuop_func op_0e20_34_nf; +extern cpuop_func op_0e20_34_ff; +extern cpuop_func op_0e28_34_nf; +extern cpuop_func op_0e28_34_ff; +extern cpuop_func op_0e30_34_nf; +extern cpuop_func op_0e30_34_ff; +extern cpuop_func op_0e38_34_nf; +extern cpuop_func op_0e38_34_ff; +extern cpuop_func op_0e39_34_nf; +extern cpuop_func op_0e39_34_ff; +extern cpuop_func op_0e50_34_nf; +extern cpuop_func op_0e50_34_ff; +extern cpuop_func op_0e58_34_nf; +extern cpuop_func op_0e58_34_ff; +extern cpuop_func op_0e60_34_nf; +extern cpuop_func op_0e60_34_ff; +extern cpuop_func op_0e68_34_nf; +extern cpuop_func op_0e68_34_ff; +extern cpuop_func op_0e70_34_nf; +extern cpuop_func op_0e70_34_ff; +extern cpuop_func op_0e78_34_nf; +extern cpuop_func op_0e78_34_ff; +extern cpuop_func op_0e79_34_nf; +extern cpuop_func op_0e79_34_ff; +extern cpuop_func op_0e90_34_nf; +extern cpuop_func op_0e90_34_ff; +extern cpuop_func op_0e98_34_nf; +extern cpuop_func op_0e98_34_ff; +extern cpuop_func op_0ea0_34_nf; +extern cpuop_func op_0ea0_34_ff; +extern cpuop_func op_0ea8_34_nf; +extern cpuop_func op_0ea8_34_ff; +extern cpuop_func op_0eb0_34_nf; +extern cpuop_func op_0eb0_34_ff; +extern cpuop_func op_0eb8_34_nf; +extern cpuop_func op_0eb8_34_ff; +extern cpuop_func op_0eb9_34_nf; +extern cpuop_func op_0eb9_34_ff; +extern cpuop_func op_0ed0_34_nf; +extern cpuop_func op_0ed0_34_ff; +extern cpuop_func op_0ed8_34_nf; +extern cpuop_func op_0ed8_34_ff; +extern cpuop_func op_0ee0_34_nf; +extern cpuop_func op_0ee0_34_ff; +extern cpuop_func op_0ee8_34_nf; +extern cpuop_func op_0ee8_34_ff; +extern cpuop_func op_0ef0_34_nf; +extern cpuop_func op_0ef0_34_ff; +extern cpuop_func op_0ef8_34_nf; +extern cpuop_func op_0ef8_34_ff; +extern cpuop_func op_0ef9_34_nf; +extern cpuop_func op_0ef9_34_ff; +extern cpuop_func op_0efc_34_nf; +extern cpuop_func op_0efc_34_ff; +extern cpuop_func op_1000_34_nf; +extern cpuop_func op_1000_34_ff; +extern cpuop_func op_1010_34_nf; +extern cpuop_func op_1010_34_ff; +extern cpuop_func op_1018_34_nf; +extern cpuop_func op_1018_34_ff; +extern cpuop_func op_1020_34_nf; +extern cpuop_func op_1020_34_ff; +extern cpuop_func op_1028_34_nf; +extern cpuop_func op_1028_34_ff; +extern cpuop_func op_1030_34_nf; +extern cpuop_func op_1030_34_ff; +extern cpuop_func op_1038_34_nf; +extern cpuop_func op_1038_34_ff; +extern cpuop_func op_1039_34_nf; +extern cpuop_func op_1039_34_ff; +extern cpuop_func op_103a_34_nf; +extern cpuop_func op_103a_34_ff; +extern cpuop_func op_103b_34_nf; +extern cpuop_func op_103b_34_ff; +extern cpuop_func op_103c_34_nf; +extern cpuop_func op_103c_34_ff; +extern cpuop_func op_1080_34_nf; +extern cpuop_func op_1080_34_ff; +extern cpuop_func op_1090_34_nf; +extern cpuop_func op_1090_34_ff; +extern cpuop_func op_1098_34_nf; +extern cpuop_func op_1098_34_ff; +extern cpuop_func op_10a0_34_nf; +extern cpuop_func op_10a0_34_ff; +extern cpuop_func op_10a8_34_nf; +extern cpuop_func op_10a8_34_ff; +extern cpuop_func op_10b0_34_nf; +extern cpuop_func op_10b0_34_ff; +extern cpuop_func op_10b8_34_nf; +extern cpuop_func op_10b8_34_ff; +extern cpuop_func op_10b9_34_nf; +extern cpuop_func op_10b9_34_ff; +extern cpuop_func op_10ba_34_nf; +extern cpuop_func op_10ba_34_ff; +extern cpuop_func op_10bb_34_nf; +extern cpuop_func op_10bb_34_ff; +extern cpuop_func op_10bc_34_nf; +extern cpuop_func op_10bc_34_ff; +extern cpuop_func op_10c0_34_nf; +extern cpuop_func op_10c0_34_ff; +extern cpuop_func op_10d0_34_nf; +extern cpuop_func op_10d0_34_ff; +extern cpuop_func op_10d8_34_nf; +extern cpuop_func op_10d8_34_ff; +extern cpuop_func op_10e0_34_nf; +extern cpuop_func op_10e0_34_ff; +extern cpuop_func op_10e8_34_nf; +extern cpuop_func op_10e8_34_ff; +extern cpuop_func op_10f0_34_nf; +extern cpuop_func op_10f0_34_ff; +extern cpuop_func op_10f8_34_nf; +extern cpuop_func op_10f8_34_ff; +extern cpuop_func op_10f9_34_nf; +extern cpuop_func op_10f9_34_ff; +extern cpuop_func op_10fa_34_nf; +extern cpuop_func op_10fa_34_ff; +extern cpuop_func op_10fb_34_nf; +extern cpuop_func op_10fb_34_ff; +extern cpuop_func op_10fc_34_nf; +extern cpuop_func op_10fc_34_ff; +extern cpuop_func op_1100_34_nf; +extern cpuop_func op_1100_34_ff; +extern cpuop_func op_1110_34_nf; +extern cpuop_func op_1110_34_ff; +extern cpuop_func op_1118_34_nf; +extern cpuop_func op_1118_34_ff; +extern cpuop_func op_1120_34_nf; +extern cpuop_func op_1120_34_ff; +extern cpuop_func op_1128_34_nf; +extern cpuop_func op_1128_34_ff; +extern cpuop_func op_1130_34_nf; +extern cpuop_func op_1130_34_ff; +extern cpuop_func op_1138_34_nf; +extern cpuop_func op_1138_34_ff; +extern cpuop_func op_1139_34_nf; +extern cpuop_func op_1139_34_ff; +extern cpuop_func op_113a_34_nf; +extern cpuop_func op_113a_34_ff; +extern cpuop_func op_113b_34_nf; +extern cpuop_func op_113b_34_ff; +extern cpuop_func op_113c_34_nf; +extern cpuop_func op_113c_34_ff; +extern cpuop_func op_1140_34_nf; +extern cpuop_func op_1140_34_ff; +extern cpuop_func op_1150_34_nf; +extern cpuop_func op_1150_34_ff; +extern cpuop_func op_1158_34_nf; +extern cpuop_func op_1158_34_ff; +extern cpuop_func op_1160_34_nf; +extern cpuop_func op_1160_34_ff; +extern cpuop_func op_1168_34_nf; +extern cpuop_func op_1168_34_ff; +extern cpuop_func op_1170_34_nf; +extern cpuop_func op_1170_34_ff; +extern cpuop_func op_1178_34_nf; +extern cpuop_func op_1178_34_ff; +extern cpuop_func op_1179_34_nf; +extern cpuop_func op_1179_34_ff; +extern cpuop_func op_117a_34_nf; +extern cpuop_func op_117a_34_ff; +extern cpuop_func op_117b_34_nf; +extern cpuop_func op_117b_34_ff; +extern cpuop_func op_117c_34_nf; +extern cpuop_func op_117c_34_ff; +extern cpuop_func op_1180_34_nf; +extern cpuop_func op_1180_34_ff; +extern cpuop_func op_1190_34_nf; +extern cpuop_func op_1190_34_ff; +extern cpuop_func op_1198_34_nf; +extern cpuop_func op_1198_34_ff; +extern cpuop_func op_11a0_34_nf; +extern cpuop_func op_11a0_34_ff; +extern cpuop_func op_11a8_34_nf; +extern cpuop_func op_11a8_34_ff; +extern cpuop_func op_11b0_34_nf; +extern cpuop_func op_11b0_34_ff; +extern cpuop_func op_11b8_34_nf; +extern cpuop_func op_11b8_34_ff; +extern cpuop_func op_11b9_34_nf; +extern cpuop_func op_11b9_34_ff; +extern cpuop_func op_11ba_34_nf; +extern cpuop_func op_11ba_34_ff; +extern cpuop_func op_11bb_34_nf; +extern cpuop_func op_11bb_34_ff; +extern cpuop_func op_11bc_34_nf; +extern cpuop_func op_11bc_34_ff; +extern cpuop_func op_11c0_34_nf; +extern cpuop_func op_11c0_34_ff; +extern cpuop_func op_11d0_34_nf; +extern cpuop_func op_11d0_34_ff; +extern cpuop_func op_11d8_34_nf; +extern cpuop_func op_11d8_34_ff; +extern cpuop_func op_11e0_34_nf; +extern cpuop_func op_11e0_34_ff; +extern cpuop_func op_11e8_34_nf; +extern cpuop_func op_11e8_34_ff; +extern cpuop_func op_11f0_34_nf; +extern cpuop_func op_11f0_34_ff; +extern cpuop_func op_11f8_34_nf; +extern cpuop_func op_11f8_34_ff; +extern cpuop_func op_11f9_34_nf; +extern cpuop_func op_11f9_34_ff; +extern cpuop_func op_11fa_34_nf; +extern cpuop_func op_11fa_34_ff; +extern cpuop_func op_11fb_34_nf; +extern cpuop_func op_11fb_34_ff; +extern cpuop_func op_11fc_34_nf; +extern cpuop_func op_11fc_34_ff; +extern cpuop_func op_13c0_34_nf; +extern cpuop_func op_13c0_34_ff; +extern cpuop_func op_13d0_34_nf; +extern cpuop_func op_13d0_34_ff; +extern cpuop_func op_13d8_34_nf; +extern cpuop_func op_13d8_34_ff; +extern cpuop_func op_13e0_34_nf; +extern cpuop_func op_13e0_34_ff; +extern cpuop_func op_13e8_34_nf; +extern cpuop_func op_13e8_34_ff; +extern cpuop_func op_13f0_34_nf; +extern cpuop_func op_13f0_34_ff; +extern cpuop_func op_13f8_34_nf; +extern cpuop_func op_13f8_34_ff; +extern cpuop_func op_13f9_34_nf; +extern cpuop_func op_13f9_34_ff; +extern cpuop_func op_13fa_34_nf; +extern cpuop_func op_13fa_34_ff; +extern cpuop_func op_13fb_34_nf; +extern cpuop_func op_13fb_34_ff; +extern cpuop_func op_13fc_34_nf; +extern cpuop_func op_13fc_34_ff; +extern cpuop_func op_2000_34_nf; +extern cpuop_func op_2000_34_ff; +extern cpuop_func op_2008_34_nf; +extern cpuop_func op_2008_34_ff; +extern cpuop_func op_2010_34_nf; +extern cpuop_func op_2010_34_ff; +extern cpuop_func op_2018_34_nf; +extern cpuop_func op_2018_34_ff; +extern cpuop_func op_2020_34_nf; +extern cpuop_func op_2020_34_ff; +extern cpuop_func op_2028_34_nf; +extern cpuop_func op_2028_34_ff; +extern cpuop_func op_2030_34_nf; +extern cpuop_func op_2030_34_ff; +extern cpuop_func op_2038_34_nf; +extern cpuop_func op_2038_34_ff; +extern cpuop_func op_2039_34_nf; +extern cpuop_func op_2039_34_ff; +extern cpuop_func op_203a_34_nf; +extern cpuop_func op_203a_34_ff; +extern cpuop_func op_203b_34_nf; +extern cpuop_func op_203b_34_ff; +extern cpuop_func op_203c_34_nf; +extern cpuop_func op_203c_34_ff; +extern cpuop_func op_2040_34_nf; +extern cpuop_func op_2040_34_ff; +extern cpuop_func op_2048_34_nf; +extern cpuop_func op_2048_34_ff; +extern cpuop_func op_2050_34_nf; +extern cpuop_func op_2050_34_ff; +extern cpuop_func op_2058_34_nf; +extern cpuop_func op_2058_34_ff; +extern cpuop_func op_2060_34_nf; +extern cpuop_func op_2060_34_ff; +extern cpuop_func op_2068_34_nf; +extern cpuop_func op_2068_34_ff; +extern cpuop_func op_2070_34_nf; +extern cpuop_func op_2070_34_ff; +extern cpuop_func op_2078_34_nf; +extern cpuop_func op_2078_34_ff; +extern cpuop_func op_2079_34_nf; +extern cpuop_func op_2079_34_ff; +extern cpuop_func op_207a_34_nf; +extern cpuop_func op_207a_34_ff; +extern cpuop_func op_207b_34_nf; +extern cpuop_func op_207b_34_ff; +extern cpuop_func op_207c_34_nf; +extern cpuop_func op_207c_34_ff; +extern cpuop_func op_2080_34_nf; +extern cpuop_func op_2080_34_ff; +extern cpuop_func op_2088_34_nf; +extern cpuop_func op_2088_34_ff; +extern cpuop_func op_2090_34_nf; +extern cpuop_func op_2090_34_ff; +extern cpuop_func op_2098_34_nf; +extern cpuop_func op_2098_34_ff; +extern cpuop_func op_20a0_34_nf; +extern cpuop_func op_20a0_34_ff; +extern cpuop_func op_20a8_34_nf; +extern cpuop_func op_20a8_34_ff; +extern cpuop_func op_20b0_34_nf; +extern cpuop_func op_20b0_34_ff; +extern cpuop_func op_20b8_34_nf; +extern cpuop_func op_20b8_34_ff; +extern cpuop_func op_20b9_34_nf; +extern cpuop_func op_20b9_34_ff; +extern cpuop_func op_20ba_34_nf; +extern cpuop_func op_20ba_34_ff; +extern cpuop_func op_20bb_34_nf; +extern cpuop_func op_20bb_34_ff; +extern cpuop_func op_20bc_34_nf; +extern cpuop_func op_20bc_34_ff; +extern cpuop_func op_20c0_34_nf; +extern cpuop_func op_20c0_34_ff; +extern cpuop_func op_20c8_34_nf; +extern cpuop_func op_20c8_34_ff; +extern cpuop_func op_20d0_34_nf; +extern cpuop_func op_20d0_34_ff; +extern cpuop_func op_20d8_34_nf; +extern cpuop_func op_20d8_34_ff; +extern cpuop_func op_20e0_34_nf; +extern cpuop_func op_20e0_34_ff; +extern cpuop_func op_20e8_34_nf; +extern cpuop_func op_20e8_34_ff; +extern cpuop_func op_20f0_34_nf; +extern cpuop_func op_20f0_34_ff; +extern cpuop_func op_20f8_34_nf; +extern cpuop_func op_20f8_34_ff; +extern cpuop_func op_20f9_34_nf; +extern cpuop_func op_20f9_34_ff; +extern cpuop_func op_20fa_34_nf; +extern cpuop_func op_20fa_34_ff; +extern cpuop_func op_20fb_34_nf; +extern cpuop_func op_20fb_34_ff; +extern cpuop_func op_20fc_34_nf; +extern cpuop_func op_20fc_34_ff; +extern cpuop_func op_2100_34_nf; +extern cpuop_func op_2100_34_ff; +extern cpuop_func op_2108_34_nf; +extern cpuop_func op_2108_34_ff; +extern cpuop_func op_2110_34_nf; +extern cpuop_func op_2110_34_ff; +extern cpuop_func op_2118_34_nf; +extern cpuop_func op_2118_34_ff; +extern cpuop_func op_2120_34_nf; +extern cpuop_func op_2120_34_ff; +extern cpuop_func op_2128_34_nf; +extern cpuop_func op_2128_34_ff; +extern cpuop_func op_2130_34_nf; +extern cpuop_func op_2130_34_ff; +extern cpuop_func op_2138_34_nf; +extern cpuop_func op_2138_34_ff; +extern cpuop_func op_2139_34_nf; +extern cpuop_func op_2139_34_ff; +extern cpuop_func op_213a_34_nf; +extern cpuop_func op_213a_34_ff; +extern cpuop_func op_213b_34_nf; +extern cpuop_func op_213b_34_ff; +extern cpuop_func op_213c_34_nf; +extern cpuop_func op_213c_34_ff; +extern cpuop_func op_2140_34_nf; +extern cpuop_func op_2140_34_ff; +extern cpuop_func op_2148_34_nf; +extern cpuop_func op_2148_34_ff; +extern cpuop_func op_2150_34_nf; +extern cpuop_func op_2150_34_ff; +extern cpuop_func op_2158_34_nf; +extern cpuop_func op_2158_34_ff; +extern cpuop_func op_2160_34_nf; +extern cpuop_func op_2160_34_ff; +extern cpuop_func op_2168_34_nf; +extern cpuop_func op_2168_34_ff; +extern cpuop_func op_2170_34_nf; +extern cpuop_func op_2170_34_ff; +extern cpuop_func op_2178_34_nf; +extern cpuop_func op_2178_34_ff; +extern cpuop_func op_2179_34_nf; +extern cpuop_func op_2179_34_ff; +extern cpuop_func op_217a_34_nf; +extern cpuop_func op_217a_34_ff; +extern cpuop_func op_217b_34_nf; +extern cpuop_func op_217b_34_ff; +extern cpuop_func op_217c_34_nf; +extern cpuop_func op_217c_34_ff; +extern cpuop_func op_2180_34_nf; +extern cpuop_func op_2180_34_ff; +extern cpuop_func op_2188_34_nf; +extern cpuop_func op_2188_34_ff; +extern cpuop_func op_2190_34_nf; +extern cpuop_func op_2190_34_ff; +extern cpuop_func op_2198_34_nf; +extern cpuop_func op_2198_34_ff; +extern cpuop_func op_21a0_34_nf; +extern cpuop_func op_21a0_34_ff; +extern cpuop_func op_21a8_34_nf; +extern cpuop_func op_21a8_34_ff; +extern cpuop_func op_21b0_34_nf; +extern cpuop_func op_21b0_34_ff; +extern cpuop_func op_21b8_34_nf; +extern cpuop_func op_21b8_34_ff; +extern cpuop_func op_21b9_34_nf; +extern cpuop_func op_21b9_34_ff; +extern cpuop_func op_21ba_34_nf; +extern cpuop_func op_21ba_34_ff; +extern cpuop_func op_21bb_34_nf; +extern cpuop_func op_21bb_34_ff; +extern cpuop_func op_21bc_34_nf; +extern cpuop_func op_21bc_34_ff; +extern cpuop_func op_21c0_34_nf; +extern cpuop_func op_21c0_34_ff; +extern cpuop_func op_21c8_34_nf; +extern cpuop_func op_21c8_34_ff; +extern cpuop_func op_21d0_34_nf; +extern cpuop_func op_21d0_34_ff; +extern cpuop_func op_21d8_34_nf; +extern cpuop_func op_21d8_34_ff; +extern cpuop_func op_21e0_34_nf; +extern cpuop_func op_21e0_34_ff; +extern cpuop_func op_21e8_34_nf; +extern cpuop_func op_21e8_34_ff; +extern cpuop_func op_21f0_34_nf; +extern cpuop_func op_21f0_34_ff; +extern cpuop_func op_21f8_34_nf; +extern cpuop_func op_21f8_34_ff; +extern cpuop_func op_21f9_34_nf; +extern cpuop_func op_21f9_34_ff; +extern cpuop_func op_21fa_34_nf; +extern cpuop_func op_21fa_34_ff; +extern cpuop_func op_21fb_34_nf; +extern cpuop_func op_21fb_34_ff; +extern cpuop_func op_21fc_34_nf; +extern cpuop_func op_21fc_34_ff; +extern cpuop_func op_23c0_34_nf; +extern cpuop_func op_23c0_34_ff; +extern cpuop_func op_23c8_34_nf; +extern cpuop_func op_23c8_34_ff; +extern cpuop_func op_23d0_34_nf; +extern cpuop_func op_23d0_34_ff; +extern cpuop_func op_23d8_34_nf; +extern cpuop_func op_23d8_34_ff; +extern cpuop_func op_23e0_34_nf; +extern cpuop_func op_23e0_34_ff; +extern cpuop_func op_23e8_34_nf; +extern cpuop_func op_23e8_34_ff; +extern cpuop_func op_23f0_34_nf; +extern cpuop_func op_23f0_34_ff; +extern cpuop_func op_23f8_34_nf; +extern cpuop_func op_23f8_34_ff; +extern cpuop_func op_23f9_34_nf; +extern cpuop_func op_23f9_34_ff; +extern cpuop_func op_23fa_34_nf; +extern cpuop_func op_23fa_34_ff; +extern cpuop_func op_23fb_34_nf; +extern cpuop_func op_23fb_34_ff; +extern cpuop_func op_23fc_34_nf; +extern cpuop_func op_23fc_34_ff; +extern cpuop_func op_3000_34_nf; +extern cpuop_func op_3000_34_ff; +extern cpuop_func op_3008_34_nf; +extern cpuop_func op_3008_34_ff; +extern cpuop_func op_3010_34_nf; +extern cpuop_func op_3010_34_ff; +extern cpuop_func op_3018_34_nf; +extern cpuop_func op_3018_34_ff; +extern cpuop_func op_3020_34_nf; +extern cpuop_func op_3020_34_ff; +extern cpuop_func op_3028_34_nf; +extern cpuop_func op_3028_34_ff; +extern cpuop_func op_3030_34_nf; +extern cpuop_func op_3030_34_ff; +extern cpuop_func op_3038_34_nf; +extern cpuop_func op_3038_34_ff; +extern cpuop_func op_3039_34_nf; +extern cpuop_func op_3039_34_ff; +extern cpuop_func op_303a_34_nf; +extern cpuop_func op_303a_34_ff; +extern cpuop_func op_303b_34_nf; +extern cpuop_func op_303b_34_ff; +extern cpuop_func op_303c_34_nf; +extern cpuop_func op_303c_34_ff; +extern cpuop_func op_3040_34_nf; +extern cpuop_func op_3040_34_ff; +extern cpuop_func op_3048_34_nf; +extern cpuop_func op_3048_34_ff; +extern cpuop_func op_3050_34_nf; +extern cpuop_func op_3050_34_ff; +extern cpuop_func op_3058_34_nf; +extern cpuop_func op_3058_34_ff; +extern cpuop_func op_3060_34_nf; +extern cpuop_func op_3060_34_ff; +extern cpuop_func op_3068_34_nf; +extern cpuop_func op_3068_34_ff; +extern cpuop_func op_3070_34_nf; +extern cpuop_func op_3070_34_ff; +extern cpuop_func op_3078_34_nf; +extern cpuop_func op_3078_34_ff; +extern cpuop_func op_3079_34_nf; +extern cpuop_func op_3079_34_ff; +extern cpuop_func op_307a_34_nf; +extern cpuop_func op_307a_34_ff; +extern cpuop_func op_307b_34_nf; +extern cpuop_func op_307b_34_ff; +extern cpuop_func op_307c_34_nf; +extern cpuop_func op_307c_34_ff; +extern cpuop_func op_3080_34_nf; +extern cpuop_func op_3080_34_ff; +extern cpuop_func op_3088_34_nf; +extern cpuop_func op_3088_34_ff; +extern cpuop_func op_3090_34_nf; +extern cpuop_func op_3090_34_ff; +extern cpuop_func op_3098_34_nf; +extern cpuop_func op_3098_34_ff; +extern cpuop_func op_30a0_34_nf; +extern cpuop_func op_30a0_34_ff; +extern cpuop_func op_30a8_34_nf; +extern cpuop_func op_30a8_34_ff; +extern cpuop_func op_30b0_34_nf; +extern cpuop_func op_30b0_34_ff; +extern cpuop_func op_30b8_34_nf; +extern cpuop_func op_30b8_34_ff; +extern cpuop_func op_30b9_34_nf; +extern cpuop_func op_30b9_34_ff; +extern cpuop_func op_30ba_34_nf; +extern cpuop_func op_30ba_34_ff; +extern cpuop_func op_30bb_34_nf; +extern cpuop_func op_30bb_34_ff; +extern cpuop_func op_30bc_34_nf; +extern cpuop_func op_30bc_34_ff; +extern cpuop_func op_30c0_34_nf; +extern cpuop_func op_30c0_34_ff; +extern cpuop_func op_30c8_34_nf; +extern cpuop_func op_30c8_34_ff; +extern cpuop_func op_30d0_34_nf; +extern cpuop_func op_30d0_34_ff; +extern cpuop_func op_30d8_34_nf; +extern cpuop_func op_30d8_34_ff; +extern cpuop_func op_30e0_34_nf; +extern cpuop_func op_30e0_34_ff; +extern cpuop_func op_30e8_34_nf; +extern cpuop_func op_30e8_34_ff; +extern cpuop_func op_30f0_34_nf; +extern cpuop_func op_30f0_34_ff; +extern cpuop_func op_30f8_34_nf; +extern cpuop_func op_30f8_34_ff; +extern cpuop_func op_30f9_34_nf; +extern cpuop_func op_30f9_34_ff; +extern cpuop_func op_30fa_34_nf; +extern cpuop_func op_30fa_34_ff; +extern cpuop_func op_30fb_34_nf; +extern cpuop_func op_30fb_34_ff; +extern cpuop_func op_30fc_34_nf; +extern cpuop_func op_30fc_34_ff; +extern cpuop_func op_3100_34_nf; +extern cpuop_func op_3100_34_ff; +extern cpuop_func op_3108_34_nf; +extern cpuop_func op_3108_34_ff; +extern cpuop_func op_3110_34_nf; +extern cpuop_func op_3110_34_ff; +extern cpuop_func op_3118_34_nf; +extern cpuop_func op_3118_34_ff; +extern cpuop_func op_3120_34_nf; +extern cpuop_func op_3120_34_ff; +extern cpuop_func op_3128_34_nf; +extern cpuop_func op_3128_34_ff; +extern cpuop_func op_3130_34_nf; +extern cpuop_func op_3130_34_ff; +extern cpuop_func op_3138_34_nf; +extern cpuop_func op_3138_34_ff; +extern cpuop_func op_3139_34_nf; +extern cpuop_func op_3139_34_ff; +extern cpuop_func op_313a_34_nf; +extern cpuop_func op_313a_34_ff; +extern cpuop_func op_313b_34_nf; +extern cpuop_func op_313b_34_ff; +extern cpuop_func op_313c_34_nf; +extern cpuop_func op_313c_34_ff; +extern cpuop_func op_3140_34_nf; +extern cpuop_func op_3140_34_ff; +extern cpuop_func op_3148_34_nf; +extern cpuop_func op_3148_34_ff; +extern cpuop_func op_3150_34_nf; +extern cpuop_func op_3150_34_ff; +extern cpuop_func op_3158_34_nf; +extern cpuop_func op_3158_34_ff; +extern cpuop_func op_3160_34_nf; +extern cpuop_func op_3160_34_ff; +extern cpuop_func op_3168_34_nf; +extern cpuop_func op_3168_34_ff; +extern cpuop_func op_3170_34_nf; +extern cpuop_func op_3170_34_ff; +extern cpuop_func op_3178_34_nf; +extern cpuop_func op_3178_34_ff; +extern cpuop_func op_3179_34_nf; +extern cpuop_func op_3179_34_ff; +extern cpuop_func op_317a_34_nf; +extern cpuop_func op_317a_34_ff; +extern cpuop_func op_317b_34_nf; +extern cpuop_func op_317b_34_ff; +extern cpuop_func op_317c_34_nf; +extern cpuop_func op_317c_34_ff; +extern cpuop_func op_3180_34_nf; +extern cpuop_func op_3180_34_ff; +extern cpuop_func op_3188_34_nf; +extern cpuop_func op_3188_34_ff; +extern cpuop_func op_3190_34_nf; +extern cpuop_func op_3190_34_ff; +extern cpuop_func op_3198_34_nf; +extern cpuop_func op_3198_34_ff; +extern cpuop_func op_31a0_34_nf; +extern cpuop_func op_31a0_34_ff; +extern cpuop_func op_31a8_34_nf; +extern cpuop_func op_31a8_34_ff; +extern cpuop_func op_31b0_34_nf; +extern cpuop_func op_31b0_34_ff; +extern cpuop_func op_31b8_34_nf; +extern cpuop_func op_31b8_34_ff; +extern cpuop_func op_31b9_34_nf; +extern cpuop_func op_31b9_34_ff; +extern cpuop_func op_31ba_34_nf; +extern cpuop_func op_31ba_34_ff; +extern cpuop_func op_31bb_34_nf; +extern cpuop_func op_31bb_34_ff; +extern cpuop_func op_31bc_34_nf; +extern cpuop_func op_31bc_34_ff; +extern cpuop_func op_31c0_34_nf; +extern cpuop_func op_31c0_34_ff; +extern cpuop_func op_31c8_34_nf; +extern cpuop_func op_31c8_34_ff; +extern cpuop_func op_31d0_34_nf; +extern cpuop_func op_31d0_34_ff; +extern cpuop_func op_31d8_34_nf; +extern cpuop_func op_31d8_34_ff; +extern cpuop_func op_31e0_34_nf; +extern cpuop_func op_31e0_34_ff; +extern cpuop_func op_31e8_34_nf; +extern cpuop_func op_31e8_34_ff; +extern cpuop_func op_31f0_34_nf; +extern cpuop_func op_31f0_34_ff; +extern cpuop_func op_31f8_34_nf; +extern cpuop_func op_31f8_34_ff; +extern cpuop_func op_31f9_34_nf; +extern cpuop_func op_31f9_34_ff; +extern cpuop_func op_31fa_34_nf; +extern cpuop_func op_31fa_34_ff; +extern cpuop_func op_31fb_34_nf; +extern cpuop_func op_31fb_34_ff; +extern cpuop_func op_31fc_34_nf; +extern cpuop_func op_31fc_34_ff; +extern cpuop_func op_33c0_34_nf; +extern cpuop_func op_33c0_34_ff; +extern cpuop_func op_33c8_34_nf; +extern cpuop_func op_33c8_34_ff; +extern cpuop_func op_33d0_34_nf; +extern cpuop_func op_33d0_34_ff; +extern cpuop_func op_33d8_34_nf; +extern cpuop_func op_33d8_34_ff; +extern cpuop_func op_33e0_34_nf; +extern cpuop_func op_33e0_34_ff; +extern cpuop_func op_33e8_34_nf; +extern cpuop_func op_33e8_34_ff; +extern cpuop_func op_33f0_34_nf; +extern cpuop_func op_33f0_34_ff; +extern cpuop_func op_33f8_34_nf; +extern cpuop_func op_33f8_34_ff; +extern cpuop_func op_33f9_34_nf; +extern cpuop_func op_33f9_34_ff; +extern cpuop_func op_33fa_34_nf; +extern cpuop_func op_33fa_34_ff; +extern cpuop_func op_33fb_34_nf; +extern cpuop_func op_33fb_34_ff; +extern cpuop_func op_33fc_34_nf; +extern cpuop_func op_33fc_34_ff; +extern cpuop_func op_4000_34_nf; +extern cpuop_func op_4000_34_ff; +extern cpuop_func op_4010_34_nf; +extern cpuop_func op_4010_34_ff; +extern cpuop_func op_4018_34_nf; +extern cpuop_func op_4018_34_ff; +extern cpuop_func op_4020_34_nf; +extern cpuop_func op_4020_34_ff; +extern cpuop_func op_4028_34_nf; +extern cpuop_func op_4028_34_ff; +extern cpuop_func op_4030_34_nf; +extern cpuop_func op_4030_34_ff; +extern cpuop_func op_4038_34_nf; +extern cpuop_func op_4038_34_ff; +extern cpuop_func op_4039_34_nf; +extern cpuop_func op_4039_34_ff; +extern cpuop_func op_4040_34_nf; +extern cpuop_func op_4040_34_ff; +extern cpuop_func op_4050_34_nf; +extern cpuop_func op_4050_34_ff; +extern cpuop_func op_4058_34_nf; +extern cpuop_func op_4058_34_ff; +extern cpuop_func op_4060_34_nf; +extern cpuop_func op_4060_34_ff; +extern cpuop_func op_4068_34_nf; +extern cpuop_func op_4068_34_ff; +extern cpuop_func op_4070_34_nf; +extern cpuop_func op_4070_34_ff; +extern cpuop_func op_4078_34_nf; +extern cpuop_func op_4078_34_ff; +extern cpuop_func op_4079_34_nf; +extern cpuop_func op_4079_34_ff; +extern cpuop_func op_4080_34_nf; +extern cpuop_func op_4080_34_ff; +extern cpuop_func op_4090_34_nf; +extern cpuop_func op_4090_34_ff; +extern cpuop_func op_4098_34_nf; +extern cpuop_func op_4098_34_ff; +extern cpuop_func op_40a0_34_nf; +extern cpuop_func op_40a0_34_ff; +extern cpuop_func op_40a8_34_nf; +extern cpuop_func op_40a8_34_ff; +extern cpuop_func op_40b0_34_nf; +extern cpuop_func op_40b0_34_ff; +extern cpuop_func op_40b8_34_nf; +extern cpuop_func op_40b8_34_ff; +extern cpuop_func op_40b9_34_nf; +extern cpuop_func op_40b9_34_ff; +extern cpuop_func op_40c0_34_nf; +extern cpuop_func op_40c0_34_ff; +extern cpuop_func op_40d0_34_nf; +extern cpuop_func op_40d0_34_ff; +extern cpuop_func op_40d8_34_nf; +extern cpuop_func op_40d8_34_ff; +extern cpuop_func op_40e0_34_nf; +extern cpuop_func op_40e0_34_ff; +extern cpuop_func op_40e8_34_nf; +extern cpuop_func op_40e8_34_ff; +extern cpuop_func op_40f0_34_nf; +extern cpuop_func op_40f0_34_ff; +extern cpuop_func op_40f8_34_nf; +extern cpuop_func op_40f8_34_ff; +extern cpuop_func op_40f9_34_nf; +extern cpuop_func op_40f9_34_ff; +extern cpuop_func op_4100_34_nf; +extern cpuop_func op_4100_34_ff; +extern cpuop_func op_4110_34_nf; +extern cpuop_func op_4110_34_ff; +extern cpuop_func op_4118_34_nf; +extern cpuop_func op_4118_34_ff; +extern cpuop_func op_4120_34_nf; +extern cpuop_func op_4120_34_ff; +extern cpuop_func op_4128_34_nf; +extern cpuop_func op_4128_34_ff; +extern cpuop_func op_4130_34_nf; +extern cpuop_func op_4130_34_ff; +extern cpuop_func op_4138_34_nf; +extern cpuop_func op_4138_34_ff; +extern cpuop_func op_4139_34_nf; +extern cpuop_func op_4139_34_ff; +extern cpuop_func op_413a_34_nf; +extern cpuop_func op_413a_34_ff; +extern cpuop_func op_413b_34_nf; +extern cpuop_func op_413b_34_ff; +extern cpuop_func op_413c_34_nf; +extern cpuop_func op_413c_34_ff; +extern cpuop_func op_4180_34_nf; +extern cpuop_func op_4180_34_ff; +extern cpuop_func op_4190_34_nf; +extern cpuop_func op_4190_34_ff; +extern cpuop_func op_4198_34_nf; +extern cpuop_func op_4198_34_ff; +extern cpuop_func op_41a0_34_nf; +extern cpuop_func op_41a0_34_ff; +extern cpuop_func op_41a8_34_nf; +extern cpuop_func op_41a8_34_ff; +extern cpuop_func op_41b0_34_nf; +extern cpuop_func op_41b0_34_ff; +extern cpuop_func op_41b8_34_nf; +extern cpuop_func op_41b8_34_ff; +extern cpuop_func op_41b9_34_nf; +extern cpuop_func op_41b9_34_ff; +extern cpuop_func op_41ba_34_nf; +extern cpuop_func op_41ba_34_ff; +extern cpuop_func op_41bb_34_nf; +extern cpuop_func op_41bb_34_ff; +extern cpuop_func op_41bc_34_nf; +extern cpuop_func op_41bc_34_ff; +extern cpuop_func op_41d0_34_nf; +extern cpuop_func op_41d0_34_ff; +extern cpuop_func op_41e8_34_nf; +extern cpuop_func op_41e8_34_ff; +extern cpuop_func op_41f0_34_nf; +extern cpuop_func op_41f0_34_ff; +extern cpuop_func op_41f8_34_nf; +extern cpuop_func op_41f8_34_ff; +extern cpuop_func op_41f9_34_nf; +extern cpuop_func op_41f9_34_ff; +extern cpuop_func op_41fa_34_nf; +extern cpuop_func op_41fa_34_ff; +extern cpuop_func op_41fb_34_nf; +extern cpuop_func op_41fb_34_ff; +extern cpuop_func op_4200_34_nf; +extern cpuop_func op_4200_34_ff; +extern cpuop_func op_4210_34_nf; +extern cpuop_func op_4210_34_ff; +extern cpuop_func op_4218_34_nf; +extern cpuop_func op_4218_34_ff; +extern cpuop_func op_4220_34_nf; +extern cpuop_func op_4220_34_ff; +extern cpuop_func op_4228_34_nf; +extern cpuop_func op_4228_34_ff; +extern cpuop_func op_4230_34_nf; +extern cpuop_func op_4230_34_ff; +extern cpuop_func op_4238_34_nf; +extern cpuop_func op_4238_34_ff; +extern cpuop_func op_4239_34_nf; +extern cpuop_func op_4239_34_ff; +extern cpuop_func op_4240_34_nf; +extern cpuop_func op_4240_34_ff; +extern cpuop_func op_4250_34_nf; +extern cpuop_func op_4250_34_ff; +extern cpuop_func op_4258_34_nf; +extern cpuop_func op_4258_34_ff; +extern cpuop_func op_4260_34_nf; +extern cpuop_func op_4260_34_ff; +extern cpuop_func op_4268_34_nf; +extern cpuop_func op_4268_34_ff; +extern cpuop_func op_4270_34_nf; +extern cpuop_func op_4270_34_ff; +extern cpuop_func op_4278_34_nf; +extern cpuop_func op_4278_34_ff; +extern cpuop_func op_4279_34_nf; +extern cpuop_func op_4279_34_ff; +extern cpuop_func op_4280_34_nf; +extern cpuop_func op_4280_34_ff; +extern cpuop_func op_4290_34_nf; +extern cpuop_func op_4290_34_ff; +extern cpuop_func op_4298_34_nf; +extern cpuop_func op_4298_34_ff; +extern cpuop_func op_42a0_34_nf; +extern cpuop_func op_42a0_34_ff; +extern cpuop_func op_42a8_34_nf; +extern cpuop_func op_42a8_34_ff; +extern cpuop_func op_42b0_34_nf; +extern cpuop_func op_42b0_34_ff; +extern cpuop_func op_42b8_34_nf; +extern cpuop_func op_42b8_34_ff; +extern cpuop_func op_42b9_34_nf; +extern cpuop_func op_42b9_34_ff; +extern cpuop_func op_42c0_34_nf; +extern cpuop_func op_42c0_34_ff; +extern cpuop_func op_42d0_34_nf; +extern cpuop_func op_42d0_34_ff; +extern cpuop_func op_42d8_34_nf; +extern cpuop_func op_42d8_34_ff; +extern cpuop_func op_42e0_34_nf; +extern cpuop_func op_42e0_34_ff; +extern cpuop_func op_42e8_34_nf; +extern cpuop_func op_42e8_34_ff; +extern cpuop_func op_42f0_34_nf; +extern cpuop_func op_42f0_34_ff; +extern cpuop_func op_42f8_34_nf; +extern cpuop_func op_42f8_34_ff; +extern cpuop_func op_42f9_34_nf; +extern cpuop_func op_42f9_34_ff; +extern cpuop_func op_4400_34_nf; +extern cpuop_func op_4400_34_ff; +extern cpuop_func op_4410_34_nf; +extern cpuop_func op_4410_34_ff; +extern cpuop_func op_4418_34_nf; +extern cpuop_func op_4418_34_ff; +extern cpuop_func op_4420_34_nf; +extern cpuop_func op_4420_34_ff; +extern cpuop_func op_4428_34_nf; +extern cpuop_func op_4428_34_ff; +extern cpuop_func op_4430_34_nf; +extern cpuop_func op_4430_34_ff; +extern cpuop_func op_4438_34_nf; +extern cpuop_func op_4438_34_ff; +extern cpuop_func op_4439_34_nf; +extern cpuop_func op_4439_34_ff; +extern cpuop_func op_4440_34_nf; +extern cpuop_func op_4440_34_ff; +extern cpuop_func op_4450_34_nf; +extern cpuop_func op_4450_34_ff; +extern cpuop_func op_4458_34_nf; +extern cpuop_func op_4458_34_ff; +extern cpuop_func op_4460_34_nf; +extern cpuop_func op_4460_34_ff; +extern cpuop_func op_4468_34_nf; +extern cpuop_func op_4468_34_ff; +extern cpuop_func op_4470_34_nf; +extern cpuop_func op_4470_34_ff; +extern cpuop_func op_4478_34_nf; +extern cpuop_func op_4478_34_ff; +extern cpuop_func op_4479_34_nf; +extern cpuop_func op_4479_34_ff; +extern cpuop_func op_4480_34_nf; +extern cpuop_func op_4480_34_ff; +extern cpuop_func op_4490_34_nf; +extern cpuop_func op_4490_34_ff; +extern cpuop_func op_4498_34_nf; +extern cpuop_func op_4498_34_ff; +extern cpuop_func op_44a0_34_nf; +extern cpuop_func op_44a0_34_ff; +extern cpuop_func op_44a8_34_nf; +extern cpuop_func op_44a8_34_ff; +extern cpuop_func op_44b0_34_nf; +extern cpuop_func op_44b0_34_ff; +extern cpuop_func op_44b8_34_nf; +extern cpuop_func op_44b8_34_ff; +extern cpuop_func op_44b9_34_nf; +extern cpuop_func op_44b9_34_ff; +extern cpuop_func op_44c0_34_nf; +extern cpuop_func op_44c0_34_ff; +extern cpuop_func op_44d0_34_nf; +extern cpuop_func op_44d0_34_ff; +extern cpuop_func op_44d8_34_nf; +extern cpuop_func op_44d8_34_ff; +extern cpuop_func op_44e0_34_nf; +extern cpuop_func op_44e0_34_ff; +extern cpuop_func op_44e8_34_nf; +extern cpuop_func op_44e8_34_ff; +extern cpuop_func op_44f0_34_nf; +extern cpuop_func op_44f0_34_ff; +extern cpuop_func op_44f8_34_nf; +extern cpuop_func op_44f8_34_ff; +extern cpuop_func op_44f9_34_nf; +extern cpuop_func op_44f9_34_ff; +extern cpuop_func op_44fa_34_nf; +extern cpuop_func op_44fa_34_ff; +extern cpuop_func op_44fb_34_nf; +extern cpuop_func op_44fb_34_ff; +extern cpuop_func op_44fc_34_nf; +extern cpuop_func op_44fc_34_ff; +extern cpuop_func op_4600_34_nf; +extern cpuop_func op_4600_34_ff; +extern cpuop_func op_4610_34_nf; +extern cpuop_func op_4610_34_ff; +extern cpuop_func op_4618_34_nf; +extern cpuop_func op_4618_34_ff; +extern cpuop_func op_4620_34_nf; +extern cpuop_func op_4620_34_ff; +extern cpuop_func op_4628_34_nf; +extern cpuop_func op_4628_34_ff; +extern cpuop_func op_4630_34_nf; +extern cpuop_func op_4630_34_ff; +extern cpuop_func op_4638_34_nf; +extern cpuop_func op_4638_34_ff; +extern cpuop_func op_4639_34_nf; +extern cpuop_func op_4639_34_ff; +extern cpuop_func op_4640_34_nf; +extern cpuop_func op_4640_34_ff; +extern cpuop_func op_4650_34_nf; +extern cpuop_func op_4650_34_ff; +extern cpuop_func op_4658_34_nf; +extern cpuop_func op_4658_34_ff; +extern cpuop_func op_4660_34_nf; +extern cpuop_func op_4660_34_ff; +extern cpuop_func op_4668_34_nf; +extern cpuop_func op_4668_34_ff; +extern cpuop_func op_4670_34_nf; +extern cpuop_func op_4670_34_ff; +extern cpuop_func op_4678_34_nf; +extern cpuop_func op_4678_34_ff; +extern cpuop_func op_4679_34_nf; +extern cpuop_func op_4679_34_ff; +extern cpuop_func op_4680_34_nf; +extern cpuop_func op_4680_34_ff; +extern cpuop_func op_4690_34_nf; +extern cpuop_func op_4690_34_ff; +extern cpuop_func op_4698_34_nf; +extern cpuop_func op_4698_34_ff; +extern cpuop_func op_46a0_34_nf; +extern cpuop_func op_46a0_34_ff; +extern cpuop_func op_46a8_34_nf; +extern cpuop_func op_46a8_34_ff; +extern cpuop_func op_46b0_34_nf; +extern cpuop_func op_46b0_34_ff; +extern cpuop_func op_46b8_34_nf; +extern cpuop_func op_46b8_34_ff; +extern cpuop_func op_46b9_34_nf; +extern cpuop_func op_46b9_34_ff; +extern cpuop_func op_46c0_34_nf; +extern cpuop_func op_46c0_34_ff; +extern cpuop_func op_46d0_34_nf; +extern cpuop_func op_46d0_34_ff; +extern cpuop_func op_46d8_34_nf; +extern cpuop_func op_46d8_34_ff; +extern cpuop_func op_46e0_34_nf; +extern cpuop_func op_46e0_34_ff; +extern cpuop_func op_46e8_34_nf; +extern cpuop_func op_46e8_34_ff; +extern cpuop_func op_46f0_34_nf; +extern cpuop_func op_46f0_34_ff; +extern cpuop_func op_46f8_34_nf; +extern cpuop_func op_46f8_34_ff; +extern cpuop_func op_46f9_34_nf; +extern cpuop_func op_46f9_34_ff; +extern cpuop_func op_46fa_34_nf; +extern cpuop_func op_46fa_34_ff; +extern cpuop_func op_46fb_34_nf; +extern cpuop_func op_46fb_34_ff; +extern cpuop_func op_46fc_34_nf; +extern cpuop_func op_46fc_34_ff; +extern cpuop_func op_4800_34_nf; +extern cpuop_func op_4800_34_ff; +extern cpuop_func op_4808_34_nf; +extern cpuop_func op_4808_34_ff; +extern cpuop_func op_4810_34_nf; +extern cpuop_func op_4810_34_ff; +extern cpuop_func op_4818_34_nf; +extern cpuop_func op_4818_34_ff; +extern cpuop_func op_4820_34_nf; +extern cpuop_func op_4820_34_ff; +extern cpuop_func op_4828_34_nf; +extern cpuop_func op_4828_34_ff; +extern cpuop_func op_4830_34_nf; +extern cpuop_func op_4830_34_ff; +extern cpuop_func op_4838_34_nf; +extern cpuop_func op_4838_34_ff; +extern cpuop_func op_4839_34_nf; +extern cpuop_func op_4839_34_ff; +extern cpuop_func op_4840_34_nf; +extern cpuop_func op_4840_34_ff; +extern cpuop_func op_4848_34_nf; +extern cpuop_func op_4848_34_ff; +extern cpuop_func op_4850_34_nf; +extern cpuop_func op_4850_34_ff; +extern cpuop_func op_4868_34_nf; +extern cpuop_func op_4868_34_ff; +extern cpuop_func op_4870_34_nf; +extern cpuop_func op_4870_34_ff; +extern cpuop_func op_4878_34_nf; +extern cpuop_func op_4878_34_ff; +extern cpuop_func op_4879_34_nf; +extern cpuop_func op_4879_34_ff; +extern cpuop_func op_487a_34_nf; +extern cpuop_func op_487a_34_ff; +extern cpuop_func op_487b_34_nf; +extern cpuop_func op_487b_34_ff; +extern cpuop_func op_4880_34_nf; +extern cpuop_func op_4880_34_ff; +extern cpuop_func op_4890_34_nf; +extern cpuop_func op_4890_34_ff; +extern cpuop_func op_48a0_34_nf; +extern cpuop_func op_48a0_34_ff; +extern cpuop_func op_48a8_34_nf; +extern cpuop_func op_48a8_34_ff; +extern cpuop_func op_48b0_34_nf; +extern cpuop_func op_48b0_34_ff; +extern cpuop_func op_48b8_34_nf; +extern cpuop_func op_48b8_34_ff; +extern cpuop_func op_48b9_34_nf; +extern cpuop_func op_48b9_34_ff; +extern cpuop_func op_48c0_34_nf; +extern cpuop_func op_48c0_34_ff; +extern cpuop_func op_48d0_34_nf; +extern cpuop_func op_48d0_34_ff; +extern cpuop_func op_48e0_34_nf; +extern cpuop_func op_48e0_34_ff; +extern cpuop_func op_48e8_34_nf; +extern cpuop_func op_48e8_34_ff; +extern cpuop_func op_48f0_34_nf; +extern cpuop_func op_48f0_34_ff; +extern cpuop_func op_48f8_34_nf; +extern cpuop_func op_48f8_34_ff; +extern cpuop_func op_48f9_34_nf; +extern cpuop_func op_48f9_34_ff; +extern cpuop_func op_49c0_34_nf; +extern cpuop_func op_49c0_34_ff; +extern cpuop_func op_4a00_34_nf; +extern cpuop_func op_4a00_34_ff; +extern cpuop_func op_4a10_34_nf; +extern cpuop_func op_4a10_34_ff; +extern cpuop_func op_4a18_34_nf; +extern cpuop_func op_4a18_34_ff; +extern cpuop_func op_4a20_34_nf; +extern cpuop_func op_4a20_34_ff; +extern cpuop_func op_4a28_34_nf; +extern cpuop_func op_4a28_34_ff; +extern cpuop_func op_4a30_34_nf; +extern cpuop_func op_4a30_34_ff; +extern cpuop_func op_4a38_34_nf; +extern cpuop_func op_4a38_34_ff; +extern cpuop_func op_4a39_34_nf; +extern cpuop_func op_4a39_34_ff; +extern cpuop_func op_4a3a_34_nf; +extern cpuop_func op_4a3a_34_ff; +extern cpuop_func op_4a3b_34_nf; +extern cpuop_func op_4a3b_34_ff; +extern cpuop_func op_4a3c_34_nf; +extern cpuop_func op_4a3c_34_ff; +extern cpuop_func op_4a40_34_nf; +extern cpuop_func op_4a40_34_ff; +extern cpuop_func op_4a48_34_nf; +extern cpuop_func op_4a48_34_ff; +extern cpuop_func op_4a50_34_nf; +extern cpuop_func op_4a50_34_ff; +extern cpuop_func op_4a58_34_nf; +extern cpuop_func op_4a58_34_ff; +extern cpuop_func op_4a60_34_nf; +extern cpuop_func op_4a60_34_ff; +extern cpuop_func op_4a68_34_nf; +extern cpuop_func op_4a68_34_ff; +extern cpuop_func op_4a70_34_nf; +extern cpuop_func op_4a70_34_ff; +extern cpuop_func op_4a78_34_nf; +extern cpuop_func op_4a78_34_ff; +extern cpuop_func op_4a79_34_nf; +extern cpuop_func op_4a79_34_ff; +extern cpuop_func op_4a7a_34_nf; +extern cpuop_func op_4a7a_34_ff; +extern cpuop_func op_4a7b_34_nf; +extern cpuop_func op_4a7b_34_ff; +extern cpuop_func op_4a7c_34_nf; +extern cpuop_func op_4a7c_34_ff; +extern cpuop_func op_4a80_34_nf; +extern cpuop_func op_4a80_34_ff; +extern cpuop_func op_4a88_34_nf; +extern cpuop_func op_4a88_34_ff; +extern cpuop_func op_4a90_34_nf; +extern cpuop_func op_4a90_34_ff; +extern cpuop_func op_4a98_34_nf; +extern cpuop_func op_4a98_34_ff; +extern cpuop_func op_4aa0_34_nf; +extern cpuop_func op_4aa0_34_ff; +extern cpuop_func op_4aa8_34_nf; +extern cpuop_func op_4aa8_34_ff; +extern cpuop_func op_4ab0_34_nf; +extern cpuop_func op_4ab0_34_ff; +extern cpuop_func op_4ab8_34_nf; +extern cpuop_func op_4ab8_34_ff; +extern cpuop_func op_4ab9_34_nf; +extern cpuop_func op_4ab9_34_ff; +extern cpuop_func op_4aba_34_nf; +extern cpuop_func op_4aba_34_ff; +extern cpuop_func op_4abb_34_nf; +extern cpuop_func op_4abb_34_ff; +extern cpuop_func op_4abc_34_nf; +extern cpuop_func op_4abc_34_ff; +extern cpuop_func op_4ac0_34_nf; +extern cpuop_func op_4ac0_34_ff; +extern cpuop_func op_4ad0_34_nf; +extern cpuop_func op_4ad0_34_ff; +extern cpuop_func op_4ad8_34_nf; +extern cpuop_func op_4ad8_34_ff; +extern cpuop_func op_4ae0_34_nf; +extern cpuop_func op_4ae0_34_ff; +extern cpuop_func op_4ae8_34_nf; +extern cpuop_func op_4ae8_34_ff; +extern cpuop_func op_4af0_34_nf; +extern cpuop_func op_4af0_34_ff; +extern cpuop_func op_4af8_34_nf; +extern cpuop_func op_4af8_34_ff; +extern cpuop_func op_4af9_34_nf; +extern cpuop_func op_4af9_34_ff; +extern cpuop_func op_4c00_34_nf; +extern cpuop_func op_4c00_34_ff; +extern cpuop_func op_4c10_34_nf; +extern cpuop_func op_4c10_34_ff; +extern cpuop_func op_4c18_34_nf; +extern cpuop_func op_4c18_34_ff; +extern cpuop_func op_4c20_34_nf; +extern cpuop_func op_4c20_34_ff; +extern cpuop_func op_4c28_34_nf; +extern cpuop_func op_4c28_34_ff; +extern cpuop_func op_4c30_34_nf; +extern cpuop_func op_4c30_34_ff; +extern cpuop_func op_4c38_34_nf; +extern cpuop_func op_4c38_34_ff; +extern cpuop_func op_4c39_34_nf; +extern cpuop_func op_4c39_34_ff; +extern cpuop_func op_4c3a_34_nf; +extern cpuop_func op_4c3a_34_ff; +extern cpuop_func op_4c3b_34_nf; +extern cpuop_func op_4c3b_34_ff; +extern cpuop_func op_4c3c_34_nf; +extern cpuop_func op_4c3c_34_ff; +extern cpuop_func op_4c40_34_nf; +extern cpuop_func op_4c40_34_ff; +extern cpuop_func op_4c50_34_nf; +extern cpuop_func op_4c50_34_ff; +extern cpuop_func op_4c58_34_nf; +extern cpuop_func op_4c58_34_ff; +extern cpuop_func op_4c60_34_nf; +extern cpuop_func op_4c60_34_ff; +extern cpuop_func op_4c68_34_nf; +extern cpuop_func op_4c68_34_ff; +extern cpuop_func op_4c70_34_nf; +extern cpuop_func op_4c70_34_ff; +extern cpuop_func op_4c78_34_nf; +extern cpuop_func op_4c78_34_ff; +extern cpuop_func op_4c79_34_nf; +extern cpuop_func op_4c79_34_ff; +extern cpuop_func op_4c7a_34_nf; +extern cpuop_func op_4c7a_34_ff; +extern cpuop_func op_4c7b_34_nf; +extern cpuop_func op_4c7b_34_ff; +extern cpuop_func op_4c7c_34_nf; +extern cpuop_func op_4c7c_34_ff; +extern cpuop_func op_4c90_34_nf; +extern cpuop_func op_4c90_34_ff; +extern cpuop_func op_4c98_34_nf; +extern cpuop_func op_4c98_34_ff; +extern cpuop_func op_4ca8_34_nf; +extern cpuop_func op_4ca8_34_ff; +extern cpuop_func op_4cb0_34_nf; +extern cpuop_func op_4cb0_34_ff; +extern cpuop_func op_4cb8_34_nf; +extern cpuop_func op_4cb8_34_ff; +extern cpuop_func op_4cb9_34_nf; +extern cpuop_func op_4cb9_34_ff; +extern cpuop_func op_4cba_34_nf; +extern cpuop_func op_4cba_34_ff; +extern cpuop_func op_4cbb_34_nf; +extern cpuop_func op_4cbb_34_ff; +extern cpuop_func op_4cd0_34_nf; +extern cpuop_func op_4cd0_34_ff; +extern cpuop_func op_4cd8_34_nf; +extern cpuop_func op_4cd8_34_ff; +extern cpuop_func op_4ce8_34_nf; +extern cpuop_func op_4ce8_34_ff; +extern cpuop_func op_4cf0_34_nf; +extern cpuop_func op_4cf0_34_ff; +extern cpuop_func op_4cf8_34_nf; +extern cpuop_func op_4cf8_34_ff; +extern cpuop_func op_4cf9_34_nf; +extern cpuop_func op_4cf9_34_ff; +extern cpuop_func op_4cfa_34_nf; +extern cpuop_func op_4cfa_34_ff; +extern cpuop_func op_4cfb_34_nf; +extern cpuop_func op_4cfb_34_ff; +extern cpuop_func op_4e40_34_nf; +extern cpuop_func op_4e40_34_ff; +extern cpuop_func op_4e50_34_nf; +extern cpuop_func op_4e50_34_ff; +extern cpuop_func op_4e58_34_nf; +extern cpuop_func op_4e58_34_ff; +extern cpuop_func op_4e60_34_nf; +extern cpuop_func op_4e60_34_ff; +extern cpuop_func op_4e68_34_nf; +extern cpuop_func op_4e68_34_ff; +extern cpuop_func op_4e70_34_nf; +extern cpuop_func op_4e70_34_ff; +extern cpuop_func op_4e71_34_nf; +extern cpuop_func op_4e71_34_ff; +extern cpuop_func op_4e72_34_nf; +extern cpuop_func op_4e72_34_ff; +extern cpuop_func op_4e73_34_nf; +extern cpuop_func op_4e73_34_ff; +extern cpuop_func op_4e74_34_nf; +extern cpuop_func op_4e74_34_ff; +extern cpuop_func op_4e75_34_nf; +extern cpuop_func op_4e75_34_ff; +extern cpuop_func op_4e76_34_nf; +extern cpuop_func op_4e76_34_ff; +extern cpuop_func op_4e77_34_nf; +extern cpuop_func op_4e77_34_ff; +extern cpuop_func op_4e7a_34_nf; +extern cpuop_func op_4e7a_34_ff; +extern cpuop_func op_4e7b_34_nf; +extern cpuop_func op_4e7b_34_ff; +extern cpuop_func op_4e90_34_nf; +extern cpuop_func op_4e90_34_ff; +extern cpuop_func op_4ea8_34_nf; +extern cpuop_func op_4ea8_34_ff; +extern cpuop_func op_4eb0_34_nf; +extern cpuop_func op_4eb0_34_ff; +extern cpuop_func op_4eb8_34_nf; +extern cpuop_func op_4eb8_34_ff; +extern cpuop_func op_4eb9_34_nf; +extern cpuop_func op_4eb9_34_ff; +extern cpuop_func op_4eba_34_nf; +extern cpuop_func op_4eba_34_ff; +extern cpuop_func op_4ebb_34_nf; +extern cpuop_func op_4ebb_34_ff; +extern cpuop_func op_4ed0_34_nf; +extern cpuop_func op_4ed0_34_ff; +extern cpuop_func op_4ee8_34_nf; +extern cpuop_func op_4ee8_34_ff; +extern cpuop_func op_4ef0_34_nf; +extern cpuop_func op_4ef0_34_ff; +extern cpuop_func op_4ef8_34_nf; +extern cpuop_func op_4ef8_34_ff; +extern cpuop_func op_4ef9_34_nf; +extern cpuop_func op_4ef9_34_ff; +extern cpuop_func op_4efa_34_nf; +extern cpuop_func op_4efa_34_ff; +extern cpuop_func op_4efb_34_nf; +extern cpuop_func op_4efb_34_ff; +extern cpuop_func op_5000_34_nf; +extern cpuop_func op_5000_34_ff; +extern cpuop_func op_5010_34_nf; +extern cpuop_func op_5010_34_ff; +extern cpuop_func op_5018_34_nf; +extern cpuop_func op_5018_34_ff; +extern cpuop_func op_5020_34_nf; +extern cpuop_func op_5020_34_ff; +extern cpuop_func op_5028_34_nf; +extern cpuop_func op_5028_34_ff; +extern cpuop_func op_5030_34_nf; +extern cpuop_func op_5030_34_ff; +extern cpuop_func op_5038_34_nf; +extern cpuop_func op_5038_34_ff; +extern cpuop_func op_5039_34_nf; +extern cpuop_func op_5039_34_ff; +extern cpuop_func op_5040_34_nf; +extern cpuop_func op_5040_34_ff; +extern cpuop_func op_5048_34_nf; +extern cpuop_func op_5048_34_ff; +extern cpuop_func op_5050_34_nf; +extern cpuop_func op_5050_34_ff; +extern cpuop_func op_5058_34_nf; +extern cpuop_func op_5058_34_ff; +extern cpuop_func op_5060_34_nf; +extern cpuop_func op_5060_34_ff; +extern cpuop_func op_5068_34_nf; +extern cpuop_func op_5068_34_ff; +extern cpuop_func op_5070_34_nf; +extern cpuop_func op_5070_34_ff; +extern cpuop_func op_5078_34_nf; +extern cpuop_func op_5078_34_ff; +extern cpuop_func op_5079_34_nf; +extern cpuop_func op_5079_34_ff; +extern cpuop_func op_5080_34_nf; +extern cpuop_func op_5080_34_ff; +extern cpuop_func op_5088_34_nf; +extern cpuop_func op_5088_34_ff; +extern cpuop_func op_5090_34_nf; +extern cpuop_func op_5090_34_ff; +extern cpuop_func op_5098_34_nf; +extern cpuop_func op_5098_34_ff; +extern cpuop_func op_50a0_34_nf; +extern cpuop_func op_50a0_34_ff; +extern cpuop_func op_50a8_34_nf; +extern cpuop_func op_50a8_34_ff; +extern cpuop_func op_50b0_34_nf; +extern cpuop_func op_50b0_34_ff; +extern cpuop_func op_50b8_34_nf; +extern cpuop_func op_50b8_34_ff; +extern cpuop_func op_50b9_34_nf; +extern cpuop_func op_50b9_34_ff; +extern cpuop_func op_50c0_34_nf; +extern cpuop_func op_50c0_34_ff; +extern cpuop_func op_50c8_34_nf; +extern cpuop_func op_50c8_34_ff; +extern cpuop_func op_50d0_34_nf; +extern cpuop_func op_50d0_34_ff; +extern cpuop_func op_50d8_34_nf; +extern cpuop_func op_50d8_34_ff; +extern cpuop_func op_50e0_34_nf; +extern cpuop_func op_50e0_34_ff; +extern cpuop_func op_50e8_34_nf; +extern cpuop_func op_50e8_34_ff; +extern cpuop_func op_50f0_34_nf; +extern cpuop_func op_50f0_34_ff; +extern cpuop_func op_50f8_34_nf; +extern cpuop_func op_50f8_34_ff; +extern cpuop_func op_50f9_34_nf; +extern cpuop_func op_50f9_34_ff; +extern cpuop_func op_50fa_34_nf; +extern cpuop_func op_50fa_34_ff; +extern cpuop_func op_50fb_34_nf; +extern cpuop_func op_50fb_34_ff; +extern cpuop_func op_50fc_34_nf; +extern cpuop_func op_50fc_34_ff; +extern cpuop_func op_5100_34_nf; +extern cpuop_func op_5100_34_ff; +extern cpuop_func op_5110_34_nf; +extern cpuop_func op_5110_34_ff; +extern cpuop_func op_5118_34_nf; +extern cpuop_func op_5118_34_ff; +extern cpuop_func op_5120_34_nf; +extern cpuop_func op_5120_34_ff; +extern cpuop_func op_5128_34_nf; +extern cpuop_func op_5128_34_ff; +extern cpuop_func op_5130_34_nf; +extern cpuop_func op_5130_34_ff; +extern cpuop_func op_5138_34_nf; +extern cpuop_func op_5138_34_ff; +extern cpuop_func op_5139_34_nf; +extern cpuop_func op_5139_34_ff; +extern cpuop_func op_5140_34_nf; +extern cpuop_func op_5140_34_ff; +extern cpuop_func op_5148_34_nf; +extern cpuop_func op_5148_34_ff; +extern cpuop_func op_5150_34_nf; +extern cpuop_func op_5150_34_ff; +extern cpuop_func op_5158_34_nf; +extern cpuop_func op_5158_34_ff; +extern cpuop_func op_5160_34_nf; +extern cpuop_func op_5160_34_ff; +extern cpuop_func op_5168_34_nf; +extern cpuop_func op_5168_34_ff; +extern cpuop_func op_5170_34_nf; +extern cpuop_func op_5170_34_ff; +extern cpuop_func op_5178_34_nf; +extern cpuop_func op_5178_34_ff; +extern cpuop_func op_5179_34_nf; +extern cpuop_func op_5179_34_ff; +extern cpuop_func op_5180_34_nf; +extern cpuop_func op_5180_34_ff; +extern cpuop_func op_5188_34_nf; +extern cpuop_func op_5188_34_ff; +extern cpuop_func op_5190_34_nf; +extern cpuop_func op_5190_34_ff; +extern cpuop_func op_5198_34_nf; +extern cpuop_func op_5198_34_ff; +extern cpuop_func op_51a0_34_nf; +extern cpuop_func op_51a0_34_ff; +extern cpuop_func op_51a8_34_nf; +extern cpuop_func op_51a8_34_ff; +extern cpuop_func op_51b0_34_nf; +extern cpuop_func op_51b0_34_ff; +extern cpuop_func op_51b8_34_nf; +extern cpuop_func op_51b8_34_ff; +extern cpuop_func op_51b9_34_nf; +extern cpuop_func op_51b9_34_ff; +extern cpuop_func op_51c0_34_nf; +extern cpuop_func op_51c0_34_ff; +extern cpuop_func op_51c8_34_nf; +extern cpuop_func op_51c8_34_ff; +extern cpuop_func op_51d0_34_nf; +extern cpuop_func op_51d0_34_ff; +extern cpuop_func op_51d8_34_nf; +extern cpuop_func op_51d8_34_ff; +extern cpuop_func op_51e0_34_nf; +extern cpuop_func op_51e0_34_ff; +extern cpuop_func op_51e8_34_nf; +extern cpuop_func op_51e8_34_ff; +extern cpuop_func op_51f0_34_nf; +extern cpuop_func op_51f0_34_ff; +extern cpuop_func op_51f8_34_nf; +extern cpuop_func op_51f8_34_ff; +extern cpuop_func op_51f9_34_nf; +extern cpuop_func op_51f9_34_ff; +extern cpuop_func op_51fa_34_nf; +extern cpuop_func op_51fa_34_ff; +extern cpuop_func op_51fb_34_nf; +extern cpuop_func op_51fb_34_ff; +extern cpuop_func op_51fc_34_nf; +extern cpuop_func op_51fc_34_ff; +extern cpuop_func op_52c0_34_nf; +extern cpuop_func op_52c0_34_ff; +extern cpuop_func op_52c8_34_nf; +extern cpuop_func op_52c8_34_ff; +extern cpuop_func op_52d0_34_nf; +extern cpuop_func op_52d0_34_ff; +extern cpuop_func op_52d8_34_nf; +extern cpuop_func op_52d8_34_ff; +extern cpuop_func op_52e0_34_nf; +extern cpuop_func op_52e0_34_ff; +extern cpuop_func op_52e8_34_nf; +extern cpuop_func op_52e8_34_ff; +extern cpuop_func op_52f0_34_nf; +extern cpuop_func op_52f0_34_ff; +extern cpuop_func op_52f8_34_nf; +extern cpuop_func op_52f8_34_ff; +extern cpuop_func op_52f9_34_nf; +extern cpuop_func op_52f9_34_ff; +extern cpuop_func op_52fa_34_nf; +extern cpuop_func op_52fa_34_ff; +extern cpuop_func op_52fb_34_nf; +extern cpuop_func op_52fb_34_ff; +extern cpuop_func op_52fc_34_nf; +extern cpuop_func op_52fc_34_ff; +extern cpuop_func op_53c0_34_nf; +extern cpuop_func op_53c0_34_ff; +extern cpuop_func op_53c8_34_nf; +extern cpuop_func op_53c8_34_ff; +extern cpuop_func op_53d0_34_nf; +extern cpuop_func op_53d0_34_ff; +extern cpuop_func op_53d8_34_nf; +extern cpuop_func op_53d8_34_ff; +extern cpuop_func op_53e0_34_nf; +extern cpuop_func op_53e0_34_ff; +extern cpuop_func op_53e8_34_nf; +extern cpuop_func op_53e8_34_ff; +extern cpuop_func op_53f0_34_nf; +extern cpuop_func op_53f0_34_ff; +extern cpuop_func op_53f8_34_nf; +extern cpuop_func op_53f8_34_ff; +extern cpuop_func op_53f9_34_nf; +extern cpuop_func op_53f9_34_ff; +extern cpuop_func op_53fa_34_nf; +extern cpuop_func op_53fa_34_ff; +extern cpuop_func op_53fb_34_nf; +extern cpuop_func op_53fb_34_ff; +extern cpuop_func op_53fc_34_nf; +extern cpuop_func op_53fc_34_ff; +extern cpuop_func op_54c0_34_nf; +extern cpuop_func op_54c0_34_ff; +extern cpuop_func op_54c8_34_nf; +extern cpuop_func op_54c8_34_ff; +extern cpuop_func op_54d0_34_nf; +extern cpuop_func op_54d0_34_ff; +extern cpuop_func op_54d8_34_nf; +extern cpuop_func op_54d8_34_ff; +extern cpuop_func op_54e0_34_nf; +extern cpuop_func op_54e0_34_ff; +extern cpuop_func op_54e8_34_nf; +extern cpuop_func op_54e8_34_ff; +extern cpuop_func op_54f0_34_nf; +extern cpuop_func op_54f0_34_ff; +extern cpuop_func op_54f8_34_nf; +extern cpuop_func op_54f8_34_ff; +extern cpuop_func op_54f9_34_nf; +extern cpuop_func op_54f9_34_ff; +extern cpuop_func op_54fa_34_nf; +extern cpuop_func op_54fa_34_ff; +extern cpuop_func op_54fb_34_nf; +extern cpuop_func op_54fb_34_ff; +extern cpuop_func op_54fc_34_nf; +extern cpuop_func op_54fc_34_ff; +extern cpuop_func op_55c0_34_nf; +extern cpuop_func op_55c0_34_ff; +extern cpuop_func op_55c8_34_nf; +extern cpuop_func op_55c8_34_ff; +extern cpuop_func op_55d0_34_nf; +extern cpuop_func op_55d0_34_ff; +extern cpuop_func op_55d8_34_nf; +extern cpuop_func op_55d8_34_ff; +extern cpuop_func op_55e0_34_nf; +extern cpuop_func op_55e0_34_ff; +extern cpuop_func op_55e8_34_nf; +extern cpuop_func op_55e8_34_ff; +extern cpuop_func op_55f0_34_nf; +extern cpuop_func op_55f0_34_ff; +extern cpuop_func op_55f8_34_nf; +extern cpuop_func op_55f8_34_ff; +extern cpuop_func op_55f9_34_nf; +extern cpuop_func op_55f9_34_ff; +extern cpuop_func op_55fa_34_nf; +extern cpuop_func op_55fa_34_ff; +extern cpuop_func op_55fb_34_nf; +extern cpuop_func op_55fb_34_ff; +extern cpuop_func op_55fc_34_nf; +extern cpuop_func op_55fc_34_ff; +extern cpuop_func op_56c0_34_nf; +extern cpuop_func op_56c0_34_ff; +extern cpuop_func op_56c8_34_nf; +extern cpuop_func op_56c8_34_ff; +extern cpuop_func op_56d0_34_nf; +extern cpuop_func op_56d0_34_ff; +extern cpuop_func op_56d8_34_nf; +extern cpuop_func op_56d8_34_ff; +extern cpuop_func op_56e0_34_nf; +extern cpuop_func op_56e0_34_ff; +extern cpuop_func op_56e8_34_nf; +extern cpuop_func op_56e8_34_ff; +extern cpuop_func op_56f0_34_nf; +extern cpuop_func op_56f0_34_ff; +extern cpuop_func op_56f8_34_nf; +extern cpuop_func op_56f8_34_ff; +extern cpuop_func op_56f9_34_nf; +extern cpuop_func op_56f9_34_ff; +extern cpuop_func op_56fa_34_nf; +extern cpuop_func op_56fa_34_ff; +extern cpuop_func op_56fb_34_nf; +extern cpuop_func op_56fb_34_ff; +extern cpuop_func op_56fc_34_nf; +extern cpuop_func op_56fc_34_ff; +extern cpuop_func op_57c0_34_nf; +extern cpuop_func op_57c0_34_ff; +extern cpuop_func op_57c8_34_nf; +extern cpuop_func op_57c8_34_ff; +extern cpuop_func op_57d0_34_nf; +extern cpuop_func op_57d0_34_ff; +extern cpuop_func op_57d8_34_nf; +extern cpuop_func op_57d8_34_ff; +extern cpuop_func op_57e0_34_nf; +extern cpuop_func op_57e0_34_ff; +extern cpuop_func op_57e8_34_nf; +extern cpuop_func op_57e8_34_ff; +extern cpuop_func op_57f0_34_nf; +extern cpuop_func op_57f0_34_ff; +extern cpuop_func op_57f8_34_nf; +extern cpuop_func op_57f8_34_ff; +extern cpuop_func op_57f9_34_nf; +extern cpuop_func op_57f9_34_ff; +extern cpuop_func op_57fa_34_nf; +extern cpuop_func op_57fa_34_ff; +extern cpuop_func op_57fb_34_nf; +extern cpuop_func op_57fb_34_ff; +extern cpuop_func op_57fc_34_nf; +extern cpuop_func op_57fc_34_ff; +extern cpuop_func op_58c0_34_nf; +extern cpuop_func op_58c0_34_ff; +extern cpuop_func op_58c8_34_nf; +extern cpuop_func op_58c8_34_ff; +extern cpuop_func op_58d0_34_nf; +extern cpuop_func op_58d0_34_ff; +extern cpuop_func op_58d8_34_nf; +extern cpuop_func op_58d8_34_ff; +extern cpuop_func op_58e0_34_nf; +extern cpuop_func op_58e0_34_ff; +extern cpuop_func op_58e8_34_nf; +extern cpuop_func op_58e8_34_ff; +extern cpuop_func op_58f0_34_nf; +extern cpuop_func op_58f0_34_ff; +extern cpuop_func op_58f8_34_nf; +extern cpuop_func op_58f8_34_ff; +extern cpuop_func op_58f9_34_nf; +extern cpuop_func op_58f9_34_ff; +extern cpuop_func op_58fa_34_nf; +extern cpuop_func op_58fa_34_ff; +extern cpuop_func op_58fb_34_nf; +extern cpuop_func op_58fb_34_ff; +extern cpuop_func op_58fc_34_nf; +extern cpuop_func op_58fc_34_ff; +extern cpuop_func op_59c0_34_nf; +extern cpuop_func op_59c0_34_ff; +extern cpuop_func op_59c8_34_nf; +extern cpuop_func op_59c8_34_ff; +extern cpuop_func op_59d0_34_nf; +extern cpuop_func op_59d0_34_ff; +extern cpuop_func op_59d8_34_nf; +extern cpuop_func op_59d8_34_ff; +extern cpuop_func op_59e0_34_nf; +extern cpuop_func op_59e0_34_ff; +extern cpuop_func op_59e8_34_nf; +extern cpuop_func op_59e8_34_ff; +extern cpuop_func op_59f0_34_nf; +extern cpuop_func op_59f0_34_ff; +extern cpuop_func op_59f8_34_nf; +extern cpuop_func op_59f8_34_ff; +extern cpuop_func op_59f9_34_nf; +extern cpuop_func op_59f9_34_ff; +extern cpuop_func op_59fa_34_nf; +extern cpuop_func op_59fa_34_ff; +extern cpuop_func op_59fb_34_nf; +extern cpuop_func op_59fb_34_ff; +extern cpuop_func op_59fc_34_nf; +extern cpuop_func op_59fc_34_ff; +extern cpuop_func op_5ac0_34_nf; +extern cpuop_func op_5ac0_34_ff; +extern cpuop_func op_5ac8_34_nf; +extern cpuop_func op_5ac8_34_ff; +extern cpuop_func op_5ad0_34_nf; +extern cpuop_func op_5ad0_34_ff; +extern cpuop_func op_5ad8_34_nf; +extern cpuop_func op_5ad8_34_ff; +extern cpuop_func op_5ae0_34_nf; +extern cpuop_func op_5ae0_34_ff; +extern cpuop_func op_5ae8_34_nf; +extern cpuop_func op_5ae8_34_ff; +extern cpuop_func op_5af0_34_nf; +extern cpuop_func op_5af0_34_ff; +extern cpuop_func op_5af8_34_nf; +extern cpuop_func op_5af8_34_ff; +extern cpuop_func op_5af9_34_nf; +extern cpuop_func op_5af9_34_ff; +extern cpuop_func op_5afa_34_nf; +extern cpuop_func op_5afa_34_ff; +extern cpuop_func op_5afb_34_nf; +extern cpuop_func op_5afb_34_ff; +extern cpuop_func op_5afc_34_nf; +extern cpuop_func op_5afc_34_ff; +extern cpuop_func op_5bc0_34_nf; +extern cpuop_func op_5bc0_34_ff; +extern cpuop_func op_5bc8_34_nf; +extern cpuop_func op_5bc8_34_ff; +extern cpuop_func op_5bd0_34_nf; +extern cpuop_func op_5bd0_34_ff; +extern cpuop_func op_5bd8_34_nf; +extern cpuop_func op_5bd8_34_ff; +extern cpuop_func op_5be0_34_nf; +extern cpuop_func op_5be0_34_ff; +extern cpuop_func op_5be8_34_nf; +extern cpuop_func op_5be8_34_ff; +extern cpuop_func op_5bf0_34_nf; +extern cpuop_func op_5bf0_34_ff; +extern cpuop_func op_5bf8_34_nf; +extern cpuop_func op_5bf8_34_ff; +extern cpuop_func op_5bf9_34_nf; +extern cpuop_func op_5bf9_34_ff; +extern cpuop_func op_5bfa_34_nf; +extern cpuop_func op_5bfa_34_ff; +extern cpuop_func op_5bfb_34_nf; +extern cpuop_func op_5bfb_34_ff; +extern cpuop_func op_5bfc_34_nf; +extern cpuop_func op_5bfc_34_ff; +extern cpuop_func op_5cc0_34_nf; +extern cpuop_func op_5cc0_34_ff; +extern cpuop_func op_5cc8_34_nf; +extern cpuop_func op_5cc8_34_ff; +extern cpuop_func op_5cd0_34_nf; +extern cpuop_func op_5cd0_34_ff; +extern cpuop_func op_5cd8_34_nf; +extern cpuop_func op_5cd8_34_ff; +extern cpuop_func op_5ce0_34_nf; +extern cpuop_func op_5ce0_34_ff; +extern cpuop_func op_5ce8_34_nf; +extern cpuop_func op_5ce8_34_ff; +extern cpuop_func op_5cf0_34_nf; +extern cpuop_func op_5cf0_34_ff; +extern cpuop_func op_5cf8_34_nf; +extern cpuop_func op_5cf8_34_ff; +extern cpuop_func op_5cf9_34_nf; +extern cpuop_func op_5cf9_34_ff; +extern cpuop_func op_5cfa_34_nf; +extern cpuop_func op_5cfa_34_ff; +extern cpuop_func op_5cfb_34_nf; +extern cpuop_func op_5cfb_34_ff; +extern cpuop_func op_5cfc_34_nf; +extern cpuop_func op_5cfc_34_ff; +extern cpuop_func op_5dc0_34_nf; +extern cpuop_func op_5dc0_34_ff; +extern cpuop_func op_5dc8_34_nf; +extern cpuop_func op_5dc8_34_ff; +extern cpuop_func op_5dd0_34_nf; +extern cpuop_func op_5dd0_34_ff; +extern cpuop_func op_5dd8_34_nf; +extern cpuop_func op_5dd8_34_ff; +extern cpuop_func op_5de0_34_nf; +extern cpuop_func op_5de0_34_ff; +extern cpuop_func op_5de8_34_nf; +extern cpuop_func op_5de8_34_ff; +extern cpuop_func op_5df0_34_nf; +extern cpuop_func op_5df0_34_ff; +extern cpuop_func op_5df8_34_nf; +extern cpuop_func op_5df8_34_ff; +extern cpuop_func op_5df9_34_nf; +extern cpuop_func op_5df9_34_ff; +extern cpuop_func op_5dfa_34_nf; +extern cpuop_func op_5dfa_34_ff; +extern cpuop_func op_5dfb_34_nf; +extern cpuop_func op_5dfb_34_ff; +extern cpuop_func op_5dfc_34_nf; +extern cpuop_func op_5dfc_34_ff; +extern cpuop_func op_5ec0_34_nf; +extern cpuop_func op_5ec0_34_ff; +extern cpuop_func op_5ec8_34_nf; +extern cpuop_func op_5ec8_34_ff; +extern cpuop_func op_5ed0_34_nf; +extern cpuop_func op_5ed0_34_ff; +extern cpuop_func op_5ed8_34_nf; +extern cpuop_func op_5ed8_34_ff; +extern cpuop_func op_5ee0_34_nf; +extern cpuop_func op_5ee0_34_ff; +extern cpuop_func op_5ee8_34_nf; +extern cpuop_func op_5ee8_34_ff; +extern cpuop_func op_5ef0_34_nf; +extern cpuop_func op_5ef0_34_ff; +extern cpuop_func op_5ef8_34_nf; +extern cpuop_func op_5ef8_34_ff; +extern cpuop_func op_5ef9_34_nf; +extern cpuop_func op_5ef9_34_ff; +extern cpuop_func op_5efa_34_nf; +extern cpuop_func op_5efa_34_ff; +extern cpuop_func op_5efb_34_nf; +extern cpuop_func op_5efb_34_ff; +extern cpuop_func op_5efc_34_nf; +extern cpuop_func op_5efc_34_ff; +extern cpuop_func op_5fc0_34_nf; +extern cpuop_func op_5fc0_34_ff; +extern cpuop_func op_5fc8_34_nf; +extern cpuop_func op_5fc8_34_ff; +extern cpuop_func op_5fd0_34_nf; +extern cpuop_func op_5fd0_34_ff; +extern cpuop_func op_5fd8_34_nf; +extern cpuop_func op_5fd8_34_ff; +extern cpuop_func op_5fe0_34_nf; +extern cpuop_func op_5fe0_34_ff; +extern cpuop_func op_5fe8_34_nf; +extern cpuop_func op_5fe8_34_ff; +extern cpuop_func op_5ff0_34_nf; +extern cpuop_func op_5ff0_34_ff; +extern cpuop_func op_5ff8_34_nf; +extern cpuop_func op_5ff8_34_ff; +extern cpuop_func op_5ff9_34_nf; +extern cpuop_func op_5ff9_34_ff; +extern cpuop_func op_5ffa_34_nf; +extern cpuop_func op_5ffa_34_ff; +extern cpuop_func op_5ffb_34_nf; +extern cpuop_func op_5ffb_34_ff; +extern cpuop_func op_5ffc_34_nf; +extern cpuop_func op_5ffc_34_ff; +extern cpuop_func op_6000_34_nf; +extern cpuop_func op_6000_34_ff; +extern cpuop_func op_6001_34_nf; +extern cpuop_func op_6001_34_ff; +extern cpuop_func op_60ff_34_nf; +extern cpuop_func op_60ff_34_ff; +extern cpuop_func op_6100_34_nf; +extern cpuop_func op_6100_34_ff; +extern cpuop_func op_6101_34_nf; +extern cpuop_func op_6101_34_ff; +extern cpuop_func op_61ff_34_nf; +extern cpuop_func op_61ff_34_ff; +extern cpuop_func op_6200_34_nf; +extern cpuop_func op_6200_34_ff; +extern cpuop_func op_6201_34_nf; +extern cpuop_func op_6201_34_ff; +extern cpuop_func op_62ff_34_nf; +extern cpuop_func op_62ff_34_ff; +extern cpuop_func op_6300_34_nf; +extern cpuop_func op_6300_34_ff; +extern cpuop_func op_6301_34_nf; +extern cpuop_func op_6301_34_ff; +extern cpuop_func op_63ff_34_nf; +extern cpuop_func op_63ff_34_ff; +extern cpuop_func op_6400_34_nf; +extern cpuop_func op_6400_34_ff; +extern cpuop_func op_6401_34_nf; +extern cpuop_func op_6401_34_ff; +extern cpuop_func op_64ff_34_nf; +extern cpuop_func op_64ff_34_ff; +extern cpuop_func op_6500_34_nf; +extern cpuop_func op_6500_34_ff; +extern cpuop_func op_6501_34_nf; +extern cpuop_func op_6501_34_ff; +extern cpuop_func op_65ff_34_nf; +extern cpuop_func op_65ff_34_ff; +extern cpuop_func op_6600_34_nf; +extern cpuop_func op_6600_34_ff; +extern cpuop_func op_6601_34_nf; +extern cpuop_func op_6601_34_ff; +extern cpuop_func op_66ff_34_nf; +extern cpuop_func op_66ff_34_ff; +extern cpuop_func op_6700_34_nf; +extern cpuop_func op_6700_34_ff; +extern cpuop_func op_6701_34_nf; +extern cpuop_func op_6701_34_ff; +extern cpuop_func op_67ff_34_nf; +extern cpuop_func op_67ff_34_ff; +extern cpuop_func op_6800_34_nf; +extern cpuop_func op_6800_34_ff; +extern cpuop_func op_6801_34_nf; +extern cpuop_func op_6801_34_ff; +extern cpuop_func op_68ff_34_nf; +extern cpuop_func op_68ff_34_ff; +extern cpuop_func op_6900_34_nf; +extern cpuop_func op_6900_34_ff; +extern cpuop_func op_6901_34_nf; +extern cpuop_func op_6901_34_ff; +extern cpuop_func op_69ff_34_nf; +extern cpuop_func op_69ff_34_ff; +extern cpuop_func op_6a00_34_nf; +extern cpuop_func op_6a00_34_ff; +extern cpuop_func op_6a01_34_nf; +extern cpuop_func op_6a01_34_ff; +extern cpuop_func op_6aff_34_nf; +extern cpuop_func op_6aff_34_ff; +extern cpuop_func op_6b00_34_nf; +extern cpuop_func op_6b00_34_ff; +extern cpuop_func op_6b01_34_nf; +extern cpuop_func op_6b01_34_ff; +extern cpuop_func op_6bff_34_nf; +extern cpuop_func op_6bff_34_ff; +extern cpuop_func op_6c00_34_nf; +extern cpuop_func op_6c00_34_ff; +extern cpuop_func op_6c01_34_nf; +extern cpuop_func op_6c01_34_ff; +extern cpuop_func op_6cff_34_nf; +extern cpuop_func op_6cff_34_ff; +extern cpuop_func op_6d00_34_nf; +extern cpuop_func op_6d00_34_ff; +extern cpuop_func op_6d01_34_nf; +extern cpuop_func op_6d01_34_ff; +extern cpuop_func op_6dff_34_nf; +extern cpuop_func op_6dff_34_ff; +extern cpuop_func op_6e00_34_nf; +extern cpuop_func op_6e00_34_ff; +extern cpuop_func op_6e01_34_nf; +extern cpuop_func op_6e01_34_ff; +extern cpuop_func op_6eff_34_nf; +extern cpuop_func op_6eff_34_ff; +extern cpuop_func op_6f00_34_nf; +extern cpuop_func op_6f00_34_ff; +extern cpuop_func op_6f01_34_nf; +extern cpuop_func op_6f01_34_ff; +extern cpuop_func op_6fff_34_nf; +extern cpuop_func op_6fff_34_ff; +extern cpuop_func op_7000_34_nf; +extern cpuop_func op_7000_34_ff; +extern cpuop_func op_8000_34_nf; +extern cpuop_func op_8000_34_ff; +extern cpuop_func op_8010_34_nf; +extern cpuop_func op_8010_34_ff; +extern cpuop_func op_8018_34_nf; +extern cpuop_func op_8018_34_ff; +extern cpuop_func op_8020_34_nf; +extern cpuop_func op_8020_34_ff; +extern cpuop_func op_8028_34_nf; +extern cpuop_func op_8028_34_ff; +extern cpuop_func op_8030_34_nf; +extern cpuop_func op_8030_34_ff; +extern cpuop_func op_8038_34_nf; +extern cpuop_func op_8038_34_ff; +extern cpuop_func op_8039_34_nf; +extern cpuop_func op_8039_34_ff; +extern cpuop_func op_803a_34_nf; +extern cpuop_func op_803a_34_ff; +extern cpuop_func op_803b_34_nf; +extern cpuop_func op_803b_34_ff; +extern cpuop_func op_803c_34_nf; +extern cpuop_func op_803c_34_ff; +extern cpuop_func op_8040_34_nf; +extern cpuop_func op_8040_34_ff; +extern cpuop_func op_8050_34_nf; +extern cpuop_func op_8050_34_ff; +extern cpuop_func op_8058_34_nf; +extern cpuop_func op_8058_34_ff; +extern cpuop_func op_8060_34_nf; +extern cpuop_func op_8060_34_ff; +extern cpuop_func op_8068_34_nf; +extern cpuop_func op_8068_34_ff; +extern cpuop_func op_8070_34_nf; +extern cpuop_func op_8070_34_ff; +extern cpuop_func op_8078_34_nf; +extern cpuop_func op_8078_34_ff; +extern cpuop_func op_8079_34_nf; +extern cpuop_func op_8079_34_ff; +extern cpuop_func op_807a_34_nf; +extern cpuop_func op_807a_34_ff; +extern cpuop_func op_807b_34_nf; +extern cpuop_func op_807b_34_ff; +extern cpuop_func op_807c_34_nf; +extern cpuop_func op_807c_34_ff; +extern cpuop_func op_8080_34_nf; +extern cpuop_func op_8080_34_ff; +extern cpuop_func op_8090_34_nf; +extern cpuop_func op_8090_34_ff; +extern cpuop_func op_8098_34_nf; +extern cpuop_func op_8098_34_ff; +extern cpuop_func op_80a0_34_nf; +extern cpuop_func op_80a0_34_ff; +extern cpuop_func op_80a8_34_nf; +extern cpuop_func op_80a8_34_ff; +extern cpuop_func op_80b0_34_nf; +extern cpuop_func op_80b0_34_ff; +extern cpuop_func op_80b8_34_nf; +extern cpuop_func op_80b8_34_ff; +extern cpuop_func op_80b9_34_nf; +extern cpuop_func op_80b9_34_ff; +extern cpuop_func op_80ba_34_nf; +extern cpuop_func op_80ba_34_ff; +extern cpuop_func op_80bb_34_nf; +extern cpuop_func op_80bb_34_ff; +extern cpuop_func op_80bc_34_nf; +extern cpuop_func op_80bc_34_ff; +extern cpuop_func op_80c0_34_nf; +extern cpuop_func op_80c0_34_ff; +extern cpuop_func op_80d0_34_nf; +extern cpuop_func op_80d0_34_ff; +extern cpuop_func op_80d8_34_nf; +extern cpuop_func op_80d8_34_ff; +extern cpuop_func op_80e0_34_nf; +extern cpuop_func op_80e0_34_ff; +extern cpuop_func op_80e8_34_nf; +extern cpuop_func op_80e8_34_ff; +extern cpuop_func op_80f0_34_nf; +extern cpuop_func op_80f0_34_ff; +extern cpuop_func op_80f8_34_nf; +extern cpuop_func op_80f8_34_ff; +extern cpuop_func op_80f9_34_nf; +extern cpuop_func op_80f9_34_ff; +extern cpuop_func op_80fa_34_nf; +extern cpuop_func op_80fa_34_ff; +extern cpuop_func op_80fb_34_nf; +extern cpuop_func op_80fb_34_ff; +extern cpuop_func op_80fc_34_nf; +extern cpuop_func op_80fc_34_ff; +extern cpuop_func op_8100_34_nf; +extern cpuop_func op_8100_34_ff; +extern cpuop_func op_8108_34_nf; +extern cpuop_func op_8108_34_ff; +extern cpuop_func op_8110_34_nf; +extern cpuop_func op_8110_34_ff; +extern cpuop_func op_8118_34_nf; +extern cpuop_func op_8118_34_ff; +extern cpuop_func op_8120_34_nf; +extern cpuop_func op_8120_34_ff; +extern cpuop_func op_8128_34_nf; +extern cpuop_func op_8128_34_ff; +extern cpuop_func op_8130_34_nf; +extern cpuop_func op_8130_34_ff; +extern cpuop_func op_8138_34_nf; +extern cpuop_func op_8138_34_ff; +extern cpuop_func op_8139_34_nf; +extern cpuop_func op_8139_34_ff; +extern cpuop_func op_8140_34_nf; +extern cpuop_func op_8140_34_ff; +extern cpuop_func op_8148_34_nf; +extern cpuop_func op_8148_34_ff; +extern cpuop_func op_8150_34_nf; +extern cpuop_func op_8150_34_ff; +extern cpuop_func op_8158_34_nf; +extern cpuop_func op_8158_34_ff; +extern cpuop_func op_8160_34_nf; +extern cpuop_func op_8160_34_ff; +extern cpuop_func op_8168_34_nf; +extern cpuop_func op_8168_34_ff; +extern cpuop_func op_8170_34_nf; +extern cpuop_func op_8170_34_ff; +extern cpuop_func op_8178_34_nf; +extern cpuop_func op_8178_34_ff; +extern cpuop_func op_8179_34_nf; +extern cpuop_func op_8179_34_ff; +extern cpuop_func op_8180_34_nf; +extern cpuop_func op_8180_34_ff; +extern cpuop_func op_8188_34_nf; +extern cpuop_func op_8188_34_ff; +extern cpuop_func op_8190_34_nf; +extern cpuop_func op_8190_34_ff; +extern cpuop_func op_8198_34_nf; +extern cpuop_func op_8198_34_ff; +extern cpuop_func op_81a0_34_nf; +extern cpuop_func op_81a0_34_ff; +extern cpuop_func op_81a8_34_nf; +extern cpuop_func op_81a8_34_ff; +extern cpuop_func op_81b0_34_nf; +extern cpuop_func op_81b0_34_ff; +extern cpuop_func op_81b8_34_nf; +extern cpuop_func op_81b8_34_ff; +extern cpuop_func op_81b9_34_nf; +extern cpuop_func op_81b9_34_ff; +extern cpuop_func op_81c0_34_nf; +extern cpuop_func op_81c0_34_ff; +extern cpuop_func op_81d0_34_nf; +extern cpuop_func op_81d0_34_ff; +extern cpuop_func op_81d8_34_nf; +extern cpuop_func op_81d8_34_ff; +extern cpuop_func op_81e0_34_nf; +extern cpuop_func op_81e0_34_ff; +extern cpuop_func op_81e8_34_nf; +extern cpuop_func op_81e8_34_ff; +extern cpuop_func op_81f0_34_nf; +extern cpuop_func op_81f0_34_ff; +extern cpuop_func op_81f8_34_nf; +extern cpuop_func op_81f8_34_ff; +extern cpuop_func op_81f9_34_nf; +extern cpuop_func op_81f9_34_ff; +extern cpuop_func op_81fa_34_nf; +extern cpuop_func op_81fa_34_ff; +extern cpuop_func op_81fb_34_nf; +extern cpuop_func op_81fb_34_ff; +extern cpuop_func op_81fc_34_nf; +extern cpuop_func op_81fc_34_ff; +extern cpuop_func op_9000_34_nf; +extern cpuop_func op_9000_34_ff; +extern cpuop_func op_9010_34_nf; +extern cpuop_func op_9010_34_ff; +extern cpuop_func op_9018_34_nf; +extern cpuop_func op_9018_34_ff; +extern cpuop_func op_9020_34_nf; +extern cpuop_func op_9020_34_ff; +extern cpuop_func op_9028_34_nf; +extern cpuop_func op_9028_34_ff; +extern cpuop_func op_9030_34_nf; +extern cpuop_func op_9030_34_ff; +extern cpuop_func op_9038_34_nf; +extern cpuop_func op_9038_34_ff; +extern cpuop_func op_9039_34_nf; +extern cpuop_func op_9039_34_ff; +extern cpuop_func op_903a_34_nf; +extern cpuop_func op_903a_34_ff; +extern cpuop_func op_903b_34_nf; +extern cpuop_func op_903b_34_ff; +extern cpuop_func op_903c_34_nf; +extern cpuop_func op_903c_34_ff; +extern cpuop_func op_9040_34_nf; +extern cpuop_func op_9040_34_ff; +extern cpuop_func op_9048_34_nf; +extern cpuop_func op_9048_34_ff; +extern cpuop_func op_9050_34_nf; +extern cpuop_func op_9050_34_ff; +extern cpuop_func op_9058_34_nf; +extern cpuop_func op_9058_34_ff; +extern cpuop_func op_9060_34_nf; +extern cpuop_func op_9060_34_ff; +extern cpuop_func op_9068_34_nf; +extern cpuop_func op_9068_34_ff; +extern cpuop_func op_9070_34_nf; +extern cpuop_func op_9070_34_ff; +extern cpuop_func op_9078_34_nf; +extern cpuop_func op_9078_34_ff; +extern cpuop_func op_9079_34_nf; +extern cpuop_func op_9079_34_ff; +extern cpuop_func op_907a_34_nf; +extern cpuop_func op_907a_34_ff; +extern cpuop_func op_907b_34_nf; +extern cpuop_func op_907b_34_ff; +extern cpuop_func op_907c_34_nf; +extern cpuop_func op_907c_34_ff; +extern cpuop_func op_9080_34_nf; +extern cpuop_func op_9080_34_ff; +extern cpuop_func op_9088_34_nf; +extern cpuop_func op_9088_34_ff; +extern cpuop_func op_9090_34_nf; +extern cpuop_func op_9090_34_ff; +extern cpuop_func op_9098_34_nf; +extern cpuop_func op_9098_34_ff; +extern cpuop_func op_90a0_34_nf; +extern cpuop_func op_90a0_34_ff; +extern cpuop_func op_90a8_34_nf; +extern cpuop_func op_90a8_34_ff; +extern cpuop_func op_90b0_34_nf; +extern cpuop_func op_90b0_34_ff; +extern cpuop_func op_90b8_34_nf; +extern cpuop_func op_90b8_34_ff; +extern cpuop_func op_90b9_34_nf; +extern cpuop_func op_90b9_34_ff; +extern cpuop_func op_90ba_34_nf; +extern cpuop_func op_90ba_34_ff; +extern cpuop_func op_90bb_34_nf; +extern cpuop_func op_90bb_34_ff; +extern cpuop_func op_90bc_34_nf; +extern cpuop_func op_90bc_34_ff; +extern cpuop_func op_90c0_34_nf; +extern cpuop_func op_90c0_34_ff; +extern cpuop_func op_90c8_34_nf; +extern cpuop_func op_90c8_34_ff; +extern cpuop_func op_90d0_34_nf; +extern cpuop_func op_90d0_34_ff; +extern cpuop_func op_90d8_34_nf; +extern cpuop_func op_90d8_34_ff; +extern cpuop_func op_90e0_34_nf; +extern cpuop_func op_90e0_34_ff; +extern cpuop_func op_90e8_34_nf; +extern cpuop_func op_90e8_34_ff; +extern cpuop_func op_90f0_34_nf; +extern cpuop_func op_90f0_34_ff; +extern cpuop_func op_90f8_34_nf; +extern cpuop_func op_90f8_34_ff; +extern cpuop_func op_90f9_34_nf; +extern cpuop_func op_90f9_34_ff; +extern cpuop_func op_90fa_34_nf; +extern cpuop_func op_90fa_34_ff; +extern cpuop_func op_90fb_34_nf; +extern cpuop_func op_90fb_34_ff; +extern cpuop_func op_90fc_34_nf; +extern cpuop_func op_90fc_34_ff; +extern cpuop_func op_9100_34_nf; +extern cpuop_func op_9100_34_ff; +extern cpuop_func op_9108_34_nf; +extern cpuop_func op_9108_34_ff; +extern cpuop_func op_9110_34_nf; +extern cpuop_func op_9110_34_ff; +extern cpuop_func op_9118_34_nf; +extern cpuop_func op_9118_34_ff; +extern cpuop_func op_9120_34_nf; +extern cpuop_func op_9120_34_ff; +extern cpuop_func op_9128_34_nf; +extern cpuop_func op_9128_34_ff; +extern cpuop_func op_9130_34_nf; +extern cpuop_func op_9130_34_ff; +extern cpuop_func op_9138_34_nf; +extern cpuop_func op_9138_34_ff; +extern cpuop_func op_9139_34_nf; +extern cpuop_func op_9139_34_ff; +extern cpuop_func op_9140_34_nf; +extern cpuop_func op_9140_34_ff; +extern cpuop_func op_9148_34_nf; +extern cpuop_func op_9148_34_ff; +extern cpuop_func op_9150_34_nf; +extern cpuop_func op_9150_34_ff; +extern cpuop_func op_9158_34_nf; +extern cpuop_func op_9158_34_ff; +extern cpuop_func op_9160_34_nf; +extern cpuop_func op_9160_34_ff; +extern cpuop_func op_9168_34_nf; +extern cpuop_func op_9168_34_ff; +extern cpuop_func op_9170_34_nf; +extern cpuop_func op_9170_34_ff; +extern cpuop_func op_9178_34_nf; +extern cpuop_func op_9178_34_ff; +extern cpuop_func op_9179_34_nf; +extern cpuop_func op_9179_34_ff; +extern cpuop_func op_9180_34_nf; +extern cpuop_func op_9180_34_ff; +extern cpuop_func op_9188_34_nf; +extern cpuop_func op_9188_34_ff; +extern cpuop_func op_9190_34_nf; +extern cpuop_func op_9190_34_ff; +extern cpuop_func op_9198_34_nf; +extern cpuop_func op_9198_34_ff; +extern cpuop_func op_91a0_34_nf; +extern cpuop_func op_91a0_34_ff; +extern cpuop_func op_91a8_34_nf; +extern cpuop_func op_91a8_34_ff; +extern cpuop_func op_91b0_34_nf; +extern cpuop_func op_91b0_34_ff; +extern cpuop_func op_91b8_34_nf; +extern cpuop_func op_91b8_34_ff; +extern cpuop_func op_91b9_34_nf; +extern cpuop_func op_91b9_34_ff; +extern cpuop_func op_91c0_34_nf; +extern cpuop_func op_91c0_34_ff; +extern cpuop_func op_91c8_34_nf; +extern cpuop_func op_91c8_34_ff; +extern cpuop_func op_91d0_34_nf; +extern cpuop_func op_91d0_34_ff; +extern cpuop_func op_91d8_34_nf; +extern cpuop_func op_91d8_34_ff; +extern cpuop_func op_91e0_34_nf; +extern cpuop_func op_91e0_34_ff; +extern cpuop_func op_91e8_34_nf; +extern cpuop_func op_91e8_34_ff; +extern cpuop_func op_91f0_34_nf; +extern cpuop_func op_91f0_34_ff; +extern cpuop_func op_91f8_34_nf; +extern cpuop_func op_91f8_34_ff; +extern cpuop_func op_91f9_34_nf; +extern cpuop_func op_91f9_34_ff; +extern cpuop_func op_91fa_34_nf; +extern cpuop_func op_91fa_34_ff; +extern cpuop_func op_91fb_34_nf; +extern cpuop_func op_91fb_34_ff; +extern cpuop_func op_91fc_34_nf; +extern cpuop_func op_91fc_34_ff; +extern cpuop_func op_b000_34_nf; +extern cpuop_func op_b000_34_ff; +extern cpuop_func op_b010_34_nf; +extern cpuop_func op_b010_34_ff; +extern cpuop_func op_b018_34_nf; +extern cpuop_func op_b018_34_ff; +extern cpuop_func op_b020_34_nf; +extern cpuop_func op_b020_34_ff; +extern cpuop_func op_b028_34_nf; +extern cpuop_func op_b028_34_ff; +extern cpuop_func op_b030_34_nf; +extern cpuop_func op_b030_34_ff; +extern cpuop_func op_b038_34_nf; +extern cpuop_func op_b038_34_ff; +extern cpuop_func op_b039_34_nf; +extern cpuop_func op_b039_34_ff; +extern cpuop_func op_b03a_34_nf; +extern cpuop_func op_b03a_34_ff; +extern cpuop_func op_b03b_34_nf; +extern cpuop_func op_b03b_34_ff; +extern cpuop_func op_b03c_34_nf; +extern cpuop_func op_b03c_34_ff; +extern cpuop_func op_b040_34_nf; +extern cpuop_func op_b040_34_ff; +extern cpuop_func op_b048_34_nf; +extern cpuop_func op_b048_34_ff; +extern cpuop_func op_b050_34_nf; +extern cpuop_func op_b050_34_ff; +extern cpuop_func op_b058_34_nf; +extern cpuop_func op_b058_34_ff; +extern cpuop_func op_b060_34_nf; +extern cpuop_func op_b060_34_ff; +extern cpuop_func op_b068_34_nf; +extern cpuop_func op_b068_34_ff; +extern cpuop_func op_b070_34_nf; +extern cpuop_func op_b070_34_ff; +extern cpuop_func op_b078_34_nf; +extern cpuop_func op_b078_34_ff; +extern cpuop_func op_b079_34_nf; +extern cpuop_func op_b079_34_ff; +extern cpuop_func op_b07a_34_nf; +extern cpuop_func op_b07a_34_ff; +extern cpuop_func op_b07b_34_nf; +extern cpuop_func op_b07b_34_ff; +extern cpuop_func op_b07c_34_nf; +extern cpuop_func op_b07c_34_ff; +extern cpuop_func op_b080_34_nf; +extern cpuop_func op_b080_34_ff; +extern cpuop_func op_b088_34_nf; +extern cpuop_func op_b088_34_ff; +extern cpuop_func op_b090_34_nf; +extern cpuop_func op_b090_34_ff; +extern cpuop_func op_b098_34_nf; +extern cpuop_func op_b098_34_ff; +extern cpuop_func op_b0a0_34_nf; +extern cpuop_func op_b0a0_34_ff; +extern cpuop_func op_b0a8_34_nf; +extern cpuop_func op_b0a8_34_ff; +extern cpuop_func op_b0b0_34_nf; +extern cpuop_func op_b0b0_34_ff; +extern cpuop_func op_b0b8_34_nf; +extern cpuop_func op_b0b8_34_ff; +extern cpuop_func op_b0b9_34_nf; +extern cpuop_func op_b0b9_34_ff; +extern cpuop_func op_b0ba_34_nf; +extern cpuop_func op_b0ba_34_ff; +extern cpuop_func op_b0bb_34_nf; +extern cpuop_func op_b0bb_34_ff; +extern cpuop_func op_b0bc_34_nf; +extern cpuop_func op_b0bc_34_ff; +extern cpuop_func op_b0c0_34_nf; +extern cpuop_func op_b0c0_34_ff; +extern cpuop_func op_b0c8_34_nf; +extern cpuop_func op_b0c8_34_ff; +extern cpuop_func op_b0d0_34_nf; +extern cpuop_func op_b0d0_34_ff; +extern cpuop_func op_b0d8_34_nf; +extern cpuop_func op_b0d8_34_ff; +extern cpuop_func op_b0e0_34_nf; +extern cpuop_func op_b0e0_34_ff; +extern cpuop_func op_b0e8_34_nf; +extern cpuop_func op_b0e8_34_ff; +extern cpuop_func op_b0f0_34_nf; +extern cpuop_func op_b0f0_34_ff; +extern cpuop_func op_b0f8_34_nf; +extern cpuop_func op_b0f8_34_ff; +extern cpuop_func op_b0f9_34_nf; +extern cpuop_func op_b0f9_34_ff; +extern cpuop_func op_b0fa_34_nf; +extern cpuop_func op_b0fa_34_ff; +extern cpuop_func op_b0fb_34_nf; +extern cpuop_func op_b0fb_34_ff; +extern cpuop_func op_b0fc_34_nf; +extern cpuop_func op_b0fc_34_ff; +extern cpuop_func op_b100_34_nf; +extern cpuop_func op_b100_34_ff; +extern cpuop_func op_b108_34_nf; +extern cpuop_func op_b108_34_ff; +extern cpuop_func op_b110_34_nf; +extern cpuop_func op_b110_34_ff; +extern cpuop_func op_b118_34_nf; +extern cpuop_func op_b118_34_ff; +extern cpuop_func op_b120_34_nf; +extern cpuop_func op_b120_34_ff; +extern cpuop_func op_b128_34_nf; +extern cpuop_func op_b128_34_ff; +extern cpuop_func op_b130_34_nf; +extern cpuop_func op_b130_34_ff; +extern cpuop_func op_b138_34_nf; +extern cpuop_func op_b138_34_ff; +extern cpuop_func op_b139_34_nf; +extern cpuop_func op_b139_34_ff; +extern cpuop_func op_b140_34_nf; +extern cpuop_func op_b140_34_ff; +extern cpuop_func op_b148_34_nf; +extern cpuop_func op_b148_34_ff; +extern cpuop_func op_b150_34_nf; +extern cpuop_func op_b150_34_ff; +extern cpuop_func op_b158_34_nf; +extern cpuop_func op_b158_34_ff; +extern cpuop_func op_b160_34_nf; +extern cpuop_func op_b160_34_ff; +extern cpuop_func op_b168_34_nf; +extern cpuop_func op_b168_34_ff; +extern cpuop_func op_b170_34_nf; +extern cpuop_func op_b170_34_ff; +extern cpuop_func op_b178_34_nf; +extern cpuop_func op_b178_34_ff; +extern cpuop_func op_b179_34_nf; +extern cpuop_func op_b179_34_ff; +extern cpuop_func op_b180_34_nf; +extern cpuop_func op_b180_34_ff; +extern cpuop_func op_b188_34_nf; +extern cpuop_func op_b188_34_ff; +extern cpuop_func op_b190_34_nf; +extern cpuop_func op_b190_34_ff; +extern cpuop_func op_b198_34_nf; +extern cpuop_func op_b198_34_ff; +extern cpuop_func op_b1a0_34_nf; +extern cpuop_func op_b1a0_34_ff; +extern cpuop_func op_b1a8_34_nf; +extern cpuop_func op_b1a8_34_ff; +extern cpuop_func op_b1b0_34_nf; +extern cpuop_func op_b1b0_34_ff; +extern cpuop_func op_b1b8_34_nf; +extern cpuop_func op_b1b8_34_ff; +extern cpuop_func op_b1b9_34_nf; +extern cpuop_func op_b1b9_34_ff; +extern cpuop_func op_b1c0_34_nf; +extern cpuop_func op_b1c0_34_ff; +extern cpuop_func op_b1c8_34_nf; +extern cpuop_func op_b1c8_34_ff; +extern cpuop_func op_b1d0_34_nf; +extern cpuop_func op_b1d0_34_ff; +extern cpuop_func op_b1d8_34_nf; +extern cpuop_func op_b1d8_34_ff; +extern cpuop_func op_b1e0_34_nf; +extern cpuop_func op_b1e0_34_ff; +extern cpuop_func op_b1e8_34_nf; +extern cpuop_func op_b1e8_34_ff; +extern cpuop_func op_b1f0_34_nf; +extern cpuop_func op_b1f0_34_ff; +extern cpuop_func op_b1f8_34_nf; +extern cpuop_func op_b1f8_34_ff; +extern cpuop_func op_b1f9_34_nf; +extern cpuop_func op_b1f9_34_ff; +extern cpuop_func op_b1fa_34_nf; +extern cpuop_func op_b1fa_34_ff; +extern cpuop_func op_b1fb_34_nf; +extern cpuop_func op_b1fb_34_ff; +extern cpuop_func op_b1fc_34_nf; +extern cpuop_func op_b1fc_34_ff; +extern cpuop_func op_c000_34_nf; +extern cpuop_func op_c000_34_ff; +extern cpuop_func op_c010_34_nf; +extern cpuop_func op_c010_34_ff; +extern cpuop_func op_c018_34_nf; +extern cpuop_func op_c018_34_ff; +extern cpuop_func op_c020_34_nf; +extern cpuop_func op_c020_34_ff; +extern cpuop_func op_c028_34_nf; +extern cpuop_func op_c028_34_ff; +extern cpuop_func op_c030_34_nf; +extern cpuop_func op_c030_34_ff; +extern cpuop_func op_c038_34_nf; +extern cpuop_func op_c038_34_ff; +extern cpuop_func op_c039_34_nf; +extern cpuop_func op_c039_34_ff; +extern cpuop_func op_c03a_34_nf; +extern cpuop_func op_c03a_34_ff; +extern cpuop_func op_c03b_34_nf; +extern cpuop_func op_c03b_34_ff; +extern cpuop_func op_c03c_34_nf; +extern cpuop_func op_c03c_34_ff; +extern cpuop_func op_c040_34_nf; +extern cpuop_func op_c040_34_ff; +extern cpuop_func op_c050_34_nf; +extern cpuop_func op_c050_34_ff; +extern cpuop_func op_c058_34_nf; +extern cpuop_func op_c058_34_ff; +extern cpuop_func op_c060_34_nf; +extern cpuop_func op_c060_34_ff; +extern cpuop_func op_c068_34_nf; +extern cpuop_func op_c068_34_ff; +extern cpuop_func op_c070_34_nf; +extern cpuop_func op_c070_34_ff; +extern cpuop_func op_c078_34_nf; +extern cpuop_func op_c078_34_ff; +extern cpuop_func op_c079_34_nf; +extern cpuop_func op_c079_34_ff; +extern cpuop_func op_c07a_34_nf; +extern cpuop_func op_c07a_34_ff; +extern cpuop_func op_c07b_34_nf; +extern cpuop_func op_c07b_34_ff; +extern cpuop_func op_c07c_34_nf; +extern cpuop_func op_c07c_34_ff; +extern cpuop_func op_c080_34_nf; +extern cpuop_func op_c080_34_ff; +extern cpuop_func op_c090_34_nf; +extern cpuop_func op_c090_34_ff; +extern cpuop_func op_c098_34_nf; +extern cpuop_func op_c098_34_ff; +extern cpuop_func op_c0a0_34_nf; +extern cpuop_func op_c0a0_34_ff; +extern cpuop_func op_c0a8_34_nf; +extern cpuop_func op_c0a8_34_ff; +extern cpuop_func op_c0b0_34_nf; +extern cpuop_func op_c0b0_34_ff; +extern cpuop_func op_c0b8_34_nf; +extern cpuop_func op_c0b8_34_ff; +extern cpuop_func op_c0b9_34_nf; +extern cpuop_func op_c0b9_34_ff; +extern cpuop_func op_c0ba_34_nf; +extern cpuop_func op_c0ba_34_ff; +extern cpuop_func op_c0bb_34_nf; +extern cpuop_func op_c0bb_34_ff; +extern cpuop_func op_c0bc_34_nf; +extern cpuop_func op_c0bc_34_ff; +extern cpuop_func op_c0c0_34_nf; +extern cpuop_func op_c0c0_34_ff; +extern cpuop_func op_c0d0_34_nf; +extern cpuop_func op_c0d0_34_ff; +extern cpuop_func op_c0d8_34_nf; +extern cpuop_func op_c0d8_34_ff; +extern cpuop_func op_c0e0_34_nf; +extern cpuop_func op_c0e0_34_ff; +extern cpuop_func op_c0e8_34_nf; +extern cpuop_func op_c0e8_34_ff; +extern cpuop_func op_c0f0_34_nf; +extern cpuop_func op_c0f0_34_ff; +extern cpuop_func op_c0f8_34_nf; +extern cpuop_func op_c0f8_34_ff; +extern cpuop_func op_c0f9_34_nf; +extern cpuop_func op_c0f9_34_ff; +extern cpuop_func op_c0fa_34_nf; +extern cpuop_func op_c0fa_34_ff; +extern cpuop_func op_c0fb_34_nf; +extern cpuop_func op_c0fb_34_ff; +extern cpuop_func op_c0fc_34_nf; +extern cpuop_func op_c0fc_34_ff; +extern cpuop_func op_c100_34_nf; +extern cpuop_func op_c100_34_ff; +extern cpuop_func op_c108_34_nf; +extern cpuop_func op_c108_34_ff; +extern cpuop_func op_c110_34_nf; +extern cpuop_func op_c110_34_ff; +extern cpuop_func op_c118_34_nf; +extern cpuop_func op_c118_34_ff; +extern cpuop_func op_c120_34_nf; +extern cpuop_func op_c120_34_ff; +extern cpuop_func op_c128_34_nf; +extern cpuop_func op_c128_34_ff; +extern cpuop_func op_c130_34_nf; +extern cpuop_func op_c130_34_ff; +extern cpuop_func op_c138_34_nf; +extern cpuop_func op_c138_34_ff; +extern cpuop_func op_c139_34_nf; +extern cpuop_func op_c139_34_ff; +extern cpuop_func op_c140_34_nf; +extern cpuop_func op_c140_34_ff; +extern cpuop_func op_c148_34_nf; +extern cpuop_func op_c148_34_ff; +extern cpuop_func op_c150_34_nf; +extern cpuop_func op_c150_34_ff; +extern cpuop_func op_c158_34_nf; +extern cpuop_func op_c158_34_ff; +extern cpuop_func op_c160_34_nf; +extern cpuop_func op_c160_34_ff; +extern cpuop_func op_c168_34_nf; +extern cpuop_func op_c168_34_ff; +extern cpuop_func op_c170_34_nf; +extern cpuop_func op_c170_34_ff; +extern cpuop_func op_c178_34_nf; +extern cpuop_func op_c178_34_ff; +extern cpuop_func op_c179_34_nf; +extern cpuop_func op_c179_34_ff; +extern cpuop_func op_c188_34_nf; +extern cpuop_func op_c188_34_ff; +extern cpuop_func op_c190_34_nf; +extern cpuop_func op_c190_34_ff; +extern cpuop_func op_c198_34_nf; +extern cpuop_func op_c198_34_ff; +extern cpuop_func op_c1a0_34_nf; +extern cpuop_func op_c1a0_34_ff; +extern cpuop_func op_c1a8_34_nf; +extern cpuop_func op_c1a8_34_ff; +extern cpuop_func op_c1b0_34_nf; +extern cpuop_func op_c1b0_34_ff; +extern cpuop_func op_c1b8_34_nf; +extern cpuop_func op_c1b8_34_ff; +extern cpuop_func op_c1b9_34_nf; +extern cpuop_func op_c1b9_34_ff; +extern cpuop_func op_c1c0_34_nf; +extern cpuop_func op_c1c0_34_ff; +extern cpuop_func op_c1d0_34_nf; +extern cpuop_func op_c1d0_34_ff; +extern cpuop_func op_c1d8_34_nf; +extern cpuop_func op_c1d8_34_ff; +extern cpuop_func op_c1e0_34_nf; +extern cpuop_func op_c1e0_34_ff; +extern cpuop_func op_c1e8_34_nf; +extern cpuop_func op_c1e8_34_ff; +extern cpuop_func op_c1f0_34_nf; +extern cpuop_func op_c1f0_34_ff; +extern cpuop_func op_c1f8_34_nf; +extern cpuop_func op_c1f8_34_ff; +extern cpuop_func op_c1f9_34_nf; +extern cpuop_func op_c1f9_34_ff; +extern cpuop_func op_c1fa_34_nf; +extern cpuop_func op_c1fa_34_ff; +extern cpuop_func op_c1fb_34_nf; +extern cpuop_func op_c1fb_34_ff; +extern cpuop_func op_c1fc_34_nf; +extern cpuop_func op_c1fc_34_ff; +extern cpuop_func op_d000_34_nf; +extern cpuop_func op_d000_34_ff; +extern cpuop_func op_d010_34_nf; +extern cpuop_func op_d010_34_ff; +extern cpuop_func op_d018_34_nf; +extern cpuop_func op_d018_34_ff; +extern cpuop_func op_d020_34_nf; +extern cpuop_func op_d020_34_ff; +extern cpuop_func op_d028_34_nf; +extern cpuop_func op_d028_34_ff; +extern cpuop_func op_d030_34_nf; +extern cpuop_func op_d030_34_ff; +extern cpuop_func op_d038_34_nf; +extern cpuop_func op_d038_34_ff; +extern cpuop_func op_d039_34_nf; +extern cpuop_func op_d039_34_ff; +extern cpuop_func op_d03a_34_nf; +extern cpuop_func op_d03a_34_ff; +extern cpuop_func op_d03b_34_nf; +extern cpuop_func op_d03b_34_ff; +extern cpuop_func op_d03c_34_nf; +extern cpuop_func op_d03c_34_ff; +extern cpuop_func op_d040_34_nf; +extern cpuop_func op_d040_34_ff; +extern cpuop_func op_d048_34_nf; +extern cpuop_func op_d048_34_ff; +extern cpuop_func op_d050_34_nf; +extern cpuop_func op_d050_34_ff; +extern cpuop_func op_d058_34_nf; +extern cpuop_func op_d058_34_ff; +extern cpuop_func op_d060_34_nf; +extern cpuop_func op_d060_34_ff; +extern cpuop_func op_d068_34_nf; +extern cpuop_func op_d068_34_ff; +extern cpuop_func op_d070_34_nf; +extern cpuop_func op_d070_34_ff; +extern cpuop_func op_d078_34_nf; +extern cpuop_func op_d078_34_ff; +extern cpuop_func op_d079_34_nf; +extern cpuop_func op_d079_34_ff; +extern cpuop_func op_d07a_34_nf; +extern cpuop_func op_d07a_34_ff; +extern cpuop_func op_d07b_34_nf; +extern cpuop_func op_d07b_34_ff; +extern cpuop_func op_d07c_34_nf; +extern cpuop_func op_d07c_34_ff; +extern cpuop_func op_d080_34_nf; +extern cpuop_func op_d080_34_ff; +extern cpuop_func op_d088_34_nf; +extern cpuop_func op_d088_34_ff; +extern cpuop_func op_d090_34_nf; +extern cpuop_func op_d090_34_ff; +extern cpuop_func op_d098_34_nf; +extern cpuop_func op_d098_34_ff; +extern cpuop_func op_d0a0_34_nf; +extern cpuop_func op_d0a0_34_ff; +extern cpuop_func op_d0a8_34_nf; +extern cpuop_func op_d0a8_34_ff; +extern cpuop_func op_d0b0_34_nf; +extern cpuop_func op_d0b0_34_ff; +extern cpuop_func op_d0b8_34_nf; +extern cpuop_func op_d0b8_34_ff; +extern cpuop_func op_d0b9_34_nf; +extern cpuop_func op_d0b9_34_ff; +extern cpuop_func op_d0ba_34_nf; +extern cpuop_func op_d0ba_34_ff; +extern cpuop_func op_d0bb_34_nf; +extern cpuop_func op_d0bb_34_ff; +extern cpuop_func op_d0bc_34_nf; +extern cpuop_func op_d0bc_34_ff; +extern cpuop_func op_d0c0_34_nf; +extern cpuop_func op_d0c0_34_ff; +extern cpuop_func op_d0c8_34_nf; +extern cpuop_func op_d0c8_34_ff; +extern cpuop_func op_d0d0_34_nf; +extern cpuop_func op_d0d0_34_ff; +extern cpuop_func op_d0d8_34_nf; +extern cpuop_func op_d0d8_34_ff; +extern cpuop_func op_d0e0_34_nf; +extern cpuop_func op_d0e0_34_ff; +extern cpuop_func op_d0e8_34_nf; +extern cpuop_func op_d0e8_34_ff; +extern cpuop_func op_d0f0_34_nf; +extern cpuop_func op_d0f0_34_ff; +extern cpuop_func op_d0f8_34_nf; +extern cpuop_func op_d0f8_34_ff; +extern cpuop_func op_d0f9_34_nf; +extern cpuop_func op_d0f9_34_ff; +extern cpuop_func op_d0fa_34_nf; +extern cpuop_func op_d0fa_34_ff; +extern cpuop_func op_d0fb_34_nf; +extern cpuop_func op_d0fb_34_ff; +extern cpuop_func op_d0fc_34_nf; +extern cpuop_func op_d0fc_34_ff; +extern cpuop_func op_d100_34_nf; +extern cpuop_func op_d100_34_ff; +extern cpuop_func op_d108_34_nf; +extern cpuop_func op_d108_34_ff; +extern cpuop_func op_d110_34_nf; +extern cpuop_func op_d110_34_ff; +extern cpuop_func op_d118_34_nf; +extern cpuop_func op_d118_34_ff; +extern cpuop_func op_d120_34_nf; +extern cpuop_func op_d120_34_ff; +extern cpuop_func op_d128_34_nf; +extern cpuop_func op_d128_34_ff; +extern cpuop_func op_d130_34_nf; +extern cpuop_func op_d130_34_ff; +extern cpuop_func op_d138_34_nf; +extern cpuop_func op_d138_34_ff; +extern cpuop_func op_d139_34_nf; +extern cpuop_func op_d139_34_ff; +extern cpuop_func op_d140_34_nf; +extern cpuop_func op_d140_34_ff; +extern cpuop_func op_d148_34_nf; +extern cpuop_func op_d148_34_ff; +extern cpuop_func op_d150_34_nf; +extern cpuop_func op_d150_34_ff; +extern cpuop_func op_d158_34_nf; +extern cpuop_func op_d158_34_ff; +extern cpuop_func op_d160_34_nf; +extern cpuop_func op_d160_34_ff; +extern cpuop_func op_d168_34_nf; +extern cpuop_func op_d168_34_ff; +extern cpuop_func op_d170_34_nf; +extern cpuop_func op_d170_34_ff; +extern cpuop_func op_d178_34_nf; +extern cpuop_func op_d178_34_ff; +extern cpuop_func op_d179_34_nf; +extern cpuop_func op_d179_34_ff; +extern cpuop_func op_d180_34_nf; +extern cpuop_func op_d180_34_ff; +extern cpuop_func op_d188_34_nf; +extern cpuop_func op_d188_34_ff; +extern cpuop_func op_d190_34_nf; +extern cpuop_func op_d190_34_ff; +extern cpuop_func op_d198_34_nf; +extern cpuop_func op_d198_34_ff; +extern cpuop_func op_d1a0_34_nf; +extern cpuop_func op_d1a0_34_ff; +extern cpuop_func op_d1a8_34_nf; +extern cpuop_func op_d1a8_34_ff; +extern cpuop_func op_d1b0_34_nf; +extern cpuop_func op_d1b0_34_ff; +extern cpuop_func op_d1b8_34_nf; +extern cpuop_func op_d1b8_34_ff; +extern cpuop_func op_d1b9_34_nf; +extern cpuop_func op_d1b9_34_ff; +extern cpuop_func op_d1c0_34_nf; +extern cpuop_func op_d1c0_34_ff; +extern cpuop_func op_d1c8_34_nf; +extern cpuop_func op_d1c8_34_ff; +extern cpuop_func op_d1d0_34_nf; +extern cpuop_func op_d1d0_34_ff; +extern cpuop_func op_d1d8_34_nf; +extern cpuop_func op_d1d8_34_ff; +extern cpuop_func op_d1e0_34_nf; +extern cpuop_func op_d1e0_34_ff; +extern cpuop_func op_d1e8_34_nf; +extern cpuop_func op_d1e8_34_ff; +extern cpuop_func op_d1f0_34_nf; +extern cpuop_func op_d1f0_34_ff; +extern cpuop_func op_d1f8_34_nf; +extern cpuop_func op_d1f8_34_ff; +extern cpuop_func op_d1f9_34_nf; +extern cpuop_func op_d1f9_34_ff; +extern cpuop_func op_d1fa_34_nf; +extern cpuop_func op_d1fa_34_ff; +extern cpuop_func op_d1fb_34_nf; +extern cpuop_func op_d1fb_34_ff; +extern cpuop_func op_d1fc_34_nf; +extern cpuop_func op_d1fc_34_ff; +extern cpuop_func op_e000_34_nf; +extern cpuop_func op_e000_34_ff; +extern cpuop_func op_e008_34_nf; +extern cpuop_func op_e008_34_ff; +extern cpuop_func op_e010_34_nf; +extern cpuop_func op_e010_34_ff; +extern cpuop_func op_e018_34_nf; +extern cpuop_func op_e018_34_ff; +extern cpuop_func op_e020_34_nf; +extern cpuop_func op_e020_34_ff; +extern cpuop_func op_e028_34_nf; +extern cpuop_func op_e028_34_ff; +extern cpuop_func op_e030_34_nf; +extern cpuop_func op_e030_34_ff; +extern cpuop_func op_e038_34_nf; +extern cpuop_func op_e038_34_ff; +extern cpuop_func op_e040_34_nf; +extern cpuop_func op_e040_34_ff; +extern cpuop_func op_e048_34_nf; +extern cpuop_func op_e048_34_ff; +extern cpuop_func op_e050_34_nf; +extern cpuop_func op_e050_34_ff; +extern cpuop_func op_e058_34_nf; +extern cpuop_func op_e058_34_ff; +extern cpuop_func op_e060_34_nf; +extern cpuop_func op_e060_34_ff; +extern cpuop_func op_e068_34_nf; +extern cpuop_func op_e068_34_ff; +extern cpuop_func op_e070_34_nf; +extern cpuop_func op_e070_34_ff; +extern cpuop_func op_e078_34_nf; +extern cpuop_func op_e078_34_ff; +extern cpuop_func op_e080_34_nf; +extern cpuop_func op_e080_34_ff; +extern cpuop_func op_e088_34_nf; +extern cpuop_func op_e088_34_ff; +extern cpuop_func op_e090_34_nf; +extern cpuop_func op_e090_34_ff; +extern cpuop_func op_e098_34_nf; +extern cpuop_func op_e098_34_ff; +extern cpuop_func op_e0a0_34_nf; +extern cpuop_func op_e0a0_34_ff; +extern cpuop_func op_e0a8_34_nf; +extern cpuop_func op_e0a8_34_ff; +extern cpuop_func op_e0b0_34_nf; +extern cpuop_func op_e0b0_34_ff; +extern cpuop_func op_e0b8_34_nf; +extern cpuop_func op_e0b8_34_ff; +extern cpuop_func op_e0d0_34_nf; +extern cpuop_func op_e0d0_34_ff; +extern cpuop_func op_e0d8_34_nf; +extern cpuop_func op_e0d8_34_ff; +extern cpuop_func op_e0e0_34_nf; +extern cpuop_func op_e0e0_34_ff; +extern cpuop_func op_e0e8_34_nf; +extern cpuop_func op_e0e8_34_ff; +extern cpuop_func op_e0f0_34_nf; +extern cpuop_func op_e0f0_34_ff; +extern cpuop_func op_e0f8_34_nf; +extern cpuop_func op_e0f8_34_ff; +extern cpuop_func op_e0f9_34_nf; +extern cpuop_func op_e0f9_34_ff; +extern cpuop_func op_e100_34_nf; +extern cpuop_func op_e100_34_ff; +extern cpuop_func op_e108_34_nf; +extern cpuop_func op_e108_34_ff; +extern cpuop_func op_e110_34_nf; +extern cpuop_func op_e110_34_ff; +extern cpuop_func op_e118_34_nf; +extern cpuop_func op_e118_34_ff; +extern cpuop_func op_e120_34_nf; +extern cpuop_func op_e120_34_ff; +extern cpuop_func op_e128_34_nf; +extern cpuop_func op_e128_34_ff; +extern cpuop_func op_e130_34_nf; +extern cpuop_func op_e130_34_ff; +extern cpuop_func op_e138_34_nf; +extern cpuop_func op_e138_34_ff; +extern cpuop_func op_e140_34_nf; +extern cpuop_func op_e140_34_ff; +extern cpuop_func op_e148_34_nf; +extern cpuop_func op_e148_34_ff; +extern cpuop_func op_e150_34_nf; +extern cpuop_func op_e150_34_ff; +extern cpuop_func op_e158_34_nf; +extern cpuop_func op_e158_34_ff; +extern cpuop_func op_e160_34_nf; +extern cpuop_func op_e160_34_ff; +extern cpuop_func op_e168_34_nf; +extern cpuop_func op_e168_34_ff; +extern cpuop_func op_e170_34_nf; +extern cpuop_func op_e170_34_ff; +extern cpuop_func op_e178_34_nf; +extern cpuop_func op_e178_34_ff; +extern cpuop_func op_e180_34_nf; +extern cpuop_func op_e180_34_ff; +extern cpuop_func op_e188_34_nf; +extern cpuop_func op_e188_34_ff; +extern cpuop_func op_e190_34_nf; +extern cpuop_func op_e190_34_ff; +extern cpuop_func op_e198_34_nf; +extern cpuop_func op_e198_34_ff; +extern cpuop_func op_e1a0_34_nf; +extern cpuop_func op_e1a0_34_ff; +extern cpuop_func op_e1a8_34_nf; +extern cpuop_func op_e1a8_34_ff; +extern cpuop_func op_e1b0_34_nf; +extern cpuop_func op_e1b0_34_ff; +extern cpuop_func op_e1b8_34_nf; +extern cpuop_func op_e1b8_34_ff; +extern cpuop_func op_e1d0_34_nf; +extern cpuop_func op_e1d0_34_ff; +extern cpuop_func op_e1d8_34_nf; +extern cpuop_func op_e1d8_34_ff; +extern cpuop_func op_e1e0_34_nf; +extern cpuop_func op_e1e0_34_ff; +extern cpuop_func op_e1e8_34_nf; +extern cpuop_func op_e1e8_34_ff; +extern cpuop_func op_e1f0_34_nf; +extern cpuop_func op_e1f0_34_ff; +extern cpuop_func op_e1f8_34_nf; +extern cpuop_func op_e1f8_34_ff; +extern cpuop_func op_e1f9_34_nf; +extern cpuop_func op_e1f9_34_ff; +extern cpuop_func op_e2d0_34_nf; +extern cpuop_func op_e2d0_34_ff; +extern cpuop_func op_e2d8_34_nf; +extern cpuop_func op_e2d8_34_ff; +extern cpuop_func op_e2e0_34_nf; +extern cpuop_func op_e2e0_34_ff; +extern cpuop_func op_e2e8_34_nf; +extern cpuop_func op_e2e8_34_ff; +extern cpuop_func op_e2f0_34_nf; +extern cpuop_func op_e2f0_34_ff; +extern cpuop_func op_e2f8_34_nf; +extern cpuop_func op_e2f8_34_ff; +extern cpuop_func op_e2f9_34_nf; +extern cpuop_func op_e2f9_34_ff; +extern cpuop_func op_e3d0_34_nf; +extern cpuop_func op_e3d0_34_ff; +extern cpuop_func op_e3d8_34_nf; +extern cpuop_func op_e3d8_34_ff; +extern cpuop_func op_e3e0_34_nf; +extern cpuop_func op_e3e0_34_ff; +extern cpuop_func op_e3e8_34_nf; +extern cpuop_func op_e3e8_34_ff; +extern cpuop_func op_e3f0_34_nf; +extern cpuop_func op_e3f0_34_ff; +extern cpuop_func op_e3f8_34_nf; +extern cpuop_func op_e3f8_34_ff; +extern cpuop_func op_e3f9_34_nf; +extern cpuop_func op_e3f9_34_ff; +extern cpuop_func op_e4d0_34_nf; +extern cpuop_func op_e4d0_34_ff; +extern cpuop_func op_e4d8_34_nf; +extern cpuop_func op_e4d8_34_ff; +extern cpuop_func op_e4e0_34_nf; +extern cpuop_func op_e4e0_34_ff; +extern cpuop_func op_e4e8_34_nf; +extern cpuop_func op_e4e8_34_ff; +extern cpuop_func op_e4f0_34_nf; +extern cpuop_func op_e4f0_34_ff; +extern cpuop_func op_e4f8_34_nf; +extern cpuop_func op_e4f8_34_ff; +extern cpuop_func op_e4f9_34_nf; +extern cpuop_func op_e4f9_34_ff; +extern cpuop_func op_e5d0_34_nf; +extern cpuop_func op_e5d0_34_ff; +extern cpuop_func op_e5d8_34_nf; +extern cpuop_func op_e5d8_34_ff; +extern cpuop_func op_e5e0_34_nf; +extern cpuop_func op_e5e0_34_ff; +extern cpuop_func op_e5e8_34_nf; +extern cpuop_func op_e5e8_34_ff; +extern cpuop_func op_e5f0_34_nf; +extern cpuop_func op_e5f0_34_ff; +extern cpuop_func op_e5f8_34_nf; +extern cpuop_func op_e5f8_34_ff; +extern cpuop_func op_e5f9_34_nf; +extern cpuop_func op_e5f9_34_ff; +extern cpuop_func op_e6d0_34_nf; +extern cpuop_func op_e6d0_34_ff; +extern cpuop_func op_e6d8_34_nf; +extern cpuop_func op_e6d8_34_ff; +extern cpuop_func op_e6e0_34_nf; +extern cpuop_func op_e6e0_34_ff; +extern cpuop_func op_e6e8_34_nf; +extern cpuop_func op_e6e8_34_ff; +extern cpuop_func op_e6f0_34_nf; +extern cpuop_func op_e6f0_34_ff; +extern cpuop_func op_e6f8_34_nf; +extern cpuop_func op_e6f8_34_ff; +extern cpuop_func op_e6f9_34_nf; +extern cpuop_func op_e6f9_34_ff; +extern cpuop_func op_e7d0_34_nf; +extern cpuop_func op_e7d0_34_ff; +extern cpuop_func op_e7d8_34_nf; +extern cpuop_func op_e7d8_34_ff; +extern cpuop_func op_e7e0_34_nf; +extern cpuop_func op_e7e0_34_ff; +extern cpuop_func op_e7e8_34_nf; +extern cpuop_func op_e7e8_34_ff; +extern cpuop_func op_e7f0_34_nf; +extern cpuop_func op_e7f0_34_ff; +extern cpuop_func op_e7f8_34_nf; +extern cpuop_func op_e7f8_34_ff; +extern cpuop_func op_e7f9_34_nf; +extern cpuop_func op_e7f9_34_ff; +extern cpuop_func op_e8c0_34_nf; +extern cpuop_func op_e8c0_34_ff; +extern cpuop_func op_e8d0_34_nf; +extern cpuop_func op_e8d0_34_ff; +extern cpuop_func op_e8e8_34_nf; +extern cpuop_func op_e8e8_34_ff; +extern cpuop_func op_e8f0_34_nf; +extern cpuop_func op_e8f0_34_ff; +extern cpuop_func op_e8f8_34_nf; +extern cpuop_func op_e8f8_34_ff; +extern cpuop_func op_e8f9_34_nf; +extern cpuop_func op_e8f9_34_ff; +extern cpuop_func op_e8fa_34_nf; +extern cpuop_func op_e8fa_34_ff; +extern cpuop_func op_e8fb_34_nf; +extern cpuop_func op_e8fb_34_ff; +extern cpuop_func op_e9c0_34_nf; +extern cpuop_func op_e9c0_34_ff; +extern cpuop_func op_e9d0_34_nf; +extern cpuop_func op_e9d0_34_ff; +extern cpuop_func op_e9e8_34_nf; +extern cpuop_func op_e9e8_34_ff; +extern cpuop_func op_e9f0_34_nf; +extern cpuop_func op_e9f0_34_ff; +extern cpuop_func op_e9f8_34_nf; +extern cpuop_func op_e9f8_34_ff; +extern cpuop_func op_e9f9_34_nf; +extern cpuop_func op_e9f9_34_ff; +extern cpuop_func op_e9fa_34_nf; +extern cpuop_func op_e9fa_34_ff; +extern cpuop_func op_e9fb_34_nf; +extern cpuop_func op_e9fb_34_ff; +extern cpuop_func op_eac0_34_nf; +extern cpuop_func op_eac0_34_ff; +extern cpuop_func op_ead0_34_nf; +extern cpuop_func op_ead0_34_ff; +extern cpuop_func op_eae8_34_nf; +extern cpuop_func op_eae8_34_ff; +extern cpuop_func op_eaf0_34_nf; +extern cpuop_func op_eaf0_34_ff; +extern cpuop_func op_eaf8_34_nf; +extern cpuop_func op_eaf8_34_ff; +extern cpuop_func op_eaf9_34_nf; +extern cpuop_func op_eaf9_34_ff; +extern cpuop_func op_ebc0_34_nf; +extern cpuop_func op_ebc0_34_ff; +extern cpuop_func op_ebd0_34_nf; +extern cpuop_func op_ebd0_34_ff; +extern cpuop_func op_ebe8_34_nf; +extern cpuop_func op_ebe8_34_ff; +extern cpuop_func op_ebf0_34_nf; +extern cpuop_func op_ebf0_34_ff; +extern cpuop_func op_ebf8_34_nf; +extern cpuop_func op_ebf8_34_ff; +extern cpuop_func op_ebf9_34_nf; +extern cpuop_func op_ebf9_34_ff; +extern cpuop_func op_ebfa_34_nf; +extern cpuop_func op_ebfa_34_ff; +extern cpuop_func op_ebfb_34_nf; +extern cpuop_func op_ebfb_34_ff; +extern cpuop_func op_ecc0_34_nf; +extern cpuop_func op_ecc0_34_ff; +extern cpuop_func op_ecd0_34_nf; +extern cpuop_func op_ecd0_34_ff; +extern cpuop_func op_ece8_34_nf; +extern cpuop_func op_ece8_34_ff; +extern cpuop_func op_ecf0_34_nf; +extern cpuop_func op_ecf0_34_ff; +extern cpuop_func op_ecf8_34_nf; +extern cpuop_func op_ecf8_34_ff; +extern cpuop_func op_ecf9_34_nf; +extern cpuop_func op_ecf9_34_ff; +extern cpuop_func op_edc0_34_nf; +extern cpuop_func op_edc0_34_ff; +extern cpuop_func op_edd0_34_nf; +extern cpuop_func op_edd0_34_ff; +extern cpuop_func op_ede8_34_nf; +extern cpuop_func op_ede8_34_ff; +extern cpuop_func op_edf0_34_nf; +extern cpuop_func op_edf0_34_ff; +extern cpuop_func op_edf8_34_nf; +extern cpuop_func op_edf8_34_ff; +extern cpuop_func op_edf9_34_nf; +extern cpuop_func op_edf9_34_ff; +extern cpuop_func op_edfa_34_nf; +extern cpuop_func op_edfa_34_ff; +extern cpuop_func op_edfb_34_nf; +extern cpuop_func op_edfb_34_ff; +extern cpuop_func op_eec0_34_nf; +extern cpuop_func op_eec0_34_ff; +extern cpuop_func op_eed0_34_nf; +extern cpuop_func op_eed0_34_ff; +extern cpuop_func op_eee8_34_nf; +extern cpuop_func op_eee8_34_ff; +extern cpuop_func op_eef0_34_nf; +extern cpuop_func op_eef0_34_ff; +extern cpuop_func op_eef8_34_nf; +extern cpuop_func op_eef8_34_ff; +extern cpuop_func op_eef9_34_nf; +extern cpuop_func op_eef9_34_ff; +extern cpuop_func op_efc0_34_nf; +extern cpuop_func op_efc0_34_ff; +extern cpuop_func op_efd0_34_nf; +extern cpuop_func op_efd0_34_ff; +extern cpuop_func op_efe8_34_nf; +extern cpuop_func op_efe8_34_ff; +extern cpuop_func op_eff0_34_nf; +extern cpuop_func op_eff0_34_ff; +extern cpuop_func op_eff8_34_nf; +extern cpuop_func op_eff8_34_ff; +extern cpuop_func op_eff9_34_nf; +extern cpuop_func op_eff9_34_ff; +extern cpuop_func op_f000_34_nf; +extern cpuop_func op_f000_34_ff; +extern cpuop_func op_f008_34_nf; +extern cpuop_func op_f008_34_ff; +extern cpuop_func op_f010_34_nf; +extern cpuop_func op_f010_34_ff; +extern cpuop_func op_f018_34_nf; +extern cpuop_func op_f018_34_ff; +extern cpuop_func op_f020_34_nf; +extern cpuop_func op_f020_34_ff; +extern cpuop_func op_f028_34_nf; +extern cpuop_func op_f028_34_ff; +extern cpuop_func op_f030_34_nf; +extern cpuop_func op_f030_34_ff; +extern cpuop_func op_f038_34_nf; +extern cpuop_func op_f038_34_ff; +extern cpuop_func op_f039_34_nf; +extern cpuop_func op_f039_34_ff; +extern cpuop_func op_f200_34_nf; +extern cpuop_func op_f200_34_ff; +extern cpuop_func op_f208_34_nf; +extern cpuop_func op_f208_34_ff; +extern cpuop_func op_f210_34_nf; +extern cpuop_func op_f210_34_ff; +extern cpuop_func op_f218_34_nf; +extern cpuop_func op_f218_34_ff; +extern cpuop_func op_f220_34_nf; +extern cpuop_func op_f220_34_ff; +extern cpuop_func op_f228_34_nf; +extern cpuop_func op_f228_34_ff; +extern cpuop_func op_f230_34_nf; +extern cpuop_func op_f230_34_ff; +extern cpuop_func op_f238_34_nf; +extern cpuop_func op_f238_34_ff; +extern cpuop_func op_f239_34_nf; +extern cpuop_func op_f239_34_ff; +extern cpuop_func op_f23a_34_nf; +extern cpuop_func op_f23a_34_ff; +extern cpuop_func op_f23b_34_nf; +extern cpuop_func op_f23b_34_ff; +extern cpuop_func op_f23c_34_nf; +extern cpuop_func op_f23c_34_ff; +extern cpuop_func op_f240_34_nf; +extern cpuop_func op_f240_34_ff; +extern cpuop_func op_f248_34_nf; +extern cpuop_func op_f248_34_ff; +extern cpuop_func op_f250_34_nf; +extern cpuop_func op_f250_34_ff; +extern cpuop_func op_f258_34_nf; +extern cpuop_func op_f258_34_ff; +extern cpuop_func op_f260_34_nf; +extern cpuop_func op_f260_34_ff; +extern cpuop_func op_f268_34_nf; +extern cpuop_func op_f268_34_ff; +extern cpuop_func op_f270_34_nf; +extern cpuop_func op_f270_34_ff; +extern cpuop_func op_f278_34_nf; +extern cpuop_func op_f278_34_ff; +extern cpuop_func op_f279_34_nf; +extern cpuop_func op_f279_34_ff; +extern cpuop_func op_f27a_34_nf; +extern cpuop_func op_f27a_34_ff; +extern cpuop_func op_f27b_34_nf; +extern cpuop_func op_f27b_34_ff; +extern cpuop_func op_f27c_34_nf; +extern cpuop_func op_f27c_34_ff; +extern cpuop_func op_f280_34_nf; +extern cpuop_func op_f280_34_ff; +extern cpuop_func op_f2c0_34_nf; +extern cpuop_func op_f2c0_34_ff; +extern cpuop_func op_f310_34_nf; +extern cpuop_func op_f310_34_ff; +extern cpuop_func op_f320_34_nf; +extern cpuop_func op_f320_34_ff; +extern cpuop_func op_f328_34_nf; +extern cpuop_func op_f328_34_ff; +extern cpuop_func op_f330_34_nf; +extern cpuop_func op_f330_34_ff; +extern cpuop_func op_f338_34_nf; +extern cpuop_func op_f338_34_ff; +extern cpuop_func op_f339_34_nf; +extern cpuop_func op_f339_34_ff; +extern cpuop_func op_f350_34_nf; +extern cpuop_func op_f350_34_ff; +extern cpuop_func op_f358_34_nf; +extern cpuop_func op_f358_34_ff; +extern cpuop_func op_f368_34_nf; +extern cpuop_func op_f368_34_ff; +extern cpuop_func op_f370_34_nf; +extern cpuop_func op_f370_34_ff; +extern cpuop_func op_f378_34_nf; +extern cpuop_func op_f378_34_ff; +extern cpuop_func op_f379_34_nf; +extern cpuop_func op_f379_34_ff; +extern cpuop_func op_f37a_34_nf; +extern cpuop_func op_f37a_34_ff; +extern cpuop_func op_f37b_34_nf; +extern cpuop_func op_f37b_34_ff; +extern cpuop_func_noret op_0000_35_nf; +extern cpuop_func_noret op_0000_35_ff; +extern cpuop_func_noret op_0010_35_nf; +extern cpuop_func_noret op_0010_35_ff; +extern cpuop_func_noret op_0018_35_nf; +extern cpuop_func_noret op_0018_35_ff; +extern cpuop_func_noret op_0020_35_nf; +extern cpuop_func_noret op_0020_35_ff; +extern cpuop_func_noret op_0028_35_nf; +extern cpuop_func_noret op_0028_35_ff; +extern cpuop_func_noret op_0030_35_nf; +extern cpuop_func_noret op_0030_35_ff; +extern cpuop_func_noret op_0038_35_nf; +extern cpuop_func_noret op_0038_35_ff; +extern cpuop_func_noret op_0039_35_nf; +extern cpuop_func_noret op_0039_35_ff; +extern cpuop_func_noret op_003c_35_nf; +extern cpuop_func_noret op_003c_35_ff; +extern cpuop_func_noret op_0040_35_nf; +extern cpuop_func_noret op_0040_35_ff; +extern cpuop_func_noret op_0050_35_nf; +extern cpuop_func_noret op_0050_35_ff; +extern cpuop_func_noret op_0058_35_nf; +extern cpuop_func_noret op_0058_35_ff; +extern cpuop_func_noret op_0060_35_nf; +extern cpuop_func_noret op_0060_35_ff; +extern cpuop_func_noret op_0068_35_nf; +extern cpuop_func_noret op_0068_35_ff; +extern cpuop_func_noret op_0070_35_nf; +extern cpuop_func_noret op_0070_35_ff; +extern cpuop_func_noret op_0078_35_nf; +extern cpuop_func_noret op_0078_35_ff; +extern cpuop_func_noret op_0079_35_nf; +extern cpuop_func_noret op_0079_35_ff; +extern cpuop_func_noret op_007c_35_nf; +extern cpuop_func_noret op_007c_35_ff; +extern cpuop_func_noret op_0080_35_nf; +extern cpuop_func_noret op_0080_35_ff; +extern cpuop_func_noret op_0090_35_nf; +extern cpuop_func_noret op_0090_35_ff; +extern cpuop_func_noret op_0098_35_nf; +extern cpuop_func_noret op_0098_35_ff; +extern cpuop_func_noret op_00a0_35_nf; +extern cpuop_func_noret op_00a0_35_ff; +extern cpuop_func_noret op_00a8_35_nf; +extern cpuop_func_noret op_00a8_35_ff; +extern cpuop_func_noret op_00b0_35_nf; +extern cpuop_func_noret op_00b0_35_ff; +extern cpuop_func_noret op_00b8_35_nf; +extern cpuop_func_noret op_00b8_35_ff; +extern cpuop_func_noret op_00b9_35_nf; +extern cpuop_func_noret op_00b9_35_ff; +extern cpuop_func_noret op_00d0_35_nf; +extern cpuop_func_noret op_00d0_35_ff; +extern cpuop_func_noret op_00e8_35_nf; +extern cpuop_func_noret op_00e8_35_ff; +extern cpuop_func_noret op_00f0_35_nf; +extern cpuop_func_noret op_00f0_35_ff; +extern cpuop_func_noret op_00f8_35_nf; +extern cpuop_func_noret op_00f8_35_ff; +extern cpuop_func_noret op_00f9_35_nf; +extern cpuop_func_noret op_00f9_35_ff; +extern cpuop_func_noret op_00fa_35_nf; +extern cpuop_func_noret op_00fa_35_ff; +extern cpuop_func_noret op_00fb_35_nf; +extern cpuop_func_noret op_00fb_35_ff; +extern cpuop_func_noret op_0100_35_nf; +extern cpuop_func_noret op_0100_35_ff; +extern cpuop_func_noret op_0108_35_nf; +extern cpuop_func_noret op_0108_35_ff; +extern cpuop_func_noret op_0110_35_nf; +extern cpuop_func_noret op_0110_35_ff; +extern cpuop_func_noret op_0118_35_nf; +extern cpuop_func_noret op_0118_35_ff; +extern cpuop_func_noret op_0120_35_nf; +extern cpuop_func_noret op_0120_35_ff; +extern cpuop_func_noret op_0128_35_nf; +extern cpuop_func_noret op_0128_35_ff; +extern cpuop_func_noret op_0130_35_nf; +extern cpuop_func_noret op_0130_35_ff; +extern cpuop_func_noret op_0138_35_nf; +extern cpuop_func_noret op_0138_35_ff; +extern cpuop_func_noret op_0139_35_nf; +extern cpuop_func_noret op_0139_35_ff; +extern cpuop_func_noret op_013a_35_nf; +extern cpuop_func_noret op_013a_35_ff; +extern cpuop_func_noret op_013b_35_nf; +extern cpuop_func_noret op_013b_35_ff; +extern cpuop_func_noret op_013c_35_nf; +extern cpuop_func_noret op_013c_35_ff; +extern cpuop_func_noret op_0140_35_nf; +extern cpuop_func_noret op_0140_35_ff; +extern cpuop_func_noret op_0148_35_nf; +extern cpuop_func_noret op_0148_35_ff; +extern cpuop_func_noret op_0150_35_nf; +extern cpuop_func_noret op_0150_35_ff; +extern cpuop_func_noret op_0158_35_nf; +extern cpuop_func_noret op_0158_35_ff; +extern cpuop_func_noret op_0160_35_nf; +extern cpuop_func_noret op_0160_35_ff; +extern cpuop_func_noret op_0168_35_nf; +extern cpuop_func_noret op_0168_35_ff; +extern cpuop_func_noret op_0170_35_nf; +extern cpuop_func_noret op_0170_35_ff; +extern cpuop_func_noret op_0178_35_nf; +extern cpuop_func_noret op_0178_35_ff; +extern cpuop_func_noret op_0179_35_nf; +extern cpuop_func_noret op_0179_35_ff; +extern cpuop_func_noret op_0180_35_nf; +extern cpuop_func_noret op_0180_35_ff; +extern cpuop_func_noret op_0188_35_nf; +extern cpuop_func_noret op_0188_35_ff; +extern cpuop_func_noret op_0190_35_nf; +extern cpuop_func_noret op_0190_35_ff; +extern cpuop_func_noret op_0198_35_nf; +extern cpuop_func_noret op_0198_35_ff; +extern cpuop_func_noret op_01a0_35_nf; +extern cpuop_func_noret op_01a0_35_ff; +extern cpuop_func_noret op_01a8_35_nf; +extern cpuop_func_noret op_01a8_35_ff; +extern cpuop_func_noret op_01b0_35_nf; +extern cpuop_func_noret op_01b0_35_ff; +extern cpuop_func_noret op_01b8_35_nf; +extern cpuop_func_noret op_01b8_35_ff; +extern cpuop_func_noret op_01b9_35_nf; +extern cpuop_func_noret op_01b9_35_ff; +extern cpuop_func_noret op_01c0_35_nf; +extern cpuop_func_noret op_01c0_35_ff; +extern cpuop_func_noret op_01c8_35_nf; +extern cpuop_func_noret op_01c8_35_ff; +extern cpuop_func_noret op_01d0_35_nf; +extern cpuop_func_noret op_01d0_35_ff; +extern cpuop_func_noret op_01d8_35_nf; +extern cpuop_func_noret op_01d8_35_ff; +extern cpuop_func_noret op_01e0_35_nf; +extern cpuop_func_noret op_01e0_35_ff; +extern cpuop_func_noret op_01e8_35_nf; +extern cpuop_func_noret op_01e8_35_ff; +extern cpuop_func_noret op_01f0_35_nf; +extern cpuop_func_noret op_01f0_35_ff; +extern cpuop_func_noret op_01f8_35_nf; +extern cpuop_func_noret op_01f8_35_ff; +extern cpuop_func_noret op_01f9_35_nf; +extern cpuop_func_noret op_01f9_35_ff; +extern cpuop_func_noret op_0200_35_nf; +extern cpuop_func_noret op_0200_35_ff; +extern cpuop_func_noret op_0210_35_nf; +extern cpuop_func_noret op_0210_35_ff; +extern cpuop_func_noret op_0218_35_nf; +extern cpuop_func_noret op_0218_35_ff; +extern cpuop_func_noret op_0220_35_nf; +extern cpuop_func_noret op_0220_35_ff; +extern cpuop_func_noret op_0228_35_nf; +extern cpuop_func_noret op_0228_35_ff; +extern cpuop_func_noret op_0230_35_nf; +extern cpuop_func_noret op_0230_35_ff; +extern cpuop_func_noret op_0238_35_nf; +extern cpuop_func_noret op_0238_35_ff; +extern cpuop_func_noret op_0239_35_nf; +extern cpuop_func_noret op_0239_35_ff; +extern cpuop_func_noret op_023c_35_nf; +extern cpuop_func_noret op_023c_35_ff; +extern cpuop_func_noret op_0240_35_nf; +extern cpuop_func_noret op_0240_35_ff; +extern cpuop_func_noret op_0250_35_nf; +extern cpuop_func_noret op_0250_35_ff; +extern cpuop_func_noret op_0258_35_nf; +extern cpuop_func_noret op_0258_35_ff; +extern cpuop_func_noret op_0260_35_nf; +extern cpuop_func_noret op_0260_35_ff; +extern cpuop_func_noret op_0268_35_nf; +extern cpuop_func_noret op_0268_35_ff; +extern cpuop_func_noret op_0270_35_nf; +extern cpuop_func_noret op_0270_35_ff; +extern cpuop_func_noret op_0278_35_nf; +extern cpuop_func_noret op_0278_35_ff; +extern cpuop_func_noret op_0279_35_nf; +extern cpuop_func_noret op_0279_35_ff; +extern cpuop_func_noret op_027c_35_nf; +extern cpuop_func_noret op_027c_35_ff; +extern cpuop_func_noret op_0280_35_nf; +extern cpuop_func_noret op_0280_35_ff; +extern cpuop_func_noret op_0290_35_nf; +extern cpuop_func_noret op_0290_35_ff; +extern cpuop_func_noret op_0298_35_nf; +extern cpuop_func_noret op_0298_35_ff; +extern cpuop_func_noret op_02a0_35_nf; +extern cpuop_func_noret op_02a0_35_ff; +extern cpuop_func_noret op_02a8_35_nf; +extern cpuop_func_noret op_02a8_35_ff; +extern cpuop_func_noret op_02b0_35_nf; +extern cpuop_func_noret op_02b0_35_ff; +extern cpuop_func_noret op_02b8_35_nf; +extern cpuop_func_noret op_02b8_35_ff; +extern cpuop_func_noret op_02b9_35_nf; +extern cpuop_func_noret op_02b9_35_ff; +extern cpuop_func_noret op_02d0_35_nf; +extern cpuop_func_noret op_02d0_35_ff; +extern cpuop_func_noret op_02e8_35_nf; +extern cpuop_func_noret op_02e8_35_ff; +extern cpuop_func_noret op_02f0_35_nf; +extern cpuop_func_noret op_02f0_35_ff; +extern cpuop_func_noret op_02f8_35_nf; +extern cpuop_func_noret op_02f8_35_ff; +extern cpuop_func_noret op_02f9_35_nf; +extern cpuop_func_noret op_02f9_35_ff; +extern cpuop_func_noret op_02fa_35_nf; +extern cpuop_func_noret op_02fa_35_ff; +extern cpuop_func_noret op_02fb_35_nf; +extern cpuop_func_noret op_02fb_35_ff; +extern cpuop_func_noret op_0400_35_nf; +extern cpuop_func_noret op_0400_35_ff; +extern cpuop_func_noret op_0410_35_nf; +extern cpuop_func_noret op_0410_35_ff; +extern cpuop_func_noret op_0418_35_nf; +extern cpuop_func_noret op_0418_35_ff; +extern cpuop_func_noret op_0420_35_nf; +extern cpuop_func_noret op_0420_35_ff; +extern cpuop_func_noret op_0428_35_nf; +extern cpuop_func_noret op_0428_35_ff; +extern cpuop_func_noret op_0430_35_nf; +extern cpuop_func_noret op_0430_35_ff; +extern cpuop_func_noret op_0438_35_nf; +extern cpuop_func_noret op_0438_35_ff; +extern cpuop_func_noret op_0439_35_nf; +extern cpuop_func_noret op_0439_35_ff; +extern cpuop_func_noret op_0440_35_nf; +extern cpuop_func_noret op_0440_35_ff; +extern cpuop_func_noret op_0450_35_nf; +extern cpuop_func_noret op_0450_35_ff; +extern cpuop_func_noret op_0458_35_nf; +extern cpuop_func_noret op_0458_35_ff; +extern cpuop_func_noret op_0460_35_nf; +extern cpuop_func_noret op_0460_35_ff; +extern cpuop_func_noret op_0468_35_nf; +extern cpuop_func_noret op_0468_35_ff; +extern cpuop_func_noret op_0470_35_nf; +extern cpuop_func_noret op_0470_35_ff; +extern cpuop_func_noret op_0478_35_nf; +extern cpuop_func_noret op_0478_35_ff; +extern cpuop_func_noret op_0479_35_nf; +extern cpuop_func_noret op_0479_35_ff; +extern cpuop_func_noret op_0480_35_nf; +extern cpuop_func_noret op_0480_35_ff; +extern cpuop_func_noret op_0490_35_nf; +extern cpuop_func_noret op_0490_35_ff; +extern cpuop_func_noret op_0498_35_nf; +extern cpuop_func_noret op_0498_35_ff; +extern cpuop_func_noret op_04a0_35_nf; +extern cpuop_func_noret op_04a0_35_ff; +extern cpuop_func_noret op_04a8_35_nf; +extern cpuop_func_noret op_04a8_35_ff; +extern cpuop_func_noret op_04b0_35_nf; +extern cpuop_func_noret op_04b0_35_ff; +extern cpuop_func_noret op_04b8_35_nf; +extern cpuop_func_noret op_04b8_35_ff; +extern cpuop_func_noret op_04b9_35_nf; +extern cpuop_func_noret op_04b9_35_ff; +extern cpuop_func_noret op_04d0_35_nf; +extern cpuop_func_noret op_04d0_35_ff; +extern cpuop_func_noret op_04e8_35_nf; +extern cpuop_func_noret op_04e8_35_ff; +extern cpuop_func_noret op_04f0_35_nf; +extern cpuop_func_noret op_04f0_35_ff; +extern cpuop_func_noret op_04f8_35_nf; +extern cpuop_func_noret op_04f8_35_ff; +extern cpuop_func_noret op_04f9_35_nf; +extern cpuop_func_noret op_04f9_35_ff; +extern cpuop_func_noret op_04fa_35_nf; +extern cpuop_func_noret op_04fa_35_ff; +extern cpuop_func_noret op_04fb_35_nf; +extern cpuop_func_noret op_04fb_35_ff; +extern cpuop_func_noret op_0600_35_nf; +extern cpuop_func_noret op_0600_35_ff; +extern cpuop_func_noret op_0610_35_nf; +extern cpuop_func_noret op_0610_35_ff; +extern cpuop_func_noret op_0618_35_nf; +extern cpuop_func_noret op_0618_35_ff; +extern cpuop_func_noret op_0620_35_nf; +extern cpuop_func_noret op_0620_35_ff; +extern cpuop_func_noret op_0628_35_nf; +extern cpuop_func_noret op_0628_35_ff; +extern cpuop_func_noret op_0630_35_nf; +extern cpuop_func_noret op_0630_35_ff; +extern cpuop_func_noret op_0638_35_nf; +extern cpuop_func_noret op_0638_35_ff; +extern cpuop_func_noret op_0639_35_nf; +extern cpuop_func_noret op_0639_35_ff; +extern cpuop_func_noret op_0640_35_nf; +extern cpuop_func_noret op_0640_35_ff; +extern cpuop_func_noret op_0650_35_nf; +extern cpuop_func_noret op_0650_35_ff; +extern cpuop_func_noret op_0658_35_nf; +extern cpuop_func_noret op_0658_35_ff; +extern cpuop_func_noret op_0660_35_nf; +extern cpuop_func_noret op_0660_35_ff; +extern cpuop_func_noret op_0668_35_nf; +extern cpuop_func_noret op_0668_35_ff; +extern cpuop_func_noret op_0670_35_nf; +extern cpuop_func_noret op_0670_35_ff; +extern cpuop_func_noret op_0678_35_nf; +extern cpuop_func_noret op_0678_35_ff; +extern cpuop_func_noret op_0679_35_nf; +extern cpuop_func_noret op_0679_35_ff; +extern cpuop_func_noret op_0680_35_nf; +extern cpuop_func_noret op_0680_35_ff; +extern cpuop_func_noret op_0690_35_nf; +extern cpuop_func_noret op_0690_35_ff; +extern cpuop_func_noret op_0698_35_nf; +extern cpuop_func_noret op_0698_35_ff; +extern cpuop_func_noret op_06a0_35_nf; +extern cpuop_func_noret op_06a0_35_ff; +extern cpuop_func_noret op_06a8_35_nf; +extern cpuop_func_noret op_06a8_35_ff; +extern cpuop_func_noret op_06b0_35_nf; +extern cpuop_func_noret op_06b0_35_ff; +extern cpuop_func_noret op_06b8_35_nf; +extern cpuop_func_noret op_06b8_35_ff; +extern cpuop_func_noret op_06b9_35_nf; +extern cpuop_func_noret op_06b9_35_ff; +extern cpuop_func_noret op_06c0_35_nf; +extern cpuop_func_noret op_06c0_35_ff; +extern cpuop_func_noret op_06c8_35_nf; +extern cpuop_func_noret op_06c8_35_ff; +extern cpuop_func_noret op_06d0_35_nf; +extern cpuop_func_noret op_06d0_35_ff; +extern cpuop_func_noret op_06e8_35_nf; +extern cpuop_func_noret op_06e8_35_ff; +extern cpuop_func_noret op_06f0_35_nf; +extern cpuop_func_noret op_06f0_35_ff; +extern cpuop_func_noret op_06f8_35_nf; +extern cpuop_func_noret op_06f8_35_ff; +extern cpuop_func_noret op_06f9_35_nf; +extern cpuop_func_noret op_06f9_35_ff; +extern cpuop_func_noret op_06fa_35_nf; +extern cpuop_func_noret op_06fa_35_ff; +extern cpuop_func_noret op_06fb_35_nf; +extern cpuop_func_noret op_06fb_35_ff; +extern cpuop_func_noret op_0800_35_nf; +extern cpuop_func_noret op_0800_35_ff; +extern cpuop_func_noret op_0810_35_nf; +extern cpuop_func_noret op_0810_35_ff; +extern cpuop_func_noret op_0818_35_nf; +extern cpuop_func_noret op_0818_35_ff; +extern cpuop_func_noret op_0820_35_nf; +extern cpuop_func_noret op_0820_35_ff; +extern cpuop_func_noret op_0828_35_nf; +extern cpuop_func_noret op_0828_35_ff; +extern cpuop_func_noret op_0830_35_nf; +extern cpuop_func_noret op_0830_35_ff; +extern cpuop_func_noret op_0838_35_nf; +extern cpuop_func_noret op_0838_35_ff; +extern cpuop_func_noret op_0839_35_nf; +extern cpuop_func_noret op_0839_35_ff; +extern cpuop_func_noret op_083a_35_nf; +extern cpuop_func_noret op_083a_35_ff; +extern cpuop_func_noret op_083b_35_nf; +extern cpuop_func_noret op_083b_35_ff; +extern cpuop_func_noret op_0840_35_nf; +extern cpuop_func_noret op_0840_35_ff; +extern cpuop_func_noret op_0850_35_nf; +extern cpuop_func_noret op_0850_35_ff; +extern cpuop_func_noret op_0858_35_nf; +extern cpuop_func_noret op_0858_35_ff; +extern cpuop_func_noret op_0860_35_nf; +extern cpuop_func_noret op_0860_35_ff; +extern cpuop_func_noret op_0868_35_nf; +extern cpuop_func_noret op_0868_35_ff; +extern cpuop_func_noret op_0870_35_nf; +extern cpuop_func_noret op_0870_35_ff; +extern cpuop_func_noret op_0878_35_nf; +extern cpuop_func_noret op_0878_35_ff; +extern cpuop_func_noret op_0879_35_nf; +extern cpuop_func_noret op_0879_35_ff; +extern cpuop_func_noret op_0880_35_nf; +extern cpuop_func_noret op_0880_35_ff; +extern cpuop_func_noret op_0890_35_nf; +extern cpuop_func_noret op_0890_35_ff; +extern cpuop_func_noret op_0898_35_nf; +extern cpuop_func_noret op_0898_35_ff; +extern cpuop_func_noret op_08a0_35_nf; +extern cpuop_func_noret op_08a0_35_ff; +extern cpuop_func_noret op_08a8_35_nf; +extern cpuop_func_noret op_08a8_35_ff; +extern cpuop_func_noret op_08b0_35_nf; +extern cpuop_func_noret op_08b0_35_ff; +extern cpuop_func_noret op_08b8_35_nf; +extern cpuop_func_noret op_08b8_35_ff; +extern cpuop_func_noret op_08b9_35_nf; +extern cpuop_func_noret op_08b9_35_ff; +extern cpuop_func_noret op_08c0_35_nf; +extern cpuop_func_noret op_08c0_35_ff; +extern cpuop_func_noret op_08d0_35_nf; +extern cpuop_func_noret op_08d0_35_ff; +extern cpuop_func_noret op_08d8_35_nf; +extern cpuop_func_noret op_08d8_35_ff; +extern cpuop_func_noret op_08e0_35_nf; +extern cpuop_func_noret op_08e0_35_ff; +extern cpuop_func_noret op_08e8_35_nf; +extern cpuop_func_noret op_08e8_35_ff; +extern cpuop_func_noret op_08f0_35_nf; +extern cpuop_func_noret op_08f0_35_ff; +extern cpuop_func_noret op_08f8_35_nf; +extern cpuop_func_noret op_08f8_35_ff; +extern cpuop_func_noret op_08f9_35_nf; +extern cpuop_func_noret op_08f9_35_ff; +extern cpuop_func_noret op_0a00_35_nf; +extern cpuop_func_noret op_0a00_35_ff; +extern cpuop_func_noret op_0a10_35_nf; +extern cpuop_func_noret op_0a10_35_ff; +extern cpuop_func_noret op_0a18_35_nf; +extern cpuop_func_noret op_0a18_35_ff; +extern cpuop_func_noret op_0a20_35_nf; +extern cpuop_func_noret op_0a20_35_ff; +extern cpuop_func_noret op_0a28_35_nf; +extern cpuop_func_noret op_0a28_35_ff; +extern cpuop_func_noret op_0a30_35_nf; +extern cpuop_func_noret op_0a30_35_ff; +extern cpuop_func_noret op_0a38_35_nf; +extern cpuop_func_noret op_0a38_35_ff; +extern cpuop_func_noret op_0a39_35_nf; +extern cpuop_func_noret op_0a39_35_ff; +extern cpuop_func_noret op_0a3c_35_nf; +extern cpuop_func_noret op_0a3c_35_ff; +extern cpuop_func_noret op_0a40_35_nf; +extern cpuop_func_noret op_0a40_35_ff; +extern cpuop_func_noret op_0a50_35_nf; +extern cpuop_func_noret op_0a50_35_ff; +extern cpuop_func_noret op_0a58_35_nf; +extern cpuop_func_noret op_0a58_35_ff; +extern cpuop_func_noret op_0a60_35_nf; +extern cpuop_func_noret op_0a60_35_ff; +extern cpuop_func_noret op_0a68_35_nf; +extern cpuop_func_noret op_0a68_35_ff; +extern cpuop_func_noret op_0a70_35_nf; +extern cpuop_func_noret op_0a70_35_ff; +extern cpuop_func_noret op_0a78_35_nf; +extern cpuop_func_noret op_0a78_35_ff; +extern cpuop_func_noret op_0a79_35_nf; +extern cpuop_func_noret op_0a79_35_ff; +extern cpuop_func_noret op_0a7c_35_nf; +extern cpuop_func_noret op_0a7c_35_ff; +extern cpuop_func_noret op_0a80_35_nf; +extern cpuop_func_noret op_0a80_35_ff; +extern cpuop_func_noret op_0a90_35_nf; +extern cpuop_func_noret op_0a90_35_ff; +extern cpuop_func_noret op_0a98_35_nf; +extern cpuop_func_noret op_0a98_35_ff; +extern cpuop_func_noret op_0aa0_35_nf; +extern cpuop_func_noret op_0aa0_35_ff; +extern cpuop_func_noret op_0aa8_35_nf; +extern cpuop_func_noret op_0aa8_35_ff; +extern cpuop_func_noret op_0ab0_35_nf; +extern cpuop_func_noret op_0ab0_35_ff; +extern cpuop_func_noret op_0ab8_35_nf; +extern cpuop_func_noret op_0ab8_35_ff; +extern cpuop_func_noret op_0ab9_35_nf; +extern cpuop_func_noret op_0ab9_35_ff; +extern cpuop_func_noret op_0ad0_35_nf; +extern cpuop_func_noret op_0ad0_35_ff; +extern cpuop_func_noret op_0ad8_35_nf; +extern cpuop_func_noret op_0ad8_35_ff; +extern cpuop_func_noret op_0ae0_35_nf; +extern cpuop_func_noret op_0ae0_35_ff; +extern cpuop_func_noret op_0ae8_35_nf; +extern cpuop_func_noret op_0ae8_35_ff; +extern cpuop_func_noret op_0af0_35_nf; +extern cpuop_func_noret op_0af0_35_ff; +extern cpuop_func_noret op_0af8_35_nf; +extern cpuop_func_noret op_0af8_35_ff; +extern cpuop_func_noret op_0af9_35_nf; +extern cpuop_func_noret op_0af9_35_ff; +extern cpuop_func_noret op_0c00_35_nf; +extern cpuop_func_noret op_0c00_35_ff; +extern cpuop_func_noret op_0c10_35_nf; +extern cpuop_func_noret op_0c10_35_ff; +extern cpuop_func_noret op_0c18_35_nf; +extern cpuop_func_noret op_0c18_35_ff; +extern cpuop_func_noret op_0c20_35_nf; +extern cpuop_func_noret op_0c20_35_ff; +extern cpuop_func_noret op_0c28_35_nf; +extern cpuop_func_noret op_0c28_35_ff; +extern cpuop_func_noret op_0c30_35_nf; +extern cpuop_func_noret op_0c30_35_ff; +extern cpuop_func_noret op_0c38_35_nf; +extern cpuop_func_noret op_0c38_35_ff; +extern cpuop_func_noret op_0c39_35_nf; +extern cpuop_func_noret op_0c39_35_ff; +extern cpuop_func_noret op_0c3a_35_nf; +extern cpuop_func_noret op_0c3a_35_ff; +extern cpuop_func_noret op_0c3b_35_nf; +extern cpuop_func_noret op_0c3b_35_ff; +extern cpuop_func_noret op_0c40_35_nf; +extern cpuop_func_noret op_0c40_35_ff; +extern cpuop_func_noret op_0c50_35_nf; +extern cpuop_func_noret op_0c50_35_ff; +extern cpuop_func_noret op_0c58_35_nf; +extern cpuop_func_noret op_0c58_35_ff; +extern cpuop_func_noret op_0c60_35_nf; +extern cpuop_func_noret op_0c60_35_ff; +extern cpuop_func_noret op_0c68_35_nf; +extern cpuop_func_noret op_0c68_35_ff; +extern cpuop_func_noret op_0c70_35_nf; +extern cpuop_func_noret op_0c70_35_ff; +extern cpuop_func_noret op_0c78_35_nf; +extern cpuop_func_noret op_0c78_35_ff; +extern cpuop_func_noret op_0c79_35_nf; +extern cpuop_func_noret op_0c79_35_ff; +extern cpuop_func_noret op_0c7a_35_nf; +extern cpuop_func_noret op_0c7a_35_ff; +extern cpuop_func_noret op_0c7b_35_nf; +extern cpuop_func_noret op_0c7b_35_ff; +extern cpuop_func_noret op_0c80_35_nf; +extern cpuop_func_noret op_0c80_35_ff; +extern cpuop_func_noret op_0c90_35_nf; +extern cpuop_func_noret op_0c90_35_ff; +extern cpuop_func_noret op_0c98_35_nf; +extern cpuop_func_noret op_0c98_35_ff; +extern cpuop_func_noret op_0ca0_35_nf; +extern cpuop_func_noret op_0ca0_35_ff; +extern cpuop_func_noret op_0ca8_35_nf; +extern cpuop_func_noret op_0ca8_35_ff; +extern cpuop_func_noret op_0cb0_35_nf; +extern cpuop_func_noret op_0cb0_35_ff; +extern cpuop_func_noret op_0cb8_35_nf; +extern cpuop_func_noret op_0cb8_35_ff; +extern cpuop_func_noret op_0cb9_35_nf; +extern cpuop_func_noret op_0cb9_35_ff; +extern cpuop_func_noret op_0cba_35_nf; +extern cpuop_func_noret op_0cba_35_ff; +extern cpuop_func_noret op_0cbb_35_nf; +extern cpuop_func_noret op_0cbb_35_ff; +extern cpuop_func_noret op_0cd0_35_nf; +extern cpuop_func_noret op_0cd0_35_ff; +extern cpuop_func_noret op_0cd8_35_nf; +extern cpuop_func_noret op_0cd8_35_ff; +extern cpuop_func_noret op_0ce0_35_nf; +extern cpuop_func_noret op_0ce0_35_ff; +extern cpuop_func_noret op_0ce8_35_nf; +extern cpuop_func_noret op_0ce8_35_ff; +extern cpuop_func_noret op_0cf0_35_nf; +extern cpuop_func_noret op_0cf0_35_ff; +extern cpuop_func_noret op_0cf8_35_nf; +extern cpuop_func_noret op_0cf8_35_ff; +extern cpuop_func_noret op_0cf9_35_nf; +extern cpuop_func_noret op_0cf9_35_ff; +extern cpuop_func_noret op_0cfc_35_nf; +extern cpuop_func_noret op_0cfc_35_ff; +extern cpuop_func_noret op_0e10_35_nf; +extern cpuop_func_noret op_0e10_35_ff; +extern cpuop_func_noret op_0e18_35_nf; +extern cpuop_func_noret op_0e18_35_ff; +extern cpuop_func_noret op_0e20_35_nf; +extern cpuop_func_noret op_0e20_35_ff; +extern cpuop_func_noret op_0e28_35_nf; +extern cpuop_func_noret op_0e28_35_ff; +extern cpuop_func_noret op_0e30_35_nf; +extern cpuop_func_noret op_0e30_35_ff; +extern cpuop_func_noret op_0e38_35_nf; +extern cpuop_func_noret op_0e38_35_ff; +extern cpuop_func_noret op_0e39_35_nf; +extern cpuop_func_noret op_0e39_35_ff; +extern cpuop_func_noret op_0e50_35_nf; +extern cpuop_func_noret op_0e50_35_ff; +extern cpuop_func_noret op_0e58_35_nf; +extern cpuop_func_noret op_0e58_35_ff; +extern cpuop_func_noret op_0e60_35_nf; +extern cpuop_func_noret op_0e60_35_ff; +extern cpuop_func_noret op_0e68_35_nf; +extern cpuop_func_noret op_0e68_35_ff; +extern cpuop_func_noret op_0e70_35_nf; +extern cpuop_func_noret op_0e70_35_ff; +extern cpuop_func_noret op_0e78_35_nf; +extern cpuop_func_noret op_0e78_35_ff; +extern cpuop_func_noret op_0e79_35_nf; +extern cpuop_func_noret op_0e79_35_ff; +extern cpuop_func_noret op_0e90_35_nf; +extern cpuop_func_noret op_0e90_35_ff; +extern cpuop_func_noret op_0e98_35_nf; +extern cpuop_func_noret op_0e98_35_ff; +extern cpuop_func_noret op_0ea0_35_nf; +extern cpuop_func_noret op_0ea0_35_ff; +extern cpuop_func_noret op_0ea8_35_nf; +extern cpuop_func_noret op_0ea8_35_ff; +extern cpuop_func_noret op_0eb0_35_nf; +extern cpuop_func_noret op_0eb0_35_ff; +extern cpuop_func_noret op_0eb8_35_nf; +extern cpuop_func_noret op_0eb8_35_ff; +extern cpuop_func_noret op_0eb9_35_nf; +extern cpuop_func_noret op_0eb9_35_ff; +extern cpuop_func_noret op_0ed0_35_nf; +extern cpuop_func_noret op_0ed0_35_ff; +extern cpuop_func_noret op_0ed8_35_nf; +extern cpuop_func_noret op_0ed8_35_ff; +extern cpuop_func_noret op_0ee0_35_nf; +extern cpuop_func_noret op_0ee0_35_ff; +extern cpuop_func_noret op_0ee8_35_nf; +extern cpuop_func_noret op_0ee8_35_ff; +extern cpuop_func_noret op_0ef0_35_nf; +extern cpuop_func_noret op_0ef0_35_ff; +extern cpuop_func_noret op_0ef8_35_nf; +extern cpuop_func_noret op_0ef8_35_ff; +extern cpuop_func_noret op_0ef9_35_nf; +extern cpuop_func_noret op_0ef9_35_ff; +extern cpuop_func_noret op_0efc_35_nf; +extern cpuop_func_noret op_0efc_35_ff; +extern cpuop_func_noret op_1000_35_nf; +extern cpuop_func_noret op_1000_35_ff; +extern cpuop_func_noret op_1010_35_nf; +extern cpuop_func_noret op_1010_35_ff; +extern cpuop_func_noret op_1018_35_nf; +extern cpuop_func_noret op_1018_35_ff; +extern cpuop_func_noret op_1020_35_nf; +extern cpuop_func_noret op_1020_35_ff; +extern cpuop_func_noret op_1028_35_nf; +extern cpuop_func_noret op_1028_35_ff; +extern cpuop_func_noret op_1030_35_nf; +extern cpuop_func_noret op_1030_35_ff; +extern cpuop_func_noret op_1038_35_nf; +extern cpuop_func_noret op_1038_35_ff; +extern cpuop_func_noret op_1039_35_nf; +extern cpuop_func_noret op_1039_35_ff; +extern cpuop_func_noret op_103a_35_nf; +extern cpuop_func_noret op_103a_35_ff; +extern cpuop_func_noret op_103b_35_nf; +extern cpuop_func_noret op_103b_35_ff; +extern cpuop_func_noret op_103c_35_nf; +extern cpuop_func_noret op_103c_35_ff; +extern cpuop_func_noret op_1080_35_nf; +extern cpuop_func_noret op_1080_35_ff; +extern cpuop_func_noret op_1090_35_nf; +extern cpuop_func_noret op_1090_35_ff; +extern cpuop_func_noret op_1098_35_nf; +extern cpuop_func_noret op_1098_35_ff; +extern cpuop_func_noret op_10a0_35_nf; +extern cpuop_func_noret op_10a0_35_ff; +extern cpuop_func_noret op_10a8_35_nf; +extern cpuop_func_noret op_10a8_35_ff; +extern cpuop_func_noret op_10b0_35_nf; +extern cpuop_func_noret op_10b0_35_ff; +extern cpuop_func_noret op_10b8_35_nf; +extern cpuop_func_noret op_10b8_35_ff; +extern cpuop_func_noret op_10b9_35_nf; +extern cpuop_func_noret op_10b9_35_ff; +extern cpuop_func_noret op_10ba_35_nf; +extern cpuop_func_noret op_10ba_35_ff; +extern cpuop_func_noret op_10bb_35_nf; +extern cpuop_func_noret op_10bb_35_ff; +extern cpuop_func_noret op_10bc_35_nf; +extern cpuop_func_noret op_10bc_35_ff; +extern cpuop_func_noret op_10c0_35_nf; +extern cpuop_func_noret op_10c0_35_ff; +extern cpuop_func_noret op_10d0_35_nf; +extern cpuop_func_noret op_10d0_35_ff; +extern cpuop_func_noret op_10d8_35_nf; +extern cpuop_func_noret op_10d8_35_ff; +extern cpuop_func_noret op_10e0_35_nf; +extern cpuop_func_noret op_10e0_35_ff; +extern cpuop_func_noret op_10e8_35_nf; +extern cpuop_func_noret op_10e8_35_ff; +extern cpuop_func_noret op_10f0_35_nf; +extern cpuop_func_noret op_10f0_35_ff; +extern cpuop_func_noret op_10f8_35_nf; +extern cpuop_func_noret op_10f8_35_ff; +extern cpuop_func_noret op_10f9_35_nf; +extern cpuop_func_noret op_10f9_35_ff; +extern cpuop_func_noret op_10fa_35_nf; +extern cpuop_func_noret op_10fa_35_ff; +extern cpuop_func_noret op_10fb_35_nf; +extern cpuop_func_noret op_10fb_35_ff; +extern cpuop_func_noret op_10fc_35_nf; +extern cpuop_func_noret op_10fc_35_ff; +extern cpuop_func_noret op_1100_35_nf; +extern cpuop_func_noret op_1100_35_ff; +extern cpuop_func_noret op_1110_35_nf; +extern cpuop_func_noret op_1110_35_ff; +extern cpuop_func_noret op_1118_35_nf; +extern cpuop_func_noret op_1118_35_ff; +extern cpuop_func_noret op_1120_35_nf; +extern cpuop_func_noret op_1120_35_ff; +extern cpuop_func_noret op_1128_35_nf; +extern cpuop_func_noret op_1128_35_ff; +extern cpuop_func_noret op_1130_35_nf; +extern cpuop_func_noret op_1130_35_ff; +extern cpuop_func_noret op_1138_35_nf; +extern cpuop_func_noret op_1138_35_ff; +extern cpuop_func_noret op_1139_35_nf; +extern cpuop_func_noret op_1139_35_ff; +extern cpuop_func_noret op_113a_35_nf; +extern cpuop_func_noret op_113a_35_ff; +extern cpuop_func_noret op_113b_35_nf; +extern cpuop_func_noret op_113b_35_ff; +extern cpuop_func_noret op_113c_35_nf; +extern cpuop_func_noret op_113c_35_ff; +extern cpuop_func_noret op_1140_35_nf; +extern cpuop_func_noret op_1140_35_ff; +extern cpuop_func_noret op_1150_35_nf; +extern cpuop_func_noret op_1150_35_ff; +extern cpuop_func_noret op_1158_35_nf; +extern cpuop_func_noret op_1158_35_ff; +extern cpuop_func_noret op_1160_35_nf; +extern cpuop_func_noret op_1160_35_ff; +extern cpuop_func_noret op_1168_35_nf; +extern cpuop_func_noret op_1168_35_ff; +extern cpuop_func_noret op_1170_35_nf; +extern cpuop_func_noret op_1170_35_ff; +extern cpuop_func_noret op_1178_35_nf; +extern cpuop_func_noret op_1178_35_ff; +extern cpuop_func_noret op_1179_35_nf; +extern cpuop_func_noret op_1179_35_ff; +extern cpuop_func_noret op_117a_35_nf; +extern cpuop_func_noret op_117a_35_ff; +extern cpuop_func_noret op_117b_35_nf; +extern cpuop_func_noret op_117b_35_ff; +extern cpuop_func_noret op_117c_35_nf; +extern cpuop_func_noret op_117c_35_ff; +extern cpuop_func_noret op_1180_35_nf; +extern cpuop_func_noret op_1180_35_ff; +extern cpuop_func_noret op_1190_35_nf; +extern cpuop_func_noret op_1190_35_ff; +extern cpuop_func_noret op_1198_35_nf; +extern cpuop_func_noret op_1198_35_ff; +extern cpuop_func_noret op_11a0_35_nf; +extern cpuop_func_noret op_11a0_35_ff; +extern cpuop_func_noret op_11a8_35_nf; +extern cpuop_func_noret op_11a8_35_ff; +extern cpuop_func_noret op_11b0_35_nf; +extern cpuop_func_noret op_11b0_35_ff; +extern cpuop_func_noret op_11b8_35_nf; +extern cpuop_func_noret op_11b8_35_ff; +extern cpuop_func_noret op_11b9_35_nf; +extern cpuop_func_noret op_11b9_35_ff; +extern cpuop_func_noret op_11ba_35_nf; +extern cpuop_func_noret op_11ba_35_ff; +extern cpuop_func_noret op_11bb_35_nf; +extern cpuop_func_noret op_11bb_35_ff; +extern cpuop_func_noret op_11bc_35_nf; +extern cpuop_func_noret op_11bc_35_ff; +extern cpuop_func_noret op_11c0_35_nf; +extern cpuop_func_noret op_11c0_35_ff; +extern cpuop_func_noret op_11d0_35_nf; +extern cpuop_func_noret op_11d0_35_ff; +extern cpuop_func_noret op_11d8_35_nf; +extern cpuop_func_noret op_11d8_35_ff; +extern cpuop_func_noret op_11e0_35_nf; +extern cpuop_func_noret op_11e0_35_ff; +extern cpuop_func_noret op_11e8_35_nf; +extern cpuop_func_noret op_11e8_35_ff; +extern cpuop_func_noret op_11f0_35_nf; +extern cpuop_func_noret op_11f0_35_ff; +extern cpuop_func_noret op_11f8_35_nf; +extern cpuop_func_noret op_11f8_35_ff; +extern cpuop_func_noret op_11f9_35_nf; +extern cpuop_func_noret op_11f9_35_ff; +extern cpuop_func_noret op_11fa_35_nf; +extern cpuop_func_noret op_11fa_35_ff; +extern cpuop_func_noret op_11fb_35_nf; +extern cpuop_func_noret op_11fb_35_ff; +extern cpuop_func_noret op_11fc_35_nf; +extern cpuop_func_noret op_11fc_35_ff; +extern cpuop_func_noret op_13c0_35_nf; +extern cpuop_func_noret op_13c0_35_ff; +extern cpuop_func_noret op_13d0_35_nf; +extern cpuop_func_noret op_13d0_35_ff; +extern cpuop_func_noret op_13d8_35_nf; +extern cpuop_func_noret op_13d8_35_ff; +extern cpuop_func_noret op_13e0_35_nf; +extern cpuop_func_noret op_13e0_35_ff; +extern cpuop_func_noret op_13e8_35_nf; +extern cpuop_func_noret op_13e8_35_ff; +extern cpuop_func_noret op_13f0_35_nf; +extern cpuop_func_noret op_13f0_35_ff; +extern cpuop_func_noret op_13f8_35_nf; +extern cpuop_func_noret op_13f8_35_ff; +extern cpuop_func_noret op_13f9_35_nf; +extern cpuop_func_noret op_13f9_35_ff; +extern cpuop_func_noret op_13fa_35_nf; +extern cpuop_func_noret op_13fa_35_ff; +extern cpuop_func_noret op_13fb_35_nf; +extern cpuop_func_noret op_13fb_35_ff; +extern cpuop_func_noret op_13fc_35_nf; +extern cpuop_func_noret op_13fc_35_ff; +extern cpuop_func_noret op_2000_35_nf; +extern cpuop_func_noret op_2000_35_ff; +extern cpuop_func_noret op_2008_35_nf; +extern cpuop_func_noret op_2008_35_ff; +extern cpuop_func_noret op_2010_35_nf; +extern cpuop_func_noret op_2010_35_ff; +extern cpuop_func_noret op_2018_35_nf; +extern cpuop_func_noret op_2018_35_ff; +extern cpuop_func_noret op_2020_35_nf; +extern cpuop_func_noret op_2020_35_ff; +extern cpuop_func_noret op_2028_35_nf; +extern cpuop_func_noret op_2028_35_ff; +extern cpuop_func_noret op_2030_35_nf; +extern cpuop_func_noret op_2030_35_ff; +extern cpuop_func_noret op_2038_35_nf; +extern cpuop_func_noret op_2038_35_ff; +extern cpuop_func_noret op_2039_35_nf; +extern cpuop_func_noret op_2039_35_ff; +extern cpuop_func_noret op_203a_35_nf; +extern cpuop_func_noret op_203a_35_ff; +extern cpuop_func_noret op_203b_35_nf; +extern cpuop_func_noret op_203b_35_ff; +extern cpuop_func_noret op_203c_35_nf; +extern cpuop_func_noret op_203c_35_ff; +extern cpuop_func_noret op_2040_35_nf; +extern cpuop_func_noret op_2040_35_ff; +extern cpuop_func_noret op_2048_35_nf; +extern cpuop_func_noret op_2048_35_ff; +extern cpuop_func_noret op_2050_35_nf; +extern cpuop_func_noret op_2050_35_ff; +extern cpuop_func_noret op_2058_35_nf; +extern cpuop_func_noret op_2058_35_ff; +extern cpuop_func_noret op_2060_35_nf; +extern cpuop_func_noret op_2060_35_ff; +extern cpuop_func_noret op_2068_35_nf; +extern cpuop_func_noret op_2068_35_ff; +extern cpuop_func_noret op_2070_35_nf; +extern cpuop_func_noret op_2070_35_ff; +extern cpuop_func_noret op_2078_35_nf; +extern cpuop_func_noret op_2078_35_ff; +extern cpuop_func_noret op_2079_35_nf; +extern cpuop_func_noret op_2079_35_ff; +extern cpuop_func_noret op_207a_35_nf; +extern cpuop_func_noret op_207a_35_ff; +extern cpuop_func_noret op_207b_35_nf; +extern cpuop_func_noret op_207b_35_ff; +extern cpuop_func_noret op_207c_35_nf; +extern cpuop_func_noret op_207c_35_ff; +extern cpuop_func_noret op_2080_35_nf; +extern cpuop_func_noret op_2080_35_ff; +extern cpuop_func_noret op_2088_35_nf; +extern cpuop_func_noret op_2088_35_ff; +extern cpuop_func_noret op_2090_35_nf; +extern cpuop_func_noret op_2090_35_ff; +extern cpuop_func_noret op_2098_35_nf; +extern cpuop_func_noret op_2098_35_ff; +extern cpuop_func_noret op_20a0_35_nf; +extern cpuop_func_noret op_20a0_35_ff; +extern cpuop_func_noret op_20a8_35_nf; +extern cpuop_func_noret op_20a8_35_ff; +extern cpuop_func_noret op_20b0_35_nf; +extern cpuop_func_noret op_20b0_35_ff; +extern cpuop_func_noret op_20b8_35_nf; +extern cpuop_func_noret op_20b8_35_ff; +extern cpuop_func_noret op_20b9_35_nf; +extern cpuop_func_noret op_20b9_35_ff; +extern cpuop_func_noret op_20ba_35_nf; +extern cpuop_func_noret op_20ba_35_ff; +extern cpuop_func_noret op_20bb_35_nf; +extern cpuop_func_noret op_20bb_35_ff; +extern cpuop_func_noret op_20bc_35_nf; +extern cpuop_func_noret op_20bc_35_ff; +extern cpuop_func_noret op_20c0_35_nf; +extern cpuop_func_noret op_20c0_35_ff; +extern cpuop_func_noret op_20c8_35_nf; +extern cpuop_func_noret op_20c8_35_ff; +extern cpuop_func_noret op_20d0_35_nf; +extern cpuop_func_noret op_20d0_35_ff; +extern cpuop_func_noret op_20d8_35_nf; +extern cpuop_func_noret op_20d8_35_ff; +extern cpuop_func_noret op_20e0_35_nf; +extern cpuop_func_noret op_20e0_35_ff; +extern cpuop_func_noret op_20e8_35_nf; +extern cpuop_func_noret op_20e8_35_ff; +extern cpuop_func_noret op_20f0_35_nf; +extern cpuop_func_noret op_20f0_35_ff; +extern cpuop_func_noret op_20f8_35_nf; +extern cpuop_func_noret op_20f8_35_ff; +extern cpuop_func_noret op_20f9_35_nf; +extern cpuop_func_noret op_20f9_35_ff; +extern cpuop_func_noret op_20fa_35_nf; +extern cpuop_func_noret op_20fa_35_ff; +extern cpuop_func_noret op_20fb_35_nf; +extern cpuop_func_noret op_20fb_35_ff; +extern cpuop_func_noret op_20fc_35_nf; +extern cpuop_func_noret op_20fc_35_ff; +extern cpuop_func_noret op_2100_35_nf; +extern cpuop_func_noret op_2100_35_ff; +extern cpuop_func_noret op_2108_35_nf; +extern cpuop_func_noret op_2108_35_ff; +extern cpuop_func_noret op_2110_35_nf; +extern cpuop_func_noret op_2110_35_ff; +extern cpuop_func_noret op_2118_35_nf; +extern cpuop_func_noret op_2118_35_ff; +extern cpuop_func_noret op_2120_35_nf; +extern cpuop_func_noret op_2120_35_ff; +extern cpuop_func_noret op_2128_35_nf; +extern cpuop_func_noret op_2128_35_ff; +extern cpuop_func_noret op_2130_35_nf; +extern cpuop_func_noret op_2130_35_ff; +extern cpuop_func_noret op_2138_35_nf; +extern cpuop_func_noret op_2138_35_ff; +extern cpuop_func_noret op_2139_35_nf; +extern cpuop_func_noret op_2139_35_ff; +extern cpuop_func_noret op_213a_35_nf; +extern cpuop_func_noret op_213a_35_ff; +extern cpuop_func_noret op_213b_35_nf; +extern cpuop_func_noret op_213b_35_ff; +extern cpuop_func_noret op_213c_35_nf; +extern cpuop_func_noret op_213c_35_ff; +extern cpuop_func_noret op_2140_35_nf; +extern cpuop_func_noret op_2140_35_ff; +extern cpuop_func_noret op_2148_35_nf; +extern cpuop_func_noret op_2148_35_ff; +extern cpuop_func_noret op_2150_35_nf; +extern cpuop_func_noret op_2150_35_ff; +extern cpuop_func_noret op_2158_35_nf; +extern cpuop_func_noret op_2158_35_ff; +extern cpuop_func_noret op_2160_35_nf; +extern cpuop_func_noret op_2160_35_ff; +extern cpuop_func_noret op_2168_35_nf; +extern cpuop_func_noret op_2168_35_ff; +extern cpuop_func_noret op_2170_35_nf; +extern cpuop_func_noret op_2170_35_ff; +extern cpuop_func_noret op_2178_35_nf; +extern cpuop_func_noret op_2178_35_ff; +extern cpuop_func_noret op_2179_35_nf; +extern cpuop_func_noret op_2179_35_ff; +extern cpuop_func_noret op_217a_35_nf; +extern cpuop_func_noret op_217a_35_ff; +extern cpuop_func_noret op_217b_35_nf; +extern cpuop_func_noret op_217b_35_ff; +extern cpuop_func_noret op_217c_35_nf; +extern cpuop_func_noret op_217c_35_ff; +extern cpuop_func_noret op_2180_35_nf; +extern cpuop_func_noret op_2180_35_ff; +extern cpuop_func_noret op_2188_35_nf; +extern cpuop_func_noret op_2188_35_ff; +extern cpuop_func_noret op_2190_35_nf; +extern cpuop_func_noret op_2190_35_ff; +extern cpuop_func_noret op_2198_35_nf; +extern cpuop_func_noret op_2198_35_ff; +extern cpuop_func_noret op_21a0_35_nf; +extern cpuop_func_noret op_21a0_35_ff; +extern cpuop_func_noret op_21a8_35_nf; +extern cpuop_func_noret op_21a8_35_ff; +extern cpuop_func_noret op_21b0_35_nf; +extern cpuop_func_noret op_21b0_35_ff; +extern cpuop_func_noret op_21b8_35_nf; +extern cpuop_func_noret op_21b8_35_ff; +extern cpuop_func_noret op_21b9_35_nf; +extern cpuop_func_noret op_21b9_35_ff; +extern cpuop_func_noret op_21ba_35_nf; +extern cpuop_func_noret op_21ba_35_ff; +extern cpuop_func_noret op_21bb_35_nf; +extern cpuop_func_noret op_21bb_35_ff; +extern cpuop_func_noret op_21bc_35_nf; +extern cpuop_func_noret op_21bc_35_ff; +extern cpuop_func_noret op_21c0_35_nf; +extern cpuop_func_noret op_21c0_35_ff; +extern cpuop_func_noret op_21c8_35_nf; +extern cpuop_func_noret op_21c8_35_ff; +extern cpuop_func_noret op_21d0_35_nf; +extern cpuop_func_noret op_21d0_35_ff; +extern cpuop_func_noret op_21d8_35_nf; +extern cpuop_func_noret op_21d8_35_ff; +extern cpuop_func_noret op_21e0_35_nf; +extern cpuop_func_noret op_21e0_35_ff; +extern cpuop_func_noret op_21e8_35_nf; +extern cpuop_func_noret op_21e8_35_ff; +extern cpuop_func_noret op_21f0_35_nf; +extern cpuop_func_noret op_21f0_35_ff; +extern cpuop_func_noret op_21f8_35_nf; +extern cpuop_func_noret op_21f8_35_ff; +extern cpuop_func_noret op_21f9_35_nf; +extern cpuop_func_noret op_21f9_35_ff; +extern cpuop_func_noret op_21fa_35_nf; +extern cpuop_func_noret op_21fa_35_ff; +extern cpuop_func_noret op_21fb_35_nf; +extern cpuop_func_noret op_21fb_35_ff; +extern cpuop_func_noret op_21fc_35_nf; +extern cpuop_func_noret op_21fc_35_ff; +extern cpuop_func_noret op_23c0_35_nf; +extern cpuop_func_noret op_23c0_35_ff; +extern cpuop_func_noret op_23c8_35_nf; +extern cpuop_func_noret op_23c8_35_ff; +extern cpuop_func_noret op_23d0_35_nf; +extern cpuop_func_noret op_23d0_35_ff; +extern cpuop_func_noret op_23d8_35_nf; +extern cpuop_func_noret op_23d8_35_ff; +extern cpuop_func_noret op_23e0_35_nf; +extern cpuop_func_noret op_23e0_35_ff; +extern cpuop_func_noret op_23e8_35_nf; +extern cpuop_func_noret op_23e8_35_ff; +extern cpuop_func_noret op_23f0_35_nf; +extern cpuop_func_noret op_23f0_35_ff; +extern cpuop_func_noret op_23f8_35_nf; +extern cpuop_func_noret op_23f8_35_ff; +extern cpuop_func_noret op_23f9_35_nf; +extern cpuop_func_noret op_23f9_35_ff; +extern cpuop_func_noret op_23fa_35_nf; +extern cpuop_func_noret op_23fa_35_ff; +extern cpuop_func_noret op_23fb_35_nf; +extern cpuop_func_noret op_23fb_35_ff; +extern cpuop_func_noret op_23fc_35_nf; +extern cpuop_func_noret op_23fc_35_ff; +extern cpuop_func_noret op_3000_35_nf; +extern cpuop_func_noret op_3000_35_ff; +extern cpuop_func_noret op_3008_35_nf; +extern cpuop_func_noret op_3008_35_ff; +extern cpuop_func_noret op_3010_35_nf; +extern cpuop_func_noret op_3010_35_ff; +extern cpuop_func_noret op_3018_35_nf; +extern cpuop_func_noret op_3018_35_ff; +extern cpuop_func_noret op_3020_35_nf; +extern cpuop_func_noret op_3020_35_ff; +extern cpuop_func_noret op_3028_35_nf; +extern cpuop_func_noret op_3028_35_ff; +extern cpuop_func_noret op_3030_35_nf; +extern cpuop_func_noret op_3030_35_ff; +extern cpuop_func_noret op_3038_35_nf; +extern cpuop_func_noret op_3038_35_ff; +extern cpuop_func_noret op_3039_35_nf; +extern cpuop_func_noret op_3039_35_ff; +extern cpuop_func_noret op_303a_35_nf; +extern cpuop_func_noret op_303a_35_ff; +extern cpuop_func_noret op_303b_35_nf; +extern cpuop_func_noret op_303b_35_ff; +extern cpuop_func_noret op_303c_35_nf; +extern cpuop_func_noret op_303c_35_ff; +extern cpuop_func_noret op_3040_35_nf; +extern cpuop_func_noret op_3040_35_ff; +extern cpuop_func_noret op_3048_35_nf; +extern cpuop_func_noret op_3048_35_ff; +extern cpuop_func_noret op_3050_35_nf; +extern cpuop_func_noret op_3050_35_ff; +extern cpuop_func_noret op_3058_35_nf; +extern cpuop_func_noret op_3058_35_ff; +extern cpuop_func_noret op_3060_35_nf; +extern cpuop_func_noret op_3060_35_ff; +extern cpuop_func_noret op_3068_35_nf; +extern cpuop_func_noret op_3068_35_ff; +extern cpuop_func_noret op_3070_35_nf; +extern cpuop_func_noret op_3070_35_ff; +extern cpuop_func_noret op_3078_35_nf; +extern cpuop_func_noret op_3078_35_ff; +extern cpuop_func_noret op_3079_35_nf; +extern cpuop_func_noret op_3079_35_ff; +extern cpuop_func_noret op_307a_35_nf; +extern cpuop_func_noret op_307a_35_ff; +extern cpuop_func_noret op_307b_35_nf; +extern cpuop_func_noret op_307b_35_ff; +extern cpuop_func_noret op_307c_35_nf; +extern cpuop_func_noret op_307c_35_ff; +extern cpuop_func_noret op_3080_35_nf; +extern cpuop_func_noret op_3080_35_ff; +extern cpuop_func_noret op_3088_35_nf; +extern cpuop_func_noret op_3088_35_ff; +extern cpuop_func_noret op_3090_35_nf; +extern cpuop_func_noret op_3090_35_ff; +extern cpuop_func_noret op_3098_35_nf; +extern cpuop_func_noret op_3098_35_ff; +extern cpuop_func_noret op_30a0_35_nf; +extern cpuop_func_noret op_30a0_35_ff; +extern cpuop_func_noret op_30a8_35_nf; +extern cpuop_func_noret op_30a8_35_ff; +extern cpuop_func_noret op_30b0_35_nf; +extern cpuop_func_noret op_30b0_35_ff; +extern cpuop_func_noret op_30b8_35_nf; +extern cpuop_func_noret op_30b8_35_ff; +extern cpuop_func_noret op_30b9_35_nf; +extern cpuop_func_noret op_30b9_35_ff; +extern cpuop_func_noret op_30ba_35_nf; +extern cpuop_func_noret op_30ba_35_ff; +extern cpuop_func_noret op_30bb_35_nf; +extern cpuop_func_noret op_30bb_35_ff; +extern cpuop_func_noret op_30bc_35_nf; +extern cpuop_func_noret op_30bc_35_ff; +extern cpuop_func_noret op_30c0_35_nf; +extern cpuop_func_noret op_30c0_35_ff; +extern cpuop_func_noret op_30c8_35_nf; +extern cpuop_func_noret op_30c8_35_ff; +extern cpuop_func_noret op_30d0_35_nf; +extern cpuop_func_noret op_30d0_35_ff; +extern cpuop_func_noret op_30d8_35_nf; +extern cpuop_func_noret op_30d8_35_ff; +extern cpuop_func_noret op_30e0_35_nf; +extern cpuop_func_noret op_30e0_35_ff; +extern cpuop_func_noret op_30e8_35_nf; +extern cpuop_func_noret op_30e8_35_ff; +extern cpuop_func_noret op_30f0_35_nf; +extern cpuop_func_noret op_30f0_35_ff; +extern cpuop_func_noret op_30f8_35_nf; +extern cpuop_func_noret op_30f8_35_ff; +extern cpuop_func_noret op_30f9_35_nf; +extern cpuop_func_noret op_30f9_35_ff; +extern cpuop_func_noret op_30fa_35_nf; +extern cpuop_func_noret op_30fa_35_ff; +extern cpuop_func_noret op_30fb_35_nf; +extern cpuop_func_noret op_30fb_35_ff; +extern cpuop_func_noret op_30fc_35_nf; +extern cpuop_func_noret op_30fc_35_ff; +extern cpuop_func_noret op_3100_35_nf; +extern cpuop_func_noret op_3100_35_ff; +extern cpuop_func_noret op_3108_35_nf; +extern cpuop_func_noret op_3108_35_ff; +extern cpuop_func_noret op_3110_35_nf; +extern cpuop_func_noret op_3110_35_ff; +extern cpuop_func_noret op_3118_35_nf; +extern cpuop_func_noret op_3118_35_ff; +extern cpuop_func_noret op_3120_35_nf; +extern cpuop_func_noret op_3120_35_ff; +extern cpuop_func_noret op_3128_35_nf; +extern cpuop_func_noret op_3128_35_ff; +extern cpuop_func_noret op_3130_35_nf; +extern cpuop_func_noret op_3130_35_ff; +extern cpuop_func_noret op_3138_35_nf; +extern cpuop_func_noret op_3138_35_ff; +extern cpuop_func_noret op_3139_35_nf; +extern cpuop_func_noret op_3139_35_ff; +extern cpuop_func_noret op_313a_35_nf; +extern cpuop_func_noret op_313a_35_ff; +extern cpuop_func_noret op_313b_35_nf; +extern cpuop_func_noret op_313b_35_ff; +extern cpuop_func_noret op_313c_35_nf; +extern cpuop_func_noret op_313c_35_ff; +extern cpuop_func_noret op_3140_35_nf; +extern cpuop_func_noret op_3140_35_ff; +extern cpuop_func_noret op_3148_35_nf; +extern cpuop_func_noret op_3148_35_ff; +extern cpuop_func_noret op_3150_35_nf; +extern cpuop_func_noret op_3150_35_ff; +extern cpuop_func_noret op_3158_35_nf; +extern cpuop_func_noret op_3158_35_ff; +extern cpuop_func_noret op_3160_35_nf; +extern cpuop_func_noret op_3160_35_ff; +extern cpuop_func_noret op_3168_35_nf; +extern cpuop_func_noret op_3168_35_ff; +extern cpuop_func_noret op_3170_35_nf; +extern cpuop_func_noret op_3170_35_ff; +extern cpuop_func_noret op_3178_35_nf; +extern cpuop_func_noret op_3178_35_ff; +extern cpuop_func_noret op_3179_35_nf; +extern cpuop_func_noret op_3179_35_ff; +extern cpuop_func_noret op_317a_35_nf; +extern cpuop_func_noret op_317a_35_ff; +extern cpuop_func_noret op_317b_35_nf; +extern cpuop_func_noret op_317b_35_ff; +extern cpuop_func_noret op_317c_35_nf; +extern cpuop_func_noret op_317c_35_ff; +extern cpuop_func_noret op_3180_35_nf; +extern cpuop_func_noret op_3180_35_ff; +extern cpuop_func_noret op_3188_35_nf; +extern cpuop_func_noret op_3188_35_ff; +extern cpuop_func_noret op_3190_35_nf; +extern cpuop_func_noret op_3190_35_ff; +extern cpuop_func_noret op_3198_35_nf; +extern cpuop_func_noret op_3198_35_ff; +extern cpuop_func_noret op_31a0_35_nf; +extern cpuop_func_noret op_31a0_35_ff; +extern cpuop_func_noret op_31a8_35_nf; +extern cpuop_func_noret op_31a8_35_ff; +extern cpuop_func_noret op_31b0_35_nf; +extern cpuop_func_noret op_31b0_35_ff; +extern cpuop_func_noret op_31b8_35_nf; +extern cpuop_func_noret op_31b8_35_ff; +extern cpuop_func_noret op_31b9_35_nf; +extern cpuop_func_noret op_31b9_35_ff; +extern cpuop_func_noret op_31ba_35_nf; +extern cpuop_func_noret op_31ba_35_ff; +extern cpuop_func_noret op_31bb_35_nf; +extern cpuop_func_noret op_31bb_35_ff; +extern cpuop_func_noret op_31bc_35_nf; +extern cpuop_func_noret op_31bc_35_ff; +extern cpuop_func_noret op_31c0_35_nf; +extern cpuop_func_noret op_31c0_35_ff; +extern cpuop_func_noret op_31c8_35_nf; +extern cpuop_func_noret op_31c8_35_ff; +extern cpuop_func_noret op_31d0_35_nf; +extern cpuop_func_noret op_31d0_35_ff; +extern cpuop_func_noret op_31d8_35_nf; +extern cpuop_func_noret op_31d8_35_ff; +extern cpuop_func_noret op_31e0_35_nf; +extern cpuop_func_noret op_31e0_35_ff; +extern cpuop_func_noret op_31e8_35_nf; +extern cpuop_func_noret op_31e8_35_ff; +extern cpuop_func_noret op_31f0_35_nf; +extern cpuop_func_noret op_31f0_35_ff; +extern cpuop_func_noret op_31f8_35_nf; +extern cpuop_func_noret op_31f8_35_ff; +extern cpuop_func_noret op_31f9_35_nf; +extern cpuop_func_noret op_31f9_35_ff; +extern cpuop_func_noret op_31fa_35_nf; +extern cpuop_func_noret op_31fa_35_ff; +extern cpuop_func_noret op_31fb_35_nf; +extern cpuop_func_noret op_31fb_35_ff; +extern cpuop_func_noret op_31fc_35_nf; +extern cpuop_func_noret op_31fc_35_ff; +extern cpuop_func_noret op_33c0_35_nf; +extern cpuop_func_noret op_33c0_35_ff; +extern cpuop_func_noret op_33c8_35_nf; +extern cpuop_func_noret op_33c8_35_ff; +extern cpuop_func_noret op_33d0_35_nf; +extern cpuop_func_noret op_33d0_35_ff; +extern cpuop_func_noret op_33d8_35_nf; +extern cpuop_func_noret op_33d8_35_ff; +extern cpuop_func_noret op_33e0_35_nf; +extern cpuop_func_noret op_33e0_35_ff; +extern cpuop_func_noret op_33e8_35_nf; +extern cpuop_func_noret op_33e8_35_ff; +extern cpuop_func_noret op_33f0_35_nf; +extern cpuop_func_noret op_33f0_35_ff; +extern cpuop_func_noret op_33f8_35_nf; +extern cpuop_func_noret op_33f8_35_ff; +extern cpuop_func_noret op_33f9_35_nf; +extern cpuop_func_noret op_33f9_35_ff; +extern cpuop_func_noret op_33fa_35_nf; +extern cpuop_func_noret op_33fa_35_ff; +extern cpuop_func_noret op_33fb_35_nf; +extern cpuop_func_noret op_33fb_35_ff; +extern cpuop_func_noret op_33fc_35_nf; +extern cpuop_func_noret op_33fc_35_ff; +extern cpuop_func_noret op_4000_35_nf; +extern cpuop_func_noret op_4000_35_ff; +extern cpuop_func_noret op_4010_35_nf; +extern cpuop_func_noret op_4010_35_ff; +extern cpuop_func_noret op_4018_35_nf; +extern cpuop_func_noret op_4018_35_ff; +extern cpuop_func_noret op_4020_35_nf; +extern cpuop_func_noret op_4020_35_ff; +extern cpuop_func_noret op_4028_35_nf; +extern cpuop_func_noret op_4028_35_ff; +extern cpuop_func_noret op_4030_35_nf; +extern cpuop_func_noret op_4030_35_ff; +extern cpuop_func_noret op_4038_35_nf; +extern cpuop_func_noret op_4038_35_ff; +extern cpuop_func_noret op_4039_35_nf; +extern cpuop_func_noret op_4039_35_ff; +extern cpuop_func_noret op_4040_35_nf; +extern cpuop_func_noret op_4040_35_ff; +extern cpuop_func_noret op_4050_35_nf; +extern cpuop_func_noret op_4050_35_ff; +extern cpuop_func_noret op_4058_35_nf; +extern cpuop_func_noret op_4058_35_ff; +extern cpuop_func_noret op_4060_35_nf; +extern cpuop_func_noret op_4060_35_ff; +extern cpuop_func_noret op_4068_35_nf; +extern cpuop_func_noret op_4068_35_ff; +extern cpuop_func_noret op_4070_35_nf; +extern cpuop_func_noret op_4070_35_ff; +extern cpuop_func_noret op_4078_35_nf; +extern cpuop_func_noret op_4078_35_ff; +extern cpuop_func_noret op_4079_35_nf; +extern cpuop_func_noret op_4079_35_ff; +extern cpuop_func_noret op_4080_35_nf; +extern cpuop_func_noret op_4080_35_ff; +extern cpuop_func_noret op_4090_35_nf; +extern cpuop_func_noret op_4090_35_ff; +extern cpuop_func_noret op_4098_35_nf; +extern cpuop_func_noret op_4098_35_ff; +extern cpuop_func_noret op_40a0_35_nf; +extern cpuop_func_noret op_40a0_35_ff; +extern cpuop_func_noret op_40a8_35_nf; +extern cpuop_func_noret op_40a8_35_ff; +extern cpuop_func_noret op_40b0_35_nf; +extern cpuop_func_noret op_40b0_35_ff; +extern cpuop_func_noret op_40b8_35_nf; +extern cpuop_func_noret op_40b8_35_ff; +extern cpuop_func_noret op_40b9_35_nf; +extern cpuop_func_noret op_40b9_35_ff; +extern cpuop_func_noret op_40c0_35_nf; +extern cpuop_func_noret op_40c0_35_ff; +extern cpuop_func_noret op_40d0_35_nf; +extern cpuop_func_noret op_40d0_35_ff; +extern cpuop_func_noret op_40d8_35_nf; +extern cpuop_func_noret op_40d8_35_ff; +extern cpuop_func_noret op_40e0_35_nf; +extern cpuop_func_noret op_40e0_35_ff; +extern cpuop_func_noret op_40e8_35_nf; +extern cpuop_func_noret op_40e8_35_ff; +extern cpuop_func_noret op_40f0_35_nf; +extern cpuop_func_noret op_40f0_35_ff; +extern cpuop_func_noret op_40f8_35_nf; +extern cpuop_func_noret op_40f8_35_ff; +extern cpuop_func_noret op_40f9_35_nf; +extern cpuop_func_noret op_40f9_35_ff; +extern cpuop_func_noret op_4100_35_nf; +extern cpuop_func_noret op_4100_35_ff; +extern cpuop_func_noret op_4110_35_nf; +extern cpuop_func_noret op_4110_35_ff; +extern cpuop_func_noret op_4118_35_nf; +extern cpuop_func_noret op_4118_35_ff; +extern cpuop_func_noret op_4120_35_nf; +extern cpuop_func_noret op_4120_35_ff; +extern cpuop_func_noret op_4128_35_nf; +extern cpuop_func_noret op_4128_35_ff; +extern cpuop_func_noret op_4130_35_nf; +extern cpuop_func_noret op_4130_35_ff; +extern cpuop_func_noret op_4138_35_nf; +extern cpuop_func_noret op_4138_35_ff; +extern cpuop_func_noret op_4139_35_nf; +extern cpuop_func_noret op_4139_35_ff; +extern cpuop_func_noret op_413a_35_nf; +extern cpuop_func_noret op_413a_35_ff; +extern cpuop_func_noret op_413b_35_nf; +extern cpuop_func_noret op_413b_35_ff; +extern cpuop_func_noret op_413c_35_nf; +extern cpuop_func_noret op_413c_35_ff; +extern cpuop_func_noret op_4180_35_nf; +extern cpuop_func_noret op_4180_35_ff; +extern cpuop_func_noret op_4190_35_nf; +extern cpuop_func_noret op_4190_35_ff; +extern cpuop_func_noret op_4198_35_nf; +extern cpuop_func_noret op_4198_35_ff; +extern cpuop_func_noret op_41a0_35_nf; +extern cpuop_func_noret op_41a0_35_ff; +extern cpuop_func_noret op_41a8_35_nf; +extern cpuop_func_noret op_41a8_35_ff; +extern cpuop_func_noret op_41b0_35_nf; +extern cpuop_func_noret op_41b0_35_ff; +extern cpuop_func_noret op_41b8_35_nf; +extern cpuop_func_noret op_41b8_35_ff; +extern cpuop_func_noret op_41b9_35_nf; +extern cpuop_func_noret op_41b9_35_ff; +extern cpuop_func_noret op_41ba_35_nf; +extern cpuop_func_noret op_41ba_35_ff; +extern cpuop_func_noret op_41bb_35_nf; +extern cpuop_func_noret op_41bb_35_ff; +extern cpuop_func_noret op_41bc_35_nf; +extern cpuop_func_noret op_41bc_35_ff; +extern cpuop_func_noret op_41d0_35_nf; +extern cpuop_func_noret op_41d0_35_ff; +extern cpuop_func_noret op_41e8_35_nf; +extern cpuop_func_noret op_41e8_35_ff; +extern cpuop_func_noret op_41f0_35_nf; +extern cpuop_func_noret op_41f0_35_ff; +extern cpuop_func_noret op_41f8_35_nf; +extern cpuop_func_noret op_41f8_35_ff; +extern cpuop_func_noret op_41f9_35_nf; +extern cpuop_func_noret op_41f9_35_ff; +extern cpuop_func_noret op_41fa_35_nf; +extern cpuop_func_noret op_41fa_35_ff; +extern cpuop_func_noret op_41fb_35_nf; +extern cpuop_func_noret op_41fb_35_ff; +extern cpuop_func_noret op_4200_35_nf; +extern cpuop_func_noret op_4200_35_ff; +extern cpuop_func_noret op_4210_35_nf; +extern cpuop_func_noret op_4210_35_ff; +extern cpuop_func_noret op_4218_35_nf; +extern cpuop_func_noret op_4218_35_ff; +extern cpuop_func_noret op_4220_35_nf; +extern cpuop_func_noret op_4220_35_ff; +extern cpuop_func_noret op_4228_35_nf; +extern cpuop_func_noret op_4228_35_ff; +extern cpuop_func_noret op_4230_35_nf; +extern cpuop_func_noret op_4230_35_ff; +extern cpuop_func_noret op_4238_35_nf; +extern cpuop_func_noret op_4238_35_ff; +extern cpuop_func_noret op_4239_35_nf; +extern cpuop_func_noret op_4239_35_ff; +extern cpuop_func_noret op_4240_35_nf; +extern cpuop_func_noret op_4240_35_ff; +extern cpuop_func_noret op_4250_35_nf; +extern cpuop_func_noret op_4250_35_ff; +extern cpuop_func_noret op_4258_35_nf; +extern cpuop_func_noret op_4258_35_ff; +extern cpuop_func_noret op_4260_35_nf; +extern cpuop_func_noret op_4260_35_ff; +extern cpuop_func_noret op_4268_35_nf; +extern cpuop_func_noret op_4268_35_ff; +extern cpuop_func_noret op_4270_35_nf; +extern cpuop_func_noret op_4270_35_ff; +extern cpuop_func_noret op_4278_35_nf; +extern cpuop_func_noret op_4278_35_ff; +extern cpuop_func_noret op_4279_35_nf; +extern cpuop_func_noret op_4279_35_ff; +extern cpuop_func_noret op_4280_35_nf; +extern cpuop_func_noret op_4280_35_ff; +extern cpuop_func_noret op_4290_35_nf; +extern cpuop_func_noret op_4290_35_ff; +extern cpuop_func_noret op_4298_35_nf; +extern cpuop_func_noret op_4298_35_ff; +extern cpuop_func_noret op_42a0_35_nf; +extern cpuop_func_noret op_42a0_35_ff; +extern cpuop_func_noret op_42a8_35_nf; +extern cpuop_func_noret op_42a8_35_ff; +extern cpuop_func_noret op_42b0_35_nf; +extern cpuop_func_noret op_42b0_35_ff; +extern cpuop_func_noret op_42b8_35_nf; +extern cpuop_func_noret op_42b8_35_ff; +extern cpuop_func_noret op_42b9_35_nf; +extern cpuop_func_noret op_42b9_35_ff; +extern cpuop_func_noret op_42c0_35_nf; +extern cpuop_func_noret op_42c0_35_ff; +extern cpuop_func_noret op_42d0_35_nf; +extern cpuop_func_noret op_42d0_35_ff; +extern cpuop_func_noret op_42d8_35_nf; +extern cpuop_func_noret op_42d8_35_ff; +extern cpuop_func_noret op_42e0_35_nf; +extern cpuop_func_noret op_42e0_35_ff; +extern cpuop_func_noret op_42e8_35_nf; +extern cpuop_func_noret op_42e8_35_ff; +extern cpuop_func_noret op_42f0_35_nf; +extern cpuop_func_noret op_42f0_35_ff; +extern cpuop_func_noret op_42f8_35_nf; +extern cpuop_func_noret op_42f8_35_ff; +extern cpuop_func_noret op_42f9_35_nf; +extern cpuop_func_noret op_42f9_35_ff; +extern cpuop_func_noret op_4400_35_nf; +extern cpuop_func_noret op_4400_35_ff; +extern cpuop_func_noret op_4410_35_nf; +extern cpuop_func_noret op_4410_35_ff; +extern cpuop_func_noret op_4418_35_nf; +extern cpuop_func_noret op_4418_35_ff; +extern cpuop_func_noret op_4420_35_nf; +extern cpuop_func_noret op_4420_35_ff; +extern cpuop_func_noret op_4428_35_nf; +extern cpuop_func_noret op_4428_35_ff; +extern cpuop_func_noret op_4430_35_nf; +extern cpuop_func_noret op_4430_35_ff; +extern cpuop_func_noret op_4438_35_nf; +extern cpuop_func_noret op_4438_35_ff; +extern cpuop_func_noret op_4439_35_nf; +extern cpuop_func_noret op_4439_35_ff; +extern cpuop_func_noret op_4440_35_nf; +extern cpuop_func_noret op_4440_35_ff; +extern cpuop_func_noret op_4450_35_nf; +extern cpuop_func_noret op_4450_35_ff; +extern cpuop_func_noret op_4458_35_nf; +extern cpuop_func_noret op_4458_35_ff; +extern cpuop_func_noret op_4460_35_nf; +extern cpuop_func_noret op_4460_35_ff; +extern cpuop_func_noret op_4468_35_nf; +extern cpuop_func_noret op_4468_35_ff; +extern cpuop_func_noret op_4470_35_nf; +extern cpuop_func_noret op_4470_35_ff; +extern cpuop_func_noret op_4478_35_nf; +extern cpuop_func_noret op_4478_35_ff; +extern cpuop_func_noret op_4479_35_nf; +extern cpuop_func_noret op_4479_35_ff; +extern cpuop_func_noret op_4480_35_nf; +extern cpuop_func_noret op_4480_35_ff; +extern cpuop_func_noret op_4490_35_nf; +extern cpuop_func_noret op_4490_35_ff; +extern cpuop_func_noret op_4498_35_nf; +extern cpuop_func_noret op_4498_35_ff; +extern cpuop_func_noret op_44a0_35_nf; +extern cpuop_func_noret op_44a0_35_ff; +extern cpuop_func_noret op_44a8_35_nf; +extern cpuop_func_noret op_44a8_35_ff; +extern cpuop_func_noret op_44b0_35_nf; +extern cpuop_func_noret op_44b0_35_ff; +extern cpuop_func_noret op_44b8_35_nf; +extern cpuop_func_noret op_44b8_35_ff; +extern cpuop_func_noret op_44b9_35_nf; +extern cpuop_func_noret op_44b9_35_ff; +extern cpuop_func_noret op_44c0_35_nf; +extern cpuop_func_noret op_44c0_35_ff; +extern cpuop_func_noret op_44d0_35_nf; +extern cpuop_func_noret op_44d0_35_ff; +extern cpuop_func_noret op_44d8_35_nf; +extern cpuop_func_noret op_44d8_35_ff; +extern cpuop_func_noret op_44e0_35_nf; +extern cpuop_func_noret op_44e0_35_ff; +extern cpuop_func_noret op_44e8_35_nf; +extern cpuop_func_noret op_44e8_35_ff; +extern cpuop_func_noret op_44f0_35_nf; +extern cpuop_func_noret op_44f0_35_ff; +extern cpuop_func_noret op_44f8_35_nf; +extern cpuop_func_noret op_44f8_35_ff; +extern cpuop_func_noret op_44f9_35_nf; +extern cpuop_func_noret op_44f9_35_ff; +extern cpuop_func_noret op_44fa_35_nf; +extern cpuop_func_noret op_44fa_35_ff; +extern cpuop_func_noret op_44fb_35_nf; +extern cpuop_func_noret op_44fb_35_ff; +extern cpuop_func_noret op_44fc_35_nf; +extern cpuop_func_noret op_44fc_35_ff; +extern cpuop_func_noret op_4600_35_nf; +extern cpuop_func_noret op_4600_35_ff; +extern cpuop_func_noret op_4610_35_nf; +extern cpuop_func_noret op_4610_35_ff; +extern cpuop_func_noret op_4618_35_nf; +extern cpuop_func_noret op_4618_35_ff; +extern cpuop_func_noret op_4620_35_nf; +extern cpuop_func_noret op_4620_35_ff; +extern cpuop_func_noret op_4628_35_nf; +extern cpuop_func_noret op_4628_35_ff; +extern cpuop_func_noret op_4630_35_nf; +extern cpuop_func_noret op_4630_35_ff; +extern cpuop_func_noret op_4638_35_nf; +extern cpuop_func_noret op_4638_35_ff; +extern cpuop_func_noret op_4639_35_nf; +extern cpuop_func_noret op_4639_35_ff; +extern cpuop_func_noret op_4640_35_nf; +extern cpuop_func_noret op_4640_35_ff; +extern cpuop_func_noret op_4650_35_nf; +extern cpuop_func_noret op_4650_35_ff; +extern cpuop_func_noret op_4658_35_nf; +extern cpuop_func_noret op_4658_35_ff; +extern cpuop_func_noret op_4660_35_nf; +extern cpuop_func_noret op_4660_35_ff; +extern cpuop_func_noret op_4668_35_nf; +extern cpuop_func_noret op_4668_35_ff; +extern cpuop_func_noret op_4670_35_nf; +extern cpuop_func_noret op_4670_35_ff; +extern cpuop_func_noret op_4678_35_nf; +extern cpuop_func_noret op_4678_35_ff; +extern cpuop_func_noret op_4679_35_nf; +extern cpuop_func_noret op_4679_35_ff; +extern cpuop_func_noret op_4680_35_nf; +extern cpuop_func_noret op_4680_35_ff; +extern cpuop_func_noret op_4690_35_nf; +extern cpuop_func_noret op_4690_35_ff; +extern cpuop_func_noret op_4698_35_nf; +extern cpuop_func_noret op_4698_35_ff; +extern cpuop_func_noret op_46a0_35_nf; +extern cpuop_func_noret op_46a0_35_ff; +extern cpuop_func_noret op_46a8_35_nf; +extern cpuop_func_noret op_46a8_35_ff; +extern cpuop_func_noret op_46b0_35_nf; +extern cpuop_func_noret op_46b0_35_ff; +extern cpuop_func_noret op_46b8_35_nf; +extern cpuop_func_noret op_46b8_35_ff; +extern cpuop_func_noret op_46b9_35_nf; +extern cpuop_func_noret op_46b9_35_ff; +extern cpuop_func_noret op_46c0_35_nf; +extern cpuop_func_noret op_46c0_35_ff; +extern cpuop_func_noret op_46d0_35_nf; +extern cpuop_func_noret op_46d0_35_ff; +extern cpuop_func_noret op_46d8_35_nf; +extern cpuop_func_noret op_46d8_35_ff; +extern cpuop_func_noret op_46e0_35_nf; +extern cpuop_func_noret op_46e0_35_ff; +extern cpuop_func_noret op_46e8_35_nf; +extern cpuop_func_noret op_46e8_35_ff; +extern cpuop_func_noret op_46f0_35_nf; +extern cpuop_func_noret op_46f0_35_ff; +extern cpuop_func_noret op_46f8_35_nf; +extern cpuop_func_noret op_46f8_35_ff; +extern cpuop_func_noret op_46f9_35_nf; +extern cpuop_func_noret op_46f9_35_ff; +extern cpuop_func_noret op_46fa_35_nf; +extern cpuop_func_noret op_46fa_35_ff; +extern cpuop_func_noret op_46fb_35_nf; +extern cpuop_func_noret op_46fb_35_ff; +extern cpuop_func_noret op_46fc_35_nf; +extern cpuop_func_noret op_46fc_35_ff; +extern cpuop_func_noret op_4800_35_nf; +extern cpuop_func_noret op_4800_35_ff; +extern cpuop_func_noret op_4808_35_nf; +extern cpuop_func_noret op_4808_35_ff; +extern cpuop_func_noret op_4810_35_nf; +extern cpuop_func_noret op_4810_35_ff; +extern cpuop_func_noret op_4818_35_nf; +extern cpuop_func_noret op_4818_35_ff; +extern cpuop_func_noret op_4820_35_nf; +extern cpuop_func_noret op_4820_35_ff; +extern cpuop_func_noret op_4828_35_nf; +extern cpuop_func_noret op_4828_35_ff; +extern cpuop_func_noret op_4830_35_nf; +extern cpuop_func_noret op_4830_35_ff; +extern cpuop_func_noret op_4838_35_nf; +extern cpuop_func_noret op_4838_35_ff; +extern cpuop_func_noret op_4839_35_nf; +extern cpuop_func_noret op_4839_35_ff; +extern cpuop_func_noret op_4840_35_nf; +extern cpuop_func_noret op_4840_35_ff; +extern cpuop_func_noret op_4848_35_nf; +extern cpuop_func_noret op_4848_35_ff; +extern cpuop_func_noret op_4850_35_nf; +extern cpuop_func_noret op_4850_35_ff; +extern cpuop_func_noret op_4868_35_nf; +extern cpuop_func_noret op_4868_35_ff; +extern cpuop_func_noret op_4870_35_nf; +extern cpuop_func_noret op_4870_35_ff; +extern cpuop_func_noret op_4878_35_nf; +extern cpuop_func_noret op_4878_35_ff; +extern cpuop_func_noret op_4879_35_nf; +extern cpuop_func_noret op_4879_35_ff; +extern cpuop_func_noret op_487a_35_nf; +extern cpuop_func_noret op_487a_35_ff; +extern cpuop_func_noret op_487b_35_nf; +extern cpuop_func_noret op_487b_35_ff; +extern cpuop_func_noret op_4880_35_nf; +extern cpuop_func_noret op_4880_35_ff; +extern cpuop_func_noret op_4890_35_nf; +extern cpuop_func_noret op_4890_35_ff; +extern cpuop_func_noret op_48a0_35_nf; +extern cpuop_func_noret op_48a0_35_ff; +extern cpuop_func_noret op_48a8_35_nf; +extern cpuop_func_noret op_48a8_35_ff; +extern cpuop_func_noret op_48b0_35_nf; +extern cpuop_func_noret op_48b0_35_ff; +extern cpuop_func_noret op_48b8_35_nf; +extern cpuop_func_noret op_48b8_35_ff; +extern cpuop_func_noret op_48b9_35_nf; +extern cpuop_func_noret op_48b9_35_ff; +extern cpuop_func_noret op_48c0_35_nf; +extern cpuop_func_noret op_48c0_35_ff; +extern cpuop_func_noret op_48d0_35_nf; +extern cpuop_func_noret op_48d0_35_ff; +extern cpuop_func_noret op_48e0_35_nf; +extern cpuop_func_noret op_48e0_35_ff; +extern cpuop_func_noret op_48e8_35_nf; +extern cpuop_func_noret op_48e8_35_ff; +extern cpuop_func_noret op_48f0_35_nf; +extern cpuop_func_noret op_48f0_35_ff; +extern cpuop_func_noret op_48f8_35_nf; +extern cpuop_func_noret op_48f8_35_ff; +extern cpuop_func_noret op_48f9_35_nf; +extern cpuop_func_noret op_48f9_35_ff; +extern cpuop_func_noret op_49c0_35_nf; +extern cpuop_func_noret op_49c0_35_ff; +extern cpuop_func_noret op_4a00_35_nf; +extern cpuop_func_noret op_4a00_35_ff; +extern cpuop_func_noret op_4a10_35_nf; +extern cpuop_func_noret op_4a10_35_ff; +extern cpuop_func_noret op_4a18_35_nf; +extern cpuop_func_noret op_4a18_35_ff; +extern cpuop_func_noret op_4a20_35_nf; +extern cpuop_func_noret op_4a20_35_ff; +extern cpuop_func_noret op_4a28_35_nf; +extern cpuop_func_noret op_4a28_35_ff; +extern cpuop_func_noret op_4a30_35_nf; +extern cpuop_func_noret op_4a30_35_ff; +extern cpuop_func_noret op_4a38_35_nf; +extern cpuop_func_noret op_4a38_35_ff; +extern cpuop_func_noret op_4a39_35_nf; +extern cpuop_func_noret op_4a39_35_ff; +extern cpuop_func_noret op_4a3a_35_nf; +extern cpuop_func_noret op_4a3a_35_ff; +extern cpuop_func_noret op_4a3b_35_nf; +extern cpuop_func_noret op_4a3b_35_ff; +extern cpuop_func_noret op_4a3c_35_nf; +extern cpuop_func_noret op_4a3c_35_ff; +extern cpuop_func_noret op_4a40_35_nf; +extern cpuop_func_noret op_4a40_35_ff; +extern cpuop_func_noret op_4a48_35_nf; +extern cpuop_func_noret op_4a48_35_ff; +extern cpuop_func_noret op_4a50_35_nf; +extern cpuop_func_noret op_4a50_35_ff; +extern cpuop_func_noret op_4a58_35_nf; +extern cpuop_func_noret op_4a58_35_ff; +extern cpuop_func_noret op_4a60_35_nf; +extern cpuop_func_noret op_4a60_35_ff; +extern cpuop_func_noret op_4a68_35_nf; +extern cpuop_func_noret op_4a68_35_ff; +extern cpuop_func_noret op_4a70_35_nf; +extern cpuop_func_noret op_4a70_35_ff; +extern cpuop_func_noret op_4a78_35_nf; +extern cpuop_func_noret op_4a78_35_ff; +extern cpuop_func_noret op_4a79_35_nf; +extern cpuop_func_noret op_4a79_35_ff; +extern cpuop_func_noret op_4a7a_35_nf; +extern cpuop_func_noret op_4a7a_35_ff; +extern cpuop_func_noret op_4a7b_35_nf; +extern cpuop_func_noret op_4a7b_35_ff; +extern cpuop_func_noret op_4a7c_35_nf; +extern cpuop_func_noret op_4a7c_35_ff; +extern cpuop_func_noret op_4a80_35_nf; +extern cpuop_func_noret op_4a80_35_ff; +extern cpuop_func_noret op_4a88_35_nf; +extern cpuop_func_noret op_4a88_35_ff; +extern cpuop_func_noret op_4a90_35_nf; +extern cpuop_func_noret op_4a90_35_ff; +extern cpuop_func_noret op_4a98_35_nf; +extern cpuop_func_noret op_4a98_35_ff; +extern cpuop_func_noret op_4aa0_35_nf; +extern cpuop_func_noret op_4aa0_35_ff; +extern cpuop_func_noret op_4aa8_35_nf; +extern cpuop_func_noret op_4aa8_35_ff; +extern cpuop_func_noret op_4ab0_35_nf; +extern cpuop_func_noret op_4ab0_35_ff; +extern cpuop_func_noret op_4ab8_35_nf; +extern cpuop_func_noret op_4ab8_35_ff; +extern cpuop_func_noret op_4ab9_35_nf; +extern cpuop_func_noret op_4ab9_35_ff; +extern cpuop_func_noret op_4aba_35_nf; +extern cpuop_func_noret op_4aba_35_ff; +extern cpuop_func_noret op_4abb_35_nf; +extern cpuop_func_noret op_4abb_35_ff; +extern cpuop_func_noret op_4abc_35_nf; +extern cpuop_func_noret op_4abc_35_ff; +extern cpuop_func_noret op_4ac0_35_nf; +extern cpuop_func_noret op_4ac0_35_ff; +extern cpuop_func_noret op_4ad0_35_nf; +extern cpuop_func_noret op_4ad0_35_ff; +extern cpuop_func_noret op_4ad8_35_nf; +extern cpuop_func_noret op_4ad8_35_ff; +extern cpuop_func_noret op_4ae0_35_nf; +extern cpuop_func_noret op_4ae0_35_ff; +extern cpuop_func_noret op_4ae8_35_nf; +extern cpuop_func_noret op_4ae8_35_ff; +extern cpuop_func_noret op_4af0_35_nf; +extern cpuop_func_noret op_4af0_35_ff; +extern cpuop_func_noret op_4af8_35_nf; +extern cpuop_func_noret op_4af8_35_ff; +extern cpuop_func_noret op_4af9_35_nf; +extern cpuop_func_noret op_4af9_35_ff; +extern cpuop_func_noret op_4c00_35_nf; +extern cpuop_func_noret op_4c00_35_ff; +extern cpuop_func_noret op_4c10_35_nf; +extern cpuop_func_noret op_4c10_35_ff; +extern cpuop_func_noret op_4c18_35_nf; +extern cpuop_func_noret op_4c18_35_ff; +extern cpuop_func_noret op_4c20_35_nf; +extern cpuop_func_noret op_4c20_35_ff; +extern cpuop_func_noret op_4c28_35_nf; +extern cpuop_func_noret op_4c28_35_ff; +extern cpuop_func_noret op_4c30_35_nf; +extern cpuop_func_noret op_4c30_35_ff; +extern cpuop_func_noret op_4c38_35_nf; +extern cpuop_func_noret op_4c38_35_ff; +extern cpuop_func_noret op_4c39_35_nf; +extern cpuop_func_noret op_4c39_35_ff; +extern cpuop_func_noret op_4c3a_35_nf; +extern cpuop_func_noret op_4c3a_35_ff; +extern cpuop_func_noret op_4c3b_35_nf; +extern cpuop_func_noret op_4c3b_35_ff; +extern cpuop_func_noret op_4c3c_35_nf; +extern cpuop_func_noret op_4c3c_35_ff; +extern cpuop_func_noret op_4c40_35_nf; +extern cpuop_func_noret op_4c40_35_ff; +extern cpuop_func_noret op_4c50_35_nf; +extern cpuop_func_noret op_4c50_35_ff; +extern cpuop_func_noret op_4c58_35_nf; +extern cpuop_func_noret op_4c58_35_ff; +extern cpuop_func_noret op_4c60_35_nf; +extern cpuop_func_noret op_4c60_35_ff; +extern cpuop_func_noret op_4c68_35_nf; +extern cpuop_func_noret op_4c68_35_ff; +extern cpuop_func_noret op_4c70_35_nf; +extern cpuop_func_noret op_4c70_35_ff; +extern cpuop_func_noret op_4c78_35_nf; +extern cpuop_func_noret op_4c78_35_ff; +extern cpuop_func_noret op_4c79_35_nf; +extern cpuop_func_noret op_4c79_35_ff; +extern cpuop_func_noret op_4c7a_35_nf; +extern cpuop_func_noret op_4c7a_35_ff; +extern cpuop_func_noret op_4c7b_35_nf; +extern cpuop_func_noret op_4c7b_35_ff; +extern cpuop_func_noret op_4c7c_35_nf; +extern cpuop_func_noret op_4c7c_35_ff; +extern cpuop_func_noret op_4c90_35_nf; +extern cpuop_func_noret op_4c90_35_ff; +extern cpuop_func_noret op_4c98_35_nf; +extern cpuop_func_noret op_4c98_35_ff; +extern cpuop_func_noret op_4ca8_35_nf; +extern cpuop_func_noret op_4ca8_35_ff; +extern cpuop_func_noret op_4cb0_35_nf; +extern cpuop_func_noret op_4cb0_35_ff; +extern cpuop_func_noret op_4cb8_35_nf; +extern cpuop_func_noret op_4cb8_35_ff; +extern cpuop_func_noret op_4cb9_35_nf; +extern cpuop_func_noret op_4cb9_35_ff; +extern cpuop_func_noret op_4cba_35_nf; +extern cpuop_func_noret op_4cba_35_ff; +extern cpuop_func_noret op_4cbb_35_nf; +extern cpuop_func_noret op_4cbb_35_ff; +extern cpuop_func_noret op_4cd0_35_nf; +extern cpuop_func_noret op_4cd0_35_ff; +extern cpuop_func_noret op_4cd8_35_nf; +extern cpuop_func_noret op_4cd8_35_ff; +extern cpuop_func_noret op_4ce8_35_nf; +extern cpuop_func_noret op_4ce8_35_ff; +extern cpuop_func_noret op_4cf0_35_nf; +extern cpuop_func_noret op_4cf0_35_ff; +extern cpuop_func_noret op_4cf8_35_nf; +extern cpuop_func_noret op_4cf8_35_ff; +extern cpuop_func_noret op_4cf9_35_nf; +extern cpuop_func_noret op_4cf9_35_ff; +extern cpuop_func_noret op_4cfa_35_nf; +extern cpuop_func_noret op_4cfa_35_ff; +extern cpuop_func_noret op_4cfb_35_nf; +extern cpuop_func_noret op_4cfb_35_ff; +extern cpuop_func_noret op_4e40_35_nf; +extern cpuop_func_noret op_4e40_35_ff; +extern cpuop_func_noret op_4e50_35_nf; +extern cpuop_func_noret op_4e50_35_ff; +extern cpuop_func_noret op_4e58_35_nf; +extern cpuop_func_noret op_4e58_35_ff; +extern cpuop_func_noret op_4e60_35_nf; +extern cpuop_func_noret op_4e60_35_ff; +extern cpuop_func_noret op_4e68_35_nf; +extern cpuop_func_noret op_4e68_35_ff; +extern cpuop_func_noret op_4e70_35_nf; +extern cpuop_func_noret op_4e70_35_ff; +extern cpuop_func_noret op_4e71_35_nf; +extern cpuop_func_noret op_4e71_35_ff; +extern cpuop_func_noret op_4e72_35_nf; +extern cpuop_func_noret op_4e72_35_ff; +extern cpuop_func_noret op_4e73_35_nf; +extern cpuop_func_noret op_4e73_35_ff; +extern cpuop_func_noret op_4e74_35_nf; +extern cpuop_func_noret op_4e74_35_ff; +extern cpuop_func_noret op_4e75_35_nf; +extern cpuop_func_noret op_4e75_35_ff; +extern cpuop_func_noret op_4e76_35_nf; +extern cpuop_func_noret op_4e76_35_ff; +extern cpuop_func_noret op_4e77_35_nf; +extern cpuop_func_noret op_4e77_35_ff; +extern cpuop_func_noret op_4e7a_35_nf; +extern cpuop_func_noret op_4e7a_35_ff; +extern cpuop_func_noret op_4e7b_35_nf; +extern cpuop_func_noret op_4e7b_35_ff; +extern cpuop_func_noret op_4e90_35_nf; +extern cpuop_func_noret op_4e90_35_ff; +extern cpuop_func_noret op_4ea8_35_nf; +extern cpuop_func_noret op_4ea8_35_ff; +extern cpuop_func_noret op_4eb0_35_nf; +extern cpuop_func_noret op_4eb0_35_ff; +extern cpuop_func_noret op_4eb8_35_nf; +extern cpuop_func_noret op_4eb8_35_ff; +extern cpuop_func_noret op_4eb9_35_nf; +extern cpuop_func_noret op_4eb9_35_ff; +extern cpuop_func_noret op_4eba_35_nf; +extern cpuop_func_noret op_4eba_35_ff; +extern cpuop_func_noret op_4ebb_35_nf; +extern cpuop_func_noret op_4ebb_35_ff; +extern cpuop_func_noret op_4ed0_35_nf; +extern cpuop_func_noret op_4ed0_35_ff; +extern cpuop_func_noret op_4ee8_35_nf; +extern cpuop_func_noret op_4ee8_35_ff; +extern cpuop_func_noret op_4ef0_35_nf; +extern cpuop_func_noret op_4ef0_35_ff; +extern cpuop_func_noret op_4ef8_35_nf; +extern cpuop_func_noret op_4ef8_35_ff; +extern cpuop_func_noret op_4ef9_35_nf; +extern cpuop_func_noret op_4ef9_35_ff; +extern cpuop_func_noret op_4efa_35_nf; +extern cpuop_func_noret op_4efa_35_ff; +extern cpuop_func_noret op_4efb_35_nf; +extern cpuop_func_noret op_4efb_35_ff; +extern cpuop_func_noret op_5000_35_nf; +extern cpuop_func_noret op_5000_35_ff; +extern cpuop_func_noret op_5010_35_nf; +extern cpuop_func_noret op_5010_35_ff; +extern cpuop_func_noret op_5018_35_nf; +extern cpuop_func_noret op_5018_35_ff; +extern cpuop_func_noret op_5020_35_nf; +extern cpuop_func_noret op_5020_35_ff; +extern cpuop_func_noret op_5028_35_nf; +extern cpuop_func_noret op_5028_35_ff; +extern cpuop_func_noret op_5030_35_nf; +extern cpuop_func_noret op_5030_35_ff; +extern cpuop_func_noret op_5038_35_nf; +extern cpuop_func_noret op_5038_35_ff; +extern cpuop_func_noret op_5039_35_nf; +extern cpuop_func_noret op_5039_35_ff; +extern cpuop_func_noret op_5040_35_nf; +extern cpuop_func_noret op_5040_35_ff; +extern cpuop_func_noret op_5048_35_nf; +extern cpuop_func_noret op_5048_35_ff; +extern cpuop_func_noret op_5050_35_nf; +extern cpuop_func_noret op_5050_35_ff; +extern cpuop_func_noret op_5058_35_nf; +extern cpuop_func_noret op_5058_35_ff; +extern cpuop_func_noret op_5060_35_nf; +extern cpuop_func_noret op_5060_35_ff; +extern cpuop_func_noret op_5068_35_nf; +extern cpuop_func_noret op_5068_35_ff; +extern cpuop_func_noret op_5070_35_nf; +extern cpuop_func_noret op_5070_35_ff; +extern cpuop_func_noret op_5078_35_nf; +extern cpuop_func_noret op_5078_35_ff; +extern cpuop_func_noret op_5079_35_nf; +extern cpuop_func_noret op_5079_35_ff; +extern cpuop_func_noret op_5080_35_nf; +extern cpuop_func_noret op_5080_35_ff; +extern cpuop_func_noret op_5088_35_nf; +extern cpuop_func_noret op_5088_35_ff; +extern cpuop_func_noret op_5090_35_nf; +extern cpuop_func_noret op_5090_35_ff; +extern cpuop_func_noret op_5098_35_nf; +extern cpuop_func_noret op_5098_35_ff; +extern cpuop_func_noret op_50a0_35_nf; +extern cpuop_func_noret op_50a0_35_ff; +extern cpuop_func_noret op_50a8_35_nf; +extern cpuop_func_noret op_50a8_35_ff; +extern cpuop_func_noret op_50b0_35_nf; +extern cpuop_func_noret op_50b0_35_ff; +extern cpuop_func_noret op_50b8_35_nf; +extern cpuop_func_noret op_50b8_35_ff; +extern cpuop_func_noret op_50b9_35_nf; +extern cpuop_func_noret op_50b9_35_ff; +extern cpuop_func_noret op_50c0_35_nf; +extern cpuop_func_noret op_50c0_35_ff; +extern cpuop_func_noret op_50c8_35_nf; +extern cpuop_func_noret op_50c8_35_ff; +extern cpuop_func_noret op_50d0_35_nf; +extern cpuop_func_noret op_50d0_35_ff; +extern cpuop_func_noret op_50d8_35_nf; +extern cpuop_func_noret op_50d8_35_ff; +extern cpuop_func_noret op_50e0_35_nf; +extern cpuop_func_noret op_50e0_35_ff; +extern cpuop_func_noret op_50e8_35_nf; +extern cpuop_func_noret op_50e8_35_ff; +extern cpuop_func_noret op_50f0_35_nf; +extern cpuop_func_noret op_50f0_35_ff; +extern cpuop_func_noret op_50f8_35_nf; +extern cpuop_func_noret op_50f8_35_ff; +extern cpuop_func_noret op_50f9_35_nf; +extern cpuop_func_noret op_50f9_35_ff; +extern cpuop_func_noret op_50fa_35_nf; +extern cpuop_func_noret op_50fa_35_ff; +extern cpuop_func_noret op_50fb_35_nf; +extern cpuop_func_noret op_50fb_35_ff; +extern cpuop_func_noret op_50fc_35_nf; +extern cpuop_func_noret op_50fc_35_ff; +extern cpuop_func_noret op_5100_35_nf; +extern cpuop_func_noret op_5100_35_ff; +extern cpuop_func_noret op_5110_35_nf; +extern cpuop_func_noret op_5110_35_ff; +extern cpuop_func_noret op_5118_35_nf; +extern cpuop_func_noret op_5118_35_ff; +extern cpuop_func_noret op_5120_35_nf; +extern cpuop_func_noret op_5120_35_ff; +extern cpuop_func_noret op_5128_35_nf; +extern cpuop_func_noret op_5128_35_ff; +extern cpuop_func_noret op_5130_35_nf; +extern cpuop_func_noret op_5130_35_ff; +extern cpuop_func_noret op_5138_35_nf; +extern cpuop_func_noret op_5138_35_ff; +extern cpuop_func_noret op_5139_35_nf; +extern cpuop_func_noret op_5139_35_ff; +extern cpuop_func_noret op_5140_35_nf; +extern cpuop_func_noret op_5140_35_ff; +extern cpuop_func_noret op_5148_35_nf; +extern cpuop_func_noret op_5148_35_ff; +extern cpuop_func_noret op_5150_35_nf; +extern cpuop_func_noret op_5150_35_ff; +extern cpuop_func_noret op_5158_35_nf; +extern cpuop_func_noret op_5158_35_ff; +extern cpuop_func_noret op_5160_35_nf; +extern cpuop_func_noret op_5160_35_ff; +extern cpuop_func_noret op_5168_35_nf; +extern cpuop_func_noret op_5168_35_ff; +extern cpuop_func_noret op_5170_35_nf; +extern cpuop_func_noret op_5170_35_ff; +extern cpuop_func_noret op_5178_35_nf; +extern cpuop_func_noret op_5178_35_ff; +extern cpuop_func_noret op_5179_35_nf; +extern cpuop_func_noret op_5179_35_ff; +extern cpuop_func_noret op_5180_35_nf; +extern cpuop_func_noret op_5180_35_ff; +extern cpuop_func_noret op_5188_35_nf; +extern cpuop_func_noret op_5188_35_ff; +extern cpuop_func_noret op_5190_35_nf; +extern cpuop_func_noret op_5190_35_ff; +extern cpuop_func_noret op_5198_35_nf; +extern cpuop_func_noret op_5198_35_ff; +extern cpuop_func_noret op_51a0_35_nf; +extern cpuop_func_noret op_51a0_35_ff; +extern cpuop_func_noret op_51a8_35_nf; +extern cpuop_func_noret op_51a8_35_ff; +extern cpuop_func_noret op_51b0_35_nf; +extern cpuop_func_noret op_51b0_35_ff; +extern cpuop_func_noret op_51b8_35_nf; +extern cpuop_func_noret op_51b8_35_ff; +extern cpuop_func_noret op_51b9_35_nf; +extern cpuop_func_noret op_51b9_35_ff; +extern cpuop_func_noret op_51c0_35_nf; +extern cpuop_func_noret op_51c0_35_ff; +extern cpuop_func_noret op_51c8_35_nf; +extern cpuop_func_noret op_51c8_35_ff; +extern cpuop_func_noret op_51d0_35_nf; +extern cpuop_func_noret op_51d0_35_ff; +extern cpuop_func_noret op_51d8_35_nf; +extern cpuop_func_noret op_51d8_35_ff; +extern cpuop_func_noret op_51e0_35_nf; +extern cpuop_func_noret op_51e0_35_ff; +extern cpuop_func_noret op_51e8_35_nf; +extern cpuop_func_noret op_51e8_35_ff; +extern cpuop_func_noret op_51f0_35_nf; +extern cpuop_func_noret op_51f0_35_ff; +extern cpuop_func_noret op_51f8_35_nf; +extern cpuop_func_noret op_51f8_35_ff; +extern cpuop_func_noret op_51f9_35_nf; +extern cpuop_func_noret op_51f9_35_ff; +extern cpuop_func_noret op_51fa_35_nf; +extern cpuop_func_noret op_51fa_35_ff; +extern cpuop_func_noret op_51fb_35_nf; +extern cpuop_func_noret op_51fb_35_ff; +extern cpuop_func_noret op_51fc_35_nf; +extern cpuop_func_noret op_51fc_35_ff; +extern cpuop_func_noret op_52c0_35_nf; +extern cpuop_func_noret op_52c0_35_ff; +extern cpuop_func_noret op_52c8_35_nf; +extern cpuop_func_noret op_52c8_35_ff; +extern cpuop_func_noret op_52d0_35_nf; +extern cpuop_func_noret op_52d0_35_ff; +extern cpuop_func_noret op_52d8_35_nf; +extern cpuop_func_noret op_52d8_35_ff; +extern cpuop_func_noret op_52e0_35_nf; +extern cpuop_func_noret op_52e0_35_ff; +extern cpuop_func_noret op_52e8_35_nf; +extern cpuop_func_noret op_52e8_35_ff; +extern cpuop_func_noret op_52f0_35_nf; +extern cpuop_func_noret op_52f0_35_ff; +extern cpuop_func_noret op_52f8_35_nf; +extern cpuop_func_noret op_52f8_35_ff; +extern cpuop_func_noret op_52f9_35_nf; +extern cpuop_func_noret op_52f9_35_ff; +extern cpuop_func_noret op_52fa_35_nf; +extern cpuop_func_noret op_52fa_35_ff; +extern cpuop_func_noret op_52fb_35_nf; +extern cpuop_func_noret op_52fb_35_ff; +extern cpuop_func_noret op_52fc_35_nf; +extern cpuop_func_noret op_52fc_35_ff; +extern cpuop_func_noret op_53c0_35_nf; +extern cpuop_func_noret op_53c0_35_ff; +extern cpuop_func_noret op_53c8_35_nf; +extern cpuop_func_noret op_53c8_35_ff; +extern cpuop_func_noret op_53d0_35_nf; +extern cpuop_func_noret op_53d0_35_ff; +extern cpuop_func_noret op_53d8_35_nf; +extern cpuop_func_noret op_53d8_35_ff; +extern cpuop_func_noret op_53e0_35_nf; +extern cpuop_func_noret op_53e0_35_ff; +extern cpuop_func_noret op_53e8_35_nf; +extern cpuop_func_noret op_53e8_35_ff; +extern cpuop_func_noret op_53f0_35_nf; +extern cpuop_func_noret op_53f0_35_ff; +extern cpuop_func_noret op_53f8_35_nf; +extern cpuop_func_noret op_53f8_35_ff; +extern cpuop_func_noret op_53f9_35_nf; +extern cpuop_func_noret op_53f9_35_ff; +extern cpuop_func_noret op_53fa_35_nf; +extern cpuop_func_noret op_53fa_35_ff; +extern cpuop_func_noret op_53fb_35_nf; +extern cpuop_func_noret op_53fb_35_ff; +extern cpuop_func_noret op_53fc_35_nf; +extern cpuop_func_noret op_53fc_35_ff; +extern cpuop_func_noret op_54c0_35_nf; +extern cpuop_func_noret op_54c0_35_ff; +extern cpuop_func_noret op_54c8_35_nf; +extern cpuop_func_noret op_54c8_35_ff; +extern cpuop_func_noret op_54d0_35_nf; +extern cpuop_func_noret op_54d0_35_ff; +extern cpuop_func_noret op_54d8_35_nf; +extern cpuop_func_noret op_54d8_35_ff; +extern cpuop_func_noret op_54e0_35_nf; +extern cpuop_func_noret op_54e0_35_ff; +extern cpuop_func_noret op_54e8_35_nf; +extern cpuop_func_noret op_54e8_35_ff; +extern cpuop_func_noret op_54f0_35_nf; +extern cpuop_func_noret op_54f0_35_ff; +extern cpuop_func_noret op_54f8_35_nf; +extern cpuop_func_noret op_54f8_35_ff; +extern cpuop_func_noret op_54f9_35_nf; +extern cpuop_func_noret op_54f9_35_ff; +extern cpuop_func_noret op_54fa_35_nf; +extern cpuop_func_noret op_54fa_35_ff; +extern cpuop_func_noret op_54fb_35_nf; +extern cpuop_func_noret op_54fb_35_ff; +extern cpuop_func_noret op_54fc_35_nf; +extern cpuop_func_noret op_54fc_35_ff; +extern cpuop_func_noret op_55c0_35_nf; +extern cpuop_func_noret op_55c0_35_ff; +extern cpuop_func_noret op_55c8_35_nf; +extern cpuop_func_noret op_55c8_35_ff; +extern cpuop_func_noret op_55d0_35_nf; +extern cpuop_func_noret op_55d0_35_ff; +extern cpuop_func_noret op_55d8_35_nf; +extern cpuop_func_noret op_55d8_35_ff; +extern cpuop_func_noret op_55e0_35_nf; +extern cpuop_func_noret op_55e0_35_ff; +extern cpuop_func_noret op_55e8_35_nf; +extern cpuop_func_noret op_55e8_35_ff; +extern cpuop_func_noret op_55f0_35_nf; +extern cpuop_func_noret op_55f0_35_ff; +extern cpuop_func_noret op_55f8_35_nf; +extern cpuop_func_noret op_55f8_35_ff; +extern cpuop_func_noret op_55f9_35_nf; +extern cpuop_func_noret op_55f9_35_ff; +extern cpuop_func_noret op_55fa_35_nf; +extern cpuop_func_noret op_55fa_35_ff; +extern cpuop_func_noret op_55fb_35_nf; +extern cpuop_func_noret op_55fb_35_ff; +extern cpuop_func_noret op_55fc_35_nf; +extern cpuop_func_noret op_55fc_35_ff; +extern cpuop_func_noret op_56c0_35_nf; +extern cpuop_func_noret op_56c0_35_ff; +extern cpuop_func_noret op_56c8_35_nf; +extern cpuop_func_noret op_56c8_35_ff; +extern cpuop_func_noret op_56d0_35_nf; +extern cpuop_func_noret op_56d0_35_ff; +extern cpuop_func_noret op_56d8_35_nf; +extern cpuop_func_noret op_56d8_35_ff; +extern cpuop_func_noret op_56e0_35_nf; +extern cpuop_func_noret op_56e0_35_ff; +extern cpuop_func_noret op_56e8_35_nf; +extern cpuop_func_noret op_56e8_35_ff; +extern cpuop_func_noret op_56f0_35_nf; +extern cpuop_func_noret op_56f0_35_ff; +extern cpuop_func_noret op_56f8_35_nf; +extern cpuop_func_noret op_56f8_35_ff; +extern cpuop_func_noret op_56f9_35_nf; +extern cpuop_func_noret op_56f9_35_ff; +extern cpuop_func_noret op_56fa_35_nf; +extern cpuop_func_noret op_56fa_35_ff; +extern cpuop_func_noret op_56fb_35_nf; +extern cpuop_func_noret op_56fb_35_ff; +extern cpuop_func_noret op_56fc_35_nf; +extern cpuop_func_noret op_56fc_35_ff; +extern cpuop_func_noret op_57c0_35_nf; +extern cpuop_func_noret op_57c0_35_ff; +extern cpuop_func_noret op_57c8_35_nf; +extern cpuop_func_noret op_57c8_35_ff; +extern cpuop_func_noret op_57d0_35_nf; +extern cpuop_func_noret op_57d0_35_ff; +extern cpuop_func_noret op_57d8_35_nf; +extern cpuop_func_noret op_57d8_35_ff; +extern cpuop_func_noret op_57e0_35_nf; +extern cpuop_func_noret op_57e0_35_ff; +extern cpuop_func_noret op_57e8_35_nf; +extern cpuop_func_noret op_57e8_35_ff; +extern cpuop_func_noret op_57f0_35_nf; +extern cpuop_func_noret op_57f0_35_ff; +extern cpuop_func_noret op_57f8_35_nf; +extern cpuop_func_noret op_57f8_35_ff; +extern cpuop_func_noret op_57f9_35_nf; +extern cpuop_func_noret op_57f9_35_ff; +extern cpuop_func_noret op_57fa_35_nf; +extern cpuop_func_noret op_57fa_35_ff; +extern cpuop_func_noret op_57fb_35_nf; +extern cpuop_func_noret op_57fb_35_ff; +extern cpuop_func_noret op_57fc_35_nf; +extern cpuop_func_noret op_57fc_35_ff; +extern cpuop_func_noret op_58c0_35_nf; +extern cpuop_func_noret op_58c0_35_ff; +extern cpuop_func_noret op_58c8_35_nf; +extern cpuop_func_noret op_58c8_35_ff; +extern cpuop_func_noret op_58d0_35_nf; +extern cpuop_func_noret op_58d0_35_ff; +extern cpuop_func_noret op_58d8_35_nf; +extern cpuop_func_noret op_58d8_35_ff; +extern cpuop_func_noret op_58e0_35_nf; +extern cpuop_func_noret op_58e0_35_ff; +extern cpuop_func_noret op_58e8_35_nf; +extern cpuop_func_noret op_58e8_35_ff; +extern cpuop_func_noret op_58f0_35_nf; +extern cpuop_func_noret op_58f0_35_ff; +extern cpuop_func_noret op_58f8_35_nf; +extern cpuop_func_noret op_58f8_35_ff; +extern cpuop_func_noret op_58f9_35_nf; +extern cpuop_func_noret op_58f9_35_ff; +extern cpuop_func_noret op_58fa_35_nf; +extern cpuop_func_noret op_58fa_35_ff; +extern cpuop_func_noret op_58fb_35_nf; +extern cpuop_func_noret op_58fb_35_ff; +extern cpuop_func_noret op_58fc_35_nf; +extern cpuop_func_noret op_58fc_35_ff; +extern cpuop_func_noret op_59c0_35_nf; +extern cpuop_func_noret op_59c0_35_ff; +extern cpuop_func_noret op_59c8_35_nf; +extern cpuop_func_noret op_59c8_35_ff; +extern cpuop_func_noret op_59d0_35_nf; +extern cpuop_func_noret op_59d0_35_ff; +extern cpuop_func_noret op_59d8_35_nf; +extern cpuop_func_noret op_59d8_35_ff; +extern cpuop_func_noret op_59e0_35_nf; +extern cpuop_func_noret op_59e0_35_ff; +extern cpuop_func_noret op_59e8_35_nf; +extern cpuop_func_noret op_59e8_35_ff; +extern cpuop_func_noret op_59f0_35_nf; +extern cpuop_func_noret op_59f0_35_ff; +extern cpuop_func_noret op_59f8_35_nf; +extern cpuop_func_noret op_59f8_35_ff; +extern cpuop_func_noret op_59f9_35_nf; +extern cpuop_func_noret op_59f9_35_ff; +extern cpuop_func_noret op_59fa_35_nf; +extern cpuop_func_noret op_59fa_35_ff; +extern cpuop_func_noret op_59fb_35_nf; +extern cpuop_func_noret op_59fb_35_ff; +extern cpuop_func_noret op_59fc_35_nf; +extern cpuop_func_noret op_59fc_35_ff; +extern cpuop_func_noret op_5ac0_35_nf; +extern cpuop_func_noret op_5ac0_35_ff; +extern cpuop_func_noret op_5ac8_35_nf; +extern cpuop_func_noret op_5ac8_35_ff; +extern cpuop_func_noret op_5ad0_35_nf; +extern cpuop_func_noret op_5ad0_35_ff; +extern cpuop_func_noret op_5ad8_35_nf; +extern cpuop_func_noret op_5ad8_35_ff; +extern cpuop_func_noret op_5ae0_35_nf; +extern cpuop_func_noret op_5ae0_35_ff; +extern cpuop_func_noret op_5ae8_35_nf; +extern cpuop_func_noret op_5ae8_35_ff; +extern cpuop_func_noret op_5af0_35_nf; +extern cpuop_func_noret op_5af0_35_ff; +extern cpuop_func_noret op_5af8_35_nf; +extern cpuop_func_noret op_5af8_35_ff; +extern cpuop_func_noret op_5af9_35_nf; +extern cpuop_func_noret op_5af9_35_ff; +extern cpuop_func_noret op_5afa_35_nf; +extern cpuop_func_noret op_5afa_35_ff; +extern cpuop_func_noret op_5afb_35_nf; +extern cpuop_func_noret op_5afb_35_ff; +extern cpuop_func_noret op_5afc_35_nf; +extern cpuop_func_noret op_5afc_35_ff; +extern cpuop_func_noret op_5bc0_35_nf; +extern cpuop_func_noret op_5bc0_35_ff; +extern cpuop_func_noret op_5bc8_35_nf; +extern cpuop_func_noret op_5bc8_35_ff; +extern cpuop_func_noret op_5bd0_35_nf; +extern cpuop_func_noret op_5bd0_35_ff; +extern cpuop_func_noret op_5bd8_35_nf; +extern cpuop_func_noret op_5bd8_35_ff; +extern cpuop_func_noret op_5be0_35_nf; +extern cpuop_func_noret op_5be0_35_ff; +extern cpuop_func_noret op_5be8_35_nf; +extern cpuop_func_noret op_5be8_35_ff; +extern cpuop_func_noret op_5bf0_35_nf; +extern cpuop_func_noret op_5bf0_35_ff; +extern cpuop_func_noret op_5bf8_35_nf; +extern cpuop_func_noret op_5bf8_35_ff; +extern cpuop_func_noret op_5bf9_35_nf; +extern cpuop_func_noret op_5bf9_35_ff; +extern cpuop_func_noret op_5bfa_35_nf; +extern cpuop_func_noret op_5bfa_35_ff; +extern cpuop_func_noret op_5bfb_35_nf; +extern cpuop_func_noret op_5bfb_35_ff; +extern cpuop_func_noret op_5bfc_35_nf; +extern cpuop_func_noret op_5bfc_35_ff; +extern cpuop_func_noret op_5cc0_35_nf; +extern cpuop_func_noret op_5cc0_35_ff; +extern cpuop_func_noret op_5cc8_35_nf; +extern cpuop_func_noret op_5cc8_35_ff; +extern cpuop_func_noret op_5cd0_35_nf; +extern cpuop_func_noret op_5cd0_35_ff; +extern cpuop_func_noret op_5cd8_35_nf; +extern cpuop_func_noret op_5cd8_35_ff; +extern cpuop_func_noret op_5ce0_35_nf; +extern cpuop_func_noret op_5ce0_35_ff; +extern cpuop_func_noret op_5ce8_35_nf; +extern cpuop_func_noret op_5ce8_35_ff; +extern cpuop_func_noret op_5cf0_35_nf; +extern cpuop_func_noret op_5cf0_35_ff; +extern cpuop_func_noret op_5cf8_35_nf; +extern cpuop_func_noret op_5cf8_35_ff; +extern cpuop_func_noret op_5cf9_35_nf; +extern cpuop_func_noret op_5cf9_35_ff; +extern cpuop_func_noret op_5cfa_35_nf; +extern cpuop_func_noret op_5cfa_35_ff; +extern cpuop_func_noret op_5cfb_35_nf; +extern cpuop_func_noret op_5cfb_35_ff; +extern cpuop_func_noret op_5cfc_35_nf; +extern cpuop_func_noret op_5cfc_35_ff; +extern cpuop_func_noret op_5dc0_35_nf; +extern cpuop_func_noret op_5dc0_35_ff; +extern cpuop_func_noret op_5dc8_35_nf; +extern cpuop_func_noret op_5dc8_35_ff; +extern cpuop_func_noret op_5dd0_35_nf; +extern cpuop_func_noret op_5dd0_35_ff; +extern cpuop_func_noret op_5dd8_35_nf; +extern cpuop_func_noret op_5dd8_35_ff; +extern cpuop_func_noret op_5de0_35_nf; +extern cpuop_func_noret op_5de0_35_ff; +extern cpuop_func_noret op_5de8_35_nf; +extern cpuop_func_noret op_5de8_35_ff; +extern cpuop_func_noret op_5df0_35_nf; +extern cpuop_func_noret op_5df0_35_ff; +extern cpuop_func_noret op_5df8_35_nf; +extern cpuop_func_noret op_5df8_35_ff; +extern cpuop_func_noret op_5df9_35_nf; +extern cpuop_func_noret op_5df9_35_ff; +extern cpuop_func_noret op_5dfa_35_nf; +extern cpuop_func_noret op_5dfa_35_ff; +extern cpuop_func_noret op_5dfb_35_nf; +extern cpuop_func_noret op_5dfb_35_ff; +extern cpuop_func_noret op_5dfc_35_nf; +extern cpuop_func_noret op_5dfc_35_ff; +extern cpuop_func_noret op_5ec0_35_nf; +extern cpuop_func_noret op_5ec0_35_ff; +extern cpuop_func_noret op_5ec8_35_nf; +extern cpuop_func_noret op_5ec8_35_ff; +extern cpuop_func_noret op_5ed0_35_nf; +extern cpuop_func_noret op_5ed0_35_ff; +extern cpuop_func_noret op_5ed8_35_nf; +extern cpuop_func_noret op_5ed8_35_ff; +extern cpuop_func_noret op_5ee0_35_nf; +extern cpuop_func_noret op_5ee0_35_ff; +extern cpuop_func_noret op_5ee8_35_nf; +extern cpuop_func_noret op_5ee8_35_ff; +extern cpuop_func_noret op_5ef0_35_nf; +extern cpuop_func_noret op_5ef0_35_ff; +extern cpuop_func_noret op_5ef8_35_nf; +extern cpuop_func_noret op_5ef8_35_ff; +extern cpuop_func_noret op_5ef9_35_nf; +extern cpuop_func_noret op_5ef9_35_ff; +extern cpuop_func_noret op_5efa_35_nf; +extern cpuop_func_noret op_5efa_35_ff; +extern cpuop_func_noret op_5efb_35_nf; +extern cpuop_func_noret op_5efb_35_ff; +extern cpuop_func_noret op_5efc_35_nf; +extern cpuop_func_noret op_5efc_35_ff; +extern cpuop_func_noret op_5fc0_35_nf; +extern cpuop_func_noret op_5fc0_35_ff; +extern cpuop_func_noret op_5fc8_35_nf; +extern cpuop_func_noret op_5fc8_35_ff; +extern cpuop_func_noret op_5fd0_35_nf; +extern cpuop_func_noret op_5fd0_35_ff; +extern cpuop_func_noret op_5fd8_35_nf; +extern cpuop_func_noret op_5fd8_35_ff; +extern cpuop_func_noret op_5fe0_35_nf; +extern cpuop_func_noret op_5fe0_35_ff; +extern cpuop_func_noret op_5fe8_35_nf; +extern cpuop_func_noret op_5fe8_35_ff; +extern cpuop_func_noret op_5ff0_35_nf; +extern cpuop_func_noret op_5ff0_35_ff; +extern cpuop_func_noret op_5ff8_35_nf; +extern cpuop_func_noret op_5ff8_35_ff; +extern cpuop_func_noret op_5ff9_35_nf; +extern cpuop_func_noret op_5ff9_35_ff; +extern cpuop_func_noret op_5ffa_35_nf; +extern cpuop_func_noret op_5ffa_35_ff; +extern cpuop_func_noret op_5ffb_35_nf; +extern cpuop_func_noret op_5ffb_35_ff; +extern cpuop_func_noret op_5ffc_35_nf; +extern cpuop_func_noret op_5ffc_35_ff; +extern cpuop_func_noret op_6000_35_nf; +extern cpuop_func_noret op_6000_35_ff; +extern cpuop_func_noret op_6001_35_nf; +extern cpuop_func_noret op_6001_35_ff; +extern cpuop_func_noret op_60ff_35_nf; +extern cpuop_func_noret op_60ff_35_ff; +extern cpuop_func_noret op_6100_35_nf; +extern cpuop_func_noret op_6100_35_ff; +extern cpuop_func_noret op_6101_35_nf; +extern cpuop_func_noret op_6101_35_ff; +extern cpuop_func_noret op_61ff_35_nf; +extern cpuop_func_noret op_61ff_35_ff; +extern cpuop_func_noret op_6200_35_nf; +extern cpuop_func_noret op_6200_35_ff; +extern cpuop_func_noret op_6201_35_nf; +extern cpuop_func_noret op_6201_35_ff; +extern cpuop_func_noret op_62ff_35_nf; +extern cpuop_func_noret op_62ff_35_ff; +extern cpuop_func_noret op_6300_35_nf; +extern cpuop_func_noret op_6300_35_ff; +extern cpuop_func_noret op_6301_35_nf; +extern cpuop_func_noret op_6301_35_ff; +extern cpuop_func_noret op_63ff_35_nf; +extern cpuop_func_noret op_63ff_35_ff; +extern cpuop_func_noret op_6400_35_nf; +extern cpuop_func_noret op_6400_35_ff; +extern cpuop_func_noret op_6401_35_nf; +extern cpuop_func_noret op_6401_35_ff; +extern cpuop_func_noret op_64ff_35_nf; +extern cpuop_func_noret op_64ff_35_ff; +extern cpuop_func_noret op_6500_35_nf; +extern cpuop_func_noret op_6500_35_ff; +extern cpuop_func_noret op_6501_35_nf; +extern cpuop_func_noret op_6501_35_ff; +extern cpuop_func_noret op_65ff_35_nf; +extern cpuop_func_noret op_65ff_35_ff; +extern cpuop_func_noret op_6600_35_nf; +extern cpuop_func_noret op_6600_35_ff; +extern cpuop_func_noret op_6601_35_nf; +extern cpuop_func_noret op_6601_35_ff; +extern cpuop_func_noret op_66ff_35_nf; +extern cpuop_func_noret op_66ff_35_ff; +extern cpuop_func_noret op_6700_35_nf; +extern cpuop_func_noret op_6700_35_ff; +extern cpuop_func_noret op_6701_35_nf; +extern cpuop_func_noret op_6701_35_ff; +extern cpuop_func_noret op_67ff_35_nf; +extern cpuop_func_noret op_67ff_35_ff; +extern cpuop_func_noret op_6800_35_nf; +extern cpuop_func_noret op_6800_35_ff; +extern cpuop_func_noret op_6801_35_nf; +extern cpuop_func_noret op_6801_35_ff; +extern cpuop_func_noret op_68ff_35_nf; +extern cpuop_func_noret op_68ff_35_ff; +extern cpuop_func_noret op_6900_35_nf; +extern cpuop_func_noret op_6900_35_ff; +extern cpuop_func_noret op_6901_35_nf; +extern cpuop_func_noret op_6901_35_ff; +extern cpuop_func_noret op_69ff_35_nf; +extern cpuop_func_noret op_69ff_35_ff; +extern cpuop_func_noret op_6a00_35_nf; +extern cpuop_func_noret op_6a00_35_ff; +extern cpuop_func_noret op_6a01_35_nf; +extern cpuop_func_noret op_6a01_35_ff; +extern cpuop_func_noret op_6aff_35_nf; +extern cpuop_func_noret op_6aff_35_ff; +extern cpuop_func_noret op_6b00_35_nf; +extern cpuop_func_noret op_6b00_35_ff; +extern cpuop_func_noret op_6b01_35_nf; +extern cpuop_func_noret op_6b01_35_ff; +extern cpuop_func_noret op_6bff_35_nf; +extern cpuop_func_noret op_6bff_35_ff; +extern cpuop_func_noret op_6c00_35_nf; +extern cpuop_func_noret op_6c00_35_ff; +extern cpuop_func_noret op_6c01_35_nf; +extern cpuop_func_noret op_6c01_35_ff; +extern cpuop_func_noret op_6cff_35_nf; +extern cpuop_func_noret op_6cff_35_ff; +extern cpuop_func_noret op_6d00_35_nf; +extern cpuop_func_noret op_6d00_35_ff; +extern cpuop_func_noret op_6d01_35_nf; +extern cpuop_func_noret op_6d01_35_ff; +extern cpuop_func_noret op_6dff_35_nf; +extern cpuop_func_noret op_6dff_35_ff; +extern cpuop_func_noret op_6e00_35_nf; +extern cpuop_func_noret op_6e00_35_ff; +extern cpuop_func_noret op_6e01_35_nf; +extern cpuop_func_noret op_6e01_35_ff; +extern cpuop_func_noret op_6eff_35_nf; +extern cpuop_func_noret op_6eff_35_ff; +extern cpuop_func_noret op_6f00_35_nf; +extern cpuop_func_noret op_6f00_35_ff; +extern cpuop_func_noret op_6f01_35_nf; +extern cpuop_func_noret op_6f01_35_ff; +extern cpuop_func_noret op_6fff_35_nf; +extern cpuop_func_noret op_6fff_35_ff; +extern cpuop_func_noret op_7000_35_nf; +extern cpuop_func_noret op_7000_35_ff; +extern cpuop_func_noret op_8000_35_nf; +extern cpuop_func_noret op_8000_35_ff; +extern cpuop_func_noret op_8010_35_nf; +extern cpuop_func_noret op_8010_35_ff; +extern cpuop_func_noret op_8018_35_nf; +extern cpuop_func_noret op_8018_35_ff; +extern cpuop_func_noret op_8020_35_nf; +extern cpuop_func_noret op_8020_35_ff; +extern cpuop_func_noret op_8028_35_nf; +extern cpuop_func_noret op_8028_35_ff; +extern cpuop_func_noret op_8030_35_nf; +extern cpuop_func_noret op_8030_35_ff; +extern cpuop_func_noret op_8038_35_nf; +extern cpuop_func_noret op_8038_35_ff; +extern cpuop_func_noret op_8039_35_nf; +extern cpuop_func_noret op_8039_35_ff; +extern cpuop_func_noret op_803a_35_nf; +extern cpuop_func_noret op_803a_35_ff; +extern cpuop_func_noret op_803b_35_nf; +extern cpuop_func_noret op_803b_35_ff; +extern cpuop_func_noret op_803c_35_nf; +extern cpuop_func_noret op_803c_35_ff; +extern cpuop_func_noret op_8040_35_nf; +extern cpuop_func_noret op_8040_35_ff; +extern cpuop_func_noret op_8050_35_nf; +extern cpuop_func_noret op_8050_35_ff; +extern cpuop_func_noret op_8058_35_nf; +extern cpuop_func_noret op_8058_35_ff; +extern cpuop_func_noret op_8060_35_nf; +extern cpuop_func_noret op_8060_35_ff; +extern cpuop_func_noret op_8068_35_nf; +extern cpuop_func_noret op_8068_35_ff; +extern cpuop_func_noret op_8070_35_nf; +extern cpuop_func_noret op_8070_35_ff; +extern cpuop_func_noret op_8078_35_nf; +extern cpuop_func_noret op_8078_35_ff; +extern cpuop_func_noret op_8079_35_nf; +extern cpuop_func_noret op_8079_35_ff; +extern cpuop_func_noret op_807a_35_nf; +extern cpuop_func_noret op_807a_35_ff; +extern cpuop_func_noret op_807b_35_nf; +extern cpuop_func_noret op_807b_35_ff; +extern cpuop_func_noret op_807c_35_nf; +extern cpuop_func_noret op_807c_35_ff; +extern cpuop_func_noret op_8080_35_nf; +extern cpuop_func_noret op_8080_35_ff; +extern cpuop_func_noret op_8090_35_nf; +extern cpuop_func_noret op_8090_35_ff; +extern cpuop_func_noret op_8098_35_nf; +extern cpuop_func_noret op_8098_35_ff; +extern cpuop_func_noret op_80a0_35_nf; +extern cpuop_func_noret op_80a0_35_ff; +extern cpuop_func_noret op_80a8_35_nf; +extern cpuop_func_noret op_80a8_35_ff; +extern cpuop_func_noret op_80b0_35_nf; +extern cpuop_func_noret op_80b0_35_ff; +extern cpuop_func_noret op_80b8_35_nf; +extern cpuop_func_noret op_80b8_35_ff; +extern cpuop_func_noret op_80b9_35_nf; +extern cpuop_func_noret op_80b9_35_ff; +extern cpuop_func_noret op_80ba_35_nf; +extern cpuop_func_noret op_80ba_35_ff; +extern cpuop_func_noret op_80bb_35_nf; +extern cpuop_func_noret op_80bb_35_ff; +extern cpuop_func_noret op_80bc_35_nf; +extern cpuop_func_noret op_80bc_35_ff; +extern cpuop_func_noret op_80c0_35_nf; +extern cpuop_func_noret op_80c0_35_ff; +extern cpuop_func_noret op_80d0_35_nf; +extern cpuop_func_noret op_80d0_35_ff; +extern cpuop_func_noret op_80d8_35_nf; +extern cpuop_func_noret op_80d8_35_ff; +extern cpuop_func_noret op_80e0_35_nf; +extern cpuop_func_noret op_80e0_35_ff; +extern cpuop_func_noret op_80e8_35_nf; +extern cpuop_func_noret op_80e8_35_ff; +extern cpuop_func_noret op_80f0_35_nf; +extern cpuop_func_noret op_80f0_35_ff; +extern cpuop_func_noret op_80f8_35_nf; +extern cpuop_func_noret op_80f8_35_ff; +extern cpuop_func_noret op_80f9_35_nf; +extern cpuop_func_noret op_80f9_35_ff; +extern cpuop_func_noret op_80fa_35_nf; +extern cpuop_func_noret op_80fa_35_ff; +extern cpuop_func_noret op_80fb_35_nf; +extern cpuop_func_noret op_80fb_35_ff; +extern cpuop_func_noret op_80fc_35_nf; +extern cpuop_func_noret op_80fc_35_ff; +extern cpuop_func_noret op_8100_35_nf; +extern cpuop_func_noret op_8100_35_ff; +extern cpuop_func_noret op_8108_35_nf; +extern cpuop_func_noret op_8108_35_ff; +extern cpuop_func_noret op_8110_35_nf; +extern cpuop_func_noret op_8110_35_ff; +extern cpuop_func_noret op_8118_35_nf; +extern cpuop_func_noret op_8118_35_ff; +extern cpuop_func_noret op_8120_35_nf; +extern cpuop_func_noret op_8120_35_ff; +extern cpuop_func_noret op_8128_35_nf; +extern cpuop_func_noret op_8128_35_ff; +extern cpuop_func_noret op_8130_35_nf; +extern cpuop_func_noret op_8130_35_ff; +extern cpuop_func_noret op_8138_35_nf; +extern cpuop_func_noret op_8138_35_ff; +extern cpuop_func_noret op_8139_35_nf; +extern cpuop_func_noret op_8139_35_ff; +extern cpuop_func_noret op_8140_35_nf; +extern cpuop_func_noret op_8140_35_ff; +extern cpuop_func_noret op_8148_35_nf; +extern cpuop_func_noret op_8148_35_ff; +extern cpuop_func_noret op_8150_35_nf; +extern cpuop_func_noret op_8150_35_ff; +extern cpuop_func_noret op_8158_35_nf; +extern cpuop_func_noret op_8158_35_ff; +extern cpuop_func_noret op_8160_35_nf; +extern cpuop_func_noret op_8160_35_ff; +extern cpuop_func_noret op_8168_35_nf; +extern cpuop_func_noret op_8168_35_ff; +extern cpuop_func_noret op_8170_35_nf; +extern cpuop_func_noret op_8170_35_ff; +extern cpuop_func_noret op_8178_35_nf; +extern cpuop_func_noret op_8178_35_ff; +extern cpuop_func_noret op_8179_35_nf; +extern cpuop_func_noret op_8179_35_ff; +extern cpuop_func_noret op_8180_35_nf; +extern cpuop_func_noret op_8180_35_ff; +extern cpuop_func_noret op_8188_35_nf; +extern cpuop_func_noret op_8188_35_ff; +extern cpuop_func_noret op_8190_35_nf; +extern cpuop_func_noret op_8190_35_ff; +extern cpuop_func_noret op_8198_35_nf; +extern cpuop_func_noret op_8198_35_ff; +extern cpuop_func_noret op_81a0_35_nf; +extern cpuop_func_noret op_81a0_35_ff; +extern cpuop_func_noret op_81a8_35_nf; +extern cpuop_func_noret op_81a8_35_ff; +extern cpuop_func_noret op_81b0_35_nf; +extern cpuop_func_noret op_81b0_35_ff; +extern cpuop_func_noret op_81b8_35_nf; +extern cpuop_func_noret op_81b8_35_ff; +extern cpuop_func_noret op_81b9_35_nf; +extern cpuop_func_noret op_81b9_35_ff; +extern cpuop_func_noret op_81c0_35_nf; +extern cpuop_func_noret op_81c0_35_ff; +extern cpuop_func_noret op_81d0_35_nf; +extern cpuop_func_noret op_81d0_35_ff; +extern cpuop_func_noret op_81d8_35_nf; +extern cpuop_func_noret op_81d8_35_ff; +extern cpuop_func_noret op_81e0_35_nf; +extern cpuop_func_noret op_81e0_35_ff; +extern cpuop_func_noret op_81e8_35_nf; +extern cpuop_func_noret op_81e8_35_ff; +extern cpuop_func_noret op_81f0_35_nf; +extern cpuop_func_noret op_81f0_35_ff; +extern cpuop_func_noret op_81f8_35_nf; +extern cpuop_func_noret op_81f8_35_ff; +extern cpuop_func_noret op_81f9_35_nf; +extern cpuop_func_noret op_81f9_35_ff; +extern cpuop_func_noret op_81fa_35_nf; +extern cpuop_func_noret op_81fa_35_ff; +extern cpuop_func_noret op_81fb_35_nf; +extern cpuop_func_noret op_81fb_35_ff; +extern cpuop_func_noret op_81fc_35_nf; +extern cpuop_func_noret op_81fc_35_ff; +extern cpuop_func_noret op_9000_35_nf; +extern cpuop_func_noret op_9000_35_ff; +extern cpuop_func_noret op_9010_35_nf; +extern cpuop_func_noret op_9010_35_ff; +extern cpuop_func_noret op_9018_35_nf; +extern cpuop_func_noret op_9018_35_ff; +extern cpuop_func_noret op_9020_35_nf; +extern cpuop_func_noret op_9020_35_ff; +extern cpuop_func_noret op_9028_35_nf; +extern cpuop_func_noret op_9028_35_ff; +extern cpuop_func_noret op_9030_35_nf; +extern cpuop_func_noret op_9030_35_ff; +extern cpuop_func_noret op_9038_35_nf; +extern cpuop_func_noret op_9038_35_ff; +extern cpuop_func_noret op_9039_35_nf; +extern cpuop_func_noret op_9039_35_ff; +extern cpuop_func_noret op_903a_35_nf; +extern cpuop_func_noret op_903a_35_ff; +extern cpuop_func_noret op_903b_35_nf; +extern cpuop_func_noret op_903b_35_ff; +extern cpuop_func_noret op_903c_35_nf; +extern cpuop_func_noret op_903c_35_ff; +extern cpuop_func_noret op_9040_35_nf; +extern cpuop_func_noret op_9040_35_ff; +extern cpuop_func_noret op_9048_35_nf; +extern cpuop_func_noret op_9048_35_ff; +extern cpuop_func_noret op_9050_35_nf; +extern cpuop_func_noret op_9050_35_ff; +extern cpuop_func_noret op_9058_35_nf; +extern cpuop_func_noret op_9058_35_ff; +extern cpuop_func_noret op_9060_35_nf; +extern cpuop_func_noret op_9060_35_ff; +extern cpuop_func_noret op_9068_35_nf; +extern cpuop_func_noret op_9068_35_ff; +extern cpuop_func_noret op_9070_35_nf; +extern cpuop_func_noret op_9070_35_ff; +extern cpuop_func_noret op_9078_35_nf; +extern cpuop_func_noret op_9078_35_ff; +extern cpuop_func_noret op_9079_35_nf; +extern cpuop_func_noret op_9079_35_ff; +extern cpuop_func_noret op_907a_35_nf; +extern cpuop_func_noret op_907a_35_ff; +extern cpuop_func_noret op_907b_35_nf; +extern cpuop_func_noret op_907b_35_ff; +extern cpuop_func_noret op_907c_35_nf; +extern cpuop_func_noret op_907c_35_ff; +extern cpuop_func_noret op_9080_35_nf; +extern cpuop_func_noret op_9080_35_ff; +extern cpuop_func_noret op_9088_35_nf; +extern cpuop_func_noret op_9088_35_ff; +extern cpuop_func_noret op_9090_35_nf; +extern cpuop_func_noret op_9090_35_ff; +extern cpuop_func_noret op_9098_35_nf; +extern cpuop_func_noret op_9098_35_ff; +extern cpuop_func_noret op_90a0_35_nf; +extern cpuop_func_noret op_90a0_35_ff; +extern cpuop_func_noret op_90a8_35_nf; +extern cpuop_func_noret op_90a8_35_ff; +extern cpuop_func_noret op_90b0_35_nf; +extern cpuop_func_noret op_90b0_35_ff; +extern cpuop_func_noret op_90b8_35_nf; +extern cpuop_func_noret op_90b8_35_ff; +extern cpuop_func_noret op_90b9_35_nf; +extern cpuop_func_noret op_90b9_35_ff; +extern cpuop_func_noret op_90ba_35_nf; +extern cpuop_func_noret op_90ba_35_ff; +extern cpuop_func_noret op_90bb_35_nf; +extern cpuop_func_noret op_90bb_35_ff; +extern cpuop_func_noret op_90bc_35_nf; +extern cpuop_func_noret op_90bc_35_ff; +extern cpuop_func_noret op_90c0_35_nf; +extern cpuop_func_noret op_90c0_35_ff; +extern cpuop_func_noret op_90c8_35_nf; +extern cpuop_func_noret op_90c8_35_ff; +extern cpuop_func_noret op_90d0_35_nf; +extern cpuop_func_noret op_90d0_35_ff; +extern cpuop_func_noret op_90d8_35_nf; +extern cpuop_func_noret op_90d8_35_ff; +extern cpuop_func_noret op_90e0_35_nf; +extern cpuop_func_noret op_90e0_35_ff; +extern cpuop_func_noret op_90e8_35_nf; +extern cpuop_func_noret op_90e8_35_ff; +extern cpuop_func_noret op_90f0_35_nf; +extern cpuop_func_noret op_90f0_35_ff; +extern cpuop_func_noret op_90f8_35_nf; +extern cpuop_func_noret op_90f8_35_ff; +extern cpuop_func_noret op_90f9_35_nf; +extern cpuop_func_noret op_90f9_35_ff; +extern cpuop_func_noret op_90fa_35_nf; +extern cpuop_func_noret op_90fa_35_ff; +extern cpuop_func_noret op_90fb_35_nf; +extern cpuop_func_noret op_90fb_35_ff; +extern cpuop_func_noret op_90fc_35_nf; +extern cpuop_func_noret op_90fc_35_ff; +extern cpuop_func_noret op_9100_35_nf; +extern cpuop_func_noret op_9100_35_ff; +extern cpuop_func_noret op_9108_35_nf; +extern cpuop_func_noret op_9108_35_ff; +extern cpuop_func_noret op_9110_35_nf; +extern cpuop_func_noret op_9110_35_ff; +extern cpuop_func_noret op_9118_35_nf; +extern cpuop_func_noret op_9118_35_ff; +extern cpuop_func_noret op_9120_35_nf; +extern cpuop_func_noret op_9120_35_ff; +extern cpuop_func_noret op_9128_35_nf; +extern cpuop_func_noret op_9128_35_ff; +extern cpuop_func_noret op_9130_35_nf; +extern cpuop_func_noret op_9130_35_ff; +extern cpuop_func_noret op_9138_35_nf; +extern cpuop_func_noret op_9138_35_ff; +extern cpuop_func_noret op_9139_35_nf; +extern cpuop_func_noret op_9139_35_ff; +extern cpuop_func_noret op_9140_35_nf; +extern cpuop_func_noret op_9140_35_ff; +extern cpuop_func_noret op_9148_35_nf; +extern cpuop_func_noret op_9148_35_ff; +extern cpuop_func_noret op_9150_35_nf; +extern cpuop_func_noret op_9150_35_ff; +extern cpuop_func_noret op_9158_35_nf; +extern cpuop_func_noret op_9158_35_ff; +extern cpuop_func_noret op_9160_35_nf; +extern cpuop_func_noret op_9160_35_ff; +extern cpuop_func_noret op_9168_35_nf; +extern cpuop_func_noret op_9168_35_ff; +extern cpuop_func_noret op_9170_35_nf; +extern cpuop_func_noret op_9170_35_ff; +extern cpuop_func_noret op_9178_35_nf; +extern cpuop_func_noret op_9178_35_ff; +extern cpuop_func_noret op_9179_35_nf; +extern cpuop_func_noret op_9179_35_ff; +extern cpuop_func_noret op_9180_35_nf; +extern cpuop_func_noret op_9180_35_ff; +extern cpuop_func_noret op_9188_35_nf; +extern cpuop_func_noret op_9188_35_ff; +extern cpuop_func_noret op_9190_35_nf; +extern cpuop_func_noret op_9190_35_ff; +extern cpuop_func_noret op_9198_35_nf; +extern cpuop_func_noret op_9198_35_ff; +extern cpuop_func_noret op_91a0_35_nf; +extern cpuop_func_noret op_91a0_35_ff; +extern cpuop_func_noret op_91a8_35_nf; +extern cpuop_func_noret op_91a8_35_ff; +extern cpuop_func_noret op_91b0_35_nf; +extern cpuop_func_noret op_91b0_35_ff; +extern cpuop_func_noret op_91b8_35_nf; +extern cpuop_func_noret op_91b8_35_ff; +extern cpuop_func_noret op_91b9_35_nf; +extern cpuop_func_noret op_91b9_35_ff; +extern cpuop_func_noret op_91c0_35_nf; +extern cpuop_func_noret op_91c0_35_ff; +extern cpuop_func_noret op_91c8_35_nf; +extern cpuop_func_noret op_91c8_35_ff; +extern cpuop_func_noret op_91d0_35_nf; +extern cpuop_func_noret op_91d0_35_ff; +extern cpuop_func_noret op_91d8_35_nf; +extern cpuop_func_noret op_91d8_35_ff; +extern cpuop_func_noret op_91e0_35_nf; +extern cpuop_func_noret op_91e0_35_ff; +extern cpuop_func_noret op_91e8_35_nf; +extern cpuop_func_noret op_91e8_35_ff; +extern cpuop_func_noret op_91f0_35_nf; +extern cpuop_func_noret op_91f0_35_ff; +extern cpuop_func_noret op_91f8_35_nf; +extern cpuop_func_noret op_91f8_35_ff; +extern cpuop_func_noret op_91f9_35_nf; +extern cpuop_func_noret op_91f9_35_ff; +extern cpuop_func_noret op_91fa_35_nf; +extern cpuop_func_noret op_91fa_35_ff; +extern cpuop_func_noret op_91fb_35_nf; +extern cpuop_func_noret op_91fb_35_ff; +extern cpuop_func_noret op_91fc_35_nf; +extern cpuop_func_noret op_91fc_35_ff; +extern cpuop_func_noret op_b000_35_nf; +extern cpuop_func_noret op_b000_35_ff; +extern cpuop_func_noret op_b010_35_nf; +extern cpuop_func_noret op_b010_35_ff; +extern cpuop_func_noret op_b018_35_nf; +extern cpuop_func_noret op_b018_35_ff; +extern cpuop_func_noret op_b020_35_nf; +extern cpuop_func_noret op_b020_35_ff; +extern cpuop_func_noret op_b028_35_nf; +extern cpuop_func_noret op_b028_35_ff; +extern cpuop_func_noret op_b030_35_nf; +extern cpuop_func_noret op_b030_35_ff; +extern cpuop_func_noret op_b038_35_nf; +extern cpuop_func_noret op_b038_35_ff; +extern cpuop_func_noret op_b039_35_nf; +extern cpuop_func_noret op_b039_35_ff; +extern cpuop_func_noret op_b03a_35_nf; +extern cpuop_func_noret op_b03a_35_ff; +extern cpuop_func_noret op_b03b_35_nf; +extern cpuop_func_noret op_b03b_35_ff; +extern cpuop_func_noret op_b03c_35_nf; +extern cpuop_func_noret op_b03c_35_ff; +extern cpuop_func_noret op_b040_35_nf; +extern cpuop_func_noret op_b040_35_ff; +extern cpuop_func_noret op_b048_35_nf; +extern cpuop_func_noret op_b048_35_ff; +extern cpuop_func_noret op_b050_35_nf; +extern cpuop_func_noret op_b050_35_ff; +extern cpuop_func_noret op_b058_35_nf; +extern cpuop_func_noret op_b058_35_ff; +extern cpuop_func_noret op_b060_35_nf; +extern cpuop_func_noret op_b060_35_ff; +extern cpuop_func_noret op_b068_35_nf; +extern cpuop_func_noret op_b068_35_ff; +extern cpuop_func_noret op_b070_35_nf; +extern cpuop_func_noret op_b070_35_ff; +extern cpuop_func_noret op_b078_35_nf; +extern cpuop_func_noret op_b078_35_ff; +extern cpuop_func_noret op_b079_35_nf; +extern cpuop_func_noret op_b079_35_ff; +extern cpuop_func_noret op_b07a_35_nf; +extern cpuop_func_noret op_b07a_35_ff; +extern cpuop_func_noret op_b07b_35_nf; +extern cpuop_func_noret op_b07b_35_ff; +extern cpuop_func_noret op_b07c_35_nf; +extern cpuop_func_noret op_b07c_35_ff; +extern cpuop_func_noret op_b080_35_nf; +extern cpuop_func_noret op_b080_35_ff; +extern cpuop_func_noret op_b088_35_nf; +extern cpuop_func_noret op_b088_35_ff; +extern cpuop_func_noret op_b090_35_nf; +extern cpuop_func_noret op_b090_35_ff; +extern cpuop_func_noret op_b098_35_nf; +extern cpuop_func_noret op_b098_35_ff; +extern cpuop_func_noret op_b0a0_35_nf; +extern cpuop_func_noret op_b0a0_35_ff; +extern cpuop_func_noret op_b0a8_35_nf; +extern cpuop_func_noret op_b0a8_35_ff; +extern cpuop_func_noret op_b0b0_35_nf; +extern cpuop_func_noret op_b0b0_35_ff; +extern cpuop_func_noret op_b0b8_35_nf; +extern cpuop_func_noret op_b0b8_35_ff; +extern cpuop_func_noret op_b0b9_35_nf; +extern cpuop_func_noret op_b0b9_35_ff; +extern cpuop_func_noret op_b0ba_35_nf; +extern cpuop_func_noret op_b0ba_35_ff; +extern cpuop_func_noret op_b0bb_35_nf; +extern cpuop_func_noret op_b0bb_35_ff; +extern cpuop_func_noret op_b0bc_35_nf; +extern cpuop_func_noret op_b0bc_35_ff; +extern cpuop_func_noret op_b0c0_35_nf; +extern cpuop_func_noret op_b0c0_35_ff; +extern cpuop_func_noret op_b0c8_35_nf; +extern cpuop_func_noret op_b0c8_35_ff; +extern cpuop_func_noret op_b0d0_35_nf; +extern cpuop_func_noret op_b0d0_35_ff; +extern cpuop_func_noret op_b0d8_35_nf; +extern cpuop_func_noret op_b0d8_35_ff; +extern cpuop_func_noret op_b0e0_35_nf; +extern cpuop_func_noret op_b0e0_35_ff; +extern cpuop_func_noret op_b0e8_35_nf; +extern cpuop_func_noret op_b0e8_35_ff; +extern cpuop_func_noret op_b0f0_35_nf; +extern cpuop_func_noret op_b0f0_35_ff; +extern cpuop_func_noret op_b0f8_35_nf; +extern cpuop_func_noret op_b0f8_35_ff; +extern cpuop_func_noret op_b0f9_35_nf; +extern cpuop_func_noret op_b0f9_35_ff; +extern cpuop_func_noret op_b0fa_35_nf; +extern cpuop_func_noret op_b0fa_35_ff; +extern cpuop_func_noret op_b0fb_35_nf; +extern cpuop_func_noret op_b0fb_35_ff; +extern cpuop_func_noret op_b0fc_35_nf; +extern cpuop_func_noret op_b0fc_35_ff; +extern cpuop_func_noret op_b100_35_nf; +extern cpuop_func_noret op_b100_35_ff; +extern cpuop_func_noret op_b108_35_nf; +extern cpuop_func_noret op_b108_35_ff; +extern cpuop_func_noret op_b110_35_nf; +extern cpuop_func_noret op_b110_35_ff; +extern cpuop_func_noret op_b118_35_nf; +extern cpuop_func_noret op_b118_35_ff; +extern cpuop_func_noret op_b120_35_nf; +extern cpuop_func_noret op_b120_35_ff; +extern cpuop_func_noret op_b128_35_nf; +extern cpuop_func_noret op_b128_35_ff; +extern cpuop_func_noret op_b130_35_nf; +extern cpuop_func_noret op_b130_35_ff; +extern cpuop_func_noret op_b138_35_nf; +extern cpuop_func_noret op_b138_35_ff; +extern cpuop_func_noret op_b139_35_nf; +extern cpuop_func_noret op_b139_35_ff; +extern cpuop_func_noret op_b140_35_nf; +extern cpuop_func_noret op_b140_35_ff; +extern cpuop_func_noret op_b148_35_nf; +extern cpuop_func_noret op_b148_35_ff; +extern cpuop_func_noret op_b150_35_nf; +extern cpuop_func_noret op_b150_35_ff; +extern cpuop_func_noret op_b158_35_nf; +extern cpuop_func_noret op_b158_35_ff; +extern cpuop_func_noret op_b160_35_nf; +extern cpuop_func_noret op_b160_35_ff; +extern cpuop_func_noret op_b168_35_nf; +extern cpuop_func_noret op_b168_35_ff; +extern cpuop_func_noret op_b170_35_nf; +extern cpuop_func_noret op_b170_35_ff; +extern cpuop_func_noret op_b178_35_nf; +extern cpuop_func_noret op_b178_35_ff; +extern cpuop_func_noret op_b179_35_nf; +extern cpuop_func_noret op_b179_35_ff; +extern cpuop_func_noret op_b180_35_nf; +extern cpuop_func_noret op_b180_35_ff; +extern cpuop_func_noret op_b188_35_nf; +extern cpuop_func_noret op_b188_35_ff; +extern cpuop_func_noret op_b190_35_nf; +extern cpuop_func_noret op_b190_35_ff; +extern cpuop_func_noret op_b198_35_nf; +extern cpuop_func_noret op_b198_35_ff; +extern cpuop_func_noret op_b1a0_35_nf; +extern cpuop_func_noret op_b1a0_35_ff; +extern cpuop_func_noret op_b1a8_35_nf; +extern cpuop_func_noret op_b1a8_35_ff; +extern cpuop_func_noret op_b1b0_35_nf; +extern cpuop_func_noret op_b1b0_35_ff; +extern cpuop_func_noret op_b1b8_35_nf; +extern cpuop_func_noret op_b1b8_35_ff; +extern cpuop_func_noret op_b1b9_35_nf; +extern cpuop_func_noret op_b1b9_35_ff; +extern cpuop_func_noret op_b1c0_35_nf; +extern cpuop_func_noret op_b1c0_35_ff; +extern cpuop_func_noret op_b1c8_35_nf; +extern cpuop_func_noret op_b1c8_35_ff; +extern cpuop_func_noret op_b1d0_35_nf; +extern cpuop_func_noret op_b1d0_35_ff; +extern cpuop_func_noret op_b1d8_35_nf; +extern cpuop_func_noret op_b1d8_35_ff; +extern cpuop_func_noret op_b1e0_35_nf; +extern cpuop_func_noret op_b1e0_35_ff; +extern cpuop_func_noret op_b1e8_35_nf; +extern cpuop_func_noret op_b1e8_35_ff; +extern cpuop_func_noret op_b1f0_35_nf; +extern cpuop_func_noret op_b1f0_35_ff; +extern cpuop_func_noret op_b1f8_35_nf; +extern cpuop_func_noret op_b1f8_35_ff; +extern cpuop_func_noret op_b1f9_35_nf; +extern cpuop_func_noret op_b1f9_35_ff; +extern cpuop_func_noret op_b1fa_35_nf; +extern cpuop_func_noret op_b1fa_35_ff; +extern cpuop_func_noret op_b1fb_35_nf; +extern cpuop_func_noret op_b1fb_35_ff; +extern cpuop_func_noret op_b1fc_35_nf; +extern cpuop_func_noret op_b1fc_35_ff; +extern cpuop_func_noret op_c000_35_nf; +extern cpuop_func_noret op_c000_35_ff; +extern cpuop_func_noret op_c010_35_nf; +extern cpuop_func_noret op_c010_35_ff; +extern cpuop_func_noret op_c018_35_nf; +extern cpuop_func_noret op_c018_35_ff; +extern cpuop_func_noret op_c020_35_nf; +extern cpuop_func_noret op_c020_35_ff; +extern cpuop_func_noret op_c028_35_nf; +extern cpuop_func_noret op_c028_35_ff; +extern cpuop_func_noret op_c030_35_nf; +extern cpuop_func_noret op_c030_35_ff; +extern cpuop_func_noret op_c038_35_nf; +extern cpuop_func_noret op_c038_35_ff; +extern cpuop_func_noret op_c039_35_nf; +extern cpuop_func_noret op_c039_35_ff; +extern cpuop_func_noret op_c03a_35_nf; +extern cpuop_func_noret op_c03a_35_ff; +extern cpuop_func_noret op_c03b_35_nf; +extern cpuop_func_noret op_c03b_35_ff; +extern cpuop_func_noret op_c03c_35_nf; +extern cpuop_func_noret op_c03c_35_ff; +extern cpuop_func_noret op_c040_35_nf; +extern cpuop_func_noret op_c040_35_ff; +extern cpuop_func_noret op_c050_35_nf; +extern cpuop_func_noret op_c050_35_ff; +extern cpuop_func_noret op_c058_35_nf; +extern cpuop_func_noret op_c058_35_ff; +extern cpuop_func_noret op_c060_35_nf; +extern cpuop_func_noret op_c060_35_ff; +extern cpuop_func_noret op_c068_35_nf; +extern cpuop_func_noret op_c068_35_ff; +extern cpuop_func_noret op_c070_35_nf; +extern cpuop_func_noret op_c070_35_ff; +extern cpuop_func_noret op_c078_35_nf; +extern cpuop_func_noret op_c078_35_ff; +extern cpuop_func_noret op_c079_35_nf; +extern cpuop_func_noret op_c079_35_ff; +extern cpuop_func_noret op_c07a_35_nf; +extern cpuop_func_noret op_c07a_35_ff; +extern cpuop_func_noret op_c07b_35_nf; +extern cpuop_func_noret op_c07b_35_ff; +extern cpuop_func_noret op_c07c_35_nf; +extern cpuop_func_noret op_c07c_35_ff; +extern cpuop_func_noret op_c080_35_nf; +extern cpuop_func_noret op_c080_35_ff; +extern cpuop_func_noret op_c090_35_nf; +extern cpuop_func_noret op_c090_35_ff; +extern cpuop_func_noret op_c098_35_nf; +extern cpuop_func_noret op_c098_35_ff; +extern cpuop_func_noret op_c0a0_35_nf; +extern cpuop_func_noret op_c0a0_35_ff; +extern cpuop_func_noret op_c0a8_35_nf; +extern cpuop_func_noret op_c0a8_35_ff; +extern cpuop_func_noret op_c0b0_35_nf; +extern cpuop_func_noret op_c0b0_35_ff; +extern cpuop_func_noret op_c0b8_35_nf; +extern cpuop_func_noret op_c0b8_35_ff; +extern cpuop_func_noret op_c0b9_35_nf; +extern cpuop_func_noret op_c0b9_35_ff; +extern cpuop_func_noret op_c0ba_35_nf; +extern cpuop_func_noret op_c0ba_35_ff; +extern cpuop_func_noret op_c0bb_35_nf; +extern cpuop_func_noret op_c0bb_35_ff; +extern cpuop_func_noret op_c0bc_35_nf; +extern cpuop_func_noret op_c0bc_35_ff; +extern cpuop_func_noret op_c0c0_35_nf; +extern cpuop_func_noret op_c0c0_35_ff; +extern cpuop_func_noret op_c0d0_35_nf; +extern cpuop_func_noret op_c0d0_35_ff; +extern cpuop_func_noret op_c0d8_35_nf; +extern cpuop_func_noret op_c0d8_35_ff; +extern cpuop_func_noret op_c0e0_35_nf; +extern cpuop_func_noret op_c0e0_35_ff; +extern cpuop_func_noret op_c0e8_35_nf; +extern cpuop_func_noret op_c0e8_35_ff; +extern cpuop_func_noret op_c0f0_35_nf; +extern cpuop_func_noret op_c0f0_35_ff; +extern cpuop_func_noret op_c0f8_35_nf; +extern cpuop_func_noret op_c0f8_35_ff; +extern cpuop_func_noret op_c0f9_35_nf; +extern cpuop_func_noret op_c0f9_35_ff; +extern cpuop_func_noret op_c0fa_35_nf; +extern cpuop_func_noret op_c0fa_35_ff; +extern cpuop_func_noret op_c0fb_35_nf; +extern cpuop_func_noret op_c0fb_35_ff; +extern cpuop_func_noret op_c0fc_35_nf; +extern cpuop_func_noret op_c0fc_35_ff; +extern cpuop_func_noret op_c100_35_nf; +extern cpuop_func_noret op_c100_35_ff; +extern cpuop_func_noret op_c108_35_nf; +extern cpuop_func_noret op_c108_35_ff; +extern cpuop_func_noret op_c110_35_nf; +extern cpuop_func_noret op_c110_35_ff; +extern cpuop_func_noret op_c118_35_nf; +extern cpuop_func_noret op_c118_35_ff; +extern cpuop_func_noret op_c120_35_nf; +extern cpuop_func_noret op_c120_35_ff; +extern cpuop_func_noret op_c128_35_nf; +extern cpuop_func_noret op_c128_35_ff; +extern cpuop_func_noret op_c130_35_nf; +extern cpuop_func_noret op_c130_35_ff; +extern cpuop_func_noret op_c138_35_nf; +extern cpuop_func_noret op_c138_35_ff; +extern cpuop_func_noret op_c139_35_nf; +extern cpuop_func_noret op_c139_35_ff; +extern cpuop_func_noret op_c140_35_nf; +extern cpuop_func_noret op_c140_35_ff; +extern cpuop_func_noret op_c148_35_nf; +extern cpuop_func_noret op_c148_35_ff; +extern cpuop_func_noret op_c150_35_nf; +extern cpuop_func_noret op_c150_35_ff; +extern cpuop_func_noret op_c158_35_nf; +extern cpuop_func_noret op_c158_35_ff; +extern cpuop_func_noret op_c160_35_nf; +extern cpuop_func_noret op_c160_35_ff; +extern cpuop_func_noret op_c168_35_nf; +extern cpuop_func_noret op_c168_35_ff; +extern cpuop_func_noret op_c170_35_nf; +extern cpuop_func_noret op_c170_35_ff; +extern cpuop_func_noret op_c178_35_nf; +extern cpuop_func_noret op_c178_35_ff; +extern cpuop_func_noret op_c179_35_nf; +extern cpuop_func_noret op_c179_35_ff; +extern cpuop_func_noret op_c188_35_nf; +extern cpuop_func_noret op_c188_35_ff; +extern cpuop_func_noret op_c190_35_nf; +extern cpuop_func_noret op_c190_35_ff; +extern cpuop_func_noret op_c198_35_nf; +extern cpuop_func_noret op_c198_35_ff; +extern cpuop_func_noret op_c1a0_35_nf; +extern cpuop_func_noret op_c1a0_35_ff; +extern cpuop_func_noret op_c1a8_35_nf; +extern cpuop_func_noret op_c1a8_35_ff; +extern cpuop_func_noret op_c1b0_35_nf; +extern cpuop_func_noret op_c1b0_35_ff; +extern cpuop_func_noret op_c1b8_35_nf; +extern cpuop_func_noret op_c1b8_35_ff; +extern cpuop_func_noret op_c1b9_35_nf; +extern cpuop_func_noret op_c1b9_35_ff; +extern cpuop_func_noret op_c1c0_35_nf; +extern cpuop_func_noret op_c1c0_35_ff; +extern cpuop_func_noret op_c1d0_35_nf; +extern cpuop_func_noret op_c1d0_35_ff; +extern cpuop_func_noret op_c1d8_35_nf; +extern cpuop_func_noret op_c1d8_35_ff; +extern cpuop_func_noret op_c1e0_35_nf; +extern cpuop_func_noret op_c1e0_35_ff; +extern cpuop_func_noret op_c1e8_35_nf; +extern cpuop_func_noret op_c1e8_35_ff; +extern cpuop_func_noret op_c1f0_35_nf; +extern cpuop_func_noret op_c1f0_35_ff; +extern cpuop_func_noret op_c1f8_35_nf; +extern cpuop_func_noret op_c1f8_35_ff; +extern cpuop_func_noret op_c1f9_35_nf; +extern cpuop_func_noret op_c1f9_35_ff; +extern cpuop_func_noret op_c1fa_35_nf; +extern cpuop_func_noret op_c1fa_35_ff; +extern cpuop_func_noret op_c1fb_35_nf; +extern cpuop_func_noret op_c1fb_35_ff; +extern cpuop_func_noret op_c1fc_35_nf; +extern cpuop_func_noret op_c1fc_35_ff; +extern cpuop_func_noret op_d000_35_nf; +extern cpuop_func_noret op_d000_35_ff; +extern cpuop_func_noret op_d010_35_nf; +extern cpuop_func_noret op_d010_35_ff; +extern cpuop_func_noret op_d018_35_nf; +extern cpuop_func_noret op_d018_35_ff; +extern cpuop_func_noret op_d020_35_nf; +extern cpuop_func_noret op_d020_35_ff; +extern cpuop_func_noret op_d028_35_nf; +extern cpuop_func_noret op_d028_35_ff; +extern cpuop_func_noret op_d030_35_nf; +extern cpuop_func_noret op_d030_35_ff; +extern cpuop_func_noret op_d038_35_nf; +extern cpuop_func_noret op_d038_35_ff; +extern cpuop_func_noret op_d039_35_nf; +extern cpuop_func_noret op_d039_35_ff; +extern cpuop_func_noret op_d03a_35_nf; +extern cpuop_func_noret op_d03a_35_ff; +extern cpuop_func_noret op_d03b_35_nf; +extern cpuop_func_noret op_d03b_35_ff; +extern cpuop_func_noret op_d03c_35_nf; +extern cpuop_func_noret op_d03c_35_ff; +extern cpuop_func_noret op_d040_35_nf; +extern cpuop_func_noret op_d040_35_ff; +extern cpuop_func_noret op_d048_35_nf; +extern cpuop_func_noret op_d048_35_ff; +extern cpuop_func_noret op_d050_35_nf; +extern cpuop_func_noret op_d050_35_ff; +extern cpuop_func_noret op_d058_35_nf; +extern cpuop_func_noret op_d058_35_ff; +extern cpuop_func_noret op_d060_35_nf; +extern cpuop_func_noret op_d060_35_ff; +extern cpuop_func_noret op_d068_35_nf; +extern cpuop_func_noret op_d068_35_ff; +extern cpuop_func_noret op_d070_35_nf; +extern cpuop_func_noret op_d070_35_ff; +extern cpuop_func_noret op_d078_35_nf; +extern cpuop_func_noret op_d078_35_ff; +extern cpuop_func_noret op_d079_35_nf; +extern cpuop_func_noret op_d079_35_ff; +extern cpuop_func_noret op_d07a_35_nf; +extern cpuop_func_noret op_d07a_35_ff; +extern cpuop_func_noret op_d07b_35_nf; +extern cpuop_func_noret op_d07b_35_ff; +extern cpuop_func_noret op_d07c_35_nf; +extern cpuop_func_noret op_d07c_35_ff; +extern cpuop_func_noret op_d080_35_nf; +extern cpuop_func_noret op_d080_35_ff; +extern cpuop_func_noret op_d088_35_nf; +extern cpuop_func_noret op_d088_35_ff; +extern cpuop_func_noret op_d090_35_nf; +extern cpuop_func_noret op_d090_35_ff; +extern cpuop_func_noret op_d098_35_nf; +extern cpuop_func_noret op_d098_35_ff; +extern cpuop_func_noret op_d0a0_35_nf; +extern cpuop_func_noret op_d0a0_35_ff; +extern cpuop_func_noret op_d0a8_35_nf; +extern cpuop_func_noret op_d0a8_35_ff; +extern cpuop_func_noret op_d0b0_35_nf; +extern cpuop_func_noret op_d0b0_35_ff; +extern cpuop_func_noret op_d0b8_35_nf; +extern cpuop_func_noret op_d0b8_35_ff; +extern cpuop_func_noret op_d0b9_35_nf; +extern cpuop_func_noret op_d0b9_35_ff; +extern cpuop_func_noret op_d0ba_35_nf; +extern cpuop_func_noret op_d0ba_35_ff; +extern cpuop_func_noret op_d0bb_35_nf; +extern cpuop_func_noret op_d0bb_35_ff; +extern cpuop_func_noret op_d0bc_35_nf; +extern cpuop_func_noret op_d0bc_35_ff; +extern cpuop_func_noret op_d0c0_35_nf; +extern cpuop_func_noret op_d0c0_35_ff; +extern cpuop_func_noret op_d0c8_35_nf; +extern cpuop_func_noret op_d0c8_35_ff; +extern cpuop_func_noret op_d0d0_35_nf; +extern cpuop_func_noret op_d0d0_35_ff; +extern cpuop_func_noret op_d0d8_35_nf; +extern cpuop_func_noret op_d0d8_35_ff; +extern cpuop_func_noret op_d0e0_35_nf; +extern cpuop_func_noret op_d0e0_35_ff; +extern cpuop_func_noret op_d0e8_35_nf; +extern cpuop_func_noret op_d0e8_35_ff; +extern cpuop_func_noret op_d0f0_35_nf; +extern cpuop_func_noret op_d0f0_35_ff; +extern cpuop_func_noret op_d0f8_35_nf; +extern cpuop_func_noret op_d0f8_35_ff; +extern cpuop_func_noret op_d0f9_35_nf; +extern cpuop_func_noret op_d0f9_35_ff; +extern cpuop_func_noret op_d0fa_35_nf; +extern cpuop_func_noret op_d0fa_35_ff; +extern cpuop_func_noret op_d0fb_35_nf; +extern cpuop_func_noret op_d0fb_35_ff; +extern cpuop_func_noret op_d0fc_35_nf; +extern cpuop_func_noret op_d0fc_35_ff; +extern cpuop_func_noret op_d100_35_nf; +extern cpuop_func_noret op_d100_35_ff; +extern cpuop_func_noret op_d108_35_nf; +extern cpuop_func_noret op_d108_35_ff; +extern cpuop_func_noret op_d110_35_nf; +extern cpuop_func_noret op_d110_35_ff; +extern cpuop_func_noret op_d118_35_nf; +extern cpuop_func_noret op_d118_35_ff; +extern cpuop_func_noret op_d120_35_nf; +extern cpuop_func_noret op_d120_35_ff; +extern cpuop_func_noret op_d128_35_nf; +extern cpuop_func_noret op_d128_35_ff; +extern cpuop_func_noret op_d130_35_nf; +extern cpuop_func_noret op_d130_35_ff; +extern cpuop_func_noret op_d138_35_nf; +extern cpuop_func_noret op_d138_35_ff; +extern cpuop_func_noret op_d139_35_nf; +extern cpuop_func_noret op_d139_35_ff; +extern cpuop_func_noret op_d140_35_nf; +extern cpuop_func_noret op_d140_35_ff; +extern cpuop_func_noret op_d148_35_nf; +extern cpuop_func_noret op_d148_35_ff; +extern cpuop_func_noret op_d150_35_nf; +extern cpuop_func_noret op_d150_35_ff; +extern cpuop_func_noret op_d158_35_nf; +extern cpuop_func_noret op_d158_35_ff; +extern cpuop_func_noret op_d160_35_nf; +extern cpuop_func_noret op_d160_35_ff; +extern cpuop_func_noret op_d168_35_nf; +extern cpuop_func_noret op_d168_35_ff; +extern cpuop_func_noret op_d170_35_nf; +extern cpuop_func_noret op_d170_35_ff; +extern cpuop_func_noret op_d178_35_nf; +extern cpuop_func_noret op_d178_35_ff; +extern cpuop_func_noret op_d179_35_nf; +extern cpuop_func_noret op_d179_35_ff; +extern cpuop_func_noret op_d180_35_nf; +extern cpuop_func_noret op_d180_35_ff; +extern cpuop_func_noret op_d188_35_nf; +extern cpuop_func_noret op_d188_35_ff; +extern cpuop_func_noret op_d190_35_nf; +extern cpuop_func_noret op_d190_35_ff; +extern cpuop_func_noret op_d198_35_nf; +extern cpuop_func_noret op_d198_35_ff; +extern cpuop_func_noret op_d1a0_35_nf; +extern cpuop_func_noret op_d1a0_35_ff; +extern cpuop_func_noret op_d1a8_35_nf; +extern cpuop_func_noret op_d1a8_35_ff; +extern cpuop_func_noret op_d1b0_35_nf; +extern cpuop_func_noret op_d1b0_35_ff; +extern cpuop_func_noret op_d1b8_35_nf; +extern cpuop_func_noret op_d1b8_35_ff; +extern cpuop_func_noret op_d1b9_35_nf; +extern cpuop_func_noret op_d1b9_35_ff; +extern cpuop_func_noret op_d1c0_35_nf; +extern cpuop_func_noret op_d1c0_35_ff; +extern cpuop_func_noret op_d1c8_35_nf; +extern cpuop_func_noret op_d1c8_35_ff; +extern cpuop_func_noret op_d1d0_35_nf; +extern cpuop_func_noret op_d1d0_35_ff; +extern cpuop_func_noret op_d1d8_35_nf; +extern cpuop_func_noret op_d1d8_35_ff; +extern cpuop_func_noret op_d1e0_35_nf; +extern cpuop_func_noret op_d1e0_35_ff; +extern cpuop_func_noret op_d1e8_35_nf; +extern cpuop_func_noret op_d1e8_35_ff; +extern cpuop_func_noret op_d1f0_35_nf; +extern cpuop_func_noret op_d1f0_35_ff; +extern cpuop_func_noret op_d1f8_35_nf; +extern cpuop_func_noret op_d1f8_35_ff; +extern cpuop_func_noret op_d1f9_35_nf; +extern cpuop_func_noret op_d1f9_35_ff; +extern cpuop_func_noret op_d1fa_35_nf; +extern cpuop_func_noret op_d1fa_35_ff; +extern cpuop_func_noret op_d1fb_35_nf; +extern cpuop_func_noret op_d1fb_35_ff; +extern cpuop_func_noret op_d1fc_35_nf; +extern cpuop_func_noret op_d1fc_35_ff; +extern cpuop_func_noret op_e000_35_nf; +extern cpuop_func_noret op_e000_35_ff; +extern cpuop_func_noret op_e008_35_nf; +extern cpuop_func_noret op_e008_35_ff; +extern cpuop_func_noret op_e010_35_nf; +extern cpuop_func_noret op_e010_35_ff; +extern cpuop_func_noret op_e018_35_nf; +extern cpuop_func_noret op_e018_35_ff; +extern cpuop_func_noret op_e020_35_nf; +extern cpuop_func_noret op_e020_35_ff; +extern cpuop_func_noret op_e028_35_nf; +extern cpuop_func_noret op_e028_35_ff; +extern cpuop_func_noret op_e030_35_nf; +extern cpuop_func_noret op_e030_35_ff; +extern cpuop_func_noret op_e038_35_nf; +extern cpuop_func_noret op_e038_35_ff; +extern cpuop_func_noret op_e040_35_nf; +extern cpuop_func_noret op_e040_35_ff; +extern cpuop_func_noret op_e048_35_nf; +extern cpuop_func_noret op_e048_35_ff; +extern cpuop_func_noret op_e050_35_nf; +extern cpuop_func_noret op_e050_35_ff; +extern cpuop_func_noret op_e058_35_nf; +extern cpuop_func_noret op_e058_35_ff; +extern cpuop_func_noret op_e060_35_nf; +extern cpuop_func_noret op_e060_35_ff; +extern cpuop_func_noret op_e068_35_nf; +extern cpuop_func_noret op_e068_35_ff; +extern cpuop_func_noret op_e070_35_nf; +extern cpuop_func_noret op_e070_35_ff; +extern cpuop_func_noret op_e078_35_nf; +extern cpuop_func_noret op_e078_35_ff; +extern cpuop_func_noret op_e080_35_nf; +extern cpuop_func_noret op_e080_35_ff; +extern cpuop_func_noret op_e088_35_nf; +extern cpuop_func_noret op_e088_35_ff; +extern cpuop_func_noret op_e090_35_nf; +extern cpuop_func_noret op_e090_35_ff; +extern cpuop_func_noret op_e098_35_nf; +extern cpuop_func_noret op_e098_35_ff; +extern cpuop_func_noret op_e0a0_35_nf; +extern cpuop_func_noret op_e0a0_35_ff; +extern cpuop_func_noret op_e0a8_35_nf; +extern cpuop_func_noret op_e0a8_35_ff; +extern cpuop_func_noret op_e0b0_35_nf; +extern cpuop_func_noret op_e0b0_35_ff; +extern cpuop_func_noret op_e0b8_35_nf; +extern cpuop_func_noret op_e0b8_35_ff; +extern cpuop_func_noret op_e0d0_35_nf; +extern cpuop_func_noret op_e0d0_35_ff; +extern cpuop_func_noret op_e0d8_35_nf; +extern cpuop_func_noret op_e0d8_35_ff; +extern cpuop_func_noret op_e0e0_35_nf; +extern cpuop_func_noret op_e0e0_35_ff; +extern cpuop_func_noret op_e0e8_35_nf; +extern cpuop_func_noret op_e0e8_35_ff; +extern cpuop_func_noret op_e0f0_35_nf; +extern cpuop_func_noret op_e0f0_35_ff; +extern cpuop_func_noret op_e0f8_35_nf; +extern cpuop_func_noret op_e0f8_35_ff; +extern cpuop_func_noret op_e0f9_35_nf; +extern cpuop_func_noret op_e0f9_35_ff; +extern cpuop_func_noret op_e100_35_nf; +extern cpuop_func_noret op_e100_35_ff; +extern cpuop_func_noret op_e108_35_nf; +extern cpuop_func_noret op_e108_35_ff; +extern cpuop_func_noret op_e110_35_nf; +extern cpuop_func_noret op_e110_35_ff; +extern cpuop_func_noret op_e118_35_nf; +extern cpuop_func_noret op_e118_35_ff; +extern cpuop_func_noret op_e120_35_nf; +extern cpuop_func_noret op_e120_35_ff; +extern cpuop_func_noret op_e128_35_nf; +extern cpuop_func_noret op_e128_35_ff; +extern cpuop_func_noret op_e130_35_nf; +extern cpuop_func_noret op_e130_35_ff; +extern cpuop_func_noret op_e138_35_nf; +extern cpuop_func_noret op_e138_35_ff; +extern cpuop_func_noret op_e140_35_nf; +extern cpuop_func_noret op_e140_35_ff; +extern cpuop_func_noret op_e148_35_nf; +extern cpuop_func_noret op_e148_35_ff; +extern cpuop_func_noret op_e150_35_nf; +extern cpuop_func_noret op_e150_35_ff; +extern cpuop_func_noret op_e158_35_nf; +extern cpuop_func_noret op_e158_35_ff; +extern cpuop_func_noret op_e160_35_nf; +extern cpuop_func_noret op_e160_35_ff; +extern cpuop_func_noret op_e168_35_nf; +extern cpuop_func_noret op_e168_35_ff; +extern cpuop_func_noret op_e170_35_nf; +extern cpuop_func_noret op_e170_35_ff; +extern cpuop_func_noret op_e178_35_nf; +extern cpuop_func_noret op_e178_35_ff; +extern cpuop_func_noret op_e180_35_nf; +extern cpuop_func_noret op_e180_35_ff; +extern cpuop_func_noret op_e188_35_nf; +extern cpuop_func_noret op_e188_35_ff; +extern cpuop_func_noret op_e190_35_nf; +extern cpuop_func_noret op_e190_35_ff; +extern cpuop_func_noret op_e198_35_nf; +extern cpuop_func_noret op_e198_35_ff; +extern cpuop_func_noret op_e1a0_35_nf; +extern cpuop_func_noret op_e1a0_35_ff; +extern cpuop_func_noret op_e1a8_35_nf; +extern cpuop_func_noret op_e1a8_35_ff; +extern cpuop_func_noret op_e1b0_35_nf; +extern cpuop_func_noret op_e1b0_35_ff; +extern cpuop_func_noret op_e1b8_35_nf; +extern cpuop_func_noret op_e1b8_35_ff; +extern cpuop_func_noret op_e1d0_35_nf; +extern cpuop_func_noret op_e1d0_35_ff; +extern cpuop_func_noret op_e1d8_35_nf; +extern cpuop_func_noret op_e1d8_35_ff; +extern cpuop_func_noret op_e1e0_35_nf; +extern cpuop_func_noret op_e1e0_35_ff; +extern cpuop_func_noret op_e1e8_35_nf; +extern cpuop_func_noret op_e1e8_35_ff; +extern cpuop_func_noret op_e1f0_35_nf; +extern cpuop_func_noret op_e1f0_35_ff; +extern cpuop_func_noret op_e1f8_35_nf; +extern cpuop_func_noret op_e1f8_35_ff; +extern cpuop_func_noret op_e1f9_35_nf; +extern cpuop_func_noret op_e1f9_35_ff; +extern cpuop_func_noret op_e2d0_35_nf; +extern cpuop_func_noret op_e2d0_35_ff; +extern cpuop_func_noret op_e2d8_35_nf; +extern cpuop_func_noret op_e2d8_35_ff; +extern cpuop_func_noret op_e2e0_35_nf; +extern cpuop_func_noret op_e2e0_35_ff; +extern cpuop_func_noret op_e2e8_35_nf; +extern cpuop_func_noret op_e2e8_35_ff; +extern cpuop_func_noret op_e2f0_35_nf; +extern cpuop_func_noret op_e2f0_35_ff; +extern cpuop_func_noret op_e2f8_35_nf; +extern cpuop_func_noret op_e2f8_35_ff; +extern cpuop_func_noret op_e2f9_35_nf; +extern cpuop_func_noret op_e2f9_35_ff; +extern cpuop_func_noret op_e3d0_35_nf; +extern cpuop_func_noret op_e3d0_35_ff; +extern cpuop_func_noret op_e3d8_35_nf; +extern cpuop_func_noret op_e3d8_35_ff; +extern cpuop_func_noret op_e3e0_35_nf; +extern cpuop_func_noret op_e3e0_35_ff; +extern cpuop_func_noret op_e3e8_35_nf; +extern cpuop_func_noret op_e3e8_35_ff; +extern cpuop_func_noret op_e3f0_35_nf; +extern cpuop_func_noret op_e3f0_35_ff; +extern cpuop_func_noret op_e3f8_35_nf; +extern cpuop_func_noret op_e3f8_35_ff; +extern cpuop_func_noret op_e3f9_35_nf; +extern cpuop_func_noret op_e3f9_35_ff; +extern cpuop_func_noret op_e4d0_35_nf; +extern cpuop_func_noret op_e4d0_35_ff; +extern cpuop_func_noret op_e4d8_35_nf; +extern cpuop_func_noret op_e4d8_35_ff; +extern cpuop_func_noret op_e4e0_35_nf; +extern cpuop_func_noret op_e4e0_35_ff; +extern cpuop_func_noret op_e4e8_35_nf; +extern cpuop_func_noret op_e4e8_35_ff; +extern cpuop_func_noret op_e4f0_35_nf; +extern cpuop_func_noret op_e4f0_35_ff; +extern cpuop_func_noret op_e4f8_35_nf; +extern cpuop_func_noret op_e4f8_35_ff; +extern cpuop_func_noret op_e4f9_35_nf; +extern cpuop_func_noret op_e4f9_35_ff; +extern cpuop_func_noret op_e5d0_35_nf; +extern cpuop_func_noret op_e5d0_35_ff; +extern cpuop_func_noret op_e5d8_35_nf; +extern cpuop_func_noret op_e5d8_35_ff; +extern cpuop_func_noret op_e5e0_35_nf; +extern cpuop_func_noret op_e5e0_35_ff; +extern cpuop_func_noret op_e5e8_35_nf; +extern cpuop_func_noret op_e5e8_35_ff; +extern cpuop_func_noret op_e5f0_35_nf; +extern cpuop_func_noret op_e5f0_35_ff; +extern cpuop_func_noret op_e5f8_35_nf; +extern cpuop_func_noret op_e5f8_35_ff; +extern cpuop_func_noret op_e5f9_35_nf; +extern cpuop_func_noret op_e5f9_35_ff; +extern cpuop_func_noret op_e6d0_35_nf; +extern cpuop_func_noret op_e6d0_35_ff; +extern cpuop_func_noret op_e6d8_35_nf; +extern cpuop_func_noret op_e6d8_35_ff; +extern cpuop_func_noret op_e6e0_35_nf; +extern cpuop_func_noret op_e6e0_35_ff; +extern cpuop_func_noret op_e6e8_35_nf; +extern cpuop_func_noret op_e6e8_35_ff; +extern cpuop_func_noret op_e6f0_35_nf; +extern cpuop_func_noret op_e6f0_35_ff; +extern cpuop_func_noret op_e6f8_35_nf; +extern cpuop_func_noret op_e6f8_35_ff; +extern cpuop_func_noret op_e6f9_35_nf; +extern cpuop_func_noret op_e6f9_35_ff; +extern cpuop_func_noret op_e7d0_35_nf; +extern cpuop_func_noret op_e7d0_35_ff; +extern cpuop_func_noret op_e7d8_35_nf; +extern cpuop_func_noret op_e7d8_35_ff; +extern cpuop_func_noret op_e7e0_35_nf; +extern cpuop_func_noret op_e7e0_35_ff; +extern cpuop_func_noret op_e7e8_35_nf; +extern cpuop_func_noret op_e7e8_35_ff; +extern cpuop_func_noret op_e7f0_35_nf; +extern cpuop_func_noret op_e7f0_35_ff; +extern cpuop_func_noret op_e7f8_35_nf; +extern cpuop_func_noret op_e7f8_35_ff; +extern cpuop_func_noret op_e7f9_35_nf; +extern cpuop_func_noret op_e7f9_35_ff; +extern cpuop_func_noret op_e8c0_35_nf; +extern cpuop_func_noret op_e8c0_35_ff; +extern cpuop_func_noret op_e8d0_35_nf; +extern cpuop_func_noret op_e8d0_35_ff; +extern cpuop_func_noret op_e8e8_35_nf; +extern cpuop_func_noret op_e8e8_35_ff; +extern cpuop_func_noret op_e8f0_35_nf; +extern cpuop_func_noret op_e8f0_35_ff; +extern cpuop_func_noret op_e8f8_35_nf; +extern cpuop_func_noret op_e8f8_35_ff; +extern cpuop_func_noret op_e8f9_35_nf; +extern cpuop_func_noret op_e8f9_35_ff; +extern cpuop_func_noret op_e8fa_35_nf; +extern cpuop_func_noret op_e8fa_35_ff; +extern cpuop_func_noret op_e8fb_35_nf; +extern cpuop_func_noret op_e8fb_35_ff; +extern cpuop_func_noret op_e9c0_35_nf; +extern cpuop_func_noret op_e9c0_35_ff; +extern cpuop_func_noret op_e9d0_35_nf; +extern cpuop_func_noret op_e9d0_35_ff; +extern cpuop_func_noret op_e9e8_35_nf; +extern cpuop_func_noret op_e9e8_35_ff; +extern cpuop_func_noret op_e9f0_35_nf; +extern cpuop_func_noret op_e9f0_35_ff; +extern cpuop_func_noret op_e9f8_35_nf; +extern cpuop_func_noret op_e9f8_35_ff; +extern cpuop_func_noret op_e9f9_35_nf; +extern cpuop_func_noret op_e9f9_35_ff; +extern cpuop_func_noret op_e9fa_35_nf; +extern cpuop_func_noret op_e9fa_35_ff; +extern cpuop_func_noret op_e9fb_35_nf; +extern cpuop_func_noret op_e9fb_35_ff; +extern cpuop_func_noret op_eac0_35_nf; +extern cpuop_func_noret op_eac0_35_ff; +extern cpuop_func_noret op_ead0_35_nf; +extern cpuop_func_noret op_ead0_35_ff; +extern cpuop_func_noret op_eae8_35_nf; +extern cpuop_func_noret op_eae8_35_ff; +extern cpuop_func_noret op_eaf0_35_nf; +extern cpuop_func_noret op_eaf0_35_ff; +extern cpuop_func_noret op_eaf8_35_nf; +extern cpuop_func_noret op_eaf8_35_ff; +extern cpuop_func_noret op_eaf9_35_nf; +extern cpuop_func_noret op_eaf9_35_ff; +extern cpuop_func_noret op_ebc0_35_nf; +extern cpuop_func_noret op_ebc0_35_ff; +extern cpuop_func_noret op_ebd0_35_nf; +extern cpuop_func_noret op_ebd0_35_ff; +extern cpuop_func_noret op_ebe8_35_nf; +extern cpuop_func_noret op_ebe8_35_ff; +extern cpuop_func_noret op_ebf0_35_nf; +extern cpuop_func_noret op_ebf0_35_ff; +extern cpuop_func_noret op_ebf8_35_nf; +extern cpuop_func_noret op_ebf8_35_ff; +extern cpuop_func_noret op_ebf9_35_nf; +extern cpuop_func_noret op_ebf9_35_ff; +extern cpuop_func_noret op_ebfa_35_nf; +extern cpuop_func_noret op_ebfa_35_ff; +extern cpuop_func_noret op_ebfb_35_nf; +extern cpuop_func_noret op_ebfb_35_ff; +extern cpuop_func_noret op_ecc0_35_nf; +extern cpuop_func_noret op_ecc0_35_ff; +extern cpuop_func_noret op_ecd0_35_nf; +extern cpuop_func_noret op_ecd0_35_ff; +extern cpuop_func_noret op_ece8_35_nf; +extern cpuop_func_noret op_ece8_35_ff; +extern cpuop_func_noret op_ecf0_35_nf; +extern cpuop_func_noret op_ecf0_35_ff; +extern cpuop_func_noret op_ecf8_35_nf; +extern cpuop_func_noret op_ecf8_35_ff; +extern cpuop_func_noret op_ecf9_35_nf; +extern cpuop_func_noret op_ecf9_35_ff; +extern cpuop_func_noret op_edc0_35_nf; +extern cpuop_func_noret op_edc0_35_ff; +extern cpuop_func_noret op_edd0_35_nf; +extern cpuop_func_noret op_edd0_35_ff; +extern cpuop_func_noret op_ede8_35_nf; +extern cpuop_func_noret op_ede8_35_ff; +extern cpuop_func_noret op_edf0_35_nf; +extern cpuop_func_noret op_edf0_35_ff; +extern cpuop_func_noret op_edf8_35_nf; +extern cpuop_func_noret op_edf8_35_ff; +extern cpuop_func_noret op_edf9_35_nf; +extern cpuop_func_noret op_edf9_35_ff; +extern cpuop_func_noret op_edfa_35_nf; +extern cpuop_func_noret op_edfa_35_ff; +extern cpuop_func_noret op_edfb_35_nf; +extern cpuop_func_noret op_edfb_35_ff; +extern cpuop_func_noret op_eec0_35_nf; +extern cpuop_func_noret op_eec0_35_ff; +extern cpuop_func_noret op_eed0_35_nf; +extern cpuop_func_noret op_eed0_35_ff; +extern cpuop_func_noret op_eee8_35_nf; +extern cpuop_func_noret op_eee8_35_ff; +extern cpuop_func_noret op_eef0_35_nf; +extern cpuop_func_noret op_eef0_35_ff; +extern cpuop_func_noret op_eef8_35_nf; +extern cpuop_func_noret op_eef8_35_ff; +extern cpuop_func_noret op_eef9_35_nf; +extern cpuop_func_noret op_eef9_35_ff; +extern cpuop_func_noret op_efc0_35_nf; +extern cpuop_func_noret op_efc0_35_ff; +extern cpuop_func_noret op_efd0_35_nf; +extern cpuop_func_noret op_efd0_35_ff; +extern cpuop_func_noret op_efe8_35_nf; +extern cpuop_func_noret op_efe8_35_ff; +extern cpuop_func_noret op_eff0_35_nf; +extern cpuop_func_noret op_eff0_35_ff; +extern cpuop_func_noret op_eff8_35_nf; +extern cpuop_func_noret op_eff8_35_ff; +extern cpuop_func_noret op_eff9_35_nf; +extern cpuop_func_noret op_eff9_35_ff; +extern cpuop_func_noret op_f000_35_nf; +extern cpuop_func_noret op_f000_35_ff; +extern cpuop_func_noret op_f008_35_nf; +extern cpuop_func_noret op_f008_35_ff; +extern cpuop_func_noret op_f010_35_nf; +extern cpuop_func_noret op_f010_35_ff; +extern cpuop_func_noret op_f018_35_nf; +extern cpuop_func_noret op_f018_35_ff; +extern cpuop_func_noret op_f020_35_nf; +extern cpuop_func_noret op_f020_35_ff; +extern cpuop_func_noret op_f028_35_nf; +extern cpuop_func_noret op_f028_35_ff; +extern cpuop_func_noret op_f030_35_nf; +extern cpuop_func_noret op_f030_35_ff; +extern cpuop_func_noret op_f038_35_nf; +extern cpuop_func_noret op_f038_35_ff; +extern cpuop_func_noret op_f039_35_nf; +extern cpuop_func_noret op_f039_35_ff; +extern cpuop_func_noret op_f200_35_nf; +extern cpuop_func_noret op_f200_35_ff; +extern cpuop_func_noret op_f208_35_nf; +extern cpuop_func_noret op_f208_35_ff; +extern cpuop_func_noret op_f210_35_nf; +extern cpuop_func_noret op_f210_35_ff; +extern cpuop_func_noret op_f218_35_nf; +extern cpuop_func_noret op_f218_35_ff; +extern cpuop_func_noret op_f220_35_nf; +extern cpuop_func_noret op_f220_35_ff; +extern cpuop_func_noret op_f228_35_nf; +extern cpuop_func_noret op_f228_35_ff; +extern cpuop_func_noret op_f230_35_nf; +extern cpuop_func_noret op_f230_35_ff; +extern cpuop_func_noret op_f238_35_nf; +extern cpuop_func_noret op_f238_35_ff; +extern cpuop_func_noret op_f239_35_nf; +extern cpuop_func_noret op_f239_35_ff; +extern cpuop_func_noret op_f23a_35_nf; +extern cpuop_func_noret op_f23a_35_ff; +extern cpuop_func_noret op_f23b_35_nf; +extern cpuop_func_noret op_f23b_35_ff; +extern cpuop_func_noret op_f23c_35_nf; +extern cpuop_func_noret op_f23c_35_ff; +extern cpuop_func_noret op_f240_35_nf; +extern cpuop_func_noret op_f240_35_ff; +extern cpuop_func_noret op_f248_35_nf; +extern cpuop_func_noret op_f248_35_ff; +extern cpuop_func_noret op_f250_35_nf; +extern cpuop_func_noret op_f250_35_ff; +extern cpuop_func_noret op_f258_35_nf; +extern cpuop_func_noret op_f258_35_ff; +extern cpuop_func_noret op_f260_35_nf; +extern cpuop_func_noret op_f260_35_ff; +extern cpuop_func_noret op_f268_35_nf; +extern cpuop_func_noret op_f268_35_ff; +extern cpuop_func_noret op_f270_35_nf; +extern cpuop_func_noret op_f270_35_ff; +extern cpuop_func_noret op_f278_35_nf; +extern cpuop_func_noret op_f278_35_ff; +extern cpuop_func_noret op_f279_35_nf; +extern cpuop_func_noret op_f279_35_ff; +extern cpuop_func_noret op_f27a_35_nf; +extern cpuop_func_noret op_f27a_35_ff; +extern cpuop_func_noret op_f27b_35_nf; +extern cpuop_func_noret op_f27b_35_ff; +extern cpuop_func_noret op_f27c_35_nf; +extern cpuop_func_noret op_f27c_35_ff; +extern cpuop_func_noret op_f280_35_nf; +extern cpuop_func_noret op_f280_35_ff; +extern cpuop_func_noret op_f2c0_35_nf; +extern cpuop_func_noret op_f2c0_35_ff; +extern cpuop_func_noret op_f310_35_nf; +extern cpuop_func_noret op_f310_35_ff; +extern cpuop_func_noret op_f320_35_nf; +extern cpuop_func_noret op_f320_35_ff; +extern cpuop_func_noret op_f328_35_nf; +extern cpuop_func_noret op_f328_35_ff; +extern cpuop_func_noret op_f330_35_nf; +extern cpuop_func_noret op_f330_35_ff; +extern cpuop_func_noret op_f338_35_nf; +extern cpuop_func_noret op_f338_35_ff; +extern cpuop_func_noret op_f339_35_nf; +extern cpuop_func_noret op_f339_35_ff; +extern cpuop_func_noret op_f350_35_nf; +extern cpuop_func_noret op_f350_35_ff; +extern cpuop_func_noret op_f358_35_nf; +extern cpuop_func_noret op_f358_35_ff; +extern cpuop_func_noret op_f368_35_nf; +extern cpuop_func_noret op_f368_35_ff; +extern cpuop_func_noret op_f370_35_nf; +extern cpuop_func_noret op_f370_35_ff; +extern cpuop_func_noret op_f378_35_nf; +extern cpuop_func_noret op_f378_35_ff; +extern cpuop_func_noret op_f379_35_nf; +extern cpuop_func_noret op_f379_35_ff; +extern cpuop_func_noret op_f37a_35_nf; +extern cpuop_func_noret op_f37a_35_ff; +extern cpuop_func_noret op_f37b_35_nf; +extern cpuop_func_noret op_f37b_35_ff; +extern cpuop_func op_0000_40_nf; +extern cpuop_func op_0000_40_ff; +extern cpuop_func op_0010_40_nf; +extern cpuop_func op_0010_40_ff; +extern cpuop_func op_0018_40_nf; +extern cpuop_func op_0018_40_ff; +extern cpuop_func op_0020_40_nf; +extern cpuop_func op_0020_40_ff; +extern cpuop_func op_0028_40_nf; +extern cpuop_func op_0028_40_ff; +extern cpuop_func op_0030_40_nf; +extern cpuop_func op_0030_40_ff; +extern cpuop_func op_0038_40_nf; +extern cpuop_func op_0038_40_ff; +extern cpuop_func op_0039_40_nf; +extern cpuop_func op_0039_40_ff; +extern cpuop_func op_003c_40_nf; +extern cpuop_func op_003c_40_ff; +extern cpuop_func op_0040_40_nf; +extern cpuop_func op_0040_40_ff; +extern cpuop_func op_0050_40_nf; +extern cpuop_func op_0050_40_ff; +extern cpuop_func op_0058_40_nf; +extern cpuop_func op_0058_40_ff; +extern cpuop_func op_0060_40_nf; +extern cpuop_func op_0060_40_ff; +extern cpuop_func op_0068_40_nf; +extern cpuop_func op_0068_40_ff; +extern cpuop_func op_0070_40_nf; +extern cpuop_func op_0070_40_ff; +extern cpuop_func op_0078_40_nf; +extern cpuop_func op_0078_40_ff; +extern cpuop_func op_0079_40_nf; +extern cpuop_func op_0079_40_ff; +extern cpuop_func op_007c_40_nf; +extern cpuop_func op_007c_40_ff; +extern cpuop_func op_0080_40_nf; +extern cpuop_func op_0080_40_ff; +extern cpuop_func op_0090_40_nf; +extern cpuop_func op_0090_40_ff; +extern cpuop_func op_0098_40_nf; +extern cpuop_func op_0098_40_ff; +extern cpuop_func op_00a0_40_nf; +extern cpuop_func op_00a0_40_ff; +extern cpuop_func op_00a8_40_nf; +extern cpuop_func op_00a8_40_ff; +extern cpuop_func op_00b0_40_nf; +extern cpuop_func op_00b0_40_ff; +extern cpuop_func op_00b8_40_nf; +extern cpuop_func op_00b8_40_ff; +extern cpuop_func op_00b9_40_nf; +extern cpuop_func op_00b9_40_ff; +extern cpuop_func op_00d0_40_nf; +extern cpuop_func op_00d0_40_ff; +extern cpuop_func op_00e8_40_nf; +extern cpuop_func op_00e8_40_ff; +extern cpuop_func op_00f0_40_nf; +extern cpuop_func op_00f0_40_ff; +extern cpuop_func op_00f8_40_nf; +extern cpuop_func op_00f8_40_ff; +extern cpuop_func op_00f9_40_nf; +extern cpuop_func op_00f9_40_ff; +extern cpuop_func op_00fa_40_nf; +extern cpuop_func op_00fa_40_ff; +extern cpuop_func op_00fb_40_nf; +extern cpuop_func op_00fb_40_ff; +extern cpuop_func op_0100_40_nf; +extern cpuop_func op_0100_40_ff; +extern cpuop_func op_0108_40_nf; +extern cpuop_func op_0108_40_ff; +extern cpuop_func op_0110_40_nf; +extern cpuop_func op_0110_40_ff; +extern cpuop_func op_0118_40_nf; +extern cpuop_func op_0118_40_ff; +extern cpuop_func op_0120_40_nf; +extern cpuop_func op_0120_40_ff; +extern cpuop_func op_0128_40_nf; +extern cpuop_func op_0128_40_ff; +extern cpuop_func op_0130_40_nf; +extern cpuop_func op_0130_40_ff; +extern cpuop_func op_0138_40_nf; +extern cpuop_func op_0138_40_ff; +extern cpuop_func op_0139_40_nf; +extern cpuop_func op_0139_40_ff; +extern cpuop_func op_013a_40_nf; +extern cpuop_func op_013a_40_ff; +extern cpuop_func op_013b_40_nf; +extern cpuop_func op_013b_40_ff; +extern cpuop_func op_013c_40_nf; +extern cpuop_func op_013c_40_ff; +extern cpuop_func op_0140_40_nf; +extern cpuop_func op_0140_40_ff; +extern cpuop_func op_0148_40_nf; +extern cpuop_func op_0148_40_ff; +extern cpuop_func op_0150_40_nf; +extern cpuop_func op_0150_40_ff; +extern cpuop_func op_0158_40_nf; +extern cpuop_func op_0158_40_ff; +extern cpuop_func op_0160_40_nf; +extern cpuop_func op_0160_40_ff; +extern cpuop_func op_0168_40_nf; +extern cpuop_func op_0168_40_ff; +extern cpuop_func op_0170_40_nf; +extern cpuop_func op_0170_40_ff; +extern cpuop_func op_0178_40_nf; +extern cpuop_func op_0178_40_ff; +extern cpuop_func op_0179_40_nf; +extern cpuop_func op_0179_40_ff; +extern cpuop_func op_0180_40_nf; +extern cpuop_func op_0180_40_ff; +extern cpuop_func op_0188_40_nf; +extern cpuop_func op_0188_40_ff; +extern cpuop_func op_0190_40_nf; +extern cpuop_func op_0190_40_ff; +extern cpuop_func op_0198_40_nf; +extern cpuop_func op_0198_40_ff; +extern cpuop_func op_01a0_40_nf; +extern cpuop_func op_01a0_40_ff; +extern cpuop_func op_01a8_40_nf; +extern cpuop_func op_01a8_40_ff; +extern cpuop_func op_01b0_40_nf; +extern cpuop_func op_01b0_40_ff; +extern cpuop_func op_01b8_40_nf; +extern cpuop_func op_01b8_40_ff; +extern cpuop_func op_01b9_40_nf; +extern cpuop_func op_01b9_40_ff; +extern cpuop_func op_01c0_40_nf; +extern cpuop_func op_01c0_40_ff; +extern cpuop_func op_01c8_40_nf; +extern cpuop_func op_01c8_40_ff; +extern cpuop_func op_01d0_40_nf; +extern cpuop_func op_01d0_40_ff; +extern cpuop_func op_01d8_40_nf; +extern cpuop_func op_01d8_40_ff; +extern cpuop_func op_01e0_40_nf; +extern cpuop_func op_01e0_40_ff; +extern cpuop_func op_01e8_40_nf; +extern cpuop_func op_01e8_40_ff; +extern cpuop_func op_01f0_40_nf; +extern cpuop_func op_01f0_40_ff; +extern cpuop_func op_01f8_40_nf; +extern cpuop_func op_01f8_40_ff; +extern cpuop_func op_01f9_40_nf; +extern cpuop_func op_01f9_40_ff; +extern cpuop_func op_0200_40_nf; +extern cpuop_func op_0200_40_ff; +extern cpuop_func op_0210_40_nf; +extern cpuop_func op_0210_40_ff; +extern cpuop_func op_0218_40_nf; +extern cpuop_func op_0218_40_ff; +extern cpuop_func op_0220_40_nf; +extern cpuop_func op_0220_40_ff; +extern cpuop_func op_0228_40_nf; +extern cpuop_func op_0228_40_ff; +extern cpuop_func op_0230_40_nf; +extern cpuop_func op_0230_40_ff; +extern cpuop_func op_0238_40_nf; +extern cpuop_func op_0238_40_ff; +extern cpuop_func op_0239_40_nf; +extern cpuop_func op_0239_40_ff; +extern cpuop_func op_023c_40_nf; +extern cpuop_func op_023c_40_ff; +extern cpuop_func op_0240_40_nf; +extern cpuop_func op_0240_40_ff; +extern cpuop_func op_0250_40_nf; +extern cpuop_func op_0250_40_ff; +extern cpuop_func op_0258_40_nf; +extern cpuop_func op_0258_40_ff; +extern cpuop_func op_0260_40_nf; +extern cpuop_func op_0260_40_ff; +extern cpuop_func op_0268_40_nf; +extern cpuop_func op_0268_40_ff; +extern cpuop_func op_0270_40_nf; +extern cpuop_func op_0270_40_ff; +extern cpuop_func op_0278_40_nf; +extern cpuop_func op_0278_40_ff; +extern cpuop_func op_0279_40_nf; +extern cpuop_func op_0279_40_ff; +extern cpuop_func op_027c_40_nf; +extern cpuop_func op_027c_40_ff; +extern cpuop_func op_0280_40_nf; +extern cpuop_func op_0280_40_ff; +extern cpuop_func op_0290_40_nf; +extern cpuop_func op_0290_40_ff; +extern cpuop_func op_0298_40_nf; +extern cpuop_func op_0298_40_ff; +extern cpuop_func op_02a0_40_nf; +extern cpuop_func op_02a0_40_ff; +extern cpuop_func op_02a8_40_nf; +extern cpuop_func op_02a8_40_ff; +extern cpuop_func op_02b0_40_nf; +extern cpuop_func op_02b0_40_ff; +extern cpuop_func op_02b8_40_nf; +extern cpuop_func op_02b8_40_ff; +extern cpuop_func op_02b9_40_nf; +extern cpuop_func op_02b9_40_ff; +extern cpuop_func op_02d0_40_nf; +extern cpuop_func op_02d0_40_ff; +extern cpuop_func op_02e8_40_nf; +extern cpuop_func op_02e8_40_ff; +extern cpuop_func op_02f0_40_nf; +extern cpuop_func op_02f0_40_ff; +extern cpuop_func op_02f8_40_nf; +extern cpuop_func op_02f8_40_ff; +extern cpuop_func op_02f9_40_nf; +extern cpuop_func op_02f9_40_ff; +extern cpuop_func op_02fa_40_nf; +extern cpuop_func op_02fa_40_ff; +extern cpuop_func op_02fb_40_nf; +extern cpuop_func op_02fb_40_ff; +extern cpuop_func op_0400_40_nf; +extern cpuop_func op_0400_40_ff; +extern cpuop_func op_0410_40_nf; +extern cpuop_func op_0410_40_ff; +extern cpuop_func op_0418_40_nf; +extern cpuop_func op_0418_40_ff; +extern cpuop_func op_0420_40_nf; +extern cpuop_func op_0420_40_ff; +extern cpuop_func op_0428_40_nf; +extern cpuop_func op_0428_40_ff; +extern cpuop_func op_0430_40_nf; +extern cpuop_func op_0430_40_ff; +extern cpuop_func op_0438_40_nf; +extern cpuop_func op_0438_40_ff; +extern cpuop_func op_0439_40_nf; +extern cpuop_func op_0439_40_ff; +extern cpuop_func op_0440_40_nf; +extern cpuop_func op_0440_40_ff; +extern cpuop_func op_0450_40_nf; +extern cpuop_func op_0450_40_ff; +extern cpuop_func op_0458_40_nf; +extern cpuop_func op_0458_40_ff; +extern cpuop_func op_0460_40_nf; +extern cpuop_func op_0460_40_ff; +extern cpuop_func op_0468_40_nf; +extern cpuop_func op_0468_40_ff; +extern cpuop_func op_0470_40_nf; +extern cpuop_func op_0470_40_ff; +extern cpuop_func op_0478_40_nf; +extern cpuop_func op_0478_40_ff; +extern cpuop_func op_0479_40_nf; +extern cpuop_func op_0479_40_ff; +extern cpuop_func op_0480_40_nf; +extern cpuop_func op_0480_40_ff; +extern cpuop_func op_0490_40_nf; +extern cpuop_func op_0490_40_ff; +extern cpuop_func op_0498_40_nf; +extern cpuop_func op_0498_40_ff; +extern cpuop_func op_04a0_40_nf; +extern cpuop_func op_04a0_40_ff; +extern cpuop_func op_04a8_40_nf; +extern cpuop_func op_04a8_40_ff; +extern cpuop_func op_04b0_40_nf; +extern cpuop_func op_04b0_40_ff; +extern cpuop_func op_04b8_40_nf; +extern cpuop_func op_04b8_40_ff; +extern cpuop_func op_04b9_40_nf; +extern cpuop_func op_04b9_40_ff; +extern cpuop_func op_04d0_40_nf; +extern cpuop_func op_04d0_40_ff; +extern cpuop_func op_04e8_40_nf; +extern cpuop_func op_04e8_40_ff; +extern cpuop_func op_04f0_40_nf; +extern cpuop_func op_04f0_40_ff; +extern cpuop_func op_04f8_40_nf; +extern cpuop_func op_04f8_40_ff; +extern cpuop_func op_04f9_40_nf; +extern cpuop_func op_04f9_40_ff; +extern cpuop_func op_04fa_40_nf; +extern cpuop_func op_04fa_40_ff; +extern cpuop_func op_04fb_40_nf; +extern cpuop_func op_04fb_40_ff; +extern cpuop_func op_0600_40_nf; +extern cpuop_func op_0600_40_ff; +extern cpuop_func op_0610_40_nf; +extern cpuop_func op_0610_40_ff; +extern cpuop_func op_0618_40_nf; +extern cpuop_func op_0618_40_ff; +extern cpuop_func op_0620_40_nf; +extern cpuop_func op_0620_40_ff; +extern cpuop_func op_0628_40_nf; +extern cpuop_func op_0628_40_ff; +extern cpuop_func op_0630_40_nf; +extern cpuop_func op_0630_40_ff; +extern cpuop_func op_0638_40_nf; +extern cpuop_func op_0638_40_ff; +extern cpuop_func op_0639_40_nf; +extern cpuop_func op_0639_40_ff; +extern cpuop_func op_0640_40_nf; +extern cpuop_func op_0640_40_ff; +extern cpuop_func op_0650_40_nf; +extern cpuop_func op_0650_40_ff; +extern cpuop_func op_0658_40_nf; +extern cpuop_func op_0658_40_ff; +extern cpuop_func op_0660_40_nf; +extern cpuop_func op_0660_40_ff; +extern cpuop_func op_0668_40_nf; +extern cpuop_func op_0668_40_ff; +extern cpuop_func op_0670_40_nf; +extern cpuop_func op_0670_40_ff; +extern cpuop_func op_0678_40_nf; +extern cpuop_func op_0678_40_ff; +extern cpuop_func op_0679_40_nf; +extern cpuop_func op_0679_40_ff; +extern cpuop_func op_0680_40_nf; +extern cpuop_func op_0680_40_ff; +extern cpuop_func op_0690_40_nf; +extern cpuop_func op_0690_40_ff; +extern cpuop_func op_0698_40_nf; +extern cpuop_func op_0698_40_ff; +extern cpuop_func op_06a0_40_nf; +extern cpuop_func op_06a0_40_ff; +extern cpuop_func op_06a8_40_nf; +extern cpuop_func op_06a8_40_ff; +extern cpuop_func op_06b0_40_nf; +extern cpuop_func op_06b0_40_ff; +extern cpuop_func op_06b8_40_nf; +extern cpuop_func op_06b8_40_ff; +extern cpuop_func op_06b9_40_nf; +extern cpuop_func op_06b9_40_ff; +extern cpuop_func op_06c0_40_nf; +extern cpuop_func op_06c0_40_ff; +extern cpuop_func op_06c8_40_nf; +extern cpuop_func op_06c8_40_ff; +extern cpuop_func op_06d0_40_nf; +extern cpuop_func op_06d0_40_ff; +extern cpuop_func op_06e8_40_nf; +extern cpuop_func op_06e8_40_ff; +extern cpuop_func op_06f0_40_nf; +extern cpuop_func op_06f0_40_ff; +extern cpuop_func op_06f8_40_nf; +extern cpuop_func op_06f8_40_ff; +extern cpuop_func op_06f9_40_nf; +extern cpuop_func op_06f9_40_ff; +extern cpuop_func op_06fa_40_nf; +extern cpuop_func op_06fa_40_ff; +extern cpuop_func op_06fb_40_nf; +extern cpuop_func op_06fb_40_ff; +extern cpuop_func op_0800_40_nf; +extern cpuop_func op_0800_40_ff; +extern cpuop_func op_0810_40_nf; +extern cpuop_func op_0810_40_ff; +extern cpuop_func op_0818_40_nf; +extern cpuop_func op_0818_40_ff; +extern cpuop_func op_0820_40_nf; +extern cpuop_func op_0820_40_ff; +extern cpuop_func op_0828_40_nf; +extern cpuop_func op_0828_40_ff; +extern cpuop_func op_0830_40_nf; +extern cpuop_func op_0830_40_ff; +extern cpuop_func op_0838_40_nf; +extern cpuop_func op_0838_40_ff; +extern cpuop_func op_0839_40_nf; +extern cpuop_func op_0839_40_ff; +extern cpuop_func op_083a_40_nf; +extern cpuop_func op_083a_40_ff; +extern cpuop_func op_083b_40_nf; +extern cpuop_func op_083b_40_ff; +extern cpuop_func op_0840_40_nf; +extern cpuop_func op_0840_40_ff; +extern cpuop_func op_0850_40_nf; +extern cpuop_func op_0850_40_ff; +extern cpuop_func op_0858_40_nf; +extern cpuop_func op_0858_40_ff; +extern cpuop_func op_0860_40_nf; +extern cpuop_func op_0860_40_ff; +extern cpuop_func op_0868_40_nf; +extern cpuop_func op_0868_40_ff; +extern cpuop_func op_0870_40_nf; +extern cpuop_func op_0870_40_ff; +extern cpuop_func op_0878_40_nf; +extern cpuop_func op_0878_40_ff; +extern cpuop_func op_0879_40_nf; +extern cpuop_func op_0879_40_ff; +extern cpuop_func op_0880_40_nf; +extern cpuop_func op_0880_40_ff; +extern cpuop_func op_0890_40_nf; +extern cpuop_func op_0890_40_ff; +extern cpuop_func op_0898_40_nf; +extern cpuop_func op_0898_40_ff; +extern cpuop_func op_08a0_40_nf; +extern cpuop_func op_08a0_40_ff; +extern cpuop_func op_08a8_40_nf; +extern cpuop_func op_08a8_40_ff; +extern cpuop_func op_08b0_40_nf; +extern cpuop_func op_08b0_40_ff; +extern cpuop_func op_08b8_40_nf; +extern cpuop_func op_08b8_40_ff; +extern cpuop_func op_08b9_40_nf; +extern cpuop_func op_08b9_40_ff; +extern cpuop_func op_08c0_40_nf; +extern cpuop_func op_08c0_40_ff; +extern cpuop_func op_08d0_40_nf; +extern cpuop_func op_08d0_40_ff; +extern cpuop_func op_08d8_40_nf; +extern cpuop_func op_08d8_40_ff; +extern cpuop_func op_08e0_40_nf; +extern cpuop_func op_08e0_40_ff; +extern cpuop_func op_08e8_40_nf; +extern cpuop_func op_08e8_40_ff; +extern cpuop_func op_08f0_40_nf; +extern cpuop_func op_08f0_40_ff; +extern cpuop_func op_08f8_40_nf; +extern cpuop_func op_08f8_40_ff; +extern cpuop_func op_08f9_40_nf; +extern cpuop_func op_08f9_40_ff; +extern cpuop_func op_0a00_40_nf; +extern cpuop_func op_0a00_40_ff; +extern cpuop_func op_0a10_40_nf; +extern cpuop_func op_0a10_40_ff; +extern cpuop_func op_0a18_40_nf; +extern cpuop_func op_0a18_40_ff; +extern cpuop_func op_0a20_40_nf; +extern cpuop_func op_0a20_40_ff; +extern cpuop_func op_0a28_40_nf; +extern cpuop_func op_0a28_40_ff; +extern cpuop_func op_0a30_40_nf; +extern cpuop_func op_0a30_40_ff; +extern cpuop_func op_0a38_40_nf; +extern cpuop_func op_0a38_40_ff; +extern cpuop_func op_0a39_40_nf; +extern cpuop_func op_0a39_40_ff; +extern cpuop_func op_0a3c_40_nf; +extern cpuop_func op_0a3c_40_ff; +extern cpuop_func op_0a40_40_nf; +extern cpuop_func op_0a40_40_ff; +extern cpuop_func op_0a50_40_nf; +extern cpuop_func op_0a50_40_ff; +extern cpuop_func op_0a58_40_nf; +extern cpuop_func op_0a58_40_ff; +extern cpuop_func op_0a60_40_nf; +extern cpuop_func op_0a60_40_ff; +extern cpuop_func op_0a68_40_nf; +extern cpuop_func op_0a68_40_ff; +extern cpuop_func op_0a70_40_nf; +extern cpuop_func op_0a70_40_ff; +extern cpuop_func op_0a78_40_nf; +extern cpuop_func op_0a78_40_ff; +extern cpuop_func op_0a79_40_nf; +extern cpuop_func op_0a79_40_ff; +extern cpuop_func op_0a7c_40_nf; +extern cpuop_func op_0a7c_40_ff; +extern cpuop_func op_0a80_40_nf; +extern cpuop_func op_0a80_40_ff; +extern cpuop_func op_0a90_40_nf; +extern cpuop_func op_0a90_40_ff; +extern cpuop_func op_0a98_40_nf; +extern cpuop_func op_0a98_40_ff; +extern cpuop_func op_0aa0_40_nf; +extern cpuop_func op_0aa0_40_ff; +extern cpuop_func op_0aa8_40_nf; +extern cpuop_func op_0aa8_40_ff; +extern cpuop_func op_0ab0_40_nf; +extern cpuop_func op_0ab0_40_ff; +extern cpuop_func op_0ab8_40_nf; +extern cpuop_func op_0ab8_40_ff; +extern cpuop_func op_0ab9_40_nf; +extern cpuop_func op_0ab9_40_ff; +extern cpuop_func op_0ad0_40_nf; +extern cpuop_func op_0ad0_40_ff; +extern cpuop_func op_0ad8_40_nf; +extern cpuop_func op_0ad8_40_ff; +extern cpuop_func op_0ae0_40_nf; +extern cpuop_func op_0ae0_40_ff; +extern cpuop_func op_0ae8_40_nf; +extern cpuop_func op_0ae8_40_ff; +extern cpuop_func op_0af0_40_nf; +extern cpuop_func op_0af0_40_ff; +extern cpuop_func op_0af8_40_nf; +extern cpuop_func op_0af8_40_ff; +extern cpuop_func op_0af9_40_nf; +extern cpuop_func op_0af9_40_ff; +extern cpuop_func op_0c00_40_nf; +extern cpuop_func op_0c00_40_ff; +extern cpuop_func op_0c10_40_nf; +extern cpuop_func op_0c10_40_ff; +extern cpuop_func op_0c18_40_nf; +extern cpuop_func op_0c18_40_ff; +extern cpuop_func op_0c20_40_nf; +extern cpuop_func op_0c20_40_ff; +extern cpuop_func op_0c28_40_nf; +extern cpuop_func op_0c28_40_ff; +extern cpuop_func op_0c30_40_nf; +extern cpuop_func op_0c30_40_ff; +extern cpuop_func op_0c38_40_nf; +extern cpuop_func op_0c38_40_ff; +extern cpuop_func op_0c39_40_nf; +extern cpuop_func op_0c39_40_ff; +extern cpuop_func op_0c3a_40_nf; +extern cpuop_func op_0c3a_40_ff; +extern cpuop_func op_0c3b_40_nf; +extern cpuop_func op_0c3b_40_ff; +extern cpuop_func op_0c40_40_nf; +extern cpuop_func op_0c40_40_ff; +extern cpuop_func op_0c50_40_nf; +extern cpuop_func op_0c50_40_ff; +extern cpuop_func op_0c58_40_nf; +extern cpuop_func op_0c58_40_ff; +extern cpuop_func op_0c60_40_nf; +extern cpuop_func op_0c60_40_ff; +extern cpuop_func op_0c68_40_nf; +extern cpuop_func op_0c68_40_ff; +extern cpuop_func op_0c70_40_nf; +extern cpuop_func op_0c70_40_ff; +extern cpuop_func op_0c78_40_nf; +extern cpuop_func op_0c78_40_ff; +extern cpuop_func op_0c79_40_nf; +extern cpuop_func op_0c79_40_ff; +extern cpuop_func op_0c7a_40_nf; +extern cpuop_func op_0c7a_40_ff; +extern cpuop_func op_0c7b_40_nf; +extern cpuop_func op_0c7b_40_ff; +extern cpuop_func op_0c80_40_nf; +extern cpuop_func op_0c80_40_ff; +extern cpuop_func op_0c90_40_nf; +extern cpuop_func op_0c90_40_ff; +extern cpuop_func op_0c98_40_nf; +extern cpuop_func op_0c98_40_ff; +extern cpuop_func op_0ca0_40_nf; +extern cpuop_func op_0ca0_40_ff; +extern cpuop_func op_0ca8_40_nf; +extern cpuop_func op_0ca8_40_ff; +extern cpuop_func op_0cb0_40_nf; +extern cpuop_func op_0cb0_40_ff; +extern cpuop_func op_0cb8_40_nf; +extern cpuop_func op_0cb8_40_ff; +extern cpuop_func op_0cb9_40_nf; +extern cpuop_func op_0cb9_40_ff; +extern cpuop_func op_0cba_40_nf; +extern cpuop_func op_0cba_40_ff; +extern cpuop_func op_0cbb_40_nf; +extern cpuop_func op_0cbb_40_ff; +extern cpuop_func op_0cd0_40_nf; +extern cpuop_func op_0cd0_40_ff; +extern cpuop_func op_0cd8_40_nf; +extern cpuop_func op_0cd8_40_ff; +extern cpuop_func op_0ce0_40_nf; +extern cpuop_func op_0ce0_40_ff; +extern cpuop_func op_0ce8_40_nf; +extern cpuop_func op_0ce8_40_ff; +extern cpuop_func op_0cf0_40_nf; +extern cpuop_func op_0cf0_40_ff; +extern cpuop_func op_0cf8_40_nf; +extern cpuop_func op_0cf8_40_ff; +extern cpuop_func op_0cf9_40_nf; +extern cpuop_func op_0cf9_40_ff; +extern cpuop_func op_0cfc_40_nf; +extern cpuop_func op_0cfc_40_ff; +extern cpuop_func op_0e10_40_nf; +extern cpuop_func op_0e10_40_ff; +extern cpuop_func op_0e18_40_nf; +extern cpuop_func op_0e18_40_ff; +extern cpuop_func op_0e20_40_nf; +extern cpuop_func op_0e20_40_ff; +extern cpuop_func op_0e28_40_nf; +extern cpuop_func op_0e28_40_ff; +extern cpuop_func op_0e30_40_nf; +extern cpuop_func op_0e30_40_ff; +extern cpuop_func op_0e38_40_nf; +extern cpuop_func op_0e38_40_ff; +extern cpuop_func op_0e39_40_nf; +extern cpuop_func op_0e39_40_ff; +extern cpuop_func op_0e50_40_nf; +extern cpuop_func op_0e50_40_ff; +extern cpuop_func op_0e58_40_nf; +extern cpuop_func op_0e58_40_ff; +extern cpuop_func op_0e60_40_nf; +extern cpuop_func op_0e60_40_ff; +extern cpuop_func op_0e68_40_nf; +extern cpuop_func op_0e68_40_ff; +extern cpuop_func op_0e70_40_nf; +extern cpuop_func op_0e70_40_ff; +extern cpuop_func op_0e78_40_nf; +extern cpuop_func op_0e78_40_ff; +extern cpuop_func op_0e79_40_nf; +extern cpuop_func op_0e79_40_ff; +extern cpuop_func op_0e90_40_nf; +extern cpuop_func op_0e90_40_ff; +extern cpuop_func op_0e98_40_nf; +extern cpuop_func op_0e98_40_ff; +extern cpuop_func op_0ea0_40_nf; +extern cpuop_func op_0ea0_40_ff; +extern cpuop_func op_0ea8_40_nf; +extern cpuop_func op_0ea8_40_ff; +extern cpuop_func op_0eb0_40_nf; +extern cpuop_func op_0eb0_40_ff; +extern cpuop_func op_0eb8_40_nf; +extern cpuop_func op_0eb8_40_ff; +extern cpuop_func op_0eb9_40_nf; +extern cpuop_func op_0eb9_40_ff; +extern cpuop_func op_0ed0_40_nf; +extern cpuop_func op_0ed0_40_ff; +extern cpuop_func op_0ed8_40_nf; +extern cpuop_func op_0ed8_40_ff; +extern cpuop_func op_0ee0_40_nf; +extern cpuop_func op_0ee0_40_ff; +extern cpuop_func op_0ee8_40_nf; +extern cpuop_func op_0ee8_40_ff; +extern cpuop_func op_0ef0_40_nf; +extern cpuop_func op_0ef0_40_ff; +extern cpuop_func op_0ef8_40_nf; +extern cpuop_func op_0ef8_40_ff; +extern cpuop_func op_0ef9_40_nf; +extern cpuop_func op_0ef9_40_ff; +extern cpuop_func op_0efc_40_nf; +extern cpuop_func op_0efc_40_ff; +extern cpuop_func op_1000_40_nf; +extern cpuop_func op_1000_40_ff; +extern cpuop_func op_1010_40_nf; +extern cpuop_func op_1010_40_ff; +extern cpuop_func op_1018_40_nf; +extern cpuop_func op_1018_40_ff; +extern cpuop_func op_1020_40_nf; +extern cpuop_func op_1020_40_ff; +extern cpuop_func op_1028_40_nf; +extern cpuop_func op_1028_40_ff; +extern cpuop_func op_1030_40_nf; +extern cpuop_func op_1030_40_ff; +extern cpuop_func op_1038_40_nf; +extern cpuop_func op_1038_40_ff; +extern cpuop_func op_1039_40_nf; +extern cpuop_func op_1039_40_ff; +extern cpuop_func op_103a_40_nf; +extern cpuop_func op_103a_40_ff; +extern cpuop_func op_103b_40_nf; +extern cpuop_func op_103b_40_ff; +extern cpuop_func op_103c_40_nf; +extern cpuop_func op_103c_40_ff; +extern cpuop_func op_1080_40_nf; +extern cpuop_func op_1080_40_ff; +extern cpuop_func op_1090_40_nf; +extern cpuop_func op_1090_40_ff; +extern cpuop_func op_1098_40_nf; +extern cpuop_func op_1098_40_ff; +extern cpuop_func op_10a0_40_nf; +extern cpuop_func op_10a0_40_ff; +extern cpuop_func op_10a8_40_nf; +extern cpuop_func op_10a8_40_ff; +extern cpuop_func op_10b0_40_nf; +extern cpuop_func op_10b0_40_ff; +extern cpuop_func op_10b8_40_nf; +extern cpuop_func op_10b8_40_ff; +extern cpuop_func op_10b9_40_nf; +extern cpuop_func op_10b9_40_ff; +extern cpuop_func op_10ba_40_nf; +extern cpuop_func op_10ba_40_ff; +extern cpuop_func op_10bb_40_nf; +extern cpuop_func op_10bb_40_ff; +extern cpuop_func op_10bc_40_nf; +extern cpuop_func op_10bc_40_ff; +extern cpuop_func op_10c0_40_nf; +extern cpuop_func op_10c0_40_ff; +extern cpuop_func op_10d0_40_nf; +extern cpuop_func op_10d0_40_ff; +extern cpuop_func op_10d8_40_nf; +extern cpuop_func op_10d8_40_ff; +extern cpuop_func op_10e0_40_nf; +extern cpuop_func op_10e0_40_ff; +extern cpuop_func op_10e8_40_nf; +extern cpuop_func op_10e8_40_ff; +extern cpuop_func op_10f0_40_nf; +extern cpuop_func op_10f0_40_ff; +extern cpuop_func op_10f8_40_nf; +extern cpuop_func op_10f8_40_ff; +extern cpuop_func op_10f9_40_nf; +extern cpuop_func op_10f9_40_ff; +extern cpuop_func op_10fa_40_nf; +extern cpuop_func op_10fa_40_ff; +extern cpuop_func op_10fb_40_nf; +extern cpuop_func op_10fb_40_ff; +extern cpuop_func op_10fc_40_nf; +extern cpuop_func op_10fc_40_ff; +extern cpuop_func op_1100_40_nf; +extern cpuop_func op_1100_40_ff; +extern cpuop_func op_1110_40_nf; +extern cpuop_func op_1110_40_ff; +extern cpuop_func op_1118_40_nf; +extern cpuop_func op_1118_40_ff; +extern cpuop_func op_1120_40_nf; +extern cpuop_func op_1120_40_ff; +extern cpuop_func op_1128_40_nf; +extern cpuop_func op_1128_40_ff; +extern cpuop_func op_1130_40_nf; +extern cpuop_func op_1130_40_ff; +extern cpuop_func op_1138_40_nf; +extern cpuop_func op_1138_40_ff; +extern cpuop_func op_1139_40_nf; +extern cpuop_func op_1139_40_ff; +extern cpuop_func op_113a_40_nf; +extern cpuop_func op_113a_40_ff; +extern cpuop_func op_113b_40_nf; +extern cpuop_func op_113b_40_ff; +extern cpuop_func op_113c_40_nf; +extern cpuop_func op_113c_40_ff; +extern cpuop_func op_1140_40_nf; +extern cpuop_func op_1140_40_ff; +extern cpuop_func op_1150_40_nf; +extern cpuop_func op_1150_40_ff; +extern cpuop_func op_1158_40_nf; +extern cpuop_func op_1158_40_ff; +extern cpuop_func op_1160_40_nf; +extern cpuop_func op_1160_40_ff; +extern cpuop_func op_1168_40_nf; +extern cpuop_func op_1168_40_ff; +extern cpuop_func op_1170_40_nf; +extern cpuop_func op_1170_40_ff; +extern cpuop_func op_1178_40_nf; +extern cpuop_func op_1178_40_ff; +extern cpuop_func op_1179_40_nf; +extern cpuop_func op_1179_40_ff; +extern cpuop_func op_117a_40_nf; +extern cpuop_func op_117a_40_ff; +extern cpuop_func op_117b_40_nf; +extern cpuop_func op_117b_40_ff; +extern cpuop_func op_117c_40_nf; +extern cpuop_func op_117c_40_ff; +extern cpuop_func op_1180_40_nf; +extern cpuop_func op_1180_40_ff; +extern cpuop_func op_1190_40_nf; +extern cpuop_func op_1190_40_ff; +extern cpuop_func op_1198_40_nf; +extern cpuop_func op_1198_40_ff; +extern cpuop_func op_11a0_40_nf; +extern cpuop_func op_11a0_40_ff; +extern cpuop_func op_11a8_40_nf; +extern cpuop_func op_11a8_40_ff; +extern cpuop_func op_11b0_40_nf; +extern cpuop_func op_11b0_40_ff; +extern cpuop_func op_11b8_40_nf; +extern cpuop_func op_11b8_40_ff; +extern cpuop_func op_11b9_40_nf; +extern cpuop_func op_11b9_40_ff; +extern cpuop_func op_11ba_40_nf; +extern cpuop_func op_11ba_40_ff; +extern cpuop_func op_11bb_40_nf; +extern cpuop_func op_11bb_40_ff; +extern cpuop_func op_11bc_40_nf; +extern cpuop_func op_11bc_40_ff; +extern cpuop_func op_11c0_40_nf; +extern cpuop_func op_11c0_40_ff; +extern cpuop_func op_11d0_40_nf; +extern cpuop_func op_11d0_40_ff; +extern cpuop_func op_11d8_40_nf; +extern cpuop_func op_11d8_40_ff; +extern cpuop_func op_11e0_40_nf; +extern cpuop_func op_11e0_40_ff; +extern cpuop_func op_11e8_40_nf; +extern cpuop_func op_11e8_40_ff; +extern cpuop_func op_11f0_40_nf; +extern cpuop_func op_11f0_40_ff; +extern cpuop_func op_11f8_40_nf; +extern cpuop_func op_11f8_40_ff; +extern cpuop_func op_11f9_40_nf; +extern cpuop_func op_11f9_40_ff; +extern cpuop_func op_11fa_40_nf; +extern cpuop_func op_11fa_40_ff; +extern cpuop_func op_11fb_40_nf; +extern cpuop_func op_11fb_40_ff; +extern cpuop_func op_11fc_40_nf; +extern cpuop_func op_11fc_40_ff; +extern cpuop_func op_13c0_40_nf; +extern cpuop_func op_13c0_40_ff; +extern cpuop_func op_13d0_40_nf; +extern cpuop_func op_13d0_40_ff; +extern cpuop_func op_13d8_40_nf; +extern cpuop_func op_13d8_40_ff; +extern cpuop_func op_13e0_40_nf; +extern cpuop_func op_13e0_40_ff; +extern cpuop_func op_13e8_40_nf; +extern cpuop_func op_13e8_40_ff; +extern cpuop_func op_13f0_40_nf; +extern cpuop_func op_13f0_40_ff; +extern cpuop_func op_13f8_40_nf; +extern cpuop_func op_13f8_40_ff; +extern cpuop_func op_13f9_40_nf; +extern cpuop_func op_13f9_40_ff; +extern cpuop_func op_13fa_40_nf; +extern cpuop_func op_13fa_40_ff; +extern cpuop_func op_13fb_40_nf; +extern cpuop_func op_13fb_40_ff; +extern cpuop_func op_13fc_40_nf; +extern cpuop_func op_13fc_40_ff; +extern cpuop_func op_2000_40_nf; +extern cpuop_func op_2000_40_ff; +extern cpuop_func op_2008_40_nf; +extern cpuop_func op_2008_40_ff; +extern cpuop_func op_2010_40_nf; +extern cpuop_func op_2010_40_ff; +extern cpuop_func op_2018_40_nf; +extern cpuop_func op_2018_40_ff; +extern cpuop_func op_2020_40_nf; +extern cpuop_func op_2020_40_ff; +extern cpuop_func op_2028_40_nf; +extern cpuop_func op_2028_40_ff; +extern cpuop_func op_2030_40_nf; +extern cpuop_func op_2030_40_ff; +extern cpuop_func op_2038_40_nf; +extern cpuop_func op_2038_40_ff; +extern cpuop_func op_2039_40_nf; +extern cpuop_func op_2039_40_ff; +extern cpuop_func op_203a_40_nf; +extern cpuop_func op_203a_40_ff; +extern cpuop_func op_203b_40_nf; +extern cpuop_func op_203b_40_ff; +extern cpuop_func op_203c_40_nf; +extern cpuop_func op_203c_40_ff; +extern cpuop_func op_2040_40_nf; +extern cpuop_func op_2040_40_ff; +extern cpuop_func op_2048_40_nf; +extern cpuop_func op_2048_40_ff; +extern cpuop_func op_2050_40_nf; +extern cpuop_func op_2050_40_ff; +extern cpuop_func op_2058_40_nf; +extern cpuop_func op_2058_40_ff; +extern cpuop_func op_2060_40_nf; +extern cpuop_func op_2060_40_ff; +extern cpuop_func op_2068_40_nf; +extern cpuop_func op_2068_40_ff; +extern cpuop_func op_2070_40_nf; +extern cpuop_func op_2070_40_ff; +extern cpuop_func op_2078_40_nf; +extern cpuop_func op_2078_40_ff; +extern cpuop_func op_2079_40_nf; +extern cpuop_func op_2079_40_ff; +extern cpuop_func op_207a_40_nf; +extern cpuop_func op_207a_40_ff; +extern cpuop_func op_207b_40_nf; +extern cpuop_func op_207b_40_ff; +extern cpuop_func op_207c_40_nf; +extern cpuop_func op_207c_40_ff; +extern cpuop_func op_2080_40_nf; +extern cpuop_func op_2080_40_ff; +extern cpuop_func op_2088_40_nf; +extern cpuop_func op_2088_40_ff; +extern cpuop_func op_2090_40_nf; +extern cpuop_func op_2090_40_ff; +extern cpuop_func op_2098_40_nf; +extern cpuop_func op_2098_40_ff; +extern cpuop_func op_20a0_40_nf; +extern cpuop_func op_20a0_40_ff; +extern cpuop_func op_20a8_40_nf; +extern cpuop_func op_20a8_40_ff; +extern cpuop_func op_20b0_40_nf; +extern cpuop_func op_20b0_40_ff; +extern cpuop_func op_20b8_40_nf; +extern cpuop_func op_20b8_40_ff; +extern cpuop_func op_20b9_40_nf; +extern cpuop_func op_20b9_40_ff; +extern cpuop_func op_20ba_40_nf; +extern cpuop_func op_20ba_40_ff; +extern cpuop_func op_20bb_40_nf; +extern cpuop_func op_20bb_40_ff; +extern cpuop_func op_20bc_40_nf; +extern cpuop_func op_20bc_40_ff; +extern cpuop_func op_20c0_40_nf; +extern cpuop_func op_20c0_40_ff; +extern cpuop_func op_20c8_40_nf; +extern cpuop_func op_20c8_40_ff; +extern cpuop_func op_20d0_40_nf; +extern cpuop_func op_20d0_40_ff; +extern cpuop_func op_20d8_40_nf; +extern cpuop_func op_20d8_40_ff; +extern cpuop_func op_20e0_40_nf; +extern cpuop_func op_20e0_40_ff; +extern cpuop_func op_20e8_40_nf; +extern cpuop_func op_20e8_40_ff; +extern cpuop_func op_20f0_40_nf; +extern cpuop_func op_20f0_40_ff; +extern cpuop_func op_20f8_40_nf; +extern cpuop_func op_20f8_40_ff; +extern cpuop_func op_20f9_40_nf; +extern cpuop_func op_20f9_40_ff; +extern cpuop_func op_20fa_40_nf; +extern cpuop_func op_20fa_40_ff; +extern cpuop_func op_20fb_40_nf; +extern cpuop_func op_20fb_40_ff; +extern cpuop_func op_20fc_40_nf; +extern cpuop_func op_20fc_40_ff; +extern cpuop_func op_2100_40_nf; +extern cpuop_func op_2100_40_ff; +extern cpuop_func op_2108_40_nf; +extern cpuop_func op_2108_40_ff; +extern cpuop_func op_2110_40_nf; +extern cpuop_func op_2110_40_ff; +extern cpuop_func op_2118_40_nf; +extern cpuop_func op_2118_40_ff; +extern cpuop_func op_2120_40_nf; +extern cpuop_func op_2120_40_ff; +extern cpuop_func op_2128_40_nf; +extern cpuop_func op_2128_40_ff; +extern cpuop_func op_2130_40_nf; +extern cpuop_func op_2130_40_ff; +extern cpuop_func op_2138_40_nf; +extern cpuop_func op_2138_40_ff; +extern cpuop_func op_2139_40_nf; +extern cpuop_func op_2139_40_ff; +extern cpuop_func op_213a_40_nf; +extern cpuop_func op_213a_40_ff; +extern cpuop_func op_213b_40_nf; +extern cpuop_func op_213b_40_ff; +extern cpuop_func op_213c_40_nf; +extern cpuop_func op_213c_40_ff; +extern cpuop_func op_2140_40_nf; +extern cpuop_func op_2140_40_ff; +extern cpuop_func op_2148_40_nf; +extern cpuop_func op_2148_40_ff; +extern cpuop_func op_2150_40_nf; +extern cpuop_func op_2150_40_ff; +extern cpuop_func op_2158_40_nf; +extern cpuop_func op_2158_40_ff; +extern cpuop_func op_2160_40_nf; +extern cpuop_func op_2160_40_ff; +extern cpuop_func op_2168_40_nf; +extern cpuop_func op_2168_40_ff; +extern cpuop_func op_2170_40_nf; +extern cpuop_func op_2170_40_ff; +extern cpuop_func op_2178_40_nf; +extern cpuop_func op_2178_40_ff; +extern cpuop_func op_2179_40_nf; +extern cpuop_func op_2179_40_ff; +extern cpuop_func op_217a_40_nf; +extern cpuop_func op_217a_40_ff; +extern cpuop_func op_217b_40_nf; +extern cpuop_func op_217b_40_ff; +extern cpuop_func op_217c_40_nf; +extern cpuop_func op_217c_40_ff; +extern cpuop_func op_2180_40_nf; +extern cpuop_func op_2180_40_ff; +extern cpuop_func op_2188_40_nf; +extern cpuop_func op_2188_40_ff; +extern cpuop_func op_2190_40_nf; +extern cpuop_func op_2190_40_ff; +extern cpuop_func op_2198_40_nf; +extern cpuop_func op_2198_40_ff; +extern cpuop_func op_21a0_40_nf; +extern cpuop_func op_21a0_40_ff; +extern cpuop_func op_21a8_40_nf; +extern cpuop_func op_21a8_40_ff; +extern cpuop_func op_21b0_40_nf; +extern cpuop_func op_21b0_40_ff; +extern cpuop_func op_21b8_40_nf; +extern cpuop_func op_21b8_40_ff; +extern cpuop_func op_21b9_40_nf; +extern cpuop_func op_21b9_40_ff; +extern cpuop_func op_21ba_40_nf; +extern cpuop_func op_21ba_40_ff; +extern cpuop_func op_21bb_40_nf; +extern cpuop_func op_21bb_40_ff; +extern cpuop_func op_21bc_40_nf; +extern cpuop_func op_21bc_40_ff; +extern cpuop_func op_21c0_40_nf; +extern cpuop_func op_21c0_40_ff; +extern cpuop_func op_21c8_40_nf; +extern cpuop_func op_21c8_40_ff; +extern cpuop_func op_21d0_40_nf; +extern cpuop_func op_21d0_40_ff; +extern cpuop_func op_21d8_40_nf; +extern cpuop_func op_21d8_40_ff; +extern cpuop_func op_21e0_40_nf; +extern cpuop_func op_21e0_40_ff; +extern cpuop_func op_21e8_40_nf; +extern cpuop_func op_21e8_40_ff; +extern cpuop_func op_21f0_40_nf; +extern cpuop_func op_21f0_40_ff; +extern cpuop_func op_21f8_40_nf; +extern cpuop_func op_21f8_40_ff; +extern cpuop_func op_21f9_40_nf; +extern cpuop_func op_21f9_40_ff; +extern cpuop_func op_21fa_40_nf; +extern cpuop_func op_21fa_40_ff; +extern cpuop_func op_21fb_40_nf; +extern cpuop_func op_21fb_40_ff; +extern cpuop_func op_21fc_40_nf; +extern cpuop_func op_21fc_40_ff; +extern cpuop_func op_23c0_40_nf; +extern cpuop_func op_23c0_40_ff; +extern cpuop_func op_23c8_40_nf; +extern cpuop_func op_23c8_40_ff; +extern cpuop_func op_23d0_40_nf; +extern cpuop_func op_23d0_40_ff; +extern cpuop_func op_23d8_40_nf; +extern cpuop_func op_23d8_40_ff; +extern cpuop_func op_23e0_40_nf; +extern cpuop_func op_23e0_40_ff; +extern cpuop_func op_23e8_40_nf; +extern cpuop_func op_23e8_40_ff; +extern cpuop_func op_23f0_40_nf; +extern cpuop_func op_23f0_40_ff; +extern cpuop_func op_23f8_40_nf; +extern cpuop_func op_23f8_40_ff; +extern cpuop_func op_23f9_40_nf; +extern cpuop_func op_23f9_40_ff; +extern cpuop_func op_23fa_40_nf; +extern cpuop_func op_23fa_40_ff; +extern cpuop_func op_23fb_40_nf; +extern cpuop_func op_23fb_40_ff; +extern cpuop_func op_23fc_40_nf; +extern cpuop_func op_23fc_40_ff; +extern cpuop_func op_3000_40_nf; +extern cpuop_func op_3000_40_ff; +extern cpuop_func op_3008_40_nf; +extern cpuop_func op_3008_40_ff; +extern cpuop_func op_3010_40_nf; +extern cpuop_func op_3010_40_ff; +extern cpuop_func op_3018_40_nf; +extern cpuop_func op_3018_40_ff; +extern cpuop_func op_3020_40_nf; +extern cpuop_func op_3020_40_ff; +extern cpuop_func op_3028_40_nf; +extern cpuop_func op_3028_40_ff; +extern cpuop_func op_3030_40_nf; +extern cpuop_func op_3030_40_ff; +extern cpuop_func op_3038_40_nf; +extern cpuop_func op_3038_40_ff; +extern cpuop_func op_3039_40_nf; +extern cpuop_func op_3039_40_ff; +extern cpuop_func op_303a_40_nf; +extern cpuop_func op_303a_40_ff; +extern cpuop_func op_303b_40_nf; +extern cpuop_func op_303b_40_ff; +extern cpuop_func op_303c_40_nf; +extern cpuop_func op_303c_40_ff; +extern cpuop_func op_3040_40_nf; +extern cpuop_func op_3040_40_ff; +extern cpuop_func op_3048_40_nf; +extern cpuop_func op_3048_40_ff; +extern cpuop_func op_3050_40_nf; +extern cpuop_func op_3050_40_ff; +extern cpuop_func op_3058_40_nf; +extern cpuop_func op_3058_40_ff; +extern cpuop_func op_3060_40_nf; +extern cpuop_func op_3060_40_ff; +extern cpuop_func op_3068_40_nf; +extern cpuop_func op_3068_40_ff; +extern cpuop_func op_3070_40_nf; +extern cpuop_func op_3070_40_ff; +extern cpuop_func op_3078_40_nf; +extern cpuop_func op_3078_40_ff; +extern cpuop_func op_3079_40_nf; +extern cpuop_func op_3079_40_ff; +extern cpuop_func op_307a_40_nf; +extern cpuop_func op_307a_40_ff; +extern cpuop_func op_307b_40_nf; +extern cpuop_func op_307b_40_ff; +extern cpuop_func op_307c_40_nf; +extern cpuop_func op_307c_40_ff; +extern cpuop_func op_3080_40_nf; +extern cpuop_func op_3080_40_ff; +extern cpuop_func op_3088_40_nf; +extern cpuop_func op_3088_40_ff; +extern cpuop_func op_3090_40_nf; +extern cpuop_func op_3090_40_ff; +extern cpuop_func op_3098_40_nf; +extern cpuop_func op_3098_40_ff; +extern cpuop_func op_30a0_40_nf; +extern cpuop_func op_30a0_40_ff; +extern cpuop_func op_30a8_40_nf; +extern cpuop_func op_30a8_40_ff; +extern cpuop_func op_30b0_40_nf; +extern cpuop_func op_30b0_40_ff; +extern cpuop_func op_30b8_40_nf; +extern cpuop_func op_30b8_40_ff; +extern cpuop_func op_30b9_40_nf; +extern cpuop_func op_30b9_40_ff; +extern cpuop_func op_30ba_40_nf; +extern cpuop_func op_30ba_40_ff; +extern cpuop_func op_30bb_40_nf; +extern cpuop_func op_30bb_40_ff; +extern cpuop_func op_30bc_40_nf; +extern cpuop_func op_30bc_40_ff; +extern cpuop_func op_30c0_40_nf; +extern cpuop_func op_30c0_40_ff; +extern cpuop_func op_30c8_40_nf; +extern cpuop_func op_30c8_40_ff; +extern cpuop_func op_30d0_40_nf; +extern cpuop_func op_30d0_40_ff; +extern cpuop_func op_30d8_40_nf; +extern cpuop_func op_30d8_40_ff; +extern cpuop_func op_30e0_40_nf; +extern cpuop_func op_30e0_40_ff; +extern cpuop_func op_30e8_40_nf; +extern cpuop_func op_30e8_40_ff; +extern cpuop_func op_30f0_40_nf; +extern cpuop_func op_30f0_40_ff; +extern cpuop_func op_30f8_40_nf; +extern cpuop_func op_30f8_40_ff; +extern cpuop_func op_30f9_40_nf; +extern cpuop_func op_30f9_40_ff; +extern cpuop_func op_30fa_40_nf; +extern cpuop_func op_30fa_40_ff; +extern cpuop_func op_30fb_40_nf; +extern cpuop_func op_30fb_40_ff; +extern cpuop_func op_30fc_40_nf; +extern cpuop_func op_30fc_40_ff; +extern cpuop_func op_3100_40_nf; +extern cpuop_func op_3100_40_ff; +extern cpuop_func op_3108_40_nf; +extern cpuop_func op_3108_40_ff; +extern cpuop_func op_3110_40_nf; +extern cpuop_func op_3110_40_ff; +extern cpuop_func op_3118_40_nf; +extern cpuop_func op_3118_40_ff; +extern cpuop_func op_3120_40_nf; +extern cpuop_func op_3120_40_ff; +extern cpuop_func op_3128_40_nf; +extern cpuop_func op_3128_40_ff; +extern cpuop_func op_3130_40_nf; +extern cpuop_func op_3130_40_ff; +extern cpuop_func op_3138_40_nf; +extern cpuop_func op_3138_40_ff; +extern cpuop_func op_3139_40_nf; +extern cpuop_func op_3139_40_ff; +extern cpuop_func op_313a_40_nf; +extern cpuop_func op_313a_40_ff; +extern cpuop_func op_313b_40_nf; +extern cpuop_func op_313b_40_ff; +extern cpuop_func op_313c_40_nf; +extern cpuop_func op_313c_40_ff; +extern cpuop_func op_3140_40_nf; +extern cpuop_func op_3140_40_ff; +extern cpuop_func op_3148_40_nf; +extern cpuop_func op_3148_40_ff; +extern cpuop_func op_3150_40_nf; +extern cpuop_func op_3150_40_ff; +extern cpuop_func op_3158_40_nf; +extern cpuop_func op_3158_40_ff; +extern cpuop_func op_3160_40_nf; +extern cpuop_func op_3160_40_ff; +extern cpuop_func op_3168_40_nf; +extern cpuop_func op_3168_40_ff; +extern cpuop_func op_3170_40_nf; +extern cpuop_func op_3170_40_ff; +extern cpuop_func op_3178_40_nf; +extern cpuop_func op_3178_40_ff; +extern cpuop_func op_3179_40_nf; +extern cpuop_func op_3179_40_ff; +extern cpuop_func op_317a_40_nf; +extern cpuop_func op_317a_40_ff; +extern cpuop_func op_317b_40_nf; +extern cpuop_func op_317b_40_ff; +extern cpuop_func op_317c_40_nf; +extern cpuop_func op_317c_40_ff; +extern cpuop_func op_3180_40_nf; +extern cpuop_func op_3180_40_ff; +extern cpuop_func op_3188_40_nf; +extern cpuop_func op_3188_40_ff; +extern cpuop_func op_3190_40_nf; +extern cpuop_func op_3190_40_ff; +extern cpuop_func op_3198_40_nf; +extern cpuop_func op_3198_40_ff; +extern cpuop_func op_31a0_40_nf; +extern cpuop_func op_31a0_40_ff; +extern cpuop_func op_31a8_40_nf; +extern cpuop_func op_31a8_40_ff; +extern cpuop_func op_31b0_40_nf; +extern cpuop_func op_31b0_40_ff; +extern cpuop_func op_31b8_40_nf; +extern cpuop_func op_31b8_40_ff; +extern cpuop_func op_31b9_40_nf; +extern cpuop_func op_31b9_40_ff; +extern cpuop_func op_31ba_40_nf; +extern cpuop_func op_31ba_40_ff; +extern cpuop_func op_31bb_40_nf; +extern cpuop_func op_31bb_40_ff; +extern cpuop_func op_31bc_40_nf; +extern cpuop_func op_31bc_40_ff; +extern cpuop_func op_31c0_40_nf; +extern cpuop_func op_31c0_40_ff; +extern cpuop_func op_31c8_40_nf; +extern cpuop_func op_31c8_40_ff; +extern cpuop_func op_31d0_40_nf; +extern cpuop_func op_31d0_40_ff; +extern cpuop_func op_31d8_40_nf; +extern cpuop_func op_31d8_40_ff; +extern cpuop_func op_31e0_40_nf; +extern cpuop_func op_31e0_40_ff; +extern cpuop_func op_31e8_40_nf; +extern cpuop_func op_31e8_40_ff; +extern cpuop_func op_31f0_40_nf; +extern cpuop_func op_31f0_40_ff; +extern cpuop_func op_31f8_40_nf; +extern cpuop_func op_31f8_40_ff; +extern cpuop_func op_31f9_40_nf; +extern cpuop_func op_31f9_40_ff; +extern cpuop_func op_31fa_40_nf; +extern cpuop_func op_31fa_40_ff; +extern cpuop_func op_31fb_40_nf; +extern cpuop_func op_31fb_40_ff; +extern cpuop_func op_31fc_40_nf; +extern cpuop_func op_31fc_40_ff; +extern cpuop_func op_33c0_40_nf; +extern cpuop_func op_33c0_40_ff; +extern cpuop_func op_33c8_40_nf; +extern cpuop_func op_33c8_40_ff; +extern cpuop_func op_33d0_40_nf; +extern cpuop_func op_33d0_40_ff; +extern cpuop_func op_33d8_40_nf; +extern cpuop_func op_33d8_40_ff; +extern cpuop_func op_33e0_40_nf; +extern cpuop_func op_33e0_40_ff; +extern cpuop_func op_33e8_40_nf; +extern cpuop_func op_33e8_40_ff; +extern cpuop_func op_33f0_40_nf; +extern cpuop_func op_33f0_40_ff; +extern cpuop_func op_33f8_40_nf; +extern cpuop_func op_33f8_40_ff; +extern cpuop_func op_33f9_40_nf; +extern cpuop_func op_33f9_40_ff; +extern cpuop_func op_33fa_40_nf; +extern cpuop_func op_33fa_40_ff; +extern cpuop_func op_33fb_40_nf; +extern cpuop_func op_33fb_40_ff; +extern cpuop_func op_33fc_40_nf; +extern cpuop_func op_33fc_40_ff; +extern cpuop_func op_4000_40_nf; +extern cpuop_func op_4000_40_ff; +extern cpuop_func op_4010_40_nf; +extern cpuop_func op_4010_40_ff; +extern cpuop_func op_4018_40_nf; +extern cpuop_func op_4018_40_ff; +extern cpuop_func op_4020_40_nf; +extern cpuop_func op_4020_40_ff; +extern cpuop_func op_4028_40_nf; +extern cpuop_func op_4028_40_ff; +extern cpuop_func op_4030_40_nf; +extern cpuop_func op_4030_40_ff; +extern cpuop_func op_4038_40_nf; +extern cpuop_func op_4038_40_ff; +extern cpuop_func op_4039_40_nf; +extern cpuop_func op_4039_40_ff; +extern cpuop_func op_4040_40_nf; +extern cpuop_func op_4040_40_ff; +extern cpuop_func op_4050_40_nf; +extern cpuop_func op_4050_40_ff; +extern cpuop_func op_4058_40_nf; +extern cpuop_func op_4058_40_ff; +extern cpuop_func op_4060_40_nf; +extern cpuop_func op_4060_40_ff; +extern cpuop_func op_4068_40_nf; +extern cpuop_func op_4068_40_ff; +extern cpuop_func op_4070_40_nf; +extern cpuop_func op_4070_40_ff; +extern cpuop_func op_4078_40_nf; +extern cpuop_func op_4078_40_ff; +extern cpuop_func op_4079_40_nf; +extern cpuop_func op_4079_40_ff; +extern cpuop_func op_4080_40_nf; +extern cpuop_func op_4080_40_ff; +extern cpuop_func op_4090_40_nf; +extern cpuop_func op_4090_40_ff; +extern cpuop_func op_4098_40_nf; +extern cpuop_func op_4098_40_ff; +extern cpuop_func op_40a0_40_nf; +extern cpuop_func op_40a0_40_ff; +extern cpuop_func op_40a8_40_nf; +extern cpuop_func op_40a8_40_ff; +extern cpuop_func op_40b0_40_nf; +extern cpuop_func op_40b0_40_ff; +extern cpuop_func op_40b8_40_nf; +extern cpuop_func op_40b8_40_ff; +extern cpuop_func op_40b9_40_nf; +extern cpuop_func op_40b9_40_ff; +extern cpuop_func op_40c0_40_nf; +extern cpuop_func op_40c0_40_ff; +extern cpuop_func op_40d0_40_nf; +extern cpuop_func op_40d0_40_ff; +extern cpuop_func op_40d8_40_nf; +extern cpuop_func op_40d8_40_ff; +extern cpuop_func op_40e0_40_nf; +extern cpuop_func op_40e0_40_ff; +extern cpuop_func op_40e8_40_nf; +extern cpuop_func op_40e8_40_ff; +extern cpuop_func op_40f0_40_nf; +extern cpuop_func op_40f0_40_ff; +extern cpuop_func op_40f8_40_nf; +extern cpuop_func op_40f8_40_ff; +extern cpuop_func op_40f9_40_nf; +extern cpuop_func op_40f9_40_ff; +extern cpuop_func op_4100_40_nf; +extern cpuop_func op_4100_40_ff; +extern cpuop_func op_4110_40_nf; +extern cpuop_func op_4110_40_ff; +extern cpuop_func op_4118_40_nf; +extern cpuop_func op_4118_40_ff; +extern cpuop_func op_4120_40_nf; +extern cpuop_func op_4120_40_ff; +extern cpuop_func op_4128_40_nf; +extern cpuop_func op_4128_40_ff; +extern cpuop_func op_4130_40_nf; +extern cpuop_func op_4130_40_ff; +extern cpuop_func op_4138_40_nf; +extern cpuop_func op_4138_40_ff; +extern cpuop_func op_4139_40_nf; +extern cpuop_func op_4139_40_ff; +extern cpuop_func op_413a_40_nf; +extern cpuop_func op_413a_40_ff; +extern cpuop_func op_413b_40_nf; +extern cpuop_func op_413b_40_ff; +extern cpuop_func op_413c_40_nf; +extern cpuop_func op_413c_40_ff; +extern cpuop_func op_4180_40_nf; +extern cpuop_func op_4180_40_ff; +extern cpuop_func op_4190_40_nf; +extern cpuop_func op_4190_40_ff; +extern cpuop_func op_4198_40_nf; +extern cpuop_func op_4198_40_ff; +extern cpuop_func op_41a0_40_nf; +extern cpuop_func op_41a0_40_ff; +extern cpuop_func op_41a8_40_nf; +extern cpuop_func op_41a8_40_ff; +extern cpuop_func op_41b0_40_nf; +extern cpuop_func op_41b0_40_ff; +extern cpuop_func op_41b8_40_nf; +extern cpuop_func op_41b8_40_ff; +extern cpuop_func op_41b9_40_nf; +extern cpuop_func op_41b9_40_ff; +extern cpuop_func op_41ba_40_nf; +extern cpuop_func op_41ba_40_ff; +extern cpuop_func op_41bb_40_nf; +extern cpuop_func op_41bb_40_ff; +extern cpuop_func op_41bc_40_nf; +extern cpuop_func op_41bc_40_ff; +extern cpuop_func op_41d0_40_nf; +extern cpuop_func op_41d0_40_ff; +extern cpuop_func op_41e8_40_nf; +extern cpuop_func op_41e8_40_ff; +extern cpuop_func op_41f0_40_nf; +extern cpuop_func op_41f0_40_ff; +extern cpuop_func op_41f8_40_nf; +extern cpuop_func op_41f8_40_ff; +extern cpuop_func op_41f9_40_nf; +extern cpuop_func op_41f9_40_ff; +extern cpuop_func op_41fa_40_nf; +extern cpuop_func op_41fa_40_ff; +extern cpuop_func op_41fb_40_nf; +extern cpuop_func op_41fb_40_ff; +extern cpuop_func op_4200_40_nf; +extern cpuop_func op_4200_40_ff; +extern cpuop_func op_4210_40_nf; +extern cpuop_func op_4210_40_ff; +extern cpuop_func op_4218_40_nf; +extern cpuop_func op_4218_40_ff; +extern cpuop_func op_4220_40_nf; +extern cpuop_func op_4220_40_ff; +extern cpuop_func op_4228_40_nf; +extern cpuop_func op_4228_40_ff; +extern cpuop_func op_4230_40_nf; +extern cpuop_func op_4230_40_ff; +extern cpuop_func op_4238_40_nf; +extern cpuop_func op_4238_40_ff; +extern cpuop_func op_4239_40_nf; +extern cpuop_func op_4239_40_ff; +extern cpuop_func op_4240_40_nf; +extern cpuop_func op_4240_40_ff; +extern cpuop_func op_4250_40_nf; +extern cpuop_func op_4250_40_ff; +extern cpuop_func op_4258_40_nf; +extern cpuop_func op_4258_40_ff; +extern cpuop_func op_4260_40_nf; +extern cpuop_func op_4260_40_ff; +extern cpuop_func op_4268_40_nf; +extern cpuop_func op_4268_40_ff; +extern cpuop_func op_4270_40_nf; +extern cpuop_func op_4270_40_ff; +extern cpuop_func op_4278_40_nf; +extern cpuop_func op_4278_40_ff; +extern cpuop_func op_4279_40_nf; +extern cpuop_func op_4279_40_ff; +extern cpuop_func op_4280_40_nf; +extern cpuop_func op_4280_40_ff; +extern cpuop_func op_4290_40_nf; +extern cpuop_func op_4290_40_ff; +extern cpuop_func op_4298_40_nf; +extern cpuop_func op_4298_40_ff; +extern cpuop_func op_42a0_40_nf; +extern cpuop_func op_42a0_40_ff; +extern cpuop_func op_42a8_40_nf; +extern cpuop_func op_42a8_40_ff; +extern cpuop_func op_42b0_40_nf; +extern cpuop_func op_42b0_40_ff; +extern cpuop_func op_42b8_40_nf; +extern cpuop_func op_42b8_40_ff; +extern cpuop_func op_42b9_40_nf; +extern cpuop_func op_42b9_40_ff; +extern cpuop_func op_42c0_40_nf; +extern cpuop_func op_42c0_40_ff; +extern cpuop_func op_42d0_40_nf; +extern cpuop_func op_42d0_40_ff; +extern cpuop_func op_42d8_40_nf; +extern cpuop_func op_42d8_40_ff; +extern cpuop_func op_42e0_40_nf; +extern cpuop_func op_42e0_40_ff; +extern cpuop_func op_42e8_40_nf; +extern cpuop_func op_42e8_40_ff; +extern cpuop_func op_42f0_40_nf; +extern cpuop_func op_42f0_40_ff; +extern cpuop_func op_42f8_40_nf; +extern cpuop_func op_42f8_40_ff; +extern cpuop_func op_42f9_40_nf; +extern cpuop_func op_42f9_40_ff; +extern cpuop_func op_4400_40_nf; +extern cpuop_func op_4400_40_ff; +extern cpuop_func op_4410_40_nf; +extern cpuop_func op_4410_40_ff; +extern cpuop_func op_4418_40_nf; +extern cpuop_func op_4418_40_ff; +extern cpuop_func op_4420_40_nf; +extern cpuop_func op_4420_40_ff; +extern cpuop_func op_4428_40_nf; +extern cpuop_func op_4428_40_ff; +extern cpuop_func op_4430_40_nf; +extern cpuop_func op_4430_40_ff; +extern cpuop_func op_4438_40_nf; +extern cpuop_func op_4438_40_ff; +extern cpuop_func op_4439_40_nf; +extern cpuop_func op_4439_40_ff; +extern cpuop_func op_4440_40_nf; +extern cpuop_func op_4440_40_ff; +extern cpuop_func op_4450_40_nf; +extern cpuop_func op_4450_40_ff; +extern cpuop_func op_4458_40_nf; +extern cpuop_func op_4458_40_ff; +extern cpuop_func op_4460_40_nf; +extern cpuop_func op_4460_40_ff; +extern cpuop_func op_4468_40_nf; +extern cpuop_func op_4468_40_ff; +extern cpuop_func op_4470_40_nf; +extern cpuop_func op_4470_40_ff; +extern cpuop_func op_4478_40_nf; +extern cpuop_func op_4478_40_ff; +extern cpuop_func op_4479_40_nf; +extern cpuop_func op_4479_40_ff; +extern cpuop_func op_4480_40_nf; +extern cpuop_func op_4480_40_ff; +extern cpuop_func op_4490_40_nf; +extern cpuop_func op_4490_40_ff; +extern cpuop_func op_4498_40_nf; +extern cpuop_func op_4498_40_ff; +extern cpuop_func op_44a0_40_nf; +extern cpuop_func op_44a0_40_ff; +extern cpuop_func op_44a8_40_nf; +extern cpuop_func op_44a8_40_ff; +extern cpuop_func op_44b0_40_nf; +extern cpuop_func op_44b0_40_ff; +extern cpuop_func op_44b8_40_nf; +extern cpuop_func op_44b8_40_ff; +extern cpuop_func op_44b9_40_nf; +extern cpuop_func op_44b9_40_ff; +extern cpuop_func op_44c0_40_nf; +extern cpuop_func op_44c0_40_ff; +extern cpuop_func op_44d0_40_nf; +extern cpuop_func op_44d0_40_ff; +extern cpuop_func op_44d8_40_nf; +extern cpuop_func op_44d8_40_ff; +extern cpuop_func op_44e0_40_nf; +extern cpuop_func op_44e0_40_ff; +extern cpuop_func op_44e8_40_nf; +extern cpuop_func op_44e8_40_ff; +extern cpuop_func op_44f0_40_nf; +extern cpuop_func op_44f0_40_ff; +extern cpuop_func op_44f8_40_nf; +extern cpuop_func op_44f8_40_ff; +extern cpuop_func op_44f9_40_nf; +extern cpuop_func op_44f9_40_ff; +extern cpuop_func op_44fa_40_nf; +extern cpuop_func op_44fa_40_ff; +extern cpuop_func op_44fb_40_nf; +extern cpuop_func op_44fb_40_ff; +extern cpuop_func op_44fc_40_nf; +extern cpuop_func op_44fc_40_ff; +extern cpuop_func op_4600_40_nf; +extern cpuop_func op_4600_40_ff; +extern cpuop_func op_4610_40_nf; +extern cpuop_func op_4610_40_ff; +extern cpuop_func op_4618_40_nf; +extern cpuop_func op_4618_40_ff; +extern cpuop_func op_4620_40_nf; +extern cpuop_func op_4620_40_ff; +extern cpuop_func op_4628_40_nf; +extern cpuop_func op_4628_40_ff; +extern cpuop_func op_4630_40_nf; +extern cpuop_func op_4630_40_ff; +extern cpuop_func op_4638_40_nf; +extern cpuop_func op_4638_40_ff; +extern cpuop_func op_4639_40_nf; +extern cpuop_func op_4639_40_ff; +extern cpuop_func op_4640_40_nf; +extern cpuop_func op_4640_40_ff; +extern cpuop_func op_4650_40_nf; +extern cpuop_func op_4650_40_ff; +extern cpuop_func op_4658_40_nf; +extern cpuop_func op_4658_40_ff; +extern cpuop_func op_4660_40_nf; +extern cpuop_func op_4660_40_ff; +extern cpuop_func op_4668_40_nf; +extern cpuop_func op_4668_40_ff; +extern cpuop_func op_4670_40_nf; +extern cpuop_func op_4670_40_ff; +extern cpuop_func op_4678_40_nf; +extern cpuop_func op_4678_40_ff; +extern cpuop_func op_4679_40_nf; +extern cpuop_func op_4679_40_ff; +extern cpuop_func op_4680_40_nf; +extern cpuop_func op_4680_40_ff; +extern cpuop_func op_4690_40_nf; +extern cpuop_func op_4690_40_ff; +extern cpuop_func op_4698_40_nf; +extern cpuop_func op_4698_40_ff; +extern cpuop_func op_46a0_40_nf; +extern cpuop_func op_46a0_40_ff; +extern cpuop_func op_46a8_40_nf; +extern cpuop_func op_46a8_40_ff; +extern cpuop_func op_46b0_40_nf; +extern cpuop_func op_46b0_40_ff; +extern cpuop_func op_46b8_40_nf; +extern cpuop_func op_46b8_40_ff; +extern cpuop_func op_46b9_40_nf; +extern cpuop_func op_46b9_40_ff; +extern cpuop_func op_46c0_40_nf; +extern cpuop_func op_46c0_40_ff; +extern cpuop_func op_46d0_40_nf; +extern cpuop_func op_46d0_40_ff; +extern cpuop_func op_46d8_40_nf; +extern cpuop_func op_46d8_40_ff; +extern cpuop_func op_46e0_40_nf; +extern cpuop_func op_46e0_40_ff; +extern cpuop_func op_46e8_40_nf; +extern cpuop_func op_46e8_40_ff; +extern cpuop_func op_46f0_40_nf; +extern cpuop_func op_46f0_40_ff; +extern cpuop_func op_46f8_40_nf; +extern cpuop_func op_46f8_40_ff; +extern cpuop_func op_46f9_40_nf; +extern cpuop_func op_46f9_40_ff; +extern cpuop_func op_46fa_40_nf; +extern cpuop_func op_46fa_40_ff; +extern cpuop_func op_46fb_40_nf; +extern cpuop_func op_46fb_40_ff; +extern cpuop_func op_46fc_40_nf; +extern cpuop_func op_46fc_40_ff; +extern cpuop_func op_4800_40_nf; +extern cpuop_func op_4800_40_ff; +extern cpuop_func op_4808_40_nf; +extern cpuop_func op_4808_40_ff; +extern cpuop_func op_4810_40_nf; +extern cpuop_func op_4810_40_ff; +extern cpuop_func op_4818_40_nf; +extern cpuop_func op_4818_40_ff; +extern cpuop_func op_4820_40_nf; +extern cpuop_func op_4820_40_ff; +extern cpuop_func op_4828_40_nf; +extern cpuop_func op_4828_40_ff; +extern cpuop_func op_4830_40_nf; +extern cpuop_func op_4830_40_ff; +extern cpuop_func op_4838_40_nf; +extern cpuop_func op_4838_40_ff; +extern cpuop_func op_4839_40_nf; +extern cpuop_func op_4839_40_ff; +extern cpuop_func op_4840_40_nf; +extern cpuop_func op_4840_40_ff; +extern cpuop_func op_4848_40_nf; +extern cpuop_func op_4848_40_ff; +extern cpuop_func op_4850_40_nf; +extern cpuop_func op_4850_40_ff; +extern cpuop_func op_4868_40_nf; +extern cpuop_func op_4868_40_ff; +extern cpuop_func op_4870_40_nf; +extern cpuop_func op_4870_40_ff; +extern cpuop_func op_4878_40_nf; +extern cpuop_func op_4878_40_ff; +extern cpuop_func op_4879_40_nf; +extern cpuop_func op_4879_40_ff; +extern cpuop_func op_487a_40_nf; +extern cpuop_func op_487a_40_ff; +extern cpuop_func op_487b_40_nf; +extern cpuop_func op_487b_40_ff; +extern cpuop_func op_4880_40_nf; +extern cpuop_func op_4880_40_ff; +extern cpuop_func op_4890_40_nf; +extern cpuop_func op_4890_40_ff; +extern cpuop_func op_48a0_40_nf; +extern cpuop_func op_48a0_40_ff; +extern cpuop_func op_48a8_40_nf; +extern cpuop_func op_48a8_40_ff; +extern cpuop_func op_48b0_40_nf; +extern cpuop_func op_48b0_40_ff; +extern cpuop_func op_48b8_40_nf; +extern cpuop_func op_48b8_40_ff; +extern cpuop_func op_48b9_40_nf; +extern cpuop_func op_48b9_40_ff; +extern cpuop_func op_48c0_40_nf; +extern cpuop_func op_48c0_40_ff; +extern cpuop_func op_48d0_40_nf; +extern cpuop_func op_48d0_40_ff; +extern cpuop_func op_48e0_40_nf; +extern cpuop_func op_48e0_40_ff; +extern cpuop_func op_48e8_40_nf; +extern cpuop_func op_48e8_40_ff; +extern cpuop_func op_48f0_40_nf; +extern cpuop_func op_48f0_40_ff; +extern cpuop_func op_48f8_40_nf; +extern cpuop_func op_48f8_40_ff; +extern cpuop_func op_48f9_40_nf; +extern cpuop_func op_48f9_40_ff; +extern cpuop_func op_49c0_40_nf; +extern cpuop_func op_49c0_40_ff; +extern cpuop_func op_4a00_40_nf; +extern cpuop_func op_4a00_40_ff; +extern cpuop_func op_4a10_40_nf; +extern cpuop_func op_4a10_40_ff; +extern cpuop_func op_4a18_40_nf; +extern cpuop_func op_4a18_40_ff; +extern cpuop_func op_4a20_40_nf; +extern cpuop_func op_4a20_40_ff; +extern cpuop_func op_4a28_40_nf; +extern cpuop_func op_4a28_40_ff; +extern cpuop_func op_4a30_40_nf; +extern cpuop_func op_4a30_40_ff; +extern cpuop_func op_4a38_40_nf; +extern cpuop_func op_4a38_40_ff; +extern cpuop_func op_4a39_40_nf; +extern cpuop_func op_4a39_40_ff; +extern cpuop_func op_4a3a_40_nf; +extern cpuop_func op_4a3a_40_ff; +extern cpuop_func op_4a3b_40_nf; +extern cpuop_func op_4a3b_40_ff; +extern cpuop_func op_4a3c_40_nf; +extern cpuop_func op_4a3c_40_ff; +extern cpuop_func op_4a40_40_nf; +extern cpuop_func op_4a40_40_ff; +extern cpuop_func op_4a48_40_nf; +extern cpuop_func op_4a48_40_ff; +extern cpuop_func op_4a50_40_nf; +extern cpuop_func op_4a50_40_ff; +extern cpuop_func op_4a58_40_nf; +extern cpuop_func op_4a58_40_ff; +extern cpuop_func op_4a60_40_nf; +extern cpuop_func op_4a60_40_ff; +extern cpuop_func op_4a68_40_nf; +extern cpuop_func op_4a68_40_ff; +extern cpuop_func op_4a70_40_nf; +extern cpuop_func op_4a70_40_ff; +extern cpuop_func op_4a78_40_nf; +extern cpuop_func op_4a78_40_ff; +extern cpuop_func op_4a79_40_nf; +extern cpuop_func op_4a79_40_ff; +extern cpuop_func op_4a7a_40_nf; +extern cpuop_func op_4a7a_40_ff; +extern cpuop_func op_4a7b_40_nf; +extern cpuop_func op_4a7b_40_ff; +extern cpuop_func op_4a7c_40_nf; +extern cpuop_func op_4a7c_40_ff; +extern cpuop_func op_4a80_40_nf; +extern cpuop_func op_4a80_40_ff; +extern cpuop_func op_4a88_40_nf; +extern cpuop_func op_4a88_40_ff; +extern cpuop_func op_4a90_40_nf; +extern cpuop_func op_4a90_40_ff; +extern cpuop_func op_4a98_40_nf; +extern cpuop_func op_4a98_40_ff; +extern cpuop_func op_4aa0_40_nf; +extern cpuop_func op_4aa0_40_ff; +extern cpuop_func op_4aa8_40_nf; +extern cpuop_func op_4aa8_40_ff; +extern cpuop_func op_4ab0_40_nf; +extern cpuop_func op_4ab0_40_ff; +extern cpuop_func op_4ab8_40_nf; +extern cpuop_func op_4ab8_40_ff; +extern cpuop_func op_4ab9_40_nf; +extern cpuop_func op_4ab9_40_ff; +extern cpuop_func op_4aba_40_nf; +extern cpuop_func op_4aba_40_ff; +extern cpuop_func op_4abb_40_nf; +extern cpuop_func op_4abb_40_ff; +extern cpuop_func op_4abc_40_nf; +extern cpuop_func op_4abc_40_ff; +extern cpuop_func op_4ac0_40_nf; +extern cpuop_func op_4ac0_40_ff; +extern cpuop_func op_4ac8_40_nf; +extern cpuop_func op_4ac8_40_ff; +extern cpuop_func op_4acc_40_nf; +extern cpuop_func op_4acc_40_ff; +extern cpuop_func op_4ad0_40_nf; +extern cpuop_func op_4ad0_40_ff; +extern cpuop_func op_4ad8_40_nf; +extern cpuop_func op_4ad8_40_ff; +extern cpuop_func op_4ae0_40_nf; +extern cpuop_func op_4ae0_40_ff; +extern cpuop_func op_4ae8_40_nf; +extern cpuop_func op_4ae8_40_ff; +extern cpuop_func op_4af0_40_nf; +extern cpuop_func op_4af0_40_ff; +extern cpuop_func op_4af8_40_nf; +extern cpuop_func op_4af8_40_ff; +extern cpuop_func op_4af9_40_nf; +extern cpuop_func op_4af9_40_ff; +extern cpuop_func op_4c00_40_nf; +extern cpuop_func op_4c00_40_ff; +extern cpuop_func op_4c10_40_nf; +extern cpuop_func op_4c10_40_ff; +extern cpuop_func op_4c18_40_nf; +extern cpuop_func op_4c18_40_ff; +extern cpuop_func op_4c20_40_nf; +extern cpuop_func op_4c20_40_ff; +extern cpuop_func op_4c28_40_nf; +extern cpuop_func op_4c28_40_ff; +extern cpuop_func op_4c30_40_nf; +extern cpuop_func op_4c30_40_ff; +extern cpuop_func op_4c38_40_nf; +extern cpuop_func op_4c38_40_ff; +extern cpuop_func op_4c39_40_nf; +extern cpuop_func op_4c39_40_ff; +extern cpuop_func op_4c3a_40_nf; +extern cpuop_func op_4c3a_40_ff; +extern cpuop_func op_4c3b_40_nf; +extern cpuop_func op_4c3b_40_ff; +extern cpuop_func op_4c3c_40_nf; +extern cpuop_func op_4c3c_40_ff; +extern cpuop_func op_4c40_40_nf; +extern cpuop_func op_4c40_40_ff; +extern cpuop_func op_4c50_40_nf; +extern cpuop_func op_4c50_40_ff; +extern cpuop_func op_4c58_40_nf; +extern cpuop_func op_4c58_40_ff; +extern cpuop_func op_4c60_40_nf; +extern cpuop_func op_4c60_40_ff; +extern cpuop_func op_4c68_40_nf; +extern cpuop_func op_4c68_40_ff; +extern cpuop_func op_4c70_40_nf; +extern cpuop_func op_4c70_40_ff; +extern cpuop_func op_4c78_40_nf; +extern cpuop_func op_4c78_40_ff; +extern cpuop_func op_4c79_40_nf; +extern cpuop_func op_4c79_40_ff; +extern cpuop_func op_4c7a_40_nf; +extern cpuop_func op_4c7a_40_ff; +extern cpuop_func op_4c7b_40_nf; +extern cpuop_func op_4c7b_40_ff; +extern cpuop_func op_4c7c_40_nf; +extern cpuop_func op_4c7c_40_ff; +extern cpuop_func op_4c90_40_nf; +extern cpuop_func op_4c90_40_ff; +extern cpuop_func op_4c98_40_nf; +extern cpuop_func op_4c98_40_ff; +extern cpuop_func op_4ca8_40_nf; +extern cpuop_func op_4ca8_40_ff; +extern cpuop_func op_4cb0_40_nf; +extern cpuop_func op_4cb0_40_ff; +extern cpuop_func op_4cb8_40_nf; +extern cpuop_func op_4cb8_40_ff; +extern cpuop_func op_4cb9_40_nf; +extern cpuop_func op_4cb9_40_ff; +extern cpuop_func op_4cba_40_nf; +extern cpuop_func op_4cba_40_ff; +extern cpuop_func op_4cbb_40_nf; +extern cpuop_func op_4cbb_40_ff; +extern cpuop_func op_4cd0_40_nf; +extern cpuop_func op_4cd0_40_ff; +extern cpuop_func op_4cd8_40_nf; +extern cpuop_func op_4cd8_40_ff; +extern cpuop_func op_4ce8_40_nf; +extern cpuop_func op_4ce8_40_ff; +extern cpuop_func op_4cf0_40_nf; +extern cpuop_func op_4cf0_40_ff; +extern cpuop_func op_4cf8_40_nf; +extern cpuop_func op_4cf8_40_ff; +extern cpuop_func op_4cf9_40_nf; +extern cpuop_func op_4cf9_40_ff; +extern cpuop_func op_4cfa_40_nf; +extern cpuop_func op_4cfa_40_ff; +extern cpuop_func op_4cfb_40_nf; +extern cpuop_func op_4cfb_40_ff; +extern cpuop_func op_4e40_40_nf; +extern cpuop_func op_4e40_40_ff; +extern cpuop_func op_4e50_40_nf; +extern cpuop_func op_4e50_40_ff; +extern cpuop_func op_4e58_40_nf; +extern cpuop_func op_4e58_40_ff; +extern cpuop_func op_4e60_40_nf; +extern cpuop_func op_4e60_40_ff; +extern cpuop_func op_4e68_40_nf; +extern cpuop_func op_4e68_40_ff; +extern cpuop_func op_4e70_40_nf; +extern cpuop_func op_4e70_40_ff; +extern cpuop_func op_4e71_40_nf; +extern cpuop_func op_4e71_40_ff; +extern cpuop_func op_4e72_40_nf; +extern cpuop_func op_4e72_40_ff; +extern cpuop_func op_4e73_40_nf; +extern cpuop_func op_4e73_40_ff; +extern cpuop_func op_4e74_40_nf; +extern cpuop_func op_4e74_40_ff; +extern cpuop_func op_4e75_40_nf; +extern cpuop_func op_4e75_40_ff; +extern cpuop_func op_4e76_40_nf; +extern cpuop_func op_4e76_40_ff; +extern cpuop_func op_4e77_40_nf; +extern cpuop_func op_4e77_40_ff; +extern cpuop_func op_4e7a_40_nf; +extern cpuop_func op_4e7a_40_ff; +extern cpuop_func op_4e7b_40_nf; +extern cpuop_func op_4e7b_40_ff; +extern cpuop_func op_4e90_40_nf; +extern cpuop_func op_4e90_40_ff; +extern cpuop_func op_4ea8_40_nf; +extern cpuop_func op_4ea8_40_ff; +extern cpuop_func op_4eb0_40_nf; +extern cpuop_func op_4eb0_40_ff; +extern cpuop_func op_4eb8_40_nf; +extern cpuop_func op_4eb8_40_ff; +extern cpuop_func op_4eb9_40_nf; +extern cpuop_func op_4eb9_40_ff; +extern cpuop_func op_4eba_40_nf; +extern cpuop_func op_4eba_40_ff; +extern cpuop_func op_4ebb_40_nf; +extern cpuop_func op_4ebb_40_ff; +extern cpuop_func op_4ed0_40_nf; +extern cpuop_func op_4ed0_40_ff; +extern cpuop_func op_4ee8_40_nf; +extern cpuop_func op_4ee8_40_ff; +extern cpuop_func op_4ef0_40_nf; +extern cpuop_func op_4ef0_40_ff; +extern cpuop_func op_4ef8_40_nf; +extern cpuop_func op_4ef8_40_ff; +extern cpuop_func op_4ef9_40_nf; +extern cpuop_func op_4ef9_40_ff; +extern cpuop_func op_4efa_40_nf; +extern cpuop_func op_4efa_40_ff; +extern cpuop_func op_4efb_40_nf; +extern cpuop_func op_4efb_40_ff; +extern cpuop_func op_5000_40_nf; +extern cpuop_func op_5000_40_ff; +extern cpuop_func op_5010_40_nf; +extern cpuop_func op_5010_40_ff; +extern cpuop_func op_5018_40_nf; +extern cpuop_func op_5018_40_ff; +extern cpuop_func op_5020_40_nf; +extern cpuop_func op_5020_40_ff; +extern cpuop_func op_5028_40_nf; +extern cpuop_func op_5028_40_ff; +extern cpuop_func op_5030_40_nf; +extern cpuop_func op_5030_40_ff; +extern cpuop_func op_5038_40_nf; +extern cpuop_func op_5038_40_ff; +extern cpuop_func op_5039_40_nf; +extern cpuop_func op_5039_40_ff; +extern cpuop_func op_5040_40_nf; +extern cpuop_func op_5040_40_ff; +extern cpuop_func op_5048_40_nf; +extern cpuop_func op_5048_40_ff; +extern cpuop_func op_5050_40_nf; +extern cpuop_func op_5050_40_ff; +extern cpuop_func op_5058_40_nf; +extern cpuop_func op_5058_40_ff; +extern cpuop_func op_5060_40_nf; +extern cpuop_func op_5060_40_ff; +extern cpuop_func op_5068_40_nf; +extern cpuop_func op_5068_40_ff; +extern cpuop_func op_5070_40_nf; +extern cpuop_func op_5070_40_ff; +extern cpuop_func op_5078_40_nf; +extern cpuop_func op_5078_40_ff; +extern cpuop_func op_5079_40_nf; +extern cpuop_func op_5079_40_ff; +extern cpuop_func op_5080_40_nf; +extern cpuop_func op_5080_40_ff; +extern cpuop_func op_5088_40_nf; +extern cpuop_func op_5088_40_ff; +extern cpuop_func op_5090_40_nf; +extern cpuop_func op_5090_40_ff; +extern cpuop_func op_5098_40_nf; +extern cpuop_func op_5098_40_ff; +extern cpuop_func op_50a0_40_nf; +extern cpuop_func op_50a0_40_ff; +extern cpuop_func op_50a8_40_nf; +extern cpuop_func op_50a8_40_ff; +extern cpuop_func op_50b0_40_nf; +extern cpuop_func op_50b0_40_ff; +extern cpuop_func op_50b8_40_nf; +extern cpuop_func op_50b8_40_ff; +extern cpuop_func op_50b9_40_nf; +extern cpuop_func op_50b9_40_ff; +extern cpuop_func op_50c0_40_nf; +extern cpuop_func op_50c0_40_ff; +extern cpuop_func op_50c8_40_nf; +extern cpuop_func op_50c8_40_ff; +extern cpuop_func op_50d0_40_nf; +extern cpuop_func op_50d0_40_ff; +extern cpuop_func op_50d8_40_nf; +extern cpuop_func op_50d8_40_ff; +extern cpuop_func op_50e0_40_nf; +extern cpuop_func op_50e0_40_ff; +extern cpuop_func op_50e8_40_nf; +extern cpuop_func op_50e8_40_ff; +extern cpuop_func op_50f0_40_nf; +extern cpuop_func op_50f0_40_ff; +extern cpuop_func op_50f8_40_nf; +extern cpuop_func op_50f8_40_ff; +extern cpuop_func op_50f9_40_nf; +extern cpuop_func op_50f9_40_ff; +extern cpuop_func op_50fa_40_nf; +extern cpuop_func op_50fa_40_ff; +extern cpuop_func op_50fb_40_nf; +extern cpuop_func op_50fb_40_ff; +extern cpuop_func op_50fc_40_nf; +extern cpuop_func op_50fc_40_ff; +extern cpuop_func op_5100_40_nf; +extern cpuop_func op_5100_40_ff; +extern cpuop_func op_5110_40_nf; +extern cpuop_func op_5110_40_ff; +extern cpuop_func op_5118_40_nf; +extern cpuop_func op_5118_40_ff; +extern cpuop_func op_5120_40_nf; +extern cpuop_func op_5120_40_ff; +extern cpuop_func op_5128_40_nf; +extern cpuop_func op_5128_40_ff; +extern cpuop_func op_5130_40_nf; +extern cpuop_func op_5130_40_ff; +extern cpuop_func op_5138_40_nf; +extern cpuop_func op_5138_40_ff; +extern cpuop_func op_5139_40_nf; +extern cpuop_func op_5139_40_ff; +extern cpuop_func op_5140_40_nf; +extern cpuop_func op_5140_40_ff; +extern cpuop_func op_5148_40_nf; +extern cpuop_func op_5148_40_ff; +extern cpuop_func op_5150_40_nf; +extern cpuop_func op_5150_40_ff; +extern cpuop_func op_5158_40_nf; +extern cpuop_func op_5158_40_ff; +extern cpuop_func op_5160_40_nf; +extern cpuop_func op_5160_40_ff; +extern cpuop_func op_5168_40_nf; +extern cpuop_func op_5168_40_ff; +extern cpuop_func op_5170_40_nf; +extern cpuop_func op_5170_40_ff; +extern cpuop_func op_5178_40_nf; +extern cpuop_func op_5178_40_ff; +extern cpuop_func op_5179_40_nf; +extern cpuop_func op_5179_40_ff; +extern cpuop_func op_5180_40_nf; +extern cpuop_func op_5180_40_ff; +extern cpuop_func op_5188_40_nf; +extern cpuop_func op_5188_40_ff; +extern cpuop_func op_5190_40_nf; +extern cpuop_func op_5190_40_ff; +extern cpuop_func op_5198_40_nf; +extern cpuop_func op_5198_40_ff; +extern cpuop_func op_51a0_40_nf; +extern cpuop_func op_51a0_40_ff; +extern cpuop_func op_51a8_40_nf; +extern cpuop_func op_51a8_40_ff; +extern cpuop_func op_51b0_40_nf; +extern cpuop_func op_51b0_40_ff; +extern cpuop_func op_51b8_40_nf; +extern cpuop_func op_51b8_40_ff; +extern cpuop_func op_51b9_40_nf; +extern cpuop_func op_51b9_40_ff; +extern cpuop_func op_51c0_40_nf; +extern cpuop_func op_51c0_40_ff; +extern cpuop_func op_51c8_40_nf; +extern cpuop_func op_51c8_40_ff; +extern cpuop_func op_51d0_40_nf; +extern cpuop_func op_51d0_40_ff; +extern cpuop_func op_51d8_40_nf; +extern cpuop_func op_51d8_40_ff; +extern cpuop_func op_51e0_40_nf; +extern cpuop_func op_51e0_40_ff; +extern cpuop_func op_51e8_40_nf; +extern cpuop_func op_51e8_40_ff; +extern cpuop_func op_51f0_40_nf; +extern cpuop_func op_51f0_40_ff; +extern cpuop_func op_51f8_40_nf; +extern cpuop_func op_51f8_40_ff; +extern cpuop_func op_51f9_40_nf; +extern cpuop_func op_51f9_40_ff; +extern cpuop_func op_51fa_40_nf; +extern cpuop_func op_51fa_40_ff; +extern cpuop_func op_51fb_40_nf; +extern cpuop_func op_51fb_40_ff; +extern cpuop_func op_51fc_40_nf; +extern cpuop_func op_51fc_40_ff; +extern cpuop_func op_52c0_40_nf; +extern cpuop_func op_52c0_40_ff; +extern cpuop_func op_52c8_40_nf; +extern cpuop_func op_52c8_40_ff; +extern cpuop_func op_52d0_40_nf; +extern cpuop_func op_52d0_40_ff; +extern cpuop_func op_52d8_40_nf; +extern cpuop_func op_52d8_40_ff; +extern cpuop_func op_52e0_40_nf; +extern cpuop_func op_52e0_40_ff; +extern cpuop_func op_52e8_40_nf; +extern cpuop_func op_52e8_40_ff; +extern cpuop_func op_52f0_40_nf; +extern cpuop_func op_52f0_40_ff; +extern cpuop_func op_52f8_40_nf; +extern cpuop_func op_52f8_40_ff; +extern cpuop_func op_52f9_40_nf; +extern cpuop_func op_52f9_40_ff; +extern cpuop_func op_52fa_40_nf; +extern cpuop_func op_52fa_40_ff; +extern cpuop_func op_52fb_40_nf; +extern cpuop_func op_52fb_40_ff; +extern cpuop_func op_52fc_40_nf; +extern cpuop_func op_52fc_40_ff; +extern cpuop_func op_53c0_40_nf; +extern cpuop_func op_53c0_40_ff; +extern cpuop_func op_53c8_40_nf; +extern cpuop_func op_53c8_40_ff; +extern cpuop_func op_53d0_40_nf; +extern cpuop_func op_53d0_40_ff; +extern cpuop_func op_53d8_40_nf; +extern cpuop_func op_53d8_40_ff; +extern cpuop_func op_53e0_40_nf; +extern cpuop_func op_53e0_40_ff; +extern cpuop_func op_53e8_40_nf; +extern cpuop_func op_53e8_40_ff; +extern cpuop_func op_53f0_40_nf; +extern cpuop_func op_53f0_40_ff; +extern cpuop_func op_53f8_40_nf; +extern cpuop_func op_53f8_40_ff; +extern cpuop_func op_53f9_40_nf; +extern cpuop_func op_53f9_40_ff; +extern cpuop_func op_53fa_40_nf; +extern cpuop_func op_53fa_40_ff; +extern cpuop_func op_53fb_40_nf; +extern cpuop_func op_53fb_40_ff; +extern cpuop_func op_53fc_40_nf; +extern cpuop_func op_53fc_40_ff; +extern cpuop_func op_54c0_40_nf; +extern cpuop_func op_54c0_40_ff; +extern cpuop_func op_54c8_40_nf; +extern cpuop_func op_54c8_40_ff; +extern cpuop_func op_54d0_40_nf; +extern cpuop_func op_54d0_40_ff; +extern cpuop_func op_54d8_40_nf; +extern cpuop_func op_54d8_40_ff; +extern cpuop_func op_54e0_40_nf; +extern cpuop_func op_54e0_40_ff; +extern cpuop_func op_54e8_40_nf; +extern cpuop_func op_54e8_40_ff; +extern cpuop_func op_54f0_40_nf; +extern cpuop_func op_54f0_40_ff; +extern cpuop_func op_54f8_40_nf; +extern cpuop_func op_54f8_40_ff; +extern cpuop_func op_54f9_40_nf; +extern cpuop_func op_54f9_40_ff; +extern cpuop_func op_54fa_40_nf; +extern cpuop_func op_54fa_40_ff; +extern cpuop_func op_54fb_40_nf; +extern cpuop_func op_54fb_40_ff; +extern cpuop_func op_54fc_40_nf; +extern cpuop_func op_54fc_40_ff; +extern cpuop_func op_55c0_40_nf; +extern cpuop_func op_55c0_40_ff; +extern cpuop_func op_55c8_40_nf; +extern cpuop_func op_55c8_40_ff; +extern cpuop_func op_55d0_40_nf; +extern cpuop_func op_55d0_40_ff; +extern cpuop_func op_55d8_40_nf; +extern cpuop_func op_55d8_40_ff; +extern cpuop_func op_55e0_40_nf; +extern cpuop_func op_55e0_40_ff; +extern cpuop_func op_55e8_40_nf; +extern cpuop_func op_55e8_40_ff; +extern cpuop_func op_55f0_40_nf; +extern cpuop_func op_55f0_40_ff; +extern cpuop_func op_55f8_40_nf; +extern cpuop_func op_55f8_40_ff; +extern cpuop_func op_55f9_40_nf; +extern cpuop_func op_55f9_40_ff; +extern cpuop_func op_55fa_40_nf; +extern cpuop_func op_55fa_40_ff; +extern cpuop_func op_55fb_40_nf; +extern cpuop_func op_55fb_40_ff; +extern cpuop_func op_55fc_40_nf; +extern cpuop_func op_55fc_40_ff; +extern cpuop_func op_56c0_40_nf; +extern cpuop_func op_56c0_40_ff; +extern cpuop_func op_56c8_40_nf; +extern cpuop_func op_56c8_40_ff; +extern cpuop_func op_56d0_40_nf; +extern cpuop_func op_56d0_40_ff; +extern cpuop_func op_56d8_40_nf; +extern cpuop_func op_56d8_40_ff; +extern cpuop_func op_56e0_40_nf; +extern cpuop_func op_56e0_40_ff; +extern cpuop_func op_56e8_40_nf; +extern cpuop_func op_56e8_40_ff; +extern cpuop_func op_56f0_40_nf; +extern cpuop_func op_56f0_40_ff; +extern cpuop_func op_56f8_40_nf; +extern cpuop_func op_56f8_40_ff; +extern cpuop_func op_56f9_40_nf; +extern cpuop_func op_56f9_40_ff; +extern cpuop_func op_56fa_40_nf; +extern cpuop_func op_56fa_40_ff; +extern cpuop_func op_56fb_40_nf; +extern cpuop_func op_56fb_40_ff; +extern cpuop_func op_56fc_40_nf; +extern cpuop_func op_56fc_40_ff; +extern cpuop_func op_57c0_40_nf; +extern cpuop_func op_57c0_40_ff; +extern cpuop_func op_57c8_40_nf; +extern cpuop_func op_57c8_40_ff; +extern cpuop_func op_57d0_40_nf; +extern cpuop_func op_57d0_40_ff; +extern cpuop_func op_57d8_40_nf; +extern cpuop_func op_57d8_40_ff; +extern cpuop_func op_57e0_40_nf; +extern cpuop_func op_57e0_40_ff; +extern cpuop_func op_57e8_40_nf; +extern cpuop_func op_57e8_40_ff; +extern cpuop_func op_57f0_40_nf; +extern cpuop_func op_57f0_40_ff; +extern cpuop_func op_57f8_40_nf; +extern cpuop_func op_57f8_40_ff; +extern cpuop_func op_57f9_40_nf; +extern cpuop_func op_57f9_40_ff; +extern cpuop_func op_57fa_40_nf; +extern cpuop_func op_57fa_40_ff; +extern cpuop_func op_57fb_40_nf; +extern cpuop_func op_57fb_40_ff; +extern cpuop_func op_57fc_40_nf; +extern cpuop_func op_57fc_40_ff; +extern cpuop_func op_58c0_40_nf; +extern cpuop_func op_58c0_40_ff; +extern cpuop_func op_58c8_40_nf; +extern cpuop_func op_58c8_40_ff; +extern cpuop_func op_58d0_40_nf; +extern cpuop_func op_58d0_40_ff; +extern cpuop_func op_58d8_40_nf; +extern cpuop_func op_58d8_40_ff; +extern cpuop_func op_58e0_40_nf; +extern cpuop_func op_58e0_40_ff; +extern cpuop_func op_58e8_40_nf; +extern cpuop_func op_58e8_40_ff; +extern cpuop_func op_58f0_40_nf; +extern cpuop_func op_58f0_40_ff; +extern cpuop_func op_58f8_40_nf; +extern cpuop_func op_58f8_40_ff; +extern cpuop_func op_58f9_40_nf; +extern cpuop_func op_58f9_40_ff; +extern cpuop_func op_58fa_40_nf; +extern cpuop_func op_58fa_40_ff; +extern cpuop_func op_58fb_40_nf; +extern cpuop_func op_58fb_40_ff; +extern cpuop_func op_58fc_40_nf; +extern cpuop_func op_58fc_40_ff; +extern cpuop_func op_59c0_40_nf; +extern cpuop_func op_59c0_40_ff; +extern cpuop_func op_59c8_40_nf; +extern cpuop_func op_59c8_40_ff; +extern cpuop_func op_59d0_40_nf; +extern cpuop_func op_59d0_40_ff; +extern cpuop_func op_59d8_40_nf; +extern cpuop_func op_59d8_40_ff; +extern cpuop_func op_59e0_40_nf; +extern cpuop_func op_59e0_40_ff; +extern cpuop_func op_59e8_40_nf; +extern cpuop_func op_59e8_40_ff; +extern cpuop_func op_59f0_40_nf; +extern cpuop_func op_59f0_40_ff; +extern cpuop_func op_59f8_40_nf; +extern cpuop_func op_59f8_40_ff; +extern cpuop_func op_59f9_40_nf; +extern cpuop_func op_59f9_40_ff; +extern cpuop_func op_59fa_40_nf; +extern cpuop_func op_59fa_40_ff; +extern cpuop_func op_59fb_40_nf; +extern cpuop_func op_59fb_40_ff; +extern cpuop_func op_59fc_40_nf; +extern cpuop_func op_59fc_40_ff; +extern cpuop_func op_5ac0_40_nf; +extern cpuop_func op_5ac0_40_ff; +extern cpuop_func op_5ac8_40_nf; +extern cpuop_func op_5ac8_40_ff; +extern cpuop_func op_5ad0_40_nf; +extern cpuop_func op_5ad0_40_ff; +extern cpuop_func op_5ad8_40_nf; +extern cpuop_func op_5ad8_40_ff; +extern cpuop_func op_5ae0_40_nf; +extern cpuop_func op_5ae0_40_ff; +extern cpuop_func op_5ae8_40_nf; +extern cpuop_func op_5ae8_40_ff; +extern cpuop_func op_5af0_40_nf; +extern cpuop_func op_5af0_40_ff; +extern cpuop_func op_5af8_40_nf; +extern cpuop_func op_5af8_40_ff; +extern cpuop_func op_5af9_40_nf; +extern cpuop_func op_5af9_40_ff; +extern cpuop_func op_5afa_40_nf; +extern cpuop_func op_5afa_40_ff; +extern cpuop_func op_5afb_40_nf; +extern cpuop_func op_5afb_40_ff; +extern cpuop_func op_5afc_40_nf; +extern cpuop_func op_5afc_40_ff; +extern cpuop_func op_5bc0_40_nf; +extern cpuop_func op_5bc0_40_ff; +extern cpuop_func op_5bc8_40_nf; +extern cpuop_func op_5bc8_40_ff; +extern cpuop_func op_5bd0_40_nf; +extern cpuop_func op_5bd0_40_ff; +extern cpuop_func op_5bd8_40_nf; +extern cpuop_func op_5bd8_40_ff; +extern cpuop_func op_5be0_40_nf; +extern cpuop_func op_5be0_40_ff; +extern cpuop_func op_5be8_40_nf; +extern cpuop_func op_5be8_40_ff; +extern cpuop_func op_5bf0_40_nf; +extern cpuop_func op_5bf0_40_ff; +extern cpuop_func op_5bf8_40_nf; +extern cpuop_func op_5bf8_40_ff; +extern cpuop_func op_5bf9_40_nf; +extern cpuop_func op_5bf9_40_ff; +extern cpuop_func op_5bfa_40_nf; +extern cpuop_func op_5bfa_40_ff; +extern cpuop_func op_5bfb_40_nf; +extern cpuop_func op_5bfb_40_ff; +extern cpuop_func op_5bfc_40_nf; +extern cpuop_func op_5bfc_40_ff; +extern cpuop_func op_5cc0_40_nf; +extern cpuop_func op_5cc0_40_ff; +extern cpuop_func op_5cc8_40_nf; +extern cpuop_func op_5cc8_40_ff; +extern cpuop_func op_5cd0_40_nf; +extern cpuop_func op_5cd0_40_ff; +extern cpuop_func op_5cd8_40_nf; +extern cpuop_func op_5cd8_40_ff; +extern cpuop_func op_5ce0_40_nf; +extern cpuop_func op_5ce0_40_ff; +extern cpuop_func op_5ce8_40_nf; +extern cpuop_func op_5ce8_40_ff; +extern cpuop_func op_5cf0_40_nf; +extern cpuop_func op_5cf0_40_ff; +extern cpuop_func op_5cf8_40_nf; +extern cpuop_func op_5cf8_40_ff; +extern cpuop_func op_5cf9_40_nf; +extern cpuop_func op_5cf9_40_ff; +extern cpuop_func op_5cfa_40_nf; +extern cpuop_func op_5cfa_40_ff; +extern cpuop_func op_5cfb_40_nf; +extern cpuop_func op_5cfb_40_ff; +extern cpuop_func op_5cfc_40_nf; +extern cpuop_func op_5cfc_40_ff; +extern cpuop_func op_5dc0_40_nf; +extern cpuop_func op_5dc0_40_ff; +extern cpuop_func op_5dc8_40_nf; +extern cpuop_func op_5dc8_40_ff; +extern cpuop_func op_5dd0_40_nf; +extern cpuop_func op_5dd0_40_ff; +extern cpuop_func op_5dd8_40_nf; +extern cpuop_func op_5dd8_40_ff; +extern cpuop_func op_5de0_40_nf; +extern cpuop_func op_5de0_40_ff; +extern cpuop_func op_5de8_40_nf; +extern cpuop_func op_5de8_40_ff; +extern cpuop_func op_5df0_40_nf; +extern cpuop_func op_5df0_40_ff; +extern cpuop_func op_5df8_40_nf; +extern cpuop_func op_5df8_40_ff; +extern cpuop_func op_5df9_40_nf; +extern cpuop_func op_5df9_40_ff; +extern cpuop_func op_5dfa_40_nf; +extern cpuop_func op_5dfa_40_ff; +extern cpuop_func op_5dfb_40_nf; +extern cpuop_func op_5dfb_40_ff; +extern cpuop_func op_5dfc_40_nf; +extern cpuop_func op_5dfc_40_ff; +extern cpuop_func op_5ec0_40_nf; +extern cpuop_func op_5ec0_40_ff; +extern cpuop_func op_5ec8_40_nf; +extern cpuop_func op_5ec8_40_ff; +extern cpuop_func op_5ed0_40_nf; +extern cpuop_func op_5ed0_40_ff; +extern cpuop_func op_5ed8_40_nf; +extern cpuop_func op_5ed8_40_ff; +extern cpuop_func op_5ee0_40_nf; +extern cpuop_func op_5ee0_40_ff; +extern cpuop_func op_5ee8_40_nf; +extern cpuop_func op_5ee8_40_ff; +extern cpuop_func op_5ef0_40_nf; +extern cpuop_func op_5ef0_40_ff; +extern cpuop_func op_5ef8_40_nf; +extern cpuop_func op_5ef8_40_ff; +extern cpuop_func op_5ef9_40_nf; +extern cpuop_func op_5ef9_40_ff; +extern cpuop_func op_5efa_40_nf; +extern cpuop_func op_5efa_40_ff; +extern cpuop_func op_5efb_40_nf; +extern cpuop_func op_5efb_40_ff; +extern cpuop_func op_5efc_40_nf; +extern cpuop_func op_5efc_40_ff; +extern cpuop_func op_5fc0_40_nf; +extern cpuop_func op_5fc0_40_ff; +extern cpuop_func op_5fc8_40_nf; +extern cpuop_func op_5fc8_40_ff; +extern cpuop_func op_5fd0_40_nf; +extern cpuop_func op_5fd0_40_ff; +extern cpuop_func op_5fd8_40_nf; +extern cpuop_func op_5fd8_40_ff; +extern cpuop_func op_5fe0_40_nf; +extern cpuop_func op_5fe0_40_ff; +extern cpuop_func op_5fe8_40_nf; +extern cpuop_func op_5fe8_40_ff; +extern cpuop_func op_5ff0_40_nf; +extern cpuop_func op_5ff0_40_ff; +extern cpuop_func op_5ff8_40_nf; +extern cpuop_func op_5ff8_40_ff; +extern cpuop_func op_5ff9_40_nf; +extern cpuop_func op_5ff9_40_ff; +extern cpuop_func op_5ffa_40_nf; +extern cpuop_func op_5ffa_40_ff; +extern cpuop_func op_5ffb_40_nf; +extern cpuop_func op_5ffb_40_ff; +extern cpuop_func op_5ffc_40_nf; +extern cpuop_func op_5ffc_40_ff; +extern cpuop_func op_6000_40_nf; +extern cpuop_func op_6000_40_ff; +extern cpuop_func op_6001_40_nf; +extern cpuop_func op_6001_40_ff; +extern cpuop_func op_60ff_40_nf; +extern cpuop_func op_60ff_40_ff; +extern cpuop_func op_6100_40_nf; +extern cpuop_func op_6100_40_ff; +extern cpuop_func op_6101_40_nf; +extern cpuop_func op_6101_40_ff; +extern cpuop_func op_61ff_40_nf; +extern cpuop_func op_61ff_40_ff; +extern cpuop_func op_6200_40_nf; +extern cpuop_func op_6200_40_ff; +extern cpuop_func op_6201_40_nf; +extern cpuop_func op_6201_40_ff; +extern cpuop_func op_62ff_40_nf; +extern cpuop_func op_62ff_40_ff; +extern cpuop_func op_6300_40_nf; +extern cpuop_func op_6300_40_ff; +extern cpuop_func op_6301_40_nf; +extern cpuop_func op_6301_40_ff; +extern cpuop_func op_63ff_40_nf; +extern cpuop_func op_63ff_40_ff; +extern cpuop_func op_6400_40_nf; +extern cpuop_func op_6400_40_ff; +extern cpuop_func op_6401_40_nf; +extern cpuop_func op_6401_40_ff; +extern cpuop_func op_64ff_40_nf; +extern cpuop_func op_64ff_40_ff; +extern cpuop_func op_6500_40_nf; +extern cpuop_func op_6500_40_ff; +extern cpuop_func op_6501_40_nf; +extern cpuop_func op_6501_40_ff; +extern cpuop_func op_65ff_40_nf; +extern cpuop_func op_65ff_40_ff; +extern cpuop_func op_6600_40_nf; +extern cpuop_func op_6600_40_ff; +extern cpuop_func op_6601_40_nf; +extern cpuop_func op_6601_40_ff; +extern cpuop_func op_66ff_40_nf; +extern cpuop_func op_66ff_40_ff; +extern cpuop_func op_6700_40_nf; +extern cpuop_func op_6700_40_ff; +extern cpuop_func op_6701_40_nf; +extern cpuop_func op_6701_40_ff; +extern cpuop_func op_67ff_40_nf; +extern cpuop_func op_67ff_40_ff; +extern cpuop_func op_6800_40_nf; +extern cpuop_func op_6800_40_ff; +extern cpuop_func op_6801_40_nf; +extern cpuop_func op_6801_40_ff; +extern cpuop_func op_68ff_40_nf; +extern cpuop_func op_68ff_40_ff; +extern cpuop_func op_6900_40_nf; +extern cpuop_func op_6900_40_ff; +extern cpuop_func op_6901_40_nf; +extern cpuop_func op_6901_40_ff; +extern cpuop_func op_69ff_40_nf; +extern cpuop_func op_69ff_40_ff; +extern cpuop_func op_6a00_40_nf; +extern cpuop_func op_6a00_40_ff; +extern cpuop_func op_6a01_40_nf; +extern cpuop_func op_6a01_40_ff; +extern cpuop_func op_6aff_40_nf; +extern cpuop_func op_6aff_40_ff; +extern cpuop_func op_6b00_40_nf; +extern cpuop_func op_6b00_40_ff; +extern cpuop_func op_6b01_40_nf; +extern cpuop_func op_6b01_40_ff; +extern cpuop_func op_6bff_40_nf; +extern cpuop_func op_6bff_40_ff; +extern cpuop_func op_6c00_40_nf; +extern cpuop_func op_6c00_40_ff; +extern cpuop_func op_6c01_40_nf; +extern cpuop_func op_6c01_40_ff; +extern cpuop_func op_6cff_40_nf; +extern cpuop_func op_6cff_40_ff; +extern cpuop_func op_6d00_40_nf; +extern cpuop_func op_6d00_40_ff; +extern cpuop_func op_6d01_40_nf; +extern cpuop_func op_6d01_40_ff; +extern cpuop_func op_6dff_40_nf; +extern cpuop_func op_6dff_40_ff; +extern cpuop_func op_6e00_40_nf; +extern cpuop_func op_6e00_40_ff; +extern cpuop_func op_6e01_40_nf; +extern cpuop_func op_6e01_40_ff; +extern cpuop_func op_6eff_40_nf; +extern cpuop_func op_6eff_40_ff; +extern cpuop_func op_6f00_40_nf; +extern cpuop_func op_6f00_40_ff; +extern cpuop_func op_6f01_40_nf; +extern cpuop_func op_6f01_40_ff; +extern cpuop_func op_6fff_40_nf; +extern cpuop_func op_6fff_40_ff; +extern cpuop_func op_7000_40_nf; +extern cpuop_func op_7000_40_ff; +extern cpuop_func op_8000_40_nf; +extern cpuop_func op_8000_40_ff; +extern cpuop_func op_8010_40_nf; +extern cpuop_func op_8010_40_ff; +extern cpuop_func op_8018_40_nf; +extern cpuop_func op_8018_40_ff; +extern cpuop_func op_8020_40_nf; +extern cpuop_func op_8020_40_ff; +extern cpuop_func op_8028_40_nf; +extern cpuop_func op_8028_40_ff; +extern cpuop_func op_8030_40_nf; +extern cpuop_func op_8030_40_ff; +extern cpuop_func op_8038_40_nf; +extern cpuop_func op_8038_40_ff; +extern cpuop_func op_8039_40_nf; +extern cpuop_func op_8039_40_ff; +extern cpuop_func op_803a_40_nf; +extern cpuop_func op_803a_40_ff; +extern cpuop_func op_803b_40_nf; +extern cpuop_func op_803b_40_ff; +extern cpuop_func op_803c_40_nf; +extern cpuop_func op_803c_40_ff; +extern cpuop_func op_8040_40_nf; +extern cpuop_func op_8040_40_ff; +extern cpuop_func op_8050_40_nf; +extern cpuop_func op_8050_40_ff; +extern cpuop_func op_8058_40_nf; +extern cpuop_func op_8058_40_ff; +extern cpuop_func op_8060_40_nf; +extern cpuop_func op_8060_40_ff; +extern cpuop_func op_8068_40_nf; +extern cpuop_func op_8068_40_ff; +extern cpuop_func op_8070_40_nf; +extern cpuop_func op_8070_40_ff; +extern cpuop_func op_8078_40_nf; +extern cpuop_func op_8078_40_ff; +extern cpuop_func op_8079_40_nf; +extern cpuop_func op_8079_40_ff; +extern cpuop_func op_807a_40_nf; +extern cpuop_func op_807a_40_ff; +extern cpuop_func op_807b_40_nf; +extern cpuop_func op_807b_40_ff; +extern cpuop_func op_807c_40_nf; +extern cpuop_func op_807c_40_ff; +extern cpuop_func op_8080_40_nf; +extern cpuop_func op_8080_40_ff; +extern cpuop_func op_8090_40_nf; +extern cpuop_func op_8090_40_ff; +extern cpuop_func op_8098_40_nf; +extern cpuop_func op_8098_40_ff; +extern cpuop_func op_80a0_40_nf; +extern cpuop_func op_80a0_40_ff; +extern cpuop_func op_80a8_40_nf; +extern cpuop_func op_80a8_40_ff; +extern cpuop_func op_80b0_40_nf; +extern cpuop_func op_80b0_40_ff; +extern cpuop_func op_80b8_40_nf; +extern cpuop_func op_80b8_40_ff; +extern cpuop_func op_80b9_40_nf; +extern cpuop_func op_80b9_40_ff; +extern cpuop_func op_80ba_40_nf; +extern cpuop_func op_80ba_40_ff; +extern cpuop_func op_80bb_40_nf; +extern cpuop_func op_80bb_40_ff; +extern cpuop_func op_80bc_40_nf; +extern cpuop_func op_80bc_40_ff; +extern cpuop_func op_80c0_40_nf; +extern cpuop_func op_80c0_40_ff; +extern cpuop_func op_80d0_40_nf; +extern cpuop_func op_80d0_40_ff; +extern cpuop_func op_80d8_40_nf; +extern cpuop_func op_80d8_40_ff; +extern cpuop_func op_80e0_40_nf; +extern cpuop_func op_80e0_40_ff; +extern cpuop_func op_80e8_40_nf; +extern cpuop_func op_80e8_40_ff; +extern cpuop_func op_80f0_40_nf; +extern cpuop_func op_80f0_40_ff; +extern cpuop_func op_80f8_40_nf; +extern cpuop_func op_80f8_40_ff; +extern cpuop_func op_80f9_40_nf; +extern cpuop_func op_80f9_40_ff; +extern cpuop_func op_80fa_40_nf; +extern cpuop_func op_80fa_40_ff; +extern cpuop_func op_80fb_40_nf; +extern cpuop_func op_80fb_40_ff; +extern cpuop_func op_80fc_40_nf; +extern cpuop_func op_80fc_40_ff; +extern cpuop_func op_8100_40_nf; +extern cpuop_func op_8100_40_ff; +extern cpuop_func op_8108_40_nf; +extern cpuop_func op_8108_40_ff; +extern cpuop_func op_8110_40_nf; +extern cpuop_func op_8110_40_ff; +extern cpuop_func op_8118_40_nf; +extern cpuop_func op_8118_40_ff; +extern cpuop_func op_8120_40_nf; +extern cpuop_func op_8120_40_ff; +extern cpuop_func op_8128_40_nf; +extern cpuop_func op_8128_40_ff; +extern cpuop_func op_8130_40_nf; +extern cpuop_func op_8130_40_ff; +extern cpuop_func op_8138_40_nf; +extern cpuop_func op_8138_40_ff; +extern cpuop_func op_8139_40_nf; +extern cpuop_func op_8139_40_ff; +extern cpuop_func op_8140_40_nf; +extern cpuop_func op_8140_40_ff; +extern cpuop_func op_8148_40_nf; +extern cpuop_func op_8148_40_ff; +extern cpuop_func op_8150_40_nf; +extern cpuop_func op_8150_40_ff; +extern cpuop_func op_8158_40_nf; +extern cpuop_func op_8158_40_ff; +extern cpuop_func op_8160_40_nf; +extern cpuop_func op_8160_40_ff; +extern cpuop_func op_8168_40_nf; +extern cpuop_func op_8168_40_ff; +extern cpuop_func op_8170_40_nf; +extern cpuop_func op_8170_40_ff; +extern cpuop_func op_8178_40_nf; +extern cpuop_func op_8178_40_ff; +extern cpuop_func op_8179_40_nf; +extern cpuop_func op_8179_40_ff; +extern cpuop_func op_8180_40_nf; +extern cpuop_func op_8180_40_ff; +extern cpuop_func op_8188_40_nf; +extern cpuop_func op_8188_40_ff; +extern cpuop_func op_8190_40_nf; +extern cpuop_func op_8190_40_ff; +extern cpuop_func op_8198_40_nf; +extern cpuop_func op_8198_40_ff; +extern cpuop_func op_81a0_40_nf; +extern cpuop_func op_81a0_40_ff; +extern cpuop_func op_81a8_40_nf; +extern cpuop_func op_81a8_40_ff; +extern cpuop_func op_81b0_40_nf; +extern cpuop_func op_81b0_40_ff; +extern cpuop_func op_81b8_40_nf; +extern cpuop_func op_81b8_40_ff; +extern cpuop_func op_81b9_40_nf; +extern cpuop_func op_81b9_40_ff; +extern cpuop_func op_81c0_40_nf; +extern cpuop_func op_81c0_40_ff; +extern cpuop_func op_81d0_40_nf; +extern cpuop_func op_81d0_40_ff; +extern cpuop_func op_81d8_40_nf; +extern cpuop_func op_81d8_40_ff; +extern cpuop_func op_81e0_40_nf; +extern cpuop_func op_81e0_40_ff; +extern cpuop_func op_81e8_40_nf; +extern cpuop_func op_81e8_40_ff; +extern cpuop_func op_81f0_40_nf; +extern cpuop_func op_81f0_40_ff; +extern cpuop_func op_81f8_40_nf; +extern cpuop_func op_81f8_40_ff; +extern cpuop_func op_81f9_40_nf; +extern cpuop_func op_81f9_40_ff; +extern cpuop_func op_81fa_40_nf; +extern cpuop_func op_81fa_40_ff; +extern cpuop_func op_81fb_40_nf; +extern cpuop_func op_81fb_40_ff; +extern cpuop_func op_81fc_40_nf; +extern cpuop_func op_81fc_40_ff; +extern cpuop_func op_9000_40_nf; +extern cpuop_func op_9000_40_ff; +extern cpuop_func op_9010_40_nf; +extern cpuop_func op_9010_40_ff; +extern cpuop_func op_9018_40_nf; +extern cpuop_func op_9018_40_ff; +extern cpuop_func op_9020_40_nf; +extern cpuop_func op_9020_40_ff; +extern cpuop_func op_9028_40_nf; +extern cpuop_func op_9028_40_ff; +extern cpuop_func op_9030_40_nf; +extern cpuop_func op_9030_40_ff; +extern cpuop_func op_9038_40_nf; +extern cpuop_func op_9038_40_ff; +extern cpuop_func op_9039_40_nf; +extern cpuop_func op_9039_40_ff; +extern cpuop_func op_903a_40_nf; +extern cpuop_func op_903a_40_ff; +extern cpuop_func op_903b_40_nf; +extern cpuop_func op_903b_40_ff; +extern cpuop_func op_903c_40_nf; +extern cpuop_func op_903c_40_ff; +extern cpuop_func op_9040_40_nf; +extern cpuop_func op_9040_40_ff; +extern cpuop_func op_9048_40_nf; +extern cpuop_func op_9048_40_ff; +extern cpuop_func op_9050_40_nf; +extern cpuop_func op_9050_40_ff; +extern cpuop_func op_9058_40_nf; +extern cpuop_func op_9058_40_ff; +extern cpuop_func op_9060_40_nf; +extern cpuop_func op_9060_40_ff; +extern cpuop_func op_9068_40_nf; +extern cpuop_func op_9068_40_ff; +extern cpuop_func op_9070_40_nf; +extern cpuop_func op_9070_40_ff; +extern cpuop_func op_9078_40_nf; +extern cpuop_func op_9078_40_ff; +extern cpuop_func op_9079_40_nf; +extern cpuop_func op_9079_40_ff; +extern cpuop_func op_907a_40_nf; +extern cpuop_func op_907a_40_ff; +extern cpuop_func op_907b_40_nf; +extern cpuop_func op_907b_40_ff; +extern cpuop_func op_907c_40_nf; +extern cpuop_func op_907c_40_ff; +extern cpuop_func op_9080_40_nf; +extern cpuop_func op_9080_40_ff; +extern cpuop_func op_9088_40_nf; +extern cpuop_func op_9088_40_ff; +extern cpuop_func op_9090_40_nf; +extern cpuop_func op_9090_40_ff; +extern cpuop_func op_9098_40_nf; +extern cpuop_func op_9098_40_ff; +extern cpuop_func op_90a0_40_nf; +extern cpuop_func op_90a0_40_ff; +extern cpuop_func op_90a8_40_nf; +extern cpuop_func op_90a8_40_ff; +extern cpuop_func op_90b0_40_nf; +extern cpuop_func op_90b0_40_ff; +extern cpuop_func op_90b8_40_nf; +extern cpuop_func op_90b8_40_ff; +extern cpuop_func op_90b9_40_nf; +extern cpuop_func op_90b9_40_ff; +extern cpuop_func op_90ba_40_nf; +extern cpuop_func op_90ba_40_ff; +extern cpuop_func op_90bb_40_nf; +extern cpuop_func op_90bb_40_ff; +extern cpuop_func op_90bc_40_nf; +extern cpuop_func op_90bc_40_ff; +extern cpuop_func op_90c0_40_nf; +extern cpuop_func op_90c0_40_ff; +extern cpuop_func op_90c8_40_nf; +extern cpuop_func op_90c8_40_ff; +extern cpuop_func op_90d0_40_nf; +extern cpuop_func op_90d0_40_ff; +extern cpuop_func op_90d8_40_nf; +extern cpuop_func op_90d8_40_ff; +extern cpuop_func op_90e0_40_nf; +extern cpuop_func op_90e0_40_ff; +extern cpuop_func op_90e8_40_nf; +extern cpuop_func op_90e8_40_ff; +extern cpuop_func op_90f0_40_nf; +extern cpuop_func op_90f0_40_ff; +extern cpuop_func op_90f8_40_nf; +extern cpuop_func op_90f8_40_ff; +extern cpuop_func op_90f9_40_nf; +extern cpuop_func op_90f9_40_ff; +extern cpuop_func op_90fa_40_nf; +extern cpuop_func op_90fa_40_ff; +extern cpuop_func op_90fb_40_nf; +extern cpuop_func op_90fb_40_ff; +extern cpuop_func op_90fc_40_nf; +extern cpuop_func op_90fc_40_ff; +extern cpuop_func op_9100_40_nf; +extern cpuop_func op_9100_40_ff; +extern cpuop_func op_9108_40_nf; +extern cpuop_func op_9108_40_ff; +extern cpuop_func op_9110_40_nf; +extern cpuop_func op_9110_40_ff; +extern cpuop_func op_9118_40_nf; +extern cpuop_func op_9118_40_ff; +extern cpuop_func op_9120_40_nf; +extern cpuop_func op_9120_40_ff; +extern cpuop_func op_9128_40_nf; +extern cpuop_func op_9128_40_ff; +extern cpuop_func op_9130_40_nf; +extern cpuop_func op_9130_40_ff; +extern cpuop_func op_9138_40_nf; +extern cpuop_func op_9138_40_ff; +extern cpuop_func op_9139_40_nf; +extern cpuop_func op_9139_40_ff; +extern cpuop_func op_9140_40_nf; +extern cpuop_func op_9140_40_ff; +extern cpuop_func op_9148_40_nf; +extern cpuop_func op_9148_40_ff; +extern cpuop_func op_9150_40_nf; +extern cpuop_func op_9150_40_ff; +extern cpuop_func op_9158_40_nf; +extern cpuop_func op_9158_40_ff; +extern cpuop_func op_9160_40_nf; +extern cpuop_func op_9160_40_ff; +extern cpuop_func op_9168_40_nf; +extern cpuop_func op_9168_40_ff; +extern cpuop_func op_9170_40_nf; +extern cpuop_func op_9170_40_ff; +extern cpuop_func op_9178_40_nf; +extern cpuop_func op_9178_40_ff; +extern cpuop_func op_9179_40_nf; +extern cpuop_func op_9179_40_ff; +extern cpuop_func op_9180_40_nf; +extern cpuop_func op_9180_40_ff; +extern cpuop_func op_9188_40_nf; +extern cpuop_func op_9188_40_ff; +extern cpuop_func op_9190_40_nf; +extern cpuop_func op_9190_40_ff; +extern cpuop_func op_9198_40_nf; +extern cpuop_func op_9198_40_ff; +extern cpuop_func op_91a0_40_nf; +extern cpuop_func op_91a0_40_ff; +extern cpuop_func op_91a8_40_nf; +extern cpuop_func op_91a8_40_ff; +extern cpuop_func op_91b0_40_nf; +extern cpuop_func op_91b0_40_ff; +extern cpuop_func op_91b8_40_nf; +extern cpuop_func op_91b8_40_ff; +extern cpuop_func op_91b9_40_nf; +extern cpuop_func op_91b9_40_ff; +extern cpuop_func op_91c0_40_nf; +extern cpuop_func op_91c0_40_ff; +extern cpuop_func op_91c8_40_nf; +extern cpuop_func op_91c8_40_ff; +extern cpuop_func op_91d0_40_nf; +extern cpuop_func op_91d0_40_ff; +extern cpuop_func op_91d8_40_nf; +extern cpuop_func op_91d8_40_ff; +extern cpuop_func op_91e0_40_nf; +extern cpuop_func op_91e0_40_ff; +extern cpuop_func op_91e8_40_nf; +extern cpuop_func op_91e8_40_ff; +extern cpuop_func op_91f0_40_nf; +extern cpuop_func op_91f0_40_ff; +extern cpuop_func op_91f8_40_nf; +extern cpuop_func op_91f8_40_ff; +extern cpuop_func op_91f9_40_nf; +extern cpuop_func op_91f9_40_ff; +extern cpuop_func op_91fa_40_nf; +extern cpuop_func op_91fa_40_ff; +extern cpuop_func op_91fb_40_nf; +extern cpuop_func op_91fb_40_ff; +extern cpuop_func op_91fc_40_nf; +extern cpuop_func op_91fc_40_ff; +extern cpuop_func op_b000_40_nf; +extern cpuop_func op_b000_40_ff; +extern cpuop_func op_b010_40_nf; +extern cpuop_func op_b010_40_ff; +extern cpuop_func op_b018_40_nf; +extern cpuop_func op_b018_40_ff; +extern cpuop_func op_b020_40_nf; +extern cpuop_func op_b020_40_ff; +extern cpuop_func op_b028_40_nf; +extern cpuop_func op_b028_40_ff; +extern cpuop_func op_b030_40_nf; +extern cpuop_func op_b030_40_ff; +extern cpuop_func op_b038_40_nf; +extern cpuop_func op_b038_40_ff; +extern cpuop_func op_b039_40_nf; +extern cpuop_func op_b039_40_ff; +extern cpuop_func op_b03a_40_nf; +extern cpuop_func op_b03a_40_ff; +extern cpuop_func op_b03b_40_nf; +extern cpuop_func op_b03b_40_ff; +extern cpuop_func op_b03c_40_nf; +extern cpuop_func op_b03c_40_ff; +extern cpuop_func op_b040_40_nf; +extern cpuop_func op_b040_40_ff; +extern cpuop_func op_b048_40_nf; +extern cpuop_func op_b048_40_ff; +extern cpuop_func op_b050_40_nf; +extern cpuop_func op_b050_40_ff; +extern cpuop_func op_b058_40_nf; +extern cpuop_func op_b058_40_ff; +extern cpuop_func op_b060_40_nf; +extern cpuop_func op_b060_40_ff; +extern cpuop_func op_b068_40_nf; +extern cpuop_func op_b068_40_ff; +extern cpuop_func op_b070_40_nf; +extern cpuop_func op_b070_40_ff; +extern cpuop_func op_b078_40_nf; +extern cpuop_func op_b078_40_ff; +extern cpuop_func op_b079_40_nf; +extern cpuop_func op_b079_40_ff; +extern cpuop_func op_b07a_40_nf; +extern cpuop_func op_b07a_40_ff; +extern cpuop_func op_b07b_40_nf; +extern cpuop_func op_b07b_40_ff; +extern cpuop_func op_b07c_40_nf; +extern cpuop_func op_b07c_40_ff; +extern cpuop_func op_b080_40_nf; +extern cpuop_func op_b080_40_ff; +extern cpuop_func op_b088_40_nf; +extern cpuop_func op_b088_40_ff; +extern cpuop_func op_b090_40_nf; +extern cpuop_func op_b090_40_ff; +extern cpuop_func op_b098_40_nf; +extern cpuop_func op_b098_40_ff; +extern cpuop_func op_b0a0_40_nf; +extern cpuop_func op_b0a0_40_ff; +extern cpuop_func op_b0a8_40_nf; +extern cpuop_func op_b0a8_40_ff; +extern cpuop_func op_b0b0_40_nf; +extern cpuop_func op_b0b0_40_ff; +extern cpuop_func op_b0b8_40_nf; +extern cpuop_func op_b0b8_40_ff; +extern cpuop_func op_b0b9_40_nf; +extern cpuop_func op_b0b9_40_ff; +extern cpuop_func op_b0ba_40_nf; +extern cpuop_func op_b0ba_40_ff; +extern cpuop_func op_b0bb_40_nf; +extern cpuop_func op_b0bb_40_ff; +extern cpuop_func op_b0bc_40_nf; +extern cpuop_func op_b0bc_40_ff; +extern cpuop_func op_b0c0_40_nf; +extern cpuop_func op_b0c0_40_ff; +extern cpuop_func op_b0c8_40_nf; +extern cpuop_func op_b0c8_40_ff; +extern cpuop_func op_b0d0_40_nf; +extern cpuop_func op_b0d0_40_ff; +extern cpuop_func op_b0d8_40_nf; +extern cpuop_func op_b0d8_40_ff; +extern cpuop_func op_b0e0_40_nf; +extern cpuop_func op_b0e0_40_ff; +extern cpuop_func op_b0e8_40_nf; +extern cpuop_func op_b0e8_40_ff; +extern cpuop_func op_b0f0_40_nf; +extern cpuop_func op_b0f0_40_ff; +extern cpuop_func op_b0f8_40_nf; +extern cpuop_func op_b0f8_40_ff; +extern cpuop_func op_b0f9_40_nf; +extern cpuop_func op_b0f9_40_ff; +extern cpuop_func op_b0fa_40_nf; +extern cpuop_func op_b0fa_40_ff; +extern cpuop_func op_b0fb_40_nf; +extern cpuop_func op_b0fb_40_ff; +extern cpuop_func op_b0fc_40_nf; +extern cpuop_func op_b0fc_40_ff; +extern cpuop_func op_b100_40_nf; +extern cpuop_func op_b100_40_ff; +extern cpuop_func op_b108_40_nf; +extern cpuop_func op_b108_40_ff; +extern cpuop_func op_b110_40_nf; +extern cpuop_func op_b110_40_ff; +extern cpuop_func op_b118_40_nf; +extern cpuop_func op_b118_40_ff; +extern cpuop_func op_b120_40_nf; +extern cpuop_func op_b120_40_ff; +extern cpuop_func op_b128_40_nf; +extern cpuop_func op_b128_40_ff; +extern cpuop_func op_b130_40_nf; +extern cpuop_func op_b130_40_ff; +extern cpuop_func op_b138_40_nf; +extern cpuop_func op_b138_40_ff; +extern cpuop_func op_b139_40_nf; +extern cpuop_func op_b139_40_ff; +extern cpuop_func op_b140_40_nf; +extern cpuop_func op_b140_40_ff; +extern cpuop_func op_b148_40_nf; +extern cpuop_func op_b148_40_ff; +extern cpuop_func op_b150_40_nf; +extern cpuop_func op_b150_40_ff; +extern cpuop_func op_b158_40_nf; +extern cpuop_func op_b158_40_ff; +extern cpuop_func op_b160_40_nf; +extern cpuop_func op_b160_40_ff; +extern cpuop_func op_b168_40_nf; +extern cpuop_func op_b168_40_ff; +extern cpuop_func op_b170_40_nf; +extern cpuop_func op_b170_40_ff; +extern cpuop_func op_b178_40_nf; +extern cpuop_func op_b178_40_ff; +extern cpuop_func op_b179_40_nf; +extern cpuop_func op_b179_40_ff; +extern cpuop_func op_b180_40_nf; +extern cpuop_func op_b180_40_ff; +extern cpuop_func op_b188_40_nf; +extern cpuop_func op_b188_40_ff; +extern cpuop_func op_b190_40_nf; +extern cpuop_func op_b190_40_ff; +extern cpuop_func op_b198_40_nf; +extern cpuop_func op_b198_40_ff; +extern cpuop_func op_b1a0_40_nf; +extern cpuop_func op_b1a0_40_ff; +extern cpuop_func op_b1a8_40_nf; +extern cpuop_func op_b1a8_40_ff; +extern cpuop_func op_b1b0_40_nf; +extern cpuop_func op_b1b0_40_ff; +extern cpuop_func op_b1b8_40_nf; +extern cpuop_func op_b1b8_40_ff; +extern cpuop_func op_b1b9_40_nf; +extern cpuop_func op_b1b9_40_ff; +extern cpuop_func op_b1c0_40_nf; +extern cpuop_func op_b1c0_40_ff; +extern cpuop_func op_b1c8_40_nf; +extern cpuop_func op_b1c8_40_ff; +extern cpuop_func op_b1d0_40_nf; +extern cpuop_func op_b1d0_40_ff; +extern cpuop_func op_b1d8_40_nf; +extern cpuop_func op_b1d8_40_ff; +extern cpuop_func op_b1e0_40_nf; +extern cpuop_func op_b1e0_40_ff; +extern cpuop_func op_b1e8_40_nf; +extern cpuop_func op_b1e8_40_ff; +extern cpuop_func op_b1f0_40_nf; +extern cpuop_func op_b1f0_40_ff; +extern cpuop_func op_b1f8_40_nf; +extern cpuop_func op_b1f8_40_ff; +extern cpuop_func op_b1f9_40_nf; +extern cpuop_func op_b1f9_40_ff; +extern cpuop_func op_b1fa_40_nf; +extern cpuop_func op_b1fa_40_ff; +extern cpuop_func op_b1fb_40_nf; +extern cpuop_func op_b1fb_40_ff; +extern cpuop_func op_b1fc_40_nf; +extern cpuop_func op_b1fc_40_ff; +extern cpuop_func op_c000_40_nf; +extern cpuop_func op_c000_40_ff; +extern cpuop_func op_c010_40_nf; +extern cpuop_func op_c010_40_ff; +extern cpuop_func op_c018_40_nf; +extern cpuop_func op_c018_40_ff; +extern cpuop_func op_c020_40_nf; +extern cpuop_func op_c020_40_ff; +extern cpuop_func op_c028_40_nf; +extern cpuop_func op_c028_40_ff; +extern cpuop_func op_c030_40_nf; +extern cpuop_func op_c030_40_ff; +extern cpuop_func op_c038_40_nf; +extern cpuop_func op_c038_40_ff; +extern cpuop_func op_c039_40_nf; +extern cpuop_func op_c039_40_ff; +extern cpuop_func op_c03a_40_nf; +extern cpuop_func op_c03a_40_ff; +extern cpuop_func op_c03b_40_nf; +extern cpuop_func op_c03b_40_ff; +extern cpuop_func op_c03c_40_nf; +extern cpuop_func op_c03c_40_ff; +extern cpuop_func op_c040_40_nf; +extern cpuop_func op_c040_40_ff; +extern cpuop_func op_c050_40_nf; +extern cpuop_func op_c050_40_ff; +extern cpuop_func op_c058_40_nf; +extern cpuop_func op_c058_40_ff; +extern cpuop_func op_c060_40_nf; +extern cpuop_func op_c060_40_ff; +extern cpuop_func op_c068_40_nf; +extern cpuop_func op_c068_40_ff; +extern cpuop_func op_c070_40_nf; +extern cpuop_func op_c070_40_ff; +extern cpuop_func op_c078_40_nf; +extern cpuop_func op_c078_40_ff; +extern cpuop_func op_c079_40_nf; +extern cpuop_func op_c079_40_ff; +extern cpuop_func op_c07a_40_nf; +extern cpuop_func op_c07a_40_ff; +extern cpuop_func op_c07b_40_nf; +extern cpuop_func op_c07b_40_ff; +extern cpuop_func op_c07c_40_nf; +extern cpuop_func op_c07c_40_ff; +extern cpuop_func op_c080_40_nf; +extern cpuop_func op_c080_40_ff; +extern cpuop_func op_c090_40_nf; +extern cpuop_func op_c090_40_ff; +extern cpuop_func op_c098_40_nf; +extern cpuop_func op_c098_40_ff; +extern cpuop_func op_c0a0_40_nf; +extern cpuop_func op_c0a0_40_ff; +extern cpuop_func op_c0a8_40_nf; +extern cpuop_func op_c0a8_40_ff; +extern cpuop_func op_c0b0_40_nf; +extern cpuop_func op_c0b0_40_ff; +extern cpuop_func op_c0b8_40_nf; +extern cpuop_func op_c0b8_40_ff; +extern cpuop_func op_c0b9_40_nf; +extern cpuop_func op_c0b9_40_ff; +extern cpuop_func op_c0ba_40_nf; +extern cpuop_func op_c0ba_40_ff; +extern cpuop_func op_c0bb_40_nf; +extern cpuop_func op_c0bb_40_ff; +extern cpuop_func op_c0bc_40_nf; +extern cpuop_func op_c0bc_40_ff; +extern cpuop_func op_c0c0_40_nf; +extern cpuop_func op_c0c0_40_ff; +extern cpuop_func op_c0d0_40_nf; +extern cpuop_func op_c0d0_40_ff; +extern cpuop_func op_c0d8_40_nf; +extern cpuop_func op_c0d8_40_ff; +extern cpuop_func op_c0e0_40_nf; +extern cpuop_func op_c0e0_40_ff; +extern cpuop_func op_c0e8_40_nf; +extern cpuop_func op_c0e8_40_ff; +extern cpuop_func op_c0f0_40_nf; +extern cpuop_func op_c0f0_40_ff; +extern cpuop_func op_c0f8_40_nf; +extern cpuop_func op_c0f8_40_ff; +extern cpuop_func op_c0f9_40_nf; +extern cpuop_func op_c0f9_40_ff; +extern cpuop_func op_c0fa_40_nf; +extern cpuop_func op_c0fa_40_ff; +extern cpuop_func op_c0fb_40_nf; +extern cpuop_func op_c0fb_40_ff; +extern cpuop_func op_c0fc_40_nf; +extern cpuop_func op_c0fc_40_ff; +extern cpuop_func op_c100_40_nf; +extern cpuop_func op_c100_40_ff; +extern cpuop_func op_c108_40_nf; +extern cpuop_func op_c108_40_ff; +extern cpuop_func op_c110_40_nf; +extern cpuop_func op_c110_40_ff; +extern cpuop_func op_c118_40_nf; +extern cpuop_func op_c118_40_ff; +extern cpuop_func op_c120_40_nf; +extern cpuop_func op_c120_40_ff; +extern cpuop_func op_c128_40_nf; +extern cpuop_func op_c128_40_ff; +extern cpuop_func op_c130_40_nf; +extern cpuop_func op_c130_40_ff; +extern cpuop_func op_c138_40_nf; +extern cpuop_func op_c138_40_ff; +extern cpuop_func op_c139_40_nf; +extern cpuop_func op_c139_40_ff; +extern cpuop_func op_c140_40_nf; +extern cpuop_func op_c140_40_ff; +extern cpuop_func op_c148_40_nf; +extern cpuop_func op_c148_40_ff; +extern cpuop_func op_c150_40_nf; +extern cpuop_func op_c150_40_ff; +extern cpuop_func op_c158_40_nf; +extern cpuop_func op_c158_40_ff; +extern cpuop_func op_c160_40_nf; +extern cpuop_func op_c160_40_ff; +extern cpuop_func op_c168_40_nf; +extern cpuop_func op_c168_40_ff; +extern cpuop_func op_c170_40_nf; +extern cpuop_func op_c170_40_ff; +extern cpuop_func op_c178_40_nf; +extern cpuop_func op_c178_40_ff; +extern cpuop_func op_c179_40_nf; +extern cpuop_func op_c179_40_ff; +extern cpuop_func op_c188_40_nf; +extern cpuop_func op_c188_40_ff; +extern cpuop_func op_c190_40_nf; +extern cpuop_func op_c190_40_ff; +extern cpuop_func op_c198_40_nf; +extern cpuop_func op_c198_40_ff; +extern cpuop_func op_c1a0_40_nf; +extern cpuop_func op_c1a0_40_ff; +extern cpuop_func op_c1a8_40_nf; +extern cpuop_func op_c1a8_40_ff; +extern cpuop_func op_c1b0_40_nf; +extern cpuop_func op_c1b0_40_ff; +extern cpuop_func op_c1b8_40_nf; +extern cpuop_func op_c1b8_40_ff; +extern cpuop_func op_c1b9_40_nf; +extern cpuop_func op_c1b9_40_ff; +extern cpuop_func op_c1c0_40_nf; +extern cpuop_func op_c1c0_40_ff; +extern cpuop_func op_c1d0_40_nf; +extern cpuop_func op_c1d0_40_ff; +extern cpuop_func op_c1d8_40_nf; +extern cpuop_func op_c1d8_40_ff; +extern cpuop_func op_c1e0_40_nf; +extern cpuop_func op_c1e0_40_ff; +extern cpuop_func op_c1e8_40_nf; +extern cpuop_func op_c1e8_40_ff; +extern cpuop_func op_c1f0_40_nf; +extern cpuop_func op_c1f0_40_ff; +extern cpuop_func op_c1f8_40_nf; +extern cpuop_func op_c1f8_40_ff; +extern cpuop_func op_c1f9_40_nf; +extern cpuop_func op_c1f9_40_ff; +extern cpuop_func op_c1fa_40_nf; +extern cpuop_func op_c1fa_40_ff; +extern cpuop_func op_c1fb_40_nf; +extern cpuop_func op_c1fb_40_ff; +extern cpuop_func op_c1fc_40_nf; +extern cpuop_func op_c1fc_40_ff; +extern cpuop_func op_d000_40_nf; +extern cpuop_func op_d000_40_ff; +extern cpuop_func op_d010_40_nf; +extern cpuop_func op_d010_40_ff; +extern cpuop_func op_d018_40_nf; +extern cpuop_func op_d018_40_ff; +extern cpuop_func op_d020_40_nf; +extern cpuop_func op_d020_40_ff; +extern cpuop_func op_d028_40_nf; +extern cpuop_func op_d028_40_ff; +extern cpuop_func op_d030_40_nf; +extern cpuop_func op_d030_40_ff; +extern cpuop_func op_d038_40_nf; +extern cpuop_func op_d038_40_ff; +extern cpuop_func op_d039_40_nf; +extern cpuop_func op_d039_40_ff; +extern cpuop_func op_d03a_40_nf; +extern cpuop_func op_d03a_40_ff; +extern cpuop_func op_d03b_40_nf; +extern cpuop_func op_d03b_40_ff; +extern cpuop_func op_d03c_40_nf; +extern cpuop_func op_d03c_40_ff; +extern cpuop_func op_d040_40_nf; +extern cpuop_func op_d040_40_ff; +extern cpuop_func op_d048_40_nf; +extern cpuop_func op_d048_40_ff; +extern cpuop_func op_d050_40_nf; +extern cpuop_func op_d050_40_ff; +extern cpuop_func op_d058_40_nf; +extern cpuop_func op_d058_40_ff; +extern cpuop_func op_d060_40_nf; +extern cpuop_func op_d060_40_ff; +extern cpuop_func op_d068_40_nf; +extern cpuop_func op_d068_40_ff; +extern cpuop_func op_d070_40_nf; +extern cpuop_func op_d070_40_ff; +extern cpuop_func op_d078_40_nf; +extern cpuop_func op_d078_40_ff; +extern cpuop_func op_d079_40_nf; +extern cpuop_func op_d079_40_ff; +extern cpuop_func op_d07a_40_nf; +extern cpuop_func op_d07a_40_ff; +extern cpuop_func op_d07b_40_nf; +extern cpuop_func op_d07b_40_ff; +extern cpuop_func op_d07c_40_nf; +extern cpuop_func op_d07c_40_ff; +extern cpuop_func op_d080_40_nf; +extern cpuop_func op_d080_40_ff; +extern cpuop_func op_d088_40_nf; +extern cpuop_func op_d088_40_ff; +extern cpuop_func op_d090_40_nf; +extern cpuop_func op_d090_40_ff; +extern cpuop_func op_d098_40_nf; +extern cpuop_func op_d098_40_ff; +extern cpuop_func op_d0a0_40_nf; +extern cpuop_func op_d0a0_40_ff; +extern cpuop_func op_d0a8_40_nf; +extern cpuop_func op_d0a8_40_ff; +extern cpuop_func op_d0b0_40_nf; +extern cpuop_func op_d0b0_40_ff; +extern cpuop_func op_d0b8_40_nf; +extern cpuop_func op_d0b8_40_ff; +extern cpuop_func op_d0b9_40_nf; +extern cpuop_func op_d0b9_40_ff; +extern cpuop_func op_d0ba_40_nf; +extern cpuop_func op_d0ba_40_ff; +extern cpuop_func op_d0bb_40_nf; +extern cpuop_func op_d0bb_40_ff; +extern cpuop_func op_d0bc_40_nf; +extern cpuop_func op_d0bc_40_ff; +extern cpuop_func op_d0c0_40_nf; +extern cpuop_func op_d0c0_40_ff; +extern cpuop_func op_d0c8_40_nf; +extern cpuop_func op_d0c8_40_ff; +extern cpuop_func op_d0d0_40_nf; +extern cpuop_func op_d0d0_40_ff; +extern cpuop_func op_d0d8_40_nf; +extern cpuop_func op_d0d8_40_ff; +extern cpuop_func op_d0e0_40_nf; +extern cpuop_func op_d0e0_40_ff; +extern cpuop_func op_d0e8_40_nf; +extern cpuop_func op_d0e8_40_ff; +extern cpuop_func op_d0f0_40_nf; +extern cpuop_func op_d0f0_40_ff; +extern cpuop_func op_d0f8_40_nf; +extern cpuop_func op_d0f8_40_ff; +extern cpuop_func op_d0f9_40_nf; +extern cpuop_func op_d0f9_40_ff; +extern cpuop_func op_d0fa_40_nf; +extern cpuop_func op_d0fa_40_ff; +extern cpuop_func op_d0fb_40_nf; +extern cpuop_func op_d0fb_40_ff; +extern cpuop_func op_d0fc_40_nf; +extern cpuop_func op_d0fc_40_ff; +extern cpuop_func op_d100_40_nf; +extern cpuop_func op_d100_40_ff; +extern cpuop_func op_d108_40_nf; +extern cpuop_func op_d108_40_ff; +extern cpuop_func op_d110_40_nf; +extern cpuop_func op_d110_40_ff; +extern cpuop_func op_d118_40_nf; +extern cpuop_func op_d118_40_ff; +extern cpuop_func op_d120_40_nf; +extern cpuop_func op_d120_40_ff; +extern cpuop_func op_d128_40_nf; +extern cpuop_func op_d128_40_ff; +extern cpuop_func op_d130_40_nf; +extern cpuop_func op_d130_40_ff; +extern cpuop_func op_d138_40_nf; +extern cpuop_func op_d138_40_ff; +extern cpuop_func op_d139_40_nf; +extern cpuop_func op_d139_40_ff; +extern cpuop_func op_d140_40_nf; +extern cpuop_func op_d140_40_ff; +extern cpuop_func op_d148_40_nf; +extern cpuop_func op_d148_40_ff; +extern cpuop_func op_d150_40_nf; +extern cpuop_func op_d150_40_ff; +extern cpuop_func op_d158_40_nf; +extern cpuop_func op_d158_40_ff; +extern cpuop_func op_d160_40_nf; +extern cpuop_func op_d160_40_ff; +extern cpuop_func op_d168_40_nf; +extern cpuop_func op_d168_40_ff; +extern cpuop_func op_d170_40_nf; +extern cpuop_func op_d170_40_ff; +extern cpuop_func op_d178_40_nf; +extern cpuop_func op_d178_40_ff; +extern cpuop_func op_d179_40_nf; +extern cpuop_func op_d179_40_ff; +extern cpuop_func op_d180_40_nf; +extern cpuop_func op_d180_40_ff; +extern cpuop_func op_d188_40_nf; +extern cpuop_func op_d188_40_ff; +extern cpuop_func op_d190_40_nf; +extern cpuop_func op_d190_40_ff; +extern cpuop_func op_d198_40_nf; +extern cpuop_func op_d198_40_ff; +extern cpuop_func op_d1a0_40_nf; +extern cpuop_func op_d1a0_40_ff; +extern cpuop_func op_d1a8_40_nf; +extern cpuop_func op_d1a8_40_ff; +extern cpuop_func op_d1b0_40_nf; +extern cpuop_func op_d1b0_40_ff; +extern cpuop_func op_d1b8_40_nf; +extern cpuop_func op_d1b8_40_ff; +extern cpuop_func op_d1b9_40_nf; +extern cpuop_func op_d1b9_40_ff; +extern cpuop_func op_d1c0_40_nf; +extern cpuop_func op_d1c0_40_ff; +extern cpuop_func op_d1c8_40_nf; +extern cpuop_func op_d1c8_40_ff; +extern cpuop_func op_d1d0_40_nf; +extern cpuop_func op_d1d0_40_ff; +extern cpuop_func op_d1d8_40_nf; +extern cpuop_func op_d1d8_40_ff; +extern cpuop_func op_d1e0_40_nf; +extern cpuop_func op_d1e0_40_ff; +extern cpuop_func op_d1e8_40_nf; +extern cpuop_func op_d1e8_40_ff; +extern cpuop_func op_d1f0_40_nf; +extern cpuop_func op_d1f0_40_ff; +extern cpuop_func op_d1f8_40_nf; +extern cpuop_func op_d1f8_40_ff; +extern cpuop_func op_d1f9_40_nf; +extern cpuop_func op_d1f9_40_ff; +extern cpuop_func op_d1fa_40_nf; +extern cpuop_func op_d1fa_40_ff; +extern cpuop_func op_d1fb_40_nf; +extern cpuop_func op_d1fb_40_ff; +extern cpuop_func op_d1fc_40_nf; +extern cpuop_func op_d1fc_40_ff; +extern cpuop_func op_e000_40_nf; +extern cpuop_func op_e000_40_ff; +extern cpuop_func op_e008_40_nf; +extern cpuop_func op_e008_40_ff; +extern cpuop_func op_e010_40_nf; +extern cpuop_func op_e010_40_ff; +extern cpuop_func op_e018_40_nf; +extern cpuop_func op_e018_40_ff; +extern cpuop_func op_e020_40_nf; +extern cpuop_func op_e020_40_ff; +extern cpuop_func op_e028_40_nf; +extern cpuop_func op_e028_40_ff; +extern cpuop_func op_e030_40_nf; +extern cpuop_func op_e030_40_ff; +extern cpuop_func op_e038_40_nf; +extern cpuop_func op_e038_40_ff; +extern cpuop_func op_e040_40_nf; +extern cpuop_func op_e040_40_ff; +extern cpuop_func op_e048_40_nf; +extern cpuop_func op_e048_40_ff; +extern cpuop_func op_e050_40_nf; +extern cpuop_func op_e050_40_ff; +extern cpuop_func op_e058_40_nf; +extern cpuop_func op_e058_40_ff; +extern cpuop_func op_e060_40_nf; +extern cpuop_func op_e060_40_ff; +extern cpuop_func op_e068_40_nf; +extern cpuop_func op_e068_40_ff; +extern cpuop_func op_e070_40_nf; +extern cpuop_func op_e070_40_ff; +extern cpuop_func op_e078_40_nf; +extern cpuop_func op_e078_40_ff; +extern cpuop_func op_e080_40_nf; +extern cpuop_func op_e080_40_ff; +extern cpuop_func op_e088_40_nf; +extern cpuop_func op_e088_40_ff; +extern cpuop_func op_e090_40_nf; +extern cpuop_func op_e090_40_ff; +extern cpuop_func op_e098_40_nf; +extern cpuop_func op_e098_40_ff; +extern cpuop_func op_e0a0_40_nf; +extern cpuop_func op_e0a0_40_ff; +extern cpuop_func op_e0a8_40_nf; +extern cpuop_func op_e0a8_40_ff; +extern cpuop_func op_e0b0_40_nf; +extern cpuop_func op_e0b0_40_ff; +extern cpuop_func op_e0b8_40_nf; +extern cpuop_func op_e0b8_40_ff; +extern cpuop_func op_e0d0_40_nf; +extern cpuop_func op_e0d0_40_ff; +extern cpuop_func op_e0d8_40_nf; +extern cpuop_func op_e0d8_40_ff; +extern cpuop_func op_e0e0_40_nf; +extern cpuop_func op_e0e0_40_ff; +extern cpuop_func op_e0e8_40_nf; +extern cpuop_func op_e0e8_40_ff; +extern cpuop_func op_e0f0_40_nf; +extern cpuop_func op_e0f0_40_ff; +extern cpuop_func op_e0f8_40_nf; +extern cpuop_func op_e0f8_40_ff; +extern cpuop_func op_e0f9_40_nf; +extern cpuop_func op_e0f9_40_ff; +extern cpuop_func op_e100_40_nf; +extern cpuop_func op_e100_40_ff; +extern cpuop_func op_e108_40_nf; +extern cpuop_func op_e108_40_ff; +extern cpuop_func op_e110_40_nf; +extern cpuop_func op_e110_40_ff; +extern cpuop_func op_e118_40_nf; +extern cpuop_func op_e118_40_ff; +extern cpuop_func op_e120_40_nf; +extern cpuop_func op_e120_40_ff; +extern cpuop_func op_e128_40_nf; +extern cpuop_func op_e128_40_ff; +extern cpuop_func op_e130_40_nf; +extern cpuop_func op_e130_40_ff; +extern cpuop_func op_e138_40_nf; +extern cpuop_func op_e138_40_ff; +extern cpuop_func op_e140_40_nf; +extern cpuop_func op_e140_40_ff; +extern cpuop_func op_e148_40_nf; +extern cpuop_func op_e148_40_ff; +extern cpuop_func op_e150_40_nf; +extern cpuop_func op_e150_40_ff; +extern cpuop_func op_e158_40_nf; +extern cpuop_func op_e158_40_ff; +extern cpuop_func op_e160_40_nf; +extern cpuop_func op_e160_40_ff; +extern cpuop_func op_e168_40_nf; +extern cpuop_func op_e168_40_ff; +extern cpuop_func op_e170_40_nf; +extern cpuop_func op_e170_40_ff; +extern cpuop_func op_e178_40_nf; +extern cpuop_func op_e178_40_ff; +extern cpuop_func op_e180_40_nf; +extern cpuop_func op_e180_40_ff; +extern cpuop_func op_e188_40_nf; +extern cpuop_func op_e188_40_ff; +extern cpuop_func op_e190_40_nf; +extern cpuop_func op_e190_40_ff; +extern cpuop_func op_e198_40_nf; +extern cpuop_func op_e198_40_ff; +extern cpuop_func op_e1a0_40_nf; +extern cpuop_func op_e1a0_40_ff; +extern cpuop_func op_e1a8_40_nf; +extern cpuop_func op_e1a8_40_ff; +extern cpuop_func op_e1b0_40_nf; +extern cpuop_func op_e1b0_40_ff; +extern cpuop_func op_e1b8_40_nf; +extern cpuop_func op_e1b8_40_ff; +extern cpuop_func op_e1d0_40_nf; +extern cpuop_func op_e1d0_40_ff; +extern cpuop_func op_e1d8_40_nf; +extern cpuop_func op_e1d8_40_ff; +extern cpuop_func op_e1e0_40_nf; +extern cpuop_func op_e1e0_40_ff; +extern cpuop_func op_e1e8_40_nf; +extern cpuop_func op_e1e8_40_ff; +extern cpuop_func op_e1f0_40_nf; +extern cpuop_func op_e1f0_40_ff; +extern cpuop_func op_e1f8_40_nf; +extern cpuop_func op_e1f8_40_ff; +extern cpuop_func op_e1f9_40_nf; +extern cpuop_func op_e1f9_40_ff; +extern cpuop_func op_e2d0_40_nf; +extern cpuop_func op_e2d0_40_ff; +extern cpuop_func op_e2d8_40_nf; +extern cpuop_func op_e2d8_40_ff; +extern cpuop_func op_e2e0_40_nf; +extern cpuop_func op_e2e0_40_ff; +extern cpuop_func op_e2e8_40_nf; +extern cpuop_func op_e2e8_40_ff; +extern cpuop_func op_e2f0_40_nf; +extern cpuop_func op_e2f0_40_ff; +extern cpuop_func op_e2f8_40_nf; +extern cpuop_func op_e2f8_40_ff; +extern cpuop_func op_e2f9_40_nf; +extern cpuop_func op_e2f9_40_ff; +extern cpuop_func op_e3d0_40_nf; +extern cpuop_func op_e3d0_40_ff; +extern cpuop_func op_e3d8_40_nf; +extern cpuop_func op_e3d8_40_ff; +extern cpuop_func op_e3e0_40_nf; +extern cpuop_func op_e3e0_40_ff; +extern cpuop_func op_e3e8_40_nf; +extern cpuop_func op_e3e8_40_ff; +extern cpuop_func op_e3f0_40_nf; +extern cpuop_func op_e3f0_40_ff; +extern cpuop_func op_e3f8_40_nf; +extern cpuop_func op_e3f8_40_ff; +extern cpuop_func op_e3f9_40_nf; +extern cpuop_func op_e3f9_40_ff; +extern cpuop_func op_e4d0_40_nf; +extern cpuop_func op_e4d0_40_ff; +extern cpuop_func op_e4d8_40_nf; +extern cpuop_func op_e4d8_40_ff; +extern cpuop_func op_e4e0_40_nf; +extern cpuop_func op_e4e0_40_ff; +extern cpuop_func op_e4e8_40_nf; +extern cpuop_func op_e4e8_40_ff; +extern cpuop_func op_e4f0_40_nf; +extern cpuop_func op_e4f0_40_ff; +extern cpuop_func op_e4f8_40_nf; +extern cpuop_func op_e4f8_40_ff; +extern cpuop_func op_e4f9_40_nf; +extern cpuop_func op_e4f9_40_ff; +extern cpuop_func op_e5d0_40_nf; +extern cpuop_func op_e5d0_40_ff; +extern cpuop_func op_e5d8_40_nf; +extern cpuop_func op_e5d8_40_ff; +extern cpuop_func op_e5e0_40_nf; +extern cpuop_func op_e5e0_40_ff; +extern cpuop_func op_e5e8_40_nf; +extern cpuop_func op_e5e8_40_ff; +extern cpuop_func op_e5f0_40_nf; +extern cpuop_func op_e5f0_40_ff; +extern cpuop_func op_e5f8_40_nf; +extern cpuop_func op_e5f8_40_ff; +extern cpuop_func op_e5f9_40_nf; +extern cpuop_func op_e5f9_40_ff; +extern cpuop_func op_e6d0_40_nf; +extern cpuop_func op_e6d0_40_ff; +extern cpuop_func op_e6d8_40_nf; +extern cpuop_func op_e6d8_40_ff; +extern cpuop_func op_e6e0_40_nf; +extern cpuop_func op_e6e0_40_ff; +extern cpuop_func op_e6e8_40_nf; +extern cpuop_func op_e6e8_40_ff; +extern cpuop_func op_e6f0_40_nf; +extern cpuop_func op_e6f0_40_ff; +extern cpuop_func op_e6f8_40_nf; +extern cpuop_func op_e6f8_40_ff; +extern cpuop_func op_e6f9_40_nf; +extern cpuop_func op_e6f9_40_ff; +extern cpuop_func op_e7d0_40_nf; +extern cpuop_func op_e7d0_40_ff; +extern cpuop_func op_e7d8_40_nf; +extern cpuop_func op_e7d8_40_ff; +extern cpuop_func op_e7e0_40_nf; +extern cpuop_func op_e7e0_40_ff; +extern cpuop_func op_e7e8_40_nf; +extern cpuop_func op_e7e8_40_ff; +extern cpuop_func op_e7f0_40_nf; +extern cpuop_func op_e7f0_40_ff; +extern cpuop_func op_e7f8_40_nf; +extern cpuop_func op_e7f8_40_ff; +extern cpuop_func op_e7f9_40_nf; +extern cpuop_func op_e7f9_40_ff; +extern cpuop_func op_e8c0_40_nf; +extern cpuop_func op_e8c0_40_ff; +extern cpuop_func op_e8d0_40_nf; +extern cpuop_func op_e8d0_40_ff; +extern cpuop_func op_e8e8_40_nf; +extern cpuop_func op_e8e8_40_ff; +extern cpuop_func op_e8f0_40_nf; +extern cpuop_func op_e8f0_40_ff; +extern cpuop_func op_e8f8_40_nf; +extern cpuop_func op_e8f8_40_ff; +extern cpuop_func op_e8f9_40_nf; +extern cpuop_func op_e8f9_40_ff; +extern cpuop_func op_e8fa_40_nf; +extern cpuop_func op_e8fa_40_ff; +extern cpuop_func op_e8fb_40_nf; +extern cpuop_func op_e8fb_40_ff; +extern cpuop_func op_e9c0_40_nf; +extern cpuop_func op_e9c0_40_ff; +extern cpuop_func op_e9d0_40_nf; +extern cpuop_func op_e9d0_40_ff; +extern cpuop_func op_e9e8_40_nf; +extern cpuop_func op_e9e8_40_ff; +extern cpuop_func op_e9f0_40_nf; +extern cpuop_func op_e9f0_40_ff; +extern cpuop_func op_e9f8_40_nf; +extern cpuop_func op_e9f8_40_ff; +extern cpuop_func op_e9f9_40_nf; +extern cpuop_func op_e9f9_40_ff; +extern cpuop_func op_e9fa_40_nf; +extern cpuop_func op_e9fa_40_ff; +extern cpuop_func op_e9fb_40_nf; +extern cpuop_func op_e9fb_40_ff; +extern cpuop_func op_eac0_40_nf; +extern cpuop_func op_eac0_40_ff; +extern cpuop_func op_ead0_40_nf; +extern cpuop_func op_ead0_40_ff; +extern cpuop_func op_eae8_40_nf; +extern cpuop_func op_eae8_40_ff; +extern cpuop_func op_eaf0_40_nf; +extern cpuop_func op_eaf0_40_ff; +extern cpuop_func op_eaf8_40_nf; +extern cpuop_func op_eaf8_40_ff; +extern cpuop_func op_eaf9_40_nf; +extern cpuop_func op_eaf9_40_ff; +extern cpuop_func op_ebc0_40_nf; +extern cpuop_func op_ebc0_40_ff; +extern cpuop_func op_ebd0_40_nf; +extern cpuop_func op_ebd0_40_ff; +extern cpuop_func op_ebe8_40_nf; +extern cpuop_func op_ebe8_40_ff; +extern cpuop_func op_ebf0_40_nf; +extern cpuop_func op_ebf0_40_ff; +extern cpuop_func op_ebf8_40_nf; +extern cpuop_func op_ebf8_40_ff; +extern cpuop_func op_ebf9_40_nf; +extern cpuop_func op_ebf9_40_ff; +extern cpuop_func op_ebfa_40_nf; +extern cpuop_func op_ebfa_40_ff; +extern cpuop_func op_ebfb_40_nf; +extern cpuop_func op_ebfb_40_ff; +extern cpuop_func op_ecc0_40_nf; +extern cpuop_func op_ecc0_40_ff; +extern cpuop_func op_ecd0_40_nf; +extern cpuop_func op_ecd0_40_ff; +extern cpuop_func op_ece8_40_nf; +extern cpuop_func op_ece8_40_ff; +extern cpuop_func op_ecf0_40_nf; +extern cpuop_func op_ecf0_40_ff; +extern cpuop_func op_ecf8_40_nf; +extern cpuop_func op_ecf8_40_ff; +extern cpuop_func op_ecf9_40_nf; +extern cpuop_func op_ecf9_40_ff; +extern cpuop_func op_edc0_40_nf; +extern cpuop_func op_edc0_40_ff; +extern cpuop_func op_edd0_40_nf; +extern cpuop_func op_edd0_40_ff; +extern cpuop_func op_ede8_40_nf; +extern cpuop_func op_ede8_40_ff; +extern cpuop_func op_edf0_40_nf; +extern cpuop_func op_edf0_40_ff; +extern cpuop_func op_edf8_40_nf; +extern cpuop_func op_edf8_40_ff; +extern cpuop_func op_edf9_40_nf; +extern cpuop_func op_edf9_40_ff; +extern cpuop_func op_edfa_40_nf; +extern cpuop_func op_edfa_40_ff; +extern cpuop_func op_edfb_40_nf; +extern cpuop_func op_edfb_40_ff; +extern cpuop_func op_eec0_40_nf; +extern cpuop_func op_eec0_40_ff; +extern cpuop_func op_eed0_40_nf; +extern cpuop_func op_eed0_40_ff; +extern cpuop_func op_eee8_40_nf; +extern cpuop_func op_eee8_40_ff; +extern cpuop_func op_eef0_40_nf; +extern cpuop_func op_eef0_40_ff; +extern cpuop_func op_eef8_40_nf; +extern cpuop_func op_eef8_40_ff; +extern cpuop_func op_eef9_40_nf; +extern cpuop_func op_eef9_40_ff; +extern cpuop_func op_efc0_40_nf; +extern cpuop_func op_efc0_40_ff; +extern cpuop_func op_efd0_40_nf; +extern cpuop_func op_efd0_40_ff; +extern cpuop_func op_efe8_40_nf; +extern cpuop_func op_efe8_40_ff; +extern cpuop_func op_eff0_40_nf; +extern cpuop_func op_eff0_40_ff; +extern cpuop_func op_eff8_40_nf; +extern cpuop_func op_eff8_40_ff; +extern cpuop_func op_eff9_40_nf; +extern cpuop_func op_eff9_40_ff; +extern cpuop_func op_f000_40_nf; +extern cpuop_func op_f000_40_ff; +extern cpuop_func op_f008_40_nf; +extern cpuop_func op_f008_40_ff; +extern cpuop_func op_f010_40_nf; +extern cpuop_func op_f010_40_ff; +extern cpuop_func op_f018_40_nf; +extern cpuop_func op_f018_40_ff; +extern cpuop_func op_f020_40_nf; +extern cpuop_func op_f020_40_ff; +extern cpuop_func op_f028_40_nf; +extern cpuop_func op_f028_40_ff; +extern cpuop_func op_f030_40_nf; +extern cpuop_func op_f030_40_ff; +extern cpuop_func op_f038_40_nf; +extern cpuop_func op_f038_40_ff; +extern cpuop_func op_f039_40_nf; +extern cpuop_func op_f039_40_ff; +extern cpuop_func op_f200_40_nf; +extern cpuop_func op_f200_40_ff; +extern cpuop_func op_f208_40_nf; +extern cpuop_func op_f208_40_ff; +extern cpuop_func op_f210_40_nf; +extern cpuop_func op_f210_40_ff; +extern cpuop_func op_f218_40_nf; +extern cpuop_func op_f218_40_ff; +extern cpuop_func op_f220_40_nf; +extern cpuop_func op_f220_40_ff; +extern cpuop_func op_f228_40_nf; +extern cpuop_func op_f228_40_ff; +extern cpuop_func op_f230_40_nf; +extern cpuop_func op_f230_40_ff; +extern cpuop_func op_f238_40_nf; +extern cpuop_func op_f238_40_ff; +extern cpuop_func op_f239_40_nf; +extern cpuop_func op_f239_40_ff; +extern cpuop_func op_f23a_40_nf; +extern cpuop_func op_f23a_40_ff; +extern cpuop_func op_f23b_40_nf; +extern cpuop_func op_f23b_40_ff; +extern cpuop_func op_f23c_40_nf; +extern cpuop_func op_f23c_40_ff; +extern cpuop_func op_f240_40_nf; +extern cpuop_func op_f240_40_ff; +extern cpuop_func op_f248_40_nf; +extern cpuop_func op_f248_40_ff; +extern cpuop_func op_f250_40_nf; +extern cpuop_func op_f250_40_ff; +extern cpuop_func op_f258_40_nf; +extern cpuop_func op_f258_40_ff; +extern cpuop_func op_f260_40_nf; +extern cpuop_func op_f260_40_ff; +extern cpuop_func op_f268_40_nf; +extern cpuop_func op_f268_40_ff; +extern cpuop_func op_f270_40_nf; +extern cpuop_func op_f270_40_ff; +extern cpuop_func op_f278_40_nf; +extern cpuop_func op_f278_40_ff; +extern cpuop_func op_f279_40_nf; +extern cpuop_func op_f279_40_ff; +extern cpuop_func op_f27a_40_nf; +extern cpuop_func op_f27a_40_ff; +extern cpuop_func op_f27b_40_nf; +extern cpuop_func op_f27b_40_ff; +extern cpuop_func op_f27c_40_nf; +extern cpuop_func op_f27c_40_ff; +extern cpuop_func op_f280_40_nf; +extern cpuop_func op_f280_40_ff; +extern cpuop_func op_f2c0_40_nf; +extern cpuop_func op_f2c0_40_ff; +extern cpuop_func op_f310_40_nf; +extern cpuop_func op_f310_40_ff; +extern cpuop_func op_f320_40_nf; +extern cpuop_func op_f320_40_ff; +extern cpuop_func op_f328_40_nf; +extern cpuop_func op_f328_40_ff; +extern cpuop_func op_f330_40_nf; +extern cpuop_func op_f330_40_ff; +extern cpuop_func op_f338_40_nf; +extern cpuop_func op_f338_40_ff; +extern cpuop_func op_f339_40_nf; +extern cpuop_func op_f339_40_ff; +extern cpuop_func op_f350_40_nf; +extern cpuop_func op_f350_40_ff; +extern cpuop_func op_f358_40_nf; +extern cpuop_func op_f358_40_ff; +extern cpuop_func op_f368_40_nf; +extern cpuop_func op_f368_40_ff; +extern cpuop_func op_f370_40_nf; +extern cpuop_func op_f370_40_ff; +extern cpuop_func op_f378_40_nf; +extern cpuop_func op_f378_40_ff; +extern cpuop_func op_f379_40_nf; +extern cpuop_func op_f379_40_ff; +extern cpuop_func op_f37a_40_nf; +extern cpuop_func op_f37a_40_ff; +extern cpuop_func op_f37b_40_nf; +extern cpuop_func op_f37b_40_ff; +extern cpuop_func op_f408_40_nf; +extern cpuop_func op_f408_40_ff; +extern cpuop_func op_f410_40_nf; +extern cpuop_func op_f410_40_ff; +extern cpuop_func op_f418_40_nf; +extern cpuop_func op_f418_40_ff; +extern cpuop_func op_f419_40_nf; +extern cpuop_func op_f419_40_ff; +extern cpuop_func op_f41a_40_nf; +extern cpuop_func op_f41a_40_ff; +extern cpuop_func op_f41b_40_nf; +extern cpuop_func op_f41b_40_ff; +extern cpuop_func op_f41c_40_nf; +extern cpuop_func op_f41c_40_ff; +extern cpuop_func op_f41d_40_nf; +extern cpuop_func op_f41d_40_ff; +extern cpuop_func op_f41e_40_nf; +extern cpuop_func op_f41e_40_ff; +extern cpuop_func op_f41f_40_nf; +extern cpuop_func op_f41f_40_ff; +extern cpuop_func op_f428_40_nf; +extern cpuop_func op_f428_40_ff; +extern cpuop_func op_f430_40_nf; +extern cpuop_func op_f430_40_ff; +extern cpuop_func op_f438_40_nf; +extern cpuop_func op_f438_40_ff; +extern cpuop_func op_f439_40_nf; +extern cpuop_func op_f439_40_ff; +extern cpuop_func op_f43a_40_nf; +extern cpuop_func op_f43a_40_ff; +extern cpuop_func op_f43b_40_nf; +extern cpuop_func op_f43b_40_ff; +extern cpuop_func op_f43c_40_nf; +extern cpuop_func op_f43c_40_ff; +extern cpuop_func op_f43d_40_nf; +extern cpuop_func op_f43d_40_ff; +extern cpuop_func op_f43e_40_nf; +extern cpuop_func op_f43e_40_ff; +extern cpuop_func op_f43f_40_nf; +extern cpuop_func op_f43f_40_ff; +extern cpuop_func op_f500_40_nf; +extern cpuop_func op_f500_40_ff; +extern cpuop_func op_f508_40_nf; +extern cpuop_func op_f508_40_ff; +extern cpuop_func op_f510_40_nf; +extern cpuop_func op_f510_40_ff; +extern cpuop_func op_f518_40_nf; +extern cpuop_func op_f518_40_ff; +extern cpuop_func op_f548_40_nf; +extern cpuop_func op_f548_40_ff; +extern cpuop_func op_f568_40_nf; +extern cpuop_func op_f568_40_ff; +extern cpuop_func op_f588_40_nf; +extern cpuop_func op_f588_40_ff; +extern cpuop_func op_f5c8_40_nf; +extern cpuop_func op_f5c8_40_ff; +extern cpuop_func op_f600_40_nf; +extern cpuop_func op_f600_40_ff; +extern cpuop_func op_f608_40_nf; +extern cpuop_func op_f608_40_ff; +extern cpuop_func op_f610_40_nf; +extern cpuop_func op_f610_40_ff; +extern cpuop_func op_f618_40_nf; +extern cpuop_func op_f618_40_ff; +extern cpuop_func op_f620_40_nf; +extern cpuop_func op_f620_40_ff; +extern cpuop_func op_f800_40_nf; +extern cpuop_func op_f800_40_ff; +extern cpuop_func op_003c_41_nf; +extern cpuop_func op_003c_41_ff; +extern cpuop_func op_007c_41_nf; +extern cpuop_func op_007c_41_ff; +extern cpuop_func op_023c_41_nf; +extern cpuop_func op_023c_41_ff; +extern cpuop_func op_027c_41_nf; +extern cpuop_func op_027c_41_ff; +extern cpuop_func op_0a3c_41_nf; +extern cpuop_func op_0a3c_41_ff; +extern cpuop_func op_0a7c_41_nf; +extern cpuop_func op_0a7c_41_ff; +extern cpuop_func op_0ad0_41_nf; +extern cpuop_func op_0ad0_41_ff; +extern cpuop_func op_0ad8_41_nf; +extern cpuop_func op_0ad8_41_ff; +extern cpuop_func op_0ae0_41_nf; +extern cpuop_func op_0ae0_41_ff; +extern cpuop_func op_0ae8_41_nf; +extern cpuop_func op_0ae8_41_ff; +extern cpuop_func op_0af0_41_nf; +extern cpuop_func op_0af0_41_ff; +extern cpuop_func op_0af8_41_nf; +extern cpuop_func op_0af8_41_ff; +extern cpuop_func op_0af9_41_nf; +extern cpuop_func op_0af9_41_ff; +extern cpuop_func op_0cd0_41_nf; +extern cpuop_func op_0cd0_41_ff; +extern cpuop_func op_0cd8_41_nf; +extern cpuop_func op_0cd8_41_ff; +extern cpuop_func op_0ce0_41_nf; +extern cpuop_func op_0ce0_41_ff; +extern cpuop_func op_0ce8_41_nf; +extern cpuop_func op_0ce8_41_ff; +extern cpuop_func op_0cf0_41_nf; +extern cpuop_func op_0cf0_41_ff; +extern cpuop_func op_0cf8_41_nf; +extern cpuop_func op_0cf8_41_ff; +extern cpuop_func op_0cf9_41_nf; +extern cpuop_func op_0cf9_41_ff; +extern cpuop_func op_0cfc_41_nf; +extern cpuop_func op_0cfc_41_ff; +extern cpuop_func op_0e10_41_nf; +extern cpuop_func op_0e10_41_ff; +extern cpuop_func op_0e18_41_nf; +extern cpuop_func op_0e18_41_ff; +extern cpuop_func op_0e20_41_nf; +extern cpuop_func op_0e20_41_ff; +extern cpuop_func op_0e28_41_nf; +extern cpuop_func op_0e28_41_ff; +extern cpuop_func op_0e30_41_nf; +extern cpuop_func op_0e30_41_ff; +extern cpuop_func op_0e38_41_nf; +extern cpuop_func op_0e38_41_ff; +extern cpuop_func op_0e39_41_nf; +extern cpuop_func op_0e39_41_ff; +extern cpuop_func op_0e50_41_nf; +extern cpuop_func op_0e50_41_ff; +extern cpuop_func op_0e58_41_nf; +extern cpuop_func op_0e58_41_ff; +extern cpuop_func op_0e60_41_nf; +extern cpuop_func op_0e60_41_ff; +extern cpuop_func op_0e68_41_nf; +extern cpuop_func op_0e68_41_ff; +extern cpuop_func op_0e70_41_nf; +extern cpuop_func op_0e70_41_ff; +extern cpuop_func op_0e78_41_nf; +extern cpuop_func op_0e78_41_ff; +extern cpuop_func op_0e79_41_nf; +extern cpuop_func op_0e79_41_ff; +extern cpuop_func op_0e90_41_nf; +extern cpuop_func op_0e90_41_ff; +extern cpuop_func op_0e98_41_nf; +extern cpuop_func op_0e98_41_ff; +extern cpuop_func op_0ea0_41_nf; +extern cpuop_func op_0ea0_41_ff; +extern cpuop_func op_0ea8_41_nf; +extern cpuop_func op_0ea8_41_ff; +extern cpuop_func op_0eb0_41_nf; +extern cpuop_func op_0eb0_41_ff; +extern cpuop_func op_0eb8_41_nf; +extern cpuop_func op_0eb8_41_ff; +extern cpuop_func op_0eb9_41_nf; +extern cpuop_func op_0eb9_41_ff; +extern cpuop_func op_0ed0_41_nf; +extern cpuop_func op_0ed0_41_ff; +extern cpuop_func op_0ed8_41_nf; +extern cpuop_func op_0ed8_41_ff; +extern cpuop_func op_0ee0_41_nf; +extern cpuop_func op_0ee0_41_ff; +extern cpuop_func op_0ee8_41_nf; +extern cpuop_func op_0ee8_41_ff; +extern cpuop_func op_0ef0_41_nf; +extern cpuop_func op_0ef0_41_ff; +extern cpuop_func op_0ef8_41_nf; +extern cpuop_func op_0ef8_41_ff; +extern cpuop_func op_0ef9_41_nf; +extern cpuop_func op_0ef9_41_ff; +extern cpuop_func op_0efc_41_nf; +extern cpuop_func op_0efc_41_ff; +extern cpuop_func op_4808_41_nf; +extern cpuop_func op_4808_41_ff; +extern cpuop_func op_4e50_41_nf; +extern cpuop_func op_4e50_41_ff; +extern cpuop_func op_4e60_41_nf; +extern cpuop_func op_4e60_41_ff; +extern cpuop_func op_4e71_41_nf; +extern cpuop_func op_4e71_41_ff; +extern cpuop_func op_4e72_41_nf; +extern cpuop_func op_4e72_41_ff; +extern cpuop_func op_4e73_41_nf; +extern cpuop_func op_4e73_41_ff; +extern cpuop_func op_4e77_41_nf; +extern cpuop_func op_4e77_41_ff; +extern cpuop_func op_4e7b_41_nf; +extern cpuop_func op_4e7b_41_ff; +extern cpuop_func op_f500_41_nf; +extern cpuop_func op_f500_41_ff; +extern cpuop_func op_f508_41_nf; +extern cpuop_func op_f508_41_ff; +extern cpuop_func op_f510_41_nf; +extern cpuop_func op_f510_41_ff; +extern cpuop_func op_f518_41_nf; +extern cpuop_func op_f518_41_ff; +extern cpuop_func op_f548_41_nf; +extern cpuop_func op_f548_41_ff; +extern cpuop_func op_f568_41_nf; +extern cpuop_func op_f568_41_ff; +extern cpuop_func op_003c_42_nf; +extern cpuop_func op_003c_42_ff; +extern cpuop_func op_007c_42_nf; +extern cpuop_func op_007c_42_ff; +extern cpuop_func op_023c_42_nf; +extern cpuop_func op_023c_42_ff; +extern cpuop_func op_027c_42_nf; +extern cpuop_func op_027c_42_ff; +extern cpuop_func op_0a3c_42_nf; +extern cpuop_func op_0a3c_42_ff; +extern cpuop_func op_0a7c_42_nf; +extern cpuop_func op_0a7c_42_ff; +extern cpuop_func op_0ad0_42_nf; +extern cpuop_func op_0ad0_42_ff; +extern cpuop_func op_0ad8_42_nf; +extern cpuop_func op_0ad8_42_ff; +extern cpuop_func op_0ae0_42_nf; +extern cpuop_func op_0ae0_42_ff; +extern cpuop_func op_0ae8_42_nf; +extern cpuop_func op_0ae8_42_ff; +extern cpuop_func op_0af0_42_nf; +extern cpuop_func op_0af0_42_ff; +extern cpuop_func op_0af8_42_nf; +extern cpuop_func op_0af8_42_ff; +extern cpuop_func op_0af9_42_nf; +extern cpuop_func op_0af9_42_ff; +extern cpuop_func op_0cd0_42_nf; +extern cpuop_func op_0cd0_42_ff; +extern cpuop_func op_0cd8_42_nf; +extern cpuop_func op_0cd8_42_ff; +extern cpuop_func op_0ce0_42_nf; +extern cpuop_func op_0ce0_42_ff; +extern cpuop_func op_0ce8_42_nf; +extern cpuop_func op_0ce8_42_ff; +extern cpuop_func op_0cf0_42_nf; +extern cpuop_func op_0cf0_42_ff; +extern cpuop_func op_0cf8_42_nf; +extern cpuop_func op_0cf8_42_ff; +extern cpuop_func op_0cf9_42_nf; +extern cpuop_func op_0cf9_42_ff; +extern cpuop_func op_0cfc_42_nf; +extern cpuop_func op_0cfc_42_ff; +extern cpuop_func op_0e10_42_nf; +extern cpuop_func op_0e10_42_ff; +extern cpuop_func op_0e18_42_nf; +extern cpuop_func op_0e18_42_ff; +extern cpuop_func op_0e20_42_nf; +extern cpuop_func op_0e20_42_ff; +extern cpuop_func op_0e28_42_nf; +extern cpuop_func op_0e28_42_ff; +extern cpuop_func op_0e30_42_nf; +extern cpuop_func op_0e30_42_ff; +extern cpuop_func op_0e38_42_nf; +extern cpuop_func op_0e38_42_ff; +extern cpuop_func op_0e39_42_nf; +extern cpuop_func op_0e39_42_ff; +extern cpuop_func op_0e50_42_nf; +extern cpuop_func op_0e50_42_ff; +extern cpuop_func op_0e58_42_nf; +extern cpuop_func op_0e58_42_ff; +extern cpuop_func op_0e60_42_nf; +extern cpuop_func op_0e60_42_ff; +extern cpuop_func op_0e68_42_nf; +extern cpuop_func op_0e68_42_ff; +extern cpuop_func op_0e70_42_nf; +extern cpuop_func op_0e70_42_ff; +extern cpuop_func op_0e78_42_nf; +extern cpuop_func op_0e78_42_ff; +extern cpuop_func op_0e79_42_nf; +extern cpuop_func op_0e79_42_ff; +extern cpuop_func op_0e90_42_nf; +extern cpuop_func op_0e90_42_ff; +extern cpuop_func op_0e98_42_nf; +extern cpuop_func op_0e98_42_ff; +extern cpuop_func op_0ea0_42_nf; +extern cpuop_func op_0ea0_42_ff; +extern cpuop_func op_0ea8_42_nf; +extern cpuop_func op_0ea8_42_ff; +extern cpuop_func op_0eb0_42_nf; +extern cpuop_func op_0eb0_42_ff; +extern cpuop_func op_0eb8_42_nf; +extern cpuop_func op_0eb8_42_ff; +extern cpuop_func op_0eb9_42_nf; +extern cpuop_func op_0eb9_42_ff; +extern cpuop_func op_0ed0_42_nf; +extern cpuop_func op_0ed0_42_ff; +extern cpuop_func op_0ed8_42_nf; +extern cpuop_func op_0ed8_42_ff; +extern cpuop_func op_0ee0_42_nf; +extern cpuop_func op_0ee0_42_ff; +extern cpuop_func op_0ee8_42_nf; +extern cpuop_func op_0ee8_42_ff; +extern cpuop_func op_0ef0_42_nf; +extern cpuop_func op_0ef0_42_ff; +extern cpuop_func op_0ef8_42_nf; +extern cpuop_func op_0ef8_42_ff; +extern cpuop_func op_0ef9_42_nf; +extern cpuop_func op_0ef9_42_ff; +extern cpuop_func op_0efc_42_nf; +extern cpuop_func op_0efc_42_ff; +extern cpuop_func op_4800_42_nf; +extern cpuop_func op_4800_42_ff; +extern cpuop_func op_4810_42_nf; +extern cpuop_func op_4810_42_ff; +extern cpuop_func op_4818_42_nf; +extern cpuop_func op_4818_42_ff; +extern cpuop_func op_4820_42_nf; +extern cpuop_func op_4820_42_ff; +extern cpuop_func op_4828_42_nf; +extern cpuop_func op_4828_42_ff; +extern cpuop_func op_4830_42_nf; +extern cpuop_func op_4830_42_ff; +extern cpuop_func op_4838_42_nf; +extern cpuop_func op_4838_42_ff; +extern cpuop_func op_4839_42_nf; +extern cpuop_func op_4839_42_ff; +extern cpuop_func op_4890_42_nf; +extern cpuop_func op_4890_42_ff; +extern cpuop_func op_48a0_42_nf; +extern cpuop_func op_48a0_42_ff; +extern cpuop_func op_48a8_42_nf; +extern cpuop_func op_48a8_42_ff; +extern cpuop_func op_48b0_42_nf; +extern cpuop_func op_48b0_42_ff; +extern cpuop_func op_48b8_42_nf; +extern cpuop_func op_48b8_42_ff; +extern cpuop_func op_48b9_42_nf; +extern cpuop_func op_48b9_42_ff; +extern cpuop_func op_48d0_42_nf; +extern cpuop_func op_48d0_42_ff; +extern cpuop_func op_48e0_42_nf; +extern cpuop_func op_48e0_42_ff; +extern cpuop_func op_48e8_42_nf; +extern cpuop_func op_48e8_42_ff; +extern cpuop_func op_48f0_42_nf; +extern cpuop_func op_48f0_42_ff; +extern cpuop_func op_48f8_42_nf; +extern cpuop_func op_48f8_42_ff; +extern cpuop_func op_48f9_42_nf; +extern cpuop_func op_48f9_42_ff; +extern cpuop_func op_4c90_42_nf; +extern cpuop_func op_4c90_42_ff; +extern cpuop_func op_4c98_42_nf; +extern cpuop_func op_4c98_42_ff; +extern cpuop_func op_4ca8_42_nf; +extern cpuop_func op_4ca8_42_ff; +extern cpuop_func op_4cb0_42_nf; +extern cpuop_func op_4cb0_42_ff; +extern cpuop_func op_4cb8_42_nf; +extern cpuop_func op_4cb8_42_ff; +extern cpuop_func op_4cb9_42_nf; +extern cpuop_func op_4cb9_42_ff; +extern cpuop_func op_4cba_42_nf; +extern cpuop_func op_4cba_42_ff; +extern cpuop_func op_4cbb_42_nf; +extern cpuop_func op_4cbb_42_ff; +extern cpuop_func op_4cd0_42_nf; +extern cpuop_func op_4cd0_42_ff; +extern cpuop_func op_4cd8_42_nf; +extern cpuop_func op_4cd8_42_ff; +extern cpuop_func op_4ce8_42_nf; +extern cpuop_func op_4ce8_42_ff; +extern cpuop_func op_4cf0_42_nf; +extern cpuop_func op_4cf0_42_ff; +extern cpuop_func op_4cf8_42_nf; +extern cpuop_func op_4cf8_42_ff; +extern cpuop_func op_4cf9_42_nf; +extern cpuop_func op_4cf9_42_ff; +extern cpuop_func op_4cfa_42_nf; +extern cpuop_func op_4cfa_42_ff; +extern cpuop_func op_4cfb_42_nf; +extern cpuop_func op_4cfb_42_ff; +extern cpuop_func op_4e60_42_nf; +extern cpuop_func op_4e60_42_ff; +extern cpuop_func op_4e71_42_nf; +extern cpuop_func op_4e71_42_ff; +extern cpuop_func op_4e72_42_nf; +extern cpuop_func op_4e72_42_ff; +extern cpuop_func op_4e73_42_nf; +extern cpuop_func op_4e73_42_ff; +extern cpuop_func op_4e74_42_nf; +extern cpuop_func op_4e74_42_ff; +extern cpuop_func op_4e75_42_nf; +extern cpuop_func op_4e75_42_ff; +extern cpuop_func op_4e77_42_nf; +extern cpuop_func op_4e77_42_ff; +extern cpuop_func op_4e7b_42_nf; +extern cpuop_func op_4e7b_42_ff; +extern cpuop_func op_4e90_42_nf; +extern cpuop_func op_4e90_42_ff; +extern cpuop_func op_4ea8_42_nf; +extern cpuop_func op_4ea8_42_ff; +extern cpuop_func op_4eb0_42_nf; +extern cpuop_func op_4eb0_42_ff; +extern cpuop_func op_4eb8_42_nf; +extern cpuop_func op_4eb8_42_ff; +extern cpuop_func op_4eb9_42_nf; +extern cpuop_func op_4eb9_42_ff; +extern cpuop_func op_4eba_42_nf; +extern cpuop_func op_4eba_42_ff; +extern cpuop_func op_4ebb_42_nf; +extern cpuop_func op_4ebb_42_ff; +extern cpuop_func op_50c8_42_nf; +extern cpuop_func op_50c8_42_ff; +extern cpuop_func op_51c8_42_nf; +extern cpuop_func op_51c8_42_ff; +extern cpuop_func op_52c8_42_nf; +extern cpuop_func op_52c8_42_ff; +extern cpuop_func op_53c8_42_nf; +extern cpuop_func op_53c8_42_ff; +extern cpuop_func op_54c8_42_nf; +extern cpuop_func op_54c8_42_ff; +extern cpuop_func op_55c8_42_nf; +extern cpuop_func op_55c8_42_ff; +extern cpuop_func op_56c8_42_nf; +extern cpuop_func op_56c8_42_ff; +extern cpuop_func op_57c8_42_nf; +extern cpuop_func op_57c8_42_ff; +extern cpuop_func op_58c8_42_nf; +extern cpuop_func op_58c8_42_ff; +extern cpuop_func op_59c8_42_nf; +extern cpuop_func op_59c8_42_ff; +extern cpuop_func op_5ac8_42_nf; +extern cpuop_func op_5ac8_42_ff; +extern cpuop_func op_5bc8_42_nf; +extern cpuop_func op_5bc8_42_ff; +extern cpuop_func op_5cc8_42_nf; +extern cpuop_func op_5cc8_42_ff; +extern cpuop_func op_5dc8_42_nf; +extern cpuop_func op_5dc8_42_ff; +extern cpuop_func op_5ec8_42_nf; +extern cpuop_func op_5ec8_42_ff; +extern cpuop_func op_5fc8_42_nf; +extern cpuop_func op_5fc8_42_ff; +extern cpuop_func op_6000_42_nf; +extern cpuop_func op_6000_42_ff; +extern cpuop_func op_6001_42_nf; +extern cpuop_func op_6001_42_ff; +extern cpuop_func op_60ff_42_nf; +extern cpuop_func op_60ff_42_ff; +extern cpuop_func op_6100_42_nf; +extern cpuop_func op_6100_42_ff; +extern cpuop_func op_6101_42_nf; +extern cpuop_func op_6101_42_ff; +extern cpuop_func op_61ff_42_nf; +extern cpuop_func op_61ff_42_ff; +extern cpuop_func op_6200_42_nf; +extern cpuop_func op_6200_42_ff; +extern cpuop_func op_6201_42_nf; +extern cpuop_func op_6201_42_ff; +extern cpuop_func op_62ff_42_nf; +extern cpuop_func op_62ff_42_ff; +extern cpuop_func op_6300_42_nf; +extern cpuop_func op_6300_42_ff; +extern cpuop_func op_6301_42_nf; +extern cpuop_func op_6301_42_ff; +extern cpuop_func op_63ff_42_nf; +extern cpuop_func op_63ff_42_ff; +extern cpuop_func op_6400_42_nf; +extern cpuop_func op_6400_42_ff; +extern cpuop_func op_6401_42_nf; +extern cpuop_func op_6401_42_ff; +extern cpuop_func op_64ff_42_nf; +extern cpuop_func op_64ff_42_ff; +extern cpuop_func op_6500_42_nf; +extern cpuop_func op_6500_42_ff; +extern cpuop_func op_6501_42_nf; +extern cpuop_func op_6501_42_ff; +extern cpuop_func op_65ff_42_nf; +extern cpuop_func op_65ff_42_ff; +extern cpuop_func op_6600_42_nf; +extern cpuop_func op_6600_42_ff; +extern cpuop_func op_6601_42_nf; +extern cpuop_func op_6601_42_ff; +extern cpuop_func op_66ff_42_nf; +extern cpuop_func op_66ff_42_ff; +extern cpuop_func op_6700_42_nf; +extern cpuop_func op_6700_42_ff; +extern cpuop_func op_6701_42_nf; +extern cpuop_func op_6701_42_ff; +extern cpuop_func op_67ff_42_nf; +extern cpuop_func op_67ff_42_ff; +extern cpuop_func op_6800_42_nf; +extern cpuop_func op_6800_42_ff; +extern cpuop_func op_6801_42_nf; +extern cpuop_func op_6801_42_ff; +extern cpuop_func op_68ff_42_nf; +extern cpuop_func op_68ff_42_ff; +extern cpuop_func op_6900_42_nf; +extern cpuop_func op_6900_42_ff; +extern cpuop_func op_6901_42_nf; +extern cpuop_func op_6901_42_ff; +extern cpuop_func op_69ff_42_nf; +extern cpuop_func op_69ff_42_ff; +extern cpuop_func op_6a00_42_nf; +extern cpuop_func op_6a00_42_ff; +extern cpuop_func op_6a01_42_nf; +extern cpuop_func op_6a01_42_ff; +extern cpuop_func op_6aff_42_nf; +extern cpuop_func op_6aff_42_ff; +extern cpuop_func op_6b00_42_nf; +extern cpuop_func op_6b00_42_ff; +extern cpuop_func op_6b01_42_nf; +extern cpuop_func op_6b01_42_ff; +extern cpuop_func op_6bff_42_nf; +extern cpuop_func op_6bff_42_ff; +extern cpuop_func op_6c00_42_nf; +extern cpuop_func op_6c00_42_ff; +extern cpuop_func op_6c01_42_nf; +extern cpuop_func op_6c01_42_ff; +extern cpuop_func op_6cff_42_nf; +extern cpuop_func op_6cff_42_ff; +extern cpuop_func op_6d00_42_nf; +extern cpuop_func op_6d00_42_ff; +extern cpuop_func op_6d01_42_nf; +extern cpuop_func op_6d01_42_ff; +extern cpuop_func op_6dff_42_nf; +extern cpuop_func op_6dff_42_ff; +extern cpuop_func op_6e00_42_nf; +extern cpuop_func op_6e00_42_ff; +extern cpuop_func op_6e01_42_nf; +extern cpuop_func op_6e01_42_ff; +extern cpuop_func op_6eff_42_nf; +extern cpuop_func op_6eff_42_ff; +extern cpuop_func op_6f00_42_nf; +extern cpuop_func op_6f00_42_ff; +extern cpuop_func op_6f01_42_nf; +extern cpuop_func op_6f01_42_ff; +extern cpuop_func op_6fff_42_nf; +extern cpuop_func op_6fff_42_ff; +extern cpuop_func op_8100_42_nf; +extern cpuop_func op_8100_42_ff; +extern cpuop_func op_8108_42_nf; +extern cpuop_func op_8108_42_ff; +extern cpuop_func op_c100_42_nf; +extern cpuop_func op_c100_42_ff; +extern cpuop_func op_c108_42_nf; +extern cpuop_func op_c108_42_ff; +extern cpuop_func op_003c_43_nf; +extern cpuop_func op_003c_43_ff; +extern cpuop_func op_007c_43_nf; +extern cpuop_func op_007c_43_ff; +extern cpuop_func op_023c_43_nf; +extern cpuop_func op_023c_43_ff; +extern cpuop_func op_027c_43_nf; +extern cpuop_func op_027c_43_ff; +extern cpuop_func op_0a3c_43_nf; +extern cpuop_func op_0a3c_43_ff; +extern cpuop_func op_0a7c_43_nf; +extern cpuop_func op_0a7c_43_ff; +extern cpuop_func op_4e72_43_nf; +extern cpuop_func op_4e72_43_ff; +extern cpuop_func op_4e73_43_nf; +extern cpuop_func op_4e73_43_ff; +extern cpuop_func op_4e77_43_nf; +extern cpuop_func op_4e77_43_ff; +extern cpuop_func op_0030_44_nf; +extern cpuop_func op_0030_44_ff; +extern cpuop_func op_003c_44_nf; +extern cpuop_func op_003c_44_ff; +extern cpuop_func op_0070_44_nf; +extern cpuop_func op_0070_44_ff; +extern cpuop_func op_007c_44_nf; +extern cpuop_func op_007c_44_ff; +extern cpuop_func op_00b0_44_nf; +extern cpuop_func op_00b0_44_ff; +extern cpuop_func op_0130_44_nf; +extern cpuop_func op_0130_44_ff; +extern cpuop_func op_013b_44_nf; +extern cpuop_func op_013b_44_ff; +extern cpuop_func op_0140_44_nf; +extern cpuop_func op_0140_44_ff; +extern cpuop_func op_0170_44_nf; +extern cpuop_func op_0170_44_ff; +extern cpuop_func op_0180_44_nf; +extern cpuop_func op_0180_44_ff; +extern cpuop_func op_01b0_44_nf; +extern cpuop_func op_01b0_44_ff; +extern cpuop_func op_01c0_44_nf; +extern cpuop_func op_01c0_44_ff; +extern cpuop_func op_01f0_44_nf; +extern cpuop_func op_01f0_44_ff; +extern cpuop_func op_0230_44_nf; +extern cpuop_func op_0230_44_ff; +extern cpuop_func op_023c_44_nf; +extern cpuop_func op_023c_44_ff; +extern cpuop_func op_0270_44_nf; +extern cpuop_func op_0270_44_ff; +extern cpuop_func op_027c_44_nf; +extern cpuop_func op_027c_44_ff; +extern cpuop_func op_02b0_44_nf; +extern cpuop_func op_02b0_44_ff; +extern cpuop_func op_0430_44_nf; +extern cpuop_func op_0430_44_ff; +extern cpuop_func op_0470_44_nf; +extern cpuop_func op_0470_44_ff; +extern cpuop_func op_04b0_44_nf; +extern cpuop_func op_04b0_44_ff; +extern cpuop_func op_0630_44_nf; +extern cpuop_func op_0630_44_ff; +extern cpuop_func op_0670_44_nf; +extern cpuop_func op_0670_44_ff; +extern cpuop_func op_06b0_44_nf; +extern cpuop_func op_06b0_44_ff; +extern cpuop_func op_0830_44_nf; +extern cpuop_func op_0830_44_ff; +extern cpuop_func op_083b_44_nf; +extern cpuop_func op_083b_44_ff; +extern cpuop_func op_0840_44_nf; +extern cpuop_func op_0840_44_ff; +extern cpuop_func op_0870_44_nf; +extern cpuop_func op_0870_44_ff; +extern cpuop_func op_0880_44_nf; +extern cpuop_func op_0880_44_ff; +extern cpuop_func op_08b0_44_nf; +extern cpuop_func op_08b0_44_ff; +extern cpuop_func op_08c0_44_nf; +extern cpuop_func op_08c0_44_ff; +extern cpuop_func op_08f0_44_nf; +extern cpuop_func op_08f0_44_ff; +extern cpuop_func op_0a30_44_nf; +extern cpuop_func op_0a30_44_ff; +extern cpuop_func op_0a3c_44_nf; +extern cpuop_func op_0a3c_44_ff; +extern cpuop_func op_0a70_44_nf; +extern cpuop_func op_0a70_44_ff; +extern cpuop_func op_0a7c_44_nf; +extern cpuop_func op_0a7c_44_ff; +extern cpuop_func op_0ab0_44_nf; +extern cpuop_func op_0ab0_44_ff; +extern cpuop_func op_0c30_44_nf; +extern cpuop_func op_0c30_44_ff; +extern cpuop_func op_0c70_44_nf; +extern cpuop_func op_0c70_44_ff; +extern cpuop_func op_0cb0_44_nf; +extern cpuop_func op_0cb0_44_ff; +extern cpuop_func op_0e30_44_nf; +extern cpuop_func op_0e30_44_ff; +extern cpuop_func op_0e70_44_nf; +extern cpuop_func op_0e70_44_ff; +extern cpuop_func op_0eb0_44_nf; +extern cpuop_func op_0eb0_44_ff; +extern cpuop_func op_1030_44_nf; +extern cpuop_func op_1030_44_ff; +extern cpuop_func op_103b_44_nf; +extern cpuop_func op_103b_44_ff; +extern cpuop_func op_10b0_44_nf; +extern cpuop_func op_10b0_44_ff; +extern cpuop_func op_10bb_44_nf; +extern cpuop_func op_10bb_44_ff; +extern cpuop_func op_10f0_44_nf; +extern cpuop_func op_10f0_44_ff; +extern cpuop_func op_10fb_44_nf; +extern cpuop_func op_10fb_44_ff; +extern cpuop_func op_1130_44_nf; +extern cpuop_func op_1130_44_ff; +extern cpuop_func op_113b_44_nf; +extern cpuop_func op_113b_44_ff; +extern cpuop_func op_1170_44_nf; +extern cpuop_func op_1170_44_ff; +extern cpuop_func op_117b_44_nf; +extern cpuop_func op_117b_44_ff; +extern cpuop_func op_1180_44_nf; +extern cpuop_func op_1180_44_ff; +extern cpuop_func op_1190_44_nf; +extern cpuop_func op_1190_44_ff; +extern cpuop_func op_1198_44_nf; +extern cpuop_func op_1198_44_ff; +extern cpuop_func op_11a0_44_nf; +extern cpuop_func op_11a0_44_ff; +extern cpuop_func op_11a8_44_nf; +extern cpuop_func op_11a8_44_ff; +extern cpuop_func op_11b0_44_nf; +extern cpuop_func op_11b0_44_ff; +extern cpuop_func op_11b8_44_nf; +extern cpuop_func op_11b8_44_ff; +extern cpuop_func op_11b9_44_nf; +extern cpuop_func op_11b9_44_ff; +extern cpuop_func op_11ba_44_nf; +extern cpuop_func op_11ba_44_ff; +extern cpuop_func op_11bb_44_nf; +extern cpuop_func op_11bb_44_ff; +extern cpuop_func op_11bc_44_nf; +extern cpuop_func op_11bc_44_ff; +extern cpuop_func op_11f0_44_nf; +extern cpuop_func op_11f0_44_ff; +extern cpuop_func op_11fb_44_nf; +extern cpuop_func op_11fb_44_ff; +extern cpuop_func op_13f0_44_nf; +extern cpuop_func op_13f0_44_ff; +extern cpuop_func op_13fb_44_nf; +extern cpuop_func op_13fb_44_ff; +extern cpuop_func op_2030_44_nf; +extern cpuop_func op_2030_44_ff; +extern cpuop_func op_203b_44_nf; +extern cpuop_func op_203b_44_ff; +extern cpuop_func op_2070_44_nf; +extern cpuop_func op_2070_44_ff; +extern cpuop_func op_207b_44_nf; +extern cpuop_func op_207b_44_ff; +extern cpuop_func op_20b0_44_nf; +extern cpuop_func op_20b0_44_ff; +extern cpuop_func op_20bb_44_nf; +extern cpuop_func op_20bb_44_ff; +extern cpuop_func op_20f0_44_nf; +extern cpuop_func op_20f0_44_ff; +extern cpuop_func op_20fb_44_nf; +extern cpuop_func op_20fb_44_ff; +extern cpuop_func op_2130_44_nf; +extern cpuop_func op_2130_44_ff; +extern cpuop_func op_213b_44_nf; +extern cpuop_func op_213b_44_ff; +extern cpuop_func op_2170_44_nf; +extern cpuop_func op_2170_44_ff; +extern cpuop_func op_217b_44_nf; +extern cpuop_func op_217b_44_ff; +extern cpuop_func op_2180_44_nf; +extern cpuop_func op_2180_44_ff; +extern cpuop_func op_2188_44_nf; +extern cpuop_func op_2188_44_ff; +extern cpuop_func op_2190_44_nf; +extern cpuop_func op_2190_44_ff; +extern cpuop_func op_2198_44_nf; +extern cpuop_func op_2198_44_ff; +extern cpuop_func op_21a0_44_nf; +extern cpuop_func op_21a0_44_ff; +extern cpuop_func op_21a8_44_nf; +extern cpuop_func op_21a8_44_ff; +extern cpuop_func op_21b0_44_nf; +extern cpuop_func op_21b0_44_ff; +extern cpuop_func op_21b8_44_nf; +extern cpuop_func op_21b8_44_ff; +extern cpuop_func op_21b9_44_nf; +extern cpuop_func op_21b9_44_ff; +extern cpuop_func op_21ba_44_nf; +extern cpuop_func op_21ba_44_ff; +extern cpuop_func op_21bb_44_nf; +extern cpuop_func op_21bb_44_ff; +extern cpuop_func op_21bc_44_nf; +extern cpuop_func op_21bc_44_ff; +extern cpuop_func op_21f0_44_nf; +extern cpuop_func op_21f0_44_ff; +extern cpuop_func op_21fb_44_nf; +extern cpuop_func op_21fb_44_ff; +extern cpuop_func op_23f0_44_nf; +extern cpuop_func op_23f0_44_ff; +extern cpuop_func op_23fb_44_nf; +extern cpuop_func op_23fb_44_ff; +extern cpuop_func op_3030_44_nf; +extern cpuop_func op_3030_44_ff; +extern cpuop_func op_303b_44_nf; +extern cpuop_func op_303b_44_ff; +extern cpuop_func op_3070_44_nf; +extern cpuop_func op_3070_44_ff; +extern cpuop_func op_307b_44_nf; +extern cpuop_func op_307b_44_ff; +extern cpuop_func op_30b0_44_nf; +extern cpuop_func op_30b0_44_ff; +extern cpuop_func op_30bb_44_nf; +extern cpuop_func op_30bb_44_ff; +extern cpuop_func op_30f0_44_nf; +extern cpuop_func op_30f0_44_ff; +extern cpuop_func op_30fb_44_nf; +extern cpuop_func op_30fb_44_ff; +extern cpuop_func op_3130_44_nf; +extern cpuop_func op_3130_44_ff; +extern cpuop_func op_313b_44_nf; +extern cpuop_func op_313b_44_ff; +extern cpuop_func op_3170_44_nf; +extern cpuop_func op_3170_44_ff; +extern cpuop_func op_317b_44_nf; +extern cpuop_func op_317b_44_ff; +extern cpuop_func op_3180_44_nf; +extern cpuop_func op_3180_44_ff; +extern cpuop_func op_3188_44_nf; +extern cpuop_func op_3188_44_ff; +extern cpuop_func op_3190_44_nf; +extern cpuop_func op_3190_44_ff; +extern cpuop_func op_3198_44_nf; +extern cpuop_func op_3198_44_ff; +extern cpuop_func op_31a0_44_nf; +extern cpuop_func op_31a0_44_ff; +extern cpuop_func op_31a8_44_nf; +extern cpuop_func op_31a8_44_ff; +extern cpuop_func op_31b0_44_nf; +extern cpuop_func op_31b0_44_ff; +extern cpuop_func op_31b8_44_nf; +extern cpuop_func op_31b8_44_ff; +extern cpuop_func op_31b9_44_nf; +extern cpuop_func op_31b9_44_ff; +extern cpuop_func op_31ba_44_nf; +extern cpuop_func op_31ba_44_ff; +extern cpuop_func op_31bb_44_nf; +extern cpuop_func op_31bb_44_ff; +extern cpuop_func op_31bc_44_nf; +extern cpuop_func op_31bc_44_ff; +extern cpuop_func op_31f0_44_nf; +extern cpuop_func op_31f0_44_ff; +extern cpuop_func op_31fb_44_nf; +extern cpuop_func op_31fb_44_ff; +extern cpuop_func op_33f0_44_nf; +extern cpuop_func op_33f0_44_ff; +extern cpuop_func op_33fb_44_nf; +extern cpuop_func op_33fb_44_ff; +extern cpuop_func op_4030_44_nf; +extern cpuop_func op_4030_44_ff; +extern cpuop_func op_4070_44_nf; +extern cpuop_func op_4070_44_ff; +extern cpuop_func op_40b0_44_nf; +extern cpuop_func op_40b0_44_ff; +extern cpuop_func op_40f0_44_nf; +extern cpuop_func op_40f0_44_ff; +extern cpuop_func op_41b0_44_nf; +extern cpuop_func op_41b0_44_ff; +extern cpuop_func op_41bb_44_nf; +extern cpuop_func op_41bb_44_ff; +extern cpuop_func op_41f0_44_nf; +extern cpuop_func op_41f0_44_ff; +extern cpuop_func op_41fb_44_nf; +extern cpuop_func op_41fb_44_ff; +extern cpuop_func op_4230_44_nf; +extern cpuop_func op_4230_44_ff; +extern cpuop_func op_4270_44_nf; +extern cpuop_func op_4270_44_ff; +extern cpuop_func op_42b0_44_nf; +extern cpuop_func op_42b0_44_ff; +extern cpuop_func op_42f0_44_nf; +extern cpuop_func op_42f0_44_ff; +extern cpuop_func op_4430_44_nf; +extern cpuop_func op_4430_44_ff; +extern cpuop_func op_4470_44_nf; +extern cpuop_func op_4470_44_ff; +extern cpuop_func op_44b0_44_nf; +extern cpuop_func op_44b0_44_ff; +extern cpuop_func op_44f0_44_nf; +extern cpuop_func op_44f0_44_ff; +extern cpuop_func op_44fb_44_nf; +extern cpuop_func op_44fb_44_ff; +extern cpuop_func op_4630_44_nf; +extern cpuop_func op_4630_44_ff; +extern cpuop_func op_4670_44_nf; +extern cpuop_func op_4670_44_ff; +extern cpuop_func op_46b0_44_nf; +extern cpuop_func op_46b0_44_ff; +extern cpuop_func op_46f0_44_nf; +extern cpuop_func op_46f0_44_ff; +extern cpuop_func op_46fb_44_nf; +extern cpuop_func op_46fb_44_ff; +extern cpuop_func op_4800_44_nf; +extern cpuop_func op_4800_44_ff; +extern cpuop_func op_4810_44_nf; +extern cpuop_func op_4810_44_ff; +extern cpuop_func op_4818_44_nf; +extern cpuop_func op_4818_44_ff; +extern cpuop_func op_4820_44_nf; +extern cpuop_func op_4820_44_ff; +extern cpuop_func op_4828_44_nf; +extern cpuop_func op_4828_44_ff; +extern cpuop_func op_4830_44_nf; +extern cpuop_func op_4830_44_ff; +extern cpuop_func op_4838_44_nf; +extern cpuop_func op_4838_44_ff; +extern cpuop_func op_4839_44_nf; +extern cpuop_func op_4839_44_ff; +extern cpuop_func op_4870_44_nf; +extern cpuop_func op_4870_44_ff; +extern cpuop_func op_487b_44_nf; +extern cpuop_func op_487b_44_ff; +extern cpuop_func op_4890_44_nf; +extern cpuop_func op_4890_44_ff; +extern cpuop_func op_48a0_44_nf; +extern cpuop_func op_48a0_44_ff; +extern cpuop_func op_48a8_44_nf; +extern cpuop_func op_48a8_44_ff; +extern cpuop_func op_48b0_44_nf; +extern cpuop_func op_48b0_44_ff; +extern cpuop_func op_48b8_44_nf; +extern cpuop_func op_48b8_44_ff; +extern cpuop_func op_48b9_44_nf; +extern cpuop_func op_48b9_44_ff; +extern cpuop_func op_48d0_44_nf; +extern cpuop_func op_48d0_44_ff; +extern cpuop_func op_48e0_44_nf; +extern cpuop_func op_48e0_44_ff; +extern cpuop_func op_48e8_44_nf; +extern cpuop_func op_48e8_44_ff; +extern cpuop_func op_48f0_44_nf; +extern cpuop_func op_48f0_44_ff; +extern cpuop_func op_48f8_44_nf; +extern cpuop_func op_48f8_44_ff; +extern cpuop_func op_48f9_44_nf; +extern cpuop_func op_48f9_44_ff; +extern cpuop_func op_4a30_44_nf; +extern cpuop_func op_4a30_44_ff; +extern cpuop_func op_4a70_44_nf; +extern cpuop_func op_4a70_44_ff; +extern cpuop_func op_4ab0_44_nf; +extern cpuop_func op_4ab0_44_ff; +extern cpuop_func op_4ac0_44_nf; +extern cpuop_func op_4ac0_44_ff; +extern cpuop_func op_4ad0_44_nf; +extern cpuop_func op_4ad0_44_ff; +extern cpuop_func op_4ad8_44_nf; +extern cpuop_func op_4ad8_44_ff; +extern cpuop_func op_4ae0_44_nf; +extern cpuop_func op_4ae0_44_ff; +extern cpuop_func op_4ae8_44_nf; +extern cpuop_func op_4ae8_44_ff; +extern cpuop_func op_4af0_44_nf; +extern cpuop_func op_4af0_44_ff; +extern cpuop_func op_4af8_44_nf; +extern cpuop_func op_4af8_44_ff; +extern cpuop_func op_4af9_44_nf; +extern cpuop_func op_4af9_44_ff; +extern cpuop_func op_4c90_44_nf; +extern cpuop_func op_4c90_44_ff; +extern cpuop_func op_4c98_44_nf; +extern cpuop_func op_4c98_44_ff; +extern cpuop_func op_4ca8_44_nf; +extern cpuop_func op_4ca8_44_ff; +extern cpuop_func op_4cb0_44_nf; +extern cpuop_func op_4cb0_44_ff; +extern cpuop_func op_4cb8_44_nf; +extern cpuop_func op_4cb8_44_ff; +extern cpuop_func op_4cb9_44_nf; +extern cpuop_func op_4cb9_44_ff; +extern cpuop_func op_4cba_44_nf; +extern cpuop_func op_4cba_44_ff; +extern cpuop_func op_4cbb_44_nf; +extern cpuop_func op_4cbb_44_ff; +extern cpuop_func op_4cd0_44_nf; +extern cpuop_func op_4cd0_44_ff; +extern cpuop_func op_4cd8_44_nf; +extern cpuop_func op_4cd8_44_ff; +extern cpuop_func op_4ce8_44_nf; +extern cpuop_func op_4ce8_44_ff; +extern cpuop_func op_4cf0_44_nf; +extern cpuop_func op_4cf0_44_ff; +extern cpuop_func op_4cf8_44_nf; +extern cpuop_func op_4cf8_44_ff; +extern cpuop_func op_4cf9_44_nf; +extern cpuop_func op_4cf9_44_ff; +extern cpuop_func op_4cfa_44_nf; +extern cpuop_func op_4cfa_44_ff; +extern cpuop_func op_4cfb_44_nf; +extern cpuop_func op_4cfb_44_ff; +extern cpuop_func op_4e50_44_nf; +extern cpuop_func op_4e50_44_ff; +extern cpuop_func op_4e72_44_nf; +extern cpuop_func op_4e72_44_ff; +extern cpuop_func op_4e73_44_nf; +extern cpuop_func op_4e73_44_ff; +extern cpuop_func op_4e75_44_nf; +extern cpuop_func op_4e75_44_ff; +extern cpuop_func op_4e77_44_nf; +extern cpuop_func op_4e77_44_ff; +extern cpuop_func op_4eb0_44_nf; +extern cpuop_func op_4eb0_44_ff; +extern cpuop_func op_4ebb_44_nf; +extern cpuop_func op_4ebb_44_ff; +extern cpuop_func op_4ef0_44_nf; +extern cpuop_func op_4ef0_44_ff; +extern cpuop_func op_4efb_44_nf; +extern cpuop_func op_4efb_44_ff; +extern cpuop_func op_5030_44_nf; +extern cpuop_func op_5030_44_ff; +extern cpuop_func op_5070_44_nf; +extern cpuop_func op_5070_44_ff; +extern cpuop_func op_50b0_44_nf; +extern cpuop_func op_50b0_44_ff; +extern cpuop_func op_50c8_44_nf; +extern cpuop_func op_50c8_44_ff; +extern cpuop_func op_50f0_44_nf; +extern cpuop_func op_50f0_44_ff; +extern cpuop_func op_5130_44_nf; +extern cpuop_func op_5130_44_ff; +extern cpuop_func op_5170_44_nf; +extern cpuop_func op_5170_44_ff; +extern cpuop_func op_51b0_44_nf; +extern cpuop_func op_51b0_44_ff; +extern cpuop_func op_51c8_44_nf; +extern cpuop_func op_51c8_44_ff; +extern cpuop_func op_51f0_44_nf; +extern cpuop_func op_51f0_44_ff; +extern cpuop_func op_52c8_44_nf; +extern cpuop_func op_52c8_44_ff; +extern cpuop_func op_52f0_44_nf; +extern cpuop_func op_52f0_44_ff; +extern cpuop_func op_53c8_44_nf; +extern cpuop_func op_53c8_44_ff; +extern cpuop_func op_53f0_44_nf; +extern cpuop_func op_53f0_44_ff; +extern cpuop_func op_54c8_44_nf; +extern cpuop_func op_54c8_44_ff; +extern cpuop_func op_54f0_44_nf; +extern cpuop_func op_54f0_44_ff; +extern cpuop_func op_55c8_44_nf; +extern cpuop_func op_55c8_44_ff; +extern cpuop_func op_55f0_44_nf; +extern cpuop_func op_55f0_44_ff; +extern cpuop_func op_56c8_44_nf; +extern cpuop_func op_56c8_44_ff; +extern cpuop_func op_56f0_44_nf; +extern cpuop_func op_56f0_44_ff; +extern cpuop_func op_57c8_44_nf; +extern cpuop_func op_57c8_44_ff; +extern cpuop_func op_57f0_44_nf; +extern cpuop_func op_57f0_44_ff; +extern cpuop_func op_58c8_44_nf; +extern cpuop_func op_58c8_44_ff; +extern cpuop_func op_58f0_44_nf; +extern cpuop_func op_58f0_44_ff; +extern cpuop_func op_59c8_44_nf; +extern cpuop_func op_59c8_44_ff; +extern cpuop_func op_59f0_44_nf; +extern cpuop_func op_59f0_44_ff; +extern cpuop_func op_5ac8_44_nf; +extern cpuop_func op_5ac8_44_ff; +extern cpuop_func op_5af0_44_nf; +extern cpuop_func op_5af0_44_ff; +extern cpuop_func op_5bc8_44_nf; +extern cpuop_func op_5bc8_44_ff; +extern cpuop_func op_5bf0_44_nf; +extern cpuop_func op_5bf0_44_ff; +extern cpuop_func op_5cc8_44_nf; +extern cpuop_func op_5cc8_44_ff; +extern cpuop_func op_5cf0_44_nf; +extern cpuop_func op_5cf0_44_ff; +extern cpuop_func op_5dc8_44_nf; +extern cpuop_func op_5dc8_44_ff; +extern cpuop_func op_5df0_44_nf; +extern cpuop_func op_5df0_44_ff; +extern cpuop_func op_5ec8_44_nf; +extern cpuop_func op_5ec8_44_ff; +extern cpuop_func op_5ef0_44_nf; +extern cpuop_func op_5ef0_44_ff; +extern cpuop_func op_5fc8_44_nf; +extern cpuop_func op_5fc8_44_ff; +extern cpuop_func op_5ff0_44_nf; +extern cpuop_func op_5ff0_44_ff; +extern cpuop_func op_6000_44_nf; +extern cpuop_func op_6000_44_ff; +extern cpuop_func op_6001_44_nf; +extern cpuop_func op_6001_44_ff; +extern cpuop_func op_60ff_44_nf; +extern cpuop_func op_60ff_44_ff; +extern cpuop_func op_6100_44_nf; +extern cpuop_func op_6100_44_ff; +extern cpuop_func op_6101_44_nf; +extern cpuop_func op_6101_44_ff; +extern cpuop_func op_61ff_44_nf; +extern cpuop_func op_61ff_44_ff; +extern cpuop_func op_6200_44_nf; +extern cpuop_func op_6200_44_ff; +extern cpuop_func op_6201_44_nf; +extern cpuop_func op_6201_44_ff; +extern cpuop_func op_62ff_44_nf; +extern cpuop_func op_62ff_44_ff; +extern cpuop_func op_6300_44_nf; +extern cpuop_func op_6300_44_ff; +extern cpuop_func op_6301_44_nf; +extern cpuop_func op_6301_44_ff; +extern cpuop_func op_63ff_44_nf; +extern cpuop_func op_63ff_44_ff; +extern cpuop_func op_6400_44_nf; +extern cpuop_func op_6400_44_ff; +extern cpuop_func op_6401_44_nf; +extern cpuop_func op_6401_44_ff; +extern cpuop_func op_64ff_44_nf; +extern cpuop_func op_64ff_44_ff; +extern cpuop_func op_6500_44_nf; +extern cpuop_func op_6500_44_ff; +extern cpuop_func op_6501_44_nf; +extern cpuop_func op_6501_44_ff; +extern cpuop_func op_65ff_44_nf; +extern cpuop_func op_65ff_44_ff; +extern cpuop_func op_6600_44_nf; +extern cpuop_func op_6600_44_ff; +extern cpuop_func op_6601_44_nf; +extern cpuop_func op_6601_44_ff; +extern cpuop_func op_66ff_44_nf; +extern cpuop_func op_66ff_44_ff; +extern cpuop_func op_6700_44_nf; +extern cpuop_func op_6700_44_ff; +extern cpuop_func op_6701_44_nf; +extern cpuop_func op_6701_44_ff; +extern cpuop_func op_67ff_44_nf; +extern cpuop_func op_67ff_44_ff; +extern cpuop_func op_6800_44_nf; +extern cpuop_func op_6800_44_ff; +extern cpuop_func op_6801_44_nf; +extern cpuop_func op_6801_44_ff; +extern cpuop_func op_68ff_44_nf; +extern cpuop_func op_68ff_44_ff; +extern cpuop_func op_6900_44_nf; +extern cpuop_func op_6900_44_ff; +extern cpuop_func op_6901_44_nf; +extern cpuop_func op_6901_44_ff; +extern cpuop_func op_69ff_44_nf; +extern cpuop_func op_69ff_44_ff; +extern cpuop_func op_6a00_44_nf; +extern cpuop_func op_6a00_44_ff; +extern cpuop_func op_6a01_44_nf; +extern cpuop_func op_6a01_44_ff; +extern cpuop_func op_6aff_44_nf; +extern cpuop_func op_6aff_44_ff; +extern cpuop_func op_6b00_44_nf; +extern cpuop_func op_6b00_44_ff; +extern cpuop_func op_6b01_44_nf; +extern cpuop_func op_6b01_44_ff; +extern cpuop_func op_6bff_44_nf; +extern cpuop_func op_6bff_44_ff; +extern cpuop_func op_6c00_44_nf; +extern cpuop_func op_6c00_44_ff; +extern cpuop_func op_6c01_44_nf; +extern cpuop_func op_6c01_44_ff; +extern cpuop_func op_6cff_44_nf; +extern cpuop_func op_6cff_44_ff; +extern cpuop_func op_6d00_44_nf; +extern cpuop_func op_6d00_44_ff; +extern cpuop_func op_6d01_44_nf; +extern cpuop_func op_6d01_44_ff; +extern cpuop_func op_6dff_44_nf; +extern cpuop_func op_6dff_44_ff; +extern cpuop_func op_6e00_44_nf; +extern cpuop_func op_6e00_44_ff; +extern cpuop_func op_6e01_44_nf; +extern cpuop_func op_6e01_44_ff; +extern cpuop_func op_6eff_44_nf; +extern cpuop_func op_6eff_44_ff; +extern cpuop_func op_6f00_44_nf; +extern cpuop_func op_6f00_44_ff; +extern cpuop_func op_6f01_44_nf; +extern cpuop_func op_6f01_44_ff; +extern cpuop_func op_6fff_44_nf; +extern cpuop_func op_6fff_44_ff; +extern cpuop_func op_8030_44_nf; +extern cpuop_func op_8030_44_ff; +extern cpuop_func op_803b_44_nf; +extern cpuop_func op_803b_44_ff; +extern cpuop_func op_8070_44_nf; +extern cpuop_func op_8070_44_ff; +extern cpuop_func op_807b_44_nf; +extern cpuop_func op_807b_44_ff; +extern cpuop_func op_80b0_44_nf; +extern cpuop_func op_80b0_44_ff; +extern cpuop_func op_80bb_44_nf; +extern cpuop_func op_80bb_44_ff; +extern cpuop_func op_80c0_44_nf; +extern cpuop_func op_80c0_44_ff; +extern cpuop_func op_80d0_44_nf; +extern cpuop_func op_80d0_44_ff; +extern cpuop_func op_80d8_44_nf; +extern cpuop_func op_80d8_44_ff; +extern cpuop_func op_80e0_44_nf; +extern cpuop_func op_80e0_44_ff; +extern cpuop_func op_80e8_44_nf; +extern cpuop_func op_80e8_44_ff; +extern cpuop_func op_80f0_44_nf; +extern cpuop_func op_80f0_44_ff; +extern cpuop_func op_80f8_44_nf; +extern cpuop_func op_80f8_44_ff; +extern cpuop_func op_80f9_44_nf; +extern cpuop_func op_80f9_44_ff; +extern cpuop_func op_80fa_44_nf; +extern cpuop_func op_80fa_44_ff; +extern cpuop_func op_80fb_44_nf; +extern cpuop_func op_80fb_44_ff; +extern cpuop_func op_80fc_44_nf; +extern cpuop_func op_80fc_44_ff; +extern cpuop_func op_8100_44_nf; +extern cpuop_func op_8100_44_ff; +extern cpuop_func op_8108_44_nf; +extern cpuop_func op_8108_44_ff; +extern cpuop_func op_8130_44_nf; +extern cpuop_func op_8130_44_ff; +extern cpuop_func op_8170_44_nf; +extern cpuop_func op_8170_44_ff; +extern cpuop_func op_81b0_44_nf; +extern cpuop_func op_81b0_44_ff; +extern cpuop_func op_81c0_44_nf; +extern cpuop_func op_81c0_44_ff; +extern cpuop_func op_81d0_44_nf; +extern cpuop_func op_81d0_44_ff; +extern cpuop_func op_81d8_44_nf; +extern cpuop_func op_81d8_44_ff; +extern cpuop_func op_81e0_44_nf; +extern cpuop_func op_81e0_44_ff; +extern cpuop_func op_81e8_44_nf; +extern cpuop_func op_81e8_44_ff; +extern cpuop_func op_81f0_44_nf; +extern cpuop_func op_81f0_44_ff; +extern cpuop_func op_81f8_44_nf; +extern cpuop_func op_81f8_44_ff; +extern cpuop_func op_81f9_44_nf; +extern cpuop_func op_81f9_44_ff; +extern cpuop_func op_81fa_44_nf; +extern cpuop_func op_81fa_44_ff; +extern cpuop_func op_81fb_44_nf; +extern cpuop_func op_81fb_44_ff; +extern cpuop_func op_81fc_44_nf; +extern cpuop_func op_81fc_44_ff; +extern cpuop_func op_9030_44_nf; +extern cpuop_func op_9030_44_ff; +extern cpuop_func op_903b_44_nf; +extern cpuop_func op_903b_44_ff; +extern cpuop_func op_9070_44_nf; +extern cpuop_func op_9070_44_ff; +extern cpuop_func op_907b_44_nf; +extern cpuop_func op_907b_44_ff; +extern cpuop_func op_90b0_44_nf; +extern cpuop_func op_90b0_44_ff; +extern cpuop_func op_90bb_44_nf; +extern cpuop_func op_90bb_44_ff; +extern cpuop_func op_90f0_44_nf; +extern cpuop_func op_90f0_44_ff; +extern cpuop_func op_90fb_44_nf; +extern cpuop_func op_90fb_44_ff; +extern cpuop_func op_9130_44_nf; +extern cpuop_func op_9130_44_ff; +extern cpuop_func op_9170_44_nf; +extern cpuop_func op_9170_44_ff; +extern cpuop_func op_91b0_44_nf; +extern cpuop_func op_91b0_44_ff; +extern cpuop_func op_91f0_44_nf; +extern cpuop_func op_91f0_44_ff; +extern cpuop_func op_91fb_44_nf; +extern cpuop_func op_91fb_44_ff; +extern cpuop_func op_b030_44_nf; +extern cpuop_func op_b030_44_ff; +extern cpuop_func op_b03b_44_nf; +extern cpuop_func op_b03b_44_ff; +extern cpuop_func op_b070_44_nf; +extern cpuop_func op_b070_44_ff; +extern cpuop_func op_b07b_44_nf; +extern cpuop_func op_b07b_44_ff; +extern cpuop_func op_b0b0_44_nf; +extern cpuop_func op_b0b0_44_ff; +extern cpuop_func op_b0bb_44_nf; +extern cpuop_func op_b0bb_44_ff; +extern cpuop_func op_b0f0_44_nf; +extern cpuop_func op_b0f0_44_ff; +extern cpuop_func op_b0fb_44_nf; +extern cpuop_func op_b0fb_44_ff; +extern cpuop_func op_b130_44_nf; +extern cpuop_func op_b130_44_ff; +extern cpuop_func op_b170_44_nf; +extern cpuop_func op_b170_44_ff; +extern cpuop_func op_b1b0_44_nf; +extern cpuop_func op_b1b0_44_ff; +extern cpuop_func op_b1f0_44_nf; +extern cpuop_func op_b1f0_44_ff; +extern cpuop_func op_b1fb_44_nf; +extern cpuop_func op_b1fb_44_ff; +extern cpuop_func op_c030_44_nf; +extern cpuop_func op_c030_44_ff; +extern cpuop_func op_c03b_44_nf; +extern cpuop_func op_c03b_44_ff; +extern cpuop_func op_c070_44_nf; +extern cpuop_func op_c070_44_ff; +extern cpuop_func op_c07b_44_nf; +extern cpuop_func op_c07b_44_ff; +extern cpuop_func op_c0b0_44_nf; +extern cpuop_func op_c0b0_44_ff; +extern cpuop_func op_c0bb_44_nf; +extern cpuop_func op_c0bb_44_ff; +extern cpuop_func op_c0c0_44_nf; +extern cpuop_func op_c0c0_44_ff; +extern cpuop_func op_c0d0_44_nf; +extern cpuop_func op_c0d0_44_ff; +extern cpuop_func op_c0d8_44_nf; +extern cpuop_func op_c0d8_44_ff; +extern cpuop_func op_c0e0_44_nf; +extern cpuop_func op_c0e0_44_ff; +extern cpuop_func op_c0e8_44_nf; +extern cpuop_func op_c0e8_44_ff; +extern cpuop_func op_c0f0_44_nf; +extern cpuop_func op_c0f0_44_ff; +extern cpuop_func op_c0f8_44_nf; +extern cpuop_func op_c0f8_44_ff; +extern cpuop_func op_c0f9_44_nf; +extern cpuop_func op_c0f9_44_ff; +extern cpuop_func op_c0fa_44_nf; +extern cpuop_func op_c0fa_44_ff; +extern cpuop_func op_c0fb_44_nf; +extern cpuop_func op_c0fb_44_ff; +extern cpuop_func op_c0fc_44_nf; +extern cpuop_func op_c0fc_44_ff; +extern cpuop_func op_c100_44_nf; +extern cpuop_func op_c100_44_ff; +extern cpuop_func op_c108_44_nf; +extern cpuop_func op_c108_44_ff; +extern cpuop_func op_c130_44_nf; +extern cpuop_func op_c130_44_ff; +extern cpuop_func op_c170_44_nf; +extern cpuop_func op_c170_44_ff; +extern cpuop_func op_c1b0_44_nf; +extern cpuop_func op_c1b0_44_ff; +extern cpuop_func op_c1c0_44_nf; +extern cpuop_func op_c1c0_44_ff; +extern cpuop_func op_c1d0_44_nf; +extern cpuop_func op_c1d0_44_ff; +extern cpuop_func op_c1d8_44_nf; +extern cpuop_func op_c1d8_44_ff; +extern cpuop_func op_c1e0_44_nf; +extern cpuop_func op_c1e0_44_ff; +extern cpuop_func op_c1e8_44_nf; +extern cpuop_func op_c1e8_44_ff; +extern cpuop_func op_c1f0_44_nf; +extern cpuop_func op_c1f0_44_ff; +extern cpuop_func op_c1f8_44_nf; +extern cpuop_func op_c1f8_44_ff; +extern cpuop_func op_c1f9_44_nf; +extern cpuop_func op_c1f9_44_ff; +extern cpuop_func op_c1fa_44_nf; +extern cpuop_func op_c1fa_44_ff; +extern cpuop_func op_c1fb_44_nf; +extern cpuop_func op_c1fb_44_ff; +extern cpuop_func op_c1fc_44_nf; +extern cpuop_func op_c1fc_44_ff; +extern cpuop_func op_d030_44_nf; +extern cpuop_func op_d030_44_ff; +extern cpuop_func op_d03b_44_nf; +extern cpuop_func op_d03b_44_ff; +extern cpuop_func op_d070_44_nf; +extern cpuop_func op_d070_44_ff; +extern cpuop_func op_d07b_44_nf; +extern cpuop_func op_d07b_44_ff; +extern cpuop_func op_d0b0_44_nf; +extern cpuop_func op_d0b0_44_ff; +extern cpuop_func op_d0bb_44_nf; +extern cpuop_func op_d0bb_44_ff; +extern cpuop_func op_d0f0_44_nf; +extern cpuop_func op_d0f0_44_ff; +extern cpuop_func op_d0fb_44_nf; +extern cpuop_func op_d0fb_44_ff; +extern cpuop_func op_d130_44_nf; +extern cpuop_func op_d130_44_ff; +extern cpuop_func op_d170_44_nf; +extern cpuop_func op_d170_44_ff; +extern cpuop_func op_d1b0_44_nf; +extern cpuop_func op_d1b0_44_ff; +extern cpuop_func op_d1f0_44_nf; +extern cpuop_func op_d1f0_44_ff; +extern cpuop_func op_d1fb_44_nf; +extern cpuop_func op_d1fb_44_ff; +extern cpuop_func op_e000_44_nf; +extern cpuop_func op_e000_44_ff; +extern cpuop_func op_e008_44_nf; +extern cpuop_func op_e008_44_ff; +extern cpuop_func op_e010_44_nf; +extern cpuop_func op_e010_44_ff; +extern cpuop_func op_e018_44_nf; +extern cpuop_func op_e018_44_ff; +extern cpuop_func op_e020_44_nf; +extern cpuop_func op_e020_44_ff; +extern cpuop_func op_e028_44_nf; +extern cpuop_func op_e028_44_ff; +extern cpuop_func op_e030_44_nf; +extern cpuop_func op_e030_44_ff; +extern cpuop_func op_e038_44_nf; +extern cpuop_func op_e038_44_ff; +extern cpuop_func op_e040_44_nf; +extern cpuop_func op_e040_44_ff; +extern cpuop_func op_e048_44_nf; +extern cpuop_func op_e048_44_ff; +extern cpuop_func op_e050_44_nf; +extern cpuop_func op_e050_44_ff; +extern cpuop_func op_e058_44_nf; +extern cpuop_func op_e058_44_ff; +extern cpuop_func op_e060_44_nf; +extern cpuop_func op_e060_44_ff; +extern cpuop_func op_e068_44_nf; +extern cpuop_func op_e068_44_ff; +extern cpuop_func op_e070_44_nf; +extern cpuop_func op_e070_44_ff; +extern cpuop_func op_e078_44_nf; +extern cpuop_func op_e078_44_ff; +extern cpuop_func op_e080_44_nf; +extern cpuop_func op_e080_44_ff; +extern cpuop_func op_e088_44_nf; +extern cpuop_func op_e088_44_ff; +extern cpuop_func op_e090_44_nf; +extern cpuop_func op_e090_44_ff; +extern cpuop_func op_e098_44_nf; +extern cpuop_func op_e098_44_ff; +extern cpuop_func op_e0a0_44_nf; +extern cpuop_func op_e0a0_44_ff; +extern cpuop_func op_e0a8_44_nf; +extern cpuop_func op_e0a8_44_ff; +extern cpuop_func op_e0b0_44_nf; +extern cpuop_func op_e0b0_44_ff; +extern cpuop_func op_e0b8_44_nf; +extern cpuop_func op_e0b8_44_ff; +extern cpuop_func op_e0f0_44_nf; +extern cpuop_func op_e0f0_44_ff; +extern cpuop_func op_e100_44_nf; +extern cpuop_func op_e100_44_ff; +extern cpuop_func op_e108_44_nf; +extern cpuop_func op_e108_44_ff; +extern cpuop_func op_e110_44_nf; +extern cpuop_func op_e110_44_ff; +extern cpuop_func op_e118_44_nf; +extern cpuop_func op_e118_44_ff; +extern cpuop_func op_e120_44_nf; +extern cpuop_func op_e120_44_ff; +extern cpuop_func op_e128_44_nf; +extern cpuop_func op_e128_44_ff; +extern cpuop_func op_e130_44_nf; +extern cpuop_func op_e130_44_ff; +extern cpuop_func op_e138_44_nf; +extern cpuop_func op_e138_44_ff; +extern cpuop_func op_e140_44_nf; +extern cpuop_func op_e140_44_ff; +extern cpuop_func op_e148_44_nf; +extern cpuop_func op_e148_44_ff; +extern cpuop_func op_e150_44_nf; +extern cpuop_func op_e150_44_ff; +extern cpuop_func op_e158_44_nf; +extern cpuop_func op_e158_44_ff; +extern cpuop_func op_e160_44_nf; +extern cpuop_func op_e160_44_ff; +extern cpuop_func op_e168_44_nf; +extern cpuop_func op_e168_44_ff; +extern cpuop_func op_e170_44_nf; +extern cpuop_func op_e170_44_ff; +extern cpuop_func op_e178_44_nf; +extern cpuop_func op_e178_44_ff; +extern cpuop_func op_e180_44_nf; +extern cpuop_func op_e180_44_ff; +extern cpuop_func op_e188_44_nf; +extern cpuop_func op_e188_44_ff; +extern cpuop_func op_e190_44_nf; +extern cpuop_func op_e190_44_ff; +extern cpuop_func op_e198_44_nf; +extern cpuop_func op_e198_44_ff; +extern cpuop_func op_e1a0_44_nf; +extern cpuop_func op_e1a0_44_ff; +extern cpuop_func op_e1a8_44_nf; +extern cpuop_func op_e1a8_44_ff; +extern cpuop_func op_e1b0_44_nf; +extern cpuop_func op_e1b0_44_ff; +extern cpuop_func op_e1b8_44_nf; +extern cpuop_func op_e1b8_44_ff; +extern cpuop_func op_e1f0_44_nf; +extern cpuop_func op_e1f0_44_ff; +extern cpuop_func op_e2f0_44_nf; +extern cpuop_func op_e2f0_44_ff; +extern cpuop_func op_e3f0_44_nf; +extern cpuop_func op_e3f0_44_ff; +extern cpuop_func op_e4f0_44_nf; +extern cpuop_func op_e4f0_44_ff; +extern cpuop_func op_e5f0_44_nf; +extern cpuop_func op_e5f0_44_ff; +extern cpuop_func op_e6f0_44_nf; +extern cpuop_func op_e6f0_44_ff; +extern cpuop_func op_e7f0_44_nf; +extern cpuop_func op_e7f0_44_ff; +extern cpuop_func op_003c_45_nf; +extern cpuop_func op_003c_45_ff; +extern cpuop_func op_007c_45_nf; +extern cpuop_func op_007c_45_ff; +extern cpuop_func op_0080_45_nf; +extern cpuop_func op_0080_45_ff; +extern cpuop_func op_0108_45_nf; +extern cpuop_func op_0108_45_ff; +extern cpuop_func op_0148_45_nf; +extern cpuop_func op_0148_45_ff; +extern cpuop_func op_0188_45_nf; +extern cpuop_func op_0188_45_ff; +extern cpuop_func op_0190_45_nf; +extern cpuop_func op_0190_45_ff; +extern cpuop_func op_0198_45_nf; +extern cpuop_func op_0198_45_ff; +extern cpuop_func op_01a0_45_nf; +extern cpuop_func op_01a0_45_ff; +extern cpuop_func op_01a8_45_nf; +extern cpuop_func op_01a8_45_ff; +extern cpuop_func op_01b0_45_nf; +extern cpuop_func op_01b0_45_ff; +extern cpuop_func op_01b8_45_nf; +extern cpuop_func op_01b8_45_ff; +extern cpuop_func op_01b9_45_nf; +extern cpuop_func op_01b9_45_ff; +extern cpuop_func op_01c8_45_nf; +extern cpuop_func op_01c8_45_ff; +extern cpuop_func op_023c_45_nf; +extern cpuop_func op_023c_45_ff; +extern cpuop_func op_027c_45_nf; +extern cpuop_func op_027c_45_ff; +extern cpuop_func op_0280_45_nf; +extern cpuop_func op_0280_45_ff; +extern cpuop_func op_0480_45_nf; +extern cpuop_func op_0480_45_ff; +extern cpuop_func op_0680_45_nf; +extern cpuop_func op_0680_45_ff; +extern cpuop_func op_0890_45_nf; +extern cpuop_func op_0890_45_ff; +extern cpuop_func op_0898_45_nf; +extern cpuop_func op_0898_45_ff; +extern cpuop_func op_08a0_45_nf; +extern cpuop_func op_08a0_45_ff; +extern cpuop_func op_08a8_45_nf; +extern cpuop_func op_08a8_45_ff; +extern cpuop_func op_08b0_45_nf; +extern cpuop_func op_08b0_45_ff; +extern cpuop_func op_08b8_45_nf; +extern cpuop_func op_08b8_45_ff; +extern cpuop_func op_08b9_45_nf; +extern cpuop_func op_08b9_45_ff; +extern cpuop_func op_0a3c_45_nf; +extern cpuop_func op_0a3c_45_ff; +extern cpuop_func op_0a7c_45_nf; +extern cpuop_func op_0a7c_45_ff; +extern cpuop_func op_0a80_45_nf; +extern cpuop_func op_0a80_45_ff; +extern cpuop_func op_40c0_45_nf; +extern cpuop_func op_40c0_45_ff; +extern cpuop_func op_40d0_45_nf; +extern cpuop_func op_40d0_45_ff; +extern cpuop_func op_40d8_45_nf; +extern cpuop_func op_40d8_45_ff; +extern cpuop_func op_40e0_45_nf; +extern cpuop_func op_40e0_45_ff; +extern cpuop_func op_40e8_45_nf; +extern cpuop_func op_40e8_45_ff; +extern cpuop_func op_40f0_45_nf; +extern cpuop_func op_40f0_45_ff; +extern cpuop_func op_40f8_45_nf; +extern cpuop_func op_40f8_45_ff; +extern cpuop_func op_40f9_45_nf; +extern cpuop_func op_40f9_45_ff; +extern cpuop_func op_41f9_45_nf; +extern cpuop_func op_41f9_45_ff; +extern cpuop_func op_4200_45_nf; +extern cpuop_func op_4200_45_ff; +extern cpuop_func op_4210_45_nf; +extern cpuop_func op_4210_45_ff; +extern cpuop_func op_4218_45_nf; +extern cpuop_func op_4218_45_ff; +extern cpuop_func op_4220_45_nf; +extern cpuop_func op_4220_45_ff; +extern cpuop_func op_4228_45_nf; +extern cpuop_func op_4228_45_ff; +extern cpuop_func op_4230_45_nf; +extern cpuop_func op_4230_45_ff; +extern cpuop_func op_4238_45_nf; +extern cpuop_func op_4238_45_ff; +extern cpuop_func op_4239_45_nf; +extern cpuop_func op_4239_45_ff; +extern cpuop_func op_4240_45_nf; +extern cpuop_func op_4240_45_ff; +extern cpuop_func op_4250_45_nf; +extern cpuop_func op_4250_45_ff; +extern cpuop_func op_4258_45_nf; +extern cpuop_func op_4258_45_ff; +extern cpuop_func op_4260_45_nf; +extern cpuop_func op_4260_45_ff; +extern cpuop_func op_4268_45_nf; +extern cpuop_func op_4268_45_ff; +extern cpuop_func op_4270_45_nf; +extern cpuop_func op_4270_45_ff; +extern cpuop_func op_4278_45_nf; +extern cpuop_func op_4278_45_ff; +extern cpuop_func op_4279_45_nf; +extern cpuop_func op_4279_45_ff; +extern cpuop_func op_4280_45_nf; +extern cpuop_func op_4280_45_ff; +extern cpuop_func op_4290_45_nf; +extern cpuop_func op_4290_45_ff; +extern cpuop_func op_4298_45_nf; +extern cpuop_func op_4298_45_ff; +extern cpuop_func op_42a0_45_nf; +extern cpuop_func op_42a0_45_ff; +extern cpuop_func op_42a8_45_nf; +extern cpuop_func op_42a8_45_ff; +extern cpuop_func op_42b0_45_nf; +extern cpuop_func op_42b0_45_ff; +extern cpuop_func op_42b8_45_nf; +extern cpuop_func op_42b8_45_ff; +extern cpuop_func op_42b9_45_nf; +extern cpuop_func op_42b9_45_ff; +extern cpuop_func op_44c0_45_nf; +extern cpuop_func op_44c0_45_ff; +extern cpuop_func op_44d0_45_nf; +extern cpuop_func op_44d0_45_ff; +extern cpuop_func op_44d8_45_nf; +extern cpuop_func op_44d8_45_ff; +extern cpuop_func op_44e0_45_nf; +extern cpuop_func op_44e0_45_ff; +extern cpuop_func op_44e8_45_nf; +extern cpuop_func op_44e8_45_ff; +extern cpuop_func op_44f0_45_nf; +extern cpuop_func op_44f0_45_ff; +extern cpuop_func op_44f8_45_nf; +extern cpuop_func op_44f8_45_ff; +extern cpuop_func op_44f9_45_nf; +extern cpuop_func op_44f9_45_ff; +extern cpuop_func op_44fa_45_nf; +extern cpuop_func op_44fa_45_ff; +extern cpuop_func op_44fb_45_nf; +extern cpuop_func op_44fb_45_ff; +extern cpuop_func op_44fc_45_nf; +extern cpuop_func op_44fc_45_ff; +extern cpuop_func op_46c0_45_nf; +extern cpuop_func op_46c0_45_ff; +extern cpuop_func op_46d0_45_nf; +extern cpuop_func op_46d0_45_ff; +extern cpuop_func op_46d8_45_nf; +extern cpuop_func op_46d8_45_ff; +extern cpuop_func op_46e0_45_nf; +extern cpuop_func op_46e0_45_ff; +extern cpuop_func op_46e8_45_nf; +extern cpuop_func op_46e8_45_ff; +extern cpuop_func op_46f0_45_nf; +extern cpuop_func op_46f0_45_ff; +extern cpuop_func op_46f8_45_nf; +extern cpuop_func op_46f8_45_ff; +extern cpuop_func op_46f9_45_nf; +extern cpuop_func op_46f9_45_ff; +extern cpuop_func op_46fa_45_nf; +extern cpuop_func op_46fa_45_ff; +extern cpuop_func op_46fb_45_nf; +extern cpuop_func op_46fb_45_ff; +extern cpuop_func op_46fc_45_nf; +extern cpuop_func op_46fc_45_ff; +extern cpuop_func op_4ac0_45_nf; +extern cpuop_func op_4ac0_45_ff; +extern cpuop_func op_4ad0_45_nf; +extern cpuop_func op_4ad0_45_ff; +extern cpuop_func op_4ad8_45_nf; +extern cpuop_func op_4ad8_45_ff; +extern cpuop_func op_4ae0_45_nf; +extern cpuop_func op_4ae0_45_ff; +extern cpuop_func op_4ae8_45_nf; +extern cpuop_func op_4ae8_45_ff; +extern cpuop_func op_4af0_45_nf; +extern cpuop_func op_4af0_45_ff; +extern cpuop_func op_4af8_45_nf; +extern cpuop_func op_4af8_45_ff; +extern cpuop_func op_4af9_45_nf; +extern cpuop_func op_4af9_45_ff; +extern cpuop_func op_4e60_45_nf; +extern cpuop_func op_4e60_45_ff; +extern cpuop_func op_4e68_45_nf; +extern cpuop_func op_4e68_45_ff; +extern cpuop_func op_4e72_45_nf; +extern cpuop_func op_4e72_45_ff; +extern cpuop_func op_4e73_45_nf; +extern cpuop_func op_4e73_45_ff; +extern cpuop_func op_4e75_45_nf; +extern cpuop_func op_4e75_45_ff; +extern cpuop_func op_4e76_45_nf; +extern cpuop_func op_4e76_45_ff; +extern cpuop_func op_4e77_45_nf; +extern cpuop_func op_4e77_45_ff; +extern cpuop_func op_4e90_45_nf; +extern cpuop_func op_4e90_45_ff; +extern cpuop_func op_4ea8_45_nf; +extern cpuop_func op_4ea8_45_ff; +extern cpuop_func op_4eb0_45_nf; +extern cpuop_func op_4eb0_45_ff; +extern cpuop_func op_4eb8_45_nf; +extern cpuop_func op_4eb8_45_ff; +extern cpuop_func op_4eb9_45_nf; +extern cpuop_func op_4eb9_45_ff; +extern cpuop_func op_4eba_45_nf; +extern cpuop_func op_4eba_45_ff; +extern cpuop_func op_4ebb_45_nf; +extern cpuop_func op_4ebb_45_ff; +extern cpuop_func op_4ed0_45_nf; +extern cpuop_func op_4ed0_45_ff; +extern cpuop_func op_4ee8_45_nf; +extern cpuop_func op_4ee8_45_ff; +extern cpuop_func op_4ef0_45_nf; +extern cpuop_func op_4ef0_45_ff; +extern cpuop_func op_4ef8_45_nf; +extern cpuop_func op_4ef8_45_ff; +extern cpuop_func op_4ef9_45_nf; +extern cpuop_func op_4ef9_45_ff; +extern cpuop_func op_4efa_45_nf; +extern cpuop_func op_4efa_45_ff; +extern cpuop_func op_4efb_45_nf; +extern cpuop_func op_4efb_45_ff; +extern cpuop_func op_5080_45_nf; +extern cpuop_func op_5080_45_ff; +extern cpuop_func op_50c0_45_nf; +extern cpuop_func op_50c0_45_ff; +extern cpuop_func op_50c8_45_nf; +extern cpuop_func op_50c8_45_ff; +extern cpuop_func op_50d0_45_nf; +extern cpuop_func op_50d0_45_ff; +extern cpuop_func op_50d8_45_nf; +extern cpuop_func op_50d8_45_ff; +extern cpuop_func op_50e0_45_nf; +extern cpuop_func op_50e0_45_ff; +extern cpuop_func op_50e8_45_nf; +extern cpuop_func op_50e8_45_ff; +extern cpuop_func op_50f0_45_nf; +extern cpuop_func op_50f0_45_ff; +extern cpuop_func op_50f8_45_nf; +extern cpuop_func op_50f8_45_ff; +extern cpuop_func op_50f9_45_nf; +extern cpuop_func op_50f9_45_ff; +extern cpuop_func op_5180_45_nf; +extern cpuop_func op_5180_45_ff; +extern cpuop_func op_51c0_45_nf; +extern cpuop_func op_51c0_45_ff; +extern cpuop_func op_51c8_45_nf; +extern cpuop_func op_51c8_45_ff; +extern cpuop_func op_51d0_45_nf; +extern cpuop_func op_51d0_45_ff; +extern cpuop_func op_51d8_45_nf; +extern cpuop_func op_51d8_45_ff; +extern cpuop_func op_51e0_45_nf; +extern cpuop_func op_51e0_45_ff; +extern cpuop_func op_51e8_45_nf; +extern cpuop_func op_51e8_45_ff; +extern cpuop_func op_51f0_45_nf; +extern cpuop_func op_51f0_45_ff; +extern cpuop_func op_51f8_45_nf; +extern cpuop_func op_51f8_45_ff; +extern cpuop_func op_51f9_45_nf; +extern cpuop_func op_51f9_45_ff; +extern cpuop_func op_52c0_45_nf; +extern cpuop_func op_52c0_45_ff; +extern cpuop_func op_52c8_45_nf; +extern cpuop_func op_52c8_45_ff; +extern cpuop_func op_52d0_45_nf; +extern cpuop_func op_52d0_45_ff; +extern cpuop_func op_52d8_45_nf; +extern cpuop_func op_52d8_45_ff; +extern cpuop_func op_52e0_45_nf; +extern cpuop_func op_52e0_45_ff; +extern cpuop_func op_52e8_45_nf; +extern cpuop_func op_52e8_45_ff; +extern cpuop_func op_52f0_45_nf; +extern cpuop_func op_52f0_45_ff; +extern cpuop_func op_52f8_45_nf; +extern cpuop_func op_52f8_45_ff; +extern cpuop_func op_52f9_45_nf; +extern cpuop_func op_52f9_45_ff; +extern cpuop_func op_53c0_45_nf; +extern cpuop_func op_53c0_45_ff; +extern cpuop_func op_53c8_45_nf; +extern cpuop_func op_53c8_45_ff; +extern cpuop_func op_53d0_45_nf; +extern cpuop_func op_53d0_45_ff; +extern cpuop_func op_53d8_45_nf; +extern cpuop_func op_53d8_45_ff; +extern cpuop_func op_53e0_45_nf; +extern cpuop_func op_53e0_45_ff; +extern cpuop_func op_53e8_45_nf; +extern cpuop_func op_53e8_45_ff; +extern cpuop_func op_53f0_45_nf; +extern cpuop_func op_53f0_45_ff; +extern cpuop_func op_53f8_45_nf; +extern cpuop_func op_53f8_45_ff; +extern cpuop_func op_53f9_45_nf; +extern cpuop_func op_53f9_45_ff; +extern cpuop_func op_54c0_45_nf; +extern cpuop_func op_54c0_45_ff; +extern cpuop_func op_54c8_45_nf; +extern cpuop_func op_54c8_45_ff; +extern cpuop_func op_54d0_45_nf; +extern cpuop_func op_54d0_45_ff; +extern cpuop_func op_54d8_45_nf; +extern cpuop_func op_54d8_45_ff; +extern cpuop_func op_54e0_45_nf; +extern cpuop_func op_54e0_45_ff; +extern cpuop_func op_54e8_45_nf; +extern cpuop_func op_54e8_45_ff; +extern cpuop_func op_54f0_45_nf; +extern cpuop_func op_54f0_45_ff; +extern cpuop_func op_54f8_45_nf; +extern cpuop_func op_54f8_45_ff; +extern cpuop_func op_54f9_45_nf; +extern cpuop_func op_54f9_45_ff; +extern cpuop_func op_55c0_45_nf; +extern cpuop_func op_55c0_45_ff; +extern cpuop_func op_55c8_45_nf; +extern cpuop_func op_55c8_45_ff; +extern cpuop_func op_55d0_45_nf; +extern cpuop_func op_55d0_45_ff; +extern cpuop_func op_55d8_45_nf; +extern cpuop_func op_55d8_45_ff; +extern cpuop_func op_55e0_45_nf; +extern cpuop_func op_55e0_45_ff; +extern cpuop_func op_55e8_45_nf; +extern cpuop_func op_55e8_45_ff; +extern cpuop_func op_55f0_45_nf; +extern cpuop_func op_55f0_45_ff; +extern cpuop_func op_55f8_45_nf; +extern cpuop_func op_55f8_45_ff; +extern cpuop_func op_55f9_45_nf; +extern cpuop_func op_55f9_45_ff; +extern cpuop_func op_56c0_45_nf; +extern cpuop_func op_56c0_45_ff; +extern cpuop_func op_56c8_45_nf; +extern cpuop_func op_56c8_45_ff; +extern cpuop_func op_56d0_45_nf; +extern cpuop_func op_56d0_45_ff; +extern cpuop_func op_56d8_45_nf; +extern cpuop_func op_56d8_45_ff; +extern cpuop_func op_56e0_45_nf; +extern cpuop_func op_56e0_45_ff; +extern cpuop_func op_56e8_45_nf; +extern cpuop_func op_56e8_45_ff; +extern cpuop_func op_56f0_45_nf; +extern cpuop_func op_56f0_45_ff; +extern cpuop_func op_56f8_45_nf; +extern cpuop_func op_56f8_45_ff; +extern cpuop_func op_56f9_45_nf; +extern cpuop_func op_56f9_45_ff; +extern cpuop_func op_57c0_45_nf; +extern cpuop_func op_57c0_45_ff; +extern cpuop_func op_57c8_45_nf; +extern cpuop_func op_57c8_45_ff; +extern cpuop_func op_57d0_45_nf; +extern cpuop_func op_57d0_45_ff; +extern cpuop_func op_57d8_45_nf; +extern cpuop_func op_57d8_45_ff; +extern cpuop_func op_57e0_45_nf; +extern cpuop_func op_57e0_45_ff; +extern cpuop_func op_57e8_45_nf; +extern cpuop_func op_57e8_45_ff; +extern cpuop_func op_57f0_45_nf; +extern cpuop_func op_57f0_45_ff; +extern cpuop_func op_57f8_45_nf; +extern cpuop_func op_57f8_45_ff; +extern cpuop_func op_57f9_45_nf; +extern cpuop_func op_57f9_45_ff; +extern cpuop_func op_58c0_45_nf; +extern cpuop_func op_58c0_45_ff; +extern cpuop_func op_58c8_45_nf; +extern cpuop_func op_58c8_45_ff; +extern cpuop_func op_58d0_45_nf; +extern cpuop_func op_58d0_45_ff; +extern cpuop_func op_58d8_45_nf; +extern cpuop_func op_58d8_45_ff; +extern cpuop_func op_58e0_45_nf; +extern cpuop_func op_58e0_45_ff; +extern cpuop_func op_58e8_45_nf; +extern cpuop_func op_58e8_45_ff; +extern cpuop_func op_58f0_45_nf; +extern cpuop_func op_58f0_45_ff; +extern cpuop_func op_58f8_45_nf; +extern cpuop_func op_58f8_45_ff; +extern cpuop_func op_58f9_45_nf; +extern cpuop_func op_58f9_45_ff; +extern cpuop_func op_59c0_45_nf; +extern cpuop_func op_59c0_45_ff; +extern cpuop_func op_59c8_45_nf; +extern cpuop_func op_59c8_45_ff; +extern cpuop_func op_59d0_45_nf; +extern cpuop_func op_59d0_45_ff; +extern cpuop_func op_59d8_45_nf; +extern cpuop_func op_59d8_45_ff; +extern cpuop_func op_59e0_45_nf; +extern cpuop_func op_59e0_45_ff; +extern cpuop_func op_59e8_45_nf; +extern cpuop_func op_59e8_45_ff; +extern cpuop_func op_59f0_45_nf; +extern cpuop_func op_59f0_45_ff; +extern cpuop_func op_59f8_45_nf; +extern cpuop_func op_59f8_45_ff; +extern cpuop_func op_59f9_45_nf; +extern cpuop_func op_59f9_45_ff; +extern cpuop_func op_5ac0_45_nf; +extern cpuop_func op_5ac0_45_ff; +extern cpuop_func op_5ac8_45_nf; +extern cpuop_func op_5ac8_45_ff; +extern cpuop_func op_5ad0_45_nf; +extern cpuop_func op_5ad0_45_ff; +extern cpuop_func op_5ad8_45_nf; +extern cpuop_func op_5ad8_45_ff; +extern cpuop_func op_5ae0_45_nf; +extern cpuop_func op_5ae0_45_ff; +extern cpuop_func op_5ae8_45_nf; +extern cpuop_func op_5ae8_45_ff; +extern cpuop_func op_5af0_45_nf; +extern cpuop_func op_5af0_45_ff; +extern cpuop_func op_5af8_45_nf; +extern cpuop_func op_5af8_45_ff; +extern cpuop_func op_5af9_45_nf; +extern cpuop_func op_5af9_45_ff; +extern cpuop_func op_5bc0_45_nf; +extern cpuop_func op_5bc0_45_ff; +extern cpuop_func op_5bc8_45_nf; +extern cpuop_func op_5bc8_45_ff; +extern cpuop_func op_5bd0_45_nf; +extern cpuop_func op_5bd0_45_ff; +extern cpuop_func op_5bd8_45_nf; +extern cpuop_func op_5bd8_45_ff; +extern cpuop_func op_5be0_45_nf; +extern cpuop_func op_5be0_45_ff; +extern cpuop_func op_5be8_45_nf; +extern cpuop_func op_5be8_45_ff; +extern cpuop_func op_5bf0_45_nf; +extern cpuop_func op_5bf0_45_ff; +extern cpuop_func op_5bf8_45_nf; +extern cpuop_func op_5bf8_45_ff; +extern cpuop_func op_5bf9_45_nf; +extern cpuop_func op_5bf9_45_ff; +extern cpuop_func op_5cc0_45_nf; +extern cpuop_func op_5cc0_45_ff; +extern cpuop_func op_5cc8_45_nf; +extern cpuop_func op_5cc8_45_ff; +extern cpuop_func op_5cd0_45_nf; +extern cpuop_func op_5cd0_45_ff; +extern cpuop_func op_5cd8_45_nf; +extern cpuop_func op_5cd8_45_ff; +extern cpuop_func op_5ce0_45_nf; +extern cpuop_func op_5ce0_45_ff; +extern cpuop_func op_5ce8_45_nf; +extern cpuop_func op_5ce8_45_ff; +extern cpuop_func op_5cf0_45_nf; +extern cpuop_func op_5cf0_45_ff; +extern cpuop_func op_5cf8_45_nf; +extern cpuop_func op_5cf8_45_ff; +extern cpuop_func op_5cf9_45_nf; +extern cpuop_func op_5cf9_45_ff; +extern cpuop_func op_5dc0_45_nf; +extern cpuop_func op_5dc0_45_ff; +extern cpuop_func op_5dc8_45_nf; +extern cpuop_func op_5dc8_45_ff; +extern cpuop_func op_5dd0_45_nf; +extern cpuop_func op_5dd0_45_ff; +extern cpuop_func op_5dd8_45_nf; +extern cpuop_func op_5dd8_45_ff; +extern cpuop_func op_5de0_45_nf; +extern cpuop_func op_5de0_45_ff; +extern cpuop_func op_5de8_45_nf; +extern cpuop_func op_5de8_45_ff; +extern cpuop_func op_5df0_45_nf; +extern cpuop_func op_5df0_45_ff; +extern cpuop_func op_5df8_45_nf; +extern cpuop_func op_5df8_45_ff; +extern cpuop_func op_5df9_45_nf; +extern cpuop_func op_5df9_45_ff; +extern cpuop_func op_5ec0_45_nf; +extern cpuop_func op_5ec0_45_ff; +extern cpuop_func op_5ec8_45_nf; +extern cpuop_func op_5ec8_45_ff; +extern cpuop_func op_5ed0_45_nf; +extern cpuop_func op_5ed0_45_ff; +extern cpuop_func op_5ed8_45_nf; +extern cpuop_func op_5ed8_45_ff; +extern cpuop_func op_5ee0_45_nf; +extern cpuop_func op_5ee0_45_ff; +extern cpuop_func op_5ee8_45_nf; +extern cpuop_func op_5ee8_45_ff; +extern cpuop_func op_5ef0_45_nf; +extern cpuop_func op_5ef0_45_ff; +extern cpuop_func op_5ef8_45_nf; +extern cpuop_func op_5ef8_45_ff; +extern cpuop_func op_5ef9_45_nf; +extern cpuop_func op_5ef9_45_ff; +extern cpuop_func op_5fc0_45_nf; +extern cpuop_func op_5fc0_45_ff; +extern cpuop_func op_5fc8_45_nf; +extern cpuop_func op_5fc8_45_ff; +extern cpuop_func op_5fd0_45_nf; +extern cpuop_func op_5fd0_45_ff; +extern cpuop_func op_5fd8_45_nf; +extern cpuop_func op_5fd8_45_ff; +extern cpuop_func op_5fe0_45_nf; +extern cpuop_func op_5fe0_45_ff; +extern cpuop_func op_5fe8_45_nf; +extern cpuop_func op_5fe8_45_ff; +extern cpuop_func op_5ff0_45_nf; +extern cpuop_func op_5ff0_45_ff; +extern cpuop_func op_5ff8_45_nf; +extern cpuop_func op_5ff8_45_ff; +extern cpuop_func op_5ff9_45_nf; +extern cpuop_func op_5ff9_45_ff; +extern cpuop_func op_6100_45_nf; +extern cpuop_func op_6100_45_ff; +extern cpuop_func op_6101_45_nf; +extern cpuop_func op_6101_45_ff; +extern cpuop_func op_61ff_45_nf; +extern cpuop_func op_61ff_45_ff; +extern cpuop_func op_8080_45_nf; +extern cpuop_func op_8080_45_ff; +extern cpuop_func op_8090_45_nf; +extern cpuop_func op_8090_45_ff; +extern cpuop_func op_8098_45_nf; +extern cpuop_func op_8098_45_ff; +extern cpuop_func op_80a0_45_nf; +extern cpuop_func op_80a0_45_ff; +extern cpuop_func op_80a8_45_nf; +extern cpuop_func op_80a8_45_ff; +extern cpuop_func op_80b0_45_nf; +extern cpuop_func op_80b0_45_ff; +extern cpuop_func op_80b8_45_nf; +extern cpuop_func op_80b8_45_ff; +extern cpuop_func op_80b9_45_nf; +extern cpuop_func op_80b9_45_ff; +extern cpuop_func op_80ba_45_nf; +extern cpuop_func op_80ba_45_ff; +extern cpuop_func op_80bb_45_nf; +extern cpuop_func op_80bb_45_ff; +extern cpuop_func op_80bc_45_nf; +extern cpuop_func op_80bc_45_ff; +extern cpuop_func op_9080_45_nf; +extern cpuop_func op_9080_45_ff; +extern cpuop_func op_9088_45_nf; +extern cpuop_func op_9088_45_ff; +extern cpuop_func op_9090_45_nf; +extern cpuop_func op_9090_45_ff; +extern cpuop_func op_9098_45_nf; +extern cpuop_func op_9098_45_ff; +extern cpuop_func op_90a0_45_nf; +extern cpuop_func op_90a0_45_ff; +extern cpuop_func op_90a8_45_nf; +extern cpuop_func op_90a8_45_ff; +extern cpuop_func op_90b0_45_nf; +extern cpuop_func op_90b0_45_ff; +extern cpuop_func op_90b8_45_nf; +extern cpuop_func op_90b8_45_ff; +extern cpuop_func op_90b9_45_nf; +extern cpuop_func op_90b9_45_ff; +extern cpuop_func op_90ba_45_nf; +extern cpuop_func op_90ba_45_ff; +extern cpuop_func op_90bb_45_nf; +extern cpuop_func op_90bb_45_ff; +extern cpuop_func op_90bc_45_nf; +extern cpuop_func op_90bc_45_ff; +extern cpuop_func op_9100_45_nf; +extern cpuop_func op_9100_45_ff; +extern cpuop_func op_9108_45_nf; +extern cpuop_func op_9108_45_ff; +extern cpuop_func op_9140_45_nf; +extern cpuop_func op_9140_45_ff; +extern cpuop_func op_9148_45_nf; +extern cpuop_func op_9148_45_ff; +extern cpuop_func op_9180_45_nf; +extern cpuop_func op_9180_45_ff; +extern cpuop_func op_9188_45_nf; +extern cpuop_func op_9188_45_ff; +extern cpuop_func op_b180_45_nf; +extern cpuop_func op_b180_45_ff; +extern cpuop_func op_c080_45_nf; +extern cpuop_func op_c080_45_ff; +extern cpuop_func op_c090_45_nf; +extern cpuop_func op_c090_45_ff; +extern cpuop_func op_c098_45_nf; +extern cpuop_func op_c098_45_ff; +extern cpuop_func op_c0a0_45_nf; +extern cpuop_func op_c0a0_45_ff; +extern cpuop_func op_c0a8_45_nf; +extern cpuop_func op_c0a8_45_ff; +extern cpuop_func op_c0b0_45_nf; +extern cpuop_func op_c0b0_45_ff; +extern cpuop_func op_c0b8_45_nf; +extern cpuop_func op_c0b8_45_ff; +extern cpuop_func op_c0b9_45_nf; +extern cpuop_func op_c0b9_45_ff; +extern cpuop_func op_c0ba_45_nf; +extern cpuop_func op_c0ba_45_ff; +extern cpuop_func op_c0bb_45_nf; +extern cpuop_func op_c0bb_45_ff; +extern cpuop_func op_c0bc_45_nf; +extern cpuop_func op_c0bc_45_ff; +extern cpuop_func op_d080_45_nf; +extern cpuop_func op_d080_45_ff; +extern cpuop_func op_d088_45_nf; +extern cpuop_func op_d088_45_ff; +extern cpuop_func op_d090_45_nf; +extern cpuop_func op_d090_45_ff; +extern cpuop_func op_d098_45_nf; +extern cpuop_func op_d098_45_ff; +extern cpuop_func op_d0a0_45_nf; +extern cpuop_func op_d0a0_45_ff; +extern cpuop_func op_d0a8_45_nf; +extern cpuop_func op_d0a8_45_ff; +extern cpuop_func op_d0b0_45_nf; +extern cpuop_func op_d0b0_45_ff; +extern cpuop_func op_d0b8_45_nf; +extern cpuop_func op_d0b8_45_ff; +extern cpuop_func op_d0b9_45_nf; +extern cpuop_func op_d0b9_45_ff; +extern cpuop_func op_d0ba_45_nf; +extern cpuop_func op_d0ba_45_ff; +extern cpuop_func op_d0bb_45_nf; +extern cpuop_func op_d0bb_45_ff; +extern cpuop_func op_d0bc_45_nf; +extern cpuop_func op_d0bc_45_ff; +extern cpuop_func op_d100_45_nf; +extern cpuop_func op_d100_45_ff; +extern cpuop_func op_d108_45_nf; +extern cpuop_func op_d108_45_ff; +extern cpuop_func op_d140_45_nf; +extern cpuop_func op_d140_45_ff; +extern cpuop_func op_d148_45_nf; +extern cpuop_func op_d148_45_ff; +extern cpuop_func op_d180_45_nf; +extern cpuop_func op_d180_45_ff; +extern cpuop_func op_d188_45_nf; +extern cpuop_func op_d188_45_ff; +extern cpuop_func op_0080_46_nf; +extern cpuop_func op_0080_46_ff; +extern cpuop_func op_0108_46_nf; +extern cpuop_func op_0108_46_ff; +extern cpuop_func op_0148_46_nf; +extern cpuop_func op_0148_46_ff; +extern cpuop_func op_0188_46_nf; +extern cpuop_func op_0188_46_ff; +extern cpuop_func op_0190_46_nf; +extern cpuop_func op_0190_46_ff; +extern cpuop_func op_0198_46_nf; +extern cpuop_func op_0198_46_ff; +extern cpuop_func op_01a0_46_nf; +extern cpuop_func op_01a0_46_ff; +extern cpuop_func op_01a8_46_nf; +extern cpuop_func op_01a8_46_ff; +extern cpuop_func op_01b0_46_nf; +extern cpuop_func op_01b0_46_ff; +extern cpuop_func op_01b8_46_nf; +extern cpuop_func op_01b8_46_ff; +extern cpuop_func op_01b9_46_nf; +extern cpuop_func op_01b9_46_ff; +extern cpuop_func op_01c8_46_nf; +extern cpuop_func op_01c8_46_ff; +extern cpuop_func op_0280_46_nf; +extern cpuop_func op_0280_46_ff; +extern cpuop_func op_0480_46_nf; +extern cpuop_func op_0480_46_ff; +extern cpuop_func op_0680_46_nf; +extern cpuop_func op_0680_46_ff; +extern cpuop_func op_0890_46_nf; +extern cpuop_func op_0890_46_ff; +extern cpuop_func op_0898_46_nf; +extern cpuop_func op_0898_46_ff; +extern cpuop_func op_08a0_46_nf; +extern cpuop_func op_08a0_46_ff; +extern cpuop_func op_08a8_46_nf; +extern cpuop_func op_08a8_46_ff; +extern cpuop_func op_08b0_46_nf; +extern cpuop_func op_08b0_46_ff; +extern cpuop_func op_08b8_46_nf; +extern cpuop_func op_08b8_46_ff; +extern cpuop_func op_08b9_46_nf; +extern cpuop_func op_08b9_46_ff; +extern cpuop_func op_0a80_46_nf; +extern cpuop_func op_0a80_46_ff; +extern cpuop_func op_40c0_46_nf; +extern cpuop_func op_40c0_46_ff; +extern cpuop_func op_40d0_46_nf; +extern cpuop_func op_40d0_46_ff; +extern cpuop_func op_40d8_46_nf; +extern cpuop_func op_40d8_46_ff; +extern cpuop_func op_40e0_46_nf; +extern cpuop_func op_40e0_46_ff; +extern cpuop_func op_40e8_46_nf; +extern cpuop_func op_40e8_46_ff; +extern cpuop_func op_40f0_46_nf; +extern cpuop_func op_40f0_46_ff; +extern cpuop_func op_40f8_46_nf; +extern cpuop_func op_40f8_46_ff; +extern cpuop_func op_40f9_46_nf; +extern cpuop_func op_40f9_46_ff; +extern cpuop_func op_41f9_46_nf; +extern cpuop_func op_41f9_46_ff; +extern cpuop_func op_4200_46_nf; +extern cpuop_func op_4200_46_ff; +extern cpuop_func op_4210_46_nf; +extern cpuop_func op_4210_46_ff; +extern cpuop_func op_4218_46_nf; +extern cpuop_func op_4218_46_ff; +extern cpuop_func op_4220_46_nf; +extern cpuop_func op_4220_46_ff; +extern cpuop_func op_4228_46_nf; +extern cpuop_func op_4228_46_ff; +extern cpuop_func op_4230_46_nf; +extern cpuop_func op_4230_46_ff; +extern cpuop_func op_4238_46_nf; +extern cpuop_func op_4238_46_ff; +extern cpuop_func op_4239_46_nf; +extern cpuop_func op_4239_46_ff; +extern cpuop_func op_4240_46_nf; +extern cpuop_func op_4240_46_ff; +extern cpuop_func op_4250_46_nf; +extern cpuop_func op_4250_46_ff; +extern cpuop_func op_4258_46_nf; +extern cpuop_func op_4258_46_ff; +extern cpuop_func op_4260_46_nf; +extern cpuop_func op_4260_46_ff; +extern cpuop_func op_4268_46_nf; +extern cpuop_func op_4268_46_ff; +extern cpuop_func op_4270_46_nf; +extern cpuop_func op_4270_46_ff; +extern cpuop_func op_4278_46_nf; +extern cpuop_func op_4278_46_ff; +extern cpuop_func op_4279_46_nf; +extern cpuop_func op_4279_46_ff; +extern cpuop_func op_4280_46_nf; +extern cpuop_func op_4280_46_ff; +extern cpuop_func op_4290_46_nf; +extern cpuop_func op_4290_46_ff; +extern cpuop_func op_4298_46_nf; +extern cpuop_func op_4298_46_ff; +extern cpuop_func op_42a0_46_nf; +extern cpuop_func op_42a0_46_ff; +extern cpuop_func op_42a8_46_nf; +extern cpuop_func op_42a8_46_ff; +extern cpuop_func op_42b0_46_nf; +extern cpuop_func op_42b0_46_ff; +extern cpuop_func op_42b8_46_nf; +extern cpuop_func op_42b8_46_ff; +extern cpuop_func op_42b9_46_nf; +extern cpuop_func op_42b9_46_ff; +extern cpuop_func op_44c0_46_nf; +extern cpuop_func op_44c0_46_ff; +extern cpuop_func op_44d0_46_nf; +extern cpuop_func op_44d0_46_ff; +extern cpuop_func op_44d8_46_nf; +extern cpuop_func op_44d8_46_ff; +extern cpuop_func op_44e0_46_nf; +extern cpuop_func op_44e0_46_ff; +extern cpuop_func op_44e8_46_nf; +extern cpuop_func op_44e8_46_ff; +extern cpuop_func op_44f0_46_nf; +extern cpuop_func op_44f0_46_ff; +extern cpuop_func op_44f8_46_nf; +extern cpuop_func op_44f8_46_ff; +extern cpuop_func op_44f9_46_nf; +extern cpuop_func op_44f9_46_ff; +extern cpuop_func op_44fa_46_nf; +extern cpuop_func op_44fa_46_ff; +extern cpuop_func op_44fb_46_nf; +extern cpuop_func op_44fb_46_ff; +extern cpuop_func op_44fc_46_nf; +extern cpuop_func op_44fc_46_ff; +extern cpuop_func op_46c0_46_nf; +extern cpuop_func op_46c0_46_ff; +extern cpuop_func op_46d0_46_nf; +extern cpuop_func op_46d0_46_ff; +extern cpuop_func op_46d8_46_nf; +extern cpuop_func op_46d8_46_ff; +extern cpuop_func op_46e0_46_nf; +extern cpuop_func op_46e0_46_ff; +extern cpuop_func op_46e8_46_nf; +extern cpuop_func op_46e8_46_ff; +extern cpuop_func op_46f0_46_nf; +extern cpuop_func op_46f0_46_ff; +extern cpuop_func op_46f8_46_nf; +extern cpuop_func op_46f8_46_ff; +extern cpuop_func op_46f9_46_nf; +extern cpuop_func op_46f9_46_ff; +extern cpuop_func op_46fa_46_nf; +extern cpuop_func op_46fa_46_ff; +extern cpuop_func op_46fb_46_nf; +extern cpuop_func op_46fb_46_ff; +extern cpuop_func op_46fc_46_nf; +extern cpuop_func op_46fc_46_ff; +extern cpuop_func op_4ac0_46_nf; +extern cpuop_func op_4ac0_46_ff; +extern cpuop_func op_4ad0_46_nf; +extern cpuop_func op_4ad0_46_ff; +extern cpuop_func op_4ad8_46_nf; +extern cpuop_func op_4ad8_46_ff; +extern cpuop_func op_4ae0_46_nf; +extern cpuop_func op_4ae0_46_ff; +extern cpuop_func op_4ae8_46_nf; +extern cpuop_func op_4ae8_46_ff; +extern cpuop_func op_4af0_46_nf; +extern cpuop_func op_4af0_46_ff; +extern cpuop_func op_4af8_46_nf; +extern cpuop_func op_4af8_46_ff; +extern cpuop_func op_4af9_46_nf; +extern cpuop_func op_4af9_46_ff; +extern cpuop_func op_4e60_46_nf; +extern cpuop_func op_4e60_46_ff; +extern cpuop_func op_4e68_46_nf; +extern cpuop_func op_4e68_46_ff; +extern cpuop_func op_4e72_46_nf; +extern cpuop_func op_4e72_46_ff; +extern cpuop_func op_4e75_46_nf; +extern cpuop_func op_4e75_46_ff; +extern cpuop_func op_4e76_46_nf; +extern cpuop_func op_4e76_46_ff; +extern cpuop_func op_4e90_46_nf; +extern cpuop_func op_4e90_46_ff; +extern cpuop_func op_4ea8_46_nf; +extern cpuop_func op_4ea8_46_ff; +extern cpuop_func op_4eb0_46_nf; +extern cpuop_func op_4eb0_46_ff; +extern cpuop_func op_4eb8_46_nf; +extern cpuop_func op_4eb8_46_ff; +extern cpuop_func op_4eb9_46_nf; +extern cpuop_func op_4eb9_46_ff; +extern cpuop_func op_4eba_46_nf; +extern cpuop_func op_4eba_46_ff; +extern cpuop_func op_4ebb_46_nf; +extern cpuop_func op_4ebb_46_ff; +extern cpuop_func op_4ed0_46_nf; +extern cpuop_func op_4ed0_46_ff; +extern cpuop_func op_4ee8_46_nf; +extern cpuop_func op_4ee8_46_ff; +extern cpuop_func op_4ef0_46_nf; +extern cpuop_func op_4ef0_46_ff; +extern cpuop_func op_4ef8_46_nf; +extern cpuop_func op_4ef8_46_ff; +extern cpuop_func op_4ef9_46_nf; +extern cpuop_func op_4ef9_46_ff; +extern cpuop_func op_4efa_46_nf; +extern cpuop_func op_4efa_46_ff; +extern cpuop_func op_4efb_46_nf; +extern cpuop_func op_4efb_46_ff; +extern cpuop_func op_5080_46_nf; +extern cpuop_func op_5080_46_ff; +extern cpuop_func op_50c0_46_nf; +extern cpuop_func op_50c0_46_ff; +extern cpuop_func op_50c8_46_nf; +extern cpuop_func op_50c8_46_ff; +extern cpuop_func op_50d0_46_nf; +extern cpuop_func op_50d0_46_ff; +extern cpuop_func op_50d8_46_nf; +extern cpuop_func op_50d8_46_ff; +extern cpuop_func op_50e0_46_nf; +extern cpuop_func op_50e0_46_ff; +extern cpuop_func op_50e8_46_nf; +extern cpuop_func op_50e8_46_ff; +extern cpuop_func op_50f0_46_nf; +extern cpuop_func op_50f0_46_ff; +extern cpuop_func op_50f8_46_nf; +extern cpuop_func op_50f8_46_ff; +extern cpuop_func op_50f9_46_nf; +extern cpuop_func op_50f9_46_ff; +extern cpuop_func op_5180_46_nf; +extern cpuop_func op_5180_46_ff; +extern cpuop_func op_51c0_46_nf; +extern cpuop_func op_51c0_46_ff; +extern cpuop_func op_51c8_46_nf; +extern cpuop_func op_51c8_46_ff; +extern cpuop_func op_51d0_46_nf; +extern cpuop_func op_51d0_46_ff; +extern cpuop_func op_51d8_46_nf; +extern cpuop_func op_51d8_46_ff; +extern cpuop_func op_51e0_46_nf; +extern cpuop_func op_51e0_46_ff; +extern cpuop_func op_51e8_46_nf; +extern cpuop_func op_51e8_46_ff; +extern cpuop_func op_51f0_46_nf; +extern cpuop_func op_51f0_46_ff; +extern cpuop_func op_51f8_46_nf; +extern cpuop_func op_51f8_46_ff; +extern cpuop_func op_51f9_46_nf; +extern cpuop_func op_51f9_46_ff; +extern cpuop_func op_52c0_46_nf; +extern cpuop_func op_52c0_46_ff; +extern cpuop_func op_52c8_46_nf; +extern cpuop_func op_52c8_46_ff; +extern cpuop_func op_52d0_46_nf; +extern cpuop_func op_52d0_46_ff; +extern cpuop_func op_52d8_46_nf; +extern cpuop_func op_52d8_46_ff; +extern cpuop_func op_52e0_46_nf; +extern cpuop_func op_52e0_46_ff; +extern cpuop_func op_52e8_46_nf; +extern cpuop_func op_52e8_46_ff; +extern cpuop_func op_52f0_46_nf; +extern cpuop_func op_52f0_46_ff; +extern cpuop_func op_52f8_46_nf; +extern cpuop_func op_52f8_46_ff; +extern cpuop_func op_52f9_46_nf; +extern cpuop_func op_52f9_46_ff; +extern cpuop_func op_53c0_46_nf; +extern cpuop_func op_53c0_46_ff; +extern cpuop_func op_53c8_46_nf; +extern cpuop_func op_53c8_46_ff; +extern cpuop_func op_53d0_46_nf; +extern cpuop_func op_53d0_46_ff; +extern cpuop_func op_53d8_46_nf; +extern cpuop_func op_53d8_46_ff; +extern cpuop_func op_53e0_46_nf; +extern cpuop_func op_53e0_46_ff; +extern cpuop_func op_53e8_46_nf; +extern cpuop_func op_53e8_46_ff; +extern cpuop_func op_53f0_46_nf; +extern cpuop_func op_53f0_46_ff; +extern cpuop_func op_53f8_46_nf; +extern cpuop_func op_53f8_46_ff; +extern cpuop_func op_53f9_46_nf; +extern cpuop_func op_53f9_46_ff; +extern cpuop_func op_54c0_46_nf; +extern cpuop_func op_54c0_46_ff; +extern cpuop_func op_54c8_46_nf; +extern cpuop_func op_54c8_46_ff; +extern cpuop_func op_54d0_46_nf; +extern cpuop_func op_54d0_46_ff; +extern cpuop_func op_54d8_46_nf; +extern cpuop_func op_54d8_46_ff; +extern cpuop_func op_54e0_46_nf; +extern cpuop_func op_54e0_46_ff; +extern cpuop_func op_54e8_46_nf; +extern cpuop_func op_54e8_46_ff; +extern cpuop_func op_54f0_46_nf; +extern cpuop_func op_54f0_46_ff; +extern cpuop_func op_54f8_46_nf; +extern cpuop_func op_54f8_46_ff; +extern cpuop_func op_54f9_46_nf; +extern cpuop_func op_54f9_46_ff; +extern cpuop_func op_55c0_46_nf; +extern cpuop_func op_55c0_46_ff; +extern cpuop_func op_55c8_46_nf; +extern cpuop_func op_55c8_46_ff; +extern cpuop_func op_55d0_46_nf; +extern cpuop_func op_55d0_46_ff; +extern cpuop_func op_55d8_46_nf; +extern cpuop_func op_55d8_46_ff; +extern cpuop_func op_55e0_46_nf; +extern cpuop_func op_55e0_46_ff; +extern cpuop_func op_55e8_46_nf; +extern cpuop_func op_55e8_46_ff; +extern cpuop_func op_55f0_46_nf; +extern cpuop_func op_55f0_46_ff; +extern cpuop_func op_55f8_46_nf; +extern cpuop_func op_55f8_46_ff; +extern cpuop_func op_55f9_46_nf; +extern cpuop_func op_55f9_46_ff; +extern cpuop_func op_56c0_46_nf; +extern cpuop_func op_56c0_46_ff; +extern cpuop_func op_56c8_46_nf; +extern cpuop_func op_56c8_46_ff; +extern cpuop_func op_56d0_46_nf; +extern cpuop_func op_56d0_46_ff; +extern cpuop_func op_56d8_46_nf; +extern cpuop_func op_56d8_46_ff; +extern cpuop_func op_56e0_46_nf; +extern cpuop_func op_56e0_46_ff; +extern cpuop_func op_56e8_46_nf; +extern cpuop_func op_56e8_46_ff; +extern cpuop_func op_56f0_46_nf; +extern cpuop_func op_56f0_46_ff; +extern cpuop_func op_56f8_46_nf; +extern cpuop_func op_56f8_46_ff; +extern cpuop_func op_56f9_46_nf; +extern cpuop_func op_56f9_46_ff; +extern cpuop_func op_57c0_46_nf; +extern cpuop_func op_57c0_46_ff; +extern cpuop_func op_57c8_46_nf; +extern cpuop_func op_57c8_46_ff; +extern cpuop_func op_57d0_46_nf; +extern cpuop_func op_57d0_46_ff; +extern cpuop_func op_57d8_46_nf; +extern cpuop_func op_57d8_46_ff; +extern cpuop_func op_57e0_46_nf; +extern cpuop_func op_57e0_46_ff; +extern cpuop_func op_57e8_46_nf; +extern cpuop_func op_57e8_46_ff; +extern cpuop_func op_57f0_46_nf; +extern cpuop_func op_57f0_46_ff; +extern cpuop_func op_57f8_46_nf; +extern cpuop_func op_57f8_46_ff; +extern cpuop_func op_57f9_46_nf; +extern cpuop_func op_57f9_46_ff; +extern cpuop_func op_58c0_46_nf; +extern cpuop_func op_58c0_46_ff; +extern cpuop_func op_58c8_46_nf; +extern cpuop_func op_58c8_46_ff; +extern cpuop_func op_58d0_46_nf; +extern cpuop_func op_58d0_46_ff; +extern cpuop_func op_58d8_46_nf; +extern cpuop_func op_58d8_46_ff; +extern cpuop_func op_58e0_46_nf; +extern cpuop_func op_58e0_46_ff; +extern cpuop_func op_58e8_46_nf; +extern cpuop_func op_58e8_46_ff; +extern cpuop_func op_58f0_46_nf; +extern cpuop_func op_58f0_46_ff; +extern cpuop_func op_58f8_46_nf; +extern cpuop_func op_58f8_46_ff; +extern cpuop_func op_58f9_46_nf; +extern cpuop_func op_58f9_46_ff; +extern cpuop_func op_59c0_46_nf; +extern cpuop_func op_59c0_46_ff; +extern cpuop_func op_59c8_46_nf; +extern cpuop_func op_59c8_46_ff; +extern cpuop_func op_59d0_46_nf; +extern cpuop_func op_59d0_46_ff; +extern cpuop_func op_59d8_46_nf; +extern cpuop_func op_59d8_46_ff; +extern cpuop_func op_59e0_46_nf; +extern cpuop_func op_59e0_46_ff; +extern cpuop_func op_59e8_46_nf; +extern cpuop_func op_59e8_46_ff; +extern cpuop_func op_59f0_46_nf; +extern cpuop_func op_59f0_46_ff; +extern cpuop_func op_59f8_46_nf; +extern cpuop_func op_59f8_46_ff; +extern cpuop_func op_59f9_46_nf; +extern cpuop_func op_59f9_46_ff; +extern cpuop_func op_5ac0_46_nf; +extern cpuop_func op_5ac0_46_ff; +extern cpuop_func op_5ac8_46_nf; +extern cpuop_func op_5ac8_46_ff; +extern cpuop_func op_5ad0_46_nf; +extern cpuop_func op_5ad0_46_ff; +extern cpuop_func op_5ad8_46_nf; +extern cpuop_func op_5ad8_46_ff; +extern cpuop_func op_5ae0_46_nf; +extern cpuop_func op_5ae0_46_ff; +extern cpuop_func op_5ae8_46_nf; +extern cpuop_func op_5ae8_46_ff; +extern cpuop_func op_5af0_46_nf; +extern cpuop_func op_5af0_46_ff; +extern cpuop_func op_5af8_46_nf; +extern cpuop_func op_5af8_46_ff; +extern cpuop_func op_5af9_46_nf; +extern cpuop_func op_5af9_46_ff; +extern cpuop_func op_5bc0_46_nf; +extern cpuop_func op_5bc0_46_ff; +extern cpuop_func op_5bc8_46_nf; +extern cpuop_func op_5bc8_46_ff; +extern cpuop_func op_5bd0_46_nf; +extern cpuop_func op_5bd0_46_ff; +extern cpuop_func op_5bd8_46_nf; +extern cpuop_func op_5bd8_46_ff; +extern cpuop_func op_5be0_46_nf; +extern cpuop_func op_5be0_46_ff; +extern cpuop_func op_5be8_46_nf; +extern cpuop_func op_5be8_46_ff; +extern cpuop_func op_5bf0_46_nf; +extern cpuop_func op_5bf0_46_ff; +extern cpuop_func op_5bf8_46_nf; +extern cpuop_func op_5bf8_46_ff; +extern cpuop_func op_5bf9_46_nf; +extern cpuop_func op_5bf9_46_ff; +extern cpuop_func op_5cc0_46_nf; +extern cpuop_func op_5cc0_46_ff; +extern cpuop_func op_5cc8_46_nf; +extern cpuop_func op_5cc8_46_ff; +extern cpuop_func op_5cd0_46_nf; +extern cpuop_func op_5cd0_46_ff; +extern cpuop_func op_5cd8_46_nf; +extern cpuop_func op_5cd8_46_ff; +extern cpuop_func op_5ce0_46_nf; +extern cpuop_func op_5ce0_46_ff; +extern cpuop_func op_5ce8_46_nf; +extern cpuop_func op_5ce8_46_ff; +extern cpuop_func op_5cf0_46_nf; +extern cpuop_func op_5cf0_46_ff; +extern cpuop_func op_5cf8_46_nf; +extern cpuop_func op_5cf8_46_ff; +extern cpuop_func op_5cf9_46_nf; +extern cpuop_func op_5cf9_46_ff; +extern cpuop_func op_5dc0_46_nf; +extern cpuop_func op_5dc0_46_ff; +extern cpuop_func op_5dc8_46_nf; +extern cpuop_func op_5dc8_46_ff; +extern cpuop_func op_5dd0_46_nf; +extern cpuop_func op_5dd0_46_ff; +extern cpuop_func op_5dd8_46_nf; +extern cpuop_func op_5dd8_46_ff; +extern cpuop_func op_5de0_46_nf; +extern cpuop_func op_5de0_46_ff; +extern cpuop_func op_5de8_46_nf; +extern cpuop_func op_5de8_46_ff; +extern cpuop_func op_5df0_46_nf; +extern cpuop_func op_5df0_46_ff; +extern cpuop_func op_5df8_46_nf; +extern cpuop_func op_5df8_46_ff; +extern cpuop_func op_5df9_46_nf; +extern cpuop_func op_5df9_46_ff; +extern cpuop_func op_5ec0_46_nf; +extern cpuop_func op_5ec0_46_ff; +extern cpuop_func op_5ec8_46_nf; +extern cpuop_func op_5ec8_46_ff; +extern cpuop_func op_5ed0_46_nf; +extern cpuop_func op_5ed0_46_ff; +extern cpuop_func op_5ed8_46_nf; +extern cpuop_func op_5ed8_46_ff; +extern cpuop_func op_5ee0_46_nf; +extern cpuop_func op_5ee0_46_ff; +extern cpuop_func op_5ee8_46_nf; +extern cpuop_func op_5ee8_46_ff; +extern cpuop_func op_5ef0_46_nf; +extern cpuop_func op_5ef0_46_ff; +extern cpuop_func op_5ef8_46_nf; +extern cpuop_func op_5ef8_46_ff; +extern cpuop_func op_5ef9_46_nf; +extern cpuop_func op_5ef9_46_ff; +extern cpuop_func op_5fc0_46_nf; +extern cpuop_func op_5fc0_46_ff; +extern cpuop_func op_5fc8_46_nf; +extern cpuop_func op_5fc8_46_ff; +extern cpuop_func op_5fd0_46_nf; +extern cpuop_func op_5fd0_46_ff; +extern cpuop_func op_5fd8_46_nf; +extern cpuop_func op_5fd8_46_ff; +extern cpuop_func op_5fe0_46_nf; +extern cpuop_func op_5fe0_46_ff; +extern cpuop_func op_5fe8_46_nf; +extern cpuop_func op_5fe8_46_ff; +extern cpuop_func op_5ff0_46_nf; +extern cpuop_func op_5ff0_46_ff; +extern cpuop_func op_5ff8_46_nf; +extern cpuop_func op_5ff8_46_ff; +extern cpuop_func op_5ff9_46_nf; +extern cpuop_func op_5ff9_46_ff; +extern cpuop_func op_6100_46_nf; +extern cpuop_func op_6100_46_ff; +extern cpuop_func op_6101_46_nf; +extern cpuop_func op_6101_46_ff; +extern cpuop_func op_61ff_46_nf; +extern cpuop_func op_61ff_46_ff; +extern cpuop_func op_8080_46_nf; +extern cpuop_func op_8080_46_ff; +extern cpuop_func op_8090_46_nf; +extern cpuop_func op_8090_46_ff; +extern cpuop_func op_8098_46_nf; +extern cpuop_func op_8098_46_ff; +extern cpuop_func op_80a0_46_nf; +extern cpuop_func op_80a0_46_ff; +extern cpuop_func op_80a8_46_nf; +extern cpuop_func op_80a8_46_ff; +extern cpuop_func op_80b0_46_nf; +extern cpuop_func op_80b0_46_ff; +extern cpuop_func op_80b8_46_nf; +extern cpuop_func op_80b8_46_ff; +extern cpuop_func op_80b9_46_nf; +extern cpuop_func op_80b9_46_ff; +extern cpuop_func op_80ba_46_nf; +extern cpuop_func op_80ba_46_ff; +extern cpuop_func op_80bb_46_nf; +extern cpuop_func op_80bb_46_ff; +extern cpuop_func op_80bc_46_nf; +extern cpuop_func op_80bc_46_ff; +extern cpuop_func op_9080_46_nf; +extern cpuop_func op_9080_46_ff; +extern cpuop_func op_9088_46_nf; +extern cpuop_func op_9088_46_ff; +extern cpuop_func op_9090_46_nf; +extern cpuop_func op_9090_46_ff; +extern cpuop_func op_9098_46_nf; +extern cpuop_func op_9098_46_ff; +extern cpuop_func op_90a0_46_nf; +extern cpuop_func op_90a0_46_ff; +extern cpuop_func op_90a8_46_nf; +extern cpuop_func op_90a8_46_ff; +extern cpuop_func op_90b0_46_nf; +extern cpuop_func op_90b0_46_ff; +extern cpuop_func op_90b8_46_nf; +extern cpuop_func op_90b8_46_ff; +extern cpuop_func op_90b9_46_nf; +extern cpuop_func op_90b9_46_ff; +extern cpuop_func op_90ba_46_nf; +extern cpuop_func op_90ba_46_ff; +extern cpuop_func op_90bb_46_nf; +extern cpuop_func op_90bb_46_ff; +extern cpuop_func op_90bc_46_nf; +extern cpuop_func op_90bc_46_ff; +extern cpuop_func op_9100_46_nf; +extern cpuop_func op_9100_46_ff; +extern cpuop_func op_9108_46_nf; +extern cpuop_func op_9108_46_ff; +extern cpuop_func op_9140_46_nf; +extern cpuop_func op_9140_46_ff; +extern cpuop_func op_9148_46_nf; +extern cpuop_func op_9148_46_ff; +extern cpuop_func op_9180_46_nf; +extern cpuop_func op_9180_46_ff; +extern cpuop_func op_9188_46_nf; +extern cpuop_func op_9188_46_ff; +extern cpuop_func op_b180_46_nf; +extern cpuop_func op_b180_46_ff; +extern cpuop_func op_c080_46_nf; +extern cpuop_func op_c080_46_ff; +extern cpuop_func op_c090_46_nf; +extern cpuop_func op_c090_46_ff; +extern cpuop_func op_c098_46_nf; +extern cpuop_func op_c098_46_ff; +extern cpuop_func op_c0a0_46_nf; +extern cpuop_func op_c0a0_46_ff; +extern cpuop_func op_c0a8_46_nf; +extern cpuop_func op_c0a8_46_ff; +extern cpuop_func op_c0b0_46_nf; +extern cpuop_func op_c0b0_46_ff; +extern cpuop_func op_c0b8_46_nf; +extern cpuop_func op_c0b8_46_ff; +extern cpuop_func op_c0b9_46_nf; +extern cpuop_func op_c0b9_46_ff; +extern cpuop_func op_c0ba_46_nf; +extern cpuop_func op_c0ba_46_ff; +extern cpuop_func op_c0bb_46_nf; +extern cpuop_func op_c0bb_46_ff; +extern cpuop_func op_c0bc_46_nf; +extern cpuop_func op_c0bc_46_ff; +extern cpuop_func op_d080_46_nf; +extern cpuop_func op_d080_46_ff; +extern cpuop_func op_d088_46_nf; +extern cpuop_func op_d088_46_ff; +extern cpuop_func op_d090_46_nf; +extern cpuop_func op_d090_46_ff; +extern cpuop_func op_d098_46_nf; +extern cpuop_func op_d098_46_ff; +extern cpuop_func op_d0a0_46_nf; +extern cpuop_func op_d0a0_46_ff; +extern cpuop_func op_d0a8_46_nf; +extern cpuop_func op_d0a8_46_ff; +extern cpuop_func op_d0b0_46_nf; +extern cpuop_func op_d0b0_46_ff; +extern cpuop_func op_d0b8_46_nf; +extern cpuop_func op_d0b8_46_ff; +extern cpuop_func op_d0b9_46_nf; +extern cpuop_func op_d0b9_46_ff; +extern cpuop_func op_d0ba_46_nf; +extern cpuop_func op_d0ba_46_ff; +extern cpuop_func op_d0bb_46_nf; +extern cpuop_func op_d0bb_46_ff; +extern cpuop_func op_d0bc_46_nf; +extern cpuop_func op_d0bc_46_ff; +extern cpuop_func op_d100_46_nf; +extern cpuop_func op_d100_46_ff; +extern cpuop_func op_d108_46_nf; +extern cpuop_func op_d108_46_ff; +extern cpuop_func op_d140_46_nf; +extern cpuop_func op_d140_46_ff; +extern cpuop_func op_d148_46_nf; +extern cpuop_func op_d148_46_ff; +extern cpuop_func op_d180_46_nf; +extern cpuop_func op_d180_46_ff; +extern cpuop_func op_d188_46_nf; +extern cpuop_func op_d188_46_ff; +extern cpuop_func op_0080_47_nf; +extern cpuop_func op_0080_47_ff; +extern cpuop_func op_0108_47_nf; +extern cpuop_func op_0108_47_ff; +extern cpuop_func op_0148_47_nf; +extern cpuop_func op_0148_47_ff; +extern cpuop_func op_0188_47_nf; +extern cpuop_func op_0188_47_ff; +extern cpuop_func op_0190_47_nf; +extern cpuop_func op_0190_47_ff; +extern cpuop_func op_0198_47_nf; +extern cpuop_func op_0198_47_ff; +extern cpuop_func op_01a0_47_nf; +extern cpuop_func op_01a0_47_ff; +extern cpuop_func op_01a8_47_nf; +extern cpuop_func op_01a8_47_ff; +extern cpuop_func op_01b0_47_nf; +extern cpuop_func op_01b0_47_ff; +extern cpuop_func op_01b8_47_nf; +extern cpuop_func op_01b8_47_ff; +extern cpuop_func op_01b9_47_nf; +extern cpuop_func op_01b9_47_ff; +extern cpuop_func op_01c8_47_nf; +extern cpuop_func op_01c8_47_ff; +extern cpuop_func op_0280_47_nf; +extern cpuop_func op_0280_47_ff; +extern cpuop_func op_0480_47_nf; +extern cpuop_func op_0480_47_ff; +extern cpuop_func op_0680_47_nf; +extern cpuop_func op_0680_47_ff; +extern cpuop_func op_0890_47_nf; +extern cpuop_func op_0890_47_ff; +extern cpuop_func op_0898_47_nf; +extern cpuop_func op_0898_47_ff; +extern cpuop_func op_08a0_47_nf; +extern cpuop_func op_08a0_47_ff; +extern cpuop_func op_08a8_47_nf; +extern cpuop_func op_08a8_47_ff; +extern cpuop_func op_08b0_47_nf; +extern cpuop_func op_08b0_47_ff; +extern cpuop_func op_08b8_47_nf; +extern cpuop_func op_08b8_47_ff; +extern cpuop_func op_08b9_47_nf; +extern cpuop_func op_08b9_47_ff; +extern cpuop_func op_0a80_47_nf; +extern cpuop_func op_0a80_47_ff; +extern cpuop_func op_40c0_47_nf; +extern cpuop_func op_40c0_47_ff; +extern cpuop_func op_40d0_47_nf; +extern cpuop_func op_40d0_47_ff; +extern cpuop_func op_40d8_47_nf; +extern cpuop_func op_40d8_47_ff; +extern cpuop_func op_40e0_47_nf; +extern cpuop_func op_40e0_47_ff; +extern cpuop_func op_40e8_47_nf; +extern cpuop_func op_40e8_47_ff; +extern cpuop_func op_40f0_47_nf; +extern cpuop_func op_40f0_47_ff; +extern cpuop_func op_40f8_47_nf; +extern cpuop_func op_40f8_47_ff; +extern cpuop_func op_40f9_47_nf; +extern cpuop_func op_40f9_47_ff; +extern cpuop_func op_41f9_47_nf; +extern cpuop_func op_41f9_47_ff; +extern cpuop_func op_4200_47_nf; +extern cpuop_func op_4200_47_ff; +extern cpuop_func op_4210_47_nf; +extern cpuop_func op_4210_47_ff; +extern cpuop_func op_4218_47_nf; +extern cpuop_func op_4218_47_ff; +extern cpuop_func op_4220_47_nf; +extern cpuop_func op_4220_47_ff; +extern cpuop_func op_4228_47_nf; +extern cpuop_func op_4228_47_ff; +extern cpuop_func op_4230_47_nf; +extern cpuop_func op_4230_47_ff; +extern cpuop_func op_4238_47_nf; +extern cpuop_func op_4238_47_ff; +extern cpuop_func op_4239_47_nf; +extern cpuop_func op_4239_47_ff; +extern cpuop_func op_4240_47_nf; +extern cpuop_func op_4240_47_ff; +extern cpuop_func op_4250_47_nf; +extern cpuop_func op_4250_47_ff; +extern cpuop_func op_4258_47_nf; +extern cpuop_func op_4258_47_ff; +extern cpuop_func op_4260_47_nf; +extern cpuop_func op_4260_47_ff; +extern cpuop_func op_4268_47_nf; +extern cpuop_func op_4268_47_ff; +extern cpuop_func op_4270_47_nf; +extern cpuop_func op_4270_47_ff; +extern cpuop_func op_4278_47_nf; +extern cpuop_func op_4278_47_ff; +extern cpuop_func op_4279_47_nf; +extern cpuop_func op_4279_47_ff; +extern cpuop_func op_4280_47_nf; +extern cpuop_func op_4280_47_ff; +extern cpuop_func op_4290_47_nf; +extern cpuop_func op_4290_47_ff; +extern cpuop_func op_4298_47_nf; +extern cpuop_func op_4298_47_ff; +extern cpuop_func op_42a0_47_nf; +extern cpuop_func op_42a0_47_ff; +extern cpuop_func op_42a8_47_nf; +extern cpuop_func op_42a8_47_ff; +extern cpuop_func op_42b0_47_nf; +extern cpuop_func op_42b0_47_ff; +extern cpuop_func op_42b8_47_nf; +extern cpuop_func op_42b8_47_ff; +extern cpuop_func op_42b9_47_nf; +extern cpuop_func op_42b9_47_ff; +extern cpuop_func op_44c0_47_nf; +extern cpuop_func op_44c0_47_ff; +extern cpuop_func op_44d0_47_nf; +extern cpuop_func op_44d0_47_ff; +extern cpuop_func op_44d8_47_nf; +extern cpuop_func op_44d8_47_ff; +extern cpuop_func op_44e0_47_nf; +extern cpuop_func op_44e0_47_ff; +extern cpuop_func op_44e8_47_nf; +extern cpuop_func op_44e8_47_ff; +extern cpuop_func op_44f0_47_nf; +extern cpuop_func op_44f0_47_ff; +extern cpuop_func op_44f8_47_nf; +extern cpuop_func op_44f8_47_ff; +extern cpuop_func op_44f9_47_nf; +extern cpuop_func op_44f9_47_ff; +extern cpuop_func op_44fa_47_nf; +extern cpuop_func op_44fa_47_ff; +extern cpuop_func op_44fb_47_nf; +extern cpuop_func op_44fb_47_ff; +extern cpuop_func op_44fc_47_nf; +extern cpuop_func op_44fc_47_ff; +extern cpuop_func op_46c0_47_nf; +extern cpuop_func op_46c0_47_ff; +extern cpuop_func op_46d0_47_nf; +extern cpuop_func op_46d0_47_ff; +extern cpuop_func op_46d8_47_nf; +extern cpuop_func op_46d8_47_ff; +extern cpuop_func op_46e0_47_nf; +extern cpuop_func op_46e0_47_ff; +extern cpuop_func op_46e8_47_nf; +extern cpuop_func op_46e8_47_ff; +extern cpuop_func op_46f0_47_nf; +extern cpuop_func op_46f0_47_ff; +extern cpuop_func op_46f8_47_nf; +extern cpuop_func op_46f8_47_ff; +extern cpuop_func op_46f9_47_nf; +extern cpuop_func op_46f9_47_ff; +extern cpuop_func op_46fa_47_nf; +extern cpuop_func op_46fa_47_ff; +extern cpuop_func op_46fb_47_nf; +extern cpuop_func op_46fb_47_ff; +extern cpuop_func op_46fc_47_nf; +extern cpuop_func op_46fc_47_ff; +extern cpuop_func op_4ac0_47_nf; +extern cpuop_func op_4ac0_47_ff; +extern cpuop_func op_4ad0_47_nf; +extern cpuop_func op_4ad0_47_ff; +extern cpuop_func op_4ad8_47_nf; +extern cpuop_func op_4ad8_47_ff; +extern cpuop_func op_4ae0_47_nf; +extern cpuop_func op_4ae0_47_ff; +extern cpuop_func op_4ae8_47_nf; +extern cpuop_func op_4ae8_47_ff; +extern cpuop_func op_4af0_47_nf; +extern cpuop_func op_4af0_47_ff; +extern cpuop_func op_4af8_47_nf; +extern cpuop_func op_4af8_47_ff; +extern cpuop_func op_4af9_47_nf; +extern cpuop_func op_4af9_47_ff; +extern cpuop_func op_4e60_47_nf; +extern cpuop_func op_4e60_47_ff; +extern cpuop_func op_4e68_47_nf; +extern cpuop_func op_4e68_47_ff; +extern cpuop_func op_4e72_47_nf; +extern cpuop_func op_4e72_47_ff; +extern cpuop_func op_4e75_47_nf; +extern cpuop_func op_4e75_47_ff; +extern cpuop_func op_4e76_47_nf; +extern cpuop_func op_4e76_47_ff; +extern cpuop_func op_4e90_47_nf; +extern cpuop_func op_4e90_47_ff; +extern cpuop_func op_4ea8_47_nf; +extern cpuop_func op_4ea8_47_ff; +extern cpuop_func op_4eb0_47_nf; +extern cpuop_func op_4eb0_47_ff; +extern cpuop_func op_4eb8_47_nf; +extern cpuop_func op_4eb8_47_ff; +extern cpuop_func op_4eb9_47_nf; +extern cpuop_func op_4eb9_47_ff; +extern cpuop_func op_4eba_47_nf; +extern cpuop_func op_4eba_47_ff; +extern cpuop_func op_4ebb_47_nf; +extern cpuop_func op_4ebb_47_ff; +extern cpuop_func op_4ed0_47_nf; +extern cpuop_func op_4ed0_47_ff; +extern cpuop_func op_4ee8_47_nf; +extern cpuop_func op_4ee8_47_ff; +extern cpuop_func op_4ef0_47_nf; +extern cpuop_func op_4ef0_47_ff; +extern cpuop_func op_4ef8_47_nf; +extern cpuop_func op_4ef8_47_ff; +extern cpuop_func op_4ef9_47_nf; +extern cpuop_func op_4ef9_47_ff; +extern cpuop_func op_4efa_47_nf; +extern cpuop_func op_4efa_47_ff; +extern cpuop_func op_4efb_47_nf; +extern cpuop_func op_4efb_47_ff; +extern cpuop_func op_5080_47_nf; +extern cpuop_func op_5080_47_ff; +extern cpuop_func op_50c0_47_nf; +extern cpuop_func op_50c0_47_ff; +extern cpuop_func op_50c8_47_nf; +extern cpuop_func op_50c8_47_ff; +extern cpuop_func op_50d0_47_nf; +extern cpuop_func op_50d0_47_ff; +extern cpuop_func op_50d8_47_nf; +extern cpuop_func op_50d8_47_ff; +extern cpuop_func op_50e0_47_nf; +extern cpuop_func op_50e0_47_ff; +extern cpuop_func op_50e8_47_nf; +extern cpuop_func op_50e8_47_ff; +extern cpuop_func op_50f0_47_nf; +extern cpuop_func op_50f0_47_ff; +extern cpuop_func op_50f8_47_nf; +extern cpuop_func op_50f8_47_ff; +extern cpuop_func op_50f9_47_nf; +extern cpuop_func op_50f9_47_ff; +extern cpuop_func op_5180_47_nf; +extern cpuop_func op_5180_47_ff; +extern cpuop_func op_51c0_47_nf; +extern cpuop_func op_51c0_47_ff; +extern cpuop_func op_51c8_47_nf; +extern cpuop_func op_51c8_47_ff; +extern cpuop_func op_51d0_47_nf; +extern cpuop_func op_51d0_47_ff; +extern cpuop_func op_51d8_47_nf; +extern cpuop_func op_51d8_47_ff; +extern cpuop_func op_51e0_47_nf; +extern cpuop_func op_51e0_47_ff; +extern cpuop_func op_51e8_47_nf; +extern cpuop_func op_51e8_47_ff; +extern cpuop_func op_51f0_47_nf; +extern cpuop_func op_51f0_47_ff; +extern cpuop_func op_51f8_47_nf; +extern cpuop_func op_51f8_47_ff; +extern cpuop_func op_51f9_47_nf; +extern cpuop_func op_51f9_47_ff; +extern cpuop_func op_52c0_47_nf; +extern cpuop_func op_52c0_47_ff; +extern cpuop_func op_52c8_47_nf; +extern cpuop_func op_52c8_47_ff; +extern cpuop_func op_52d0_47_nf; +extern cpuop_func op_52d0_47_ff; +extern cpuop_func op_52d8_47_nf; +extern cpuop_func op_52d8_47_ff; +extern cpuop_func op_52e0_47_nf; +extern cpuop_func op_52e0_47_ff; +extern cpuop_func op_52e8_47_nf; +extern cpuop_func op_52e8_47_ff; +extern cpuop_func op_52f0_47_nf; +extern cpuop_func op_52f0_47_ff; +extern cpuop_func op_52f8_47_nf; +extern cpuop_func op_52f8_47_ff; +extern cpuop_func op_52f9_47_nf; +extern cpuop_func op_52f9_47_ff; +extern cpuop_func op_53c0_47_nf; +extern cpuop_func op_53c0_47_ff; +extern cpuop_func op_53c8_47_nf; +extern cpuop_func op_53c8_47_ff; +extern cpuop_func op_53d0_47_nf; +extern cpuop_func op_53d0_47_ff; +extern cpuop_func op_53d8_47_nf; +extern cpuop_func op_53d8_47_ff; +extern cpuop_func op_53e0_47_nf; +extern cpuop_func op_53e0_47_ff; +extern cpuop_func op_53e8_47_nf; +extern cpuop_func op_53e8_47_ff; +extern cpuop_func op_53f0_47_nf; +extern cpuop_func op_53f0_47_ff; +extern cpuop_func op_53f8_47_nf; +extern cpuop_func op_53f8_47_ff; +extern cpuop_func op_53f9_47_nf; +extern cpuop_func op_53f9_47_ff; +extern cpuop_func op_54c0_47_nf; +extern cpuop_func op_54c0_47_ff; +extern cpuop_func op_54c8_47_nf; +extern cpuop_func op_54c8_47_ff; +extern cpuop_func op_54d0_47_nf; +extern cpuop_func op_54d0_47_ff; +extern cpuop_func op_54d8_47_nf; +extern cpuop_func op_54d8_47_ff; +extern cpuop_func op_54e0_47_nf; +extern cpuop_func op_54e0_47_ff; +extern cpuop_func op_54e8_47_nf; +extern cpuop_func op_54e8_47_ff; +extern cpuop_func op_54f0_47_nf; +extern cpuop_func op_54f0_47_ff; +extern cpuop_func op_54f8_47_nf; +extern cpuop_func op_54f8_47_ff; +extern cpuop_func op_54f9_47_nf; +extern cpuop_func op_54f9_47_ff; +extern cpuop_func op_55c0_47_nf; +extern cpuop_func op_55c0_47_ff; +extern cpuop_func op_55c8_47_nf; +extern cpuop_func op_55c8_47_ff; +extern cpuop_func op_55d0_47_nf; +extern cpuop_func op_55d0_47_ff; +extern cpuop_func op_55d8_47_nf; +extern cpuop_func op_55d8_47_ff; +extern cpuop_func op_55e0_47_nf; +extern cpuop_func op_55e0_47_ff; +extern cpuop_func op_55e8_47_nf; +extern cpuop_func op_55e8_47_ff; +extern cpuop_func op_55f0_47_nf; +extern cpuop_func op_55f0_47_ff; +extern cpuop_func op_55f8_47_nf; +extern cpuop_func op_55f8_47_ff; +extern cpuop_func op_55f9_47_nf; +extern cpuop_func op_55f9_47_ff; +extern cpuop_func op_56c0_47_nf; +extern cpuop_func op_56c0_47_ff; +extern cpuop_func op_56c8_47_nf; +extern cpuop_func op_56c8_47_ff; +extern cpuop_func op_56d0_47_nf; +extern cpuop_func op_56d0_47_ff; +extern cpuop_func op_56d8_47_nf; +extern cpuop_func op_56d8_47_ff; +extern cpuop_func op_56e0_47_nf; +extern cpuop_func op_56e0_47_ff; +extern cpuop_func op_56e8_47_nf; +extern cpuop_func op_56e8_47_ff; +extern cpuop_func op_56f0_47_nf; +extern cpuop_func op_56f0_47_ff; +extern cpuop_func op_56f8_47_nf; +extern cpuop_func op_56f8_47_ff; +extern cpuop_func op_56f9_47_nf; +extern cpuop_func op_56f9_47_ff; +extern cpuop_func op_57c0_47_nf; +extern cpuop_func op_57c0_47_ff; +extern cpuop_func op_57c8_47_nf; +extern cpuop_func op_57c8_47_ff; +extern cpuop_func op_57d0_47_nf; +extern cpuop_func op_57d0_47_ff; +extern cpuop_func op_57d8_47_nf; +extern cpuop_func op_57d8_47_ff; +extern cpuop_func op_57e0_47_nf; +extern cpuop_func op_57e0_47_ff; +extern cpuop_func op_57e8_47_nf; +extern cpuop_func op_57e8_47_ff; +extern cpuop_func op_57f0_47_nf; +extern cpuop_func op_57f0_47_ff; +extern cpuop_func op_57f8_47_nf; +extern cpuop_func op_57f8_47_ff; +extern cpuop_func op_57f9_47_nf; +extern cpuop_func op_57f9_47_ff; +extern cpuop_func op_58c0_47_nf; +extern cpuop_func op_58c0_47_ff; +extern cpuop_func op_58c8_47_nf; +extern cpuop_func op_58c8_47_ff; +extern cpuop_func op_58d0_47_nf; +extern cpuop_func op_58d0_47_ff; +extern cpuop_func op_58d8_47_nf; +extern cpuop_func op_58d8_47_ff; +extern cpuop_func op_58e0_47_nf; +extern cpuop_func op_58e0_47_ff; +extern cpuop_func op_58e8_47_nf; +extern cpuop_func op_58e8_47_ff; +extern cpuop_func op_58f0_47_nf; +extern cpuop_func op_58f0_47_ff; +extern cpuop_func op_58f8_47_nf; +extern cpuop_func op_58f8_47_ff; +extern cpuop_func op_58f9_47_nf; +extern cpuop_func op_58f9_47_ff; +extern cpuop_func op_59c0_47_nf; +extern cpuop_func op_59c0_47_ff; +extern cpuop_func op_59c8_47_nf; +extern cpuop_func op_59c8_47_ff; +extern cpuop_func op_59d0_47_nf; +extern cpuop_func op_59d0_47_ff; +extern cpuop_func op_59d8_47_nf; +extern cpuop_func op_59d8_47_ff; +extern cpuop_func op_59e0_47_nf; +extern cpuop_func op_59e0_47_ff; +extern cpuop_func op_59e8_47_nf; +extern cpuop_func op_59e8_47_ff; +extern cpuop_func op_59f0_47_nf; +extern cpuop_func op_59f0_47_ff; +extern cpuop_func op_59f8_47_nf; +extern cpuop_func op_59f8_47_ff; +extern cpuop_func op_59f9_47_nf; +extern cpuop_func op_59f9_47_ff; +extern cpuop_func op_5ac0_47_nf; +extern cpuop_func op_5ac0_47_ff; +extern cpuop_func op_5ac8_47_nf; +extern cpuop_func op_5ac8_47_ff; +extern cpuop_func op_5ad0_47_nf; +extern cpuop_func op_5ad0_47_ff; +extern cpuop_func op_5ad8_47_nf; +extern cpuop_func op_5ad8_47_ff; +extern cpuop_func op_5ae0_47_nf; +extern cpuop_func op_5ae0_47_ff; +extern cpuop_func op_5ae8_47_nf; +extern cpuop_func op_5ae8_47_ff; +extern cpuop_func op_5af0_47_nf; +extern cpuop_func op_5af0_47_ff; +extern cpuop_func op_5af8_47_nf; +extern cpuop_func op_5af8_47_ff; +extern cpuop_func op_5af9_47_nf; +extern cpuop_func op_5af9_47_ff; +extern cpuop_func op_5bc0_47_nf; +extern cpuop_func op_5bc0_47_ff; +extern cpuop_func op_5bc8_47_nf; +extern cpuop_func op_5bc8_47_ff; +extern cpuop_func op_5bd0_47_nf; +extern cpuop_func op_5bd0_47_ff; +extern cpuop_func op_5bd8_47_nf; +extern cpuop_func op_5bd8_47_ff; +extern cpuop_func op_5be0_47_nf; +extern cpuop_func op_5be0_47_ff; +extern cpuop_func op_5be8_47_nf; +extern cpuop_func op_5be8_47_ff; +extern cpuop_func op_5bf0_47_nf; +extern cpuop_func op_5bf0_47_ff; +extern cpuop_func op_5bf8_47_nf; +extern cpuop_func op_5bf8_47_ff; +extern cpuop_func op_5bf9_47_nf; +extern cpuop_func op_5bf9_47_ff; +extern cpuop_func op_5cc0_47_nf; +extern cpuop_func op_5cc0_47_ff; +extern cpuop_func op_5cc8_47_nf; +extern cpuop_func op_5cc8_47_ff; +extern cpuop_func op_5cd0_47_nf; +extern cpuop_func op_5cd0_47_ff; +extern cpuop_func op_5cd8_47_nf; +extern cpuop_func op_5cd8_47_ff; +extern cpuop_func op_5ce0_47_nf; +extern cpuop_func op_5ce0_47_ff; +extern cpuop_func op_5ce8_47_nf; +extern cpuop_func op_5ce8_47_ff; +extern cpuop_func op_5cf0_47_nf; +extern cpuop_func op_5cf0_47_ff; +extern cpuop_func op_5cf8_47_nf; +extern cpuop_func op_5cf8_47_ff; +extern cpuop_func op_5cf9_47_nf; +extern cpuop_func op_5cf9_47_ff; +extern cpuop_func op_5dc0_47_nf; +extern cpuop_func op_5dc0_47_ff; +extern cpuop_func op_5dc8_47_nf; +extern cpuop_func op_5dc8_47_ff; +extern cpuop_func op_5dd0_47_nf; +extern cpuop_func op_5dd0_47_ff; +extern cpuop_func op_5dd8_47_nf; +extern cpuop_func op_5dd8_47_ff; +extern cpuop_func op_5de0_47_nf; +extern cpuop_func op_5de0_47_ff; +extern cpuop_func op_5de8_47_nf; +extern cpuop_func op_5de8_47_ff; +extern cpuop_func op_5df0_47_nf; +extern cpuop_func op_5df0_47_ff; +extern cpuop_func op_5df8_47_nf; +extern cpuop_func op_5df8_47_ff; +extern cpuop_func op_5df9_47_nf; +extern cpuop_func op_5df9_47_ff; +extern cpuop_func op_5ec0_47_nf; +extern cpuop_func op_5ec0_47_ff; +extern cpuop_func op_5ec8_47_nf; +extern cpuop_func op_5ec8_47_ff; +extern cpuop_func op_5ed0_47_nf; +extern cpuop_func op_5ed0_47_ff; +extern cpuop_func op_5ed8_47_nf; +extern cpuop_func op_5ed8_47_ff; +extern cpuop_func op_5ee0_47_nf; +extern cpuop_func op_5ee0_47_ff; +extern cpuop_func op_5ee8_47_nf; +extern cpuop_func op_5ee8_47_ff; +extern cpuop_func op_5ef0_47_nf; +extern cpuop_func op_5ef0_47_ff; +extern cpuop_func op_5ef8_47_nf; +extern cpuop_func op_5ef8_47_ff; +extern cpuop_func op_5ef9_47_nf; +extern cpuop_func op_5ef9_47_ff; +extern cpuop_func op_5fc0_47_nf; +extern cpuop_func op_5fc0_47_ff; +extern cpuop_func op_5fc8_47_nf; +extern cpuop_func op_5fc8_47_ff; +extern cpuop_func op_5fd0_47_nf; +extern cpuop_func op_5fd0_47_ff; +extern cpuop_func op_5fd8_47_nf; +extern cpuop_func op_5fd8_47_ff; +extern cpuop_func op_5fe0_47_nf; +extern cpuop_func op_5fe0_47_ff; +extern cpuop_func op_5fe8_47_nf; +extern cpuop_func op_5fe8_47_ff; +extern cpuop_func op_5ff0_47_nf; +extern cpuop_func op_5ff0_47_ff; +extern cpuop_func op_5ff8_47_nf; +extern cpuop_func op_5ff8_47_ff; +extern cpuop_func op_5ff9_47_nf; +extern cpuop_func op_5ff9_47_ff; +extern cpuop_func op_6100_47_nf; +extern cpuop_func op_6100_47_ff; +extern cpuop_func op_6101_47_nf; +extern cpuop_func op_6101_47_ff; +extern cpuop_func op_61ff_47_nf; +extern cpuop_func op_61ff_47_ff; +extern cpuop_func op_8080_47_nf; +extern cpuop_func op_8080_47_ff; +extern cpuop_func op_8090_47_nf; +extern cpuop_func op_8090_47_ff; +extern cpuop_func op_8098_47_nf; +extern cpuop_func op_8098_47_ff; +extern cpuop_func op_80a0_47_nf; +extern cpuop_func op_80a0_47_ff; +extern cpuop_func op_80a8_47_nf; +extern cpuop_func op_80a8_47_ff; +extern cpuop_func op_80b0_47_nf; +extern cpuop_func op_80b0_47_ff; +extern cpuop_func op_80b8_47_nf; +extern cpuop_func op_80b8_47_ff; +extern cpuop_func op_80b9_47_nf; +extern cpuop_func op_80b9_47_ff; +extern cpuop_func op_80ba_47_nf; +extern cpuop_func op_80ba_47_ff; +extern cpuop_func op_80bb_47_nf; +extern cpuop_func op_80bb_47_ff; +extern cpuop_func op_80bc_47_nf; +extern cpuop_func op_80bc_47_ff; +extern cpuop_func op_9080_47_nf; +extern cpuop_func op_9080_47_ff; +extern cpuop_func op_9088_47_nf; +extern cpuop_func op_9088_47_ff; +extern cpuop_func op_9090_47_nf; +extern cpuop_func op_9090_47_ff; +extern cpuop_func op_9098_47_nf; +extern cpuop_func op_9098_47_ff; +extern cpuop_func op_90a0_47_nf; +extern cpuop_func op_90a0_47_ff; +extern cpuop_func op_90a8_47_nf; +extern cpuop_func op_90a8_47_ff; +extern cpuop_func op_90b0_47_nf; +extern cpuop_func op_90b0_47_ff; +extern cpuop_func op_90b8_47_nf; +extern cpuop_func op_90b8_47_ff; +extern cpuop_func op_90b9_47_nf; +extern cpuop_func op_90b9_47_ff; +extern cpuop_func op_90ba_47_nf; +extern cpuop_func op_90ba_47_ff; +extern cpuop_func op_90bb_47_nf; +extern cpuop_func op_90bb_47_ff; +extern cpuop_func op_90bc_47_nf; +extern cpuop_func op_90bc_47_ff; +extern cpuop_func op_9100_47_nf; +extern cpuop_func op_9100_47_ff; +extern cpuop_func op_9108_47_nf; +extern cpuop_func op_9108_47_ff; +extern cpuop_func op_9140_47_nf; +extern cpuop_func op_9140_47_ff; +extern cpuop_func op_9148_47_nf; +extern cpuop_func op_9148_47_ff; +extern cpuop_func op_9180_47_nf; +extern cpuop_func op_9180_47_ff; +extern cpuop_func op_9188_47_nf; +extern cpuop_func op_9188_47_ff; +extern cpuop_func op_b180_47_nf; +extern cpuop_func op_b180_47_ff; +extern cpuop_func op_c080_47_nf; +extern cpuop_func op_c080_47_ff; +extern cpuop_func op_c090_47_nf; +extern cpuop_func op_c090_47_ff; +extern cpuop_func op_c098_47_nf; +extern cpuop_func op_c098_47_ff; +extern cpuop_func op_c0a0_47_nf; +extern cpuop_func op_c0a0_47_ff; +extern cpuop_func op_c0a8_47_nf; +extern cpuop_func op_c0a8_47_ff; +extern cpuop_func op_c0b0_47_nf; +extern cpuop_func op_c0b0_47_ff; +extern cpuop_func op_c0b8_47_nf; +extern cpuop_func op_c0b8_47_ff; +extern cpuop_func op_c0b9_47_nf; +extern cpuop_func op_c0b9_47_ff; +extern cpuop_func op_c0ba_47_nf; +extern cpuop_func op_c0ba_47_ff; +extern cpuop_func op_c0bb_47_nf; +extern cpuop_func op_c0bb_47_ff; +extern cpuop_func op_c0bc_47_nf; +extern cpuop_func op_c0bc_47_ff; +extern cpuop_func op_d080_47_nf; +extern cpuop_func op_d080_47_ff; +extern cpuop_func op_d088_47_nf; +extern cpuop_func op_d088_47_ff; +extern cpuop_func op_d090_47_nf; +extern cpuop_func op_d090_47_ff; +extern cpuop_func op_d098_47_nf; +extern cpuop_func op_d098_47_ff; +extern cpuop_func op_d0a0_47_nf; +extern cpuop_func op_d0a0_47_ff; +extern cpuop_func op_d0a8_47_nf; +extern cpuop_func op_d0a8_47_ff; +extern cpuop_func op_d0b0_47_nf; +extern cpuop_func op_d0b0_47_ff; +extern cpuop_func op_d0b8_47_nf; +extern cpuop_func op_d0b8_47_ff; +extern cpuop_func op_d0b9_47_nf; +extern cpuop_func op_d0b9_47_ff; +extern cpuop_func op_d0ba_47_nf; +extern cpuop_func op_d0ba_47_ff; +extern cpuop_func op_d0bb_47_nf; +extern cpuop_func op_d0bb_47_ff; +extern cpuop_func op_d0bc_47_nf; +extern cpuop_func op_d0bc_47_ff; +extern cpuop_func op_d100_47_nf; +extern cpuop_func op_d100_47_ff; +extern cpuop_func op_d108_47_nf; +extern cpuop_func op_d108_47_ff; +extern cpuop_func op_d140_47_nf; +extern cpuop_func op_d140_47_ff; +extern cpuop_func op_d148_47_nf; +extern cpuop_func op_d148_47_ff; +extern cpuop_func op_d180_47_nf; +extern cpuop_func op_d180_47_ff; +extern cpuop_func op_d188_47_nf; +extern cpuop_func op_d188_47_ff; +extern cpuop_func op_0080_48_nf; +extern cpuop_func op_0080_48_ff; +extern cpuop_func op_0108_48_nf; +extern cpuop_func op_0108_48_ff; +extern cpuop_func op_0148_48_nf; +extern cpuop_func op_0148_48_ff; +extern cpuop_func op_0188_48_nf; +extern cpuop_func op_0188_48_ff; +extern cpuop_func op_0190_48_nf; +extern cpuop_func op_0190_48_ff; +extern cpuop_func op_0198_48_nf; +extern cpuop_func op_0198_48_ff; +extern cpuop_func op_01a0_48_nf; +extern cpuop_func op_01a0_48_ff; +extern cpuop_func op_01a8_48_nf; +extern cpuop_func op_01a8_48_ff; +extern cpuop_func op_01b0_48_nf; +extern cpuop_func op_01b0_48_ff; +extern cpuop_func op_01b8_48_nf; +extern cpuop_func op_01b8_48_ff; +extern cpuop_func op_01b9_48_nf; +extern cpuop_func op_01b9_48_ff; +extern cpuop_func op_01c8_48_nf; +extern cpuop_func op_01c8_48_ff; +extern cpuop_func op_0280_48_nf; +extern cpuop_func op_0280_48_ff; +extern cpuop_func op_0480_48_nf; +extern cpuop_func op_0480_48_ff; +extern cpuop_func op_0680_48_nf; +extern cpuop_func op_0680_48_ff; +extern cpuop_func op_0890_48_nf; +extern cpuop_func op_0890_48_ff; +extern cpuop_func op_0898_48_nf; +extern cpuop_func op_0898_48_ff; +extern cpuop_func op_08a0_48_nf; +extern cpuop_func op_08a0_48_ff; +extern cpuop_func op_08a8_48_nf; +extern cpuop_func op_08a8_48_ff; +extern cpuop_func op_08b0_48_nf; +extern cpuop_func op_08b0_48_ff; +extern cpuop_func op_08b8_48_nf; +extern cpuop_func op_08b8_48_ff; +extern cpuop_func op_08b9_48_nf; +extern cpuop_func op_08b9_48_ff; +extern cpuop_func op_0a80_48_nf; +extern cpuop_func op_0a80_48_ff; +extern cpuop_func op_40c0_48_nf; +extern cpuop_func op_40c0_48_ff; +extern cpuop_func op_40d0_48_nf; +extern cpuop_func op_40d0_48_ff; +extern cpuop_func op_40d8_48_nf; +extern cpuop_func op_40d8_48_ff; +extern cpuop_func op_40e0_48_nf; +extern cpuop_func op_40e0_48_ff; +extern cpuop_func op_40e8_48_nf; +extern cpuop_func op_40e8_48_ff; +extern cpuop_func op_40f0_48_nf; +extern cpuop_func op_40f0_48_ff; +extern cpuop_func op_40f8_48_nf; +extern cpuop_func op_40f8_48_ff; +extern cpuop_func op_40f9_48_nf; +extern cpuop_func op_40f9_48_ff; +extern cpuop_func op_41f9_48_nf; +extern cpuop_func op_41f9_48_ff; +extern cpuop_func op_4200_48_nf; +extern cpuop_func op_4200_48_ff; +extern cpuop_func op_4210_48_nf; +extern cpuop_func op_4210_48_ff; +extern cpuop_func op_4218_48_nf; +extern cpuop_func op_4218_48_ff; +extern cpuop_func op_4220_48_nf; +extern cpuop_func op_4220_48_ff; +extern cpuop_func op_4228_48_nf; +extern cpuop_func op_4228_48_ff; +extern cpuop_func op_4230_48_nf; +extern cpuop_func op_4230_48_ff; +extern cpuop_func op_4238_48_nf; +extern cpuop_func op_4238_48_ff; +extern cpuop_func op_4239_48_nf; +extern cpuop_func op_4239_48_ff; +extern cpuop_func op_4240_48_nf; +extern cpuop_func op_4240_48_ff; +extern cpuop_func op_4250_48_nf; +extern cpuop_func op_4250_48_ff; +extern cpuop_func op_4258_48_nf; +extern cpuop_func op_4258_48_ff; +extern cpuop_func op_4260_48_nf; +extern cpuop_func op_4260_48_ff; +extern cpuop_func op_4268_48_nf; +extern cpuop_func op_4268_48_ff; +extern cpuop_func op_4270_48_nf; +extern cpuop_func op_4270_48_ff; +extern cpuop_func op_4278_48_nf; +extern cpuop_func op_4278_48_ff; +extern cpuop_func op_4279_48_nf; +extern cpuop_func op_4279_48_ff; +extern cpuop_func op_4280_48_nf; +extern cpuop_func op_4280_48_ff; +extern cpuop_func op_4290_48_nf; +extern cpuop_func op_4290_48_ff; +extern cpuop_func op_4298_48_nf; +extern cpuop_func op_4298_48_ff; +extern cpuop_func op_42a0_48_nf; +extern cpuop_func op_42a0_48_ff; +extern cpuop_func op_42a8_48_nf; +extern cpuop_func op_42a8_48_ff; +extern cpuop_func op_42b0_48_nf; +extern cpuop_func op_42b0_48_ff; +extern cpuop_func op_42b8_48_nf; +extern cpuop_func op_42b8_48_ff; +extern cpuop_func op_42b9_48_nf; +extern cpuop_func op_42b9_48_ff; +extern cpuop_func op_44c0_48_nf; +extern cpuop_func op_44c0_48_ff; +extern cpuop_func op_44d0_48_nf; +extern cpuop_func op_44d0_48_ff; +extern cpuop_func op_44d8_48_nf; +extern cpuop_func op_44d8_48_ff; +extern cpuop_func op_44e0_48_nf; +extern cpuop_func op_44e0_48_ff; +extern cpuop_func op_44e8_48_nf; +extern cpuop_func op_44e8_48_ff; +extern cpuop_func op_44f0_48_nf; +extern cpuop_func op_44f0_48_ff; +extern cpuop_func op_44f8_48_nf; +extern cpuop_func op_44f8_48_ff; +extern cpuop_func op_44f9_48_nf; +extern cpuop_func op_44f9_48_ff; +extern cpuop_func op_44fa_48_nf; +extern cpuop_func op_44fa_48_ff; +extern cpuop_func op_44fb_48_nf; +extern cpuop_func op_44fb_48_ff; +extern cpuop_func op_44fc_48_nf; +extern cpuop_func op_44fc_48_ff; +extern cpuop_func op_46c0_48_nf; +extern cpuop_func op_46c0_48_ff; +extern cpuop_func op_46d0_48_nf; +extern cpuop_func op_46d0_48_ff; +extern cpuop_func op_46d8_48_nf; +extern cpuop_func op_46d8_48_ff; +extern cpuop_func op_46e0_48_nf; +extern cpuop_func op_46e0_48_ff; +extern cpuop_func op_46e8_48_nf; +extern cpuop_func op_46e8_48_ff; +extern cpuop_func op_46f0_48_nf; +extern cpuop_func op_46f0_48_ff; +extern cpuop_func op_46f8_48_nf; +extern cpuop_func op_46f8_48_ff; +extern cpuop_func op_46f9_48_nf; +extern cpuop_func op_46f9_48_ff; +extern cpuop_func op_46fa_48_nf; +extern cpuop_func op_46fa_48_ff; +extern cpuop_func op_46fb_48_nf; +extern cpuop_func op_46fb_48_ff; +extern cpuop_func op_46fc_48_nf; +extern cpuop_func op_46fc_48_ff; +extern cpuop_func op_4ac0_48_nf; +extern cpuop_func op_4ac0_48_ff; +extern cpuop_func op_4ad0_48_nf; +extern cpuop_func op_4ad0_48_ff; +extern cpuop_func op_4ad8_48_nf; +extern cpuop_func op_4ad8_48_ff; +extern cpuop_func op_4ae0_48_nf; +extern cpuop_func op_4ae0_48_ff; +extern cpuop_func op_4ae8_48_nf; +extern cpuop_func op_4ae8_48_ff; +extern cpuop_func op_4af0_48_nf; +extern cpuop_func op_4af0_48_ff; +extern cpuop_func op_4af8_48_nf; +extern cpuop_func op_4af8_48_ff; +extern cpuop_func op_4af9_48_nf; +extern cpuop_func op_4af9_48_ff; +extern cpuop_func op_4e60_48_nf; +extern cpuop_func op_4e60_48_ff; +extern cpuop_func op_4e68_48_nf; +extern cpuop_func op_4e68_48_ff; +extern cpuop_func op_4e72_48_nf; +extern cpuop_func op_4e72_48_ff; +extern cpuop_func op_4e75_48_nf; +extern cpuop_func op_4e75_48_ff; +extern cpuop_func op_4e76_48_nf; +extern cpuop_func op_4e76_48_ff; +extern cpuop_func op_4e90_48_nf; +extern cpuop_func op_4e90_48_ff; +extern cpuop_func op_4ea8_48_nf; +extern cpuop_func op_4ea8_48_ff; +extern cpuop_func op_4eb0_48_nf; +extern cpuop_func op_4eb0_48_ff; +extern cpuop_func op_4eb8_48_nf; +extern cpuop_func op_4eb8_48_ff; +extern cpuop_func op_4eb9_48_nf; +extern cpuop_func op_4eb9_48_ff; +extern cpuop_func op_4eba_48_nf; +extern cpuop_func op_4eba_48_ff; +extern cpuop_func op_4ebb_48_nf; +extern cpuop_func op_4ebb_48_ff; +extern cpuop_func op_4ed0_48_nf; +extern cpuop_func op_4ed0_48_ff; +extern cpuop_func op_4ee8_48_nf; +extern cpuop_func op_4ee8_48_ff; +extern cpuop_func op_4ef0_48_nf; +extern cpuop_func op_4ef0_48_ff; +extern cpuop_func op_4ef8_48_nf; +extern cpuop_func op_4ef8_48_ff; +extern cpuop_func op_4ef9_48_nf; +extern cpuop_func op_4ef9_48_ff; +extern cpuop_func op_4efa_48_nf; +extern cpuop_func op_4efa_48_ff; +extern cpuop_func op_4efb_48_nf; +extern cpuop_func op_4efb_48_ff; +extern cpuop_func op_5080_48_nf; +extern cpuop_func op_5080_48_ff; +extern cpuop_func op_50c0_48_nf; +extern cpuop_func op_50c0_48_ff; +extern cpuop_func op_50c8_48_nf; +extern cpuop_func op_50c8_48_ff; +extern cpuop_func op_50d0_48_nf; +extern cpuop_func op_50d0_48_ff; +extern cpuop_func op_50d8_48_nf; +extern cpuop_func op_50d8_48_ff; +extern cpuop_func op_50e0_48_nf; +extern cpuop_func op_50e0_48_ff; +extern cpuop_func op_50e8_48_nf; +extern cpuop_func op_50e8_48_ff; +extern cpuop_func op_50f0_48_nf; +extern cpuop_func op_50f0_48_ff; +extern cpuop_func op_50f8_48_nf; +extern cpuop_func op_50f8_48_ff; +extern cpuop_func op_50f9_48_nf; +extern cpuop_func op_50f9_48_ff; +extern cpuop_func op_5180_48_nf; +extern cpuop_func op_5180_48_ff; +extern cpuop_func op_51c0_48_nf; +extern cpuop_func op_51c0_48_ff; +extern cpuop_func op_51c8_48_nf; +extern cpuop_func op_51c8_48_ff; +extern cpuop_func op_51d0_48_nf; +extern cpuop_func op_51d0_48_ff; +extern cpuop_func op_51d8_48_nf; +extern cpuop_func op_51d8_48_ff; +extern cpuop_func op_51e0_48_nf; +extern cpuop_func op_51e0_48_ff; +extern cpuop_func op_51e8_48_nf; +extern cpuop_func op_51e8_48_ff; +extern cpuop_func op_51f0_48_nf; +extern cpuop_func op_51f0_48_ff; +extern cpuop_func op_51f8_48_nf; +extern cpuop_func op_51f8_48_ff; +extern cpuop_func op_51f9_48_nf; +extern cpuop_func op_51f9_48_ff; +extern cpuop_func op_52c0_48_nf; +extern cpuop_func op_52c0_48_ff; +extern cpuop_func op_52c8_48_nf; +extern cpuop_func op_52c8_48_ff; +extern cpuop_func op_52d0_48_nf; +extern cpuop_func op_52d0_48_ff; +extern cpuop_func op_52d8_48_nf; +extern cpuop_func op_52d8_48_ff; +extern cpuop_func op_52e0_48_nf; +extern cpuop_func op_52e0_48_ff; +extern cpuop_func op_52e8_48_nf; +extern cpuop_func op_52e8_48_ff; +extern cpuop_func op_52f0_48_nf; +extern cpuop_func op_52f0_48_ff; +extern cpuop_func op_52f8_48_nf; +extern cpuop_func op_52f8_48_ff; +extern cpuop_func op_52f9_48_nf; +extern cpuop_func op_52f9_48_ff; +extern cpuop_func op_53c0_48_nf; +extern cpuop_func op_53c0_48_ff; +extern cpuop_func op_53c8_48_nf; +extern cpuop_func op_53c8_48_ff; +extern cpuop_func op_53d0_48_nf; +extern cpuop_func op_53d0_48_ff; +extern cpuop_func op_53d8_48_nf; +extern cpuop_func op_53d8_48_ff; +extern cpuop_func op_53e0_48_nf; +extern cpuop_func op_53e0_48_ff; +extern cpuop_func op_53e8_48_nf; +extern cpuop_func op_53e8_48_ff; +extern cpuop_func op_53f0_48_nf; +extern cpuop_func op_53f0_48_ff; +extern cpuop_func op_53f8_48_nf; +extern cpuop_func op_53f8_48_ff; +extern cpuop_func op_53f9_48_nf; +extern cpuop_func op_53f9_48_ff; +extern cpuop_func op_54c0_48_nf; +extern cpuop_func op_54c0_48_ff; +extern cpuop_func op_54c8_48_nf; +extern cpuop_func op_54c8_48_ff; +extern cpuop_func op_54d0_48_nf; +extern cpuop_func op_54d0_48_ff; +extern cpuop_func op_54d8_48_nf; +extern cpuop_func op_54d8_48_ff; +extern cpuop_func op_54e0_48_nf; +extern cpuop_func op_54e0_48_ff; +extern cpuop_func op_54e8_48_nf; +extern cpuop_func op_54e8_48_ff; +extern cpuop_func op_54f0_48_nf; +extern cpuop_func op_54f0_48_ff; +extern cpuop_func op_54f8_48_nf; +extern cpuop_func op_54f8_48_ff; +extern cpuop_func op_54f9_48_nf; +extern cpuop_func op_54f9_48_ff; +extern cpuop_func op_55c0_48_nf; +extern cpuop_func op_55c0_48_ff; +extern cpuop_func op_55c8_48_nf; +extern cpuop_func op_55c8_48_ff; +extern cpuop_func op_55d0_48_nf; +extern cpuop_func op_55d0_48_ff; +extern cpuop_func op_55d8_48_nf; +extern cpuop_func op_55d8_48_ff; +extern cpuop_func op_55e0_48_nf; +extern cpuop_func op_55e0_48_ff; +extern cpuop_func op_55e8_48_nf; +extern cpuop_func op_55e8_48_ff; +extern cpuop_func op_55f0_48_nf; +extern cpuop_func op_55f0_48_ff; +extern cpuop_func op_55f8_48_nf; +extern cpuop_func op_55f8_48_ff; +extern cpuop_func op_55f9_48_nf; +extern cpuop_func op_55f9_48_ff; +extern cpuop_func op_56c0_48_nf; +extern cpuop_func op_56c0_48_ff; +extern cpuop_func op_56c8_48_nf; +extern cpuop_func op_56c8_48_ff; +extern cpuop_func op_56d0_48_nf; +extern cpuop_func op_56d0_48_ff; +extern cpuop_func op_56d8_48_nf; +extern cpuop_func op_56d8_48_ff; +extern cpuop_func op_56e0_48_nf; +extern cpuop_func op_56e0_48_ff; +extern cpuop_func op_56e8_48_nf; +extern cpuop_func op_56e8_48_ff; +extern cpuop_func op_56f0_48_nf; +extern cpuop_func op_56f0_48_ff; +extern cpuop_func op_56f8_48_nf; +extern cpuop_func op_56f8_48_ff; +extern cpuop_func op_56f9_48_nf; +extern cpuop_func op_56f9_48_ff; +extern cpuop_func op_57c0_48_nf; +extern cpuop_func op_57c0_48_ff; +extern cpuop_func op_57c8_48_nf; +extern cpuop_func op_57c8_48_ff; +extern cpuop_func op_57d0_48_nf; +extern cpuop_func op_57d0_48_ff; +extern cpuop_func op_57d8_48_nf; +extern cpuop_func op_57d8_48_ff; +extern cpuop_func op_57e0_48_nf; +extern cpuop_func op_57e0_48_ff; +extern cpuop_func op_57e8_48_nf; +extern cpuop_func op_57e8_48_ff; +extern cpuop_func op_57f0_48_nf; +extern cpuop_func op_57f0_48_ff; +extern cpuop_func op_57f8_48_nf; +extern cpuop_func op_57f8_48_ff; +extern cpuop_func op_57f9_48_nf; +extern cpuop_func op_57f9_48_ff; +extern cpuop_func op_58c0_48_nf; +extern cpuop_func op_58c0_48_ff; +extern cpuop_func op_58c8_48_nf; +extern cpuop_func op_58c8_48_ff; +extern cpuop_func op_58d0_48_nf; +extern cpuop_func op_58d0_48_ff; +extern cpuop_func op_58d8_48_nf; +extern cpuop_func op_58d8_48_ff; +extern cpuop_func op_58e0_48_nf; +extern cpuop_func op_58e0_48_ff; +extern cpuop_func op_58e8_48_nf; +extern cpuop_func op_58e8_48_ff; +extern cpuop_func op_58f0_48_nf; +extern cpuop_func op_58f0_48_ff; +extern cpuop_func op_58f8_48_nf; +extern cpuop_func op_58f8_48_ff; +extern cpuop_func op_58f9_48_nf; +extern cpuop_func op_58f9_48_ff; +extern cpuop_func op_59c0_48_nf; +extern cpuop_func op_59c0_48_ff; +extern cpuop_func op_59c8_48_nf; +extern cpuop_func op_59c8_48_ff; +extern cpuop_func op_59d0_48_nf; +extern cpuop_func op_59d0_48_ff; +extern cpuop_func op_59d8_48_nf; +extern cpuop_func op_59d8_48_ff; +extern cpuop_func op_59e0_48_nf; +extern cpuop_func op_59e0_48_ff; +extern cpuop_func op_59e8_48_nf; +extern cpuop_func op_59e8_48_ff; +extern cpuop_func op_59f0_48_nf; +extern cpuop_func op_59f0_48_ff; +extern cpuop_func op_59f8_48_nf; +extern cpuop_func op_59f8_48_ff; +extern cpuop_func op_59f9_48_nf; +extern cpuop_func op_59f9_48_ff; +extern cpuop_func op_5ac0_48_nf; +extern cpuop_func op_5ac0_48_ff; +extern cpuop_func op_5ac8_48_nf; +extern cpuop_func op_5ac8_48_ff; +extern cpuop_func op_5ad0_48_nf; +extern cpuop_func op_5ad0_48_ff; +extern cpuop_func op_5ad8_48_nf; +extern cpuop_func op_5ad8_48_ff; +extern cpuop_func op_5ae0_48_nf; +extern cpuop_func op_5ae0_48_ff; +extern cpuop_func op_5ae8_48_nf; +extern cpuop_func op_5ae8_48_ff; +extern cpuop_func op_5af0_48_nf; +extern cpuop_func op_5af0_48_ff; +extern cpuop_func op_5af8_48_nf; +extern cpuop_func op_5af8_48_ff; +extern cpuop_func op_5af9_48_nf; +extern cpuop_func op_5af9_48_ff; +extern cpuop_func op_5bc0_48_nf; +extern cpuop_func op_5bc0_48_ff; +extern cpuop_func op_5bc8_48_nf; +extern cpuop_func op_5bc8_48_ff; +extern cpuop_func op_5bd0_48_nf; +extern cpuop_func op_5bd0_48_ff; +extern cpuop_func op_5bd8_48_nf; +extern cpuop_func op_5bd8_48_ff; +extern cpuop_func op_5be0_48_nf; +extern cpuop_func op_5be0_48_ff; +extern cpuop_func op_5be8_48_nf; +extern cpuop_func op_5be8_48_ff; +extern cpuop_func op_5bf0_48_nf; +extern cpuop_func op_5bf0_48_ff; +extern cpuop_func op_5bf8_48_nf; +extern cpuop_func op_5bf8_48_ff; +extern cpuop_func op_5bf9_48_nf; +extern cpuop_func op_5bf9_48_ff; +extern cpuop_func op_5cc0_48_nf; +extern cpuop_func op_5cc0_48_ff; +extern cpuop_func op_5cc8_48_nf; +extern cpuop_func op_5cc8_48_ff; +extern cpuop_func op_5cd0_48_nf; +extern cpuop_func op_5cd0_48_ff; +extern cpuop_func op_5cd8_48_nf; +extern cpuop_func op_5cd8_48_ff; +extern cpuop_func op_5ce0_48_nf; +extern cpuop_func op_5ce0_48_ff; +extern cpuop_func op_5ce8_48_nf; +extern cpuop_func op_5ce8_48_ff; +extern cpuop_func op_5cf0_48_nf; +extern cpuop_func op_5cf0_48_ff; +extern cpuop_func op_5cf8_48_nf; +extern cpuop_func op_5cf8_48_ff; +extern cpuop_func op_5cf9_48_nf; +extern cpuop_func op_5cf9_48_ff; +extern cpuop_func op_5dc0_48_nf; +extern cpuop_func op_5dc0_48_ff; +extern cpuop_func op_5dc8_48_nf; +extern cpuop_func op_5dc8_48_ff; +extern cpuop_func op_5dd0_48_nf; +extern cpuop_func op_5dd0_48_ff; +extern cpuop_func op_5dd8_48_nf; +extern cpuop_func op_5dd8_48_ff; +extern cpuop_func op_5de0_48_nf; +extern cpuop_func op_5de0_48_ff; +extern cpuop_func op_5de8_48_nf; +extern cpuop_func op_5de8_48_ff; +extern cpuop_func op_5df0_48_nf; +extern cpuop_func op_5df0_48_ff; +extern cpuop_func op_5df8_48_nf; +extern cpuop_func op_5df8_48_ff; +extern cpuop_func op_5df9_48_nf; +extern cpuop_func op_5df9_48_ff; +extern cpuop_func op_5ec0_48_nf; +extern cpuop_func op_5ec0_48_ff; +extern cpuop_func op_5ec8_48_nf; +extern cpuop_func op_5ec8_48_ff; +extern cpuop_func op_5ed0_48_nf; +extern cpuop_func op_5ed0_48_ff; +extern cpuop_func op_5ed8_48_nf; +extern cpuop_func op_5ed8_48_ff; +extern cpuop_func op_5ee0_48_nf; +extern cpuop_func op_5ee0_48_ff; +extern cpuop_func op_5ee8_48_nf; +extern cpuop_func op_5ee8_48_ff; +extern cpuop_func op_5ef0_48_nf; +extern cpuop_func op_5ef0_48_ff; +extern cpuop_func op_5ef8_48_nf; +extern cpuop_func op_5ef8_48_ff; +extern cpuop_func op_5ef9_48_nf; +extern cpuop_func op_5ef9_48_ff; +extern cpuop_func op_5fc0_48_nf; +extern cpuop_func op_5fc0_48_ff; +extern cpuop_func op_5fc8_48_nf; +extern cpuop_func op_5fc8_48_ff; +extern cpuop_func op_5fd0_48_nf; +extern cpuop_func op_5fd0_48_ff; +extern cpuop_func op_5fd8_48_nf; +extern cpuop_func op_5fd8_48_ff; +extern cpuop_func op_5fe0_48_nf; +extern cpuop_func op_5fe0_48_ff; +extern cpuop_func op_5fe8_48_nf; +extern cpuop_func op_5fe8_48_ff; +extern cpuop_func op_5ff0_48_nf; +extern cpuop_func op_5ff0_48_ff; +extern cpuop_func op_5ff8_48_nf; +extern cpuop_func op_5ff8_48_ff; +extern cpuop_func op_5ff9_48_nf; +extern cpuop_func op_5ff9_48_ff; +extern cpuop_func op_6100_48_nf; +extern cpuop_func op_6100_48_ff; +extern cpuop_func op_6101_48_nf; +extern cpuop_func op_6101_48_ff; +extern cpuop_func op_61ff_48_nf; +extern cpuop_func op_61ff_48_ff; +extern cpuop_func op_8080_48_nf; +extern cpuop_func op_8080_48_ff; +extern cpuop_func op_8090_48_nf; +extern cpuop_func op_8090_48_ff; +extern cpuop_func op_8098_48_nf; +extern cpuop_func op_8098_48_ff; +extern cpuop_func op_80a0_48_nf; +extern cpuop_func op_80a0_48_ff; +extern cpuop_func op_80a8_48_nf; +extern cpuop_func op_80a8_48_ff; +extern cpuop_func op_80b0_48_nf; +extern cpuop_func op_80b0_48_ff; +extern cpuop_func op_80b8_48_nf; +extern cpuop_func op_80b8_48_ff; +extern cpuop_func op_80b9_48_nf; +extern cpuop_func op_80b9_48_ff; +extern cpuop_func op_80ba_48_nf; +extern cpuop_func op_80ba_48_ff; +extern cpuop_func op_80bb_48_nf; +extern cpuop_func op_80bb_48_ff; +extern cpuop_func op_80bc_48_nf; +extern cpuop_func op_80bc_48_ff; +extern cpuop_func op_9080_48_nf; +extern cpuop_func op_9080_48_ff; +extern cpuop_func op_9088_48_nf; +extern cpuop_func op_9088_48_ff; +extern cpuop_func op_9090_48_nf; +extern cpuop_func op_9090_48_ff; +extern cpuop_func op_9098_48_nf; +extern cpuop_func op_9098_48_ff; +extern cpuop_func op_90a0_48_nf; +extern cpuop_func op_90a0_48_ff; +extern cpuop_func op_90a8_48_nf; +extern cpuop_func op_90a8_48_ff; +extern cpuop_func op_90b0_48_nf; +extern cpuop_func op_90b0_48_ff; +extern cpuop_func op_90b8_48_nf; +extern cpuop_func op_90b8_48_ff; +extern cpuop_func op_90b9_48_nf; +extern cpuop_func op_90b9_48_ff; +extern cpuop_func op_90ba_48_nf; +extern cpuop_func op_90ba_48_ff; +extern cpuop_func op_90bb_48_nf; +extern cpuop_func op_90bb_48_ff; +extern cpuop_func op_90bc_48_nf; +extern cpuop_func op_90bc_48_ff; +extern cpuop_func op_9100_48_nf; +extern cpuop_func op_9100_48_ff; +extern cpuop_func op_9108_48_nf; +extern cpuop_func op_9108_48_ff; +extern cpuop_func op_9140_48_nf; +extern cpuop_func op_9140_48_ff; +extern cpuop_func op_9148_48_nf; +extern cpuop_func op_9148_48_ff; +extern cpuop_func op_9180_48_nf; +extern cpuop_func op_9180_48_ff; +extern cpuop_func op_9188_48_nf; +extern cpuop_func op_9188_48_ff; +extern cpuop_func op_b180_48_nf; +extern cpuop_func op_b180_48_ff; +extern cpuop_func op_c080_48_nf; +extern cpuop_func op_c080_48_ff; +extern cpuop_func op_c090_48_nf; +extern cpuop_func op_c090_48_ff; +extern cpuop_func op_c098_48_nf; +extern cpuop_func op_c098_48_ff; +extern cpuop_func op_c0a0_48_nf; +extern cpuop_func op_c0a0_48_ff; +extern cpuop_func op_c0a8_48_nf; +extern cpuop_func op_c0a8_48_ff; +extern cpuop_func op_c0b0_48_nf; +extern cpuop_func op_c0b0_48_ff; +extern cpuop_func op_c0b8_48_nf; +extern cpuop_func op_c0b8_48_ff; +extern cpuop_func op_c0b9_48_nf; +extern cpuop_func op_c0b9_48_ff; +extern cpuop_func op_c0ba_48_nf; +extern cpuop_func op_c0ba_48_ff; +extern cpuop_func op_c0bb_48_nf; +extern cpuop_func op_c0bb_48_ff; +extern cpuop_func op_c0bc_48_nf; +extern cpuop_func op_c0bc_48_ff; +extern cpuop_func op_d080_48_nf; +extern cpuop_func op_d080_48_ff; +extern cpuop_func op_d088_48_nf; +extern cpuop_func op_d088_48_ff; +extern cpuop_func op_d090_48_nf; +extern cpuop_func op_d090_48_ff; +extern cpuop_func op_d098_48_nf; +extern cpuop_func op_d098_48_ff; +extern cpuop_func op_d0a0_48_nf; +extern cpuop_func op_d0a0_48_ff; +extern cpuop_func op_d0a8_48_nf; +extern cpuop_func op_d0a8_48_ff; +extern cpuop_func op_d0b0_48_nf; +extern cpuop_func op_d0b0_48_ff; +extern cpuop_func op_d0b8_48_nf; +extern cpuop_func op_d0b8_48_ff; +extern cpuop_func op_d0b9_48_nf; +extern cpuop_func op_d0b9_48_ff; +extern cpuop_func op_d0ba_48_nf; +extern cpuop_func op_d0ba_48_ff; +extern cpuop_func op_d0bb_48_nf; +extern cpuop_func op_d0bb_48_ff; +extern cpuop_func op_d0bc_48_nf; +extern cpuop_func op_d0bc_48_ff; +extern cpuop_func op_d100_48_nf; +extern cpuop_func op_d100_48_ff; +extern cpuop_func op_d108_48_nf; +extern cpuop_func op_d108_48_ff; +extern cpuop_func op_d140_48_nf; +extern cpuop_func op_d140_48_ff; +extern cpuop_func op_d148_48_nf; +extern cpuop_func op_d148_48_ff; +extern cpuop_func op_d180_48_nf; +extern cpuop_func op_d180_48_ff; +extern cpuop_func op_d188_48_nf; +extern cpuop_func op_d188_48_ff; +extern cpuop_func op_0080_49_nf; +extern cpuop_func op_0080_49_ff; +extern cpuop_func op_0108_49_nf; +extern cpuop_func op_0108_49_ff; +extern cpuop_func op_0148_49_nf; +extern cpuop_func op_0148_49_ff; +extern cpuop_func op_0188_49_nf; +extern cpuop_func op_0188_49_ff; +extern cpuop_func op_0190_49_nf; +extern cpuop_func op_0190_49_ff; +extern cpuop_func op_0198_49_nf; +extern cpuop_func op_0198_49_ff; +extern cpuop_func op_01a0_49_nf; +extern cpuop_func op_01a0_49_ff; +extern cpuop_func op_01a8_49_nf; +extern cpuop_func op_01a8_49_ff; +extern cpuop_func op_01b0_49_nf; +extern cpuop_func op_01b0_49_ff; +extern cpuop_func op_01b8_49_nf; +extern cpuop_func op_01b8_49_ff; +extern cpuop_func op_01b9_49_nf; +extern cpuop_func op_01b9_49_ff; +extern cpuop_func op_01c8_49_nf; +extern cpuop_func op_01c8_49_ff; +extern cpuop_func op_0280_49_nf; +extern cpuop_func op_0280_49_ff; +extern cpuop_func op_0480_49_nf; +extern cpuop_func op_0480_49_ff; +extern cpuop_func op_0680_49_nf; +extern cpuop_func op_0680_49_ff; +extern cpuop_func op_0890_49_nf; +extern cpuop_func op_0890_49_ff; +extern cpuop_func op_0898_49_nf; +extern cpuop_func op_0898_49_ff; +extern cpuop_func op_08a0_49_nf; +extern cpuop_func op_08a0_49_ff; +extern cpuop_func op_08a8_49_nf; +extern cpuop_func op_08a8_49_ff; +extern cpuop_func op_08b0_49_nf; +extern cpuop_func op_08b0_49_ff; +extern cpuop_func op_08b8_49_nf; +extern cpuop_func op_08b8_49_ff; +extern cpuop_func op_08b9_49_nf; +extern cpuop_func op_08b9_49_ff; +extern cpuop_func op_0a80_49_nf; +extern cpuop_func op_0a80_49_ff; +extern cpuop_func op_40c0_49_nf; +extern cpuop_func op_40c0_49_ff; +extern cpuop_func op_40d0_49_nf; +extern cpuop_func op_40d0_49_ff; +extern cpuop_func op_40d8_49_nf; +extern cpuop_func op_40d8_49_ff; +extern cpuop_func op_40e0_49_nf; +extern cpuop_func op_40e0_49_ff; +extern cpuop_func op_40e8_49_nf; +extern cpuop_func op_40e8_49_ff; +extern cpuop_func op_40f0_49_nf; +extern cpuop_func op_40f0_49_ff; +extern cpuop_func op_40f8_49_nf; +extern cpuop_func op_40f8_49_ff; +extern cpuop_func op_40f9_49_nf; +extern cpuop_func op_40f9_49_ff; +extern cpuop_func op_41f9_49_nf; +extern cpuop_func op_41f9_49_ff; +extern cpuop_func op_4200_49_nf; +extern cpuop_func op_4200_49_ff; +extern cpuop_func op_4210_49_nf; +extern cpuop_func op_4210_49_ff; +extern cpuop_func op_4218_49_nf; +extern cpuop_func op_4218_49_ff; +extern cpuop_func op_4220_49_nf; +extern cpuop_func op_4220_49_ff; +extern cpuop_func op_4228_49_nf; +extern cpuop_func op_4228_49_ff; +extern cpuop_func op_4230_49_nf; +extern cpuop_func op_4230_49_ff; +extern cpuop_func op_4238_49_nf; +extern cpuop_func op_4238_49_ff; +extern cpuop_func op_4239_49_nf; +extern cpuop_func op_4239_49_ff; +extern cpuop_func op_4240_49_nf; +extern cpuop_func op_4240_49_ff; +extern cpuop_func op_4250_49_nf; +extern cpuop_func op_4250_49_ff; +extern cpuop_func op_4258_49_nf; +extern cpuop_func op_4258_49_ff; +extern cpuop_func op_4260_49_nf; +extern cpuop_func op_4260_49_ff; +extern cpuop_func op_4268_49_nf; +extern cpuop_func op_4268_49_ff; +extern cpuop_func op_4270_49_nf; +extern cpuop_func op_4270_49_ff; +extern cpuop_func op_4278_49_nf; +extern cpuop_func op_4278_49_ff; +extern cpuop_func op_4279_49_nf; +extern cpuop_func op_4279_49_ff; +extern cpuop_func op_4280_49_nf; +extern cpuop_func op_4280_49_ff; +extern cpuop_func op_4290_49_nf; +extern cpuop_func op_4290_49_ff; +extern cpuop_func op_4298_49_nf; +extern cpuop_func op_4298_49_ff; +extern cpuop_func op_42a0_49_nf; +extern cpuop_func op_42a0_49_ff; +extern cpuop_func op_42a8_49_nf; +extern cpuop_func op_42a8_49_ff; +extern cpuop_func op_42b0_49_nf; +extern cpuop_func op_42b0_49_ff; +extern cpuop_func op_42b8_49_nf; +extern cpuop_func op_42b8_49_ff; +extern cpuop_func op_42b9_49_nf; +extern cpuop_func op_42b9_49_ff; +extern cpuop_func op_44c0_49_nf; +extern cpuop_func op_44c0_49_ff; +extern cpuop_func op_44d0_49_nf; +extern cpuop_func op_44d0_49_ff; +extern cpuop_func op_44d8_49_nf; +extern cpuop_func op_44d8_49_ff; +extern cpuop_func op_44e0_49_nf; +extern cpuop_func op_44e0_49_ff; +extern cpuop_func op_44e8_49_nf; +extern cpuop_func op_44e8_49_ff; +extern cpuop_func op_44f0_49_nf; +extern cpuop_func op_44f0_49_ff; +extern cpuop_func op_44f8_49_nf; +extern cpuop_func op_44f8_49_ff; +extern cpuop_func op_44f9_49_nf; +extern cpuop_func op_44f9_49_ff; +extern cpuop_func op_44fa_49_nf; +extern cpuop_func op_44fa_49_ff; +extern cpuop_func op_44fb_49_nf; +extern cpuop_func op_44fb_49_ff; +extern cpuop_func op_44fc_49_nf; +extern cpuop_func op_44fc_49_ff; +extern cpuop_func op_46c0_49_nf; +extern cpuop_func op_46c0_49_ff; +extern cpuop_func op_46d0_49_nf; +extern cpuop_func op_46d0_49_ff; +extern cpuop_func op_46d8_49_nf; +extern cpuop_func op_46d8_49_ff; +extern cpuop_func op_46e0_49_nf; +extern cpuop_func op_46e0_49_ff; +extern cpuop_func op_46e8_49_nf; +extern cpuop_func op_46e8_49_ff; +extern cpuop_func op_46f0_49_nf; +extern cpuop_func op_46f0_49_ff; +extern cpuop_func op_46f8_49_nf; +extern cpuop_func op_46f8_49_ff; +extern cpuop_func op_46f9_49_nf; +extern cpuop_func op_46f9_49_ff; +extern cpuop_func op_46fa_49_nf; +extern cpuop_func op_46fa_49_ff; +extern cpuop_func op_46fb_49_nf; +extern cpuop_func op_46fb_49_ff; +extern cpuop_func op_46fc_49_nf; +extern cpuop_func op_46fc_49_ff; +extern cpuop_func op_4ac0_49_nf; +extern cpuop_func op_4ac0_49_ff; +extern cpuop_func op_4ad0_49_nf; +extern cpuop_func op_4ad0_49_ff; +extern cpuop_func op_4ad8_49_nf; +extern cpuop_func op_4ad8_49_ff; +extern cpuop_func op_4ae0_49_nf; +extern cpuop_func op_4ae0_49_ff; +extern cpuop_func op_4ae8_49_nf; +extern cpuop_func op_4ae8_49_ff; +extern cpuop_func op_4af0_49_nf; +extern cpuop_func op_4af0_49_ff; +extern cpuop_func op_4af8_49_nf; +extern cpuop_func op_4af8_49_ff; +extern cpuop_func op_4af9_49_nf; +extern cpuop_func op_4af9_49_ff; +extern cpuop_func op_4e60_49_nf; +extern cpuop_func op_4e60_49_ff; +extern cpuop_func op_4e68_49_nf; +extern cpuop_func op_4e68_49_ff; +extern cpuop_func op_4e72_49_nf; +extern cpuop_func op_4e72_49_ff; +extern cpuop_func op_4e75_49_nf; +extern cpuop_func op_4e75_49_ff; +extern cpuop_func op_4e76_49_nf; +extern cpuop_func op_4e76_49_ff; +extern cpuop_func op_4e90_49_nf; +extern cpuop_func op_4e90_49_ff; +extern cpuop_func op_4ea8_49_nf; +extern cpuop_func op_4ea8_49_ff; +extern cpuop_func op_4eb0_49_nf; +extern cpuop_func op_4eb0_49_ff; +extern cpuop_func op_4eb8_49_nf; +extern cpuop_func op_4eb8_49_ff; +extern cpuop_func op_4eb9_49_nf; +extern cpuop_func op_4eb9_49_ff; +extern cpuop_func op_4eba_49_nf; +extern cpuop_func op_4eba_49_ff; +extern cpuop_func op_4ebb_49_nf; +extern cpuop_func op_4ebb_49_ff; +extern cpuop_func op_4ed0_49_nf; +extern cpuop_func op_4ed0_49_ff; +extern cpuop_func op_4ee8_49_nf; +extern cpuop_func op_4ee8_49_ff; +extern cpuop_func op_4ef0_49_nf; +extern cpuop_func op_4ef0_49_ff; +extern cpuop_func op_4ef8_49_nf; +extern cpuop_func op_4ef8_49_ff; +extern cpuop_func op_4ef9_49_nf; +extern cpuop_func op_4ef9_49_ff; +extern cpuop_func op_4efa_49_nf; +extern cpuop_func op_4efa_49_ff; +extern cpuop_func op_4efb_49_nf; +extern cpuop_func op_4efb_49_ff; +extern cpuop_func op_5080_49_nf; +extern cpuop_func op_5080_49_ff; +extern cpuop_func op_50c0_49_nf; +extern cpuop_func op_50c0_49_ff; +extern cpuop_func op_50c8_49_nf; +extern cpuop_func op_50c8_49_ff; +extern cpuop_func op_50d0_49_nf; +extern cpuop_func op_50d0_49_ff; +extern cpuop_func op_50d8_49_nf; +extern cpuop_func op_50d8_49_ff; +extern cpuop_func op_50e0_49_nf; +extern cpuop_func op_50e0_49_ff; +extern cpuop_func op_50e8_49_nf; +extern cpuop_func op_50e8_49_ff; +extern cpuop_func op_50f0_49_nf; +extern cpuop_func op_50f0_49_ff; +extern cpuop_func op_50f8_49_nf; +extern cpuop_func op_50f8_49_ff; +extern cpuop_func op_50f9_49_nf; +extern cpuop_func op_50f9_49_ff; +extern cpuop_func op_5180_49_nf; +extern cpuop_func op_5180_49_ff; +extern cpuop_func op_51c0_49_nf; +extern cpuop_func op_51c0_49_ff; +extern cpuop_func op_51c8_49_nf; +extern cpuop_func op_51c8_49_ff; +extern cpuop_func op_51d0_49_nf; +extern cpuop_func op_51d0_49_ff; +extern cpuop_func op_51d8_49_nf; +extern cpuop_func op_51d8_49_ff; +extern cpuop_func op_51e0_49_nf; +extern cpuop_func op_51e0_49_ff; +extern cpuop_func op_51e8_49_nf; +extern cpuop_func op_51e8_49_ff; +extern cpuop_func op_51f0_49_nf; +extern cpuop_func op_51f0_49_ff; +extern cpuop_func op_51f8_49_nf; +extern cpuop_func op_51f8_49_ff; +extern cpuop_func op_51f9_49_nf; +extern cpuop_func op_51f9_49_ff; +extern cpuop_func op_52c0_49_nf; +extern cpuop_func op_52c0_49_ff; +extern cpuop_func op_52c8_49_nf; +extern cpuop_func op_52c8_49_ff; +extern cpuop_func op_52d0_49_nf; +extern cpuop_func op_52d0_49_ff; +extern cpuop_func op_52d8_49_nf; +extern cpuop_func op_52d8_49_ff; +extern cpuop_func op_52e0_49_nf; +extern cpuop_func op_52e0_49_ff; +extern cpuop_func op_52e8_49_nf; +extern cpuop_func op_52e8_49_ff; +extern cpuop_func op_52f0_49_nf; +extern cpuop_func op_52f0_49_ff; +extern cpuop_func op_52f8_49_nf; +extern cpuop_func op_52f8_49_ff; +extern cpuop_func op_52f9_49_nf; +extern cpuop_func op_52f9_49_ff; +extern cpuop_func op_53c0_49_nf; +extern cpuop_func op_53c0_49_ff; +extern cpuop_func op_53c8_49_nf; +extern cpuop_func op_53c8_49_ff; +extern cpuop_func op_53d0_49_nf; +extern cpuop_func op_53d0_49_ff; +extern cpuop_func op_53d8_49_nf; +extern cpuop_func op_53d8_49_ff; +extern cpuop_func op_53e0_49_nf; +extern cpuop_func op_53e0_49_ff; +extern cpuop_func op_53e8_49_nf; +extern cpuop_func op_53e8_49_ff; +extern cpuop_func op_53f0_49_nf; +extern cpuop_func op_53f0_49_ff; +extern cpuop_func op_53f8_49_nf; +extern cpuop_func op_53f8_49_ff; +extern cpuop_func op_53f9_49_nf; +extern cpuop_func op_53f9_49_ff; +extern cpuop_func op_54c0_49_nf; +extern cpuop_func op_54c0_49_ff; +extern cpuop_func op_54c8_49_nf; +extern cpuop_func op_54c8_49_ff; +extern cpuop_func op_54d0_49_nf; +extern cpuop_func op_54d0_49_ff; +extern cpuop_func op_54d8_49_nf; +extern cpuop_func op_54d8_49_ff; +extern cpuop_func op_54e0_49_nf; +extern cpuop_func op_54e0_49_ff; +extern cpuop_func op_54e8_49_nf; +extern cpuop_func op_54e8_49_ff; +extern cpuop_func op_54f0_49_nf; +extern cpuop_func op_54f0_49_ff; +extern cpuop_func op_54f8_49_nf; +extern cpuop_func op_54f8_49_ff; +extern cpuop_func op_54f9_49_nf; +extern cpuop_func op_54f9_49_ff; +extern cpuop_func op_55c0_49_nf; +extern cpuop_func op_55c0_49_ff; +extern cpuop_func op_55c8_49_nf; +extern cpuop_func op_55c8_49_ff; +extern cpuop_func op_55d0_49_nf; +extern cpuop_func op_55d0_49_ff; +extern cpuop_func op_55d8_49_nf; +extern cpuop_func op_55d8_49_ff; +extern cpuop_func op_55e0_49_nf; +extern cpuop_func op_55e0_49_ff; +extern cpuop_func op_55e8_49_nf; +extern cpuop_func op_55e8_49_ff; +extern cpuop_func op_55f0_49_nf; +extern cpuop_func op_55f0_49_ff; +extern cpuop_func op_55f8_49_nf; +extern cpuop_func op_55f8_49_ff; +extern cpuop_func op_55f9_49_nf; +extern cpuop_func op_55f9_49_ff; +extern cpuop_func op_56c0_49_nf; +extern cpuop_func op_56c0_49_ff; +extern cpuop_func op_56c8_49_nf; +extern cpuop_func op_56c8_49_ff; +extern cpuop_func op_56d0_49_nf; +extern cpuop_func op_56d0_49_ff; +extern cpuop_func op_56d8_49_nf; +extern cpuop_func op_56d8_49_ff; +extern cpuop_func op_56e0_49_nf; +extern cpuop_func op_56e0_49_ff; +extern cpuop_func op_56e8_49_nf; +extern cpuop_func op_56e8_49_ff; +extern cpuop_func op_56f0_49_nf; +extern cpuop_func op_56f0_49_ff; +extern cpuop_func op_56f8_49_nf; +extern cpuop_func op_56f8_49_ff; +extern cpuop_func op_56f9_49_nf; +extern cpuop_func op_56f9_49_ff; +extern cpuop_func op_57c0_49_nf; +extern cpuop_func op_57c0_49_ff; +extern cpuop_func op_57c8_49_nf; +extern cpuop_func op_57c8_49_ff; +extern cpuop_func op_57d0_49_nf; +extern cpuop_func op_57d0_49_ff; +extern cpuop_func op_57d8_49_nf; +extern cpuop_func op_57d8_49_ff; +extern cpuop_func op_57e0_49_nf; +extern cpuop_func op_57e0_49_ff; +extern cpuop_func op_57e8_49_nf; +extern cpuop_func op_57e8_49_ff; +extern cpuop_func op_57f0_49_nf; +extern cpuop_func op_57f0_49_ff; +extern cpuop_func op_57f8_49_nf; +extern cpuop_func op_57f8_49_ff; +extern cpuop_func op_57f9_49_nf; +extern cpuop_func op_57f9_49_ff; +extern cpuop_func op_58c0_49_nf; +extern cpuop_func op_58c0_49_ff; +extern cpuop_func op_58c8_49_nf; +extern cpuop_func op_58c8_49_ff; +extern cpuop_func op_58d0_49_nf; +extern cpuop_func op_58d0_49_ff; +extern cpuop_func op_58d8_49_nf; +extern cpuop_func op_58d8_49_ff; +extern cpuop_func op_58e0_49_nf; +extern cpuop_func op_58e0_49_ff; +extern cpuop_func op_58e8_49_nf; +extern cpuop_func op_58e8_49_ff; +extern cpuop_func op_58f0_49_nf; +extern cpuop_func op_58f0_49_ff; +extern cpuop_func op_58f8_49_nf; +extern cpuop_func op_58f8_49_ff; +extern cpuop_func op_58f9_49_nf; +extern cpuop_func op_58f9_49_ff; +extern cpuop_func op_59c0_49_nf; +extern cpuop_func op_59c0_49_ff; +extern cpuop_func op_59c8_49_nf; +extern cpuop_func op_59c8_49_ff; +extern cpuop_func op_59d0_49_nf; +extern cpuop_func op_59d0_49_ff; +extern cpuop_func op_59d8_49_nf; +extern cpuop_func op_59d8_49_ff; +extern cpuop_func op_59e0_49_nf; +extern cpuop_func op_59e0_49_ff; +extern cpuop_func op_59e8_49_nf; +extern cpuop_func op_59e8_49_ff; +extern cpuop_func op_59f0_49_nf; +extern cpuop_func op_59f0_49_ff; +extern cpuop_func op_59f8_49_nf; +extern cpuop_func op_59f8_49_ff; +extern cpuop_func op_59f9_49_nf; +extern cpuop_func op_59f9_49_ff; +extern cpuop_func op_5ac0_49_nf; +extern cpuop_func op_5ac0_49_ff; +extern cpuop_func op_5ac8_49_nf; +extern cpuop_func op_5ac8_49_ff; +extern cpuop_func op_5ad0_49_nf; +extern cpuop_func op_5ad0_49_ff; +extern cpuop_func op_5ad8_49_nf; +extern cpuop_func op_5ad8_49_ff; +extern cpuop_func op_5ae0_49_nf; +extern cpuop_func op_5ae0_49_ff; +extern cpuop_func op_5ae8_49_nf; +extern cpuop_func op_5ae8_49_ff; +extern cpuop_func op_5af0_49_nf; +extern cpuop_func op_5af0_49_ff; +extern cpuop_func op_5af8_49_nf; +extern cpuop_func op_5af8_49_ff; +extern cpuop_func op_5af9_49_nf; +extern cpuop_func op_5af9_49_ff; +extern cpuop_func op_5bc0_49_nf; +extern cpuop_func op_5bc0_49_ff; +extern cpuop_func op_5bc8_49_nf; +extern cpuop_func op_5bc8_49_ff; +extern cpuop_func op_5bd0_49_nf; +extern cpuop_func op_5bd0_49_ff; +extern cpuop_func op_5bd8_49_nf; +extern cpuop_func op_5bd8_49_ff; +extern cpuop_func op_5be0_49_nf; +extern cpuop_func op_5be0_49_ff; +extern cpuop_func op_5be8_49_nf; +extern cpuop_func op_5be8_49_ff; +extern cpuop_func op_5bf0_49_nf; +extern cpuop_func op_5bf0_49_ff; +extern cpuop_func op_5bf8_49_nf; +extern cpuop_func op_5bf8_49_ff; +extern cpuop_func op_5bf9_49_nf; +extern cpuop_func op_5bf9_49_ff; +extern cpuop_func op_5cc0_49_nf; +extern cpuop_func op_5cc0_49_ff; +extern cpuop_func op_5cc8_49_nf; +extern cpuop_func op_5cc8_49_ff; +extern cpuop_func op_5cd0_49_nf; +extern cpuop_func op_5cd0_49_ff; +extern cpuop_func op_5cd8_49_nf; +extern cpuop_func op_5cd8_49_ff; +extern cpuop_func op_5ce0_49_nf; +extern cpuop_func op_5ce0_49_ff; +extern cpuop_func op_5ce8_49_nf; +extern cpuop_func op_5ce8_49_ff; +extern cpuop_func op_5cf0_49_nf; +extern cpuop_func op_5cf0_49_ff; +extern cpuop_func op_5cf8_49_nf; +extern cpuop_func op_5cf8_49_ff; +extern cpuop_func op_5cf9_49_nf; +extern cpuop_func op_5cf9_49_ff; +extern cpuop_func op_5dc0_49_nf; +extern cpuop_func op_5dc0_49_ff; +extern cpuop_func op_5dc8_49_nf; +extern cpuop_func op_5dc8_49_ff; +extern cpuop_func op_5dd0_49_nf; +extern cpuop_func op_5dd0_49_ff; +extern cpuop_func op_5dd8_49_nf; +extern cpuop_func op_5dd8_49_ff; +extern cpuop_func op_5de0_49_nf; +extern cpuop_func op_5de0_49_ff; +extern cpuop_func op_5de8_49_nf; +extern cpuop_func op_5de8_49_ff; +extern cpuop_func op_5df0_49_nf; +extern cpuop_func op_5df0_49_ff; +extern cpuop_func op_5df8_49_nf; +extern cpuop_func op_5df8_49_ff; +extern cpuop_func op_5df9_49_nf; +extern cpuop_func op_5df9_49_ff; +extern cpuop_func op_5ec0_49_nf; +extern cpuop_func op_5ec0_49_ff; +extern cpuop_func op_5ec8_49_nf; +extern cpuop_func op_5ec8_49_ff; +extern cpuop_func op_5ed0_49_nf; +extern cpuop_func op_5ed0_49_ff; +extern cpuop_func op_5ed8_49_nf; +extern cpuop_func op_5ed8_49_ff; +extern cpuop_func op_5ee0_49_nf; +extern cpuop_func op_5ee0_49_ff; +extern cpuop_func op_5ee8_49_nf; +extern cpuop_func op_5ee8_49_ff; +extern cpuop_func op_5ef0_49_nf; +extern cpuop_func op_5ef0_49_ff; +extern cpuop_func op_5ef8_49_nf; +extern cpuop_func op_5ef8_49_ff; +extern cpuop_func op_5ef9_49_nf; +extern cpuop_func op_5ef9_49_ff; +extern cpuop_func op_5fc0_49_nf; +extern cpuop_func op_5fc0_49_ff; +extern cpuop_func op_5fc8_49_nf; +extern cpuop_func op_5fc8_49_ff; +extern cpuop_func op_5fd0_49_nf; +extern cpuop_func op_5fd0_49_ff; +extern cpuop_func op_5fd8_49_nf; +extern cpuop_func op_5fd8_49_ff; +extern cpuop_func op_5fe0_49_nf; +extern cpuop_func op_5fe0_49_ff; +extern cpuop_func op_5fe8_49_nf; +extern cpuop_func op_5fe8_49_ff; +extern cpuop_func op_5ff0_49_nf; +extern cpuop_func op_5ff0_49_ff; +extern cpuop_func op_5ff8_49_nf; +extern cpuop_func op_5ff8_49_ff; +extern cpuop_func op_5ff9_49_nf; +extern cpuop_func op_5ff9_49_ff; +extern cpuop_func op_6100_49_nf; +extern cpuop_func op_6100_49_ff; +extern cpuop_func op_6101_49_nf; +extern cpuop_func op_6101_49_ff; +extern cpuop_func op_61ff_49_nf; +extern cpuop_func op_61ff_49_ff; +extern cpuop_func op_8080_49_nf; +extern cpuop_func op_8080_49_ff; +extern cpuop_func op_8090_49_nf; +extern cpuop_func op_8090_49_ff; +extern cpuop_func op_8098_49_nf; +extern cpuop_func op_8098_49_ff; +extern cpuop_func op_80a0_49_nf; +extern cpuop_func op_80a0_49_ff; +extern cpuop_func op_80a8_49_nf; +extern cpuop_func op_80a8_49_ff; +extern cpuop_func op_80b0_49_nf; +extern cpuop_func op_80b0_49_ff; +extern cpuop_func op_80b8_49_nf; +extern cpuop_func op_80b8_49_ff; +extern cpuop_func op_80b9_49_nf; +extern cpuop_func op_80b9_49_ff; +extern cpuop_func op_80ba_49_nf; +extern cpuop_func op_80ba_49_ff; +extern cpuop_func op_80bb_49_nf; +extern cpuop_func op_80bb_49_ff; +extern cpuop_func op_80bc_49_nf; +extern cpuop_func op_80bc_49_ff; +extern cpuop_func op_9080_49_nf; +extern cpuop_func op_9080_49_ff; +extern cpuop_func op_9088_49_nf; +extern cpuop_func op_9088_49_ff; +extern cpuop_func op_9090_49_nf; +extern cpuop_func op_9090_49_ff; +extern cpuop_func op_9098_49_nf; +extern cpuop_func op_9098_49_ff; +extern cpuop_func op_90a0_49_nf; +extern cpuop_func op_90a0_49_ff; +extern cpuop_func op_90a8_49_nf; +extern cpuop_func op_90a8_49_ff; +extern cpuop_func op_90b0_49_nf; +extern cpuop_func op_90b0_49_ff; +extern cpuop_func op_90b8_49_nf; +extern cpuop_func op_90b8_49_ff; +extern cpuop_func op_90b9_49_nf; +extern cpuop_func op_90b9_49_ff; +extern cpuop_func op_90ba_49_nf; +extern cpuop_func op_90ba_49_ff; +extern cpuop_func op_90bb_49_nf; +extern cpuop_func op_90bb_49_ff; +extern cpuop_func op_90bc_49_nf; +extern cpuop_func op_90bc_49_ff; +extern cpuop_func op_9100_49_nf; +extern cpuop_func op_9100_49_ff; +extern cpuop_func op_9108_49_nf; +extern cpuop_func op_9108_49_ff; +extern cpuop_func op_9140_49_nf; +extern cpuop_func op_9140_49_ff; +extern cpuop_func op_9148_49_nf; +extern cpuop_func op_9148_49_ff; +extern cpuop_func op_9180_49_nf; +extern cpuop_func op_9180_49_ff; +extern cpuop_func op_9188_49_nf; +extern cpuop_func op_9188_49_ff; +extern cpuop_func op_b180_49_nf; +extern cpuop_func op_b180_49_ff; +extern cpuop_func op_c080_49_nf; +extern cpuop_func op_c080_49_ff; +extern cpuop_func op_c090_49_nf; +extern cpuop_func op_c090_49_ff; +extern cpuop_func op_c098_49_nf; +extern cpuop_func op_c098_49_ff; +extern cpuop_func op_c0a0_49_nf; +extern cpuop_func op_c0a0_49_ff; +extern cpuop_func op_c0a8_49_nf; +extern cpuop_func op_c0a8_49_ff; +extern cpuop_func op_c0b0_49_nf; +extern cpuop_func op_c0b0_49_ff; +extern cpuop_func op_c0b8_49_nf; +extern cpuop_func op_c0b8_49_ff; +extern cpuop_func op_c0b9_49_nf; +extern cpuop_func op_c0b9_49_ff; +extern cpuop_func op_c0ba_49_nf; +extern cpuop_func op_c0ba_49_ff; +extern cpuop_func op_c0bb_49_nf; +extern cpuop_func op_c0bb_49_ff; +extern cpuop_func op_c0bc_49_nf; +extern cpuop_func op_c0bc_49_ff; +extern cpuop_func op_d080_49_nf; +extern cpuop_func op_d080_49_ff; +extern cpuop_func op_d088_49_nf; +extern cpuop_func op_d088_49_ff; +extern cpuop_func op_d090_49_nf; +extern cpuop_func op_d090_49_ff; +extern cpuop_func op_d098_49_nf; +extern cpuop_func op_d098_49_ff; +extern cpuop_func op_d0a0_49_nf; +extern cpuop_func op_d0a0_49_ff; +extern cpuop_func op_d0a8_49_nf; +extern cpuop_func op_d0a8_49_ff; +extern cpuop_func op_d0b0_49_nf; +extern cpuop_func op_d0b0_49_ff; +extern cpuop_func op_d0b8_49_nf; +extern cpuop_func op_d0b8_49_ff; +extern cpuop_func op_d0b9_49_nf; +extern cpuop_func op_d0b9_49_ff; +extern cpuop_func op_d0ba_49_nf; +extern cpuop_func op_d0ba_49_ff; +extern cpuop_func op_d0bb_49_nf; +extern cpuop_func op_d0bb_49_ff; +extern cpuop_func op_d0bc_49_nf; +extern cpuop_func op_d0bc_49_ff; +extern cpuop_func op_d100_49_nf; +extern cpuop_func op_d100_49_ff; +extern cpuop_func op_d108_49_nf; +extern cpuop_func op_d108_49_ff; +extern cpuop_func op_d140_49_nf; +extern cpuop_func op_d140_49_ff; +extern cpuop_func op_d148_49_nf; +extern cpuop_func op_d148_49_ff; +extern cpuop_func op_d180_49_nf; +extern cpuop_func op_d180_49_ff; +extern cpuop_func op_d188_49_nf; +extern cpuop_func op_d188_49_ff; +extern cpuop_func op_0000_50_nf; +extern cpuop_func op_0000_50_ff; +extern cpuop_func op_0010_50_nf; +extern cpuop_func op_0010_50_ff; +extern cpuop_func op_0018_50_nf; +extern cpuop_func op_0018_50_ff; +extern cpuop_func op_0020_50_nf; +extern cpuop_func op_0020_50_ff; +extern cpuop_func op_0028_50_nf; +extern cpuop_func op_0028_50_ff; +extern cpuop_func op_0030_50_nf; +extern cpuop_func op_0030_50_ff; +extern cpuop_func op_0038_50_nf; +extern cpuop_func op_0038_50_ff; +extern cpuop_func op_0039_50_nf; +extern cpuop_func op_0039_50_ff; +extern cpuop_func op_003c_50_nf; +extern cpuop_func op_003c_50_ff; +extern cpuop_func op_0040_50_nf; +extern cpuop_func op_0040_50_ff; +extern cpuop_func op_0050_50_nf; +extern cpuop_func op_0050_50_ff; +extern cpuop_func op_0058_50_nf; +extern cpuop_func op_0058_50_ff; +extern cpuop_func op_0060_50_nf; +extern cpuop_func op_0060_50_ff; +extern cpuop_func op_0068_50_nf; +extern cpuop_func op_0068_50_ff; +extern cpuop_func op_0070_50_nf; +extern cpuop_func op_0070_50_ff; +extern cpuop_func op_0078_50_nf; +extern cpuop_func op_0078_50_ff; +extern cpuop_func op_0079_50_nf; +extern cpuop_func op_0079_50_ff; +extern cpuop_func op_007c_50_nf; +extern cpuop_func op_007c_50_ff; +extern cpuop_func op_0080_50_nf; +extern cpuop_func op_0080_50_ff; +extern cpuop_func op_0090_50_nf; +extern cpuop_func op_0090_50_ff; +extern cpuop_func op_0098_50_nf; +extern cpuop_func op_0098_50_ff; +extern cpuop_func op_00a0_50_nf; +extern cpuop_func op_00a0_50_ff; +extern cpuop_func op_00a8_50_nf; +extern cpuop_func op_00a8_50_ff; +extern cpuop_func op_00b0_50_nf; +extern cpuop_func op_00b0_50_ff; +extern cpuop_func op_00b8_50_nf; +extern cpuop_func op_00b8_50_ff; +extern cpuop_func op_00b9_50_nf; +extern cpuop_func op_00b9_50_ff; +extern cpuop_func op_00d0_50_nf; +extern cpuop_func op_00d0_50_ff; +extern cpuop_func op_00e8_50_nf; +extern cpuop_func op_00e8_50_ff; +extern cpuop_func op_00f0_50_nf; +extern cpuop_func op_00f0_50_ff; +extern cpuop_func op_00f8_50_nf; +extern cpuop_func op_00f8_50_ff; +extern cpuop_func op_00f9_50_nf; +extern cpuop_func op_00f9_50_ff; +extern cpuop_func op_00fa_50_nf; +extern cpuop_func op_00fa_50_ff; +extern cpuop_func op_00fb_50_nf; +extern cpuop_func op_00fb_50_ff; +extern cpuop_func op_0100_50_nf; +extern cpuop_func op_0100_50_ff; +extern cpuop_func op_0108_50_nf; +extern cpuop_func op_0108_50_ff; +extern cpuop_func op_0110_50_nf; +extern cpuop_func op_0110_50_ff; +extern cpuop_func op_0118_50_nf; +extern cpuop_func op_0118_50_ff; +extern cpuop_func op_0120_50_nf; +extern cpuop_func op_0120_50_ff; +extern cpuop_func op_0128_50_nf; +extern cpuop_func op_0128_50_ff; +extern cpuop_func op_0130_50_nf; +extern cpuop_func op_0130_50_ff; +extern cpuop_func op_0138_50_nf; +extern cpuop_func op_0138_50_ff; +extern cpuop_func op_0139_50_nf; +extern cpuop_func op_0139_50_ff; +extern cpuop_func op_013a_50_nf; +extern cpuop_func op_013a_50_ff; +extern cpuop_func op_013b_50_nf; +extern cpuop_func op_013b_50_ff; +extern cpuop_func op_013c_50_nf; +extern cpuop_func op_013c_50_ff; +extern cpuop_func op_0140_50_nf; +extern cpuop_func op_0140_50_ff; +extern cpuop_func op_0148_50_nf; +extern cpuop_func op_0148_50_ff; +extern cpuop_func op_0150_50_nf; +extern cpuop_func op_0150_50_ff; +extern cpuop_func op_0158_50_nf; +extern cpuop_func op_0158_50_ff; +extern cpuop_func op_0160_50_nf; +extern cpuop_func op_0160_50_ff; +extern cpuop_func op_0168_50_nf; +extern cpuop_func op_0168_50_ff; +extern cpuop_func op_0170_50_nf; +extern cpuop_func op_0170_50_ff; +extern cpuop_func op_0178_50_nf; +extern cpuop_func op_0178_50_ff; +extern cpuop_func op_0179_50_nf; +extern cpuop_func op_0179_50_ff; +extern cpuop_func op_0180_50_nf; +extern cpuop_func op_0180_50_ff; +extern cpuop_func op_0188_50_nf; +extern cpuop_func op_0188_50_ff; +extern cpuop_func op_0190_50_nf; +extern cpuop_func op_0190_50_ff; +extern cpuop_func op_0198_50_nf; +extern cpuop_func op_0198_50_ff; +extern cpuop_func op_01a0_50_nf; +extern cpuop_func op_01a0_50_ff; +extern cpuop_func op_01a8_50_nf; +extern cpuop_func op_01a8_50_ff; +extern cpuop_func op_01b0_50_nf; +extern cpuop_func op_01b0_50_ff; +extern cpuop_func op_01b8_50_nf; +extern cpuop_func op_01b8_50_ff; +extern cpuop_func op_01b9_50_nf; +extern cpuop_func op_01b9_50_ff; +extern cpuop_func op_01c0_50_nf; +extern cpuop_func op_01c0_50_ff; +extern cpuop_func op_01c8_50_nf; +extern cpuop_func op_01c8_50_ff; +extern cpuop_func op_01d0_50_nf; +extern cpuop_func op_01d0_50_ff; +extern cpuop_func op_01d8_50_nf; +extern cpuop_func op_01d8_50_ff; +extern cpuop_func op_01e0_50_nf; +extern cpuop_func op_01e0_50_ff; +extern cpuop_func op_01e8_50_nf; +extern cpuop_func op_01e8_50_ff; +extern cpuop_func op_01f0_50_nf; +extern cpuop_func op_01f0_50_ff; +extern cpuop_func op_01f8_50_nf; +extern cpuop_func op_01f8_50_ff; +extern cpuop_func op_01f9_50_nf; +extern cpuop_func op_01f9_50_ff; +extern cpuop_func op_0200_50_nf; +extern cpuop_func op_0200_50_ff; +extern cpuop_func op_0210_50_nf; +extern cpuop_func op_0210_50_ff; +extern cpuop_func op_0218_50_nf; +extern cpuop_func op_0218_50_ff; +extern cpuop_func op_0220_50_nf; +extern cpuop_func op_0220_50_ff; +extern cpuop_func op_0228_50_nf; +extern cpuop_func op_0228_50_ff; +extern cpuop_func op_0230_50_nf; +extern cpuop_func op_0230_50_ff; +extern cpuop_func op_0238_50_nf; +extern cpuop_func op_0238_50_ff; +extern cpuop_func op_0239_50_nf; +extern cpuop_func op_0239_50_ff; +extern cpuop_func op_023c_50_nf; +extern cpuop_func op_023c_50_ff; +extern cpuop_func op_0240_50_nf; +extern cpuop_func op_0240_50_ff; +extern cpuop_func op_0250_50_nf; +extern cpuop_func op_0250_50_ff; +extern cpuop_func op_0258_50_nf; +extern cpuop_func op_0258_50_ff; +extern cpuop_func op_0260_50_nf; +extern cpuop_func op_0260_50_ff; +extern cpuop_func op_0268_50_nf; +extern cpuop_func op_0268_50_ff; +extern cpuop_func op_0270_50_nf; +extern cpuop_func op_0270_50_ff; +extern cpuop_func op_0278_50_nf; +extern cpuop_func op_0278_50_ff; +extern cpuop_func op_0279_50_nf; +extern cpuop_func op_0279_50_ff; +extern cpuop_func op_027c_50_nf; +extern cpuop_func op_027c_50_ff; +extern cpuop_func op_0280_50_nf; +extern cpuop_func op_0280_50_ff; +extern cpuop_func op_0290_50_nf; +extern cpuop_func op_0290_50_ff; +extern cpuop_func op_0298_50_nf; +extern cpuop_func op_0298_50_ff; +extern cpuop_func op_02a0_50_nf; +extern cpuop_func op_02a0_50_ff; +extern cpuop_func op_02a8_50_nf; +extern cpuop_func op_02a8_50_ff; +extern cpuop_func op_02b0_50_nf; +extern cpuop_func op_02b0_50_ff; +extern cpuop_func op_02b8_50_nf; +extern cpuop_func op_02b8_50_ff; +extern cpuop_func op_02b9_50_nf; +extern cpuop_func op_02b9_50_ff; +extern cpuop_func op_02d0_50_nf; +extern cpuop_func op_02d0_50_ff; +extern cpuop_func op_02e8_50_nf; +extern cpuop_func op_02e8_50_ff; +extern cpuop_func op_02f0_50_nf; +extern cpuop_func op_02f0_50_ff; +extern cpuop_func op_02f8_50_nf; +extern cpuop_func op_02f8_50_ff; +extern cpuop_func op_02f9_50_nf; +extern cpuop_func op_02f9_50_ff; +extern cpuop_func op_02fa_50_nf; +extern cpuop_func op_02fa_50_ff; +extern cpuop_func op_02fb_50_nf; +extern cpuop_func op_02fb_50_ff; +extern cpuop_func op_0400_50_nf; +extern cpuop_func op_0400_50_ff; +extern cpuop_func op_0410_50_nf; +extern cpuop_func op_0410_50_ff; +extern cpuop_func op_0418_50_nf; +extern cpuop_func op_0418_50_ff; +extern cpuop_func op_0420_50_nf; +extern cpuop_func op_0420_50_ff; +extern cpuop_func op_0428_50_nf; +extern cpuop_func op_0428_50_ff; +extern cpuop_func op_0430_50_nf; +extern cpuop_func op_0430_50_ff; +extern cpuop_func op_0438_50_nf; +extern cpuop_func op_0438_50_ff; +extern cpuop_func op_0439_50_nf; +extern cpuop_func op_0439_50_ff; +extern cpuop_func op_0440_50_nf; +extern cpuop_func op_0440_50_ff; +extern cpuop_func op_0450_50_nf; +extern cpuop_func op_0450_50_ff; +extern cpuop_func op_0458_50_nf; +extern cpuop_func op_0458_50_ff; +extern cpuop_func op_0460_50_nf; +extern cpuop_func op_0460_50_ff; +extern cpuop_func op_0468_50_nf; +extern cpuop_func op_0468_50_ff; +extern cpuop_func op_0470_50_nf; +extern cpuop_func op_0470_50_ff; +extern cpuop_func op_0478_50_nf; +extern cpuop_func op_0478_50_ff; +extern cpuop_func op_0479_50_nf; +extern cpuop_func op_0479_50_ff; +extern cpuop_func op_0480_50_nf; +extern cpuop_func op_0480_50_ff; +extern cpuop_func op_0490_50_nf; +extern cpuop_func op_0490_50_ff; +extern cpuop_func op_0498_50_nf; +extern cpuop_func op_0498_50_ff; +extern cpuop_func op_04a0_50_nf; +extern cpuop_func op_04a0_50_ff; +extern cpuop_func op_04a8_50_nf; +extern cpuop_func op_04a8_50_ff; +extern cpuop_func op_04b0_50_nf; +extern cpuop_func op_04b0_50_ff; +extern cpuop_func op_04b8_50_nf; +extern cpuop_func op_04b8_50_ff; +extern cpuop_func op_04b9_50_nf; +extern cpuop_func op_04b9_50_ff; +extern cpuop_func op_04d0_50_nf; +extern cpuop_func op_04d0_50_ff; +extern cpuop_func op_04e8_50_nf; +extern cpuop_func op_04e8_50_ff; +extern cpuop_func op_04f0_50_nf; +extern cpuop_func op_04f0_50_ff; +extern cpuop_func op_04f8_50_nf; +extern cpuop_func op_04f8_50_ff; +extern cpuop_func op_04f9_50_nf; +extern cpuop_func op_04f9_50_ff; +extern cpuop_func op_04fa_50_nf; +extern cpuop_func op_04fa_50_ff; +extern cpuop_func op_04fb_50_nf; +extern cpuop_func op_04fb_50_ff; +extern cpuop_func op_0600_50_nf; +extern cpuop_func op_0600_50_ff; +extern cpuop_func op_0610_50_nf; +extern cpuop_func op_0610_50_ff; +extern cpuop_func op_0618_50_nf; +extern cpuop_func op_0618_50_ff; +extern cpuop_func op_0620_50_nf; +extern cpuop_func op_0620_50_ff; +extern cpuop_func op_0628_50_nf; +extern cpuop_func op_0628_50_ff; +extern cpuop_func op_0630_50_nf; +extern cpuop_func op_0630_50_ff; +extern cpuop_func op_0638_50_nf; +extern cpuop_func op_0638_50_ff; +extern cpuop_func op_0639_50_nf; +extern cpuop_func op_0639_50_ff; +extern cpuop_func op_0640_50_nf; +extern cpuop_func op_0640_50_ff; +extern cpuop_func op_0650_50_nf; +extern cpuop_func op_0650_50_ff; +extern cpuop_func op_0658_50_nf; +extern cpuop_func op_0658_50_ff; +extern cpuop_func op_0660_50_nf; +extern cpuop_func op_0660_50_ff; +extern cpuop_func op_0668_50_nf; +extern cpuop_func op_0668_50_ff; +extern cpuop_func op_0670_50_nf; +extern cpuop_func op_0670_50_ff; +extern cpuop_func op_0678_50_nf; +extern cpuop_func op_0678_50_ff; +extern cpuop_func op_0679_50_nf; +extern cpuop_func op_0679_50_ff; +extern cpuop_func op_0680_50_nf; +extern cpuop_func op_0680_50_ff; +extern cpuop_func op_0690_50_nf; +extern cpuop_func op_0690_50_ff; +extern cpuop_func op_0698_50_nf; +extern cpuop_func op_0698_50_ff; +extern cpuop_func op_06a0_50_nf; +extern cpuop_func op_06a0_50_ff; +extern cpuop_func op_06a8_50_nf; +extern cpuop_func op_06a8_50_ff; +extern cpuop_func op_06b0_50_nf; +extern cpuop_func op_06b0_50_ff; +extern cpuop_func op_06b8_50_nf; +extern cpuop_func op_06b8_50_ff; +extern cpuop_func op_06b9_50_nf; +extern cpuop_func op_06b9_50_ff; +extern cpuop_func op_06c0_50_nf; +extern cpuop_func op_06c0_50_ff; +extern cpuop_func op_06c8_50_nf; +extern cpuop_func op_06c8_50_ff; +extern cpuop_func op_06d0_50_nf; +extern cpuop_func op_06d0_50_ff; +extern cpuop_func op_06e8_50_nf; +extern cpuop_func op_06e8_50_ff; +extern cpuop_func op_06f0_50_nf; +extern cpuop_func op_06f0_50_ff; +extern cpuop_func op_06f8_50_nf; +extern cpuop_func op_06f8_50_ff; +extern cpuop_func op_06f9_50_nf; +extern cpuop_func op_06f9_50_ff; +extern cpuop_func op_06fa_50_nf; +extern cpuop_func op_06fa_50_ff; +extern cpuop_func op_06fb_50_nf; +extern cpuop_func op_06fb_50_ff; +extern cpuop_func op_0800_50_nf; +extern cpuop_func op_0800_50_ff; +extern cpuop_func op_0810_50_nf; +extern cpuop_func op_0810_50_ff; +extern cpuop_func op_0818_50_nf; +extern cpuop_func op_0818_50_ff; +extern cpuop_func op_0820_50_nf; +extern cpuop_func op_0820_50_ff; +extern cpuop_func op_0828_50_nf; +extern cpuop_func op_0828_50_ff; +extern cpuop_func op_0830_50_nf; +extern cpuop_func op_0830_50_ff; +extern cpuop_func op_0838_50_nf; +extern cpuop_func op_0838_50_ff; +extern cpuop_func op_0839_50_nf; +extern cpuop_func op_0839_50_ff; +extern cpuop_func op_083a_50_nf; +extern cpuop_func op_083a_50_ff; +extern cpuop_func op_083b_50_nf; +extern cpuop_func op_083b_50_ff; +extern cpuop_func op_0840_50_nf; +extern cpuop_func op_0840_50_ff; +extern cpuop_func op_0850_50_nf; +extern cpuop_func op_0850_50_ff; +extern cpuop_func op_0858_50_nf; +extern cpuop_func op_0858_50_ff; +extern cpuop_func op_0860_50_nf; +extern cpuop_func op_0860_50_ff; +extern cpuop_func op_0868_50_nf; +extern cpuop_func op_0868_50_ff; +extern cpuop_func op_0870_50_nf; +extern cpuop_func op_0870_50_ff; +extern cpuop_func op_0878_50_nf; +extern cpuop_func op_0878_50_ff; +extern cpuop_func op_0879_50_nf; +extern cpuop_func op_0879_50_ff; +extern cpuop_func op_0880_50_nf; +extern cpuop_func op_0880_50_ff; +extern cpuop_func op_0890_50_nf; +extern cpuop_func op_0890_50_ff; +extern cpuop_func op_0898_50_nf; +extern cpuop_func op_0898_50_ff; +extern cpuop_func op_08a0_50_nf; +extern cpuop_func op_08a0_50_ff; +extern cpuop_func op_08a8_50_nf; +extern cpuop_func op_08a8_50_ff; +extern cpuop_func op_08b0_50_nf; +extern cpuop_func op_08b0_50_ff; +extern cpuop_func op_08b8_50_nf; +extern cpuop_func op_08b8_50_ff; +extern cpuop_func op_08b9_50_nf; +extern cpuop_func op_08b9_50_ff; +extern cpuop_func op_08c0_50_nf; +extern cpuop_func op_08c0_50_ff; +extern cpuop_func op_08d0_50_nf; +extern cpuop_func op_08d0_50_ff; +extern cpuop_func op_08d8_50_nf; +extern cpuop_func op_08d8_50_ff; +extern cpuop_func op_08e0_50_nf; +extern cpuop_func op_08e0_50_ff; +extern cpuop_func op_08e8_50_nf; +extern cpuop_func op_08e8_50_ff; +extern cpuop_func op_08f0_50_nf; +extern cpuop_func op_08f0_50_ff; +extern cpuop_func op_08f8_50_nf; +extern cpuop_func op_08f8_50_ff; +extern cpuop_func op_08f9_50_nf; +extern cpuop_func op_08f9_50_ff; +extern cpuop_func op_0a00_50_nf; +extern cpuop_func op_0a00_50_ff; +extern cpuop_func op_0a10_50_nf; +extern cpuop_func op_0a10_50_ff; +extern cpuop_func op_0a18_50_nf; +extern cpuop_func op_0a18_50_ff; +extern cpuop_func op_0a20_50_nf; +extern cpuop_func op_0a20_50_ff; +extern cpuop_func op_0a28_50_nf; +extern cpuop_func op_0a28_50_ff; +extern cpuop_func op_0a30_50_nf; +extern cpuop_func op_0a30_50_ff; +extern cpuop_func op_0a38_50_nf; +extern cpuop_func op_0a38_50_ff; +extern cpuop_func op_0a39_50_nf; +extern cpuop_func op_0a39_50_ff; +extern cpuop_func op_0a3c_50_nf; +extern cpuop_func op_0a3c_50_ff; +extern cpuop_func op_0a40_50_nf; +extern cpuop_func op_0a40_50_ff; +extern cpuop_func op_0a50_50_nf; +extern cpuop_func op_0a50_50_ff; +extern cpuop_func op_0a58_50_nf; +extern cpuop_func op_0a58_50_ff; +extern cpuop_func op_0a60_50_nf; +extern cpuop_func op_0a60_50_ff; +extern cpuop_func op_0a68_50_nf; +extern cpuop_func op_0a68_50_ff; +extern cpuop_func op_0a70_50_nf; +extern cpuop_func op_0a70_50_ff; +extern cpuop_func op_0a78_50_nf; +extern cpuop_func op_0a78_50_ff; +extern cpuop_func op_0a79_50_nf; +extern cpuop_func op_0a79_50_ff; +extern cpuop_func op_0a7c_50_nf; +extern cpuop_func op_0a7c_50_ff; +extern cpuop_func op_0a80_50_nf; +extern cpuop_func op_0a80_50_ff; +extern cpuop_func op_0a90_50_nf; +extern cpuop_func op_0a90_50_ff; +extern cpuop_func op_0a98_50_nf; +extern cpuop_func op_0a98_50_ff; +extern cpuop_func op_0aa0_50_nf; +extern cpuop_func op_0aa0_50_ff; +extern cpuop_func op_0aa8_50_nf; +extern cpuop_func op_0aa8_50_ff; +extern cpuop_func op_0ab0_50_nf; +extern cpuop_func op_0ab0_50_ff; +extern cpuop_func op_0ab8_50_nf; +extern cpuop_func op_0ab8_50_ff; +extern cpuop_func op_0ab9_50_nf; +extern cpuop_func op_0ab9_50_ff; +extern cpuop_func op_0ad0_50_nf; +extern cpuop_func op_0ad0_50_ff; +extern cpuop_func op_0ad8_50_nf; +extern cpuop_func op_0ad8_50_ff; +extern cpuop_func op_0ae0_50_nf; +extern cpuop_func op_0ae0_50_ff; +extern cpuop_func op_0ae8_50_nf; +extern cpuop_func op_0ae8_50_ff; +extern cpuop_func op_0af0_50_nf; +extern cpuop_func op_0af0_50_ff; +extern cpuop_func op_0af8_50_nf; +extern cpuop_func op_0af8_50_ff; +extern cpuop_func op_0af9_50_nf; +extern cpuop_func op_0af9_50_ff; +extern cpuop_func op_0c00_50_nf; +extern cpuop_func op_0c00_50_ff; +extern cpuop_func op_0c10_50_nf; +extern cpuop_func op_0c10_50_ff; +extern cpuop_func op_0c18_50_nf; +extern cpuop_func op_0c18_50_ff; +extern cpuop_func op_0c20_50_nf; +extern cpuop_func op_0c20_50_ff; +extern cpuop_func op_0c28_50_nf; +extern cpuop_func op_0c28_50_ff; +extern cpuop_func op_0c30_50_nf; +extern cpuop_func op_0c30_50_ff; +extern cpuop_func op_0c38_50_nf; +extern cpuop_func op_0c38_50_ff; +extern cpuop_func op_0c39_50_nf; +extern cpuop_func op_0c39_50_ff; +extern cpuop_func op_0c3a_50_nf; +extern cpuop_func op_0c3a_50_ff; +extern cpuop_func op_0c3b_50_nf; +extern cpuop_func op_0c3b_50_ff; +extern cpuop_func op_0c40_50_nf; +extern cpuop_func op_0c40_50_ff; +extern cpuop_func op_0c50_50_nf; +extern cpuop_func op_0c50_50_ff; +extern cpuop_func op_0c58_50_nf; +extern cpuop_func op_0c58_50_ff; +extern cpuop_func op_0c60_50_nf; +extern cpuop_func op_0c60_50_ff; +extern cpuop_func op_0c68_50_nf; +extern cpuop_func op_0c68_50_ff; +extern cpuop_func op_0c70_50_nf; +extern cpuop_func op_0c70_50_ff; +extern cpuop_func op_0c78_50_nf; +extern cpuop_func op_0c78_50_ff; +extern cpuop_func op_0c79_50_nf; +extern cpuop_func op_0c79_50_ff; +extern cpuop_func op_0c7a_50_nf; +extern cpuop_func op_0c7a_50_ff; +extern cpuop_func op_0c7b_50_nf; +extern cpuop_func op_0c7b_50_ff; +extern cpuop_func op_0c80_50_nf; +extern cpuop_func op_0c80_50_ff; +extern cpuop_func op_0c90_50_nf; +extern cpuop_func op_0c90_50_ff; +extern cpuop_func op_0c98_50_nf; +extern cpuop_func op_0c98_50_ff; +extern cpuop_func op_0ca0_50_nf; +extern cpuop_func op_0ca0_50_ff; +extern cpuop_func op_0ca8_50_nf; +extern cpuop_func op_0ca8_50_ff; +extern cpuop_func op_0cb0_50_nf; +extern cpuop_func op_0cb0_50_ff; +extern cpuop_func op_0cb8_50_nf; +extern cpuop_func op_0cb8_50_ff; +extern cpuop_func op_0cb9_50_nf; +extern cpuop_func op_0cb9_50_ff; +extern cpuop_func op_0cba_50_nf; +extern cpuop_func op_0cba_50_ff; +extern cpuop_func op_0cbb_50_nf; +extern cpuop_func op_0cbb_50_ff; +extern cpuop_func op_0cd0_50_nf; +extern cpuop_func op_0cd0_50_ff; +extern cpuop_func op_0cd8_50_nf; +extern cpuop_func op_0cd8_50_ff; +extern cpuop_func op_0ce0_50_nf; +extern cpuop_func op_0ce0_50_ff; +extern cpuop_func op_0ce8_50_nf; +extern cpuop_func op_0ce8_50_ff; +extern cpuop_func op_0cf0_50_nf; +extern cpuop_func op_0cf0_50_ff; +extern cpuop_func op_0cf8_50_nf; +extern cpuop_func op_0cf8_50_ff; +extern cpuop_func op_0cf9_50_nf; +extern cpuop_func op_0cf9_50_ff; +extern cpuop_func op_0cfc_50_nf; +extern cpuop_func op_0cfc_50_ff; +extern cpuop_func op_0e10_50_nf; +extern cpuop_func op_0e10_50_ff; +extern cpuop_func op_0e18_50_nf; +extern cpuop_func op_0e18_50_ff; +extern cpuop_func op_0e20_50_nf; +extern cpuop_func op_0e20_50_ff; +extern cpuop_func op_0e28_50_nf; +extern cpuop_func op_0e28_50_ff; +extern cpuop_func op_0e30_50_nf; +extern cpuop_func op_0e30_50_ff; +extern cpuop_func op_0e38_50_nf; +extern cpuop_func op_0e38_50_ff; +extern cpuop_func op_0e39_50_nf; +extern cpuop_func op_0e39_50_ff; +extern cpuop_func op_0e50_50_nf; +extern cpuop_func op_0e50_50_ff; +extern cpuop_func op_0e58_50_nf; +extern cpuop_func op_0e58_50_ff; +extern cpuop_func op_0e60_50_nf; +extern cpuop_func op_0e60_50_ff; +extern cpuop_func op_0e68_50_nf; +extern cpuop_func op_0e68_50_ff; +extern cpuop_func op_0e70_50_nf; +extern cpuop_func op_0e70_50_ff; +extern cpuop_func op_0e78_50_nf; +extern cpuop_func op_0e78_50_ff; +extern cpuop_func op_0e79_50_nf; +extern cpuop_func op_0e79_50_ff; +extern cpuop_func op_0e90_50_nf; +extern cpuop_func op_0e90_50_ff; +extern cpuop_func op_0e98_50_nf; +extern cpuop_func op_0e98_50_ff; +extern cpuop_func op_0ea0_50_nf; +extern cpuop_func op_0ea0_50_ff; +extern cpuop_func op_0ea8_50_nf; +extern cpuop_func op_0ea8_50_ff; +extern cpuop_func op_0eb0_50_nf; +extern cpuop_func op_0eb0_50_ff; +extern cpuop_func op_0eb8_50_nf; +extern cpuop_func op_0eb8_50_ff; +extern cpuop_func op_0eb9_50_nf; +extern cpuop_func op_0eb9_50_ff; +extern cpuop_func op_0ed0_50_nf; +extern cpuop_func op_0ed0_50_ff; +extern cpuop_func op_0ed8_50_nf; +extern cpuop_func op_0ed8_50_ff; +extern cpuop_func op_0ee0_50_nf; +extern cpuop_func op_0ee0_50_ff; +extern cpuop_func op_0ee8_50_nf; +extern cpuop_func op_0ee8_50_ff; +extern cpuop_func op_0ef0_50_nf; +extern cpuop_func op_0ef0_50_ff; +extern cpuop_func op_0ef8_50_nf; +extern cpuop_func op_0ef8_50_ff; +extern cpuop_func op_0ef9_50_nf; +extern cpuop_func op_0ef9_50_ff; +extern cpuop_func op_0efc_50_nf; +extern cpuop_func op_0efc_50_ff; +extern cpuop_func op_1000_50_nf; +extern cpuop_func op_1000_50_ff; +extern cpuop_func op_1010_50_nf; +extern cpuop_func op_1010_50_ff; +extern cpuop_func op_1018_50_nf; +extern cpuop_func op_1018_50_ff; +extern cpuop_func op_1020_50_nf; +extern cpuop_func op_1020_50_ff; +extern cpuop_func op_1028_50_nf; +extern cpuop_func op_1028_50_ff; +extern cpuop_func op_1030_50_nf; +extern cpuop_func op_1030_50_ff; +extern cpuop_func op_1038_50_nf; +extern cpuop_func op_1038_50_ff; +extern cpuop_func op_1039_50_nf; +extern cpuop_func op_1039_50_ff; +extern cpuop_func op_103a_50_nf; +extern cpuop_func op_103a_50_ff; +extern cpuop_func op_103b_50_nf; +extern cpuop_func op_103b_50_ff; +extern cpuop_func op_103c_50_nf; +extern cpuop_func op_103c_50_ff; +extern cpuop_func op_1080_50_nf; +extern cpuop_func op_1080_50_ff; +extern cpuop_func op_1090_50_nf; +extern cpuop_func op_1090_50_ff; +extern cpuop_func op_1098_50_nf; +extern cpuop_func op_1098_50_ff; +extern cpuop_func op_10a0_50_nf; +extern cpuop_func op_10a0_50_ff; +extern cpuop_func op_10a8_50_nf; +extern cpuop_func op_10a8_50_ff; +extern cpuop_func op_10b0_50_nf; +extern cpuop_func op_10b0_50_ff; +extern cpuop_func op_10b8_50_nf; +extern cpuop_func op_10b8_50_ff; +extern cpuop_func op_10b9_50_nf; +extern cpuop_func op_10b9_50_ff; +extern cpuop_func op_10ba_50_nf; +extern cpuop_func op_10ba_50_ff; +extern cpuop_func op_10bb_50_nf; +extern cpuop_func op_10bb_50_ff; +extern cpuop_func op_10bc_50_nf; +extern cpuop_func op_10bc_50_ff; +extern cpuop_func op_10c0_50_nf; +extern cpuop_func op_10c0_50_ff; +extern cpuop_func op_10d0_50_nf; +extern cpuop_func op_10d0_50_ff; +extern cpuop_func op_10d8_50_nf; +extern cpuop_func op_10d8_50_ff; +extern cpuop_func op_10e0_50_nf; +extern cpuop_func op_10e0_50_ff; +extern cpuop_func op_10e8_50_nf; +extern cpuop_func op_10e8_50_ff; +extern cpuop_func op_10f0_50_nf; +extern cpuop_func op_10f0_50_ff; +extern cpuop_func op_10f8_50_nf; +extern cpuop_func op_10f8_50_ff; +extern cpuop_func op_10f9_50_nf; +extern cpuop_func op_10f9_50_ff; +extern cpuop_func op_10fa_50_nf; +extern cpuop_func op_10fa_50_ff; +extern cpuop_func op_10fb_50_nf; +extern cpuop_func op_10fb_50_ff; +extern cpuop_func op_10fc_50_nf; +extern cpuop_func op_10fc_50_ff; +extern cpuop_func op_1100_50_nf; +extern cpuop_func op_1100_50_ff; +extern cpuop_func op_1110_50_nf; +extern cpuop_func op_1110_50_ff; +extern cpuop_func op_1118_50_nf; +extern cpuop_func op_1118_50_ff; +extern cpuop_func op_1120_50_nf; +extern cpuop_func op_1120_50_ff; +extern cpuop_func op_1128_50_nf; +extern cpuop_func op_1128_50_ff; +extern cpuop_func op_1130_50_nf; +extern cpuop_func op_1130_50_ff; +extern cpuop_func op_1138_50_nf; +extern cpuop_func op_1138_50_ff; +extern cpuop_func op_1139_50_nf; +extern cpuop_func op_1139_50_ff; +extern cpuop_func op_113a_50_nf; +extern cpuop_func op_113a_50_ff; +extern cpuop_func op_113b_50_nf; +extern cpuop_func op_113b_50_ff; +extern cpuop_func op_113c_50_nf; +extern cpuop_func op_113c_50_ff; +extern cpuop_func op_1140_50_nf; +extern cpuop_func op_1140_50_ff; +extern cpuop_func op_1150_50_nf; +extern cpuop_func op_1150_50_ff; +extern cpuop_func op_1158_50_nf; +extern cpuop_func op_1158_50_ff; +extern cpuop_func op_1160_50_nf; +extern cpuop_func op_1160_50_ff; +extern cpuop_func op_1168_50_nf; +extern cpuop_func op_1168_50_ff; +extern cpuop_func op_1170_50_nf; +extern cpuop_func op_1170_50_ff; +extern cpuop_func op_1178_50_nf; +extern cpuop_func op_1178_50_ff; +extern cpuop_func op_1179_50_nf; +extern cpuop_func op_1179_50_ff; +extern cpuop_func op_117a_50_nf; +extern cpuop_func op_117a_50_ff; +extern cpuop_func op_117b_50_nf; +extern cpuop_func op_117b_50_ff; +extern cpuop_func op_117c_50_nf; +extern cpuop_func op_117c_50_ff; +extern cpuop_func op_1180_50_nf; +extern cpuop_func op_1180_50_ff; +extern cpuop_func op_1190_50_nf; +extern cpuop_func op_1190_50_ff; +extern cpuop_func op_1198_50_nf; +extern cpuop_func op_1198_50_ff; +extern cpuop_func op_11a0_50_nf; +extern cpuop_func op_11a0_50_ff; +extern cpuop_func op_11a8_50_nf; +extern cpuop_func op_11a8_50_ff; +extern cpuop_func op_11b0_50_nf; +extern cpuop_func op_11b0_50_ff; +extern cpuop_func op_11b8_50_nf; +extern cpuop_func op_11b8_50_ff; +extern cpuop_func op_11b9_50_nf; +extern cpuop_func op_11b9_50_ff; +extern cpuop_func op_11ba_50_nf; +extern cpuop_func op_11ba_50_ff; +extern cpuop_func op_11bb_50_nf; +extern cpuop_func op_11bb_50_ff; +extern cpuop_func op_11bc_50_nf; +extern cpuop_func op_11bc_50_ff; +extern cpuop_func op_11c0_50_nf; +extern cpuop_func op_11c0_50_ff; +extern cpuop_func op_11d0_50_nf; +extern cpuop_func op_11d0_50_ff; +extern cpuop_func op_11d8_50_nf; +extern cpuop_func op_11d8_50_ff; +extern cpuop_func op_11e0_50_nf; +extern cpuop_func op_11e0_50_ff; +extern cpuop_func op_11e8_50_nf; +extern cpuop_func op_11e8_50_ff; +extern cpuop_func op_11f0_50_nf; +extern cpuop_func op_11f0_50_ff; +extern cpuop_func op_11f8_50_nf; +extern cpuop_func op_11f8_50_ff; +extern cpuop_func op_11f9_50_nf; +extern cpuop_func op_11f9_50_ff; +extern cpuop_func op_11fa_50_nf; +extern cpuop_func op_11fa_50_ff; +extern cpuop_func op_11fb_50_nf; +extern cpuop_func op_11fb_50_ff; +extern cpuop_func op_11fc_50_nf; +extern cpuop_func op_11fc_50_ff; +extern cpuop_func op_13c0_50_nf; +extern cpuop_func op_13c0_50_ff; +extern cpuop_func op_13d0_50_nf; +extern cpuop_func op_13d0_50_ff; +extern cpuop_func op_13d8_50_nf; +extern cpuop_func op_13d8_50_ff; +extern cpuop_func op_13e0_50_nf; +extern cpuop_func op_13e0_50_ff; +extern cpuop_func op_13e8_50_nf; +extern cpuop_func op_13e8_50_ff; +extern cpuop_func op_13f0_50_nf; +extern cpuop_func op_13f0_50_ff; +extern cpuop_func op_13f8_50_nf; +extern cpuop_func op_13f8_50_ff; +extern cpuop_func op_13f9_50_nf; +extern cpuop_func op_13f9_50_ff; +extern cpuop_func op_13fa_50_nf; +extern cpuop_func op_13fa_50_ff; +extern cpuop_func op_13fb_50_nf; +extern cpuop_func op_13fb_50_ff; +extern cpuop_func op_13fc_50_nf; +extern cpuop_func op_13fc_50_ff; +extern cpuop_func op_2000_50_nf; +extern cpuop_func op_2000_50_ff; +extern cpuop_func op_2008_50_nf; +extern cpuop_func op_2008_50_ff; +extern cpuop_func op_2010_50_nf; +extern cpuop_func op_2010_50_ff; +extern cpuop_func op_2018_50_nf; +extern cpuop_func op_2018_50_ff; +extern cpuop_func op_2020_50_nf; +extern cpuop_func op_2020_50_ff; +extern cpuop_func op_2028_50_nf; +extern cpuop_func op_2028_50_ff; +extern cpuop_func op_2030_50_nf; +extern cpuop_func op_2030_50_ff; +extern cpuop_func op_2038_50_nf; +extern cpuop_func op_2038_50_ff; +extern cpuop_func op_2039_50_nf; +extern cpuop_func op_2039_50_ff; +extern cpuop_func op_203a_50_nf; +extern cpuop_func op_203a_50_ff; +extern cpuop_func op_203b_50_nf; +extern cpuop_func op_203b_50_ff; +extern cpuop_func op_203c_50_nf; +extern cpuop_func op_203c_50_ff; +extern cpuop_func op_2040_50_nf; +extern cpuop_func op_2040_50_ff; +extern cpuop_func op_2048_50_nf; +extern cpuop_func op_2048_50_ff; +extern cpuop_func op_2050_50_nf; +extern cpuop_func op_2050_50_ff; +extern cpuop_func op_2058_50_nf; +extern cpuop_func op_2058_50_ff; +extern cpuop_func op_2060_50_nf; +extern cpuop_func op_2060_50_ff; +extern cpuop_func op_2068_50_nf; +extern cpuop_func op_2068_50_ff; +extern cpuop_func op_2070_50_nf; +extern cpuop_func op_2070_50_ff; +extern cpuop_func op_2078_50_nf; +extern cpuop_func op_2078_50_ff; +extern cpuop_func op_2079_50_nf; +extern cpuop_func op_2079_50_ff; +extern cpuop_func op_207a_50_nf; +extern cpuop_func op_207a_50_ff; +extern cpuop_func op_207b_50_nf; +extern cpuop_func op_207b_50_ff; +extern cpuop_func op_207c_50_nf; +extern cpuop_func op_207c_50_ff; +extern cpuop_func op_2080_50_nf; +extern cpuop_func op_2080_50_ff; +extern cpuop_func op_2088_50_nf; +extern cpuop_func op_2088_50_ff; +extern cpuop_func op_2090_50_nf; +extern cpuop_func op_2090_50_ff; +extern cpuop_func op_2098_50_nf; +extern cpuop_func op_2098_50_ff; +extern cpuop_func op_20a0_50_nf; +extern cpuop_func op_20a0_50_ff; +extern cpuop_func op_20a8_50_nf; +extern cpuop_func op_20a8_50_ff; +extern cpuop_func op_20b0_50_nf; +extern cpuop_func op_20b0_50_ff; +extern cpuop_func op_20b8_50_nf; +extern cpuop_func op_20b8_50_ff; +extern cpuop_func op_20b9_50_nf; +extern cpuop_func op_20b9_50_ff; +extern cpuop_func op_20ba_50_nf; +extern cpuop_func op_20ba_50_ff; +extern cpuop_func op_20bb_50_nf; +extern cpuop_func op_20bb_50_ff; +extern cpuop_func op_20bc_50_nf; +extern cpuop_func op_20bc_50_ff; +extern cpuop_func op_20c0_50_nf; +extern cpuop_func op_20c0_50_ff; +extern cpuop_func op_20c8_50_nf; +extern cpuop_func op_20c8_50_ff; +extern cpuop_func op_20d0_50_nf; +extern cpuop_func op_20d0_50_ff; +extern cpuop_func op_20d8_50_nf; +extern cpuop_func op_20d8_50_ff; +extern cpuop_func op_20e0_50_nf; +extern cpuop_func op_20e0_50_ff; +extern cpuop_func op_20e8_50_nf; +extern cpuop_func op_20e8_50_ff; +extern cpuop_func op_20f0_50_nf; +extern cpuop_func op_20f0_50_ff; +extern cpuop_func op_20f8_50_nf; +extern cpuop_func op_20f8_50_ff; +extern cpuop_func op_20f9_50_nf; +extern cpuop_func op_20f9_50_ff; +extern cpuop_func op_20fa_50_nf; +extern cpuop_func op_20fa_50_ff; +extern cpuop_func op_20fb_50_nf; +extern cpuop_func op_20fb_50_ff; +extern cpuop_func op_20fc_50_nf; +extern cpuop_func op_20fc_50_ff; +extern cpuop_func op_2100_50_nf; +extern cpuop_func op_2100_50_ff; +extern cpuop_func op_2108_50_nf; +extern cpuop_func op_2108_50_ff; +extern cpuop_func op_2110_50_nf; +extern cpuop_func op_2110_50_ff; +extern cpuop_func op_2118_50_nf; +extern cpuop_func op_2118_50_ff; +extern cpuop_func op_2120_50_nf; +extern cpuop_func op_2120_50_ff; +extern cpuop_func op_2128_50_nf; +extern cpuop_func op_2128_50_ff; +extern cpuop_func op_2130_50_nf; +extern cpuop_func op_2130_50_ff; +extern cpuop_func op_2138_50_nf; +extern cpuop_func op_2138_50_ff; +extern cpuop_func op_2139_50_nf; +extern cpuop_func op_2139_50_ff; +extern cpuop_func op_213a_50_nf; +extern cpuop_func op_213a_50_ff; +extern cpuop_func op_213b_50_nf; +extern cpuop_func op_213b_50_ff; +extern cpuop_func op_213c_50_nf; +extern cpuop_func op_213c_50_ff; +extern cpuop_func op_2140_50_nf; +extern cpuop_func op_2140_50_ff; +extern cpuop_func op_2148_50_nf; +extern cpuop_func op_2148_50_ff; +extern cpuop_func op_2150_50_nf; +extern cpuop_func op_2150_50_ff; +extern cpuop_func op_2158_50_nf; +extern cpuop_func op_2158_50_ff; +extern cpuop_func op_2160_50_nf; +extern cpuop_func op_2160_50_ff; +extern cpuop_func op_2168_50_nf; +extern cpuop_func op_2168_50_ff; +extern cpuop_func op_2170_50_nf; +extern cpuop_func op_2170_50_ff; +extern cpuop_func op_2178_50_nf; +extern cpuop_func op_2178_50_ff; +extern cpuop_func op_2179_50_nf; +extern cpuop_func op_2179_50_ff; +extern cpuop_func op_217a_50_nf; +extern cpuop_func op_217a_50_ff; +extern cpuop_func op_217b_50_nf; +extern cpuop_func op_217b_50_ff; +extern cpuop_func op_217c_50_nf; +extern cpuop_func op_217c_50_ff; +extern cpuop_func op_2180_50_nf; +extern cpuop_func op_2180_50_ff; +extern cpuop_func op_2188_50_nf; +extern cpuop_func op_2188_50_ff; +extern cpuop_func op_2190_50_nf; +extern cpuop_func op_2190_50_ff; +extern cpuop_func op_2198_50_nf; +extern cpuop_func op_2198_50_ff; +extern cpuop_func op_21a0_50_nf; +extern cpuop_func op_21a0_50_ff; +extern cpuop_func op_21a8_50_nf; +extern cpuop_func op_21a8_50_ff; +extern cpuop_func op_21b0_50_nf; +extern cpuop_func op_21b0_50_ff; +extern cpuop_func op_21b8_50_nf; +extern cpuop_func op_21b8_50_ff; +extern cpuop_func op_21b9_50_nf; +extern cpuop_func op_21b9_50_ff; +extern cpuop_func op_21ba_50_nf; +extern cpuop_func op_21ba_50_ff; +extern cpuop_func op_21bb_50_nf; +extern cpuop_func op_21bb_50_ff; +extern cpuop_func op_21bc_50_nf; +extern cpuop_func op_21bc_50_ff; +extern cpuop_func op_21c0_50_nf; +extern cpuop_func op_21c0_50_ff; +extern cpuop_func op_21c8_50_nf; +extern cpuop_func op_21c8_50_ff; +extern cpuop_func op_21d0_50_nf; +extern cpuop_func op_21d0_50_ff; +extern cpuop_func op_21d8_50_nf; +extern cpuop_func op_21d8_50_ff; +extern cpuop_func op_21e0_50_nf; +extern cpuop_func op_21e0_50_ff; +extern cpuop_func op_21e8_50_nf; +extern cpuop_func op_21e8_50_ff; +extern cpuop_func op_21f0_50_nf; +extern cpuop_func op_21f0_50_ff; +extern cpuop_func op_21f8_50_nf; +extern cpuop_func op_21f8_50_ff; +extern cpuop_func op_21f9_50_nf; +extern cpuop_func op_21f9_50_ff; +extern cpuop_func op_21fa_50_nf; +extern cpuop_func op_21fa_50_ff; +extern cpuop_func op_21fb_50_nf; +extern cpuop_func op_21fb_50_ff; +extern cpuop_func op_21fc_50_nf; +extern cpuop_func op_21fc_50_ff; +extern cpuop_func op_23c0_50_nf; +extern cpuop_func op_23c0_50_ff; +extern cpuop_func op_23c8_50_nf; +extern cpuop_func op_23c8_50_ff; +extern cpuop_func op_23d0_50_nf; +extern cpuop_func op_23d0_50_ff; +extern cpuop_func op_23d8_50_nf; +extern cpuop_func op_23d8_50_ff; +extern cpuop_func op_23e0_50_nf; +extern cpuop_func op_23e0_50_ff; +extern cpuop_func op_23e8_50_nf; +extern cpuop_func op_23e8_50_ff; +extern cpuop_func op_23f0_50_nf; +extern cpuop_func op_23f0_50_ff; +extern cpuop_func op_23f8_50_nf; +extern cpuop_func op_23f8_50_ff; +extern cpuop_func op_23f9_50_nf; +extern cpuop_func op_23f9_50_ff; +extern cpuop_func op_23fa_50_nf; +extern cpuop_func op_23fa_50_ff; +extern cpuop_func op_23fb_50_nf; +extern cpuop_func op_23fb_50_ff; +extern cpuop_func op_23fc_50_nf; +extern cpuop_func op_23fc_50_ff; +extern cpuop_func op_3000_50_nf; +extern cpuop_func op_3000_50_ff; +extern cpuop_func op_3008_50_nf; +extern cpuop_func op_3008_50_ff; +extern cpuop_func op_3010_50_nf; +extern cpuop_func op_3010_50_ff; +extern cpuop_func op_3018_50_nf; +extern cpuop_func op_3018_50_ff; +extern cpuop_func op_3020_50_nf; +extern cpuop_func op_3020_50_ff; +extern cpuop_func op_3028_50_nf; +extern cpuop_func op_3028_50_ff; +extern cpuop_func op_3030_50_nf; +extern cpuop_func op_3030_50_ff; +extern cpuop_func op_3038_50_nf; +extern cpuop_func op_3038_50_ff; +extern cpuop_func op_3039_50_nf; +extern cpuop_func op_3039_50_ff; +extern cpuop_func op_303a_50_nf; +extern cpuop_func op_303a_50_ff; +extern cpuop_func op_303b_50_nf; +extern cpuop_func op_303b_50_ff; +extern cpuop_func op_303c_50_nf; +extern cpuop_func op_303c_50_ff; +extern cpuop_func op_3040_50_nf; +extern cpuop_func op_3040_50_ff; +extern cpuop_func op_3048_50_nf; +extern cpuop_func op_3048_50_ff; +extern cpuop_func op_3050_50_nf; +extern cpuop_func op_3050_50_ff; +extern cpuop_func op_3058_50_nf; +extern cpuop_func op_3058_50_ff; +extern cpuop_func op_3060_50_nf; +extern cpuop_func op_3060_50_ff; +extern cpuop_func op_3068_50_nf; +extern cpuop_func op_3068_50_ff; +extern cpuop_func op_3070_50_nf; +extern cpuop_func op_3070_50_ff; +extern cpuop_func op_3078_50_nf; +extern cpuop_func op_3078_50_ff; +extern cpuop_func op_3079_50_nf; +extern cpuop_func op_3079_50_ff; +extern cpuop_func op_307a_50_nf; +extern cpuop_func op_307a_50_ff; +extern cpuop_func op_307b_50_nf; +extern cpuop_func op_307b_50_ff; +extern cpuop_func op_307c_50_nf; +extern cpuop_func op_307c_50_ff; +extern cpuop_func op_3080_50_nf; +extern cpuop_func op_3080_50_ff; +extern cpuop_func op_3088_50_nf; +extern cpuop_func op_3088_50_ff; +extern cpuop_func op_3090_50_nf; +extern cpuop_func op_3090_50_ff; +extern cpuop_func op_3098_50_nf; +extern cpuop_func op_3098_50_ff; +extern cpuop_func op_30a0_50_nf; +extern cpuop_func op_30a0_50_ff; +extern cpuop_func op_30a8_50_nf; +extern cpuop_func op_30a8_50_ff; +extern cpuop_func op_30b0_50_nf; +extern cpuop_func op_30b0_50_ff; +extern cpuop_func op_30b8_50_nf; +extern cpuop_func op_30b8_50_ff; +extern cpuop_func op_30b9_50_nf; +extern cpuop_func op_30b9_50_ff; +extern cpuop_func op_30ba_50_nf; +extern cpuop_func op_30ba_50_ff; +extern cpuop_func op_30bb_50_nf; +extern cpuop_func op_30bb_50_ff; +extern cpuop_func op_30bc_50_nf; +extern cpuop_func op_30bc_50_ff; +extern cpuop_func op_30c0_50_nf; +extern cpuop_func op_30c0_50_ff; +extern cpuop_func op_30c8_50_nf; +extern cpuop_func op_30c8_50_ff; +extern cpuop_func op_30d0_50_nf; +extern cpuop_func op_30d0_50_ff; +extern cpuop_func op_30d8_50_nf; +extern cpuop_func op_30d8_50_ff; +extern cpuop_func op_30e0_50_nf; +extern cpuop_func op_30e0_50_ff; +extern cpuop_func op_30e8_50_nf; +extern cpuop_func op_30e8_50_ff; +extern cpuop_func op_30f0_50_nf; +extern cpuop_func op_30f0_50_ff; +extern cpuop_func op_30f8_50_nf; +extern cpuop_func op_30f8_50_ff; +extern cpuop_func op_30f9_50_nf; +extern cpuop_func op_30f9_50_ff; +extern cpuop_func op_30fa_50_nf; +extern cpuop_func op_30fa_50_ff; +extern cpuop_func op_30fb_50_nf; +extern cpuop_func op_30fb_50_ff; +extern cpuop_func op_30fc_50_nf; +extern cpuop_func op_30fc_50_ff; +extern cpuop_func op_3100_50_nf; +extern cpuop_func op_3100_50_ff; +extern cpuop_func op_3108_50_nf; +extern cpuop_func op_3108_50_ff; +extern cpuop_func op_3110_50_nf; +extern cpuop_func op_3110_50_ff; +extern cpuop_func op_3118_50_nf; +extern cpuop_func op_3118_50_ff; +extern cpuop_func op_3120_50_nf; +extern cpuop_func op_3120_50_ff; +extern cpuop_func op_3128_50_nf; +extern cpuop_func op_3128_50_ff; +extern cpuop_func op_3130_50_nf; +extern cpuop_func op_3130_50_ff; +extern cpuop_func op_3138_50_nf; +extern cpuop_func op_3138_50_ff; +extern cpuop_func op_3139_50_nf; +extern cpuop_func op_3139_50_ff; +extern cpuop_func op_313a_50_nf; +extern cpuop_func op_313a_50_ff; +extern cpuop_func op_313b_50_nf; +extern cpuop_func op_313b_50_ff; +extern cpuop_func op_313c_50_nf; +extern cpuop_func op_313c_50_ff; +extern cpuop_func op_3140_50_nf; +extern cpuop_func op_3140_50_ff; +extern cpuop_func op_3148_50_nf; +extern cpuop_func op_3148_50_ff; +extern cpuop_func op_3150_50_nf; +extern cpuop_func op_3150_50_ff; +extern cpuop_func op_3158_50_nf; +extern cpuop_func op_3158_50_ff; +extern cpuop_func op_3160_50_nf; +extern cpuop_func op_3160_50_ff; +extern cpuop_func op_3168_50_nf; +extern cpuop_func op_3168_50_ff; +extern cpuop_func op_3170_50_nf; +extern cpuop_func op_3170_50_ff; +extern cpuop_func op_3178_50_nf; +extern cpuop_func op_3178_50_ff; +extern cpuop_func op_3179_50_nf; +extern cpuop_func op_3179_50_ff; +extern cpuop_func op_317a_50_nf; +extern cpuop_func op_317a_50_ff; +extern cpuop_func op_317b_50_nf; +extern cpuop_func op_317b_50_ff; +extern cpuop_func op_317c_50_nf; +extern cpuop_func op_317c_50_ff; +extern cpuop_func op_3180_50_nf; +extern cpuop_func op_3180_50_ff; +extern cpuop_func op_3188_50_nf; +extern cpuop_func op_3188_50_ff; +extern cpuop_func op_3190_50_nf; +extern cpuop_func op_3190_50_ff; +extern cpuop_func op_3198_50_nf; +extern cpuop_func op_3198_50_ff; +extern cpuop_func op_31a0_50_nf; +extern cpuop_func op_31a0_50_ff; +extern cpuop_func op_31a8_50_nf; +extern cpuop_func op_31a8_50_ff; +extern cpuop_func op_31b0_50_nf; +extern cpuop_func op_31b0_50_ff; +extern cpuop_func op_31b8_50_nf; +extern cpuop_func op_31b8_50_ff; +extern cpuop_func op_31b9_50_nf; +extern cpuop_func op_31b9_50_ff; +extern cpuop_func op_31ba_50_nf; +extern cpuop_func op_31ba_50_ff; +extern cpuop_func op_31bb_50_nf; +extern cpuop_func op_31bb_50_ff; +extern cpuop_func op_31bc_50_nf; +extern cpuop_func op_31bc_50_ff; +extern cpuop_func op_31c0_50_nf; +extern cpuop_func op_31c0_50_ff; +extern cpuop_func op_31c8_50_nf; +extern cpuop_func op_31c8_50_ff; +extern cpuop_func op_31d0_50_nf; +extern cpuop_func op_31d0_50_ff; +extern cpuop_func op_31d8_50_nf; +extern cpuop_func op_31d8_50_ff; +extern cpuop_func op_31e0_50_nf; +extern cpuop_func op_31e0_50_ff; +extern cpuop_func op_31e8_50_nf; +extern cpuop_func op_31e8_50_ff; +extern cpuop_func op_31f0_50_nf; +extern cpuop_func op_31f0_50_ff; +extern cpuop_func op_31f8_50_nf; +extern cpuop_func op_31f8_50_ff; +extern cpuop_func op_31f9_50_nf; +extern cpuop_func op_31f9_50_ff; +extern cpuop_func op_31fa_50_nf; +extern cpuop_func op_31fa_50_ff; +extern cpuop_func op_31fb_50_nf; +extern cpuop_func op_31fb_50_ff; +extern cpuop_func op_31fc_50_nf; +extern cpuop_func op_31fc_50_ff; +extern cpuop_func op_33c0_50_nf; +extern cpuop_func op_33c0_50_ff; +extern cpuop_func op_33c8_50_nf; +extern cpuop_func op_33c8_50_ff; +extern cpuop_func op_33d0_50_nf; +extern cpuop_func op_33d0_50_ff; +extern cpuop_func op_33d8_50_nf; +extern cpuop_func op_33d8_50_ff; +extern cpuop_func op_33e0_50_nf; +extern cpuop_func op_33e0_50_ff; +extern cpuop_func op_33e8_50_nf; +extern cpuop_func op_33e8_50_ff; +extern cpuop_func op_33f0_50_nf; +extern cpuop_func op_33f0_50_ff; +extern cpuop_func op_33f8_50_nf; +extern cpuop_func op_33f8_50_ff; +extern cpuop_func op_33f9_50_nf; +extern cpuop_func op_33f9_50_ff; +extern cpuop_func op_33fa_50_nf; +extern cpuop_func op_33fa_50_ff; +extern cpuop_func op_33fb_50_nf; +extern cpuop_func op_33fb_50_ff; +extern cpuop_func op_33fc_50_nf; +extern cpuop_func op_33fc_50_ff; +extern cpuop_func op_4000_50_nf; +extern cpuop_func op_4000_50_ff; +extern cpuop_func op_4010_50_nf; +extern cpuop_func op_4010_50_ff; +extern cpuop_func op_4018_50_nf; +extern cpuop_func op_4018_50_ff; +extern cpuop_func op_4020_50_nf; +extern cpuop_func op_4020_50_ff; +extern cpuop_func op_4028_50_nf; +extern cpuop_func op_4028_50_ff; +extern cpuop_func op_4030_50_nf; +extern cpuop_func op_4030_50_ff; +extern cpuop_func op_4038_50_nf; +extern cpuop_func op_4038_50_ff; +extern cpuop_func op_4039_50_nf; +extern cpuop_func op_4039_50_ff; +extern cpuop_func op_4040_50_nf; +extern cpuop_func op_4040_50_ff; +extern cpuop_func op_4050_50_nf; +extern cpuop_func op_4050_50_ff; +extern cpuop_func op_4058_50_nf; +extern cpuop_func op_4058_50_ff; +extern cpuop_func op_4060_50_nf; +extern cpuop_func op_4060_50_ff; +extern cpuop_func op_4068_50_nf; +extern cpuop_func op_4068_50_ff; +extern cpuop_func op_4070_50_nf; +extern cpuop_func op_4070_50_ff; +extern cpuop_func op_4078_50_nf; +extern cpuop_func op_4078_50_ff; +extern cpuop_func op_4079_50_nf; +extern cpuop_func op_4079_50_ff; +extern cpuop_func op_4080_50_nf; +extern cpuop_func op_4080_50_ff; +extern cpuop_func op_4090_50_nf; +extern cpuop_func op_4090_50_ff; +extern cpuop_func op_4098_50_nf; +extern cpuop_func op_4098_50_ff; +extern cpuop_func op_40a0_50_nf; +extern cpuop_func op_40a0_50_ff; +extern cpuop_func op_40a8_50_nf; +extern cpuop_func op_40a8_50_ff; +extern cpuop_func op_40b0_50_nf; +extern cpuop_func op_40b0_50_ff; +extern cpuop_func op_40b8_50_nf; +extern cpuop_func op_40b8_50_ff; +extern cpuop_func op_40b9_50_nf; +extern cpuop_func op_40b9_50_ff; +extern cpuop_func op_40c0_50_nf; +extern cpuop_func op_40c0_50_ff; +extern cpuop_func op_40d0_50_nf; +extern cpuop_func op_40d0_50_ff; +extern cpuop_func op_40d8_50_nf; +extern cpuop_func op_40d8_50_ff; +extern cpuop_func op_40e0_50_nf; +extern cpuop_func op_40e0_50_ff; +extern cpuop_func op_40e8_50_nf; +extern cpuop_func op_40e8_50_ff; +extern cpuop_func op_40f0_50_nf; +extern cpuop_func op_40f0_50_ff; +extern cpuop_func op_40f8_50_nf; +extern cpuop_func op_40f8_50_ff; +extern cpuop_func op_40f9_50_nf; +extern cpuop_func op_40f9_50_ff; +extern cpuop_func op_4100_50_nf; +extern cpuop_func op_4100_50_ff; +extern cpuop_func op_4110_50_nf; +extern cpuop_func op_4110_50_ff; +extern cpuop_func op_4118_50_nf; +extern cpuop_func op_4118_50_ff; +extern cpuop_func op_4120_50_nf; +extern cpuop_func op_4120_50_ff; +extern cpuop_func op_4128_50_nf; +extern cpuop_func op_4128_50_ff; +extern cpuop_func op_4130_50_nf; +extern cpuop_func op_4130_50_ff; +extern cpuop_func op_4138_50_nf; +extern cpuop_func op_4138_50_ff; +extern cpuop_func op_4139_50_nf; +extern cpuop_func op_4139_50_ff; +extern cpuop_func op_413a_50_nf; +extern cpuop_func op_413a_50_ff; +extern cpuop_func op_413b_50_nf; +extern cpuop_func op_413b_50_ff; +extern cpuop_func op_413c_50_nf; +extern cpuop_func op_413c_50_ff; +extern cpuop_func op_4180_50_nf; +extern cpuop_func op_4180_50_ff; +extern cpuop_func op_4190_50_nf; +extern cpuop_func op_4190_50_ff; +extern cpuop_func op_4198_50_nf; +extern cpuop_func op_4198_50_ff; +extern cpuop_func op_41a0_50_nf; +extern cpuop_func op_41a0_50_ff; +extern cpuop_func op_41a8_50_nf; +extern cpuop_func op_41a8_50_ff; +extern cpuop_func op_41b0_50_nf; +extern cpuop_func op_41b0_50_ff; +extern cpuop_func op_41b8_50_nf; +extern cpuop_func op_41b8_50_ff; +extern cpuop_func op_41b9_50_nf; +extern cpuop_func op_41b9_50_ff; +extern cpuop_func op_41ba_50_nf; +extern cpuop_func op_41ba_50_ff; +extern cpuop_func op_41bb_50_nf; +extern cpuop_func op_41bb_50_ff; +extern cpuop_func op_41bc_50_nf; +extern cpuop_func op_41bc_50_ff; +extern cpuop_func op_41d0_50_nf; +extern cpuop_func op_41d0_50_ff; +extern cpuop_func op_41e8_50_nf; +extern cpuop_func op_41e8_50_ff; +extern cpuop_func op_41f0_50_nf; +extern cpuop_func op_41f0_50_ff; +extern cpuop_func op_41f8_50_nf; +extern cpuop_func op_41f8_50_ff; +extern cpuop_func op_41f9_50_nf; +extern cpuop_func op_41f9_50_ff; +extern cpuop_func op_41fa_50_nf; +extern cpuop_func op_41fa_50_ff; +extern cpuop_func op_41fb_50_nf; +extern cpuop_func op_41fb_50_ff; +extern cpuop_func op_4200_50_nf; +extern cpuop_func op_4200_50_ff; +extern cpuop_func op_4210_50_nf; +extern cpuop_func op_4210_50_ff; +extern cpuop_func op_4218_50_nf; +extern cpuop_func op_4218_50_ff; +extern cpuop_func op_4220_50_nf; +extern cpuop_func op_4220_50_ff; +extern cpuop_func op_4228_50_nf; +extern cpuop_func op_4228_50_ff; +extern cpuop_func op_4230_50_nf; +extern cpuop_func op_4230_50_ff; +extern cpuop_func op_4238_50_nf; +extern cpuop_func op_4238_50_ff; +extern cpuop_func op_4239_50_nf; +extern cpuop_func op_4239_50_ff; +extern cpuop_func op_4240_50_nf; +extern cpuop_func op_4240_50_ff; +extern cpuop_func op_4250_50_nf; +extern cpuop_func op_4250_50_ff; +extern cpuop_func op_4258_50_nf; +extern cpuop_func op_4258_50_ff; +extern cpuop_func op_4260_50_nf; +extern cpuop_func op_4260_50_ff; +extern cpuop_func op_4268_50_nf; +extern cpuop_func op_4268_50_ff; +extern cpuop_func op_4270_50_nf; +extern cpuop_func op_4270_50_ff; +extern cpuop_func op_4278_50_nf; +extern cpuop_func op_4278_50_ff; +extern cpuop_func op_4279_50_nf; +extern cpuop_func op_4279_50_ff; +extern cpuop_func op_4280_50_nf; +extern cpuop_func op_4280_50_ff; +extern cpuop_func op_4290_50_nf; +extern cpuop_func op_4290_50_ff; +extern cpuop_func op_4298_50_nf; +extern cpuop_func op_4298_50_ff; +extern cpuop_func op_42a0_50_nf; +extern cpuop_func op_42a0_50_ff; +extern cpuop_func op_42a8_50_nf; +extern cpuop_func op_42a8_50_ff; +extern cpuop_func op_42b0_50_nf; +extern cpuop_func op_42b0_50_ff; +extern cpuop_func op_42b8_50_nf; +extern cpuop_func op_42b8_50_ff; +extern cpuop_func op_42b9_50_nf; +extern cpuop_func op_42b9_50_ff; +extern cpuop_func op_42c0_50_nf; +extern cpuop_func op_42c0_50_ff; +extern cpuop_func op_42d0_50_nf; +extern cpuop_func op_42d0_50_ff; +extern cpuop_func op_42d8_50_nf; +extern cpuop_func op_42d8_50_ff; +extern cpuop_func op_42e0_50_nf; +extern cpuop_func op_42e0_50_ff; +extern cpuop_func op_42e8_50_nf; +extern cpuop_func op_42e8_50_ff; +extern cpuop_func op_42f0_50_nf; +extern cpuop_func op_42f0_50_ff; +extern cpuop_func op_42f8_50_nf; +extern cpuop_func op_42f8_50_ff; +extern cpuop_func op_42f9_50_nf; +extern cpuop_func op_42f9_50_ff; +extern cpuop_func op_4400_50_nf; +extern cpuop_func op_4400_50_ff; +extern cpuop_func op_4410_50_nf; +extern cpuop_func op_4410_50_ff; +extern cpuop_func op_4418_50_nf; +extern cpuop_func op_4418_50_ff; +extern cpuop_func op_4420_50_nf; +extern cpuop_func op_4420_50_ff; +extern cpuop_func op_4428_50_nf; +extern cpuop_func op_4428_50_ff; +extern cpuop_func op_4430_50_nf; +extern cpuop_func op_4430_50_ff; +extern cpuop_func op_4438_50_nf; +extern cpuop_func op_4438_50_ff; +extern cpuop_func op_4439_50_nf; +extern cpuop_func op_4439_50_ff; +extern cpuop_func op_4440_50_nf; +extern cpuop_func op_4440_50_ff; +extern cpuop_func op_4450_50_nf; +extern cpuop_func op_4450_50_ff; +extern cpuop_func op_4458_50_nf; +extern cpuop_func op_4458_50_ff; +extern cpuop_func op_4460_50_nf; +extern cpuop_func op_4460_50_ff; +extern cpuop_func op_4468_50_nf; +extern cpuop_func op_4468_50_ff; +extern cpuop_func op_4470_50_nf; +extern cpuop_func op_4470_50_ff; +extern cpuop_func op_4478_50_nf; +extern cpuop_func op_4478_50_ff; +extern cpuop_func op_4479_50_nf; +extern cpuop_func op_4479_50_ff; +extern cpuop_func op_4480_50_nf; +extern cpuop_func op_4480_50_ff; +extern cpuop_func op_4490_50_nf; +extern cpuop_func op_4490_50_ff; +extern cpuop_func op_4498_50_nf; +extern cpuop_func op_4498_50_ff; +extern cpuop_func op_44a0_50_nf; +extern cpuop_func op_44a0_50_ff; +extern cpuop_func op_44a8_50_nf; +extern cpuop_func op_44a8_50_ff; +extern cpuop_func op_44b0_50_nf; +extern cpuop_func op_44b0_50_ff; +extern cpuop_func op_44b8_50_nf; +extern cpuop_func op_44b8_50_ff; +extern cpuop_func op_44b9_50_nf; +extern cpuop_func op_44b9_50_ff; +extern cpuop_func op_44c0_50_nf; +extern cpuop_func op_44c0_50_ff; +extern cpuop_func op_44d0_50_nf; +extern cpuop_func op_44d0_50_ff; +extern cpuop_func op_44d8_50_nf; +extern cpuop_func op_44d8_50_ff; +extern cpuop_func op_44e0_50_nf; +extern cpuop_func op_44e0_50_ff; +extern cpuop_func op_44e8_50_nf; +extern cpuop_func op_44e8_50_ff; +extern cpuop_func op_44f0_50_nf; +extern cpuop_func op_44f0_50_ff; +extern cpuop_func op_44f8_50_nf; +extern cpuop_func op_44f8_50_ff; +extern cpuop_func op_44f9_50_nf; +extern cpuop_func op_44f9_50_ff; +extern cpuop_func op_44fa_50_nf; +extern cpuop_func op_44fa_50_ff; +extern cpuop_func op_44fb_50_nf; +extern cpuop_func op_44fb_50_ff; +extern cpuop_func op_44fc_50_nf; +extern cpuop_func op_44fc_50_ff; +extern cpuop_func op_4600_50_nf; +extern cpuop_func op_4600_50_ff; +extern cpuop_func op_4610_50_nf; +extern cpuop_func op_4610_50_ff; +extern cpuop_func op_4618_50_nf; +extern cpuop_func op_4618_50_ff; +extern cpuop_func op_4620_50_nf; +extern cpuop_func op_4620_50_ff; +extern cpuop_func op_4628_50_nf; +extern cpuop_func op_4628_50_ff; +extern cpuop_func op_4630_50_nf; +extern cpuop_func op_4630_50_ff; +extern cpuop_func op_4638_50_nf; +extern cpuop_func op_4638_50_ff; +extern cpuop_func op_4639_50_nf; +extern cpuop_func op_4639_50_ff; +extern cpuop_func op_4640_50_nf; +extern cpuop_func op_4640_50_ff; +extern cpuop_func op_4650_50_nf; +extern cpuop_func op_4650_50_ff; +extern cpuop_func op_4658_50_nf; +extern cpuop_func op_4658_50_ff; +extern cpuop_func op_4660_50_nf; +extern cpuop_func op_4660_50_ff; +extern cpuop_func op_4668_50_nf; +extern cpuop_func op_4668_50_ff; +extern cpuop_func op_4670_50_nf; +extern cpuop_func op_4670_50_ff; +extern cpuop_func op_4678_50_nf; +extern cpuop_func op_4678_50_ff; +extern cpuop_func op_4679_50_nf; +extern cpuop_func op_4679_50_ff; +extern cpuop_func op_4680_50_nf; +extern cpuop_func op_4680_50_ff; +extern cpuop_func op_4690_50_nf; +extern cpuop_func op_4690_50_ff; +extern cpuop_func op_4698_50_nf; +extern cpuop_func op_4698_50_ff; +extern cpuop_func op_46a0_50_nf; +extern cpuop_func op_46a0_50_ff; +extern cpuop_func op_46a8_50_nf; +extern cpuop_func op_46a8_50_ff; +extern cpuop_func op_46b0_50_nf; +extern cpuop_func op_46b0_50_ff; +extern cpuop_func op_46b8_50_nf; +extern cpuop_func op_46b8_50_ff; +extern cpuop_func op_46b9_50_nf; +extern cpuop_func op_46b9_50_ff; +extern cpuop_func op_46c0_50_nf; +extern cpuop_func op_46c0_50_ff; +extern cpuop_func op_46d0_50_nf; +extern cpuop_func op_46d0_50_ff; +extern cpuop_func op_46d8_50_nf; +extern cpuop_func op_46d8_50_ff; +extern cpuop_func op_46e0_50_nf; +extern cpuop_func op_46e0_50_ff; +extern cpuop_func op_46e8_50_nf; +extern cpuop_func op_46e8_50_ff; +extern cpuop_func op_46f0_50_nf; +extern cpuop_func op_46f0_50_ff; +extern cpuop_func op_46f8_50_nf; +extern cpuop_func op_46f8_50_ff; +extern cpuop_func op_46f9_50_nf; +extern cpuop_func op_46f9_50_ff; +extern cpuop_func op_46fa_50_nf; +extern cpuop_func op_46fa_50_ff; +extern cpuop_func op_46fb_50_nf; +extern cpuop_func op_46fb_50_ff; +extern cpuop_func op_46fc_50_nf; +extern cpuop_func op_46fc_50_ff; +extern cpuop_func op_4800_50_nf; +extern cpuop_func op_4800_50_ff; +extern cpuop_func op_4808_50_nf; +extern cpuop_func op_4808_50_ff; +extern cpuop_func op_4810_50_nf; +extern cpuop_func op_4810_50_ff; +extern cpuop_func op_4818_50_nf; +extern cpuop_func op_4818_50_ff; +extern cpuop_func op_4820_50_nf; +extern cpuop_func op_4820_50_ff; +extern cpuop_func op_4828_50_nf; +extern cpuop_func op_4828_50_ff; +extern cpuop_func op_4830_50_nf; +extern cpuop_func op_4830_50_ff; +extern cpuop_func op_4838_50_nf; +extern cpuop_func op_4838_50_ff; +extern cpuop_func op_4839_50_nf; +extern cpuop_func op_4839_50_ff; +extern cpuop_func op_4840_50_nf; +extern cpuop_func op_4840_50_ff; +extern cpuop_func op_4848_50_nf; +extern cpuop_func op_4848_50_ff; +extern cpuop_func op_4850_50_nf; +extern cpuop_func op_4850_50_ff; +extern cpuop_func op_4868_50_nf; +extern cpuop_func op_4868_50_ff; +extern cpuop_func op_4870_50_nf; +extern cpuop_func op_4870_50_ff; +extern cpuop_func op_4878_50_nf; +extern cpuop_func op_4878_50_ff; +extern cpuop_func op_4879_50_nf; +extern cpuop_func op_4879_50_ff; +extern cpuop_func op_487a_50_nf; +extern cpuop_func op_487a_50_ff; +extern cpuop_func op_487b_50_nf; +extern cpuop_func op_487b_50_ff; +extern cpuop_func op_4880_50_nf; +extern cpuop_func op_4880_50_ff; +extern cpuop_func op_4890_50_nf; +extern cpuop_func op_4890_50_ff; +extern cpuop_func op_48a0_50_nf; +extern cpuop_func op_48a0_50_ff; +extern cpuop_func op_48a8_50_nf; +extern cpuop_func op_48a8_50_ff; +extern cpuop_func op_48b0_50_nf; +extern cpuop_func op_48b0_50_ff; +extern cpuop_func op_48b8_50_nf; +extern cpuop_func op_48b8_50_ff; +extern cpuop_func op_48b9_50_nf; +extern cpuop_func op_48b9_50_ff; +extern cpuop_func op_48c0_50_nf; +extern cpuop_func op_48c0_50_ff; +extern cpuop_func op_48d0_50_nf; +extern cpuop_func op_48d0_50_ff; +extern cpuop_func op_48e0_50_nf; +extern cpuop_func op_48e0_50_ff; +extern cpuop_func op_48e8_50_nf; +extern cpuop_func op_48e8_50_ff; +extern cpuop_func op_48f0_50_nf; +extern cpuop_func op_48f0_50_ff; +extern cpuop_func op_48f8_50_nf; +extern cpuop_func op_48f8_50_ff; +extern cpuop_func op_48f9_50_nf; +extern cpuop_func op_48f9_50_ff; +extern cpuop_func op_49c0_50_nf; +extern cpuop_func op_49c0_50_ff; +extern cpuop_func op_4a00_50_nf; +extern cpuop_func op_4a00_50_ff; +extern cpuop_func op_4a10_50_nf; +extern cpuop_func op_4a10_50_ff; +extern cpuop_func op_4a18_50_nf; +extern cpuop_func op_4a18_50_ff; +extern cpuop_func op_4a20_50_nf; +extern cpuop_func op_4a20_50_ff; +extern cpuop_func op_4a28_50_nf; +extern cpuop_func op_4a28_50_ff; +extern cpuop_func op_4a30_50_nf; +extern cpuop_func op_4a30_50_ff; +extern cpuop_func op_4a38_50_nf; +extern cpuop_func op_4a38_50_ff; +extern cpuop_func op_4a39_50_nf; +extern cpuop_func op_4a39_50_ff; +extern cpuop_func op_4a3a_50_nf; +extern cpuop_func op_4a3a_50_ff; +extern cpuop_func op_4a3b_50_nf; +extern cpuop_func op_4a3b_50_ff; +extern cpuop_func op_4a3c_50_nf; +extern cpuop_func op_4a3c_50_ff; +extern cpuop_func op_4a40_50_nf; +extern cpuop_func op_4a40_50_ff; +extern cpuop_func op_4a48_50_nf; +extern cpuop_func op_4a48_50_ff; +extern cpuop_func op_4a50_50_nf; +extern cpuop_func op_4a50_50_ff; +extern cpuop_func op_4a58_50_nf; +extern cpuop_func op_4a58_50_ff; +extern cpuop_func op_4a60_50_nf; +extern cpuop_func op_4a60_50_ff; +extern cpuop_func op_4a68_50_nf; +extern cpuop_func op_4a68_50_ff; +extern cpuop_func op_4a70_50_nf; +extern cpuop_func op_4a70_50_ff; +extern cpuop_func op_4a78_50_nf; +extern cpuop_func op_4a78_50_ff; +extern cpuop_func op_4a79_50_nf; +extern cpuop_func op_4a79_50_ff; +extern cpuop_func op_4a7a_50_nf; +extern cpuop_func op_4a7a_50_ff; +extern cpuop_func op_4a7b_50_nf; +extern cpuop_func op_4a7b_50_ff; +extern cpuop_func op_4a7c_50_nf; +extern cpuop_func op_4a7c_50_ff; +extern cpuop_func op_4a80_50_nf; +extern cpuop_func op_4a80_50_ff; +extern cpuop_func op_4a88_50_nf; +extern cpuop_func op_4a88_50_ff; +extern cpuop_func op_4a90_50_nf; +extern cpuop_func op_4a90_50_ff; +extern cpuop_func op_4a98_50_nf; +extern cpuop_func op_4a98_50_ff; +extern cpuop_func op_4aa0_50_nf; +extern cpuop_func op_4aa0_50_ff; +extern cpuop_func op_4aa8_50_nf; +extern cpuop_func op_4aa8_50_ff; +extern cpuop_func op_4ab0_50_nf; +extern cpuop_func op_4ab0_50_ff; +extern cpuop_func op_4ab8_50_nf; +extern cpuop_func op_4ab8_50_ff; +extern cpuop_func op_4ab9_50_nf; +extern cpuop_func op_4ab9_50_ff; +extern cpuop_func op_4aba_50_nf; +extern cpuop_func op_4aba_50_ff; +extern cpuop_func op_4abb_50_nf; +extern cpuop_func op_4abb_50_ff; +extern cpuop_func op_4abc_50_nf; +extern cpuop_func op_4abc_50_ff; +extern cpuop_func op_4ac0_50_nf; +extern cpuop_func op_4ac0_50_ff; +extern cpuop_func op_4ac8_50_nf; +extern cpuop_func op_4ac8_50_ff; +extern cpuop_func op_4acc_50_nf; +extern cpuop_func op_4acc_50_ff; +extern cpuop_func op_4ad0_50_nf; +extern cpuop_func op_4ad0_50_ff; +extern cpuop_func op_4ad8_50_nf; +extern cpuop_func op_4ad8_50_ff; +extern cpuop_func op_4ae0_50_nf; +extern cpuop_func op_4ae0_50_ff; +extern cpuop_func op_4ae8_50_nf; +extern cpuop_func op_4ae8_50_ff; +extern cpuop_func op_4af0_50_nf; +extern cpuop_func op_4af0_50_ff; +extern cpuop_func op_4af8_50_nf; +extern cpuop_func op_4af8_50_ff; +extern cpuop_func op_4af9_50_nf; +extern cpuop_func op_4af9_50_ff; +extern cpuop_func op_4c00_50_nf; +extern cpuop_func op_4c00_50_ff; +extern cpuop_func op_4c10_50_nf; +extern cpuop_func op_4c10_50_ff; +extern cpuop_func op_4c18_50_nf; +extern cpuop_func op_4c18_50_ff; +extern cpuop_func op_4c20_50_nf; +extern cpuop_func op_4c20_50_ff; +extern cpuop_func op_4c28_50_nf; +extern cpuop_func op_4c28_50_ff; +extern cpuop_func op_4c30_50_nf; +extern cpuop_func op_4c30_50_ff; +extern cpuop_func op_4c38_50_nf; +extern cpuop_func op_4c38_50_ff; +extern cpuop_func op_4c39_50_nf; +extern cpuop_func op_4c39_50_ff; +extern cpuop_func op_4c3a_50_nf; +extern cpuop_func op_4c3a_50_ff; +extern cpuop_func op_4c3b_50_nf; +extern cpuop_func op_4c3b_50_ff; +extern cpuop_func op_4c3c_50_nf; +extern cpuop_func op_4c3c_50_ff; +extern cpuop_func op_4c40_50_nf; +extern cpuop_func op_4c40_50_ff; +extern cpuop_func op_4c50_50_nf; +extern cpuop_func op_4c50_50_ff; +extern cpuop_func op_4c58_50_nf; +extern cpuop_func op_4c58_50_ff; +extern cpuop_func op_4c60_50_nf; +extern cpuop_func op_4c60_50_ff; +extern cpuop_func op_4c68_50_nf; +extern cpuop_func op_4c68_50_ff; +extern cpuop_func op_4c70_50_nf; +extern cpuop_func op_4c70_50_ff; +extern cpuop_func op_4c78_50_nf; +extern cpuop_func op_4c78_50_ff; +extern cpuop_func op_4c79_50_nf; +extern cpuop_func op_4c79_50_ff; +extern cpuop_func op_4c7a_50_nf; +extern cpuop_func op_4c7a_50_ff; +extern cpuop_func op_4c7b_50_nf; +extern cpuop_func op_4c7b_50_ff; +extern cpuop_func op_4c7c_50_nf; +extern cpuop_func op_4c7c_50_ff; +extern cpuop_func op_4c90_50_nf; +extern cpuop_func op_4c90_50_ff; +extern cpuop_func op_4c98_50_nf; +extern cpuop_func op_4c98_50_ff; +extern cpuop_func op_4ca8_50_nf; +extern cpuop_func op_4ca8_50_ff; +extern cpuop_func op_4cb0_50_nf; +extern cpuop_func op_4cb0_50_ff; +extern cpuop_func op_4cb8_50_nf; +extern cpuop_func op_4cb8_50_ff; +extern cpuop_func op_4cb9_50_nf; +extern cpuop_func op_4cb9_50_ff; +extern cpuop_func op_4cba_50_nf; +extern cpuop_func op_4cba_50_ff; +extern cpuop_func op_4cbb_50_nf; +extern cpuop_func op_4cbb_50_ff; +extern cpuop_func op_4cd0_50_nf; +extern cpuop_func op_4cd0_50_ff; +extern cpuop_func op_4cd8_50_nf; +extern cpuop_func op_4cd8_50_ff; +extern cpuop_func op_4ce8_50_nf; +extern cpuop_func op_4ce8_50_ff; +extern cpuop_func op_4cf0_50_nf; +extern cpuop_func op_4cf0_50_ff; +extern cpuop_func op_4cf8_50_nf; +extern cpuop_func op_4cf8_50_ff; +extern cpuop_func op_4cf9_50_nf; +extern cpuop_func op_4cf9_50_ff; +extern cpuop_func op_4cfa_50_nf; +extern cpuop_func op_4cfa_50_ff; +extern cpuop_func op_4cfb_50_nf; +extern cpuop_func op_4cfb_50_ff; +extern cpuop_func op_4e40_50_nf; +extern cpuop_func op_4e40_50_ff; +extern cpuop_func op_4e50_50_nf; +extern cpuop_func op_4e50_50_ff; +extern cpuop_func op_4e58_50_nf; +extern cpuop_func op_4e58_50_ff; +extern cpuop_func op_4e60_50_nf; +extern cpuop_func op_4e60_50_ff; +extern cpuop_func op_4e68_50_nf; +extern cpuop_func op_4e68_50_ff; +extern cpuop_func op_4e70_50_nf; +extern cpuop_func op_4e70_50_ff; +extern cpuop_func op_4e71_50_nf; +extern cpuop_func op_4e71_50_ff; +extern cpuop_func op_4e72_50_nf; +extern cpuop_func op_4e72_50_ff; +extern cpuop_func op_4e73_50_nf; +extern cpuop_func op_4e73_50_ff; +extern cpuop_func op_4e74_50_nf; +extern cpuop_func op_4e74_50_ff; +extern cpuop_func op_4e75_50_nf; +extern cpuop_func op_4e75_50_ff; +extern cpuop_func op_4e76_50_nf; +extern cpuop_func op_4e76_50_ff; +extern cpuop_func op_4e77_50_nf; +extern cpuop_func op_4e77_50_ff; +extern cpuop_func op_4e7a_50_nf; +extern cpuop_func op_4e7a_50_ff; +extern cpuop_func op_4e7b_50_nf; +extern cpuop_func op_4e7b_50_ff; +extern cpuop_func op_4e90_50_nf; +extern cpuop_func op_4e90_50_ff; +extern cpuop_func op_4ea8_50_nf; +extern cpuop_func op_4ea8_50_ff; +extern cpuop_func op_4eb0_50_nf; +extern cpuop_func op_4eb0_50_ff; +extern cpuop_func op_4eb8_50_nf; +extern cpuop_func op_4eb8_50_ff; +extern cpuop_func op_4eb9_50_nf; +extern cpuop_func op_4eb9_50_ff; +extern cpuop_func op_4eba_50_nf; +extern cpuop_func op_4eba_50_ff; +extern cpuop_func op_4ebb_50_nf; +extern cpuop_func op_4ebb_50_ff; +extern cpuop_func op_4ed0_50_nf; +extern cpuop_func op_4ed0_50_ff; +extern cpuop_func op_4ee8_50_nf; +extern cpuop_func op_4ee8_50_ff; +extern cpuop_func op_4ef0_50_nf; +extern cpuop_func op_4ef0_50_ff; +extern cpuop_func op_4ef8_50_nf; +extern cpuop_func op_4ef8_50_ff; +extern cpuop_func op_4ef9_50_nf; +extern cpuop_func op_4ef9_50_ff; +extern cpuop_func op_4efa_50_nf; +extern cpuop_func op_4efa_50_ff; +extern cpuop_func op_4efb_50_nf; +extern cpuop_func op_4efb_50_ff; +extern cpuop_func op_5000_50_nf; +extern cpuop_func op_5000_50_ff; +extern cpuop_func op_5010_50_nf; +extern cpuop_func op_5010_50_ff; +extern cpuop_func op_5018_50_nf; +extern cpuop_func op_5018_50_ff; +extern cpuop_func op_5020_50_nf; +extern cpuop_func op_5020_50_ff; +extern cpuop_func op_5028_50_nf; +extern cpuop_func op_5028_50_ff; +extern cpuop_func op_5030_50_nf; +extern cpuop_func op_5030_50_ff; +extern cpuop_func op_5038_50_nf; +extern cpuop_func op_5038_50_ff; +extern cpuop_func op_5039_50_nf; +extern cpuop_func op_5039_50_ff; +extern cpuop_func op_5040_50_nf; +extern cpuop_func op_5040_50_ff; +extern cpuop_func op_5048_50_nf; +extern cpuop_func op_5048_50_ff; +extern cpuop_func op_5050_50_nf; +extern cpuop_func op_5050_50_ff; +extern cpuop_func op_5058_50_nf; +extern cpuop_func op_5058_50_ff; +extern cpuop_func op_5060_50_nf; +extern cpuop_func op_5060_50_ff; +extern cpuop_func op_5068_50_nf; +extern cpuop_func op_5068_50_ff; +extern cpuop_func op_5070_50_nf; +extern cpuop_func op_5070_50_ff; +extern cpuop_func op_5078_50_nf; +extern cpuop_func op_5078_50_ff; +extern cpuop_func op_5079_50_nf; +extern cpuop_func op_5079_50_ff; +extern cpuop_func op_5080_50_nf; +extern cpuop_func op_5080_50_ff; +extern cpuop_func op_5088_50_nf; +extern cpuop_func op_5088_50_ff; +extern cpuop_func op_5090_50_nf; +extern cpuop_func op_5090_50_ff; +extern cpuop_func op_5098_50_nf; +extern cpuop_func op_5098_50_ff; +extern cpuop_func op_50a0_50_nf; +extern cpuop_func op_50a0_50_ff; +extern cpuop_func op_50a8_50_nf; +extern cpuop_func op_50a8_50_ff; +extern cpuop_func op_50b0_50_nf; +extern cpuop_func op_50b0_50_ff; +extern cpuop_func op_50b8_50_nf; +extern cpuop_func op_50b8_50_ff; +extern cpuop_func op_50b9_50_nf; +extern cpuop_func op_50b9_50_ff; +extern cpuop_func op_50c0_50_nf; +extern cpuop_func op_50c0_50_ff; +extern cpuop_func op_50c8_50_nf; +extern cpuop_func op_50c8_50_ff; +extern cpuop_func op_50d0_50_nf; +extern cpuop_func op_50d0_50_ff; +extern cpuop_func op_50d8_50_nf; +extern cpuop_func op_50d8_50_ff; +extern cpuop_func op_50e0_50_nf; +extern cpuop_func op_50e0_50_ff; +extern cpuop_func op_50e8_50_nf; +extern cpuop_func op_50e8_50_ff; +extern cpuop_func op_50f0_50_nf; +extern cpuop_func op_50f0_50_ff; +extern cpuop_func op_50f8_50_nf; +extern cpuop_func op_50f8_50_ff; +extern cpuop_func op_50f9_50_nf; +extern cpuop_func op_50f9_50_ff; +extern cpuop_func op_50fa_50_nf; +extern cpuop_func op_50fa_50_ff; +extern cpuop_func op_50fb_50_nf; +extern cpuop_func op_50fb_50_ff; +extern cpuop_func op_50fc_50_nf; +extern cpuop_func op_50fc_50_ff; +extern cpuop_func op_5100_50_nf; +extern cpuop_func op_5100_50_ff; +extern cpuop_func op_5110_50_nf; +extern cpuop_func op_5110_50_ff; +extern cpuop_func op_5118_50_nf; +extern cpuop_func op_5118_50_ff; +extern cpuop_func op_5120_50_nf; +extern cpuop_func op_5120_50_ff; +extern cpuop_func op_5128_50_nf; +extern cpuop_func op_5128_50_ff; +extern cpuop_func op_5130_50_nf; +extern cpuop_func op_5130_50_ff; +extern cpuop_func op_5138_50_nf; +extern cpuop_func op_5138_50_ff; +extern cpuop_func op_5139_50_nf; +extern cpuop_func op_5139_50_ff; +extern cpuop_func op_5140_50_nf; +extern cpuop_func op_5140_50_ff; +extern cpuop_func op_5148_50_nf; +extern cpuop_func op_5148_50_ff; +extern cpuop_func op_5150_50_nf; +extern cpuop_func op_5150_50_ff; +extern cpuop_func op_5158_50_nf; +extern cpuop_func op_5158_50_ff; +extern cpuop_func op_5160_50_nf; +extern cpuop_func op_5160_50_ff; +extern cpuop_func op_5168_50_nf; +extern cpuop_func op_5168_50_ff; +extern cpuop_func op_5170_50_nf; +extern cpuop_func op_5170_50_ff; +extern cpuop_func op_5178_50_nf; +extern cpuop_func op_5178_50_ff; +extern cpuop_func op_5179_50_nf; +extern cpuop_func op_5179_50_ff; +extern cpuop_func op_5180_50_nf; +extern cpuop_func op_5180_50_ff; +extern cpuop_func op_5188_50_nf; +extern cpuop_func op_5188_50_ff; +extern cpuop_func op_5190_50_nf; +extern cpuop_func op_5190_50_ff; +extern cpuop_func op_5198_50_nf; +extern cpuop_func op_5198_50_ff; +extern cpuop_func op_51a0_50_nf; +extern cpuop_func op_51a0_50_ff; +extern cpuop_func op_51a8_50_nf; +extern cpuop_func op_51a8_50_ff; +extern cpuop_func op_51b0_50_nf; +extern cpuop_func op_51b0_50_ff; +extern cpuop_func op_51b8_50_nf; +extern cpuop_func op_51b8_50_ff; +extern cpuop_func op_51b9_50_nf; +extern cpuop_func op_51b9_50_ff; +extern cpuop_func op_51c0_50_nf; +extern cpuop_func op_51c0_50_ff; +extern cpuop_func op_51c8_50_nf; +extern cpuop_func op_51c8_50_ff; +extern cpuop_func op_51d0_50_nf; +extern cpuop_func op_51d0_50_ff; +extern cpuop_func op_51d8_50_nf; +extern cpuop_func op_51d8_50_ff; +extern cpuop_func op_51e0_50_nf; +extern cpuop_func op_51e0_50_ff; +extern cpuop_func op_51e8_50_nf; +extern cpuop_func op_51e8_50_ff; +extern cpuop_func op_51f0_50_nf; +extern cpuop_func op_51f0_50_ff; +extern cpuop_func op_51f8_50_nf; +extern cpuop_func op_51f8_50_ff; +extern cpuop_func op_51f9_50_nf; +extern cpuop_func op_51f9_50_ff; +extern cpuop_func op_51fa_50_nf; +extern cpuop_func op_51fa_50_ff; +extern cpuop_func op_51fb_50_nf; +extern cpuop_func op_51fb_50_ff; +extern cpuop_func op_51fc_50_nf; +extern cpuop_func op_51fc_50_ff; +extern cpuop_func op_52c0_50_nf; +extern cpuop_func op_52c0_50_ff; +extern cpuop_func op_52c8_50_nf; +extern cpuop_func op_52c8_50_ff; +extern cpuop_func op_52d0_50_nf; +extern cpuop_func op_52d0_50_ff; +extern cpuop_func op_52d8_50_nf; +extern cpuop_func op_52d8_50_ff; +extern cpuop_func op_52e0_50_nf; +extern cpuop_func op_52e0_50_ff; +extern cpuop_func op_52e8_50_nf; +extern cpuop_func op_52e8_50_ff; +extern cpuop_func op_52f0_50_nf; +extern cpuop_func op_52f0_50_ff; +extern cpuop_func op_52f8_50_nf; +extern cpuop_func op_52f8_50_ff; +extern cpuop_func op_52f9_50_nf; +extern cpuop_func op_52f9_50_ff; +extern cpuop_func op_52fa_50_nf; +extern cpuop_func op_52fa_50_ff; +extern cpuop_func op_52fb_50_nf; +extern cpuop_func op_52fb_50_ff; +extern cpuop_func op_52fc_50_nf; +extern cpuop_func op_52fc_50_ff; +extern cpuop_func op_53c0_50_nf; +extern cpuop_func op_53c0_50_ff; +extern cpuop_func op_53c8_50_nf; +extern cpuop_func op_53c8_50_ff; +extern cpuop_func op_53d0_50_nf; +extern cpuop_func op_53d0_50_ff; +extern cpuop_func op_53d8_50_nf; +extern cpuop_func op_53d8_50_ff; +extern cpuop_func op_53e0_50_nf; +extern cpuop_func op_53e0_50_ff; +extern cpuop_func op_53e8_50_nf; +extern cpuop_func op_53e8_50_ff; +extern cpuop_func op_53f0_50_nf; +extern cpuop_func op_53f0_50_ff; +extern cpuop_func op_53f8_50_nf; +extern cpuop_func op_53f8_50_ff; +extern cpuop_func op_53f9_50_nf; +extern cpuop_func op_53f9_50_ff; +extern cpuop_func op_53fa_50_nf; +extern cpuop_func op_53fa_50_ff; +extern cpuop_func op_53fb_50_nf; +extern cpuop_func op_53fb_50_ff; +extern cpuop_func op_53fc_50_nf; +extern cpuop_func op_53fc_50_ff; +extern cpuop_func op_54c0_50_nf; +extern cpuop_func op_54c0_50_ff; +extern cpuop_func op_54c8_50_nf; +extern cpuop_func op_54c8_50_ff; +extern cpuop_func op_54d0_50_nf; +extern cpuop_func op_54d0_50_ff; +extern cpuop_func op_54d8_50_nf; +extern cpuop_func op_54d8_50_ff; +extern cpuop_func op_54e0_50_nf; +extern cpuop_func op_54e0_50_ff; +extern cpuop_func op_54e8_50_nf; +extern cpuop_func op_54e8_50_ff; +extern cpuop_func op_54f0_50_nf; +extern cpuop_func op_54f0_50_ff; +extern cpuop_func op_54f8_50_nf; +extern cpuop_func op_54f8_50_ff; +extern cpuop_func op_54f9_50_nf; +extern cpuop_func op_54f9_50_ff; +extern cpuop_func op_54fa_50_nf; +extern cpuop_func op_54fa_50_ff; +extern cpuop_func op_54fb_50_nf; +extern cpuop_func op_54fb_50_ff; +extern cpuop_func op_54fc_50_nf; +extern cpuop_func op_54fc_50_ff; +extern cpuop_func op_55c0_50_nf; +extern cpuop_func op_55c0_50_ff; +extern cpuop_func op_55c8_50_nf; +extern cpuop_func op_55c8_50_ff; +extern cpuop_func op_55d0_50_nf; +extern cpuop_func op_55d0_50_ff; +extern cpuop_func op_55d8_50_nf; +extern cpuop_func op_55d8_50_ff; +extern cpuop_func op_55e0_50_nf; +extern cpuop_func op_55e0_50_ff; +extern cpuop_func op_55e8_50_nf; +extern cpuop_func op_55e8_50_ff; +extern cpuop_func op_55f0_50_nf; +extern cpuop_func op_55f0_50_ff; +extern cpuop_func op_55f8_50_nf; +extern cpuop_func op_55f8_50_ff; +extern cpuop_func op_55f9_50_nf; +extern cpuop_func op_55f9_50_ff; +extern cpuop_func op_55fa_50_nf; +extern cpuop_func op_55fa_50_ff; +extern cpuop_func op_55fb_50_nf; +extern cpuop_func op_55fb_50_ff; +extern cpuop_func op_55fc_50_nf; +extern cpuop_func op_55fc_50_ff; +extern cpuop_func op_56c0_50_nf; +extern cpuop_func op_56c0_50_ff; +extern cpuop_func op_56c8_50_nf; +extern cpuop_func op_56c8_50_ff; +extern cpuop_func op_56d0_50_nf; +extern cpuop_func op_56d0_50_ff; +extern cpuop_func op_56d8_50_nf; +extern cpuop_func op_56d8_50_ff; +extern cpuop_func op_56e0_50_nf; +extern cpuop_func op_56e0_50_ff; +extern cpuop_func op_56e8_50_nf; +extern cpuop_func op_56e8_50_ff; +extern cpuop_func op_56f0_50_nf; +extern cpuop_func op_56f0_50_ff; +extern cpuop_func op_56f8_50_nf; +extern cpuop_func op_56f8_50_ff; +extern cpuop_func op_56f9_50_nf; +extern cpuop_func op_56f9_50_ff; +extern cpuop_func op_56fa_50_nf; +extern cpuop_func op_56fa_50_ff; +extern cpuop_func op_56fb_50_nf; +extern cpuop_func op_56fb_50_ff; +extern cpuop_func op_56fc_50_nf; +extern cpuop_func op_56fc_50_ff; +extern cpuop_func op_57c0_50_nf; +extern cpuop_func op_57c0_50_ff; +extern cpuop_func op_57c8_50_nf; +extern cpuop_func op_57c8_50_ff; +extern cpuop_func op_57d0_50_nf; +extern cpuop_func op_57d0_50_ff; +extern cpuop_func op_57d8_50_nf; +extern cpuop_func op_57d8_50_ff; +extern cpuop_func op_57e0_50_nf; +extern cpuop_func op_57e0_50_ff; +extern cpuop_func op_57e8_50_nf; +extern cpuop_func op_57e8_50_ff; +extern cpuop_func op_57f0_50_nf; +extern cpuop_func op_57f0_50_ff; +extern cpuop_func op_57f8_50_nf; +extern cpuop_func op_57f8_50_ff; +extern cpuop_func op_57f9_50_nf; +extern cpuop_func op_57f9_50_ff; +extern cpuop_func op_57fa_50_nf; +extern cpuop_func op_57fa_50_ff; +extern cpuop_func op_57fb_50_nf; +extern cpuop_func op_57fb_50_ff; +extern cpuop_func op_57fc_50_nf; +extern cpuop_func op_57fc_50_ff; +extern cpuop_func op_58c0_50_nf; +extern cpuop_func op_58c0_50_ff; +extern cpuop_func op_58c8_50_nf; +extern cpuop_func op_58c8_50_ff; +extern cpuop_func op_58d0_50_nf; +extern cpuop_func op_58d0_50_ff; +extern cpuop_func op_58d8_50_nf; +extern cpuop_func op_58d8_50_ff; +extern cpuop_func op_58e0_50_nf; +extern cpuop_func op_58e0_50_ff; +extern cpuop_func op_58e8_50_nf; +extern cpuop_func op_58e8_50_ff; +extern cpuop_func op_58f0_50_nf; +extern cpuop_func op_58f0_50_ff; +extern cpuop_func op_58f8_50_nf; +extern cpuop_func op_58f8_50_ff; +extern cpuop_func op_58f9_50_nf; +extern cpuop_func op_58f9_50_ff; +extern cpuop_func op_58fa_50_nf; +extern cpuop_func op_58fa_50_ff; +extern cpuop_func op_58fb_50_nf; +extern cpuop_func op_58fb_50_ff; +extern cpuop_func op_58fc_50_nf; +extern cpuop_func op_58fc_50_ff; +extern cpuop_func op_59c0_50_nf; +extern cpuop_func op_59c0_50_ff; +extern cpuop_func op_59c8_50_nf; +extern cpuop_func op_59c8_50_ff; +extern cpuop_func op_59d0_50_nf; +extern cpuop_func op_59d0_50_ff; +extern cpuop_func op_59d8_50_nf; +extern cpuop_func op_59d8_50_ff; +extern cpuop_func op_59e0_50_nf; +extern cpuop_func op_59e0_50_ff; +extern cpuop_func op_59e8_50_nf; +extern cpuop_func op_59e8_50_ff; +extern cpuop_func op_59f0_50_nf; +extern cpuop_func op_59f0_50_ff; +extern cpuop_func op_59f8_50_nf; +extern cpuop_func op_59f8_50_ff; +extern cpuop_func op_59f9_50_nf; +extern cpuop_func op_59f9_50_ff; +extern cpuop_func op_59fa_50_nf; +extern cpuop_func op_59fa_50_ff; +extern cpuop_func op_59fb_50_nf; +extern cpuop_func op_59fb_50_ff; +extern cpuop_func op_59fc_50_nf; +extern cpuop_func op_59fc_50_ff; +extern cpuop_func op_5ac0_50_nf; +extern cpuop_func op_5ac0_50_ff; +extern cpuop_func op_5ac8_50_nf; +extern cpuop_func op_5ac8_50_ff; +extern cpuop_func op_5ad0_50_nf; +extern cpuop_func op_5ad0_50_ff; +extern cpuop_func op_5ad8_50_nf; +extern cpuop_func op_5ad8_50_ff; +extern cpuop_func op_5ae0_50_nf; +extern cpuop_func op_5ae0_50_ff; +extern cpuop_func op_5ae8_50_nf; +extern cpuop_func op_5ae8_50_ff; +extern cpuop_func op_5af0_50_nf; +extern cpuop_func op_5af0_50_ff; +extern cpuop_func op_5af8_50_nf; +extern cpuop_func op_5af8_50_ff; +extern cpuop_func op_5af9_50_nf; +extern cpuop_func op_5af9_50_ff; +extern cpuop_func op_5afa_50_nf; +extern cpuop_func op_5afa_50_ff; +extern cpuop_func op_5afb_50_nf; +extern cpuop_func op_5afb_50_ff; +extern cpuop_func op_5afc_50_nf; +extern cpuop_func op_5afc_50_ff; +extern cpuop_func op_5bc0_50_nf; +extern cpuop_func op_5bc0_50_ff; +extern cpuop_func op_5bc8_50_nf; +extern cpuop_func op_5bc8_50_ff; +extern cpuop_func op_5bd0_50_nf; +extern cpuop_func op_5bd0_50_ff; +extern cpuop_func op_5bd8_50_nf; +extern cpuop_func op_5bd8_50_ff; +extern cpuop_func op_5be0_50_nf; +extern cpuop_func op_5be0_50_ff; +extern cpuop_func op_5be8_50_nf; +extern cpuop_func op_5be8_50_ff; +extern cpuop_func op_5bf0_50_nf; +extern cpuop_func op_5bf0_50_ff; +extern cpuop_func op_5bf8_50_nf; +extern cpuop_func op_5bf8_50_ff; +extern cpuop_func op_5bf9_50_nf; +extern cpuop_func op_5bf9_50_ff; +extern cpuop_func op_5bfa_50_nf; +extern cpuop_func op_5bfa_50_ff; +extern cpuop_func op_5bfb_50_nf; +extern cpuop_func op_5bfb_50_ff; +extern cpuop_func op_5bfc_50_nf; +extern cpuop_func op_5bfc_50_ff; +extern cpuop_func op_5cc0_50_nf; +extern cpuop_func op_5cc0_50_ff; +extern cpuop_func op_5cc8_50_nf; +extern cpuop_func op_5cc8_50_ff; +extern cpuop_func op_5cd0_50_nf; +extern cpuop_func op_5cd0_50_ff; +extern cpuop_func op_5cd8_50_nf; +extern cpuop_func op_5cd8_50_ff; +extern cpuop_func op_5ce0_50_nf; +extern cpuop_func op_5ce0_50_ff; +extern cpuop_func op_5ce8_50_nf; +extern cpuop_func op_5ce8_50_ff; +extern cpuop_func op_5cf0_50_nf; +extern cpuop_func op_5cf0_50_ff; +extern cpuop_func op_5cf8_50_nf; +extern cpuop_func op_5cf8_50_ff; +extern cpuop_func op_5cf9_50_nf; +extern cpuop_func op_5cf9_50_ff; +extern cpuop_func op_5cfa_50_nf; +extern cpuop_func op_5cfa_50_ff; +extern cpuop_func op_5cfb_50_nf; +extern cpuop_func op_5cfb_50_ff; +extern cpuop_func op_5cfc_50_nf; +extern cpuop_func op_5cfc_50_ff; +extern cpuop_func op_5dc0_50_nf; +extern cpuop_func op_5dc0_50_ff; +extern cpuop_func op_5dc8_50_nf; +extern cpuop_func op_5dc8_50_ff; +extern cpuop_func op_5dd0_50_nf; +extern cpuop_func op_5dd0_50_ff; +extern cpuop_func op_5dd8_50_nf; +extern cpuop_func op_5dd8_50_ff; +extern cpuop_func op_5de0_50_nf; +extern cpuop_func op_5de0_50_ff; +extern cpuop_func op_5de8_50_nf; +extern cpuop_func op_5de8_50_ff; +extern cpuop_func op_5df0_50_nf; +extern cpuop_func op_5df0_50_ff; +extern cpuop_func op_5df8_50_nf; +extern cpuop_func op_5df8_50_ff; +extern cpuop_func op_5df9_50_nf; +extern cpuop_func op_5df9_50_ff; +extern cpuop_func op_5dfa_50_nf; +extern cpuop_func op_5dfa_50_ff; +extern cpuop_func op_5dfb_50_nf; +extern cpuop_func op_5dfb_50_ff; +extern cpuop_func op_5dfc_50_nf; +extern cpuop_func op_5dfc_50_ff; +extern cpuop_func op_5ec0_50_nf; +extern cpuop_func op_5ec0_50_ff; +extern cpuop_func op_5ec8_50_nf; +extern cpuop_func op_5ec8_50_ff; +extern cpuop_func op_5ed0_50_nf; +extern cpuop_func op_5ed0_50_ff; +extern cpuop_func op_5ed8_50_nf; +extern cpuop_func op_5ed8_50_ff; +extern cpuop_func op_5ee0_50_nf; +extern cpuop_func op_5ee0_50_ff; +extern cpuop_func op_5ee8_50_nf; +extern cpuop_func op_5ee8_50_ff; +extern cpuop_func op_5ef0_50_nf; +extern cpuop_func op_5ef0_50_ff; +extern cpuop_func op_5ef8_50_nf; +extern cpuop_func op_5ef8_50_ff; +extern cpuop_func op_5ef9_50_nf; +extern cpuop_func op_5ef9_50_ff; +extern cpuop_func op_5efa_50_nf; +extern cpuop_func op_5efa_50_ff; +extern cpuop_func op_5efb_50_nf; +extern cpuop_func op_5efb_50_ff; +extern cpuop_func op_5efc_50_nf; +extern cpuop_func op_5efc_50_ff; +extern cpuop_func op_5fc0_50_nf; +extern cpuop_func op_5fc0_50_ff; +extern cpuop_func op_5fc8_50_nf; +extern cpuop_func op_5fc8_50_ff; +extern cpuop_func op_5fd0_50_nf; +extern cpuop_func op_5fd0_50_ff; +extern cpuop_func op_5fd8_50_nf; +extern cpuop_func op_5fd8_50_ff; +extern cpuop_func op_5fe0_50_nf; +extern cpuop_func op_5fe0_50_ff; +extern cpuop_func op_5fe8_50_nf; +extern cpuop_func op_5fe8_50_ff; +extern cpuop_func op_5ff0_50_nf; +extern cpuop_func op_5ff0_50_ff; +extern cpuop_func op_5ff8_50_nf; +extern cpuop_func op_5ff8_50_ff; +extern cpuop_func op_5ff9_50_nf; +extern cpuop_func op_5ff9_50_ff; +extern cpuop_func op_5ffa_50_nf; +extern cpuop_func op_5ffa_50_ff; +extern cpuop_func op_5ffb_50_nf; +extern cpuop_func op_5ffb_50_ff; +extern cpuop_func op_5ffc_50_nf; +extern cpuop_func op_5ffc_50_ff; +extern cpuop_func op_6000_50_nf; +extern cpuop_func op_6000_50_ff; +extern cpuop_func op_6001_50_nf; +extern cpuop_func op_6001_50_ff; +extern cpuop_func op_60ff_50_nf; +extern cpuop_func op_60ff_50_ff; +extern cpuop_func op_6100_50_nf; +extern cpuop_func op_6100_50_ff; +extern cpuop_func op_6101_50_nf; +extern cpuop_func op_6101_50_ff; +extern cpuop_func op_61ff_50_nf; +extern cpuop_func op_61ff_50_ff; +extern cpuop_func op_6200_50_nf; +extern cpuop_func op_6200_50_ff; +extern cpuop_func op_6201_50_nf; +extern cpuop_func op_6201_50_ff; +extern cpuop_func op_62ff_50_nf; +extern cpuop_func op_62ff_50_ff; +extern cpuop_func op_6300_50_nf; +extern cpuop_func op_6300_50_ff; +extern cpuop_func op_6301_50_nf; +extern cpuop_func op_6301_50_ff; +extern cpuop_func op_63ff_50_nf; +extern cpuop_func op_63ff_50_ff; +extern cpuop_func op_6400_50_nf; +extern cpuop_func op_6400_50_ff; +extern cpuop_func op_6401_50_nf; +extern cpuop_func op_6401_50_ff; +extern cpuop_func op_64ff_50_nf; +extern cpuop_func op_64ff_50_ff; +extern cpuop_func op_6500_50_nf; +extern cpuop_func op_6500_50_ff; +extern cpuop_func op_6501_50_nf; +extern cpuop_func op_6501_50_ff; +extern cpuop_func op_65ff_50_nf; +extern cpuop_func op_65ff_50_ff; +extern cpuop_func op_6600_50_nf; +extern cpuop_func op_6600_50_ff; +extern cpuop_func op_6601_50_nf; +extern cpuop_func op_6601_50_ff; +extern cpuop_func op_66ff_50_nf; +extern cpuop_func op_66ff_50_ff; +extern cpuop_func op_6700_50_nf; +extern cpuop_func op_6700_50_ff; +extern cpuop_func op_6701_50_nf; +extern cpuop_func op_6701_50_ff; +extern cpuop_func op_67ff_50_nf; +extern cpuop_func op_67ff_50_ff; +extern cpuop_func op_6800_50_nf; +extern cpuop_func op_6800_50_ff; +extern cpuop_func op_6801_50_nf; +extern cpuop_func op_6801_50_ff; +extern cpuop_func op_68ff_50_nf; +extern cpuop_func op_68ff_50_ff; +extern cpuop_func op_6900_50_nf; +extern cpuop_func op_6900_50_ff; +extern cpuop_func op_6901_50_nf; +extern cpuop_func op_6901_50_ff; +extern cpuop_func op_69ff_50_nf; +extern cpuop_func op_69ff_50_ff; +extern cpuop_func op_6a00_50_nf; +extern cpuop_func op_6a00_50_ff; +extern cpuop_func op_6a01_50_nf; +extern cpuop_func op_6a01_50_ff; +extern cpuop_func op_6aff_50_nf; +extern cpuop_func op_6aff_50_ff; +extern cpuop_func op_6b00_50_nf; +extern cpuop_func op_6b00_50_ff; +extern cpuop_func op_6b01_50_nf; +extern cpuop_func op_6b01_50_ff; +extern cpuop_func op_6bff_50_nf; +extern cpuop_func op_6bff_50_ff; +extern cpuop_func op_6c00_50_nf; +extern cpuop_func op_6c00_50_ff; +extern cpuop_func op_6c01_50_nf; +extern cpuop_func op_6c01_50_ff; +extern cpuop_func op_6cff_50_nf; +extern cpuop_func op_6cff_50_ff; +extern cpuop_func op_6d00_50_nf; +extern cpuop_func op_6d00_50_ff; +extern cpuop_func op_6d01_50_nf; +extern cpuop_func op_6d01_50_ff; +extern cpuop_func op_6dff_50_nf; +extern cpuop_func op_6dff_50_ff; +extern cpuop_func op_6e00_50_nf; +extern cpuop_func op_6e00_50_ff; +extern cpuop_func op_6e01_50_nf; +extern cpuop_func op_6e01_50_ff; +extern cpuop_func op_6eff_50_nf; +extern cpuop_func op_6eff_50_ff; +extern cpuop_func op_6f00_50_nf; +extern cpuop_func op_6f00_50_ff; +extern cpuop_func op_6f01_50_nf; +extern cpuop_func op_6f01_50_ff; +extern cpuop_func op_6fff_50_nf; +extern cpuop_func op_6fff_50_ff; +extern cpuop_func op_7000_50_nf; +extern cpuop_func op_7000_50_ff; +extern cpuop_func op_8000_50_nf; +extern cpuop_func op_8000_50_ff; +extern cpuop_func op_8010_50_nf; +extern cpuop_func op_8010_50_ff; +extern cpuop_func op_8018_50_nf; +extern cpuop_func op_8018_50_ff; +extern cpuop_func op_8020_50_nf; +extern cpuop_func op_8020_50_ff; +extern cpuop_func op_8028_50_nf; +extern cpuop_func op_8028_50_ff; +extern cpuop_func op_8030_50_nf; +extern cpuop_func op_8030_50_ff; +extern cpuop_func op_8038_50_nf; +extern cpuop_func op_8038_50_ff; +extern cpuop_func op_8039_50_nf; +extern cpuop_func op_8039_50_ff; +extern cpuop_func op_803a_50_nf; +extern cpuop_func op_803a_50_ff; +extern cpuop_func op_803b_50_nf; +extern cpuop_func op_803b_50_ff; +extern cpuop_func op_803c_50_nf; +extern cpuop_func op_803c_50_ff; +extern cpuop_func op_8040_50_nf; +extern cpuop_func op_8040_50_ff; +extern cpuop_func op_8050_50_nf; +extern cpuop_func op_8050_50_ff; +extern cpuop_func op_8058_50_nf; +extern cpuop_func op_8058_50_ff; +extern cpuop_func op_8060_50_nf; +extern cpuop_func op_8060_50_ff; +extern cpuop_func op_8068_50_nf; +extern cpuop_func op_8068_50_ff; +extern cpuop_func op_8070_50_nf; +extern cpuop_func op_8070_50_ff; +extern cpuop_func op_8078_50_nf; +extern cpuop_func op_8078_50_ff; +extern cpuop_func op_8079_50_nf; +extern cpuop_func op_8079_50_ff; +extern cpuop_func op_807a_50_nf; +extern cpuop_func op_807a_50_ff; +extern cpuop_func op_807b_50_nf; +extern cpuop_func op_807b_50_ff; +extern cpuop_func op_807c_50_nf; +extern cpuop_func op_807c_50_ff; +extern cpuop_func op_8080_50_nf; +extern cpuop_func op_8080_50_ff; +extern cpuop_func op_8090_50_nf; +extern cpuop_func op_8090_50_ff; +extern cpuop_func op_8098_50_nf; +extern cpuop_func op_8098_50_ff; +extern cpuop_func op_80a0_50_nf; +extern cpuop_func op_80a0_50_ff; +extern cpuop_func op_80a8_50_nf; +extern cpuop_func op_80a8_50_ff; +extern cpuop_func op_80b0_50_nf; +extern cpuop_func op_80b0_50_ff; +extern cpuop_func op_80b8_50_nf; +extern cpuop_func op_80b8_50_ff; +extern cpuop_func op_80b9_50_nf; +extern cpuop_func op_80b9_50_ff; +extern cpuop_func op_80ba_50_nf; +extern cpuop_func op_80ba_50_ff; +extern cpuop_func op_80bb_50_nf; +extern cpuop_func op_80bb_50_ff; +extern cpuop_func op_80bc_50_nf; +extern cpuop_func op_80bc_50_ff; +extern cpuop_func op_80c0_50_nf; +extern cpuop_func op_80c0_50_ff; +extern cpuop_func op_80d0_50_nf; +extern cpuop_func op_80d0_50_ff; +extern cpuop_func op_80d8_50_nf; +extern cpuop_func op_80d8_50_ff; +extern cpuop_func op_80e0_50_nf; +extern cpuop_func op_80e0_50_ff; +extern cpuop_func op_80e8_50_nf; +extern cpuop_func op_80e8_50_ff; +extern cpuop_func op_80f0_50_nf; +extern cpuop_func op_80f0_50_ff; +extern cpuop_func op_80f8_50_nf; +extern cpuop_func op_80f8_50_ff; +extern cpuop_func op_80f9_50_nf; +extern cpuop_func op_80f9_50_ff; +extern cpuop_func op_80fa_50_nf; +extern cpuop_func op_80fa_50_ff; +extern cpuop_func op_80fb_50_nf; +extern cpuop_func op_80fb_50_ff; +extern cpuop_func op_80fc_50_nf; +extern cpuop_func op_80fc_50_ff; +extern cpuop_func op_8100_50_nf; +extern cpuop_func op_8100_50_ff; +extern cpuop_func op_8108_50_nf; +extern cpuop_func op_8108_50_ff; +extern cpuop_func op_8110_50_nf; +extern cpuop_func op_8110_50_ff; +extern cpuop_func op_8118_50_nf; +extern cpuop_func op_8118_50_ff; +extern cpuop_func op_8120_50_nf; +extern cpuop_func op_8120_50_ff; +extern cpuop_func op_8128_50_nf; +extern cpuop_func op_8128_50_ff; +extern cpuop_func op_8130_50_nf; +extern cpuop_func op_8130_50_ff; +extern cpuop_func op_8138_50_nf; +extern cpuop_func op_8138_50_ff; +extern cpuop_func op_8139_50_nf; +extern cpuop_func op_8139_50_ff; +extern cpuop_func op_8140_50_nf; +extern cpuop_func op_8140_50_ff; +extern cpuop_func op_8148_50_nf; +extern cpuop_func op_8148_50_ff; +extern cpuop_func op_8150_50_nf; +extern cpuop_func op_8150_50_ff; +extern cpuop_func op_8158_50_nf; +extern cpuop_func op_8158_50_ff; +extern cpuop_func op_8160_50_nf; +extern cpuop_func op_8160_50_ff; +extern cpuop_func op_8168_50_nf; +extern cpuop_func op_8168_50_ff; +extern cpuop_func op_8170_50_nf; +extern cpuop_func op_8170_50_ff; +extern cpuop_func op_8178_50_nf; +extern cpuop_func op_8178_50_ff; +extern cpuop_func op_8179_50_nf; +extern cpuop_func op_8179_50_ff; +extern cpuop_func op_8180_50_nf; +extern cpuop_func op_8180_50_ff; +extern cpuop_func op_8188_50_nf; +extern cpuop_func op_8188_50_ff; +extern cpuop_func op_8190_50_nf; +extern cpuop_func op_8190_50_ff; +extern cpuop_func op_8198_50_nf; +extern cpuop_func op_8198_50_ff; +extern cpuop_func op_81a0_50_nf; +extern cpuop_func op_81a0_50_ff; +extern cpuop_func op_81a8_50_nf; +extern cpuop_func op_81a8_50_ff; +extern cpuop_func op_81b0_50_nf; +extern cpuop_func op_81b0_50_ff; +extern cpuop_func op_81b8_50_nf; +extern cpuop_func op_81b8_50_ff; +extern cpuop_func op_81b9_50_nf; +extern cpuop_func op_81b9_50_ff; +extern cpuop_func op_81c0_50_nf; +extern cpuop_func op_81c0_50_ff; +extern cpuop_func op_81d0_50_nf; +extern cpuop_func op_81d0_50_ff; +extern cpuop_func op_81d8_50_nf; +extern cpuop_func op_81d8_50_ff; +extern cpuop_func op_81e0_50_nf; +extern cpuop_func op_81e0_50_ff; +extern cpuop_func op_81e8_50_nf; +extern cpuop_func op_81e8_50_ff; +extern cpuop_func op_81f0_50_nf; +extern cpuop_func op_81f0_50_ff; +extern cpuop_func op_81f8_50_nf; +extern cpuop_func op_81f8_50_ff; +extern cpuop_func op_81f9_50_nf; +extern cpuop_func op_81f9_50_ff; +extern cpuop_func op_81fa_50_nf; +extern cpuop_func op_81fa_50_ff; +extern cpuop_func op_81fb_50_nf; +extern cpuop_func op_81fb_50_ff; +extern cpuop_func op_81fc_50_nf; +extern cpuop_func op_81fc_50_ff; +extern cpuop_func op_9000_50_nf; +extern cpuop_func op_9000_50_ff; +extern cpuop_func op_9010_50_nf; +extern cpuop_func op_9010_50_ff; +extern cpuop_func op_9018_50_nf; +extern cpuop_func op_9018_50_ff; +extern cpuop_func op_9020_50_nf; +extern cpuop_func op_9020_50_ff; +extern cpuop_func op_9028_50_nf; +extern cpuop_func op_9028_50_ff; +extern cpuop_func op_9030_50_nf; +extern cpuop_func op_9030_50_ff; +extern cpuop_func op_9038_50_nf; +extern cpuop_func op_9038_50_ff; +extern cpuop_func op_9039_50_nf; +extern cpuop_func op_9039_50_ff; +extern cpuop_func op_903a_50_nf; +extern cpuop_func op_903a_50_ff; +extern cpuop_func op_903b_50_nf; +extern cpuop_func op_903b_50_ff; +extern cpuop_func op_903c_50_nf; +extern cpuop_func op_903c_50_ff; +extern cpuop_func op_9040_50_nf; +extern cpuop_func op_9040_50_ff; +extern cpuop_func op_9048_50_nf; +extern cpuop_func op_9048_50_ff; +extern cpuop_func op_9050_50_nf; +extern cpuop_func op_9050_50_ff; +extern cpuop_func op_9058_50_nf; +extern cpuop_func op_9058_50_ff; +extern cpuop_func op_9060_50_nf; +extern cpuop_func op_9060_50_ff; +extern cpuop_func op_9068_50_nf; +extern cpuop_func op_9068_50_ff; +extern cpuop_func op_9070_50_nf; +extern cpuop_func op_9070_50_ff; +extern cpuop_func op_9078_50_nf; +extern cpuop_func op_9078_50_ff; +extern cpuop_func op_9079_50_nf; +extern cpuop_func op_9079_50_ff; +extern cpuop_func op_907a_50_nf; +extern cpuop_func op_907a_50_ff; +extern cpuop_func op_907b_50_nf; +extern cpuop_func op_907b_50_ff; +extern cpuop_func op_907c_50_nf; +extern cpuop_func op_907c_50_ff; +extern cpuop_func op_9080_50_nf; +extern cpuop_func op_9080_50_ff; +extern cpuop_func op_9088_50_nf; +extern cpuop_func op_9088_50_ff; +extern cpuop_func op_9090_50_nf; +extern cpuop_func op_9090_50_ff; +extern cpuop_func op_9098_50_nf; +extern cpuop_func op_9098_50_ff; +extern cpuop_func op_90a0_50_nf; +extern cpuop_func op_90a0_50_ff; +extern cpuop_func op_90a8_50_nf; +extern cpuop_func op_90a8_50_ff; +extern cpuop_func op_90b0_50_nf; +extern cpuop_func op_90b0_50_ff; +extern cpuop_func op_90b8_50_nf; +extern cpuop_func op_90b8_50_ff; +extern cpuop_func op_90b9_50_nf; +extern cpuop_func op_90b9_50_ff; +extern cpuop_func op_90ba_50_nf; +extern cpuop_func op_90ba_50_ff; +extern cpuop_func op_90bb_50_nf; +extern cpuop_func op_90bb_50_ff; +extern cpuop_func op_90bc_50_nf; +extern cpuop_func op_90bc_50_ff; +extern cpuop_func op_90c0_50_nf; +extern cpuop_func op_90c0_50_ff; +extern cpuop_func op_90c8_50_nf; +extern cpuop_func op_90c8_50_ff; +extern cpuop_func op_90d0_50_nf; +extern cpuop_func op_90d0_50_ff; +extern cpuop_func op_90d8_50_nf; +extern cpuop_func op_90d8_50_ff; +extern cpuop_func op_90e0_50_nf; +extern cpuop_func op_90e0_50_ff; +extern cpuop_func op_90e8_50_nf; +extern cpuop_func op_90e8_50_ff; +extern cpuop_func op_90f0_50_nf; +extern cpuop_func op_90f0_50_ff; +extern cpuop_func op_90f8_50_nf; +extern cpuop_func op_90f8_50_ff; +extern cpuop_func op_90f9_50_nf; +extern cpuop_func op_90f9_50_ff; +extern cpuop_func op_90fa_50_nf; +extern cpuop_func op_90fa_50_ff; +extern cpuop_func op_90fb_50_nf; +extern cpuop_func op_90fb_50_ff; +extern cpuop_func op_90fc_50_nf; +extern cpuop_func op_90fc_50_ff; +extern cpuop_func op_9100_50_nf; +extern cpuop_func op_9100_50_ff; +extern cpuop_func op_9108_50_nf; +extern cpuop_func op_9108_50_ff; +extern cpuop_func op_9110_50_nf; +extern cpuop_func op_9110_50_ff; +extern cpuop_func op_9118_50_nf; +extern cpuop_func op_9118_50_ff; +extern cpuop_func op_9120_50_nf; +extern cpuop_func op_9120_50_ff; +extern cpuop_func op_9128_50_nf; +extern cpuop_func op_9128_50_ff; +extern cpuop_func op_9130_50_nf; +extern cpuop_func op_9130_50_ff; +extern cpuop_func op_9138_50_nf; +extern cpuop_func op_9138_50_ff; +extern cpuop_func op_9139_50_nf; +extern cpuop_func op_9139_50_ff; +extern cpuop_func op_9140_50_nf; +extern cpuop_func op_9140_50_ff; +extern cpuop_func op_9148_50_nf; +extern cpuop_func op_9148_50_ff; +extern cpuop_func op_9150_50_nf; +extern cpuop_func op_9150_50_ff; +extern cpuop_func op_9158_50_nf; +extern cpuop_func op_9158_50_ff; +extern cpuop_func op_9160_50_nf; +extern cpuop_func op_9160_50_ff; +extern cpuop_func op_9168_50_nf; +extern cpuop_func op_9168_50_ff; +extern cpuop_func op_9170_50_nf; +extern cpuop_func op_9170_50_ff; +extern cpuop_func op_9178_50_nf; +extern cpuop_func op_9178_50_ff; +extern cpuop_func op_9179_50_nf; +extern cpuop_func op_9179_50_ff; +extern cpuop_func op_9180_50_nf; +extern cpuop_func op_9180_50_ff; +extern cpuop_func op_9188_50_nf; +extern cpuop_func op_9188_50_ff; +extern cpuop_func op_9190_50_nf; +extern cpuop_func op_9190_50_ff; +extern cpuop_func op_9198_50_nf; +extern cpuop_func op_9198_50_ff; +extern cpuop_func op_91a0_50_nf; +extern cpuop_func op_91a0_50_ff; +extern cpuop_func op_91a8_50_nf; +extern cpuop_func op_91a8_50_ff; +extern cpuop_func op_91b0_50_nf; +extern cpuop_func op_91b0_50_ff; +extern cpuop_func op_91b8_50_nf; +extern cpuop_func op_91b8_50_ff; +extern cpuop_func op_91b9_50_nf; +extern cpuop_func op_91b9_50_ff; +extern cpuop_func op_91c0_50_nf; +extern cpuop_func op_91c0_50_ff; +extern cpuop_func op_91c8_50_nf; +extern cpuop_func op_91c8_50_ff; +extern cpuop_func op_91d0_50_nf; +extern cpuop_func op_91d0_50_ff; +extern cpuop_func op_91d8_50_nf; +extern cpuop_func op_91d8_50_ff; +extern cpuop_func op_91e0_50_nf; +extern cpuop_func op_91e0_50_ff; +extern cpuop_func op_91e8_50_nf; +extern cpuop_func op_91e8_50_ff; +extern cpuop_func op_91f0_50_nf; +extern cpuop_func op_91f0_50_ff; +extern cpuop_func op_91f8_50_nf; +extern cpuop_func op_91f8_50_ff; +extern cpuop_func op_91f9_50_nf; +extern cpuop_func op_91f9_50_ff; +extern cpuop_func op_91fa_50_nf; +extern cpuop_func op_91fa_50_ff; +extern cpuop_func op_91fb_50_nf; +extern cpuop_func op_91fb_50_ff; +extern cpuop_func op_91fc_50_nf; +extern cpuop_func op_91fc_50_ff; +extern cpuop_func op_b000_50_nf; +extern cpuop_func op_b000_50_ff; +extern cpuop_func op_b010_50_nf; +extern cpuop_func op_b010_50_ff; +extern cpuop_func op_b018_50_nf; +extern cpuop_func op_b018_50_ff; +extern cpuop_func op_b020_50_nf; +extern cpuop_func op_b020_50_ff; +extern cpuop_func op_b028_50_nf; +extern cpuop_func op_b028_50_ff; +extern cpuop_func op_b030_50_nf; +extern cpuop_func op_b030_50_ff; +extern cpuop_func op_b038_50_nf; +extern cpuop_func op_b038_50_ff; +extern cpuop_func op_b039_50_nf; +extern cpuop_func op_b039_50_ff; +extern cpuop_func op_b03a_50_nf; +extern cpuop_func op_b03a_50_ff; +extern cpuop_func op_b03b_50_nf; +extern cpuop_func op_b03b_50_ff; +extern cpuop_func op_b03c_50_nf; +extern cpuop_func op_b03c_50_ff; +extern cpuop_func op_b040_50_nf; +extern cpuop_func op_b040_50_ff; +extern cpuop_func op_b048_50_nf; +extern cpuop_func op_b048_50_ff; +extern cpuop_func op_b050_50_nf; +extern cpuop_func op_b050_50_ff; +extern cpuop_func op_b058_50_nf; +extern cpuop_func op_b058_50_ff; +extern cpuop_func op_b060_50_nf; +extern cpuop_func op_b060_50_ff; +extern cpuop_func op_b068_50_nf; +extern cpuop_func op_b068_50_ff; +extern cpuop_func op_b070_50_nf; +extern cpuop_func op_b070_50_ff; +extern cpuop_func op_b078_50_nf; +extern cpuop_func op_b078_50_ff; +extern cpuop_func op_b079_50_nf; +extern cpuop_func op_b079_50_ff; +extern cpuop_func op_b07a_50_nf; +extern cpuop_func op_b07a_50_ff; +extern cpuop_func op_b07b_50_nf; +extern cpuop_func op_b07b_50_ff; +extern cpuop_func op_b07c_50_nf; +extern cpuop_func op_b07c_50_ff; +extern cpuop_func op_b080_50_nf; +extern cpuop_func op_b080_50_ff; +extern cpuop_func op_b088_50_nf; +extern cpuop_func op_b088_50_ff; +extern cpuop_func op_b090_50_nf; +extern cpuop_func op_b090_50_ff; +extern cpuop_func op_b098_50_nf; +extern cpuop_func op_b098_50_ff; +extern cpuop_func op_b0a0_50_nf; +extern cpuop_func op_b0a0_50_ff; +extern cpuop_func op_b0a8_50_nf; +extern cpuop_func op_b0a8_50_ff; +extern cpuop_func op_b0b0_50_nf; +extern cpuop_func op_b0b0_50_ff; +extern cpuop_func op_b0b8_50_nf; +extern cpuop_func op_b0b8_50_ff; +extern cpuop_func op_b0b9_50_nf; +extern cpuop_func op_b0b9_50_ff; +extern cpuop_func op_b0ba_50_nf; +extern cpuop_func op_b0ba_50_ff; +extern cpuop_func op_b0bb_50_nf; +extern cpuop_func op_b0bb_50_ff; +extern cpuop_func op_b0bc_50_nf; +extern cpuop_func op_b0bc_50_ff; +extern cpuop_func op_b0c0_50_nf; +extern cpuop_func op_b0c0_50_ff; +extern cpuop_func op_b0c8_50_nf; +extern cpuop_func op_b0c8_50_ff; +extern cpuop_func op_b0d0_50_nf; +extern cpuop_func op_b0d0_50_ff; +extern cpuop_func op_b0d8_50_nf; +extern cpuop_func op_b0d8_50_ff; +extern cpuop_func op_b0e0_50_nf; +extern cpuop_func op_b0e0_50_ff; +extern cpuop_func op_b0e8_50_nf; +extern cpuop_func op_b0e8_50_ff; +extern cpuop_func op_b0f0_50_nf; +extern cpuop_func op_b0f0_50_ff; +extern cpuop_func op_b0f8_50_nf; +extern cpuop_func op_b0f8_50_ff; +extern cpuop_func op_b0f9_50_nf; +extern cpuop_func op_b0f9_50_ff; +extern cpuop_func op_b0fa_50_nf; +extern cpuop_func op_b0fa_50_ff; +extern cpuop_func op_b0fb_50_nf; +extern cpuop_func op_b0fb_50_ff; +extern cpuop_func op_b0fc_50_nf; +extern cpuop_func op_b0fc_50_ff; +extern cpuop_func op_b100_50_nf; +extern cpuop_func op_b100_50_ff; +extern cpuop_func op_b108_50_nf; +extern cpuop_func op_b108_50_ff; +extern cpuop_func op_b110_50_nf; +extern cpuop_func op_b110_50_ff; +extern cpuop_func op_b118_50_nf; +extern cpuop_func op_b118_50_ff; +extern cpuop_func op_b120_50_nf; +extern cpuop_func op_b120_50_ff; +extern cpuop_func op_b128_50_nf; +extern cpuop_func op_b128_50_ff; +extern cpuop_func op_b130_50_nf; +extern cpuop_func op_b130_50_ff; +extern cpuop_func op_b138_50_nf; +extern cpuop_func op_b138_50_ff; +extern cpuop_func op_b139_50_nf; +extern cpuop_func op_b139_50_ff; +extern cpuop_func op_b140_50_nf; +extern cpuop_func op_b140_50_ff; +extern cpuop_func op_b148_50_nf; +extern cpuop_func op_b148_50_ff; +extern cpuop_func op_b150_50_nf; +extern cpuop_func op_b150_50_ff; +extern cpuop_func op_b158_50_nf; +extern cpuop_func op_b158_50_ff; +extern cpuop_func op_b160_50_nf; +extern cpuop_func op_b160_50_ff; +extern cpuop_func op_b168_50_nf; +extern cpuop_func op_b168_50_ff; +extern cpuop_func op_b170_50_nf; +extern cpuop_func op_b170_50_ff; +extern cpuop_func op_b178_50_nf; +extern cpuop_func op_b178_50_ff; +extern cpuop_func op_b179_50_nf; +extern cpuop_func op_b179_50_ff; +extern cpuop_func op_b180_50_nf; +extern cpuop_func op_b180_50_ff; +extern cpuop_func op_b188_50_nf; +extern cpuop_func op_b188_50_ff; +extern cpuop_func op_b190_50_nf; +extern cpuop_func op_b190_50_ff; +extern cpuop_func op_b198_50_nf; +extern cpuop_func op_b198_50_ff; +extern cpuop_func op_b1a0_50_nf; +extern cpuop_func op_b1a0_50_ff; +extern cpuop_func op_b1a8_50_nf; +extern cpuop_func op_b1a8_50_ff; +extern cpuop_func op_b1b0_50_nf; +extern cpuop_func op_b1b0_50_ff; +extern cpuop_func op_b1b8_50_nf; +extern cpuop_func op_b1b8_50_ff; +extern cpuop_func op_b1b9_50_nf; +extern cpuop_func op_b1b9_50_ff; +extern cpuop_func op_b1c0_50_nf; +extern cpuop_func op_b1c0_50_ff; +extern cpuop_func op_b1c8_50_nf; +extern cpuop_func op_b1c8_50_ff; +extern cpuop_func op_b1d0_50_nf; +extern cpuop_func op_b1d0_50_ff; +extern cpuop_func op_b1d8_50_nf; +extern cpuop_func op_b1d8_50_ff; +extern cpuop_func op_b1e0_50_nf; +extern cpuop_func op_b1e0_50_ff; +extern cpuop_func op_b1e8_50_nf; +extern cpuop_func op_b1e8_50_ff; +extern cpuop_func op_b1f0_50_nf; +extern cpuop_func op_b1f0_50_ff; +extern cpuop_func op_b1f8_50_nf; +extern cpuop_func op_b1f8_50_ff; +extern cpuop_func op_b1f9_50_nf; +extern cpuop_func op_b1f9_50_ff; +extern cpuop_func op_b1fa_50_nf; +extern cpuop_func op_b1fa_50_ff; +extern cpuop_func op_b1fb_50_nf; +extern cpuop_func op_b1fb_50_ff; +extern cpuop_func op_b1fc_50_nf; +extern cpuop_func op_b1fc_50_ff; +extern cpuop_func op_c000_50_nf; +extern cpuop_func op_c000_50_ff; +extern cpuop_func op_c010_50_nf; +extern cpuop_func op_c010_50_ff; +extern cpuop_func op_c018_50_nf; +extern cpuop_func op_c018_50_ff; +extern cpuop_func op_c020_50_nf; +extern cpuop_func op_c020_50_ff; +extern cpuop_func op_c028_50_nf; +extern cpuop_func op_c028_50_ff; +extern cpuop_func op_c030_50_nf; +extern cpuop_func op_c030_50_ff; +extern cpuop_func op_c038_50_nf; +extern cpuop_func op_c038_50_ff; +extern cpuop_func op_c039_50_nf; +extern cpuop_func op_c039_50_ff; +extern cpuop_func op_c03a_50_nf; +extern cpuop_func op_c03a_50_ff; +extern cpuop_func op_c03b_50_nf; +extern cpuop_func op_c03b_50_ff; +extern cpuop_func op_c03c_50_nf; +extern cpuop_func op_c03c_50_ff; +extern cpuop_func op_c040_50_nf; +extern cpuop_func op_c040_50_ff; +extern cpuop_func op_c050_50_nf; +extern cpuop_func op_c050_50_ff; +extern cpuop_func op_c058_50_nf; +extern cpuop_func op_c058_50_ff; +extern cpuop_func op_c060_50_nf; +extern cpuop_func op_c060_50_ff; +extern cpuop_func op_c068_50_nf; +extern cpuop_func op_c068_50_ff; +extern cpuop_func op_c070_50_nf; +extern cpuop_func op_c070_50_ff; +extern cpuop_func op_c078_50_nf; +extern cpuop_func op_c078_50_ff; +extern cpuop_func op_c079_50_nf; +extern cpuop_func op_c079_50_ff; +extern cpuop_func op_c07a_50_nf; +extern cpuop_func op_c07a_50_ff; +extern cpuop_func op_c07b_50_nf; +extern cpuop_func op_c07b_50_ff; +extern cpuop_func op_c07c_50_nf; +extern cpuop_func op_c07c_50_ff; +extern cpuop_func op_c080_50_nf; +extern cpuop_func op_c080_50_ff; +extern cpuop_func op_c090_50_nf; +extern cpuop_func op_c090_50_ff; +extern cpuop_func op_c098_50_nf; +extern cpuop_func op_c098_50_ff; +extern cpuop_func op_c0a0_50_nf; +extern cpuop_func op_c0a0_50_ff; +extern cpuop_func op_c0a8_50_nf; +extern cpuop_func op_c0a8_50_ff; +extern cpuop_func op_c0b0_50_nf; +extern cpuop_func op_c0b0_50_ff; +extern cpuop_func op_c0b8_50_nf; +extern cpuop_func op_c0b8_50_ff; +extern cpuop_func op_c0b9_50_nf; +extern cpuop_func op_c0b9_50_ff; +extern cpuop_func op_c0ba_50_nf; +extern cpuop_func op_c0ba_50_ff; +extern cpuop_func op_c0bb_50_nf; +extern cpuop_func op_c0bb_50_ff; +extern cpuop_func op_c0bc_50_nf; +extern cpuop_func op_c0bc_50_ff; +extern cpuop_func op_c0c0_50_nf; +extern cpuop_func op_c0c0_50_ff; +extern cpuop_func op_c0d0_50_nf; +extern cpuop_func op_c0d0_50_ff; +extern cpuop_func op_c0d8_50_nf; +extern cpuop_func op_c0d8_50_ff; +extern cpuop_func op_c0e0_50_nf; +extern cpuop_func op_c0e0_50_ff; +extern cpuop_func op_c0e8_50_nf; +extern cpuop_func op_c0e8_50_ff; +extern cpuop_func op_c0f0_50_nf; +extern cpuop_func op_c0f0_50_ff; +extern cpuop_func op_c0f8_50_nf; +extern cpuop_func op_c0f8_50_ff; +extern cpuop_func op_c0f9_50_nf; +extern cpuop_func op_c0f9_50_ff; +extern cpuop_func op_c0fa_50_nf; +extern cpuop_func op_c0fa_50_ff; +extern cpuop_func op_c0fb_50_nf; +extern cpuop_func op_c0fb_50_ff; +extern cpuop_func op_c0fc_50_nf; +extern cpuop_func op_c0fc_50_ff; +extern cpuop_func op_c100_50_nf; +extern cpuop_func op_c100_50_ff; +extern cpuop_func op_c108_50_nf; +extern cpuop_func op_c108_50_ff; +extern cpuop_func op_c110_50_nf; +extern cpuop_func op_c110_50_ff; +extern cpuop_func op_c118_50_nf; +extern cpuop_func op_c118_50_ff; +extern cpuop_func op_c120_50_nf; +extern cpuop_func op_c120_50_ff; +extern cpuop_func op_c128_50_nf; +extern cpuop_func op_c128_50_ff; +extern cpuop_func op_c130_50_nf; +extern cpuop_func op_c130_50_ff; +extern cpuop_func op_c138_50_nf; +extern cpuop_func op_c138_50_ff; +extern cpuop_func op_c139_50_nf; +extern cpuop_func op_c139_50_ff; +extern cpuop_func op_c140_50_nf; +extern cpuop_func op_c140_50_ff; +extern cpuop_func op_c148_50_nf; +extern cpuop_func op_c148_50_ff; +extern cpuop_func op_c150_50_nf; +extern cpuop_func op_c150_50_ff; +extern cpuop_func op_c158_50_nf; +extern cpuop_func op_c158_50_ff; +extern cpuop_func op_c160_50_nf; +extern cpuop_func op_c160_50_ff; +extern cpuop_func op_c168_50_nf; +extern cpuop_func op_c168_50_ff; +extern cpuop_func op_c170_50_nf; +extern cpuop_func op_c170_50_ff; +extern cpuop_func op_c178_50_nf; +extern cpuop_func op_c178_50_ff; +extern cpuop_func op_c179_50_nf; +extern cpuop_func op_c179_50_ff; +extern cpuop_func op_c188_50_nf; +extern cpuop_func op_c188_50_ff; +extern cpuop_func op_c190_50_nf; +extern cpuop_func op_c190_50_ff; +extern cpuop_func op_c198_50_nf; +extern cpuop_func op_c198_50_ff; +extern cpuop_func op_c1a0_50_nf; +extern cpuop_func op_c1a0_50_ff; +extern cpuop_func op_c1a8_50_nf; +extern cpuop_func op_c1a8_50_ff; +extern cpuop_func op_c1b0_50_nf; +extern cpuop_func op_c1b0_50_ff; +extern cpuop_func op_c1b8_50_nf; +extern cpuop_func op_c1b8_50_ff; +extern cpuop_func op_c1b9_50_nf; +extern cpuop_func op_c1b9_50_ff; +extern cpuop_func op_c1c0_50_nf; +extern cpuop_func op_c1c0_50_ff; +extern cpuop_func op_c1d0_50_nf; +extern cpuop_func op_c1d0_50_ff; +extern cpuop_func op_c1d8_50_nf; +extern cpuop_func op_c1d8_50_ff; +extern cpuop_func op_c1e0_50_nf; +extern cpuop_func op_c1e0_50_ff; +extern cpuop_func op_c1e8_50_nf; +extern cpuop_func op_c1e8_50_ff; +extern cpuop_func op_c1f0_50_nf; +extern cpuop_func op_c1f0_50_ff; +extern cpuop_func op_c1f8_50_nf; +extern cpuop_func op_c1f8_50_ff; +extern cpuop_func op_c1f9_50_nf; +extern cpuop_func op_c1f9_50_ff; +extern cpuop_func op_c1fa_50_nf; +extern cpuop_func op_c1fa_50_ff; +extern cpuop_func op_c1fb_50_nf; +extern cpuop_func op_c1fb_50_ff; +extern cpuop_func op_c1fc_50_nf; +extern cpuop_func op_c1fc_50_ff; +extern cpuop_func op_d000_50_nf; +extern cpuop_func op_d000_50_ff; +extern cpuop_func op_d010_50_nf; +extern cpuop_func op_d010_50_ff; +extern cpuop_func op_d018_50_nf; +extern cpuop_func op_d018_50_ff; +extern cpuop_func op_d020_50_nf; +extern cpuop_func op_d020_50_ff; +extern cpuop_func op_d028_50_nf; +extern cpuop_func op_d028_50_ff; +extern cpuop_func op_d030_50_nf; +extern cpuop_func op_d030_50_ff; +extern cpuop_func op_d038_50_nf; +extern cpuop_func op_d038_50_ff; +extern cpuop_func op_d039_50_nf; +extern cpuop_func op_d039_50_ff; +extern cpuop_func op_d03a_50_nf; +extern cpuop_func op_d03a_50_ff; +extern cpuop_func op_d03b_50_nf; +extern cpuop_func op_d03b_50_ff; +extern cpuop_func op_d03c_50_nf; +extern cpuop_func op_d03c_50_ff; +extern cpuop_func op_d040_50_nf; +extern cpuop_func op_d040_50_ff; +extern cpuop_func op_d048_50_nf; +extern cpuop_func op_d048_50_ff; +extern cpuop_func op_d050_50_nf; +extern cpuop_func op_d050_50_ff; +extern cpuop_func op_d058_50_nf; +extern cpuop_func op_d058_50_ff; +extern cpuop_func op_d060_50_nf; +extern cpuop_func op_d060_50_ff; +extern cpuop_func op_d068_50_nf; +extern cpuop_func op_d068_50_ff; +extern cpuop_func op_d070_50_nf; +extern cpuop_func op_d070_50_ff; +extern cpuop_func op_d078_50_nf; +extern cpuop_func op_d078_50_ff; +extern cpuop_func op_d079_50_nf; +extern cpuop_func op_d079_50_ff; +extern cpuop_func op_d07a_50_nf; +extern cpuop_func op_d07a_50_ff; +extern cpuop_func op_d07b_50_nf; +extern cpuop_func op_d07b_50_ff; +extern cpuop_func op_d07c_50_nf; +extern cpuop_func op_d07c_50_ff; +extern cpuop_func op_d080_50_nf; +extern cpuop_func op_d080_50_ff; +extern cpuop_func op_d088_50_nf; +extern cpuop_func op_d088_50_ff; +extern cpuop_func op_d090_50_nf; +extern cpuop_func op_d090_50_ff; +extern cpuop_func op_d098_50_nf; +extern cpuop_func op_d098_50_ff; +extern cpuop_func op_d0a0_50_nf; +extern cpuop_func op_d0a0_50_ff; +extern cpuop_func op_d0a8_50_nf; +extern cpuop_func op_d0a8_50_ff; +extern cpuop_func op_d0b0_50_nf; +extern cpuop_func op_d0b0_50_ff; +extern cpuop_func op_d0b8_50_nf; +extern cpuop_func op_d0b8_50_ff; +extern cpuop_func op_d0b9_50_nf; +extern cpuop_func op_d0b9_50_ff; +extern cpuop_func op_d0ba_50_nf; +extern cpuop_func op_d0ba_50_ff; +extern cpuop_func op_d0bb_50_nf; +extern cpuop_func op_d0bb_50_ff; +extern cpuop_func op_d0bc_50_nf; +extern cpuop_func op_d0bc_50_ff; +extern cpuop_func op_d0c0_50_nf; +extern cpuop_func op_d0c0_50_ff; +extern cpuop_func op_d0c8_50_nf; +extern cpuop_func op_d0c8_50_ff; +extern cpuop_func op_d0d0_50_nf; +extern cpuop_func op_d0d0_50_ff; +extern cpuop_func op_d0d8_50_nf; +extern cpuop_func op_d0d8_50_ff; +extern cpuop_func op_d0e0_50_nf; +extern cpuop_func op_d0e0_50_ff; +extern cpuop_func op_d0e8_50_nf; +extern cpuop_func op_d0e8_50_ff; +extern cpuop_func op_d0f0_50_nf; +extern cpuop_func op_d0f0_50_ff; +extern cpuop_func op_d0f8_50_nf; +extern cpuop_func op_d0f8_50_ff; +extern cpuop_func op_d0f9_50_nf; +extern cpuop_func op_d0f9_50_ff; +extern cpuop_func op_d0fa_50_nf; +extern cpuop_func op_d0fa_50_ff; +extern cpuop_func op_d0fb_50_nf; +extern cpuop_func op_d0fb_50_ff; +extern cpuop_func op_d0fc_50_nf; +extern cpuop_func op_d0fc_50_ff; +extern cpuop_func op_d100_50_nf; +extern cpuop_func op_d100_50_ff; +extern cpuop_func op_d108_50_nf; +extern cpuop_func op_d108_50_ff; +extern cpuop_func op_d110_50_nf; +extern cpuop_func op_d110_50_ff; +extern cpuop_func op_d118_50_nf; +extern cpuop_func op_d118_50_ff; +extern cpuop_func op_d120_50_nf; +extern cpuop_func op_d120_50_ff; +extern cpuop_func op_d128_50_nf; +extern cpuop_func op_d128_50_ff; +extern cpuop_func op_d130_50_nf; +extern cpuop_func op_d130_50_ff; +extern cpuop_func op_d138_50_nf; +extern cpuop_func op_d138_50_ff; +extern cpuop_func op_d139_50_nf; +extern cpuop_func op_d139_50_ff; +extern cpuop_func op_d140_50_nf; +extern cpuop_func op_d140_50_ff; +extern cpuop_func op_d148_50_nf; +extern cpuop_func op_d148_50_ff; +extern cpuop_func op_d150_50_nf; +extern cpuop_func op_d150_50_ff; +extern cpuop_func op_d158_50_nf; +extern cpuop_func op_d158_50_ff; +extern cpuop_func op_d160_50_nf; +extern cpuop_func op_d160_50_ff; +extern cpuop_func op_d168_50_nf; +extern cpuop_func op_d168_50_ff; +extern cpuop_func op_d170_50_nf; +extern cpuop_func op_d170_50_ff; +extern cpuop_func op_d178_50_nf; +extern cpuop_func op_d178_50_ff; +extern cpuop_func op_d179_50_nf; +extern cpuop_func op_d179_50_ff; +extern cpuop_func op_d180_50_nf; +extern cpuop_func op_d180_50_ff; +extern cpuop_func op_d188_50_nf; +extern cpuop_func op_d188_50_ff; +extern cpuop_func op_d190_50_nf; +extern cpuop_func op_d190_50_ff; +extern cpuop_func op_d198_50_nf; +extern cpuop_func op_d198_50_ff; +extern cpuop_func op_d1a0_50_nf; +extern cpuop_func op_d1a0_50_ff; +extern cpuop_func op_d1a8_50_nf; +extern cpuop_func op_d1a8_50_ff; +extern cpuop_func op_d1b0_50_nf; +extern cpuop_func op_d1b0_50_ff; +extern cpuop_func op_d1b8_50_nf; +extern cpuop_func op_d1b8_50_ff; +extern cpuop_func op_d1b9_50_nf; +extern cpuop_func op_d1b9_50_ff; +extern cpuop_func op_d1c0_50_nf; +extern cpuop_func op_d1c0_50_ff; +extern cpuop_func op_d1c8_50_nf; +extern cpuop_func op_d1c8_50_ff; +extern cpuop_func op_d1d0_50_nf; +extern cpuop_func op_d1d0_50_ff; +extern cpuop_func op_d1d8_50_nf; +extern cpuop_func op_d1d8_50_ff; +extern cpuop_func op_d1e0_50_nf; +extern cpuop_func op_d1e0_50_ff; +extern cpuop_func op_d1e8_50_nf; +extern cpuop_func op_d1e8_50_ff; +extern cpuop_func op_d1f0_50_nf; +extern cpuop_func op_d1f0_50_ff; +extern cpuop_func op_d1f8_50_nf; +extern cpuop_func op_d1f8_50_ff; +extern cpuop_func op_d1f9_50_nf; +extern cpuop_func op_d1f9_50_ff; +extern cpuop_func op_d1fa_50_nf; +extern cpuop_func op_d1fa_50_ff; +extern cpuop_func op_d1fb_50_nf; +extern cpuop_func op_d1fb_50_ff; +extern cpuop_func op_d1fc_50_nf; +extern cpuop_func op_d1fc_50_ff; +extern cpuop_func op_e000_50_nf; +extern cpuop_func op_e000_50_ff; +extern cpuop_func op_e008_50_nf; +extern cpuop_func op_e008_50_ff; +extern cpuop_func op_e010_50_nf; +extern cpuop_func op_e010_50_ff; +extern cpuop_func op_e018_50_nf; +extern cpuop_func op_e018_50_ff; +extern cpuop_func op_e020_50_nf; +extern cpuop_func op_e020_50_ff; +extern cpuop_func op_e028_50_nf; +extern cpuop_func op_e028_50_ff; +extern cpuop_func op_e030_50_nf; +extern cpuop_func op_e030_50_ff; +extern cpuop_func op_e038_50_nf; +extern cpuop_func op_e038_50_ff; +extern cpuop_func op_e040_50_nf; +extern cpuop_func op_e040_50_ff; +extern cpuop_func op_e048_50_nf; +extern cpuop_func op_e048_50_ff; +extern cpuop_func op_e050_50_nf; +extern cpuop_func op_e050_50_ff; +extern cpuop_func op_e058_50_nf; +extern cpuop_func op_e058_50_ff; +extern cpuop_func op_e060_50_nf; +extern cpuop_func op_e060_50_ff; +extern cpuop_func op_e068_50_nf; +extern cpuop_func op_e068_50_ff; +extern cpuop_func op_e070_50_nf; +extern cpuop_func op_e070_50_ff; +extern cpuop_func op_e078_50_nf; +extern cpuop_func op_e078_50_ff; +extern cpuop_func op_e080_50_nf; +extern cpuop_func op_e080_50_ff; +extern cpuop_func op_e088_50_nf; +extern cpuop_func op_e088_50_ff; +extern cpuop_func op_e090_50_nf; +extern cpuop_func op_e090_50_ff; +extern cpuop_func op_e098_50_nf; +extern cpuop_func op_e098_50_ff; +extern cpuop_func op_e0a0_50_nf; +extern cpuop_func op_e0a0_50_ff; +extern cpuop_func op_e0a8_50_nf; +extern cpuop_func op_e0a8_50_ff; +extern cpuop_func op_e0b0_50_nf; +extern cpuop_func op_e0b0_50_ff; +extern cpuop_func op_e0b8_50_nf; +extern cpuop_func op_e0b8_50_ff; +extern cpuop_func op_e0d0_50_nf; +extern cpuop_func op_e0d0_50_ff; +extern cpuop_func op_e0d8_50_nf; +extern cpuop_func op_e0d8_50_ff; +extern cpuop_func op_e0e0_50_nf; +extern cpuop_func op_e0e0_50_ff; +extern cpuop_func op_e0e8_50_nf; +extern cpuop_func op_e0e8_50_ff; +extern cpuop_func op_e0f0_50_nf; +extern cpuop_func op_e0f0_50_ff; +extern cpuop_func op_e0f8_50_nf; +extern cpuop_func op_e0f8_50_ff; +extern cpuop_func op_e0f9_50_nf; +extern cpuop_func op_e0f9_50_ff; +extern cpuop_func op_e100_50_nf; +extern cpuop_func op_e100_50_ff; +extern cpuop_func op_e108_50_nf; +extern cpuop_func op_e108_50_ff; +extern cpuop_func op_e110_50_nf; +extern cpuop_func op_e110_50_ff; +extern cpuop_func op_e118_50_nf; +extern cpuop_func op_e118_50_ff; +extern cpuop_func op_e120_50_nf; +extern cpuop_func op_e120_50_ff; +extern cpuop_func op_e128_50_nf; +extern cpuop_func op_e128_50_ff; +extern cpuop_func op_e130_50_nf; +extern cpuop_func op_e130_50_ff; +extern cpuop_func op_e138_50_nf; +extern cpuop_func op_e138_50_ff; +extern cpuop_func op_e140_50_nf; +extern cpuop_func op_e140_50_ff; +extern cpuop_func op_e148_50_nf; +extern cpuop_func op_e148_50_ff; +extern cpuop_func op_e150_50_nf; +extern cpuop_func op_e150_50_ff; +extern cpuop_func op_e158_50_nf; +extern cpuop_func op_e158_50_ff; +extern cpuop_func op_e160_50_nf; +extern cpuop_func op_e160_50_ff; +extern cpuop_func op_e168_50_nf; +extern cpuop_func op_e168_50_ff; +extern cpuop_func op_e170_50_nf; +extern cpuop_func op_e170_50_ff; +extern cpuop_func op_e178_50_nf; +extern cpuop_func op_e178_50_ff; +extern cpuop_func op_e180_50_nf; +extern cpuop_func op_e180_50_ff; +extern cpuop_func op_e188_50_nf; +extern cpuop_func op_e188_50_ff; +extern cpuop_func op_e190_50_nf; +extern cpuop_func op_e190_50_ff; +extern cpuop_func op_e198_50_nf; +extern cpuop_func op_e198_50_ff; +extern cpuop_func op_e1a0_50_nf; +extern cpuop_func op_e1a0_50_ff; +extern cpuop_func op_e1a8_50_nf; +extern cpuop_func op_e1a8_50_ff; +extern cpuop_func op_e1b0_50_nf; +extern cpuop_func op_e1b0_50_ff; +extern cpuop_func op_e1b8_50_nf; +extern cpuop_func op_e1b8_50_ff; +extern cpuop_func op_e1d0_50_nf; +extern cpuop_func op_e1d0_50_ff; +extern cpuop_func op_e1d8_50_nf; +extern cpuop_func op_e1d8_50_ff; +extern cpuop_func op_e1e0_50_nf; +extern cpuop_func op_e1e0_50_ff; +extern cpuop_func op_e1e8_50_nf; +extern cpuop_func op_e1e8_50_ff; +extern cpuop_func op_e1f0_50_nf; +extern cpuop_func op_e1f0_50_ff; +extern cpuop_func op_e1f8_50_nf; +extern cpuop_func op_e1f8_50_ff; +extern cpuop_func op_e1f9_50_nf; +extern cpuop_func op_e1f9_50_ff; +extern cpuop_func op_e2d0_50_nf; +extern cpuop_func op_e2d0_50_ff; +extern cpuop_func op_e2d8_50_nf; +extern cpuop_func op_e2d8_50_ff; +extern cpuop_func op_e2e0_50_nf; +extern cpuop_func op_e2e0_50_ff; +extern cpuop_func op_e2e8_50_nf; +extern cpuop_func op_e2e8_50_ff; +extern cpuop_func op_e2f0_50_nf; +extern cpuop_func op_e2f0_50_ff; +extern cpuop_func op_e2f8_50_nf; +extern cpuop_func op_e2f8_50_ff; +extern cpuop_func op_e2f9_50_nf; +extern cpuop_func op_e2f9_50_ff; +extern cpuop_func op_e3d0_50_nf; +extern cpuop_func op_e3d0_50_ff; +extern cpuop_func op_e3d8_50_nf; +extern cpuop_func op_e3d8_50_ff; +extern cpuop_func op_e3e0_50_nf; +extern cpuop_func op_e3e0_50_ff; +extern cpuop_func op_e3e8_50_nf; +extern cpuop_func op_e3e8_50_ff; +extern cpuop_func op_e3f0_50_nf; +extern cpuop_func op_e3f0_50_ff; +extern cpuop_func op_e3f8_50_nf; +extern cpuop_func op_e3f8_50_ff; +extern cpuop_func op_e3f9_50_nf; +extern cpuop_func op_e3f9_50_ff; +extern cpuop_func op_e4d0_50_nf; +extern cpuop_func op_e4d0_50_ff; +extern cpuop_func op_e4d8_50_nf; +extern cpuop_func op_e4d8_50_ff; +extern cpuop_func op_e4e0_50_nf; +extern cpuop_func op_e4e0_50_ff; +extern cpuop_func op_e4e8_50_nf; +extern cpuop_func op_e4e8_50_ff; +extern cpuop_func op_e4f0_50_nf; +extern cpuop_func op_e4f0_50_ff; +extern cpuop_func op_e4f8_50_nf; +extern cpuop_func op_e4f8_50_ff; +extern cpuop_func op_e4f9_50_nf; +extern cpuop_func op_e4f9_50_ff; +extern cpuop_func op_e5d0_50_nf; +extern cpuop_func op_e5d0_50_ff; +extern cpuop_func op_e5d8_50_nf; +extern cpuop_func op_e5d8_50_ff; +extern cpuop_func op_e5e0_50_nf; +extern cpuop_func op_e5e0_50_ff; +extern cpuop_func op_e5e8_50_nf; +extern cpuop_func op_e5e8_50_ff; +extern cpuop_func op_e5f0_50_nf; +extern cpuop_func op_e5f0_50_ff; +extern cpuop_func op_e5f8_50_nf; +extern cpuop_func op_e5f8_50_ff; +extern cpuop_func op_e5f9_50_nf; +extern cpuop_func op_e5f9_50_ff; +extern cpuop_func op_e6d0_50_nf; +extern cpuop_func op_e6d0_50_ff; +extern cpuop_func op_e6d8_50_nf; +extern cpuop_func op_e6d8_50_ff; +extern cpuop_func op_e6e0_50_nf; +extern cpuop_func op_e6e0_50_ff; +extern cpuop_func op_e6e8_50_nf; +extern cpuop_func op_e6e8_50_ff; +extern cpuop_func op_e6f0_50_nf; +extern cpuop_func op_e6f0_50_ff; +extern cpuop_func op_e6f8_50_nf; +extern cpuop_func op_e6f8_50_ff; +extern cpuop_func op_e6f9_50_nf; +extern cpuop_func op_e6f9_50_ff; +extern cpuop_func op_e7d0_50_nf; +extern cpuop_func op_e7d0_50_ff; +extern cpuop_func op_e7d8_50_nf; +extern cpuop_func op_e7d8_50_ff; +extern cpuop_func op_e7e0_50_nf; +extern cpuop_func op_e7e0_50_ff; +extern cpuop_func op_e7e8_50_nf; +extern cpuop_func op_e7e8_50_ff; +extern cpuop_func op_e7f0_50_nf; +extern cpuop_func op_e7f0_50_ff; +extern cpuop_func op_e7f8_50_nf; +extern cpuop_func op_e7f8_50_ff; +extern cpuop_func op_e7f9_50_nf; +extern cpuop_func op_e7f9_50_ff; +extern cpuop_func op_e8c0_50_nf; +extern cpuop_func op_e8c0_50_ff; +extern cpuop_func op_e8d0_50_nf; +extern cpuop_func op_e8d0_50_ff; +extern cpuop_func op_e8e8_50_nf; +extern cpuop_func op_e8e8_50_ff; +extern cpuop_func op_e8f0_50_nf; +extern cpuop_func op_e8f0_50_ff; +extern cpuop_func op_e8f8_50_nf; +extern cpuop_func op_e8f8_50_ff; +extern cpuop_func op_e8f9_50_nf; +extern cpuop_func op_e8f9_50_ff; +extern cpuop_func op_e8fa_50_nf; +extern cpuop_func op_e8fa_50_ff; +extern cpuop_func op_e8fb_50_nf; +extern cpuop_func op_e8fb_50_ff; +extern cpuop_func op_e9c0_50_nf; +extern cpuop_func op_e9c0_50_ff; +extern cpuop_func op_e9d0_50_nf; +extern cpuop_func op_e9d0_50_ff; +extern cpuop_func op_e9e8_50_nf; +extern cpuop_func op_e9e8_50_ff; +extern cpuop_func op_e9f0_50_nf; +extern cpuop_func op_e9f0_50_ff; +extern cpuop_func op_e9f8_50_nf; +extern cpuop_func op_e9f8_50_ff; +extern cpuop_func op_e9f9_50_nf; +extern cpuop_func op_e9f9_50_ff; +extern cpuop_func op_e9fa_50_nf; +extern cpuop_func op_e9fa_50_ff; +extern cpuop_func op_e9fb_50_nf; +extern cpuop_func op_e9fb_50_ff; +extern cpuop_func op_eac0_50_nf; +extern cpuop_func op_eac0_50_ff; +extern cpuop_func op_ead0_50_nf; +extern cpuop_func op_ead0_50_ff; +extern cpuop_func op_eae8_50_nf; +extern cpuop_func op_eae8_50_ff; +extern cpuop_func op_eaf0_50_nf; +extern cpuop_func op_eaf0_50_ff; +extern cpuop_func op_eaf8_50_nf; +extern cpuop_func op_eaf8_50_ff; +extern cpuop_func op_eaf9_50_nf; +extern cpuop_func op_eaf9_50_ff; +extern cpuop_func op_ebc0_50_nf; +extern cpuop_func op_ebc0_50_ff; +extern cpuop_func op_ebd0_50_nf; +extern cpuop_func op_ebd0_50_ff; +extern cpuop_func op_ebe8_50_nf; +extern cpuop_func op_ebe8_50_ff; +extern cpuop_func op_ebf0_50_nf; +extern cpuop_func op_ebf0_50_ff; +extern cpuop_func op_ebf8_50_nf; +extern cpuop_func op_ebf8_50_ff; +extern cpuop_func op_ebf9_50_nf; +extern cpuop_func op_ebf9_50_ff; +extern cpuop_func op_ebfa_50_nf; +extern cpuop_func op_ebfa_50_ff; +extern cpuop_func op_ebfb_50_nf; +extern cpuop_func op_ebfb_50_ff; +extern cpuop_func op_ecc0_50_nf; +extern cpuop_func op_ecc0_50_ff; +extern cpuop_func op_ecd0_50_nf; +extern cpuop_func op_ecd0_50_ff; +extern cpuop_func op_ece8_50_nf; +extern cpuop_func op_ece8_50_ff; +extern cpuop_func op_ecf0_50_nf; +extern cpuop_func op_ecf0_50_ff; +extern cpuop_func op_ecf8_50_nf; +extern cpuop_func op_ecf8_50_ff; +extern cpuop_func op_ecf9_50_nf; +extern cpuop_func op_ecf9_50_ff; +extern cpuop_func op_edc0_50_nf; +extern cpuop_func op_edc0_50_ff; +extern cpuop_func op_edd0_50_nf; +extern cpuop_func op_edd0_50_ff; +extern cpuop_func op_ede8_50_nf; +extern cpuop_func op_ede8_50_ff; +extern cpuop_func op_edf0_50_nf; +extern cpuop_func op_edf0_50_ff; +extern cpuop_func op_edf8_50_nf; +extern cpuop_func op_edf8_50_ff; +extern cpuop_func op_edf9_50_nf; +extern cpuop_func op_edf9_50_ff; +extern cpuop_func op_edfa_50_nf; +extern cpuop_func op_edfa_50_ff; +extern cpuop_func op_edfb_50_nf; +extern cpuop_func op_edfb_50_ff; +extern cpuop_func op_eec0_50_nf; +extern cpuop_func op_eec0_50_ff; +extern cpuop_func op_eed0_50_nf; +extern cpuop_func op_eed0_50_ff; +extern cpuop_func op_eee8_50_nf; +extern cpuop_func op_eee8_50_ff; +extern cpuop_func op_eef0_50_nf; +extern cpuop_func op_eef0_50_ff; +extern cpuop_func op_eef8_50_nf; +extern cpuop_func op_eef8_50_ff; +extern cpuop_func op_eef9_50_nf; +extern cpuop_func op_eef9_50_ff; +extern cpuop_func op_efc0_50_nf; +extern cpuop_func op_efc0_50_ff; +extern cpuop_func op_efd0_50_nf; +extern cpuop_func op_efd0_50_ff; +extern cpuop_func op_efe8_50_nf; +extern cpuop_func op_efe8_50_ff; +extern cpuop_func op_eff0_50_nf; +extern cpuop_func op_eff0_50_ff; +extern cpuop_func op_eff8_50_nf; +extern cpuop_func op_eff8_50_ff; +extern cpuop_func op_eff9_50_nf; +extern cpuop_func op_eff9_50_ff; +extern cpuop_func op_f000_50_nf; +extern cpuop_func op_f000_50_ff; +extern cpuop_func op_f008_50_nf; +extern cpuop_func op_f008_50_ff; +extern cpuop_func op_f010_50_nf; +extern cpuop_func op_f010_50_ff; +extern cpuop_func op_f018_50_nf; +extern cpuop_func op_f018_50_ff; +extern cpuop_func op_f020_50_nf; +extern cpuop_func op_f020_50_ff; +extern cpuop_func op_f028_50_nf; +extern cpuop_func op_f028_50_ff; +extern cpuop_func op_f030_50_nf; +extern cpuop_func op_f030_50_ff; +extern cpuop_func op_f038_50_nf; +extern cpuop_func op_f038_50_ff; +extern cpuop_func op_f039_50_nf; +extern cpuop_func op_f039_50_ff; +extern cpuop_func op_f200_50_nf; +extern cpuop_func op_f200_50_ff; +extern cpuop_func op_f208_50_nf; +extern cpuop_func op_f208_50_ff; +extern cpuop_func op_f210_50_nf; +extern cpuop_func op_f210_50_ff; +extern cpuop_func op_f218_50_nf; +extern cpuop_func op_f218_50_ff; +extern cpuop_func op_f220_50_nf; +extern cpuop_func op_f220_50_ff; +extern cpuop_func op_f228_50_nf; +extern cpuop_func op_f228_50_ff; +extern cpuop_func op_f230_50_nf; +extern cpuop_func op_f230_50_ff; +extern cpuop_func op_f238_50_nf; +extern cpuop_func op_f238_50_ff; +extern cpuop_func op_f239_50_nf; +extern cpuop_func op_f239_50_ff; +extern cpuop_func op_f23a_50_nf; +extern cpuop_func op_f23a_50_ff; +extern cpuop_func op_f23b_50_nf; +extern cpuop_func op_f23b_50_ff; +extern cpuop_func op_f23c_50_nf; +extern cpuop_func op_f23c_50_ff; +extern cpuop_func op_f240_50_nf; +extern cpuop_func op_f240_50_ff; +extern cpuop_func op_f248_50_nf; +extern cpuop_func op_f248_50_ff; +extern cpuop_func op_f250_50_nf; +extern cpuop_func op_f250_50_ff; +extern cpuop_func op_f258_50_nf; +extern cpuop_func op_f258_50_ff; +extern cpuop_func op_f260_50_nf; +extern cpuop_func op_f260_50_ff; +extern cpuop_func op_f268_50_nf; +extern cpuop_func op_f268_50_ff; +extern cpuop_func op_f270_50_nf; +extern cpuop_func op_f270_50_ff; +extern cpuop_func op_f278_50_nf; +extern cpuop_func op_f278_50_ff; +extern cpuop_func op_f279_50_nf; +extern cpuop_func op_f279_50_ff; +extern cpuop_func op_f27a_50_nf; +extern cpuop_func op_f27a_50_ff; +extern cpuop_func op_f27b_50_nf; +extern cpuop_func op_f27b_50_ff; +extern cpuop_func op_f27c_50_nf; +extern cpuop_func op_f27c_50_ff; +extern cpuop_func op_f280_50_nf; +extern cpuop_func op_f280_50_ff; +extern cpuop_func op_f2c0_50_nf; +extern cpuop_func op_f2c0_50_ff; +extern cpuop_func op_f310_50_nf; +extern cpuop_func op_f310_50_ff; +extern cpuop_func op_f320_50_nf; +extern cpuop_func op_f320_50_ff; +extern cpuop_func op_f328_50_nf; +extern cpuop_func op_f328_50_ff; +extern cpuop_func op_f330_50_nf; +extern cpuop_func op_f330_50_ff; +extern cpuop_func op_f338_50_nf; +extern cpuop_func op_f338_50_ff; +extern cpuop_func op_f339_50_nf; +extern cpuop_func op_f339_50_ff; +extern cpuop_func op_f350_50_nf; +extern cpuop_func op_f350_50_ff; +extern cpuop_func op_f358_50_nf; +extern cpuop_func op_f358_50_ff; +extern cpuop_func op_f368_50_nf; +extern cpuop_func op_f368_50_ff; +extern cpuop_func op_f370_50_nf; +extern cpuop_func op_f370_50_ff; +extern cpuop_func op_f378_50_nf; +extern cpuop_func op_f378_50_ff; +extern cpuop_func op_f379_50_nf; +extern cpuop_func op_f379_50_ff; +extern cpuop_func op_f37a_50_nf; +extern cpuop_func op_f37a_50_ff; +extern cpuop_func op_f37b_50_nf; +extern cpuop_func op_f37b_50_ff; +extern cpuop_func op_f408_50_nf; +extern cpuop_func op_f408_50_ff; +extern cpuop_func op_f410_50_nf; +extern cpuop_func op_f410_50_ff; +extern cpuop_func op_f418_50_nf; +extern cpuop_func op_f418_50_ff; +extern cpuop_func op_f419_50_nf; +extern cpuop_func op_f419_50_ff; +extern cpuop_func op_f41a_50_nf; +extern cpuop_func op_f41a_50_ff; +extern cpuop_func op_f41b_50_nf; +extern cpuop_func op_f41b_50_ff; +extern cpuop_func op_f41c_50_nf; +extern cpuop_func op_f41c_50_ff; +extern cpuop_func op_f41d_50_nf; +extern cpuop_func op_f41d_50_ff; +extern cpuop_func op_f41e_50_nf; +extern cpuop_func op_f41e_50_ff; +extern cpuop_func op_f41f_50_nf; +extern cpuop_func op_f41f_50_ff; +extern cpuop_func op_f428_50_nf; +extern cpuop_func op_f428_50_ff; +extern cpuop_func op_f430_50_nf; +extern cpuop_func op_f430_50_ff; +extern cpuop_func op_f438_50_nf; +extern cpuop_func op_f438_50_ff; +extern cpuop_func op_f439_50_nf; +extern cpuop_func op_f439_50_ff; +extern cpuop_func op_f43a_50_nf; +extern cpuop_func op_f43a_50_ff; +extern cpuop_func op_f43b_50_nf; +extern cpuop_func op_f43b_50_ff; +extern cpuop_func op_f43c_50_nf; +extern cpuop_func op_f43c_50_ff; +extern cpuop_func op_f43d_50_nf; +extern cpuop_func op_f43d_50_ff; +extern cpuop_func op_f43e_50_nf; +extern cpuop_func op_f43e_50_ff; +extern cpuop_func op_f43f_50_nf; +extern cpuop_func op_f43f_50_ff; +extern cpuop_func op_f500_50_nf; +extern cpuop_func op_f500_50_ff; +extern cpuop_func op_f508_50_nf; +extern cpuop_func op_f508_50_ff; +extern cpuop_func op_f510_50_nf; +extern cpuop_func op_f510_50_ff; +extern cpuop_func op_f518_50_nf; +extern cpuop_func op_f518_50_ff; +extern cpuop_func op_f548_50_nf; +extern cpuop_func op_f548_50_ff; +extern cpuop_func op_f568_50_nf; +extern cpuop_func op_f568_50_ff; +extern cpuop_func op_f588_50_nf; +extern cpuop_func op_f588_50_ff; +extern cpuop_func op_f5c8_50_nf; +extern cpuop_func op_f5c8_50_ff; +extern cpuop_func op_f600_50_nf; +extern cpuop_func op_f600_50_ff; +extern cpuop_func op_f608_50_nf; +extern cpuop_func op_f608_50_ff; +extern cpuop_func op_f610_50_nf; +extern cpuop_func op_f610_50_ff; +extern cpuop_func op_f618_50_nf; +extern cpuop_func op_f618_50_ff; +extern cpuop_func op_f620_50_nf; +extern cpuop_func op_f620_50_ff; +extern cpuop_func op_f800_50_nf; +extern cpuop_func op_f800_50_ff; +extern cpuop_func op_003c_51_nf; +extern cpuop_func op_003c_51_ff; +extern cpuop_func op_007c_51_nf; +extern cpuop_func op_007c_51_ff; +extern cpuop_func op_023c_51_nf; +extern cpuop_func op_023c_51_ff; +extern cpuop_func op_027c_51_nf; +extern cpuop_func op_027c_51_ff; +extern cpuop_func op_0a3c_51_nf; +extern cpuop_func op_0a3c_51_ff; +extern cpuop_func op_0a7c_51_nf; +extern cpuop_func op_0a7c_51_ff; +extern cpuop_func op_0ad0_51_nf; +extern cpuop_func op_0ad0_51_ff; +extern cpuop_func op_0ad8_51_nf; +extern cpuop_func op_0ad8_51_ff; +extern cpuop_func op_0ae0_51_nf; +extern cpuop_func op_0ae0_51_ff; +extern cpuop_func op_0ae8_51_nf; +extern cpuop_func op_0ae8_51_ff; +extern cpuop_func op_0af0_51_nf; +extern cpuop_func op_0af0_51_ff; +extern cpuop_func op_0af8_51_nf; +extern cpuop_func op_0af8_51_ff; +extern cpuop_func op_0af9_51_nf; +extern cpuop_func op_0af9_51_ff; +extern cpuop_func op_0cd0_51_nf; +extern cpuop_func op_0cd0_51_ff; +extern cpuop_func op_0cd8_51_nf; +extern cpuop_func op_0cd8_51_ff; +extern cpuop_func op_0ce0_51_nf; +extern cpuop_func op_0ce0_51_ff; +extern cpuop_func op_0ce8_51_nf; +extern cpuop_func op_0ce8_51_ff; +extern cpuop_func op_0cf0_51_nf; +extern cpuop_func op_0cf0_51_ff; +extern cpuop_func op_0cf8_51_nf; +extern cpuop_func op_0cf8_51_ff; +extern cpuop_func op_0cf9_51_nf; +extern cpuop_func op_0cf9_51_ff; +extern cpuop_func op_0cfc_51_nf; +extern cpuop_func op_0cfc_51_ff; +extern cpuop_func op_0e10_51_nf; +extern cpuop_func op_0e10_51_ff; +extern cpuop_func op_0e18_51_nf; +extern cpuop_func op_0e18_51_ff; +extern cpuop_func op_0e20_51_nf; +extern cpuop_func op_0e20_51_ff; +extern cpuop_func op_0e28_51_nf; +extern cpuop_func op_0e28_51_ff; +extern cpuop_func op_0e30_51_nf; +extern cpuop_func op_0e30_51_ff; +extern cpuop_func op_0e38_51_nf; +extern cpuop_func op_0e38_51_ff; +extern cpuop_func op_0e39_51_nf; +extern cpuop_func op_0e39_51_ff; +extern cpuop_func op_0e50_51_nf; +extern cpuop_func op_0e50_51_ff; +extern cpuop_func op_0e58_51_nf; +extern cpuop_func op_0e58_51_ff; +extern cpuop_func op_0e60_51_nf; +extern cpuop_func op_0e60_51_ff; +extern cpuop_func op_0e68_51_nf; +extern cpuop_func op_0e68_51_ff; +extern cpuop_func op_0e70_51_nf; +extern cpuop_func op_0e70_51_ff; +extern cpuop_func op_0e78_51_nf; +extern cpuop_func op_0e78_51_ff; +extern cpuop_func op_0e79_51_nf; +extern cpuop_func op_0e79_51_ff; +extern cpuop_func op_0e90_51_nf; +extern cpuop_func op_0e90_51_ff; +extern cpuop_func op_0e98_51_nf; +extern cpuop_func op_0e98_51_ff; +extern cpuop_func op_0ea0_51_nf; +extern cpuop_func op_0ea0_51_ff; +extern cpuop_func op_0ea8_51_nf; +extern cpuop_func op_0ea8_51_ff; +extern cpuop_func op_0eb0_51_nf; +extern cpuop_func op_0eb0_51_ff; +extern cpuop_func op_0eb8_51_nf; +extern cpuop_func op_0eb8_51_ff; +extern cpuop_func op_0eb9_51_nf; +extern cpuop_func op_0eb9_51_ff; +extern cpuop_func op_0ed0_51_nf; +extern cpuop_func op_0ed0_51_ff; +extern cpuop_func op_0ed8_51_nf; +extern cpuop_func op_0ed8_51_ff; +extern cpuop_func op_0ee0_51_nf; +extern cpuop_func op_0ee0_51_ff; +extern cpuop_func op_0ee8_51_nf; +extern cpuop_func op_0ee8_51_ff; +extern cpuop_func op_0ef0_51_nf; +extern cpuop_func op_0ef0_51_ff; +extern cpuop_func op_0ef8_51_nf; +extern cpuop_func op_0ef8_51_ff; +extern cpuop_func op_0ef9_51_nf; +extern cpuop_func op_0ef9_51_ff; +extern cpuop_func op_0efc_51_nf; +extern cpuop_func op_0efc_51_ff; +extern cpuop_func op_4808_51_nf; +extern cpuop_func op_4808_51_ff; +extern cpuop_func op_4e50_51_nf; +extern cpuop_func op_4e50_51_ff; +extern cpuop_func op_4e60_51_nf; +extern cpuop_func op_4e60_51_ff; +extern cpuop_func op_4e71_51_nf; +extern cpuop_func op_4e71_51_ff; +extern cpuop_func op_4e72_51_nf; +extern cpuop_func op_4e72_51_ff; +extern cpuop_func op_4e73_51_nf; +extern cpuop_func op_4e73_51_ff; +extern cpuop_func op_4e77_51_nf; +extern cpuop_func op_4e77_51_ff; +extern cpuop_func op_4e7b_51_nf; +extern cpuop_func op_4e7b_51_ff; +extern cpuop_func op_f500_51_nf; +extern cpuop_func op_f500_51_ff; +extern cpuop_func op_f508_51_nf; +extern cpuop_func op_f508_51_ff; +extern cpuop_func op_f510_51_nf; +extern cpuop_func op_f510_51_ff; +extern cpuop_func op_f518_51_nf; +extern cpuop_func op_f518_51_ff; +extern cpuop_func op_f548_51_nf; +extern cpuop_func op_f548_51_ff; +extern cpuop_func op_f568_51_nf; +extern cpuop_func op_f568_51_ff; +extern cpuop_func op_003c_52_nf; +extern cpuop_func op_003c_52_ff; +extern cpuop_func op_007c_52_nf; +extern cpuop_func op_007c_52_ff; +extern cpuop_func op_023c_52_nf; +extern cpuop_func op_023c_52_ff; +extern cpuop_func op_027c_52_nf; +extern cpuop_func op_027c_52_ff; +extern cpuop_func op_0a3c_52_nf; +extern cpuop_func op_0a3c_52_ff; +extern cpuop_func op_0a7c_52_nf; +extern cpuop_func op_0a7c_52_ff; +extern cpuop_func op_0ad0_52_nf; +extern cpuop_func op_0ad0_52_ff; +extern cpuop_func op_0ad8_52_nf; +extern cpuop_func op_0ad8_52_ff; +extern cpuop_func op_0ae0_52_nf; +extern cpuop_func op_0ae0_52_ff; +extern cpuop_func op_0ae8_52_nf; +extern cpuop_func op_0ae8_52_ff; +extern cpuop_func op_0af0_52_nf; +extern cpuop_func op_0af0_52_ff; +extern cpuop_func op_0af8_52_nf; +extern cpuop_func op_0af8_52_ff; +extern cpuop_func op_0af9_52_nf; +extern cpuop_func op_0af9_52_ff; +extern cpuop_func op_0cd0_52_nf; +extern cpuop_func op_0cd0_52_ff; +extern cpuop_func op_0cd8_52_nf; +extern cpuop_func op_0cd8_52_ff; +extern cpuop_func op_0ce0_52_nf; +extern cpuop_func op_0ce0_52_ff; +extern cpuop_func op_0ce8_52_nf; +extern cpuop_func op_0ce8_52_ff; +extern cpuop_func op_0cf0_52_nf; +extern cpuop_func op_0cf0_52_ff; +extern cpuop_func op_0cf8_52_nf; +extern cpuop_func op_0cf8_52_ff; +extern cpuop_func op_0cf9_52_nf; +extern cpuop_func op_0cf9_52_ff; +extern cpuop_func op_0cfc_52_nf; +extern cpuop_func op_0cfc_52_ff; +extern cpuop_func op_0e10_52_nf; +extern cpuop_func op_0e10_52_ff; +extern cpuop_func op_0e18_52_nf; +extern cpuop_func op_0e18_52_ff; +extern cpuop_func op_0e20_52_nf; +extern cpuop_func op_0e20_52_ff; +extern cpuop_func op_0e28_52_nf; +extern cpuop_func op_0e28_52_ff; +extern cpuop_func op_0e30_52_nf; +extern cpuop_func op_0e30_52_ff; +extern cpuop_func op_0e38_52_nf; +extern cpuop_func op_0e38_52_ff; +extern cpuop_func op_0e39_52_nf; +extern cpuop_func op_0e39_52_ff; +extern cpuop_func op_0e50_52_nf; +extern cpuop_func op_0e50_52_ff; +extern cpuop_func op_0e58_52_nf; +extern cpuop_func op_0e58_52_ff; +extern cpuop_func op_0e60_52_nf; +extern cpuop_func op_0e60_52_ff; +extern cpuop_func op_0e68_52_nf; +extern cpuop_func op_0e68_52_ff; +extern cpuop_func op_0e70_52_nf; +extern cpuop_func op_0e70_52_ff; +extern cpuop_func op_0e78_52_nf; +extern cpuop_func op_0e78_52_ff; +extern cpuop_func op_0e79_52_nf; +extern cpuop_func op_0e79_52_ff; +extern cpuop_func op_0e90_52_nf; +extern cpuop_func op_0e90_52_ff; +extern cpuop_func op_0e98_52_nf; +extern cpuop_func op_0e98_52_ff; +extern cpuop_func op_0ea0_52_nf; +extern cpuop_func op_0ea0_52_ff; +extern cpuop_func op_0ea8_52_nf; +extern cpuop_func op_0ea8_52_ff; +extern cpuop_func op_0eb0_52_nf; +extern cpuop_func op_0eb0_52_ff; +extern cpuop_func op_0eb8_52_nf; +extern cpuop_func op_0eb8_52_ff; +extern cpuop_func op_0eb9_52_nf; +extern cpuop_func op_0eb9_52_ff; +extern cpuop_func op_0ed0_52_nf; +extern cpuop_func op_0ed0_52_ff; +extern cpuop_func op_0ed8_52_nf; +extern cpuop_func op_0ed8_52_ff; +extern cpuop_func op_0ee0_52_nf; +extern cpuop_func op_0ee0_52_ff; +extern cpuop_func op_0ee8_52_nf; +extern cpuop_func op_0ee8_52_ff; +extern cpuop_func op_0ef0_52_nf; +extern cpuop_func op_0ef0_52_ff; +extern cpuop_func op_0ef8_52_nf; +extern cpuop_func op_0ef8_52_ff; +extern cpuop_func op_0ef9_52_nf; +extern cpuop_func op_0ef9_52_ff; +extern cpuop_func op_0efc_52_nf; +extern cpuop_func op_0efc_52_ff; +extern cpuop_func op_4800_52_nf; +extern cpuop_func op_4800_52_ff; +extern cpuop_func op_4810_52_nf; +extern cpuop_func op_4810_52_ff; +extern cpuop_func op_4818_52_nf; +extern cpuop_func op_4818_52_ff; +extern cpuop_func op_4820_52_nf; +extern cpuop_func op_4820_52_ff; +extern cpuop_func op_4828_52_nf; +extern cpuop_func op_4828_52_ff; +extern cpuop_func op_4830_52_nf; +extern cpuop_func op_4830_52_ff; +extern cpuop_func op_4838_52_nf; +extern cpuop_func op_4838_52_ff; +extern cpuop_func op_4839_52_nf; +extern cpuop_func op_4839_52_ff; +extern cpuop_func op_4890_52_nf; +extern cpuop_func op_4890_52_ff; +extern cpuop_func op_48a0_52_nf; +extern cpuop_func op_48a0_52_ff; +extern cpuop_func op_48a8_52_nf; +extern cpuop_func op_48a8_52_ff; +extern cpuop_func op_48b0_52_nf; +extern cpuop_func op_48b0_52_ff; +extern cpuop_func op_48b8_52_nf; +extern cpuop_func op_48b8_52_ff; +extern cpuop_func op_48b9_52_nf; +extern cpuop_func op_48b9_52_ff; +extern cpuop_func op_48d0_52_nf; +extern cpuop_func op_48d0_52_ff; +extern cpuop_func op_48e0_52_nf; +extern cpuop_func op_48e0_52_ff; +extern cpuop_func op_48e8_52_nf; +extern cpuop_func op_48e8_52_ff; +extern cpuop_func op_48f0_52_nf; +extern cpuop_func op_48f0_52_ff; +extern cpuop_func op_48f8_52_nf; +extern cpuop_func op_48f8_52_ff; +extern cpuop_func op_48f9_52_nf; +extern cpuop_func op_48f9_52_ff; +extern cpuop_func op_4c90_52_nf; +extern cpuop_func op_4c90_52_ff; +extern cpuop_func op_4c98_52_nf; +extern cpuop_func op_4c98_52_ff; +extern cpuop_func op_4ca8_52_nf; +extern cpuop_func op_4ca8_52_ff; +extern cpuop_func op_4cb0_52_nf; +extern cpuop_func op_4cb0_52_ff; +extern cpuop_func op_4cb8_52_nf; +extern cpuop_func op_4cb8_52_ff; +extern cpuop_func op_4cb9_52_nf; +extern cpuop_func op_4cb9_52_ff; +extern cpuop_func op_4cba_52_nf; +extern cpuop_func op_4cba_52_ff; +extern cpuop_func op_4cbb_52_nf; +extern cpuop_func op_4cbb_52_ff; +extern cpuop_func op_4cd0_52_nf; +extern cpuop_func op_4cd0_52_ff; +extern cpuop_func op_4cd8_52_nf; +extern cpuop_func op_4cd8_52_ff; +extern cpuop_func op_4ce8_52_nf; +extern cpuop_func op_4ce8_52_ff; +extern cpuop_func op_4cf0_52_nf; +extern cpuop_func op_4cf0_52_ff; +extern cpuop_func op_4cf8_52_nf; +extern cpuop_func op_4cf8_52_ff; +extern cpuop_func op_4cf9_52_nf; +extern cpuop_func op_4cf9_52_ff; +extern cpuop_func op_4cfa_52_nf; +extern cpuop_func op_4cfa_52_ff; +extern cpuop_func op_4cfb_52_nf; +extern cpuop_func op_4cfb_52_ff; +extern cpuop_func op_4e60_52_nf; +extern cpuop_func op_4e60_52_ff; +extern cpuop_func op_4e71_52_nf; +extern cpuop_func op_4e71_52_ff; +extern cpuop_func op_4e72_52_nf; +extern cpuop_func op_4e72_52_ff; +extern cpuop_func op_4e73_52_nf; +extern cpuop_func op_4e73_52_ff; +extern cpuop_func op_4e74_52_nf; +extern cpuop_func op_4e74_52_ff; +extern cpuop_func op_4e75_52_nf; +extern cpuop_func op_4e75_52_ff; +extern cpuop_func op_4e77_52_nf; +extern cpuop_func op_4e77_52_ff; +extern cpuop_func op_4e7b_52_nf; +extern cpuop_func op_4e7b_52_ff; +extern cpuop_func op_4e90_52_nf; +extern cpuop_func op_4e90_52_ff; +extern cpuop_func op_4ea8_52_nf; +extern cpuop_func op_4ea8_52_ff; +extern cpuop_func op_4eb0_52_nf; +extern cpuop_func op_4eb0_52_ff; +extern cpuop_func op_4eb8_52_nf; +extern cpuop_func op_4eb8_52_ff; +extern cpuop_func op_4eb9_52_nf; +extern cpuop_func op_4eb9_52_ff; +extern cpuop_func op_4eba_52_nf; +extern cpuop_func op_4eba_52_ff; +extern cpuop_func op_4ebb_52_nf; +extern cpuop_func op_4ebb_52_ff; +extern cpuop_func op_50c8_52_nf; +extern cpuop_func op_50c8_52_ff; +extern cpuop_func op_51c8_52_nf; +extern cpuop_func op_51c8_52_ff; +extern cpuop_func op_52c8_52_nf; +extern cpuop_func op_52c8_52_ff; +extern cpuop_func op_53c8_52_nf; +extern cpuop_func op_53c8_52_ff; +extern cpuop_func op_54c8_52_nf; +extern cpuop_func op_54c8_52_ff; +extern cpuop_func op_55c8_52_nf; +extern cpuop_func op_55c8_52_ff; +extern cpuop_func op_56c8_52_nf; +extern cpuop_func op_56c8_52_ff; +extern cpuop_func op_57c8_52_nf; +extern cpuop_func op_57c8_52_ff; +extern cpuop_func op_58c8_52_nf; +extern cpuop_func op_58c8_52_ff; +extern cpuop_func op_59c8_52_nf; +extern cpuop_func op_59c8_52_ff; +extern cpuop_func op_5ac8_52_nf; +extern cpuop_func op_5ac8_52_ff; +extern cpuop_func op_5bc8_52_nf; +extern cpuop_func op_5bc8_52_ff; +extern cpuop_func op_5cc8_52_nf; +extern cpuop_func op_5cc8_52_ff; +extern cpuop_func op_5dc8_52_nf; +extern cpuop_func op_5dc8_52_ff; +extern cpuop_func op_5ec8_52_nf; +extern cpuop_func op_5ec8_52_ff; +extern cpuop_func op_5fc8_52_nf; +extern cpuop_func op_5fc8_52_ff; +extern cpuop_func op_6000_52_nf; +extern cpuop_func op_6000_52_ff; +extern cpuop_func op_6001_52_nf; +extern cpuop_func op_6001_52_ff; +extern cpuop_func op_60ff_52_nf; +extern cpuop_func op_60ff_52_ff; +extern cpuop_func op_6100_52_nf; +extern cpuop_func op_6100_52_ff; +extern cpuop_func op_6101_52_nf; +extern cpuop_func op_6101_52_ff; +extern cpuop_func op_61ff_52_nf; +extern cpuop_func op_61ff_52_ff; +extern cpuop_func op_6200_52_nf; +extern cpuop_func op_6200_52_ff; +extern cpuop_func op_6201_52_nf; +extern cpuop_func op_6201_52_ff; +extern cpuop_func op_62ff_52_nf; +extern cpuop_func op_62ff_52_ff; +extern cpuop_func op_6300_52_nf; +extern cpuop_func op_6300_52_ff; +extern cpuop_func op_6301_52_nf; +extern cpuop_func op_6301_52_ff; +extern cpuop_func op_63ff_52_nf; +extern cpuop_func op_63ff_52_ff; +extern cpuop_func op_6400_52_nf; +extern cpuop_func op_6400_52_ff; +extern cpuop_func op_6401_52_nf; +extern cpuop_func op_6401_52_ff; +extern cpuop_func op_64ff_52_nf; +extern cpuop_func op_64ff_52_ff; +extern cpuop_func op_6500_52_nf; +extern cpuop_func op_6500_52_ff; +extern cpuop_func op_6501_52_nf; +extern cpuop_func op_6501_52_ff; +extern cpuop_func op_65ff_52_nf; +extern cpuop_func op_65ff_52_ff; +extern cpuop_func op_6600_52_nf; +extern cpuop_func op_6600_52_ff; +extern cpuop_func op_6601_52_nf; +extern cpuop_func op_6601_52_ff; +extern cpuop_func op_66ff_52_nf; +extern cpuop_func op_66ff_52_ff; +extern cpuop_func op_6700_52_nf; +extern cpuop_func op_6700_52_ff; +extern cpuop_func op_6701_52_nf; +extern cpuop_func op_6701_52_ff; +extern cpuop_func op_67ff_52_nf; +extern cpuop_func op_67ff_52_ff; +extern cpuop_func op_6800_52_nf; +extern cpuop_func op_6800_52_ff; +extern cpuop_func op_6801_52_nf; +extern cpuop_func op_6801_52_ff; +extern cpuop_func op_68ff_52_nf; +extern cpuop_func op_68ff_52_ff; +extern cpuop_func op_6900_52_nf; +extern cpuop_func op_6900_52_ff; +extern cpuop_func op_6901_52_nf; +extern cpuop_func op_6901_52_ff; +extern cpuop_func op_69ff_52_nf; +extern cpuop_func op_69ff_52_ff; +extern cpuop_func op_6a00_52_nf; +extern cpuop_func op_6a00_52_ff; +extern cpuop_func op_6a01_52_nf; +extern cpuop_func op_6a01_52_ff; +extern cpuop_func op_6aff_52_nf; +extern cpuop_func op_6aff_52_ff; +extern cpuop_func op_6b00_52_nf; +extern cpuop_func op_6b00_52_ff; +extern cpuop_func op_6b01_52_nf; +extern cpuop_func op_6b01_52_ff; +extern cpuop_func op_6bff_52_nf; +extern cpuop_func op_6bff_52_ff; +extern cpuop_func op_6c00_52_nf; +extern cpuop_func op_6c00_52_ff; +extern cpuop_func op_6c01_52_nf; +extern cpuop_func op_6c01_52_ff; +extern cpuop_func op_6cff_52_nf; +extern cpuop_func op_6cff_52_ff; +extern cpuop_func op_6d00_52_nf; +extern cpuop_func op_6d00_52_ff; +extern cpuop_func op_6d01_52_nf; +extern cpuop_func op_6d01_52_ff; +extern cpuop_func op_6dff_52_nf; +extern cpuop_func op_6dff_52_ff; +extern cpuop_func op_6e00_52_nf; +extern cpuop_func op_6e00_52_ff; +extern cpuop_func op_6e01_52_nf; +extern cpuop_func op_6e01_52_ff; +extern cpuop_func op_6eff_52_nf; +extern cpuop_func op_6eff_52_ff; +extern cpuop_func op_6f00_52_nf; +extern cpuop_func op_6f00_52_ff; +extern cpuop_func op_6f01_52_nf; +extern cpuop_func op_6f01_52_ff; +extern cpuop_func op_6fff_52_nf; +extern cpuop_func op_6fff_52_ff; +extern cpuop_func op_8100_52_nf; +extern cpuop_func op_8100_52_ff; +extern cpuop_func op_8108_52_nf; +extern cpuop_func op_8108_52_ff; +extern cpuop_func op_c100_52_nf; +extern cpuop_func op_c100_52_ff; +extern cpuop_func op_c108_52_nf; +extern cpuop_func op_c108_52_ff; +extern cpuop_func op_003c_53_nf; +extern cpuop_func op_003c_53_ff; +extern cpuop_func op_007c_53_nf; +extern cpuop_func op_007c_53_ff; +extern cpuop_func op_023c_53_nf; +extern cpuop_func op_023c_53_ff; +extern cpuop_func op_027c_53_nf; +extern cpuop_func op_027c_53_ff; +extern cpuop_func op_0a3c_53_nf; +extern cpuop_func op_0a3c_53_ff; +extern cpuop_func op_0a7c_53_nf; +extern cpuop_func op_0a7c_53_ff; +extern cpuop_func op_4e72_53_nf; +extern cpuop_func op_4e72_53_ff; +extern cpuop_func op_4e73_53_nf; +extern cpuop_func op_4e73_53_ff; +extern cpuop_func op_4e77_53_nf; +extern cpuop_func op_4e77_53_ff; +extern cpuop_func op_0030_54_nf; +extern cpuop_func op_0030_54_ff; +extern cpuop_func op_003c_54_nf; +extern cpuop_func op_003c_54_ff; +extern cpuop_func op_0070_54_nf; +extern cpuop_func op_0070_54_ff; +extern cpuop_func op_007c_54_nf; +extern cpuop_func op_007c_54_ff; +extern cpuop_func op_00b0_54_nf; +extern cpuop_func op_00b0_54_ff; +extern cpuop_func op_0130_54_nf; +extern cpuop_func op_0130_54_ff; +extern cpuop_func op_013b_54_nf; +extern cpuop_func op_013b_54_ff; +extern cpuop_func op_0140_54_nf; +extern cpuop_func op_0140_54_ff; +extern cpuop_func op_0170_54_nf; +extern cpuop_func op_0170_54_ff; +extern cpuop_func op_0180_54_nf; +extern cpuop_func op_0180_54_ff; +extern cpuop_func op_01b0_54_nf; +extern cpuop_func op_01b0_54_ff; +extern cpuop_func op_01c0_54_nf; +extern cpuop_func op_01c0_54_ff; +extern cpuop_func op_01f0_54_nf; +extern cpuop_func op_01f0_54_ff; +extern cpuop_func op_0230_54_nf; +extern cpuop_func op_0230_54_ff; +extern cpuop_func op_023c_54_nf; +extern cpuop_func op_023c_54_ff; +extern cpuop_func op_0270_54_nf; +extern cpuop_func op_0270_54_ff; +extern cpuop_func op_027c_54_nf; +extern cpuop_func op_027c_54_ff; +extern cpuop_func op_02b0_54_nf; +extern cpuop_func op_02b0_54_ff; +extern cpuop_func op_0430_54_nf; +extern cpuop_func op_0430_54_ff; +extern cpuop_func op_0470_54_nf; +extern cpuop_func op_0470_54_ff; +extern cpuop_func op_04b0_54_nf; +extern cpuop_func op_04b0_54_ff; +extern cpuop_func op_0630_54_nf; +extern cpuop_func op_0630_54_ff; +extern cpuop_func op_0670_54_nf; +extern cpuop_func op_0670_54_ff; +extern cpuop_func op_06b0_54_nf; +extern cpuop_func op_06b0_54_ff; +extern cpuop_func op_0830_54_nf; +extern cpuop_func op_0830_54_ff; +extern cpuop_func op_083b_54_nf; +extern cpuop_func op_083b_54_ff; +extern cpuop_func op_0840_54_nf; +extern cpuop_func op_0840_54_ff; +extern cpuop_func op_0870_54_nf; +extern cpuop_func op_0870_54_ff; +extern cpuop_func op_0880_54_nf; +extern cpuop_func op_0880_54_ff; +extern cpuop_func op_08b0_54_nf; +extern cpuop_func op_08b0_54_ff; +extern cpuop_func op_08c0_54_nf; +extern cpuop_func op_08c0_54_ff; +extern cpuop_func op_08f0_54_nf; +extern cpuop_func op_08f0_54_ff; +extern cpuop_func op_0a30_54_nf; +extern cpuop_func op_0a30_54_ff; +extern cpuop_func op_0a3c_54_nf; +extern cpuop_func op_0a3c_54_ff; +extern cpuop_func op_0a70_54_nf; +extern cpuop_func op_0a70_54_ff; +extern cpuop_func op_0a7c_54_nf; +extern cpuop_func op_0a7c_54_ff; +extern cpuop_func op_0ab0_54_nf; +extern cpuop_func op_0ab0_54_ff; +extern cpuop_func op_0c30_54_nf; +extern cpuop_func op_0c30_54_ff; +extern cpuop_func op_0c70_54_nf; +extern cpuop_func op_0c70_54_ff; +extern cpuop_func op_0cb0_54_nf; +extern cpuop_func op_0cb0_54_ff; +extern cpuop_func op_0e30_54_nf; +extern cpuop_func op_0e30_54_ff; +extern cpuop_func op_0e70_54_nf; +extern cpuop_func op_0e70_54_ff; +extern cpuop_func op_0eb0_54_nf; +extern cpuop_func op_0eb0_54_ff; +extern cpuop_func op_1030_54_nf; +extern cpuop_func op_1030_54_ff; +extern cpuop_func op_103b_54_nf; +extern cpuop_func op_103b_54_ff; +extern cpuop_func op_10b0_54_nf; +extern cpuop_func op_10b0_54_ff; +extern cpuop_func op_10bb_54_nf; +extern cpuop_func op_10bb_54_ff; +extern cpuop_func op_10f0_54_nf; +extern cpuop_func op_10f0_54_ff; +extern cpuop_func op_10fb_54_nf; +extern cpuop_func op_10fb_54_ff; +extern cpuop_func op_1130_54_nf; +extern cpuop_func op_1130_54_ff; +extern cpuop_func op_113b_54_nf; +extern cpuop_func op_113b_54_ff; +extern cpuop_func op_1170_54_nf; +extern cpuop_func op_1170_54_ff; +extern cpuop_func op_117b_54_nf; +extern cpuop_func op_117b_54_ff; +extern cpuop_func op_1180_54_nf; +extern cpuop_func op_1180_54_ff; +extern cpuop_func op_1190_54_nf; +extern cpuop_func op_1190_54_ff; +extern cpuop_func op_1198_54_nf; +extern cpuop_func op_1198_54_ff; +extern cpuop_func op_11a0_54_nf; +extern cpuop_func op_11a0_54_ff; +extern cpuop_func op_11a8_54_nf; +extern cpuop_func op_11a8_54_ff; +extern cpuop_func op_11b0_54_nf; +extern cpuop_func op_11b0_54_ff; +extern cpuop_func op_11b8_54_nf; +extern cpuop_func op_11b8_54_ff; +extern cpuop_func op_11b9_54_nf; +extern cpuop_func op_11b9_54_ff; +extern cpuop_func op_11ba_54_nf; +extern cpuop_func op_11ba_54_ff; +extern cpuop_func op_11bb_54_nf; +extern cpuop_func op_11bb_54_ff; +extern cpuop_func op_11bc_54_nf; +extern cpuop_func op_11bc_54_ff; +extern cpuop_func op_11f0_54_nf; +extern cpuop_func op_11f0_54_ff; +extern cpuop_func op_11fb_54_nf; +extern cpuop_func op_11fb_54_ff; +extern cpuop_func op_13f0_54_nf; +extern cpuop_func op_13f0_54_ff; +extern cpuop_func op_13fb_54_nf; +extern cpuop_func op_13fb_54_ff; +extern cpuop_func op_2030_54_nf; +extern cpuop_func op_2030_54_ff; +extern cpuop_func op_203b_54_nf; +extern cpuop_func op_203b_54_ff; +extern cpuop_func op_2070_54_nf; +extern cpuop_func op_2070_54_ff; +extern cpuop_func op_207b_54_nf; +extern cpuop_func op_207b_54_ff; +extern cpuop_func op_20b0_54_nf; +extern cpuop_func op_20b0_54_ff; +extern cpuop_func op_20bb_54_nf; +extern cpuop_func op_20bb_54_ff; +extern cpuop_func op_20f0_54_nf; +extern cpuop_func op_20f0_54_ff; +extern cpuop_func op_20fb_54_nf; +extern cpuop_func op_20fb_54_ff; +extern cpuop_func op_2130_54_nf; +extern cpuop_func op_2130_54_ff; +extern cpuop_func op_213b_54_nf; +extern cpuop_func op_213b_54_ff; +extern cpuop_func op_2170_54_nf; +extern cpuop_func op_2170_54_ff; +extern cpuop_func op_217b_54_nf; +extern cpuop_func op_217b_54_ff; +extern cpuop_func op_2180_54_nf; +extern cpuop_func op_2180_54_ff; +extern cpuop_func op_2188_54_nf; +extern cpuop_func op_2188_54_ff; +extern cpuop_func op_2190_54_nf; +extern cpuop_func op_2190_54_ff; +extern cpuop_func op_2198_54_nf; +extern cpuop_func op_2198_54_ff; +extern cpuop_func op_21a0_54_nf; +extern cpuop_func op_21a0_54_ff; +extern cpuop_func op_21a8_54_nf; +extern cpuop_func op_21a8_54_ff; +extern cpuop_func op_21b0_54_nf; +extern cpuop_func op_21b0_54_ff; +extern cpuop_func op_21b8_54_nf; +extern cpuop_func op_21b8_54_ff; +extern cpuop_func op_21b9_54_nf; +extern cpuop_func op_21b9_54_ff; +extern cpuop_func op_21ba_54_nf; +extern cpuop_func op_21ba_54_ff; +extern cpuop_func op_21bb_54_nf; +extern cpuop_func op_21bb_54_ff; +extern cpuop_func op_21bc_54_nf; +extern cpuop_func op_21bc_54_ff; +extern cpuop_func op_21f0_54_nf; +extern cpuop_func op_21f0_54_ff; +extern cpuop_func op_21fb_54_nf; +extern cpuop_func op_21fb_54_ff; +extern cpuop_func op_23f0_54_nf; +extern cpuop_func op_23f0_54_ff; +extern cpuop_func op_23fb_54_nf; +extern cpuop_func op_23fb_54_ff; +extern cpuop_func op_3030_54_nf; +extern cpuop_func op_3030_54_ff; +extern cpuop_func op_303b_54_nf; +extern cpuop_func op_303b_54_ff; +extern cpuop_func op_3070_54_nf; +extern cpuop_func op_3070_54_ff; +extern cpuop_func op_307b_54_nf; +extern cpuop_func op_307b_54_ff; +extern cpuop_func op_30b0_54_nf; +extern cpuop_func op_30b0_54_ff; +extern cpuop_func op_30bb_54_nf; +extern cpuop_func op_30bb_54_ff; +extern cpuop_func op_30f0_54_nf; +extern cpuop_func op_30f0_54_ff; +extern cpuop_func op_30fb_54_nf; +extern cpuop_func op_30fb_54_ff; +extern cpuop_func op_3130_54_nf; +extern cpuop_func op_3130_54_ff; +extern cpuop_func op_313b_54_nf; +extern cpuop_func op_313b_54_ff; +extern cpuop_func op_3170_54_nf; +extern cpuop_func op_3170_54_ff; +extern cpuop_func op_317b_54_nf; +extern cpuop_func op_317b_54_ff; +extern cpuop_func op_3180_54_nf; +extern cpuop_func op_3180_54_ff; +extern cpuop_func op_3188_54_nf; +extern cpuop_func op_3188_54_ff; +extern cpuop_func op_3190_54_nf; +extern cpuop_func op_3190_54_ff; +extern cpuop_func op_3198_54_nf; +extern cpuop_func op_3198_54_ff; +extern cpuop_func op_31a0_54_nf; +extern cpuop_func op_31a0_54_ff; +extern cpuop_func op_31a8_54_nf; +extern cpuop_func op_31a8_54_ff; +extern cpuop_func op_31b0_54_nf; +extern cpuop_func op_31b0_54_ff; +extern cpuop_func op_31b8_54_nf; +extern cpuop_func op_31b8_54_ff; +extern cpuop_func op_31b9_54_nf; +extern cpuop_func op_31b9_54_ff; +extern cpuop_func op_31ba_54_nf; +extern cpuop_func op_31ba_54_ff; +extern cpuop_func op_31bb_54_nf; +extern cpuop_func op_31bb_54_ff; +extern cpuop_func op_31bc_54_nf; +extern cpuop_func op_31bc_54_ff; +extern cpuop_func op_31f0_54_nf; +extern cpuop_func op_31f0_54_ff; +extern cpuop_func op_31fb_54_nf; +extern cpuop_func op_31fb_54_ff; +extern cpuop_func op_33f0_54_nf; +extern cpuop_func op_33f0_54_ff; +extern cpuop_func op_33fb_54_nf; +extern cpuop_func op_33fb_54_ff; +extern cpuop_func op_4030_54_nf; +extern cpuop_func op_4030_54_ff; +extern cpuop_func op_4070_54_nf; +extern cpuop_func op_4070_54_ff; +extern cpuop_func op_40b0_54_nf; +extern cpuop_func op_40b0_54_ff; +extern cpuop_func op_40f0_54_nf; +extern cpuop_func op_40f0_54_ff; +extern cpuop_func op_41b0_54_nf; +extern cpuop_func op_41b0_54_ff; +extern cpuop_func op_41bb_54_nf; +extern cpuop_func op_41bb_54_ff; +extern cpuop_func op_41f0_54_nf; +extern cpuop_func op_41f0_54_ff; +extern cpuop_func op_41fb_54_nf; +extern cpuop_func op_41fb_54_ff; +extern cpuop_func op_4230_54_nf; +extern cpuop_func op_4230_54_ff; +extern cpuop_func op_4270_54_nf; +extern cpuop_func op_4270_54_ff; +extern cpuop_func op_42b0_54_nf; +extern cpuop_func op_42b0_54_ff; +extern cpuop_func op_42f0_54_nf; +extern cpuop_func op_42f0_54_ff; +extern cpuop_func op_4430_54_nf; +extern cpuop_func op_4430_54_ff; +extern cpuop_func op_4470_54_nf; +extern cpuop_func op_4470_54_ff; +extern cpuop_func op_44b0_54_nf; +extern cpuop_func op_44b0_54_ff; +extern cpuop_func op_44f0_54_nf; +extern cpuop_func op_44f0_54_ff; +extern cpuop_func op_44fb_54_nf; +extern cpuop_func op_44fb_54_ff; +extern cpuop_func op_4630_54_nf; +extern cpuop_func op_4630_54_ff; +extern cpuop_func op_4670_54_nf; +extern cpuop_func op_4670_54_ff; +extern cpuop_func op_46b0_54_nf; +extern cpuop_func op_46b0_54_ff; +extern cpuop_func op_46f0_54_nf; +extern cpuop_func op_46f0_54_ff; +extern cpuop_func op_46fb_54_nf; +extern cpuop_func op_46fb_54_ff; +extern cpuop_func op_4800_54_nf; +extern cpuop_func op_4800_54_ff; +extern cpuop_func op_4810_54_nf; +extern cpuop_func op_4810_54_ff; +extern cpuop_func op_4818_54_nf; +extern cpuop_func op_4818_54_ff; +extern cpuop_func op_4820_54_nf; +extern cpuop_func op_4820_54_ff; +extern cpuop_func op_4828_54_nf; +extern cpuop_func op_4828_54_ff; +extern cpuop_func op_4830_54_nf; +extern cpuop_func op_4830_54_ff; +extern cpuop_func op_4838_54_nf; +extern cpuop_func op_4838_54_ff; +extern cpuop_func op_4839_54_nf; +extern cpuop_func op_4839_54_ff; +extern cpuop_func op_4870_54_nf; +extern cpuop_func op_4870_54_ff; +extern cpuop_func op_487b_54_nf; +extern cpuop_func op_487b_54_ff; +extern cpuop_func op_4890_54_nf; +extern cpuop_func op_4890_54_ff; +extern cpuop_func op_48a0_54_nf; +extern cpuop_func op_48a0_54_ff; +extern cpuop_func op_48a8_54_nf; +extern cpuop_func op_48a8_54_ff; +extern cpuop_func op_48b0_54_nf; +extern cpuop_func op_48b0_54_ff; +extern cpuop_func op_48b8_54_nf; +extern cpuop_func op_48b8_54_ff; +extern cpuop_func op_48b9_54_nf; +extern cpuop_func op_48b9_54_ff; +extern cpuop_func op_48d0_54_nf; +extern cpuop_func op_48d0_54_ff; +extern cpuop_func op_48e0_54_nf; +extern cpuop_func op_48e0_54_ff; +extern cpuop_func op_48e8_54_nf; +extern cpuop_func op_48e8_54_ff; +extern cpuop_func op_48f0_54_nf; +extern cpuop_func op_48f0_54_ff; +extern cpuop_func op_48f8_54_nf; +extern cpuop_func op_48f8_54_ff; +extern cpuop_func op_48f9_54_nf; +extern cpuop_func op_48f9_54_ff; +extern cpuop_func op_4a30_54_nf; +extern cpuop_func op_4a30_54_ff; +extern cpuop_func op_4a70_54_nf; +extern cpuop_func op_4a70_54_ff; +extern cpuop_func op_4ab0_54_nf; +extern cpuop_func op_4ab0_54_ff; +extern cpuop_func op_4ac0_54_nf; +extern cpuop_func op_4ac0_54_ff; +extern cpuop_func op_4ad0_54_nf; +extern cpuop_func op_4ad0_54_ff; +extern cpuop_func op_4ad8_54_nf; +extern cpuop_func op_4ad8_54_ff; +extern cpuop_func op_4ae0_54_nf; +extern cpuop_func op_4ae0_54_ff; +extern cpuop_func op_4ae8_54_nf; +extern cpuop_func op_4ae8_54_ff; +extern cpuop_func op_4af0_54_nf; +extern cpuop_func op_4af0_54_ff; +extern cpuop_func op_4af8_54_nf; +extern cpuop_func op_4af8_54_ff; +extern cpuop_func op_4af9_54_nf; +extern cpuop_func op_4af9_54_ff; +extern cpuop_func op_4c90_54_nf; +extern cpuop_func op_4c90_54_ff; +extern cpuop_func op_4c98_54_nf; +extern cpuop_func op_4c98_54_ff; +extern cpuop_func op_4ca8_54_nf; +extern cpuop_func op_4ca8_54_ff; +extern cpuop_func op_4cb0_54_nf; +extern cpuop_func op_4cb0_54_ff; +extern cpuop_func op_4cb8_54_nf; +extern cpuop_func op_4cb8_54_ff; +extern cpuop_func op_4cb9_54_nf; +extern cpuop_func op_4cb9_54_ff; +extern cpuop_func op_4cba_54_nf; +extern cpuop_func op_4cba_54_ff; +extern cpuop_func op_4cbb_54_nf; +extern cpuop_func op_4cbb_54_ff; +extern cpuop_func op_4cd0_54_nf; +extern cpuop_func op_4cd0_54_ff; +extern cpuop_func op_4cd8_54_nf; +extern cpuop_func op_4cd8_54_ff; +extern cpuop_func op_4ce8_54_nf; +extern cpuop_func op_4ce8_54_ff; +extern cpuop_func op_4cf0_54_nf; +extern cpuop_func op_4cf0_54_ff; +extern cpuop_func op_4cf8_54_nf; +extern cpuop_func op_4cf8_54_ff; +extern cpuop_func op_4cf9_54_nf; +extern cpuop_func op_4cf9_54_ff; +extern cpuop_func op_4cfa_54_nf; +extern cpuop_func op_4cfa_54_ff; +extern cpuop_func op_4cfb_54_nf; +extern cpuop_func op_4cfb_54_ff; +extern cpuop_func op_4e50_54_nf; +extern cpuop_func op_4e50_54_ff; +extern cpuop_func op_4e72_54_nf; +extern cpuop_func op_4e72_54_ff; +extern cpuop_func op_4e73_54_nf; +extern cpuop_func op_4e73_54_ff; +extern cpuop_func op_4e75_54_nf; +extern cpuop_func op_4e75_54_ff; +extern cpuop_func op_4e77_54_nf; +extern cpuop_func op_4e77_54_ff; +extern cpuop_func op_4eb0_54_nf; +extern cpuop_func op_4eb0_54_ff; +extern cpuop_func op_4ebb_54_nf; +extern cpuop_func op_4ebb_54_ff; +extern cpuop_func op_4ef0_54_nf; +extern cpuop_func op_4ef0_54_ff; +extern cpuop_func op_4efb_54_nf; +extern cpuop_func op_4efb_54_ff; +extern cpuop_func op_5030_54_nf; +extern cpuop_func op_5030_54_ff; +extern cpuop_func op_5070_54_nf; +extern cpuop_func op_5070_54_ff; +extern cpuop_func op_50b0_54_nf; +extern cpuop_func op_50b0_54_ff; +extern cpuop_func op_50c8_54_nf; +extern cpuop_func op_50c8_54_ff; +extern cpuop_func op_50f0_54_nf; +extern cpuop_func op_50f0_54_ff; +extern cpuop_func op_5130_54_nf; +extern cpuop_func op_5130_54_ff; +extern cpuop_func op_5170_54_nf; +extern cpuop_func op_5170_54_ff; +extern cpuop_func op_51b0_54_nf; +extern cpuop_func op_51b0_54_ff; +extern cpuop_func op_51c8_54_nf; +extern cpuop_func op_51c8_54_ff; +extern cpuop_func op_51f0_54_nf; +extern cpuop_func op_51f0_54_ff; +extern cpuop_func op_52c8_54_nf; +extern cpuop_func op_52c8_54_ff; +extern cpuop_func op_52f0_54_nf; +extern cpuop_func op_52f0_54_ff; +extern cpuop_func op_53c8_54_nf; +extern cpuop_func op_53c8_54_ff; +extern cpuop_func op_53f0_54_nf; +extern cpuop_func op_53f0_54_ff; +extern cpuop_func op_54c8_54_nf; +extern cpuop_func op_54c8_54_ff; +extern cpuop_func op_54f0_54_nf; +extern cpuop_func op_54f0_54_ff; +extern cpuop_func op_55c8_54_nf; +extern cpuop_func op_55c8_54_ff; +extern cpuop_func op_55f0_54_nf; +extern cpuop_func op_55f0_54_ff; +extern cpuop_func op_56c8_54_nf; +extern cpuop_func op_56c8_54_ff; +extern cpuop_func op_56f0_54_nf; +extern cpuop_func op_56f0_54_ff; +extern cpuop_func op_57c8_54_nf; +extern cpuop_func op_57c8_54_ff; +extern cpuop_func op_57f0_54_nf; +extern cpuop_func op_57f0_54_ff; +extern cpuop_func op_58c8_54_nf; +extern cpuop_func op_58c8_54_ff; +extern cpuop_func op_58f0_54_nf; +extern cpuop_func op_58f0_54_ff; +extern cpuop_func op_59c8_54_nf; +extern cpuop_func op_59c8_54_ff; +extern cpuop_func op_59f0_54_nf; +extern cpuop_func op_59f0_54_ff; +extern cpuop_func op_5ac8_54_nf; +extern cpuop_func op_5ac8_54_ff; +extern cpuop_func op_5af0_54_nf; +extern cpuop_func op_5af0_54_ff; +extern cpuop_func op_5bc8_54_nf; +extern cpuop_func op_5bc8_54_ff; +extern cpuop_func op_5bf0_54_nf; +extern cpuop_func op_5bf0_54_ff; +extern cpuop_func op_5cc8_54_nf; +extern cpuop_func op_5cc8_54_ff; +extern cpuop_func op_5cf0_54_nf; +extern cpuop_func op_5cf0_54_ff; +extern cpuop_func op_5dc8_54_nf; +extern cpuop_func op_5dc8_54_ff; +extern cpuop_func op_5df0_54_nf; +extern cpuop_func op_5df0_54_ff; +extern cpuop_func op_5ec8_54_nf; +extern cpuop_func op_5ec8_54_ff; +extern cpuop_func op_5ef0_54_nf; +extern cpuop_func op_5ef0_54_ff; +extern cpuop_func op_5fc8_54_nf; +extern cpuop_func op_5fc8_54_ff; +extern cpuop_func op_5ff0_54_nf; +extern cpuop_func op_5ff0_54_ff; +extern cpuop_func op_6000_54_nf; +extern cpuop_func op_6000_54_ff; +extern cpuop_func op_6001_54_nf; +extern cpuop_func op_6001_54_ff; +extern cpuop_func op_60ff_54_nf; +extern cpuop_func op_60ff_54_ff; +extern cpuop_func op_6100_54_nf; +extern cpuop_func op_6100_54_ff; +extern cpuop_func op_6101_54_nf; +extern cpuop_func op_6101_54_ff; +extern cpuop_func op_61ff_54_nf; +extern cpuop_func op_61ff_54_ff; +extern cpuop_func op_6200_54_nf; +extern cpuop_func op_6200_54_ff; +extern cpuop_func op_6201_54_nf; +extern cpuop_func op_6201_54_ff; +extern cpuop_func op_62ff_54_nf; +extern cpuop_func op_62ff_54_ff; +extern cpuop_func op_6300_54_nf; +extern cpuop_func op_6300_54_ff; +extern cpuop_func op_6301_54_nf; +extern cpuop_func op_6301_54_ff; +extern cpuop_func op_63ff_54_nf; +extern cpuop_func op_63ff_54_ff; +extern cpuop_func op_6400_54_nf; +extern cpuop_func op_6400_54_ff; +extern cpuop_func op_6401_54_nf; +extern cpuop_func op_6401_54_ff; +extern cpuop_func op_64ff_54_nf; +extern cpuop_func op_64ff_54_ff; +extern cpuop_func op_6500_54_nf; +extern cpuop_func op_6500_54_ff; +extern cpuop_func op_6501_54_nf; +extern cpuop_func op_6501_54_ff; +extern cpuop_func op_65ff_54_nf; +extern cpuop_func op_65ff_54_ff; +extern cpuop_func op_6600_54_nf; +extern cpuop_func op_6600_54_ff; +extern cpuop_func op_6601_54_nf; +extern cpuop_func op_6601_54_ff; +extern cpuop_func op_66ff_54_nf; +extern cpuop_func op_66ff_54_ff; +extern cpuop_func op_6700_54_nf; +extern cpuop_func op_6700_54_ff; +extern cpuop_func op_6701_54_nf; +extern cpuop_func op_6701_54_ff; +extern cpuop_func op_67ff_54_nf; +extern cpuop_func op_67ff_54_ff; +extern cpuop_func op_6800_54_nf; +extern cpuop_func op_6800_54_ff; +extern cpuop_func op_6801_54_nf; +extern cpuop_func op_6801_54_ff; +extern cpuop_func op_68ff_54_nf; +extern cpuop_func op_68ff_54_ff; +extern cpuop_func op_6900_54_nf; +extern cpuop_func op_6900_54_ff; +extern cpuop_func op_6901_54_nf; +extern cpuop_func op_6901_54_ff; +extern cpuop_func op_69ff_54_nf; +extern cpuop_func op_69ff_54_ff; +extern cpuop_func op_6a00_54_nf; +extern cpuop_func op_6a00_54_ff; +extern cpuop_func op_6a01_54_nf; +extern cpuop_func op_6a01_54_ff; +extern cpuop_func op_6aff_54_nf; +extern cpuop_func op_6aff_54_ff; +extern cpuop_func op_6b00_54_nf; +extern cpuop_func op_6b00_54_ff; +extern cpuop_func op_6b01_54_nf; +extern cpuop_func op_6b01_54_ff; +extern cpuop_func op_6bff_54_nf; +extern cpuop_func op_6bff_54_ff; +extern cpuop_func op_6c00_54_nf; +extern cpuop_func op_6c00_54_ff; +extern cpuop_func op_6c01_54_nf; +extern cpuop_func op_6c01_54_ff; +extern cpuop_func op_6cff_54_nf; +extern cpuop_func op_6cff_54_ff; +extern cpuop_func op_6d00_54_nf; +extern cpuop_func op_6d00_54_ff; +extern cpuop_func op_6d01_54_nf; +extern cpuop_func op_6d01_54_ff; +extern cpuop_func op_6dff_54_nf; +extern cpuop_func op_6dff_54_ff; +extern cpuop_func op_6e00_54_nf; +extern cpuop_func op_6e00_54_ff; +extern cpuop_func op_6e01_54_nf; +extern cpuop_func op_6e01_54_ff; +extern cpuop_func op_6eff_54_nf; +extern cpuop_func op_6eff_54_ff; +extern cpuop_func op_6f00_54_nf; +extern cpuop_func op_6f00_54_ff; +extern cpuop_func op_6f01_54_nf; +extern cpuop_func op_6f01_54_ff; +extern cpuop_func op_6fff_54_nf; +extern cpuop_func op_6fff_54_ff; +extern cpuop_func op_8030_54_nf; +extern cpuop_func op_8030_54_ff; +extern cpuop_func op_803b_54_nf; +extern cpuop_func op_803b_54_ff; +extern cpuop_func op_8070_54_nf; +extern cpuop_func op_8070_54_ff; +extern cpuop_func op_807b_54_nf; +extern cpuop_func op_807b_54_ff; +extern cpuop_func op_80b0_54_nf; +extern cpuop_func op_80b0_54_ff; +extern cpuop_func op_80bb_54_nf; +extern cpuop_func op_80bb_54_ff; +extern cpuop_func op_80c0_54_nf; +extern cpuop_func op_80c0_54_ff; +extern cpuop_func op_80d0_54_nf; +extern cpuop_func op_80d0_54_ff; +extern cpuop_func op_80d8_54_nf; +extern cpuop_func op_80d8_54_ff; +extern cpuop_func op_80e0_54_nf; +extern cpuop_func op_80e0_54_ff; +extern cpuop_func op_80e8_54_nf; +extern cpuop_func op_80e8_54_ff; +extern cpuop_func op_80f0_54_nf; +extern cpuop_func op_80f0_54_ff; +extern cpuop_func op_80f8_54_nf; +extern cpuop_func op_80f8_54_ff; +extern cpuop_func op_80f9_54_nf; +extern cpuop_func op_80f9_54_ff; +extern cpuop_func op_80fa_54_nf; +extern cpuop_func op_80fa_54_ff; +extern cpuop_func op_80fb_54_nf; +extern cpuop_func op_80fb_54_ff; +extern cpuop_func op_80fc_54_nf; +extern cpuop_func op_80fc_54_ff; +extern cpuop_func op_8100_54_nf; +extern cpuop_func op_8100_54_ff; +extern cpuop_func op_8108_54_nf; +extern cpuop_func op_8108_54_ff; +extern cpuop_func op_8130_54_nf; +extern cpuop_func op_8130_54_ff; +extern cpuop_func op_8170_54_nf; +extern cpuop_func op_8170_54_ff; +extern cpuop_func op_81b0_54_nf; +extern cpuop_func op_81b0_54_ff; +extern cpuop_func op_81c0_54_nf; +extern cpuop_func op_81c0_54_ff; +extern cpuop_func op_81d0_54_nf; +extern cpuop_func op_81d0_54_ff; +extern cpuop_func op_81d8_54_nf; +extern cpuop_func op_81d8_54_ff; +extern cpuop_func op_81e0_54_nf; +extern cpuop_func op_81e0_54_ff; +extern cpuop_func op_81e8_54_nf; +extern cpuop_func op_81e8_54_ff; +extern cpuop_func op_81f0_54_nf; +extern cpuop_func op_81f0_54_ff; +extern cpuop_func op_81f8_54_nf; +extern cpuop_func op_81f8_54_ff; +extern cpuop_func op_81f9_54_nf; +extern cpuop_func op_81f9_54_ff; +extern cpuop_func op_81fa_54_nf; +extern cpuop_func op_81fa_54_ff; +extern cpuop_func op_81fb_54_nf; +extern cpuop_func op_81fb_54_ff; +extern cpuop_func op_81fc_54_nf; +extern cpuop_func op_81fc_54_ff; +extern cpuop_func op_9030_54_nf; +extern cpuop_func op_9030_54_ff; +extern cpuop_func op_903b_54_nf; +extern cpuop_func op_903b_54_ff; +extern cpuop_func op_9070_54_nf; +extern cpuop_func op_9070_54_ff; +extern cpuop_func op_907b_54_nf; +extern cpuop_func op_907b_54_ff; +extern cpuop_func op_90b0_54_nf; +extern cpuop_func op_90b0_54_ff; +extern cpuop_func op_90bb_54_nf; +extern cpuop_func op_90bb_54_ff; +extern cpuop_func op_90f0_54_nf; +extern cpuop_func op_90f0_54_ff; +extern cpuop_func op_90fb_54_nf; +extern cpuop_func op_90fb_54_ff; +extern cpuop_func op_9130_54_nf; +extern cpuop_func op_9130_54_ff; +extern cpuop_func op_9170_54_nf; +extern cpuop_func op_9170_54_ff; +extern cpuop_func op_91b0_54_nf; +extern cpuop_func op_91b0_54_ff; +extern cpuop_func op_91f0_54_nf; +extern cpuop_func op_91f0_54_ff; +extern cpuop_func op_91fb_54_nf; +extern cpuop_func op_91fb_54_ff; +extern cpuop_func op_b030_54_nf; +extern cpuop_func op_b030_54_ff; +extern cpuop_func op_b03b_54_nf; +extern cpuop_func op_b03b_54_ff; +extern cpuop_func op_b070_54_nf; +extern cpuop_func op_b070_54_ff; +extern cpuop_func op_b07b_54_nf; +extern cpuop_func op_b07b_54_ff; +extern cpuop_func op_b0b0_54_nf; +extern cpuop_func op_b0b0_54_ff; +extern cpuop_func op_b0bb_54_nf; +extern cpuop_func op_b0bb_54_ff; +extern cpuop_func op_b0f0_54_nf; +extern cpuop_func op_b0f0_54_ff; +extern cpuop_func op_b0fb_54_nf; +extern cpuop_func op_b0fb_54_ff; +extern cpuop_func op_b130_54_nf; +extern cpuop_func op_b130_54_ff; +extern cpuop_func op_b170_54_nf; +extern cpuop_func op_b170_54_ff; +extern cpuop_func op_b1b0_54_nf; +extern cpuop_func op_b1b0_54_ff; +extern cpuop_func op_b1f0_54_nf; +extern cpuop_func op_b1f0_54_ff; +extern cpuop_func op_b1fb_54_nf; +extern cpuop_func op_b1fb_54_ff; +extern cpuop_func op_c030_54_nf; +extern cpuop_func op_c030_54_ff; +extern cpuop_func op_c03b_54_nf; +extern cpuop_func op_c03b_54_ff; +extern cpuop_func op_c070_54_nf; +extern cpuop_func op_c070_54_ff; +extern cpuop_func op_c07b_54_nf; +extern cpuop_func op_c07b_54_ff; +extern cpuop_func op_c0b0_54_nf; +extern cpuop_func op_c0b0_54_ff; +extern cpuop_func op_c0bb_54_nf; +extern cpuop_func op_c0bb_54_ff; +extern cpuop_func op_c0c0_54_nf; +extern cpuop_func op_c0c0_54_ff; +extern cpuop_func op_c0d0_54_nf; +extern cpuop_func op_c0d0_54_ff; +extern cpuop_func op_c0d8_54_nf; +extern cpuop_func op_c0d8_54_ff; +extern cpuop_func op_c0e0_54_nf; +extern cpuop_func op_c0e0_54_ff; +extern cpuop_func op_c0e8_54_nf; +extern cpuop_func op_c0e8_54_ff; +extern cpuop_func op_c0f0_54_nf; +extern cpuop_func op_c0f0_54_ff; +extern cpuop_func op_c0f8_54_nf; +extern cpuop_func op_c0f8_54_ff; +extern cpuop_func op_c0f9_54_nf; +extern cpuop_func op_c0f9_54_ff; +extern cpuop_func op_c0fa_54_nf; +extern cpuop_func op_c0fa_54_ff; +extern cpuop_func op_c0fb_54_nf; +extern cpuop_func op_c0fb_54_ff; +extern cpuop_func op_c0fc_54_nf; +extern cpuop_func op_c0fc_54_ff; +extern cpuop_func op_c100_54_nf; +extern cpuop_func op_c100_54_ff; +extern cpuop_func op_c108_54_nf; +extern cpuop_func op_c108_54_ff; +extern cpuop_func op_c130_54_nf; +extern cpuop_func op_c130_54_ff; +extern cpuop_func op_c170_54_nf; +extern cpuop_func op_c170_54_ff; +extern cpuop_func op_c1b0_54_nf; +extern cpuop_func op_c1b0_54_ff; +extern cpuop_func op_c1c0_54_nf; +extern cpuop_func op_c1c0_54_ff; +extern cpuop_func op_c1d0_54_nf; +extern cpuop_func op_c1d0_54_ff; +extern cpuop_func op_c1d8_54_nf; +extern cpuop_func op_c1d8_54_ff; +extern cpuop_func op_c1e0_54_nf; +extern cpuop_func op_c1e0_54_ff; +extern cpuop_func op_c1e8_54_nf; +extern cpuop_func op_c1e8_54_ff; +extern cpuop_func op_c1f0_54_nf; +extern cpuop_func op_c1f0_54_ff; +extern cpuop_func op_c1f8_54_nf; +extern cpuop_func op_c1f8_54_ff; +extern cpuop_func op_c1f9_54_nf; +extern cpuop_func op_c1f9_54_ff; +extern cpuop_func op_c1fa_54_nf; +extern cpuop_func op_c1fa_54_ff; +extern cpuop_func op_c1fb_54_nf; +extern cpuop_func op_c1fb_54_ff; +extern cpuop_func op_c1fc_54_nf; +extern cpuop_func op_c1fc_54_ff; +extern cpuop_func op_d030_54_nf; +extern cpuop_func op_d030_54_ff; +extern cpuop_func op_d03b_54_nf; +extern cpuop_func op_d03b_54_ff; +extern cpuop_func op_d070_54_nf; +extern cpuop_func op_d070_54_ff; +extern cpuop_func op_d07b_54_nf; +extern cpuop_func op_d07b_54_ff; +extern cpuop_func op_d0b0_54_nf; +extern cpuop_func op_d0b0_54_ff; +extern cpuop_func op_d0bb_54_nf; +extern cpuop_func op_d0bb_54_ff; +extern cpuop_func op_d0f0_54_nf; +extern cpuop_func op_d0f0_54_ff; +extern cpuop_func op_d0fb_54_nf; +extern cpuop_func op_d0fb_54_ff; +extern cpuop_func op_d130_54_nf; +extern cpuop_func op_d130_54_ff; +extern cpuop_func op_d170_54_nf; +extern cpuop_func op_d170_54_ff; +extern cpuop_func op_d1b0_54_nf; +extern cpuop_func op_d1b0_54_ff; +extern cpuop_func op_d1f0_54_nf; +extern cpuop_func op_d1f0_54_ff; +extern cpuop_func op_d1fb_54_nf; +extern cpuop_func op_d1fb_54_ff; +extern cpuop_func op_e000_54_nf; +extern cpuop_func op_e000_54_ff; +extern cpuop_func op_e008_54_nf; +extern cpuop_func op_e008_54_ff; +extern cpuop_func op_e010_54_nf; +extern cpuop_func op_e010_54_ff; +extern cpuop_func op_e018_54_nf; +extern cpuop_func op_e018_54_ff; +extern cpuop_func op_e020_54_nf; +extern cpuop_func op_e020_54_ff; +extern cpuop_func op_e028_54_nf; +extern cpuop_func op_e028_54_ff; +extern cpuop_func op_e030_54_nf; +extern cpuop_func op_e030_54_ff; +extern cpuop_func op_e038_54_nf; +extern cpuop_func op_e038_54_ff; +extern cpuop_func op_e040_54_nf; +extern cpuop_func op_e040_54_ff; +extern cpuop_func op_e048_54_nf; +extern cpuop_func op_e048_54_ff; +extern cpuop_func op_e050_54_nf; +extern cpuop_func op_e050_54_ff; +extern cpuop_func op_e058_54_nf; +extern cpuop_func op_e058_54_ff; +extern cpuop_func op_e060_54_nf; +extern cpuop_func op_e060_54_ff; +extern cpuop_func op_e068_54_nf; +extern cpuop_func op_e068_54_ff; +extern cpuop_func op_e070_54_nf; +extern cpuop_func op_e070_54_ff; +extern cpuop_func op_e078_54_nf; +extern cpuop_func op_e078_54_ff; +extern cpuop_func op_e080_54_nf; +extern cpuop_func op_e080_54_ff; +extern cpuop_func op_e088_54_nf; +extern cpuop_func op_e088_54_ff; +extern cpuop_func op_e090_54_nf; +extern cpuop_func op_e090_54_ff; +extern cpuop_func op_e098_54_nf; +extern cpuop_func op_e098_54_ff; +extern cpuop_func op_e0a0_54_nf; +extern cpuop_func op_e0a0_54_ff; +extern cpuop_func op_e0a8_54_nf; +extern cpuop_func op_e0a8_54_ff; +extern cpuop_func op_e0b0_54_nf; +extern cpuop_func op_e0b0_54_ff; +extern cpuop_func op_e0b8_54_nf; +extern cpuop_func op_e0b8_54_ff; +extern cpuop_func op_e0f0_54_nf; +extern cpuop_func op_e0f0_54_ff; +extern cpuop_func op_e100_54_nf; +extern cpuop_func op_e100_54_ff; +extern cpuop_func op_e108_54_nf; +extern cpuop_func op_e108_54_ff; +extern cpuop_func op_e110_54_nf; +extern cpuop_func op_e110_54_ff; +extern cpuop_func op_e118_54_nf; +extern cpuop_func op_e118_54_ff; +extern cpuop_func op_e120_54_nf; +extern cpuop_func op_e120_54_ff; +extern cpuop_func op_e128_54_nf; +extern cpuop_func op_e128_54_ff; +extern cpuop_func op_e130_54_nf; +extern cpuop_func op_e130_54_ff; +extern cpuop_func op_e138_54_nf; +extern cpuop_func op_e138_54_ff; +extern cpuop_func op_e140_54_nf; +extern cpuop_func op_e140_54_ff; +extern cpuop_func op_e148_54_nf; +extern cpuop_func op_e148_54_ff; +extern cpuop_func op_e150_54_nf; +extern cpuop_func op_e150_54_ff; +extern cpuop_func op_e158_54_nf; +extern cpuop_func op_e158_54_ff; +extern cpuop_func op_e160_54_nf; +extern cpuop_func op_e160_54_ff; +extern cpuop_func op_e168_54_nf; +extern cpuop_func op_e168_54_ff; +extern cpuop_func op_e170_54_nf; +extern cpuop_func op_e170_54_ff; +extern cpuop_func op_e178_54_nf; +extern cpuop_func op_e178_54_ff; +extern cpuop_func op_e180_54_nf; +extern cpuop_func op_e180_54_ff; +extern cpuop_func op_e188_54_nf; +extern cpuop_func op_e188_54_ff; +extern cpuop_func op_e190_54_nf; +extern cpuop_func op_e190_54_ff; +extern cpuop_func op_e198_54_nf; +extern cpuop_func op_e198_54_ff; +extern cpuop_func op_e1a0_54_nf; +extern cpuop_func op_e1a0_54_ff; +extern cpuop_func op_e1a8_54_nf; +extern cpuop_func op_e1a8_54_ff; +extern cpuop_func op_e1b0_54_nf; +extern cpuop_func op_e1b0_54_ff; +extern cpuop_func op_e1b8_54_nf; +extern cpuop_func op_e1b8_54_ff; +extern cpuop_func op_e1f0_54_nf; +extern cpuop_func op_e1f0_54_ff; +extern cpuop_func op_e2f0_54_nf; +extern cpuop_func op_e2f0_54_ff; +extern cpuop_func op_e3f0_54_nf; +extern cpuop_func op_e3f0_54_ff; +extern cpuop_func op_e4f0_54_nf; +extern cpuop_func op_e4f0_54_ff; +extern cpuop_func op_e5f0_54_nf; +extern cpuop_func op_e5f0_54_ff; +extern cpuop_func op_e6f0_54_nf; +extern cpuop_func op_e6f0_54_ff; +extern cpuop_func op_e7f0_54_nf; +extern cpuop_func op_e7f0_54_ff; +extern cpuop_func op_003c_55_nf; +extern cpuop_func op_003c_55_ff; +extern cpuop_func op_007c_55_nf; +extern cpuop_func op_007c_55_ff; +extern cpuop_func op_0080_55_nf; +extern cpuop_func op_0080_55_ff; +extern cpuop_func op_0108_55_nf; +extern cpuop_func op_0108_55_ff; +extern cpuop_func op_0148_55_nf; +extern cpuop_func op_0148_55_ff; +extern cpuop_func op_0188_55_nf; +extern cpuop_func op_0188_55_ff; +extern cpuop_func op_0190_55_nf; +extern cpuop_func op_0190_55_ff; +extern cpuop_func op_0198_55_nf; +extern cpuop_func op_0198_55_ff; +extern cpuop_func op_01a0_55_nf; +extern cpuop_func op_01a0_55_ff; +extern cpuop_func op_01a8_55_nf; +extern cpuop_func op_01a8_55_ff; +extern cpuop_func op_01b0_55_nf; +extern cpuop_func op_01b0_55_ff; +extern cpuop_func op_01b8_55_nf; +extern cpuop_func op_01b8_55_ff; +extern cpuop_func op_01b9_55_nf; +extern cpuop_func op_01b9_55_ff; +extern cpuop_func op_01c8_55_nf; +extern cpuop_func op_01c8_55_ff; +extern cpuop_func op_023c_55_nf; +extern cpuop_func op_023c_55_ff; +extern cpuop_func op_027c_55_nf; +extern cpuop_func op_027c_55_ff; +extern cpuop_func op_0280_55_nf; +extern cpuop_func op_0280_55_ff; +extern cpuop_func op_0480_55_nf; +extern cpuop_func op_0480_55_ff; +extern cpuop_func op_0680_55_nf; +extern cpuop_func op_0680_55_ff; +extern cpuop_func op_0890_55_nf; +extern cpuop_func op_0890_55_ff; +extern cpuop_func op_0898_55_nf; +extern cpuop_func op_0898_55_ff; +extern cpuop_func op_08a0_55_nf; +extern cpuop_func op_08a0_55_ff; +extern cpuop_func op_08a8_55_nf; +extern cpuop_func op_08a8_55_ff; +extern cpuop_func op_08b0_55_nf; +extern cpuop_func op_08b0_55_ff; +extern cpuop_func op_08b8_55_nf; +extern cpuop_func op_08b8_55_ff; +extern cpuop_func op_08b9_55_nf; +extern cpuop_func op_08b9_55_ff; +extern cpuop_func op_0a3c_55_nf; +extern cpuop_func op_0a3c_55_ff; +extern cpuop_func op_0a7c_55_nf; +extern cpuop_func op_0a7c_55_ff; +extern cpuop_func op_0a80_55_nf; +extern cpuop_func op_0a80_55_ff; +extern cpuop_func op_40c0_55_nf; +extern cpuop_func op_40c0_55_ff; +extern cpuop_func op_40d0_55_nf; +extern cpuop_func op_40d0_55_ff; +extern cpuop_func op_40d8_55_nf; +extern cpuop_func op_40d8_55_ff; +extern cpuop_func op_40e0_55_nf; +extern cpuop_func op_40e0_55_ff; +extern cpuop_func op_40e8_55_nf; +extern cpuop_func op_40e8_55_ff; +extern cpuop_func op_40f0_55_nf; +extern cpuop_func op_40f0_55_ff; +extern cpuop_func op_40f8_55_nf; +extern cpuop_func op_40f8_55_ff; +extern cpuop_func op_40f9_55_nf; +extern cpuop_func op_40f9_55_ff; +extern cpuop_func op_41f9_55_nf; +extern cpuop_func op_41f9_55_ff; +extern cpuop_func op_4200_55_nf; +extern cpuop_func op_4200_55_ff; +extern cpuop_func op_4210_55_nf; +extern cpuop_func op_4210_55_ff; +extern cpuop_func op_4218_55_nf; +extern cpuop_func op_4218_55_ff; +extern cpuop_func op_4220_55_nf; +extern cpuop_func op_4220_55_ff; +extern cpuop_func op_4228_55_nf; +extern cpuop_func op_4228_55_ff; +extern cpuop_func op_4230_55_nf; +extern cpuop_func op_4230_55_ff; +extern cpuop_func op_4238_55_nf; +extern cpuop_func op_4238_55_ff; +extern cpuop_func op_4239_55_nf; +extern cpuop_func op_4239_55_ff; +extern cpuop_func op_4240_55_nf; +extern cpuop_func op_4240_55_ff; +extern cpuop_func op_4250_55_nf; +extern cpuop_func op_4250_55_ff; +extern cpuop_func op_4258_55_nf; +extern cpuop_func op_4258_55_ff; +extern cpuop_func op_4260_55_nf; +extern cpuop_func op_4260_55_ff; +extern cpuop_func op_4268_55_nf; +extern cpuop_func op_4268_55_ff; +extern cpuop_func op_4270_55_nf; +extern cpuop_func op_4270_55_ff; +extern cpuop_func op_4278_55_nf; +extern cpuop_func op_4278_55_ff; +extern cpuop_func op_4279_55_nf; +extern cpuop_func op_4279_55_ff; +extern cpuop_func op_4280_55_nf; +extern cpuop_func op_4280_55_ff; +extern cpuop_func op_4290_55_nf; +extern cpuop_func op_4290_55_ff; +extern cpuop_func op_4298_55_nf; +extern cpuop_func op_4298_55_ff; +extern cpuop_func op_42a0_55_nf; +extern cpuop_func op_42a0_55_ff; +extern cpuop_func op_42a8_55_nf; +extern cpuop_func op_42a8_55_ff; +extern cpuop_func op_42b0_55_nf; +extern cpuop_func op_42b0_55_ff; +extern cpuop_func op_42b8_55_nf; +extern cpuop_func op_42b8_55_ff; +extern cpuop_func op_42b9_55_nf; +extern cpuop_func op_42b9_55_ff; +extern cpuop_func op_44c0_55_nf; +extern cpuop_func op_44c0_55_ff; +extern cpuop_func op_44d0_55_nf; +extern cpuop_func op_44d0_55_ff; +extern cpuop_func op_44d8_55_nf; +extern cpuop_func op_44d8_55_ff; +extern cpuop_func op_44e0_55_nf; +extern cpuop_func op_44e0_55_ff; +extern cpuop_func op_44e8_55_nf; +extern cpuop_func op_44e8_55_ff; +extern cpuop_func op_44f0_55_nf; +extern cpuop_func op_44f0_55_ff; +extern cpuop_func op_44f8_55_nf; +extern cpuop_func op_44f8_55_ff; +extern cpuop_func op_44f9_55_nf; +extern cpuop_func op_44f9_55_ff; +extern cpuop_func op_44fa_55_nf; +extern cpuop_func op_44fa_55_ff; +extern cpuop_func op_44fb_55_nf; +extern cpuop_func op_44fb_55_ff; +extern cpuop_func op_44fc_55_nf; +extern cpuop_func op_44fc_55_ff; +extern cpuop_func op_46c0_55_nf; +extern cpuop_func op_46c0_55_ff; +extern cpuop_func op_46d0_55_nf; +extern cpuop_func op_46d0_55_ff; +extern cpuop_func op_46d8_55_nf; +extern cpuop_func op_46d8_55_ff; +extern cpuop_func op_46e0_55_nf; +extern cpuop_func op_46e0_55_ff; +extern cpuop_func op_46e8_55_nf; +extern cpuop_func op_46e8_55_ff; +extern cpuop_func op_46f0_55_nf; +extern cpuop_func op_46f0_55_ff; +extern cpuop_func op_46f8_55_nf; +extern cpuop_func op_46f8_55_ff; +extern cpuop_func op_46f9_55_nf; +extern cpuop_func op_46f9_55_ff; +extern cpuop_func op_46fa_55_nf; +extern cpuop_func op_46fa_55_ff; +extern cpuop_func op_46fb_55_nf; +extern cpuop_func op_46fb_55_ff; +extern cpuop_func op_46fc_55_nf; +extern cpuop_func op_46fc_55_ff; +extern cpuop_func op_4ac0_55_nf; +extern cpuop_func op_4ac0_55_ff; +extern cpuop_func op_4ad0_55_nf; +extern cpuop_func op_4ad0_55_ff; +extern cpuop_func op_4ad8_55_nf; +extern cpuop_func op_4ad8_55_ff; +extern cpuop_func op_4ae0_55_nf; +extern cpuop_func op_4ae0_55_ff; +extern cpuop_func op_4ae8_55_nf; +extern cpuop_func op_4ae8_55_ff; +extern cpuop_func op_4af0_55_nf; +extern cpuop_func op_4af0_55_ff; +extern cpuop_func op_4af8_55_nf; +extern cpuop_func op_4af8_55_ff; +extern cpuop_func op_4af9_55_nf; +extern cpuop_func op_4af9_55_ff; +extern cpuop_func op_4e60_55_nf; +extern cpuop_func op_4e60_55_ff; +extern cpuop_func op_4e68_55_nf; +extern cpuop_func op_4e68_55_ff; +extern cpuop_func op_4e72_55_nf; +extern cpuop_func op_4e72_55_ff; +extern cpuop_func op_4e73_55_nf; +extern cpuop_func op_4e73_55_ff; +extern cpuop_func op_4e75_55_nf; +extern cpuop_func op_4e75_55_ff; +extern cpuop_func op_4e76_55_nf; +extern cpuop_func op_4e76_55_ff; +extern cpuop_func op_4e77_55_nf; +extern cpuop_func op_4e77_55_ff; +extern cpuop_func op_4e90_55_nf; +extern cpuop_func op_4e90_55_ff; +extern cpuop_func op_4ea8_55_nf; +extern cpuop_func op_4ea8_55_ff; +extern cpuop_func op_4eb0_55_nf; +extern cpuop_func op_4eb0_55_ff; +extern cpuop_func op_4eb8_55_nf; +extern cpuop_func op_4eb8_55_ff; +extern cpuop_func op_4eb9_55_nf; +extern cpuop_func op_4eb9_55_ff; +extern cpuop_func op_4eba_55_nf; +extern cpuop_func op_4eba_55_ff; +extern cpuop_func op_4ebb_55_nf; +extern cpuop_func op_4ebb_55_ff; +extern cpuop_func op_4ed0_55_nf; +extern cpuop_func op_4ed0_55_ff; +extern cpuop_func op_4ee8_55_nf; +extern cpuop_func op_4ee8_55_ff; +extern cpuop_func op_4ef0_55_nf; +extern cpuop_func op_4ef0_55_ff; +extern cpuop_func op_4ef8_55_nf; +extern cpuop_func op_4ef8_55_ff; +extern cpuop_func op_4ef9_55_nf; +extern cpuop_func op_4ef9_55_ff; +extern cpuop_func op_4efa_55_nf; +extern cpuop_func op_4efa_55_ff; +extern cpuop_func op_4efb_55_nf; +extern cpuop_func op_4efb_55_ff; +extern cpuop_func op_5080_55_nf; +extern cpuop_func op_5080_55_ff; +extern cpuop_func op_50c0_55_nf; +extern cpuop_func op_50c0_55_ff; +extern cpuop_func op_50c8_55_nf; +extern cpuop_func op_50c8_55_ff; +extern cpuop_func op_50d0_55_nf; +extern cpuop_func op_50d0_55_ff; +extern cpuop_func op_50d8_55_nf; +extern cpuop_func op_50d8_55_ff; +extern cpuop_func op_50e0_55_nf; +extern cpuop_func op_50e0_55_ff; +extern cpuop_func op_50e8_55_nf; +extern cpuop_func op_50e8_55_ff; +extern cpuop_func op_50f0_55_nf; +extern cpuop_func op_50f0_55_ff; +extern cpuop_func op_50f8_55_nf; +extern cpuop_func op_50f8_55_ff; +extern cpuop_func op_50f9_55_nf; +extern cpuop_func op_50f9_55_ff; +extern cpuop_func op_5180_55_nf; +extern cpuop_func op_5180_55_ff; +extern cpuop_func op_51c0_55_nf; +extern cpuop_func op_51c0_55_ff; +extern cpuop_func op_51c8_55_nf; +extern cpuop_func op_51c8_55_ff; +extern cpuop_func op_51d0_55_nf; +extern cpuop_func op_51d0_55_ff; +extern cpuop_func op_51d8_55_nf; +extern cpuop_func op_51d8_55_ff; +extern cpuop_func op_51e0_55_nf; +extern cpuop_func op_51e0_55_ff; +extern cpuop_func op_51e8_55_nf; +extern cpuop_func op_51e8_55_ff; +extern cpuop_func op_51f0_55_nf; +extern cpuop_func op_51f0_55_ff; +extern cpuop_func op_51f8_55_nf; +extern cpuop_func op_51f8_55_ff; +extern cpuop_func op_51f9_55_nf; +extern cpuop_func op_51f9_55_ff; +extern cpuop_func op_52c0_55_nf; +extern cpuop_func op_52c0_55_ff; +extern cpuop_func op_52c8_55_nf; +extern cpuop_func op_52c8_55_ff; +extern cpuop_func op_52d0_55_nf; +extern cpuop_func op_52d0_55_ff; +extern cpuop_func op_52d8_55_nf; +extern cpuop_func op_52d8_55_ff; +extern cpuop_func op_52e0_55_nf; +extern cpuop_func op_52e0_55_ff; +extern cpuop_func op_52e8_55_nf; +extern cpuop_func op_52e8_55_ff; +extern cpuop_func op_52f0_55_nf; +extern cpuop_func op_52f0_55_ff; +extern cpuop_func op_52f8_55_nf; +extern cpuop_func op_52f8_55_ff; +extern cpuop_func op_52f9_55_nf; +extern cpuop_func op_52f9_55_ff; +extern cpuop_func op_53c0_55_nf; +extern cpuop_func op_53c0_55_ff; +extern cpuop_func op_53c8_55_nf; +extern cpuop_func op_53c8_55_ff; +extern cpuop_func op_53d0_55_nf; +extern cpuop_func op_53d0_55_ff; +extern cpuop_func op_53d8_55_nf; +extern cpuop_func op_53d8_55_ff; +extern cpuop_func op_53e0_55_nf; +extern cpuop_func op_53e0_55_ff; +extern cpuop_func op_53e8_55_nf; +extern cpuop_func op_53e8_55_ff; +extern cpuop_func op_53f0_55_nf; +extern cpuop_func op_53f0_55_ff; +extern cpuop_func op_53f8_55_nf; +extern cpuop_func op_53f8_55_ff; +extern cpuop_func op_53f9_55_nf; +extern cpuop_func op_53f9_55_ff; +extern cpuop_func op_54c0_55_nf; +extern cpuop_func op_54c0_55_ff; +extern cpuop_func op_54c8_55_nf; +extern cpuop_func op_54c8_55_ff; +extern cpuop_func op_54d0_55_nf; +extern cpuop_func op_54d0_55_ff; +extern cpuop_func op_54d8_55_nf; +extern cpuop_func op_54d8_55_ff; +extern cpuop_func op_54e0_55_nf; +extern cpuop_func op_54e0_55_ff; +extern cpuop_func op_54e8_55_nf; +extern cpuop_func op_54e8_55_ff; +extern cpuop_func op_54f0_55_nf; +extern cpuop_func op_54f0_55_ff; +extern cpuop_func op_54f8_55_nf; +extern cpuop_func op_54f8_55_ff; +extern cpuop_func op_54f9_55_nf; +extern cpuop_func op_54f9_55_ff; +extern cpuop_func op_55c0_55_nf; +extern cpuop_func op_55c0_55_ff; +extern cpuop_func op_55c8_55_nf; +extern cpuop_func op_55c8_55_ff; +extern cpuop_func op_55d0_55_nf; +extern cpuop_func op_55d0_55_ff; +extern cpuop_func op_55d8_55_nf; +extern cpuop_func op_55d8_55_ff; +extern cpuop_func op_55e0_55_nf; +extern cpuop_func op_55e0_55_ff; +extern cpuop_func op_55e8_55_nf; +extern cpuop_func op_55e8_55_ff; +extern cpuop_func op_55f0_55_nf; +extern cpuop_func op_55f0_55_ff; +extern cpuop_func op_55f8_55_nf; +extern cpuop_func op_55f8_55_ff; +extern cpuop_func op_55f9_55_nf; +extern cpuop_func op_55f9_55_ff; +extern cpuop_func op_56c0_55_nf; +extern cpuop_func op_56c0_55_ff; +extern cpuop_func op_56c8_55_nf; +extern cpuop_func op_56c8_55_ff; +extern cpuop_func op_56d0_55_nf; +extern cpuop_func op_56d0_55_ff; +extern cpuop_func op_56d8_55_nf; +extern cpuop_func op_56d8_55_ff; +extern cpuop_func op_56e0_55_nf; +extern cpuop_func op_56e0_55_ff; +extern cpuop_func op_56e8_55_nf; +extern cpuop_func op_56e8_55_ff; +extern cpuop_func op_56f0_55_nf; +extern cpuop_func op_56f0_55_ff; +extern cpuop_func op_56f8_55_nf; +extern cpuop_func op_56f8_55_ff; +extern cpuop_func op_56f9_55_nf; +extern cpuop_func op_56f9_55_ff; +extern cpuop_func op_57c0_55_nf; +extern cpuop_func op_57c0_55_ff; +extern cpuop_func op_57c8_55_nf; +extern cpuop_func op_57c8_55_ff; +extern cpuop_func op_57d0_55_nf; +extern cpuop_func op_57d0_55_ff; +extern cpuop_func op_57d8_55_nf; +extern cpuop_func op_57d8_55_ff; +extern cpuop_func op_57e0_55_nf; +extern cpuop_func op_57e0_55_ff; +extern cpuop_func op_57e8_55_nf; +extern cpuop_func op_57e8_55_ff; +extern cpuop_func op_57f0_55_nf; +extern cpuop_func op_57f0_55_ff; +extern cpuop_func op_57f8_55_nf; +extern cpuop_func op_57f8_55_ff; +extern cpuop_func op_57f9_55_nf; +extern cpuop_func op_57f9_55_ff; +extern cpuop_func op_58c0_55_nf; +extern cpuop_func op_58c0_55_ff; +extern cpuop_func op_58c8_55_nf; +extern cpuop_func op_58c8_55_ff; +extern cpuop_func op_58d0_55_nf; +extern cpuop_func op_58d0_55_ff; +extern cpuop_func op_58d8_55_nf; +extern cpuop_func op_58d8_55_ff; +extern cpuop_func op_58e0_55_nf; +extern cpuop_func op_58e0_55_ff; +extern cpuop_func op_58e8_55_nf; +extern cpuop_func op_58e8_55_ff; +extern cpuop_func op_58f0_55_nf; +extern cpuop_func op_58f0_55_ff; +extern cpuop_func op_58f8_55_nf; +extern cpuop_func op_58f8_55_ff; +extern cpuop_func op_58f9_55_nf; +extern cpuop_func op_58f9_55_ff; +extern cpuop_func op_59c0_55_nf; +extern cpuop_func op_59c0_55_ff; +extern cpuop_func op_59c8_55_nf; +extern cpuop_func op_59c8_55_ff; +extern cpuop_func op_59d0_55_nf; +extern cpuop_func op_59d0_55_ff; +extern cpuop_func op_59d8_55_nf; +extern cpuop_func op_59d8_55_ff; +extern cpuop_func op_59e0_55_nf; +extern cpuop_func op_59e0_55_ff; +extern cpuop_func op_59e8_55_nf; +extern cpuop_func op_59e8_55_ff; +extern cpuop_func op_59f0_55_nf; +extern cpuop_func op_59f0_55_ff; +extern cpuop_func op_59f8_55_nf; +extern cpuop_func op_59f8_55_ff; +extern cpuop_func op_59f9_55_nf; +extern cpuop_func op_59f9_55_ff; +extern cpuop_func op_5ac0_55_nf; +extern cpuop_func op_5ac0_55_ff; +extern cpuop_func op_5ac8_55_nf; +extern cpuop_func op_5ac8_55_ff; +extern cpuop_func op_5ad0_55_nf; +extern cpuop_func op_5ad0_55_ff; +extern cpuop_func op_5ad8_55_nf; +extern cpuop_func op_5ad8_55_ff; +extern cpuop_func op_5ae0_55_nf; +extern cpuop_func op_5ae0_55_ff; +extern cpuop_func op_5ae8_55_nf; +extern cpuop_func op_5ae8_55_ff; +extern cpuop_func op_5af0_55_nf; +extern cpuop_func op_5af0_55_ff; +extern cpuop_func op_5af8_55_nf; +extern cpuop_func op_5af8_55_ff; +extern cpuop_func op_5af9_55_nf; +extern cpuop_func op_5af9_55_ff; +extern cpuop_func op_5bc0_55_nf; +extern cpuop_func op_5bc0_55_ff; +extern cpuop_func op_5bc8_55_nf; +extern cpuop_func op_5bc8_55_ff; +extern cpuop_func op_5bd0_55_nf; +extern cpuop_func op_5bd0_55_ff; +extern cpuop_func op_5bd8_55_nf; +extern cpuop_func op_5bd8_55_ff; +extern cpuop_func op_5be0_55_nf; +extern cpuop_func op_5be0_55_ff; +extern cpuop_func op_5be8_55_nf; +extern cpuop_func op_5be8_55_ff; +extern cpuop_func op_5bf0_55_nf; +extern cpuop_func op_5bf0_55_ff; +extern cpuop_func op_5bf8_55_nf; +extern cpuop_func op_5bf8_55_ff; +extern cpuop_func op_5bf9_55_nf; +extern cpuop_func op_5bf9_55_ff; +extern cpuop_func op_5cc0_55_nf; +extern cpuop_func op_5cc0_55_ff; +extern cpuop_func op_5cc8_55_nf; +extern cpuop_func op_5cc8_55_ff; +extern cpuop_func op_5cd0_55_nf; +extern cpuop_func op_5cd0_55_ff; +extern cpuop_func op_5cd8_55_nf; +extern cpuop_func op_5cd8_55_ff; +extern cpuop_func op_5ce0_55_nf; +extern cpuop_func op_5ce0_55_ff; +extern cpuop_func op_5ce8_55_nf; +extern cpuop_func op_5ce8_55_ff; +extern cpuop_func op_5cf0_55_nf; +extern cpuop_func op_5cf0_55_ff; +extern cpuop_func op_5cf8_55_nf; +extern cpuop_func op_5cf8_55_ff; +extern cpuop_func op_5cf9_55_nf; +extern cpuop_func op_5cf9_55_ff; +extern cpuop_func op_5dc0_55_nf; +extern cpuop_func op_5dc0_55_ff; +extern cpuop_func op_5dc8_55_nf; +extern cpuop_func op_5dc8_55_ff; +extern cpuop_func op_5dd0_55_nf; +extern cpuop_func op_5dd0_55_ff; +extern cpuop_func op_5dd8_55_nf; +extern cpuop_func op_5dd8_55_ff; +extern cpuop_func op_5de0_55_nf; +extern cpuop_func op_5de0_55_ff; +extern cpuop_func op_5de8_55_nf; +extern cpuop_func op_5de8_55_ff; +extern cpuop_func op_5df0_55_nf; +extern cpuop_func op_5df0_55_ff; +extern cpuop_func op_5df8_55_nf; +extern cpuop_func op_5df8_55_ff; +extern cpuop_func op_5df9_55_nf; +extern cpuop_func op_5df9_55_ff; +extern cpuop_func op_5ec0_55_nf; +extern cpuop_func op_5ec0_55_ff; +extern cpuop_func op_5ec8_55_nf; +extern cpuop_func op_5ec8_55_ff; +extern cpuop_func op_5ed0_55_nf; +extern cpuop_func op_5ed0_55_ff; +extern cpuop_func op_5ed8_55_nf; +extern cpuop_func op_5ed8_55_ff; +extern cpuop_func op_5ee0_55_nf; +extern cpuop_func op_5ee0_55_ff; +extern cpuop_func op_5ee8_55_nf; +extern cpuop_func op_5ee8_55_ff; +extern cpuop_func op_5ef0_55_nf; +extern cpuop_func op_5ef0_55_ff; +extern cpuop_func op_5ef8_55_nf; +extern cpuop_func op_5ef8_55_ff; +extern cpuop_func op_5ef9_55_nf; +extern cpuop_func op_5ef9_55_ff; +extern cpuop_func op_5fc0_55_nf; +extern cpuop_func op_5fc0_55_ff; +extern cpuop_func op_5fc8_55_nf; +extern cpuop_func op_5fc8_55_ff; +extern cpuop_func op_5fd0_55_nf; +extern cpuop_func op_5fd0_55_ff; +extern cpuop_func op_5fd8_55_nf; +extern cpuop_func op_5fd8_55_ff; +extern cpuop_func op_5fe0_55_nf; +extern cpuop_func op_5fe0_55_ff; +extern cpuop_func op_5fe8_55_nf; +extern cpuop_func op_5fe8_55_ff; +extern cpuop_func op_5ff0_55_nf; +extern cpuop_func op_5ff0_55_ff; +extern cpuop_func op_5ff8_55_nf; +extern cpuop_func op_5ff8_55_ff; +extern cpuop_func op_5ff9_55_nf; +extern cpuop_func op_5ff9_55_ff; +extern cpuop_func op_6100_55_nf; +extern cpuop_func op_6100_55_ff; +extern cpuop_func op_6101_55_nf; +extern cpuop_func op_6101_55_ff; +extern cpuop_func op_61ff_55_nf; +extern cpuop_func op_61ff_55_ff; +extern cpuop_func op_8080_55_nf; +extern cpuop_func op_8080_55_ff; +extern cpuop_func op_8090_55_nf; +extern cpuop_func op_8090_55_ff; +extern cpuop_func op_8098_55_nf; +extern cpuop_func op_8098_55_ff; +extern cpuop_func op_80a0_55_nf; +extern cpuop_func op_80a0_55_ff; +extern cpuop_func op_80a8_55_nf; +extern cpuop_func op_80a8_55_ff; +extern cpuop_func op_80b0_55_nf; +extern cpuop_func op_80b0_55_ff; +extern cpuop_func op_80b8_55_nf; +extern cpuop_func op_80b8_55_ff; +extern cpuop_func op_80b9_55_nf; +extern cpuop_func op_80b9_55_ff; +extern cpuop_func op_80ba_55_nf; +extern cpuop_func op_80ba_55_ff; +extern cpuop_func op_80bb_55_nf; +extern cpuop_func op_80bb_55_ff; +extern cpuop_func op_80bc_55_nf; +extern cpuop_func op_80bc_55_ff; +extern cpuop_func op_9080_55_nf; +extern cpuop_func op_9080_55_ff; +extern cpuop_func op_9088_55_nf; +extern cpuop_func op_9088_55_ff; +extern cpuop_func op_9090_55_nf; +extern cpuop_func op_9090_55_ff; +extern cpuop_func op_9098_55_nf; +extern cpuop_func op_9098_55_ff; +extern cpuop_func op_90a0_55_nf; +extern cpuop_func op_90a0_55_ff; +extern cpuop_func op_90a8_55_nf; +extern cpuop_func op_90a8_55_ff; +extern cpuop_func op_90b0_55_nf; +extern cpuop_func op_90b0_55_ff; +extern cpuop_func op_90b8_55_nf; +extern cpuop_func op_90b8_55_ff; +extern cpuop_func op_90b9_55_nf; +extern cpuop_func op_90b9_55_ff; +extern cpuop_func op_90ba_55_nf; +extern cpuop_func op_90ba_55_ff; +extern cpuop_func op_90bb_55_nf; +extern cpuop_func op_90bb_55_ff; +extern cpuop_func op_90bc_55_nf; +extern cpuop_func op_90bc_55_ff; +extern cpuop_func op_9100_55_nf; +extern cpuop_func op_9100_55_ff; +extern cpuop_func op_9108_55_nf; +extern cpuop_func op_9108_55_ff; +extern cpuop_func op_9140_55_nf; +extern cpuop_func op_9140_55_ff; +extern cpuop_func op_9148_55_nf; +extern cpuop_func op_9148_55_ff; +extern cpuop_func op_9180_55_nf; +extern cpuop_func op_9180_55_ff; +extern cpuop_func op_9188_55_nf; +extern cpuop_func op_9188_55_ff; +extern cpuop_func op_b180_55_nf; +extern cpuop_func op_b180_55_ff; +extern cpuop_func op_c080_55_nf; +extern cpuop_func op_c080_55_ff; +extern cpuop_func op_c090_55_nf; +extern cpuop_func op_c090_55_ff; +extern cpuop_func op_c098_55_nf; +extern cpuop_func op_c098_55_ff; +extern cpuop_func op_c0a0_55_nf; +extern cpuop_func op_c0a0_55_ff; +extern cpuop_func op_c0a8_55_nf; +extern cpuop_func op_c0a8_55_ff; +extern cpuop_func op_c0b0_55_nf; +extern cpuop_func op_c0b0_55_ff; +extern cpuop_func op_c0b8_55_nf; +extern cpuop_func op_c0b8_55_ff; +extern cpuop_func op_c0b9_55_nf; +extern cpuop_func op_c0b9_55_ff; +extern cpuop_func op_c0ba_55_nf; +extern cpuop_func op_c0ba_55_ff; +extern cpuop_func op_c0bb_55_nf; +extern cpuop_func op_c0bb_55_ff; +extern cpuop_func op_c0bc_55_nf; +extern cpuop_func op_c0bc_55_ff; +extern cpuop_func op_d080_55_nf; +extern cpuop_func op_d080_55_ff; +extern cpuop_func op_d088_55_nf; +extern cpuop_func op_d088_55_ff; +extern cpuop_func op_d090_55_nf; +extern cpuop_func op_d090_55_ff; +extern cpuop_func op_d098_55_nf; +extern cpuop_func op_d098_55_ff; +extern cpuop_func op_d0a0_55_nf; +extern cpuop_func op_d0a0_55_ff; +extern cpuop_func op_d0a8_55_nf; +extern cpuop_func op_d0a8_55_ff; +extern cpuop_func op_d0b0_55_nf; +extern cpuop_func op_d0b0_55_ff; +extern cpuop_func op_d0b8_55_nf; +extern cpuop_func op_d0b8_55_ff; +extern cpuop_func op_d0b9_55_nf; +extern cpuop_func op_d0b9_55_ff; +extern cpuop_func op_d0ba_55_nf; +extern cpuop_func op_d0ba_55_ff; +extern cpuop_func op_d0bb_55_nf; +extern cpuop_func op_d0bb_55_ff; +extern cpuop_func op_d0bc_55_nf; +extern cpuop_func op_d0bc_55_ff; +extern cpuop_func op_d100_55_nf; +extern cpuop_func op_d100_55_ff; +extern cpuop_func op_d108_55_nf; +extern cpuop_func op_d108_55_ff; +extern cpuop_func op_d140_55_nf; +extern cpuop_func op_d140_55_ff; +extern cpuop_func op_d148_55_nf; +extern cpuop_func op_d148_55_ff; +extern cpuop_func op_d180_55_nf; +extern cpuop_func op_d180_55_ff; +extern cpuop_func op_d188_55_nf; +extern cpuop_func op_d188_55_ff; diff --git a/jit/compemu.cpp b/jit/compemu.cpp new file mode 100644 index 00000000..f5d1979a --- /dev/null +++ b/jit/compemu.cpp @@ -0,0 +1,103734 @@ +#include "sysconfig.h" +#if defined(JIT) +#include "sysdeps.h" +#include "options.h" +#include "uae/memory.h" +#include "readcpu.h" +#include "newcpu.h" +#include "comptbl.h" +#include "debug.h" +#include "jit/compemu.h" +#include "jit/flags_x86.h" + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef USE_JIT_FPU +extern void comp_fpp_opp(); +extern void comp_fscc_opp(); +extern void comp_fbcc_opp(); +#endif + +#ifdef PART_1 +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_10_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_18_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_20_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_28_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_30_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_38_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_39_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_40_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_50_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_58_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_60_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_68_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_70_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_78_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_79_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_90_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_98_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_a0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_a8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_b8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_b9_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_100_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_110_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_118_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_120_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_128_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_130_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_138_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_139_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_13a_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_13b_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_13c_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = scratchie++; + mov_l_ri(dst, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_140_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_150_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_158_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_160_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_168_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_170_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_178_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_179_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_180_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_190_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_198_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1a0_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1a8_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1b0_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_1b8_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_1b9_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_1c0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_1d0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_1d8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1e0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1e8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1f0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_1f8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_1f9_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_200_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_210_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_218_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_220_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_228_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_230_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_238_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_239_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_240_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_250_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_258_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_260_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_268_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_270_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_278_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_279_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_280_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_290_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_298_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_2a0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_2a8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2b0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_2b8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_2b9_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_400_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_410_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_418_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_420_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_428_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_430_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_438_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_439_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_440_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_450_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_458_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_460_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_468_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_470_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_478_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_479_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_480_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_490_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_498_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_4a0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_4a8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4b0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_4b8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_4b9_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_600_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_610_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_618_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_620_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_628_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_630_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_638_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_639_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_640_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_650_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_658_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_660_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_668_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_670_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_678_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_679_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_680_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_690_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_698_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_6a0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_6a8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_6b0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_6b8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_6b9_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_800_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_810_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_818_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_820_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_828_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_830_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_838_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_839_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_83a_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_83b_0_comp_ff(uae_u32 opcode) /* BTST */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_840_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_850_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_858_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_860_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_868_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_870_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_878_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_879_0_comp_ff(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_880_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_890_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_898_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_8a0_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_8a8_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8b0_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_8b8_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_8b9_0_comp_ff(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_8c0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_8d0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_8d8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_8e0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_8e8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8f0_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_8f8_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_8f9_0_comp_ff(uae_u32 opcode) /* BSET */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + start_needflags(); + set_zero(s,tmp); + live_flags(); + end_needflags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_a00_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_a10_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_a18_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_a20_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_a28_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_a30_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_a38_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_a39_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_a40_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_a50_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_a58_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_a60_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_a68_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_a70_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_a78_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_a79_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_a80_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_a90_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_a98_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_aa0_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_aa8_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_ab0_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_ab8_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_ab9_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_2 +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_c00_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_c10_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_c18_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_c20_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_c28_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c30_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_c38_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_c39_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(d16,PC) */ +uae_u32 REGPARAM2 op_c3a_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_c3b_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_c40_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_c50_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_c58_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_c60_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_c68_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c70_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_c78_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_c79_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_c7a_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_c7b_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_c80_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_c90_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_c98_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_ca0_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_ca8_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_cb0_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_cb8_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_cb9_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(d16,PC) */ +uae_u32 REGPARAM2 op_cba_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_cbb_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_b_ri(dst,0); + start_needflags(); + or_b(dst,src); + } else { + mov_b_rr(dst,src); + test_b_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_3 +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_w_ri(dst,0); + start_needflags(); + or_w(dst,src); + } else { + mov_w_rr(dst,src); + test_w_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_0_comp_ff(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(srcreg != dst) { + mov_b_rr(srcreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_0_comp_ff(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_0_comp_ff(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(srcreg != dst) { + mov_b_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_b_rr(dst,dst); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_0_comp_ff(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(srcreg != dst) { + mov_b_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_4 +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_0_comp_ff(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + if(srcreg != dst) { + mov_b_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_0_comp_ff(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LINK.L An,#.L */ +uae_u32 REGPARAM2 op_4808_0_comp_ff(uae_u32 opcode) /* LINK */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int offs = scratchie++; + mov_l_ri(offs, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,src,scratchie); + mov_l_rr(src,SP_REG); + add_l(SP_REG,offs); + if(srcreg + 8 != src) { + mov_l_rr(srcreg + 8, src); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_0_comp_ff(uae_u32 opcode) /* SWAP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + rol_l_ri(src,16); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + if(srcreg != src) { + mov_l_rr(srcreg, src); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if (srcreg==7) dodgy=1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if (srcreg==7) dodgy=1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if (srcreg==7) dodgy=1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_0_comp_ff(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_0_comp_ff(uae_u32 opcode) /* EXT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + { + int dst = scratchie++; + sign_extend_8_rr(dst,src); + dont_care_flags(); + { + start_needflags(); + test_w_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, dstreg + 8); + } + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) { + mov_l_rr(srca,8+dstreg); + } + if (1 && !special_mem && !jit_n_addr_unsafe && !(mask & (1 << (7 - dstreg)))) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + offset-=2; + mov_l_rr(tmp,15-i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + } + } + lea_l_brr(8+dstreg,srca,(uae_s32)offset); + } else { + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + sub_l_ri(srca,2); + writeword(srca,15-i,scratchie); + } + } + mov_l_rr(8+dstreg,srca); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + dstreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_0_comp_ff(uae_u32 opcode) /* EXT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + { + int dst = src; + sign_extend_16_rr(src,src); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, dstreg + 8); + } + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, 8 + dstreg); + } + if (1 && !special_mem && !jit_n_addr_unsafe && !(mask & (1 << (7 - dstreg)))) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + offset-=4; + mov_l_rr(tmp,15-i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + } + } + lea_l_brr(8+dstreg,srca,(uae_s32)offset); + } else { + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + sub_l_ri(srca,4); + writelong(srca,15-i,scratchie); + } + } + mov_l_rr(8+dstreg,srca); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + dstreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_0_comp_ff(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXT.B Dn */ +uae_u32 REGPARAM2 op_49c0_0_comp_ff(uae_u32 opcode) /* EXT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + { + int dst = src; + sign_extend_8_rr(src,src); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (d16,PC) */ +uae_u32 REGPARAM2 op_4a3a_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4a3b_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B #.B */ +uae_u32 REGPARAM2 op_4a3c_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_b_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W An */ +uae_u32 REGPARAM2 op_4a48_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (d16,PC) */ +uae_u32 REGPARAM2 op_4a7a_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4a7b_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W #.W */ +uae_u32 REGPARAM2 op_4a7c_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + dont_care_flags(); + { + start_needflags(); + test_w_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L An */ +uae_u32 REGPARAM2 op_4a88_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_0_comp_ff(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (d16,PC) */ +uae_u32 REGPARAM2 op_4aba_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4abb_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L #.L */ +uae_u32 REGPARAM2 op_4abc_0_comp_ff(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + dont_care_flags(); + { + start_needflags(); + test_l_rr(src,src); + live_flags(); + end_needflags(); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, dstreg + 8); + } + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, dstreg + 8); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + lea_l_brr(8+dstreg,srca,offset); + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + mov_l_rr(8+dstreg,tmp); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + dstreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, dstreg + 8); + } + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, dstreg + 8); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + lea_l_brr(8+dstreg,srca,offset); + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + mov_l_rr(8+dstreg,tmp); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + dstreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_0_comp_ff(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_0_comp_ff(uae_u32 opcode) /* LINK */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,src,scratchie); + mov_l_rr(src,SP_REG); + sign_extend_16_rr(offs,offs); + add_l(SP_REG,offs); + if(srcreg + 8 != src) { + mov_l_rr(srcreg + 8, src); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_0_comp_ff(uae_u32 opcode) /* UNLK */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + mov_l_rr(SP_REG,src); + readlong(SP_REG,src,scratchie); + add_l_ri(SP_REG,4); + if(srcreg + 8 != src) { + mov_l_rr(srcreg + 8, src); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_0_comp_ff(uae_u32 opcode) /* NOP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* RTD.L #.W */ +uae_u32 REGPARAM2 op_4e74_0_comp_ff(uae_u32 opcode) /* RTD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + add_l_ri(offs,4); + { + int newad=scratchie++; + readlong(SP_REG,newad,scratchie); + mov_l_mr(JITPTR ®s.pc,newad); + get_n_addr_jmp(newad,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + add_l(SP_REG,offs); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_0_comp_ff(uae_u32 opcode) /* RTS */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int newad=scratchie++; + readlong(SP_REG,newad,scratchie); + mov_l_mr(JITPTR ®s.pc,newad); + get_n_addr_jmp(newad,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + lea_l_brr(SP_REG,SP_REG,4); + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_0_comp_ff(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_0_comp_ff(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_5 +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_50c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_50c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_50d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_50d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_50e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_50e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_50f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_50f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_50f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_51c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_51c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + start_needflags(); + sub_w_ri(src,1); + end_needflags(); + { + uae_u32 v2; + uae_u32 v1=get_const(PC_P); + v2=get_const(offs); + register_branch(v1,v2,3); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_51d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_51d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_51e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_51e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_51f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_51f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_51f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_52c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_52c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,7); + cmov_l_rr(src,nsrc,7); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_52d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_52d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_52e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_52e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_52f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_52f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_52f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_53c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_53c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,6); + cmov_l_rr(src,nsrc,6); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_53d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_53d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_53e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_53e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_53f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_53f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_53f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_54c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_54c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,3); + cmov_l_rr(src,nsrc,3); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_54d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_54d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_54e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_54e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_54f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_54f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_54f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_55c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_55c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,2); + cmov_l_rr(src,nsrc,2); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_55d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_55d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_55e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_55e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_55f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_55f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_55f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_56c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_56c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,5); + cmov_l_rr(src,nsrc,5); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_56d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_56d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_56e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_56e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_56f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_56f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_56f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_57c0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_57c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,4); + cmov_l_rr(src,nsrc,4); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_57d0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_57d8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_57e0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_57e8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_57f0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_57f8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_57f9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5ac0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5ac8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,9); + cmov_l_rr(src,nsrc,9); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5ad0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5ad8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5ae0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5ae8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5af0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5af8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5af9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5bc0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5bc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,8); + cmov_l_rr(src,nsrc,8); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5bd0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5bd8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5be0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5be8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5bf0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5bf8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5bf9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5cc0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5cc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,13); + cmov_l_rr(src,nsrc,13); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5cd0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5cd8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5ce0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5ce8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5cf0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5cf8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5cf9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5dc0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5dc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,12); + cmov_l_rr(src,nsrc,12); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5dd0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5dd8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5de0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5de8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5df0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5df8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5df9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5ec0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5ec8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,15); + cmov_l_rr(src,nsrc,15); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5ed0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5ed8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5ee0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5ee8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5ef0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5ef8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5ef9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5fc0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5fc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,14); + cmov_l_rr(src,nsrc,14); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5fd0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5fd8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5fe0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5fe8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5ff0_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5ff8_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5ff9_0_comp_ff(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6000_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6001_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_60ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_0_comp_ff(uae_u32 opcode) /* BSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_0_comp_ff(uae_u32 opcode) /* BSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_0_comp_ff(uae_u32 opcode) /* BSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6200_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6201_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_62ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6300_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6301_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_6 +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_63ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6400_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6401_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_64ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6500_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6501_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_65ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6600_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6601_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_66ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6700_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6701_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_67ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6a00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6a01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6aff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6b00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6b01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6bff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6c00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6c01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6cff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6d00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6d01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6dff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6e00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6e01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6eff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6f00_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6f01_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6fff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + { + if (src!=dst) { + mov_l_ri(dst,0); + start_needflags(); + or_l(dst,src); + } else { + mov_l_rr(dst,src); + test_l_rr(dst,dst); + } + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_0_comp_ff(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + or_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_0_comp_ff(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + or_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + sub_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_0_comp_ff(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + sbb_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_0_comp_ff(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + sub_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_0_comp_ff(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_7 +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_0_comp_ff(uae_u32 opcode) /* CMPM */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + dont_care_flags(); + start_needflags(); + cmp_b(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_0_comp_ff(uae_u32 opcode) /* CMPM */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + { + dont_care_flags(); + start_needflags(); + cmp_w(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + xor_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_0_comp_ff(uae_u32 opcode) /* CMPM */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + { + dont_care_flags(); + start_needflags(); + cmp_l(dst,src); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_0_comp_ff(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + xor_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_0_comp_ff(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + start_needflags(); + cmp_l(dst,tmps); + live_flags(); + end_needflags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_0_comp_ff(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int src = srcreg; + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_0_comp_ff(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_b(dst,src); + live_flags(); + end_needflags(); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_0_comp_ff(uae_u32 opcode) /* EXG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int tmp=scratchie++; + mov_l_rr(tmp,src); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + if(dstreg != tmp) { + mov_l_rr(dstreg, tmp); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_0_comp_ff(uae_u32 opcode) /* EXG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + mov_l_rr(tmp,src); + if(srcreg + 8 != dst) { + mov_l_rr(srcreg + 8, dst); + } + if(dstreg + 8 != tmp) { + mov_l_rr(dstreg + 8, tmp); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + start_needflags(); + and_w(dst,src); + live_flags(); + end_needflags(); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_0_comp_ff(uae_u32 opcode) /* EXG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + mov_l_rr(tmp,src); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + if(dstreg + 8 != tmp) { + mov_l_rr(dstreg + 8, tmp); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_0_comp_ff(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + start_needflags(); + and_l(dst,src); + live_flags(); + end_needflags(); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int src = srcreg; + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_0_comp_ff(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + dont_care_flags(); + { + start_needflags(); + test_l_rr(dst,dst); + live_flags(); + end_needflags(); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_b(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_b(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_w(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + start_needflags(); + add_w(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_0_comp_ff(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + { + int zero=scratchie++; + int one=scratchie++; + if (needed_flags&FLAG_Z) { + mov_l_ri(zero,0); + mov_l_ri(one,-1); + make_flags_live(); + cmov_l_rr(zero,one,5); + } + restore_carry(); + start_needflags(); + adc_l(dst,src); + live_flags(); + if (needed_flags&FLAG_Z) { + cmov_l_rr(zero,one,5); + set_zero(zero, one); + live_flags(); + } + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_0_comp_ff(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + start_needflags(); + add_l(dst,src); + live_flags(); + end_needflags(); + if (needed_flags&FLAG_X) { + duplicate_carry(); + } + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_0_comp_ff(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shra_b_ri(data,srcreg); + live_flags(); + end_needflags(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shrl_b_ri(data,srcreg); + live_flags(); + end_needflags(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + ror_b_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_b_rr(data,data); + } + bt_l_ri(cdata,0x07); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int setval = scratchie++; + int odata = scratchie++; + mov_l_ri(cdata, 0); + mov_l_ri(setval, 0xffffffff); + test_l_ri(data, 0x00000080); + cmov_l_rr(setval, cdata, NATIVE_CC_EQ); + mov_l_rr(cdata, setval); + mov_l_rr(odata, setval); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, tmpcnt, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x08); + cmov_l_rr(cdata, setval, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shra_b_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 0, 0, 0); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_b_rr(data, cdata); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int odata = scratchie++; + mov_l_rr(odata, data); + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, cdata, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x08); + cmov_l_rr(odata, cdata, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shrl_b_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 7, 0, 1); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_b_rr(data, cdata); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + ror_b_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_b_rr(data,data); + } + bt_l_ri(cdata,0x07); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shra_w_ri(data,srcreg); + live_flags(); + end_needflags(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +#endif + +#ifdef PART_8 +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shrl_w_ri(data,srcreg); + live_flags(); + end_needflags(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + ror_w_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_w_rr(data,data); + } + bt_l_ri(cdata,0x0f); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int setval = scratchie++; + int odata = scratchie++; + mov_l_ri(cdata, 0); + mov_l_ri(setval, 0xffffffff); + test_l_ri(data, 0x00008000); + cmov_l_rr(setval, cdata, NATIVE_CC_EQ); + mov_l_rr(cdata, setval); + mov_l_rr(odata, setval); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, tmpcnt, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x10); + cmov_l_rr(cdata, setval, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shra_w_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 0, 1, 0); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_w_rr(data, cdata); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int odata = scratchie++; + mov_l_rr(odata, data); + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, cdata, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x10); + cmov_l_rr(odata, cdata, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shrl_w_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 15, 1, 1); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_w_rr(data, cdata); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + ror_w_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_w_rr(data,data); + } + bt_l_ri(cdata,0x0f); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shra_l_ri(data,srcreg); + live_flags(); + end_needflags(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shrl_l_ri(data,srcreg); + live_flags(); + end_needflags(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + ror_l_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_l_rr(data,data); + } + bt_l_ri(cdata,0x1f); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_0_comp_ff(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int setval = scratchie++; + int odata = scratchie++; + mov_l_ri(cdata, 0); + mov_l_ri(setval, 0xffffffff); + test_l_ri(data, 0x80000000); + cmov_l_rr(setval, cdata, NATIVE_CC_EQ); + mov_l_rr(cdata, setval); + mov_l_rr(odata, setval); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, tmpcnt, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x20); + cmov_l_rr(cdata, setval, NATIVE_CC_HI); + cmov_l_rr(data, setval, NATIVE_CC_EQ); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shra_l_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 0, 2, 0); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_l_rr(data, cdata); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_0_comp_ff(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int odata = scratchie++; + mov_l_rr(odata, data); + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, cdata, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x20); + cmov_l_rr(odata, cdata, NATIVE_CC_HI); + cmov_l_rr(data, cdata, NATIVE_CC_EQ); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shrl_l_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 31, 2, 1); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_l_rr(data, cdata); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_0_comp_ff(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + ror_l_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_l_rr(data,data); + } + bt_l_ri(cdata,0x1f); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shll_b_ri(data,srcreg); + live_flags(); + end_needflags(); + clear_overflow(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shll_b_ri(data,srcreg); + live_flags(); + end_needflags(); + clear_overflow(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + rol_b_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_b_rr(data,data); + } + bt_l_ri(cdata,0x00); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int odata = scratchie++; + mov_l_rr(odata, data); + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, cdata, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x08); + cmov_l_rr(odata, cdata, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_b_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 0, 0, 1); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_b_rr(data, cdata); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int odata = scratchie++; + mov_l_rr(odata, data); + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, cdata, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x08); + cmov_l_rr(odata, cdata, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_b_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 0, 0, 1); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_b_rr(data, cdata); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + rol_b_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_b_rr(data,data); + } + bt_l_ri(cdata,0x00); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shll_w_ri(data,srcreg); + live_flags(); + end_needflags(); + clear_overflow(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shll_w_ri(data,srcreg); + live_flags(); + end_needflags(); + clear_overflow(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + rol_w_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_w_rr(data,data); + } + bt_l_ri(cdata,0x00); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int odata = scratchie++; + mov_l_rr(odata, data); + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, cdata, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x10); + cmov_l_rr(odata, cdata, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_w_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 0, 1, 1); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_w_rr(data, cdata); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int odata = scratchie++; + mov_l_rr(odata, data); + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, cdata, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x10); + cmov_l_rr(odata, cdata, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_w_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 0, 1, 1); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_w_rr(data, cdata); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + rol_w_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_w_rr(data,data); + } + bt_l_ri(cdata,0x00); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shll_l_ri(data,srcreg); + live_flags(); + end_needflags(); + clear_overflow(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + start_needflags(); + shll_l_ri(data,srcreg); + live_flags(); + end_needflags(); + clear_overflow(); + duplicate_carry(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + rol_l_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_l_rr(data,data); + } + bt_l_ri(cdata,0x00); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_0_comp_ff(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int odata = scratchie++; + mov_l_rr(odata, data); + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, cdata, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x20); + cmov_l_rr(odata, cdata, NATIVE_CC_HI); + cmov_l_rr(data, cdata, NATIVE_CC_EQ); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_l_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 0, 2, 1); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_l_rr(data, cdata); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_0_comp_ff(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + start_needflags(); + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int odata = scratchie++; + mov_l_rr(odata, data); + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmov_l_rr(odata, cdata, NATIVE_CC_EQ); + cmp_b_ri(tmpcnt, 0x20); + cmov_l_rr(odata, cdata, NATIVE_CC_HI); + cmov_l_rr(data, cdata, NATIVE_CC_EQ); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_l_rr(cdata, tmpcnt); + live_flags(); + end_needflags(); + setcc_for_cntzero(tmpcnt, cdata, odata, 0, 2, 1); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); + mov_l_rr(data, cdata); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_0_comp_ff(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + rol_l_rr(data,cnt); + start_needflags(); + int cdata = scratchie++; + int zero = scratchie++; + int tmpcnt = scratchie++; + mov_l_rr(cdata,data); + mov_l_rr(tmpcnt,cnt); + mov_l_ri(zero,0); + and_l_ri(tmpcnt,63); + cmov_l_rr(cdata,zero,NATIVE_CC_EQ); + if (needed_flags & FLAG_ZNV) { + test_l_rr(data,data); + } + bt_l_ri(cdata,0x00); + live_flags(); + end_needflags(); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,Dn */ +uae_u32 REGPARAM2 op_f200_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,An */ +uae_u32 REGPARAM2 op_f208_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(An) */ +uae_u32 REGPARAM2 op_f210_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_f218_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,-(An) */ +uae_u32 REGPARAM2 op_f220_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_f228_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_f230_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_f238_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_f239_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_f23a_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_f23b_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,#.L */ +uae_u32 REGPARAM2 op_f23c_0_comp_ff(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,Dn */ +uae_u32 REGPARAM2 op_f240_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(An) */ +uae_u32 REGPARAM2 op_f250_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_f258_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,-(An) */ +uae_u32 REGPARAM2 op_f260_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_f268_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_f270_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_f278_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_f279_0_comp_ff(uae_u32 opcode) /* FScc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FBccQ.L #,#.W */ +uae_u32 REGPARAM2 op_f280_0_comp_ff(uae_u32 opcode) /* FBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 63); + #else + uae_s32 srcreg = (opcode & 63); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + comp_fbcc_opp(opcode); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FBccQ.L #,#.L */ +uae_u32 REGPARAM2 op_f2c0_0_comp_ff(uae_u32 opcode) /* FBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 63); + #else + uae_s32 srcreg = (opcode & 63); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + comp_fbcc_opp(opcode); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* MOVE16.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_f600_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + add_l_ri(srcreg+8,16); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE16.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_f608_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + add_l_ri(dstreg+8,16); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE16.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_f610_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE16.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_f618_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE16.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_f620_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_s32 dstreg = 0; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + uae_u16 dstreg=((comp_get_iword((m68k_pc_offset+=2)-2))>>12)&0x07; + mov_l_rr(src,8+srcreg); + mov_l_rr(dst,8+dstreg); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (srcreg != dstreg) { + add_l_ri(srcreg+8,16); + } + add_l_ri(dstreg+8,16); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + + +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef USE_JIT_FPU +extern void comp_fpp_opp(); +extern void comp_fscc_opp(); +extern void comp_fbcc_opp(); +#endif + +#ifdef PART_1 +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(An) */ +uae_u32 REGPARAM2 op_10_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_18_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_20_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_28_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_30_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_38_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_39_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_40_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(An) */ +uae_u32 REGPARAM2 op_50_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_58_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_60_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_68_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_70_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_78_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_79_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(An) */ +uae_u32 REGPARAM2 op_90_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_98_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_a0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_a8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_b8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_b9_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.L Dn,Dn */ +uae_u32 REGPARAM2 op_100_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(An) */ +uae_u32 REGPARAM2 op_110_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_118_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,-(An) */ +uae_u32 REGPARAM2 op_120_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_128_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_130_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_138_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_139_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(d16,PC) */ +uae_u32 REGPARAM2 op_13a_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_13b_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B Dn,#.B */ +uae_u32 REGPARAM2 op_13c_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = scratchie++; + mov_l_ri(dst, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.L Dn,Dn */ +uae_u32 REGPARAM2 op_140_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(An) */ +uae_u32 REGPARAM2 op_150_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_158_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,-(An) */ +uae_u32 REGPARAM2 op_160_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_168_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_170_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_178_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_179_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.L Dn,Dn */ +uae_u32 REGPARAM2 op_180_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(An) */ +uae_u32 REGPARAM2 op_190_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_198_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1a0_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1a8_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1b0_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_1b8_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_1b9_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.L Dn,Dn */ +uae_u32 REGPARAM2 op_1c0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(An) */ +uae_u32 REGPARAM2 op_1d0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_1d8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1e0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1e8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1f0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_1f8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_1f9_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_200_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(An) */ +uae_u32 REGPARAM2 op_210_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_218_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,-(An) */ +uae_u32 REGPARAM2 op_220_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_228_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_230_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_238_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_239_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_240_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(An) */ +uae_u32 REGPARAM2 op_250_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_258_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,-(An) */ +uae_u32 REGPARAM2 op_260_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_268_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_270_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_278_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_279_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_280_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(An) */ +uae_u32 REGPARAM2 op_290_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_298_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,-(An) */ +uae_u32 REGPARAM2 op_2a0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_2a8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2b0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_2b8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_2b9_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_400_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(An) */ +uae_u32 REGPARAM2 op_410_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_418_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,-(An) */ +uae_u32 REGPARAM2 op_420_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_428_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_430_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_438_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_439_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_440_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(An) */ +uae_u32 REGPARAM2 op_450_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_458_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,-(An) */ +uae_u32 REGPARAM2 op_460_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_468_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_470_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_478_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_479_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_480_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(An) */ +uae_u32 REGPARAM2 op_490_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_498_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,-(An) */ +uae_u32 REGPARAM2 op_4a0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_4a8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4b0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_4b8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_4b9_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_600_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(An) */ +uae_u32 REGPARAM2 op_610_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_618_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,-(An) */ +uae_u32 REGPARAM2 op_620_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_628_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_630_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_638_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_639_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_640_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(An) */ +uae_u32 REGPARAM2 op_650_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_658_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,-(An) */ +uae_u32 REGPARAM2 op_660_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_668_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_670_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_678_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_679_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_680_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(An) */ +uae_u32 REGPARAM2 op_690_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_698_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,-(An) */ +uae_u32 REGPARAM2 op_6a0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_6a8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_6b0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_6b8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_6b9_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.L #.W,Dn */ +uae_u32 REGPARAM2 op_800_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(An) */ +uae_u32 REGPARAM2 op_810_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_818_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,-(An) */ +uae_u32 REGPARAM2 op_820_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_828_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_830_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_838_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_839_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_83a_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BTST.B #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_83b_0_comp_nf(uae_u32 opcode) /* BTST */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bt_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.L #.W,Dn */ +uae_u32 REGPARAM2 op_840_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(An) */ +uae_u32 REGPARAM2 op_850_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_858_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,-(An) */ +uae_u32 REGPARAM2 op_860_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_868_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_870_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_878_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCHG.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_879_0_comp_nf(uae_u32 opcode) /* BCHG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btc_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.L #.W,Dn */ +uae_u32 REGPARAM2 op_880_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(An) */ +uae_u32 REGPARAM2 op_890_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_898_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,-(An) */ +uae_u32 REGPARAM2 op_8a0_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_8a8_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8b0_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_8b8_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BCLR.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_8b9_0_comp_nf(uae_u32 opcode) /* BCLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + btr_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.L #.W,Dn */ +uae_u32 REGPARAM2 op_8c0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,31); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(An) */ +uae_u32 REGPARAM2 op_8d0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(An)+ */ +uae_u32 REGPARAM2 op_8d8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,-(An) */ +uae_u32 REGPARAM2 op_8e0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(d16,An) */ +uae_u32 REGPARAM2 op_8e8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8f0_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(xxx).W */ +uae_u32 REGPARAM2 op_8f8_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSET.B #.W,(xxx).L */ +uae_u32 REGPARAM2 op_8f9_0_comp_nf(uae_u32 opcode) /* BSET */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + int s=scratchie++; + int tmp=scratchie++; + mov_l_rr(s,src); + and_l_ri(s,7); + bts_l_rr(dst,s); + sbb_l(s,s); + make_flags_live(); + dont_care_flags(); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,Dn */ +uae_u32 REGPARAM2 op_a00_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(An) */ +uae_u32 REGPARAM2 op_a10_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_a18_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,-(An) */ +uae_u32 REGPARAM2 op_a20_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_a28_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_a30_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_a38_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_a39_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,Dn */ +uae_u32 REGPARAM2 op_a40_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(An) */ +uae_u32 REGPARAM2 op_a50_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_a58_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,-(An) */ +uae_u32 REGPARAM2 op_a60_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_a68_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_a70_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_a78_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_a79_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,Dn */ +uae_u32 REGPARAM2 op_a80_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + { + xor_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(An) */ +uae_u32 REGPARAM2 op_a90_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_a98_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,-(An) */ +uae_u32 REGPARAM2 op_aa0_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_aa8_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_ab0_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_ab8_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_ab9_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_2 +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_c00_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(An) */ +uae_u32 REGPARAM2 op_c10_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_c18_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,-(An) */ +uae_u32 REGPARAM2 op_c20_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_c28_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c30_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_c38_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_c39_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(d16,PC) */ +uae_u32 REGPARAM2 op_c3a_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_c3b_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_c40_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(An) */ +uae_u32 REGPARAM2 op_c50_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_c58_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,-(An) */ +uae_u32 REGPARAM2 op_c60_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_c68_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c70_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_c78_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_c79_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_c7a_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_c7b_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_c80_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(An) */ +uae_u32 REGPARAM2 op_c90_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_c98_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,-(An) */ +uae_u32 REGPARAM2 op_ca0_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_ca8_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_cb0_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_cb8_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_cb9_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(d16,PC) */ +uae_u32 REGPARAM2 op_cba_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_cbb_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,Dn */ +uae_u32 REGPARAM2 op_1000_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),Dn */ +uae_u32 REGPARAM2 op_1010_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,Dn */ +uae_u32 REGPARAM2 op_1018_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),Dn */ +uae_u32 REGPARAM2 op_1020_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_1028_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_1030_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_1038_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_1039_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_103a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_103b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,Dn */ +uae_u32 REGPARAM2 op_103c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + and_l_ri(dst,0xffffff00); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_b_rr(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(An) */ +uae_u32 REGPARAM2 op_1080_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(An) */ +uae_u32 REGPARAM2 op_1090_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(An) */ +uae_u32 REGPARAM2 op_1098_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(An) */ +uae_u32 REGPARAM2 op_10a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(An) */ +uae_u32 REGPARAM2 op_10a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_10b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(An) */ +uae_u32 REGPARAM2 op_10b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(An) */ +uae_u32 REGPARAM2 op_10b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(An) */ +uae_u32 REGPARAM2 op_10ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_10bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(An) */ +uae_u32 REGPARAM2 op_10bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_10c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(An)+ */ +uae_u32 REGPARAM2 op_10d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_10d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(An)+ */ +uae_u32 REGPARAM2 op_10e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_10e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_10f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_10f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_10fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_10fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(An)+ */ +uae_u32 REGPARAM2 op_10fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,-(An) */ +uae_u32 REGPARAM2 op_1100_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),-(An) */ +uae_u32 REGPARAM2 op_1110_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,-(An) */ +uae_u32 REGPARAM2 op_1118_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),-(An) */ +uae_u32 REGPARAM2 op_1120_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),-(An) */ +uae_u32 REGPARAM2 op_1128_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_1130_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_1138_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_1139_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_113a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_113b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,-(An) */ +uae_u32 REGPARAM2 op_113c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_1140_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(d16,An) */ +uae_u32 REGPARAM2 op_1150_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_1158_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(d16,An) */ +uae_u32 REGPARAM2 op_1160_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_1168_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_1170_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_1178_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_1179_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_117a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_117b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(d16,An) */ +uae_u32 REGPARAM2 op_117c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1180_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1190_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_1198_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_11bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_11c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(xxx).W */ +uae_u32 REGPARAM2 op_11d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_11d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(xxx).W */ +uae_u32 REGPARAM2 op_11e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_11e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_11f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_11f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_11fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_11fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(xxx).W */ +uae_u32 REGPARAM2 op_11fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_13c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An),(xxx).L */ +uae_u32 REGPARAM2 op_13d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_13d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B -(An),(xxx).L */ +uae_u32 REGPARAM2 op_13e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_13e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_13f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_13f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_13fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_13fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.B #.B,(xxx).L */ +uae_u32 REGPARAM2 op_13fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writebyte(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,Dn */ +uae_u32 REGPARAM2 op_2000_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,Dn */ +uae_u32 REGPARAM2 op_2008_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),Dn */ +uae_u32 REGPARAM2 op_2010_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,Dn */ +uae_u32 REGPARAM2 op_2018_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),Dn */ +uae_u32 REGPARAM2 op_2020_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_2028_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_2030_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_2038_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_2039_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_203a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_203b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,Dn */ +uae_u32 REGPARAM2 op_203c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L Dn,An */ +uae_u32 REGPARAM2 op_2040_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L An,An */ +uae_u32 REGPARAM2 op_2048_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (An),An */ +uae_u32 REGPARAM2 op_2050_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (An)+,An */ +uae_u32 REGPARAM2 op_2058_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L -(An),An */ +uae_u32 REGPARAM2 op_2060_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_2068_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_2070_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_2078_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_2079_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_207a_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_207b_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.L #.L,An */ +uae_u32 REGPARAM2 op_207c_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + mov_l_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(An) */ +uae_u32 REGPARAM2 op_2080_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(An) */ +uae_u32 REGPARAM2 op_2088_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(An) */ +uae_u32 REGPARAM2 op_2090_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(An) */ +uae_u32 REGPARAM2 op_2098_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(An) */ +uae_u32 REGPARAM2 op_20a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(An) */ +uae_u32 REGPARAM2 op_20a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_20b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(An) */ +uae_u32 REGPARAM2 op_20b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_20b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(An) */ +uae_u32 REGPARAM2 op_20ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_20bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(An) */ +uae_u32 REGPARAM2 op_20bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_20c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(An)+ */ +uae_u32 REGPARAM2 op_20c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(An)+ */ +uae_u32 REGPARAM2 op_20d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_20d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(An)+ */ +uae_u32 REGPARAM2 op_20e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_20e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_20f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_20f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_20fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_20fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(An)+ */ +uae_u32 REGPARAM2 op_20fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,-(An) */ +uae_u32 REGPARAM2 op_2100_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,-(An) */ +uae_u32 REGPARAM2 op_2108_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),-(An) */ +uae_u32 REGPARAM2 op_2110_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,-(An) */ +uae_u32 REGPARAM2 op_2118_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),-(An) */ +uae_u32 REGPARAM2 op_2120_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),-(An) */ +uae_u32 REGPARAM2 op_2128_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_2130_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_2138_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_2139_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_213a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_213b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,-(An) */ +uae_u32 REGPARAM2 op_213c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_2140_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(d16,An) */ +uae_u32 REGPARAM2 op_2148_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(d16,An) */ +uae_u32 REGPARAM2 op_2150_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_2158_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(d16,An) */ +uae_u32 REGPARAM2 op_2160_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_2168_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_2170_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_2178_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_2179_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_217a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_217b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(d16,An) */ +uae_u32 REGPARAM2 op_217c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2180_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2188_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2190_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_2198_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_3 +/* MOVE.L (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_21bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_21c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(xxx).W */ +uae_u32 REGPARAM2 op_21c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(xxx).W */ +uae_u32 REGPARAM2 op_21d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_21d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(xxx).W */ +uae_u32 REGPARAM2 op_21e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_21e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_21f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_21f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_21fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_21fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(xxx).W */ +uae_u32 REGPARAM2 op_21fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_23c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L An,(xxx).L */ +uae_u32 REGPARAM2 op_23c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_23d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_23d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L -(An),(xxx).L */ +uae_u32 REGPARAM2 op_23e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_23e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_23f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_23f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_23fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_23fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.L #.L,(xxx).L */ +uae_u32 REGPARAM2 op_23fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writelong(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,Dn */ +uae_u32 REGPARAM2 op_3000_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,Dn */ +uae_u32 REGPARAM2 op_3008_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),Dn */ +uae_u32 REGPARAM2 op_3010_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,Dn */ +uae_u32 REGPARAM2 op_3018_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),Dn */ +uae_u32 REGPARAM2 op_3020_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_3028_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_3030_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_3038_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_3039_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_303a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_303b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,Dn */ +uae_u32 REGPARAM2 op_303c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + and_l_ri(dst,0xffff0000); + or_l(dst,scratchie); + forget_about(scratchie); + } else + mov_w_rr(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W Dn,An */ +uae_u32 REGPARAM2 op_3040_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W An,An */ +uae_u32 REGPARAM2 op_3048_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (An),An */ +uae_u32 REGPARAM2 op_3050_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (An)+,An */ +uae_u32 REGPARAM2 op_3058_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W -(An),An */ +uae_u32 REGPARAM2 op_3060_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (d16,An),An */ +uae_u32 REGPARAM2 op_3068_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_3070_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_3078_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_3079_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_307a_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_307b_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEA.W #.W,An */ +uae_u32 REGPARAM2 op_307c_0_comp_nf(uae_u32 opcode) /* MOVEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + { + int tmps=scratchie++; + sign_extend_16_rr(dst,src); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(An) */ +uae_u32 REGPARAM2 op_3080_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(An) */ +uae_u32 REGPARAM2 op_3088_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(An) */ +uae_u32 REGPARAM2 op_3090_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(An) */ +uae_u32 REGPARAM2 op_3098_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(An) */ +uae_u32 REGPARAM2 op_30a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(An) */ +uae_u32 REGPARAM2 op_30a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(An) */ +uae_u32 REGPARAM2 op_30b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(An) */ +uae_u32 REGPARAM2 op_30b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(An) */ +uae_u32 REGPARAM2 op_30b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(An) */ +uae_u32 REGPARAM2 op_30ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(An) */ +uae_u32 REGPARAM2 op_30bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(An) */ +uae_u32 REGPARAM2 op_30bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_30c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(An)+ */ +uae_u32 REGPARAM2 op_30c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(An)+ */ +uae_u32 REGPARAM2 op_30d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_30d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(An)+ */ +uae_u32 REGPARAM2 op_30e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(An)+ */ +uae_u32 REGPARAM2 op_30e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(An)+ */ +uae_u32 REGPARAM2 op_30f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_30f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(An)+ */ +uae_u32 REGPARAM2 op_30fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(An)+ */ +uae_u32 REGPARAM2 op_30fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_30fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,-(An) */ +uae_u32 REGPARAM2 op_3100_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,-(An) */ +uae_u32 REGPARAM2 op_3108_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),-(An) */ +uae_u32 REGPARAM2 op_3110_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,-(An) */ +uae_u32 REGPARAM2 op_3118_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),-(An) */ +uae_u32 REGPARAM2 op_3120_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),-(An) */ +uae_u32 REGPARAM2 op_3128_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),-(An) */ +uae_u32 REGPARAM2 op_3130_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,-(An) */ +uae_u32 REGPARAM2 op_3138_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,-(An) */ +uae_u32 REGPARAM2 op_3139_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),-(An) */ +uae_u32 REGPARAM2 op_313a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),-(An) */ +uae_u32 REGPARAM2 op_313b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_313c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_3140_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(d16,An) */ +uae_u32 REGPARAM2 op_3148_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(d16,An) */ +uae_u32 REGPARAM2 op_3150_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(d16,An) */ +uae_u32 REGPARAM2 op_3158_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(d16,An) */ +uae_u32 REGPARAM2 op_3160_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(d16,An) */ +uae_u32 REGPARAM2 op_3168_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_3170_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(d16,An) */ +uae_u32 REGPARAM2 op_3178_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(d16,An) */ +uae_u32 REGPARAM2 op_3179_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(d16,An) */ +uae_u32 REGPARAM2 op_317a_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(d16,An) */ +uae_u32 REGPARAM2 op_317b_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_317c_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3180_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3188_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3190_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_3198_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_31bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_31c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(xxx).W */ +uae_u32 REGPARAM2 op_31c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(xxx).W */ +uae_u32 REGPARAM2 op_31d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(xxx).W */ +uae_u32 REGPARAM2 op_31d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(xxx).W */ +uae_u32 REGPARAM2 op_31e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(xxx).W */ +uae_u32 REGPARAM2 op_31e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(xxx).W */ +uae_u32 REGPARAM2 op_31f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(xxx).W */ +uae_u32 REGPARAM2 op_31f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(xxx).W */ +uae_u32 REGPARAM2 op_31fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(xxx).W */ +uae_u32 REGPARAM2 op_31fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_31fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_33c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W An,(xxx).L */ +uae_u32 REGPARAM2 op_33c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An),(xxx).L */ +uae_u32 REGPARAM2 op_33d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_33d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W -(An),(xxx).L */ +uae_u32 REGPARAM2 op_33e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,An),(xxx).L */ +uae_u32 REGPARAM2 op_33e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,An,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).W,(xxx).L */ +uae_u32 REGPARAM2 op_33f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (xxx).L,(xxx).L */ +uae_u32 REGPARAM2 op_33f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d16,PC),(xxx).L */ +uae_u32 REGPARAM2 op_33fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W (d8,PC,Xn),(xxx).L */ +uae_u32 REGPARAM2 op_33fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_33fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + writeword(dsta, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B Dn */ +uae_u32 REGPARAM2 op_4000_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + if(srcreg != dst) { + mov_b_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (An) */ +uae_u32 REGPARAM2 op_4010_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (An)+ */ +uae_u32 REGPARAM2 op_4018_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B -(An) */ +uae_u32 REGPARAM2 op_4020_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (d16,An) */ +uae_u32 REGPARAM2 op_4028_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4030_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (xxx).W */ +uae_u32 REGPARAM2 op_4038_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.B (xxx).L */ +uae_u32 REGPARAM2 op_4039_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W Dn */ +uae_u32 REGPARAM2 op_4040_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (An) */ +uae_u32 REGPARAM2 op_4050_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (An)+ */ +uae_u32 REGPARAM2 op_4058_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W -(An) */ +uae_u32 REGPARAM2 op_4060_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (d16,An) */ +uae_u32 REGPARAM2 op_4068_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4070_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (xxx).W */ +uae_u32 REGPARAM2 op_4078_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.W (xxx).L */ +uae_u32 REGPARAM2 op_4079_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L Dn */ +uae_u32 REGPARAM2 op_4080_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (An) */ +uae_u32 REGPARAM2 op_4090_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (An)+ */ +uae_u32 REGPARAM2 op_4098_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L -(An) */ +uae_u32 REGPARAM2 op_40a0_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (d16,An) */ +uae_u32 REGPARAM2 op_40a8_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_40b0_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (xxx).W */ +uae_u32 REGPARAM2 op_40b8_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEGX.L (xxx).L */ +uae_u32 REGPARAM2 op_40b9_0_comp_nf(uae_u32 opcode) /* NEGX */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (An),An */ +uae_u32 REGPARAM2 op_41d0_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (d16,An),An */ +uae_u32 REGPARAM2 op_41e8_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_41f0_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_41f8_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_41f9_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_41fa_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LEA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_41fb_0_comp_nf(uae_u32 opcode) /* LEA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if(dstreg + 8 != srca) { + mov_l_rr(dstreg + 8, srca); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B Dn */ +uae_u32 REGPARAM2 op_4200_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + if(srcreg != dst) { + mov_b_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (An) */ +uae_u32 REGPARAM2 op_4210_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (An)+ */ +uae_u32 REGPARAM2 op_4218_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B -(An) */ +uae_u32 REGPARAM2 op_4220_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (d16,An) */ +uae_u32 REGPARAM2 op_4228_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4230_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (xxx).W */ +uae_u32 REGPARAM2 op_4238_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.B (xxx).L */ +uae_u32 REGPARAM2 op_4239_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst=scratchie++; + mov_l_ri(dst,0); + writebyte(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W Dn */ +uae_u32 REGPARAM2 op_4240_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (An) */ +uae_u32 REGPARAM2 op_4250_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (An)+ */ +uae_u32 REGPARAM2 op_4258_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W -(An) */ +uae_u32 REGPARAM2 op_4260_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (d16,An) */ +uae_u32 REGPARAM2 op_4268_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4270_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (xxx).W */ +uae_u32 REGPARAM2 op_4278_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.W (xxx).L */ +uae_u32 REGPARAM2 op_4279_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst=scratchie++; + mov_l_ri(dst,0); + writeword(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L Dn */ +uae_u32 REGPARAM2 op_4280_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (An) */ +uae_u32 REGPARAM2 op_4290_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (An)+ */ +uae_u32 REGPARAM2 op_4298_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L -(An) */ +uae_u32 REGPARAM2 op_42a0_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (d16,An) */ +uae_u32 REGPARAM2 op_42a8_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_42b0_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (xxx).W */ +uae_u32 REGPARAM2 op_42b8_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CLR.L (xxx).L */ +uae_u32 REGPARAM2 op_42b9_0_comp_nf(uae_u32 opcode) /* CLR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst=scratchie++; + mov_l_ri(dst,0); + writelong(srca, dst, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B Dn */ +uae_u32 REGPARAM2 op_4400_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + if(srcreg != dst) { + mov_b_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (An) */ +uae_u32 REGPARAM2 op_4410_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_4 +/* NEG.B (An)+ */ +uae_u32 REGPARAM2 op_4418_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B -(An) */ +uae_u32 REGPARAM2 op_4420_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (d16,An) */ +uae_u32 REGPARAM2 op_4428_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4430_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (xxx).W */ +uae_u32 REGPARAM2 op_4438_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.B (xxx).L */ +uae_u32 REGPARAM2 op_4439_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_b(dst,src); + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W Dn */ +uae_u32 REGPARAM2 op_4440_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (An) */ +uae_u32 REGPARAM2 op_4450_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (An)+ */ +uae_u32 REGPARAM2 op_4458_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W -(An) */ +uae_u32 REGPARAM2 op_4460_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (d16,An) */ +uae_u32 REGPARAM2 op_4468_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4470_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (xxx).W */ +uae_u32 REGPARAM2 op_4478_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.W (xxx).L */ +uae_u32 REGPARAM2 op_4479_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_w(dst,src); + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L Dn */ +uae_u32 REGPARAM2 op_4480_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (An) */ +uae_u32 REGPARAM2 op_4490_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (An)+ */ +uae_u32 REGPARAM2 op_4498_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L -(An) */ +uae_u32 REGPARAM2 op_44a0_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (d16,An) */ +uae_u32 REGPARAM2 op_44a8_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_44b0_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (xxx).W */ +uae_u32 REGPARAM2 op_44b8_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NEG.L (xxx).L */ +uae_u32 REGPARAM2 op_44b9_0_comp_nf(uae_u32 opcode) /* NEG */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0); + dont_care_flags(); + sub_l(dst,src); + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B Dn */ +uae_u32 REGPARAM2 op_4600_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + if(srcreg != dst) { + mov_b_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (An) */ +uae_u32 REGPARAM2 op_4610_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (An)+ */ +uae_u32 REGPARAM2 op_4618_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B -(An) */ +uae_u32 REGPARAM2 op_4620_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (d16,An) */ +uae_u32 REGPARAM2 op_4628_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4630_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (xxx).W */ +uae_u32 REGPARAM2 op_4638_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.B (xxx).L */ +uae_u32 REGPARAM2 op_4639_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W Dn */ +uae_u32 REGPARAM2 op_4640_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (An) */ +uae_u32 REGPARAM2 op_4650_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (An)+ */ +uae_u32 REGPARAM2 op_4658_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W -(An) */ +uae_u32 REGPARAM2 op_4660_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (d16,An) */ +uae_u32 REGPARAM2 op_4668_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4670_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (xxx).W */ +uae_u32 REGPARAM2 op_4678_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.W (xxx).L */ +uae_u32 REGPARAM2 op_4679_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L Dn */ +uae_u32 REGPARAM2 op_4680_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + xor_l(dst,src); + } + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (An) */ +uae_u32 REGPARAM2 op_4690_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (An)+ */ +uae_u32 REGPARAM2 op_4698_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L -(An) */ +uae_u32 REGPARAM2 op_46a0_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(srca, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (d16,An) */ +uae_u32 REGPARAM2 op_46a8_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_46b0_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (xxx).W */ +uae_u32 REGPARAM2 op_46b8_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOT.L (xxx).L */ +uae_u32 REGPARAM2 op_46b9_0_comp_nf(uae_u32 opcode) /* NOT */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst=scratchie++; + mov_l_ri(dst,0xffffffff); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(srca, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LINK.L An,#.L */ +uae_u32 REGPARAM2 op_4808_0_comp_nf(uae_u32 opcode) /* LINK */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int offs = scratchie++; + mov_l_ri(offs, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,src,scratchie); + mov_l_rr(src,SP_REG); + add_l(SP_REG,offs); + if(srcreg + 8 != src) { + mov_l_rr(srcreg + 8, src); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SWAP.W Dn */ +uae_u32 REGPARAM2 op_4840_0_comp_nf(uae_u32 opcode) /* SWAP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + rol_l_ri(src,16); + if(srcreg != src) { + mov_l_rr(srcreg, src); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (An) */ +uae_u32 REGPARAM2 op_4850_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if (srcreg==7) dodgy=1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (d16,An) */ +uae_u32 REGPARAM2 op_4868_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if (srcreg==7) dodgy=1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4870_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if (srcreg==7) dodgy=1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (xxx).W */ +uae_u32 REGPARAM2 op_4878_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (xxx).L */ +uae_u32 REGPARAM2 op_4879_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (d16,PC) */ +uae_u32 REGPARAM2 op_487a_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* PEA.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_487b_0_comp_nf(uae_u32 opcode) /* PEA */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + { + int dsta = dodgy ? scratchie++ : 7 + 8; + lea_l_brr(7 + 8, 7 + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + 7); + } + writelong(dsta, srca, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXT.W Dn */ +uae_u32 REGPARAM2 op_4880_0_comp_nf(uae_u32 opcode) /* EXT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + { + int dst = scratchie++; + sign_extend_8_rr(dst,src); + if(srcreg != dst) { + mov_w_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(An) */ +uae_u32 REGPARAM2 op_4890_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, dstreg + 8); + } + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,-(An) */ +uae_u32 REGPARAM2 op_48a0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca=dodgy?scratchie++:dstreg+8; + if (dodgy) { + mov_l_rr(srca,8+dstreg); + } + if (1 && !special_mem && !jit_n_addr_unsafe && !(mask & (1 << (7 - dstreg)))) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + offset-=2; + mov_l_rr(tmp,15-i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + } + } + lea_l_brr(8+dstreg,srca,(uae_s32)offset); + } else { + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + sub_l_ri(srca,2); + writeword(srca,15-i,scratchie); + } + } + mov_l_rr(8+dstreg,srca); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48a8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + dstreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48b0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48b8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48b9_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_16(tmp); + mov_w_Rr(native,tmp,offset); + offset+=2; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writeword(tmp,i,scratchie); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXT.L Dn */ +uae_u32 REGPARAM2 op_48c0_0_comp_nf(uae_u32 opcode) /* EXT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + { + int dst = src; + sign_extend_16_rr(src,src); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(An) */ +uae_u32 REGPARAM2 op_48d0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, dstreg + 8); + } + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,-(An) */ +uae_u32 REGPARAM2 op_48e0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, 8 + dstreg); + } + if (1 && !special_mem && !jit_n_addr_unsafe && !(mask & (1 << (7 - dstreg)))) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + offset-=4; + mov_l_rr(tmp,15-i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + } + } + lea_l_brr(8+dstreg,srca,(uae_s32)offset); + } else { + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + sub_l_ri(srca,4); + writelong(srca,15-i,scratchie); + } + } + mov_l_rr(8+dstreg,srca); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_48e8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + dstreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_48f0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_48f8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMLE.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_48f9_0_comp_nf(uae_u32 opcode) /* MVMLE */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + int tmp=scratchie++; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + mov_l_rr(tmp,i); + mid_bswap_32(tmp); + mov_l_Rr(native,tmp,offset); + offset+=4; + } + } + } else { + mov_l_rr(tmp,srca); + for (i=0;i<16 && mask;i++) { + if ((mask>>i)&1) { + writelong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXT.B Dn */ +uae_u32 REGPARAM2 op_49c0_0_comp_nf(uae_u32 opcode) /* EXT */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + dont_care_flags(); + { + int dst = src; + sign_extend_8_rr(src,src); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B Dn */ +uae_u32 REGPARAM2 op_4a00_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (An) */ +uae_u32 REGPARAM2 op_4a10_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (An)+ */ +uae_u32 REGPARAM2 op_4a18_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B -(An) */ +uae_u32 REGPARAM2 op_4a20_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (d16,An) */ +uae_u32 REGPARAM2 op_4a28_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a30_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (xxx).W */ +uae_u32 REGPARAM2 op_4a38_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (xxx).L */ +uae_u32 REGPARAM2 op_4a39_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (d16,PC) */ +uae_u32 REGPARAM2 op_4a3a_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4a3b_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.B #.B */ +uae_u32 REGPARAM2 op_4a3c_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W Dn */ +uae_u32 REGPARAM2 op_4a40_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W An */ +uae_u32 REGPARAM2 op_4a48_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (An) */ +uae_u32 REGPARAM2 op_4a50_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (An)+ */ +uae_u32 REGPARAM2 op_4a58_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W -(An) */ +uae_u32 REGPARAM2 op_4a60_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (d16,An) */ +uae_u32 REGPARAM2 op_4a68_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4a70_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (xxx).W */ +uae_u32 REGPARAM2 op_4a78_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (xxx).L */ +uae_u32 REGPARAM2 op_4a79_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (d16,PC) */ +uae_u32 REGPARAM2 op_4a7a_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4a7b_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.W #.W */ +uae_u32 REGPARAM2 op_4a7c_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L Dn */ +uae_u32 REGPARAM2 op_4a80_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L An */ +uae_u32 REGPARAM2 op_4a88_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (An) */ +uae_u32 REGPARAM2 op_4a90_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (An)+ */ +uae_u32 REGPARAM2 op_4a98_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L -(An) */ +uae_u32 REGPARAM2 op_4aa0_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (d16,An) */ +uae_u32 REGPARAM2 op_4aa8_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ab0_0_comp_nf(uae_u32 opcode) /* TST */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (xxx).W */ +uae_u32 REGPARAM2 op_4ab8_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (xxx).L */ +uae_u32 REGPARAM2 op_4ab9_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (d16,PC) */ +uae_u32 REGPARAM2 op_4aba_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4abb_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* TST.L #.L */ +uae_u32 REGPARAM2 op_4abc_0_comp_nf(uae_u32 opcode) /* TST */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,Dn */ +uae_u32 REGPARAM2 op_4c00_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int dst = dstreg; + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4c10_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c18_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,-(An) */ +uae_u32 REGPARAM2 op_4c20_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4c28_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4c30_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4c38_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4c39_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4c3a_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(dsta, address + PC16off); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4c3b_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int pctmp = scratchie++; + int dsta = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULL.L #.W,#.L */ +uae_u32 REGPARAM2 op_4c3c_0_comp_nf(uae_u32 opcode) /* MULL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + int r2=(extra>>12)&7; + int tmp=scratchie++; + { + int dst = scratchie++; + mov_l_ri(dst, comp_get_ilong((m68k_pc_offset+=4)-4)); + if (extra&0x0400) { + int r3=(extra&7); + mov_l_rr(r3,dst); + if (extra&0x0800) { + imul_64_32(r2,r3); + } else { + mul_64_32(r2,r3); + } + } else { + imul_32_32(r2,dst); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(An) */ +uae_u32 REGPARAM2 op_4c90_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, dstreg + 8); + } + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(An)+ */ +uae_u32 REGPARAM2 op_4c98_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, dstreg + 8); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + lea_l_brr(8+dstreg,srca,offset); + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + mov_l_rr(8+dstreg,tmp); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ca8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + dstreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cb0_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cb8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cb9_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cba_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.W #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cbb_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_w_rR(i,native,offset); + mid_bswap_16(i); + sign_extend_16_rr(i,i); + offset+=2; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readword(tmp,i,scratchie); + sign_extend_16_rr(i,i); + add_l_ri(tmp,2); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(An) */ +uae_u32 REGPARAM2 op_4cd0_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(srca, dstreg + 8); + } + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_4cd8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, dstreg + 8); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + lea_l_brr(8+dstreg,srca,offset); + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + mov_l_rr(8+dstreg,tmp); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_4ce8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + dstreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_4cf0_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_4cf8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_4cf9_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_4cfa_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MVMEL.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4cfb_0_comp_nf(uae_u32 opcode) /* MVMEL */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + uae_u16 mask = comp_get_iword((m68k_pc_offset+=2)-2); + int native=scratchie++; + int i; + signed char offset=0; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + if (1 && !special_mem && !jit_n_addr_unsafe) { + get_n_addr(srca,native,scratchie); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + mov_l_rR(i,native,offset); + mid_bswap_32(i); + offset+=4; + } + } + } else { + int tmp=scratchie++; + mov_l_rr(tmp,srca); + for (i=0;i<16;i++) { + if ((mask>>i)&1) { + readlong(tmp,i,scratchie); + add_l_ri(tmp,4); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* LINK.W An,#.W */ +uae_u32 REGPARAM2 op_4e50_0_comp_nf(uae_u32 opcode) /* LINK */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,src,scratchie); + mov_l_rr(src,SP_REG); + sign_extend_16_rr(offs,offs); + add_l(SP_REG,offs); + if(srcreg + 8 != src) { + mov_l_rr(srcreg + 8, src); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* UNLK.L An */ +uae_u32 REGPARAM2 op_4e58_0_comp_nf(uae_u32 opcode) /* UNLK */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + mov_l_rr(SP_REG,src); + readlong(SP_REG,src,scratchie); + add_l_ri(SP_REG,4); + if(srcreg + 8 != src) { + mov_l_rr(srcreg + 8, src); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* NOP.L */ +uae_u32 REGPARAM2 op_4e71_0_comp_nf(uae_u32 opcode) /* NOP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* RTD.L #.W */ +uae_u32 REGPARAM2 op_4e74_0_comp_nf(uae_u32 opcode) /* RTD */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + add_l_ri(offs,4); + { + int newad=scratchie++; + readlong(SP_REG,newad,scratchie); + mov_l_mr(JITPTR ®s.pc,newad); + get_n_addr_jmp(newad,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + add_l(SP_REG,offs); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* RTS.L */ +uae_u32 REGPARAM2 op_4e75_0_comp_nf(uae_u32 opcode) /* RTS */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int newad=scratchie++; + readlong(SP_REG,newad,scratchie); + mov_l_mr(JITPTR ®s.pc,newad); + get_n_addr_jmp(newad,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + lea_l_brr(SP_REG,SP_REG,4); + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (An) */ +uae_u32 REGPARAM2 op_4e90_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (d16,An) */ +uae_u32 REGPARAM2 op_4ea8_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4eb0_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (xxx).W */ +uae_u32 REGPARAM2 op_4eb8_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (xxx).L */ +uae_u32 REGPARAM2 op_4eb9_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (d16,PC) */ +uae_u32 REGPARAM2 op_4eba_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JSR.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4ebb_0_comp_nf(uae_u32 opcode) /* JSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (An) */ +uae_u32 REGPARAM2 op_4ed0_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (d16,An) */ +uae_u32 REGPARAM2 op_4ee8_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (d8,An,Xn) */ +uae_u32 REGPARAM2 op_4ef0_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (xxx).W */ +uae_u32 REGPARAM2 op_4ef8_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (xxx).L */ +uae_u32 REGPARAM2 op_4ef9_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (d16,PC) */ +uae_u32 REGPARAM2 op_4efa_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* JMP.L (d8,PC,Xn) */ +uae_u32 REGPARAM2 op_4efb_0_comp_nf(uae_u32 opcode) /* JMP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + mov_l_mr(JITPTR ®s.pc,srca); + get_n_addr_jmp(srca,PC_P,scratchie); + mov_l_mr(JITPTR ®s.pc_oldp,PC_P); + m68k_pc_offset=0; + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,Dn */ +uae_u32 REGPARAM2 op_5000_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(An) */ +uae_u32 REGPARAM2 op_5010_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5018_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5020_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5028_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5030_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5038_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5039_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,Dn */ +uae_u32 REGPARAM2 op_5040_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDAQ.W #,An */ +uae_u32 REGPARAM2 op_5048_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(An) */ +uae_u32 REGPARAM2 op_5050_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5058_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5060_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5068_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5070_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5078_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5079_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,Dn */ +uae_u32 REGPARAM2 op_5080_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDAQ.L #,An */ +uae_u32 REGPARAM2 op_5088_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(An) */ +uae_u32 REGPARAM2 op_5090_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5098_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_5 +/* ADDQ.L #,-(An) */ +uae_u32 REGPARAM2 op_50a0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_50a8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_50b0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_50b8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_50b9_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_50c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_50c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_50d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_50d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_50e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_50e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_50f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_50f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_50f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + mov_l_ri(val,0); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,Dn */ +uae_u32 REGPARAM2 op_5100_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(An) */ +uae_u32 REGPARAM2 op_5110_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(An)+ */ +uae_u32 REGPARAM2 op_5118_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,-(An) */ +uae_u32 REGPARAM2 op_5120_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(d16,An) */ +uae_u32 REGPARAM2 op_5128_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5130_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(xxx).W */ +uae_u32 REGPARAM2 op_5138_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.B #,(xxx).L */ +uae_u32 REGPARAM2 op_5139_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,Dn */ +uae_u32 REGPARAM2 op_5140_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBAQ.W #,An */ +uae_u32 REGPARAM2 op_5148_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(An) */ +uae_u32 REGPARAM2 op_5150_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(An)+ */ +uae_u32 REGPARAM2 op_5158_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,-(An) */ +uae_u32 REGPARAM2 op_5160_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(d16,An) */ +uae_u32 REGPARAM2 op_5168_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_5170_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(xxx).W */ +uae_u32 REGPARAM2 op_5178_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.W #,(xxx).L */ +uae_u32 REGPARAM2 op_5179_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,Dn */ +uae_u32 REGPARAM2 op_5180_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBAQ.L #,An */ +uae_u32 REGPARAM2 op_5188_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(An) */ +uae_u32 REGPARAM2 op_5190_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(An)+ */ +uae_u32 REGPARAM2 op_5198_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,-(An) */ +uae_u32 REGPARAM2 op_51a0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(d16,An) */ +uae_u32 REGPARAM2 op_51a8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_51b0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(xxx).W */ +uae_u32 REGPARAM2 op_51b8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBQ.L #,(xxx).L */ +uae_u32 REGPARAM2 op_51b9_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_51c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_51c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + start_needflags(); + sub_w_ri(src,1); + end_needflags(); + { + uae_u32 v2; + uae_u32 v1=get_const(PC_P); + v2=get_const(offs); + register_branch(v1,v2,3); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_51d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_51d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_51e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_51e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_51f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_51f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_51f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + mov_l_ri(val,1); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_52c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_52c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,7); + cmov_l_rr(src,nsrc,7); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_52d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_52d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_52e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_52e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_52f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_52f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_52f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,6); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_53c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_53c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,6); + cmov_l_rr(src,nsrc,6); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_53d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_53d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_53e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_53e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_53f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_53f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_53f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,7); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_54c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_54c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,3); + cmov_l_rr(src,nsrc,3); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_54d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_54d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_54e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_54e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_54f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_54f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_54f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,2); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_55c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_55c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,2); + cmov_l_rr(src,nsrc,2); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_55d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_55d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_55e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_55e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_55f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_55f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_55f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,3); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_56c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_56c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,5); + cmov_l_rr(src,nsrc,5); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_56d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_56d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_56e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_56e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_56f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_56f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_56f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,4); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_57c0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_57c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,4); + cmov_l_rr(src,nsrc,4); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_57d0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_57d8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_57e0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_57e8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_57f0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_57f8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_57f9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,5); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5ac0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5ac8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,9); + cmov_l_rr(src,nsrc,9); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5ad0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5ad8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5ae0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5ae8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5af0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5af8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5af9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,8); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5bc0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5bc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,8); + cmov_l_rr(src,nsrc,8); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5bd0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5bd8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5be0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5be8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5bf0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5bf8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5bf9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,9); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5cc0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5cc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,13); + cmov_l_rr(src,nsrc,13); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5cd0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5cd8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5ce0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5ce8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5cf0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5cf8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5cf9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,12); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5dc0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5dc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,12); + cmov_l_rr(src,nsrc,12); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5dd0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5dd8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5de0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5de8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5df0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5df8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5df9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,13); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5ec0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5ec8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,15); + cmov_l_rr(src,nsrc,15); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5ed0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5ed8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5ee0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5ee8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5ef0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5ef8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5ef9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,14); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B Dn */ +uae_u32 REGPARAM2 op_5fc0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + if(srcreg != val) { + mov_b_rr(srcreg, val); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* DBcc.W Dn,#.W */ +uae_u32 REGPARAM2 op_5fc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int offs = scratchie++; + mov_l_ri(offs, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(offs,offs); + sub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(offs,JITPTR comp_pc_p); + add_l_ri(offs,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + { + int nsrc=scratchie++; + make_flags_live(); + mov_l_rr(nsrc,src); + lea_l_brr(scratchie,src,(uae_s32)-1); + mov_w_rr(src,scratchie); + cmov_l_rr(offs,PC_P,14); + cmov_l_rr(src,nsrc,14); + start_needflags(); + test_w_rr(nsrc,nsrc); + end_needflags(); + cmov_l_rr(PC_P,offs,5); + if(srcreg != src) { + mov_w_rr(srcreg, src); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An) */ +uae_u32 REGPARAM2 op_5fd0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (An)+ */ +uae_u32 REGPARAM2 op_5fd8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B -(An) */ +uae_u32 REGPARAM2 op_5fe0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d16,An) */ +uae_u32 REGPARAM2 op_5fe8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (d8,An,Xn) */ +uae_u32 REGPARAM2 op_5ff0_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).W */ +uae_u32 REGPARAM2 op_5ff8_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Scc.B (xxx).L */ +uae_u32 REGPARAM2 op_5ff9_0_comp_nf(uae_u32 opcode) /* Scc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int val = scratchie++; + make_flags_live(); + setcc(val,15); + sub_b_ri(val,1); + writebyte(srca, val, scratchie); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6000_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6001_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_60ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + mov_l_rr(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSR.W #.W */ +uae_u32 REGPARAM2 op_6100_0_comp_nf(uae_u32 opcode) /* BSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSRQ.B # */ +uae_u32 REGPARAM2 op_6101_0_comp_nf(uae_u32 opcode) /* BSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BSR.L #.L */ +uae_u32 REGPARAM2 op_61ff_0_comp_nf(uae_u32 opcode) /* BSR */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + uae_u32 retadd=(uae_u32)(start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset); + int ret=scratchie++; + mov_l_ri(ret,retadd); + sub_l_ri(SP_REG,4); + writelong_clobber(SP_REG,ret,scratchie); + add_l_ri(src,m68k_pc_offset_thisinst+2); + m68k_pc_offset=0; + add_l(PC_P,src); + comp_pc_p=(uae_u8*)(uintptr)get_const(PC_P); + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6200_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6201_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_62ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,7); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6300_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6301_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_6 +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_63ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,6); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6400_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6401_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_64ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,3); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6500_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6501_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_65ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,2); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6600_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6601_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_66ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,5); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6700_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6701_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_67ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,4); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6a00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6a01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6aff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,9); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6b00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6b01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6bff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,8); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6c00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6c01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6cff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,13); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6d00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6d01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6dff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,12); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6e00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6e01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6eff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,15); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.W #.W */ +uae_u32 REGPARAM2 op_6f00_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sign_extend_16_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* BccQ.B # */ +uae_u32 REGPARAM2 op_6f01_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + sign_extend_8_rr(src,src); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* Bcc.L #.L */ +uae_u32 REGPARAM2 op_6fff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2); + add_l_ri(src,JITPTR comp_pc_p); + mov_l_ri(PC_P,JITPTR comp_pc_p); + add_l_ri(src,m68k_pc_offset); + add_l_ri(PC_P,m68k_pc_offset); + m68k_pc_offset=0; + uae_u32 v1=get_const(PC_P); + uae_u32 v2=get_const(src); + register_branch(v1,v2,14); + make_flags_live(); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVEQ.L #,Dn */ +uae_u32 REGPARAM2 op_7000_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 8) & 255); + #else + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, srcreg); + { + int dst = dstreg; + dont_care_flags(); + mov_l_rr(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,Dn */ +uae_u32 REGPARAM2 op_8000_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (An),Dn */ +uae_u32 REGPARAM2 op_8010_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (An)+,Dn */ +uae_u32 REGPARAM2 op_8018_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B -(An),Dn */ +uae_u32 REGPARAM2 op_8020_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_8028_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8030_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8038_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8039_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_803a_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_803b_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B #.B,Dn */ +uae_u32 REGPARAM2 op_803c_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,Dn */ +uae_u32 REGPARAM2 op_8040_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (An),Dn */ +uae_u32 REGPARAM2 op_8050_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (An)+,Dn */ +uae_u32 REGPARAM2 op_8058_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W -(An),Dn */ +uae_u32 REGPARAM2 op_8060_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_8068_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_8070_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_8078_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_8079_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_807a_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_807b_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W #.W,Dn */ +uae_u32 REGPARAM2 op_807c_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,Dn */ +uae_u32 REGPARAM2 op_8080_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (An),Dn */ +uae_u32 REGPARAM2 op_8090_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (An)+,Dn */ +uae_u32 REGPARAM2 op_8098_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L -(An),Dn */ +uae_u32 REGPARAM2 op_80a0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_80a8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_80b0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_80b8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_80b9_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_80ba_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_80bb_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L #.L,Dn */ +uae_u32 REGPARAM2 op_80bc_0_comp_nf(uae_u32 opcode) /* OR */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + { + or_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(An) */ +uae_u32 REGPARAM2 op_8110_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_8118_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_8120_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8128_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8130_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8138_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8139_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(An) */ +uae_u32 REGPARAM2 op_8150_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_8158_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_8160_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_8168_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_8170_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_8178_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_8179_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l(dst,scratchie); + forget_about(scratchie); + } else + or_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(An) */ +uae_u32 REGPARAM2 op_8190_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_8198_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_81a0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_81a8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_81b0_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_81b8_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* OR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_81b9_0_comp_nf(uae_u32 opcode) /* OR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + or_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,Dn */ +uae_u32 REGPARAM2 op_9000_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (An),Dn */ +uae_u32 REGPARAM2 op_9010_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (An)+,Dn */ +uae_u32 REGPARAM2 op_9018_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B -(An),Dn */ +uae_u32 REGPARAM2 op_9020_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_9028_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9030_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9038_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9039_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_903a_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_903b_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B #.B,Dn */ +uae_u32 REGPARAM2 op_903c_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + sub_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,Dn */ +uae_u32 REGPARAM2 op_9040_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W An,Dn */ +uae_u32 REGPARAM2 op_9048_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (An),Dn */ +uae_u32 REGPARAM2 op_9050_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (An)+,Dn */ +uae_u32 REGPARAM2 op_9058_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W -(An),Dn */ +uae_u32 REGPARAM2 op_9060_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_9068_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_9070_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_9078_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_9079_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_907a_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_907b_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W #.W,Dn */ +uae_u32 REGPARAM2 op_907c_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + sub_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,Dn */ +uae_u32 REGPARAM2 op_9080_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L An,Dn */ +uae_u32 REGPARAM2 op_9088_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (An),Dn */ +uae_u32 REGPARAM2 op_9090_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (An)+,Dn */ +uae_u32 REGPARAM2 op_9098_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L -(An),Dn */ +uae_u32 REGPARAM2 op_90a0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_90a8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_90b0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_90b8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_90b9_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_90ba_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_90bb_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L #.L,Dn */ +uae_u32 REGPARAM2 op_90bc_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + sub_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W Dn,An */ +uae_u32 REGPARAM2 op_90c0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W An,An */ +uae_u32 REGPARAM2 op_90c8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (An),An */ +uae_u32 REGPARAM2 op_90d0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (An)+,An */ +uae_u32 REGPARAM2 op_90d8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W -(An),An */ +uae_u32 REGPARAM2 op_90e0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (d16,An),An */ +uae_u32 REGPARAM2 op_90e8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_90f0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_90f8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_90f9_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_90fa_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_90fb_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.W #.W,An */ +uae_u32 REGPARAM2 op_90fc_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.B Dn,Dn */ +uae_u32 REGPARAM2 op_9100_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_9108_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + restore_carry(); + sbb_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(An) */ +uae_u32 REGPARAM2 op_9110_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_9118_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,-(An) */ +uae_u32 REGPARAM2 op_9120_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9128_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9130_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9138_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9139_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + sub_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.W Dn,Dn */ +uae_u32 REGPARAM2 op_9140_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_9148_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + restore_carry(); + sbb_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(An) */ +uae_u32 REGPARAM2 op_9150_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_9158_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,-(An) */ +uae_u32 REGPARAM2 op_9160_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_9168_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_9170_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_9178_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_9179_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + sub_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.L Dn,Dn */ +uae_u32 REGPARAM2 op_9180_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_9188_0_comp_nf(uae_u32 opcode) /* SUBX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + restore_carry(); + sbb_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(An) */ +uae_u32 REGPARAM2 op_9190_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_9198_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,-(An) */ +uae_u32 REGPARAM2 op_91a0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_91a8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_91b0_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_91b8_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUB.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_91b9_0_comp_nf(uae_u32 opcode) /* SUB */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + sub_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L Dn,An */ +uae_u32 REGPARAM2 op_91c0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L An,An */ +uae_u32 REGPARAM2 op_91c8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (An),An */ +uae_u32 REGPARAM2 op_91d0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (An)+,An */ +uae_u32 REGPARAM2 op_91d8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L -(An),An */ +uae_u32 REGPARAM2 op_91e0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (d16,An),An */ +uae_u32 REGPARAM2 op_91e8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_91f0_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_91f8_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_91f9_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_91fa_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_91fb_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* SUBA.L #.L,An */ +uae_u32 REGPARAM2 op_91fc_0_comp_nf(uae_u32 opcode) /* SUBA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + sub_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B Dn,Dn */ +uae_u32 REGPARAM2 op_b000_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (An),Dn */ +uae_u32 REGPARAM2 op_b010_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (An)+,Dn */ +uae_u32 REGPARAM2 op_b018_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B -(An),Dn */ +uae_u32 REGPARAM2 op_b020_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_b028_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b030_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b038_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b039_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b03a_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b03b_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.B #.B,Dn */ +uae_u32 REGPARAM2 op_b03c_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W Dn,Dn */ +uae_u32 REGPARAM2 op_b040_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W An,Dn */ +uae_u32 REGPARAM2 op_b048_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (An),Dn */ +uae_u32 REGPARAM2 op_b050_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (An)+,Dn */ +uae_u32 REGPARAM2 op_b058_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W -(An),Dn */ +uae_u32 REGPARAM2 op_b060_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_b068_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b070_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b078_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b079_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b07a_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b07b_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.W #.W,Dn */ +uae_u32 REGPARAM2 op_b07c_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L Dn,Dn */ +uae_u32 REGPARAM2 op_b080_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L An,Dn */ +uae_u32 REGPARAM2 op_b088_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (An),Dn */ +uae_u32 REGPARAM2 op_b090_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (An)+,Dn */ +uae_u32 REGPARAM2 op_b098_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L -(An),Dn */ +uae_u32 REGPARAM2 op_b0a0_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#ifdef PART_7 +/* CMP.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_b0a8_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_b0b0_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_b0b8_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_b0b9_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_b0ba_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_b0bb_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMP.L #.L,Dn */ +uae_u32 REGPARAM2 op_b0bc_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W Dn,An */ +uae_u32 REGPARAM2 op_b0c0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W An,An */ +uae_u32 REGPARAM2 op_b0c8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (An),An */ +uae_u32 REGPARAM2 op_b0d0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (An)+,An */ +uae_u32 REGPARAM2 op_b0d8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W -(An),An */ +uae_u32 REGPARAM2 op_b0e0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (d16,An),An */ +uae_u32 REGPARAM2 op_b0e8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b0f0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_b0f8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_b0f9_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_b0fa_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b0fb_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.W #.W,An */ +uae_u32 REGPARAM2 op_b0fc_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + sign_extend_16_rr(tmps,src); + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,Dn */ +uae_u32 REGPARAM2 op_b100_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPM.B (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b108_0_comp_nf(uae_u32 opcode) /* CMPM */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(An) */ +uae_u32 REGPARAM2 op_b110_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_b118_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,-(An) */ +uae_u32 REGPARAM2 op_b120_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b128_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b130_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b138_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b139_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_b(dst,src); + } + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,Dn */ +uae_u32 REGPARAM2 op_b140_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPM.W (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b148_0_comp_nf(uae_u32 opcode) /* CMPM */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(An) */ +uae_u32 REGPARAM2 op_b150_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_b158_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,-(An) */ +uae_u32 REGPARAM2 op_b160_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b168_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b170_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b178_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b179_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + { + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + xor_l(dst,scratchie); + forget_about(scratchie); + } else + xor_w(dst,src); + } + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,Dn */ +uae_u32 REGPARAM2 op_b180_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + { + xor_l(dst,src); + } + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPM.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_b188_0_comp_nf(uae_u32 opcode) /* CMPM */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + { + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(An) */ +uae_u32 REGPARAM2 op_b190_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_b198_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,-(An) */ +uae_u32 REGPARAM2 op_b1a0_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_b1a8_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_b1b0_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_b1b8_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EOR.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_b1b9_0_comp_nf(uae_u32 opcode) /* EOR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + { + xor_l(dst,src); + } + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L Dn,An */ +uae_u32 REGPARAM2 op_b1c0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L An,An */ +uae_u32 REGPARAM2 op_b1c8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (An),An */ +uae_u32 REGPARAM2 op_b1d0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (An)+,An */ +uae_u32 REGPARAM2 op_b1d8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L -(An),An */ +uae_u32 REGPARAM2 op_b1e0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (d16,An),An */ +uae_u32 REGPARAM2 op_b1e8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_b1f0_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_b1f8_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_b1f9_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_b1fa_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_b1fb_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* CMPA.L #.L,An */ +uae_u32 REGPARAM2 op_b1fc_0_comp_nf(uae_u32 opcode) /* CMPA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmps=scratchie++; + tmps=src; + dont_care_flags(); + /* Weird --- CMP with noflags ;-) */ + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,Dn */ +uae_u32 REGPARAM2 op_c000_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (An),Dn */ +uae_u32 REGPARAM2 op_c010_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (An)+,Dn */ +uae_u32 REGPARAM2 op_c018_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B -(An),Dn */ +uae_u32 REGPARAM2 op_c020_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_c028_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c030_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c038_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c039_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c03a_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c03b_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B #.B,Dn */ +uae_u32 REGPARAM2 op_c03c_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,Dn */ +uae_u32 REGPARAM2 op_c040_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (An),Dn */ +uae_u32 REGPARAM2 op_c050_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c058_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W -(An),Dn */ +uae_u32 REGPARAM2 op_c060_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c068_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c070_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c078_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c079_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c07a_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c07b_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W #.W,Dn */ +uae_u32 REGPARAM2 op_c07c_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,Dn */ +uae_u32 REGPARAM2 op_c080_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (An),Dn */ +uae_u32 REGPARAM2 op_c090_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (An)+,Dn */ +uae_u32 REGPARAM2 op_c098_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L -(An),Dn */ +uae_u32 REGPARAM2 op_c0a0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0a8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0b0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0b8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0b9_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0ba_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0bb_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L #.L,Dn */ +uae_u32 REGPARAM2 op_c0bc_0_comp_nf(uae_u32 opcode) /* AND */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + and_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W Dn,Dn */ +uae_u32 REGPARAM2 op_c0c0_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int src = srcreg; + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (An),Dn */ +uae_u32 REGPARAM2 op_c0d0_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c0d8_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W -(An),Dn */ +uae_u32 REGPARAM2 op_c0e0_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c0e8_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c0f0_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c0f8_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c0f9_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c0fa_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c0fb_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULU.W #.W,Dn */ +uae_u32 REGPARAM2 op_c0fc_0_comp_nf(uae_u32 opcode) /* MULU */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + zero_extend_16_rr(scratchie,src); + zero_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(An) */ +uae_u32 REGPARAM2 op_c110_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_c118_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,-(An) */ +uae_u32 REGPARAM2 op_c120_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c128_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c130_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c138_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c139_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_8_rr(scratchie,src); + or_l_ri(scratchie,0xffffff00); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXG.L Dn,Dn */ +uae_u32 REGPARAM2 op_c140_0_comp_nf(uae_u32 opcode) /* EXG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + int tmp=scratchie++; + mov_l_rr(tmp,src); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + if(dstreg != tmp) { + mov_l_rr(dstreg, tmp); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXG.L An,An */ +uae_u32 REGPARAM2 op_c148_0_comp_nf(uae_u32 opcode) /* EXG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + mov_l_rr(tmp,src); + if(srcreg + 8 != dst) { + mov_l_rr(srcreg + 8, dst); + } + if(dstreg + 8 != tmp) { + mov_l_rr(dstreg + 8, tmp); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(An) */ +uae_u32 REGPARAM2 op_c150_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_c158_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,-(An) */ +uae_u32 REGPARAM2 op_c160_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c168_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c170_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c178_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c179_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + if (kill_rodent(dst)) { + zero_extend_16_rr(scratchie,src); + or_l_ri(scratchie,0xffff0000); + and_l(dst,scratchie); + forget_about(scratchie); + } else + and_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* EXG.L Dn,An */ +uae_u32 REGPARAM2 op_c188_0_comp_nf(uae_u32 opcode) /* EXG */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + mov_l_rr(tmp,src); + if(srcreg != dst) { + mov_l_rr(srcreg, dst); + } + if(dstreg + 8 != tmp) { + mov_l_rr(dstreg + 8, tmp); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(An) */ +uae_u32 REGPARAM2 op_c190_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_c198_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,-(An) */ +uae_u32 REGPARAM2 op_c1a0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_c1a8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_c1b0_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_c1b8_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* AND.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_c1b9_0_comp_nf(uae_u32 opcode) /* AND */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + and_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W Dn,Dn */ +uae_u32 REGPARAM2 op_c1c0_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int src = srcreg; + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (An),Dn */ +uae_u32 REGPARAM2 op_c1d0_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (An)+,Dn */ +uae_u32 REGPARAM2 op_c1d8_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W -(An),Dn */ +uae_u32 REGPARAM2 op_c1e0_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_c1e8_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_c1f0_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_c1f8_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_c1f9_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_c1fa_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_c1fb_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MULS.W #.W,Dn */ +uae_u32 REGPARAM2 op_c1fc_0_comp_nf(uae_u32 opcode) /* MULS */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + sign_extend_16_rr(scratchie,src); + sign_extend_16_rr(dst,dst); + imul_32_32(dst,scratchie); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,Dn */ +uae_u32 REGPARAM2 op_d000_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (An),Dn */ +uae_u32 REGPARAM2 op_d010_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (An)+,Dn */ +uae_u32 REGPARAM2 op_d018_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + lea_l_brr(srcreg + 8,srcreg + 8, areg_byteinc[srcreg]); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B -(An),Dn */ +uae_u32 REGPARAM2 op_d020_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (d16,An),Dn */ +uae_u32 REGPARAM2 op_d028_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d030_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d038_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d039_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d03a_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d03b_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B #.B,Dn */ +uae_u32 REGPARAM2 op_d03c_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s8)comp_get_ibyte((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + add_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,Dn */ +uae_u32 REGPARAM2 op_d040_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W An,Dn */ +uae_u32 REGPARAM2 op_d048_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (An),Dn */ +uae_u32 REGPARAM2 op_d050_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (An)+,Dn */ +uae_u32 REGPARAM2 op_d058_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W -(An),Dn */ +uae_u32 REGPARAM2 op_d060_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (d16,An),Dn */ +uae_u32 REGPARAM2 op_d068_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d070_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d078_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d079_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d07a_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d07b_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W #.W,Dn */ +uae_u32 REGPARAM2 op_d07c_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dstreg; + dont_care_flags(); + add_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,Dn */ +uae_u32 REGPARAM2 op_d080_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L An,Dn */ +uae_u32 REGPARAM2 op_d088_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (An),Dn */ +uae_u32 REGPARAM2 op_d090_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (An)+,Dn */ +uae_u32 REGPARAM2 op_d098_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L -(An),Dn */ +uae_u32 REGPARAM2 op_d0a0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (d16,An),Dn */ +uae_u32 REGPARAM2 op_d0a8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (d8,An,Xn),Dn */ +uae_u32 REGPARAM2 op_d0b0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (xxx).W,Dn */ +uae_u32 REGPARAM2 op_d0b8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (xxx).L,Dn */ +uae_u32 REGPARAM2 op_d0b9_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (d16,PC),Dn */ +uae_u32 REGPARAM2 op_d0ba_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L (d8,PC,Xn),Dn */ +uae_u32 REGPARAM2 op_d0bb_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L #.L,Dn */ +uae_u32 REGPARAM2 op_d0bc_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dstreg; + dont_care_flags(); + add_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W Dn,An */ +uae_u32 REGPARAM2 op_d0c0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W An,An */ +uae_u32 REGPARAM2 op_d0c8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (An),An */ +uae_u32 REGPARAM2 op_d0d0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (An)+,An */ +uae_u32 REGPARAM2 op_d0d8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readword(srca,src,scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 2); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W -(An),An */ +uae_u32 REGPARAM2 op_d0e0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (d16,An),An */ +uae_u32 REGPARAM2 op_d0e8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d0f0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (xxx).W,An */ +uae_u32 REGPARAM2 op_d0f8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (xxx).L,An */ +uae_u32 REGPARAM2 op_d0f9_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (d16,PC),An */ +uae_u32 REGPARAM2 op_d0fa_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d0fb_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readword(srca,src,scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.W #.W,An */ +uae_u32 REGPARAM2 op_d0fc_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + sign_extend_16_rr(tmp,src); + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.B Dn,Dn */ +uae_u32 REGPARAM2 op_d100_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + restore_carry(); + adc_b(dst,src); + if(dstreg != dst) { + mov_b_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.B -(An),-(An) */ +uae_u32 REGPARAM2 op_d108_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, (uae_s32)-areg_byteinc[srcreg]); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readbyte(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + { + dont_care_flags(); + restore_carry(); + adc_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(An) */ +uae_u32 REGPARAM2 op_d110_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(An)+ */ +uae_u32 REGPARAM2 op_d118_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + lea_l_brr(dstreg + 8,dstreg + 8, areg_byteinc[dstreg]); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,-(An) */ +uae_u32 REGPARAM2 op_d120_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, (uae_s32)-areg_byteinc[dstreg]); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d128_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d130_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d138_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.B Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d139_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readbyte(dsta, dst, scratchie); + dont_care_flags(); + add_b(dst,src); + writebyte(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.W Dn,Dn */ +uae_u32 REGPARAM2 op_d140_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + restore_carry(); + adc_w(dst,src); + if(dstreg != dst) { + mov_w_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.W -(An),-(An) */ +uae_u32 REGPARAM2 op_d148_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -2); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readword(srca,src,scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + { + dont_care_flags(); + restore_carry(); + adc_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(An) */ +uae_u32 REGPARAM2 op_d150_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(An)+ */ +uae_u32 REGPARAM2 op_d158_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 2); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,-(An) */ +uae_u32 REGPARAM2 op_d160_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -2); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d168_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d170_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d178_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.W Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d179_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readword(dsta,dst,scratchie); + dont_care_flags(); + add_w(dst,src); + writeword(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.L Dn,Dn */ +uae_u32 REGPARAM2 op_d180_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dstreg; + { + dont_care_flags(); + restore_carry(); + adc_l(dst,src); + if(dstreg != dst) { + mov_l_rr(dstreg, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDX.L -(An),-(An) */ +uae_u32 REGPARAM2 op_d188_0_comp_nf(uae_u32 opcode) /* ADDX */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + { + dont_care_flags(); + restore_carry(); + adc_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(An) */ +uae_u32 REGPARAM2 op_d190_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(An)+ */ +uae_u32 REGPARAM2 op_d198_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + lea_l_brr(dstreg + 8, dstreg + 8, 4); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,-(An) */ +uae_u32 REGPARAM2 op_d1a0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + lea_l_brr(dstreg + 8, dstreg + 8, -4); + if (dodgy) { + mov_l_rr(dsta, 8 + dstreg); + } + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(d16,An) */ +uae_u32 REGPARAM2 op_d1a8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_rr(dsta, 8 + dstreg); + lea_l_brr(dsta, dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_d1b0_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + calc_disp_ea_020(dstreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), dsta, scratchie); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(xxx).W */ +uae_u32 REGPARAM2 op_d1b8_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADD.L Dn,(xxx).L */ +uae_u32 REGPARAM2 op_d1b9_0_comp_nf(uae_u32 opcode) /* ADD */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dst = scratchie++; + readlong(dsta, dst, scratchie); + dont_care_flags(); + add_l(dst,src); + writelong(dsta, dst, scratchie); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L Dn,An */ +uae_u32 REGPARAM2 op_d1c0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = srcreg; + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L An,An */ +uae_u32 REGPARAM2 op_d1c8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(src, srcreg + 8); + } + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (An),An */ +uae_u32 REGPARAM2 op_d1d0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (An)+,An */ +uae_u32 REGPARAM2 op_d1d8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int src = scratchie++; + readlong(srca, src, scratchie); + lea_l_brr(srcreg + 8, srcreg + 8, 4); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L -(An),An */ +uae_u32 REGPARAM2 op_d1e0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + { + int srca = dodgy ? scratchie++ : srcreg + 8; + lea_l_brr(srcreg + 8, srcreg + 8, -4); + if (dodgy) { + mov_l_rr(srca, 8 + srcreg); + } + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (d16,An),An */ +uae_u32 REGPARAM2 op_d1e8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_rr(srca, 8 + srcreg); + lea_l_brr(srca, srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (d8,An,Xn),An */ +uae_u32 REGPARAM2 op_d1f0_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + calc_disp_ea_020(srcreg + 8, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (xxx).W,An */ +uae_u32 REGPARAM2 op_d1f8_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (xxx).L,An */ +uae_u32 REGPARAM2 op_d1f9_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (d16,PC),An */ +uae_u32 REGPARAM2 op_d1fa_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + uae_s32 PC16off = (uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2); + mov_l_ri(srca, address + PC16off); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L (d8,PC,Xn),An */ +uae_u32 REGPARAM2 op_d1fb_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int pctmp = scratchie++; + int srca = scratchie++; + uae_u32 address = (uae_u32)(start_pc + ((char *)comp_pc_p - (char *)start_pc_p) + m68k_pc_offset); + { + mov_l_ri(pctmp,address); + calc_disp_ea_020(pctmp, comp_get_iword((m68k_pc_offset+=2)-2), srca, scratchie); + { + int src = scratchie++; + readlong(srca, src, scratchie); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ADDA.L #.L,An */ +uae_u32 REGPARAM2 op_d1fc_0_comp_nf(uae_u32 opcode) /* ADDA */ +{ + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + { + int src = scratchie++; + mov_l_ri(src, comp_get_ilong((m68k_pc_offset+=4)-4)); + { + int dst = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dst, dstreg + 8); + } + { + int tmp=scratchie++; + tmp=src; + add_l(dst,tmp); + if(dstreg + 8 != dst) { + mov_l_rr(dstreg + 8, dst); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* ASRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e000_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shra_b_ri(data,srcreg); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSRQ.B #,Dn */ +uae_u32 REGPARAM2 op_e008_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shrl_b_ri(data,srcreg); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* RORQ.B #,Dn */ +uae_u32 REGPARAM2 op_e018_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + ror_b_rr(data,cnt); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e020_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int setval = scratchie++; + mov_l_ri(cdata, 0); + mov_l_ri(setval, 0xffffffff); + test_l_ri(data, 0x00000080); + cmov_l_rr(setval, cdata, NATIVE_CC_EQ); + mov_l_rr(cdata, setval); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x08); + cmov_l_rr(cdata, setval, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shra_b_rr(cdata, tmpcnt); + mov_b_rr(data, cdata); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e028_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x08); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shrl_b_rr(cdata, tmpcnt); + mov_b_rr(data, cdata); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROR.B Dn,Dn */ +uae_u32 REGPARAM2 op_e038_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + ror_b_rr(data,cnt); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e040_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shra_w_ri(data,srcreg); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +#endif + +#ifdef PART_8 +/* LSRQ.W #,Dn */ +uae_u32 REGPARAM2 op_e048_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shrl_w_ri(data,srcreg); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* RORQ.W #,Dn */ +uae_u32 REGPARAM2 op_e058_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + ror_w_rr(data,cnt); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e060_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int setval = scratchie++; + mov_l_ri(cdata, 0); + mov_l_ri(setval, 0xffffffff); + test_l_ri(data, 0x00008000); + cmov_l_rr(setval, cdata, NATIVE_CC_EQ); + mov_l_rr(cdata, setval); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x10); + cmov_l_rr(cdata, setval, NATIVE_CC_HI); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shra_w_rr(cdata, tmpcnt); + mov_w_rr(data, cdata); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e068_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x10); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shrl_w_rr(cdata, tmpcnt); + mov_w_rr(data, cdata); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROR.W Dn,Dn */ +uae_u32 REGPARAM2 op_e078_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + ror_w_rr(data,cnt); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e080_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shra_l_ri(data,srcreg); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSRQ.L #,Dn */ +uae_u32 REGPARAM2 op_e088_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shrl_l_ri(data,srcreg); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* RORQ.L #,Dn */ +uae_u32 REGPARAM2 op_e098_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + ror_l_rr(data,cnt); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a0_0_comp_nf(uae_u32 opcode) /* ASR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + int setval = scratchie++; + mov_l_ri(cdata, 0); + mov_l_ri(setval, 0xffffffff); + test_l_ri(data, 0x80000000); + cmov_l_rr(setval, cdata, NATIVE_CC_EQ); + mov_l_rr(cdata, setval); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x20); + cmov_l_rr(cdata, setval, NATIVE_CC_HI); + cmov_l_rr(data, setval, NATIVE_CC_EQ); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shra_l_rr(cdata, tmpcnt); + mov_l_rr(data, cdata); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0a8_0_comp_nf(uae_u32 opcode) /* LSR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x20); + cmov_l_rr(data, cdata, NATIVE_CC_EQ); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shrl_l_rr(cdata, tmpcnt); + mov_l_rr(data, cdata); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROR.L Dn,Dn */ +uae_u32 REGPARAM2 op_e0b8_0_comp_nf(uae_u32 opcode) /* ROR */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + ror_l_rr(data,cnt); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e100_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shll_b_ri(data,srcreg); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e108_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shll_b_ri(data,srcreg); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROLQ.B #,Dn */ +uae_u32 REGPARAM2 op_e118_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + rol_b_rr(data,cnt); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e120_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x08); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_b_rr(cdata, tmpcnt); + mov_b_rr(data, cdata); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e128_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x08); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_b_rr(cdata, tmpcnt); + mov_b_rr(data, cdata); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROL.B Dn,Dn */ +uae_u32 REGPARAM2 op_e138_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + rol_b_rr(data,cnt); + if(dstreg != data) { + mov_b_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e140_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shll_w_ri(data,srcreg); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e148_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shll_w_ri(data,srcreg); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROLQ.W #,Dn */ +uae_u32 REGPARAM2 op_e158_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + rol_w_rr(data,cnt); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e160_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x10); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_w_rr(cdata, tmpcnt); + mov_w_rr(data, cdata); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e168_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x10); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_w_rr(cdata, tmpcnt); + mov_w_rr(data, cdata); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROL.W Dn,Dn */ +uae_u32 REGPARAM2 op_e178_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + rol_w_rr(data,cnt); + if(dstreg != data) { + mov_w_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e180_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shll_l_ri(data,srcreg); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e188_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + shll_l_ri(data,srcreg); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROLQ.L #,Dn */ +uae_u32 REGPARAM2 op_e198_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = imm8_table[((opcode >> 1) & 7)]; + #else + uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + dont_care_flags(); + { + int cnt = scratchie++; + mov_l_ri(cnt, srcreg); + { + int data = dstreg; + { + rol_l_rr(data,cnt); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ASL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a0_0_comp_nf(uae_u32 opcode) /* ASL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + if (needed_flags & FLAG_V) { + FAIL(1); + return 0; + } + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x20); + cmov_l_rr(data, cdata, NATIVE_CC_EQ); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_l_rr(cdata, tmpcnt); + mov_l_rr(data, cdata); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* LSL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1a8_0_comp_nf(uae_u32 opcode) /* LSL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + { + int cdata = scratchie++; + int tmpcnt = scratchie++; + mov_l_ri(cdata, 0); + mov_l_rr(tmpcnt, cnt); + and_l_ri(tmpcnt, 63); + cmp_b_ri(tmpcnt, 0x20); + cmov_l_rr(data, cdata, NATIVE_CC_EQ); + cmov_l_rr(cdata, data, NATIVE_CC_LS); + shll_l_rr(cdata, tmpcnt); + mov_l_rr(data, cdata); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* ROL.L Dn,Dn */ +uae_u32 REGPARAM2 op_e1b8_0_comp_nf(uae_u32 opcode) /* ROL */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 1) & 7); + #else + uae_s32 srcreg = ((opcode >> 9) & 7); + #endif + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + if ((uae_u32)srcreg==(uae_u32)dstreg) { + FAIL(1); + return 0; + } + { + dont_care_flags(); + { + int cnt = srcreg; + { + int data = dstreg; + { + rol_l_rr(data,cnt); + if(dstreg != data) { + mov_l_rr(dstreg, data); + } + } + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,Dn */ +uae_u32 REGPARAM2 op_f200_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,An */ +uae_u32 REGPARAM2 op_f208_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(An) */ +uae_u32 REGPARAM2 op_f210_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_f218_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,-(An) */ +uae_u32 REGPARAM2 op_f220_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_f228_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_f230_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_f238_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_f239_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(d16,PC) */ +uae_u32 REGPARAM2 op_f23a_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_s32 dstreg = 2; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,(d8,PC,Xn) */ +uae_u32 REGPARAM2 op_f23b_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_s32 dstreg = 3; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FPP.L #.W,#.L */ +uae_u32 REGPARAM2 op_f23c_0_comp_nf(uae_u32 opcode) /* FPP */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fpp_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,Dn */ +uae_u32 REGPARAM2 op_f240_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(An) */ +uae_u32 REGPARAM2 op_f250_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(An)+ */ +uae_u32 REGPARAM2 op_f258_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,-(An) */ +uae_u32 REGPARAM2 op_f260_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(d16,An) */ +uae_u32 REGPARAM2 op_f268_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(d8,An,Xn) */ +uae_u32 REGPARAM2 op_f270_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(xxx).W */ +uae_u32 REGPARAM2 op_f278_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FScc.L #.W,(xxx).L */ +uae_u32 REGPARAM2 op_f279_0_comp_nf(uae_u32 opcode) /* FScc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + uae_u16 extra=comp_get_iword((m68k_pc_offset+=2)-2); + comp_fscc_opp(opcode,extra); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FBccQ.L #,#.W */ +uae_u32 REGPARAM2 op_f280_0_comp_nf(uae_u32 opcode) /* FBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 63); + #else + uae_s32 srcreg = (opcode & 63); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + comp_fbcc_opp(opcode); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* FBccQ.L #,#.L */ +uae_u32 REGPARAM2 op_f2c0_0_comp_nf(uae_u32 opcode) /* FBcc */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 63); + #else + uae_s32 srcreg = (opcode & 63); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + #ifdef USE_JIT_FPU + comp_fbcc_opp(opcode); + #else + failure = 1; + #endif + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + if (failure) { + m68k_pc_offset = m68k_pc_offset_thisinst; + } + return 0; +} +/* MOVE16.L (An)+,(xxx).L */ +uae_u32 REGPARAM2 op_f600_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + { + int srca = scratchie++; + mov_l_rr(srca, srcreg + 8); + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + add_l_ri(srcreg+8,16); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE16.L (xxx).L,(An)+ */ +uae_u32 REGPARAM2 op_f608_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dsta = scratchie++; + mov_l_rr(dsta, dstreg + 8); + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + add_l_ri(dstreg+8,16); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE16.L (An),(xxx).L */ +uae_u32 REGPARAM2 op_f610_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + { + int srca = dodgy ? scratchie++ : srcreg + 8; + if (dodgy) { + mov_l_rr(srca, srcreg + 8); + } + { + int dsta = scratchie++; + mov_l_ri(dsta, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE16.L (xxx).L,(An) */ +uae_u32 REGPARAM2 op_f618_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + uae_u32 dstreg = opcode & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + { + int srca = scratchie++; + mov_l_ri(srca, comp_get_ilong((m68k_pc_offset+=4)-4)); /* absl */ + { + int dsta = dodgy ? scratchie++ : dstreg + 8; + if (dodgy) { + mov_l_rr(dsta, dstreg + 8); + } + mov_l_rr(src,srca); + mov_l_rr(dst,dsta); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +/* MOVE16.L (An)+,(An)+ */ +uae_u32 REGPARAM2 op_f620_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +{ + #if defined(HAVE_GET_WORD_UNSWAPPED) + uae_u32 srcreg = ((opcode >> 8) & 7); + #else + uae_s32 srcreg = (opcode & 7); + #endif + uae_s32 dstreg = 0; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; + { + uae_u8 scratchie=S1; + int src=scratchie++; + int dst=scratchie++; + uae_u16 dstreg=((comp_get_iword((m68k_pc_offset+=2)-2))>>12)&0x07; + mov_l_rr(src,8+srcreg); + mov_l_rr(dst,8+dstreg); + and_l_ri(src,~15); + and_l_ri(dst,~15); + if (srcreg != dstreg) { + add_l_ri(srcreg+8,16); + } + add_l_ri(dstreg+8,16); + if (special_mem || jit_n_addr_unsafe) { + int tmp=scratchie; + scratchie+=4; + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + add_l_ri(src,4); + add_l_ri(dst,4); + readlong(src,tmp,scratchie); + writelong_clobber(dst,tmp,scratchie); + } else + { + int tmp=scratchie; + scratchie+=4; + get_n_addr(src,src,scratchie); + get_n_addr(dst,dst,scratchie); + mov_l_rR(tmp+0,src,0); + mov_l_rR(tmp+1,src,4); + mov_l_rR(tmp+2,src,8); + mov_l_rR(tmp+3,src,12); + mov_l_Rr(dst,tmp+0,0); + forget_about(tmp+0); + mov_l_Rr(dst,tmp+1,4); + forget_about(tmp+1); + mov_l_Rr(dst,tmp+2,8); + forget_about(tmp+2); + mov_l_Rr(dst,tmp+3,12); + } + } + if (m68k_pc_offset > SYNC_PC_OFFSET) { + sync_m68k_pc(); + } + return 0; +} +#endif + +#endif diff --git a/jit/compstbl.cpp b/jit/compstbl.cpp new file mode 100644 index 00000000..05af8957 --- /dev/null +++ b/jit/compstbl.cpp @@ -0,0 +1,3758 @@ +#include "sysconfig.h" +#if defined(JIT) +#include "sysdeps.h" +#include "options.h" +#include "uae/memory.h" +#include "readcpu.h" +#include "newcpu.h" +#include "comptbl.h" +#include "debug.h" +const struct comptbl op_smalltbl_0_comp_ff[] = { +{ op_0_0_comp_ff, 0, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_10_0_comp_ff, 16, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_18_0_comp_ff, 24, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_20_0_comp_ff, 32, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_28_0_comp_ff, 40, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_30_0_comp_ff, 48, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_38_0_comp_ff, 56, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_39_0_comp_ff, 57, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 60, COMP_OPCODE_ISJUMP }, /* ORSR */ +{ op_40_0_comp_ff, 64, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_50_0_comp_ff, 80, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_58_0_comp_ff, 88, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_60_0_comp_ff, 96, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_68_0_comp_ff, 104, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_70_0_comp_ff, 112, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_78_0_comp_ff, 120, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_79_0_comp_ff, 121, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 124, COMP_OPCODE_ISJUMP }, /* ORSR */ +{ op_80_0_comp_ff, 128, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_90_0_comp_ff, 144, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_98_0_comp_ff, 152, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_a0_0_comp_ff, 160, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_a8_0_comp_ff, 168, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_b0_0_comp_ff, 176, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_b8_0_comp_ff, 184, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_b9_0_comp_ff, 185, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 208, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 232, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 240, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 248, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 249, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 250, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 251, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ op_100_0_comp_ff, 256, 0 }, /* BTST */ +{ NULL, 264, COMP_OPCODE_ISJUMP }, /* MVPMR */ +{ op_110_0_comp_ff, 272, 0 }, /* BTST */ +{ op_118_0_comp_ff, 280, 0 }, /* BTST */ +{ op_120_0_comp_ff, 288, 0 }, /* BTST */ +{ op_128_0_comp_ff, 296, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_130_0_comp_ff, 304, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_138_0_comp_ff, 312, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_139_0_comp_ff, 313, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_13a_0_comp_ff, 314, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_13b_0_comp_ff, 315, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_13c_0_comp_ff, 316, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_140_0_comp_ff, 320, 0 }, /* BCHG */ +{ NULL, 328, COMP_OPCODE_ISJUMP }, /* MVPMR */ +{ op_150_0_comp_ff, 336, 0 }, /* BCHG */ +{ op_158_0_comp_ff, 344, 0 }, /* BCHG */ +{ op_160_0_comp_ff, 352, 0 }, /* BCHG */ +{ op_168_0_comp_ff, 360, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_170_0_comp_ff, 368, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_178_0_comp_ff, 376, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_179_0_comp_ff, 377, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_180_0_comp_ff, 384, 0 }, /* BCLR */ +{ NULL, 392, COMP_OPCODE_ISJUMP }, /* MVPRM */ +{ op_190_0_comp_ff, 400, 0 }, /* BCLR */ +{ op_198_0_comp_ff, 408, 0 }, /* BCLR */ +{ op_1a0_0_comp_ff, 416, 0 }, /* BCLR */ +{ op_1a8_0_comp_ff, 424, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_1b0_0_comp_ff, 432, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_1b8_0_comp_ff, 440, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_1b9_0_comp_ff, 441, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_1c0_0_comp_ff, 448, 0 }, /* BSET */ +{ NULL, 456, COMP_OPCODE_ISJUMP }, /* MVPRM */ +{ op_1d0_0_comp_ff, 464, 0 }, /* BSET */ +{ op_1d8_0_comp_ff, 472, 0 }, /* BSET */ +{ op_1e0_0_comp_ff, 480, 0 }, /* BSET */ +{ op_1e8_0_comp_ff, 488, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_1f0_0_comp_ff, 496, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_1f8_0_comp_ff, 504, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_1f9_0_comp_ff, 505, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_200_0_comp_ff, 512, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_210_0_comp_ff, 528, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_218_0_comp_ff, 536, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_220_0_comp_ff, 544, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_228_0_comp_ff, 552, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_230_0_comp_ff, 560, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_238_0_comp_ff, 568, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_239_0_comp_ff, 569, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ NULL, 572, COMP_OPCODE_ISJUMP }, /* ANDSR */ +{ op_240_0_comp_ff, 576, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_250_0_comp_ff, 592, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_258_0_comp_ff, 600, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_260_0_comp_ff, 608, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_268_0_comp_ff, 616, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_270_0_comp_ff, 624, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_278_0_comp_ff, 632, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_279_0_comp_ff, 633, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ NULL, 636, COMP_OPCODE_ISJUMP }, /* ANDSR */ +{ op_280_0_comp_ff, 640, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_290_0_comp_ff, 656, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_298_0_comp_ff, 664, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2a0_0_comp_ff, 672, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2a8_0_comp_ff, 680, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2b0_0_comp_ff, 688, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2b8_0_comp_ff, 696, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2b9_0_comp_ff, 697, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ NULL, 720, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 744, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 752, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 760, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 761, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 762, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 763, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ op_400_0_comp_ff, 1024, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_410_0_comp_ff, 1040, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_418_0_comp_ff, 1048, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_420_0_comp_ff, 1056, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_428_0_comp_ff, 1064, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_430_0_comp_ff, 1072, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_438_0_comp_ff, 1080, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_439_0_comp_ff, 1081, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_440_0_comp_ff, 1088, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_450_0_comp_ff, 1104, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_458_0_comp_ff, 1112, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_460_0_comp_ff, 1120, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_468_0_comp_ff, 1128, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_470_0_comp_ff, 1136, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_478_0_comp_ff, 1144, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_479_0_comp_ff, 1145, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_480_0_comp_ff, 1152, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_490_0_comp_ff, 1168, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_498_0_comp_ff, 1176, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4a0_0_comp_ff, 1184, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4a8_0_comp_ff, 1192, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4b0_0_comp_ff, 1200, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4b8_0_comp_ff, 1208, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4b9_0_comp_ff, 1209, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ NULL, 1232, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1256, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1264, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1272, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1273, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1274, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1275, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ op_600_0_comp_ff, 1536, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_610_0_comp_ff, 1552, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_618_0_comp_ff, 1560, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_620_0_comp_ff, 1568, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_628_0_comp_ff, 1576, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_630_0_comp_ff, 1584, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_638_0_comp_ff, 1592, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_639_0_comp_ff, 1593, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_640_0_comp_ff, 1600, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_650_0_comp_ff, 1616, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_658_0_comp_ff, 1624, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_660_0_comp_ff, 1632, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_668_0_comp_ff, 1640, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_670_0_comp_ff, 1648, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_678_0_comp_ff, 1656, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_679_0_comp_ff, 1657, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_680_0_comp_ff, 1664, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_690_0_comp_ff, 1680, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_698_0_comp_ff, 1688, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6a0_0_comp_ff, 1696, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6a8_0_comp_ff, 1704, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6b0_0_comp_ff, 1712, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6b8_0_comp_ff, 1720, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6b9_0_comp_ff, 1721, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ NULL, 1728, COMP_OPCODE_ISJUMP }, /* RTM */ +{ NULL, 1736, COMP_OPCODE_ISJUMP }, /* RTM */ +{ NULL, 1744, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1768, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1776, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1784, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1785, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1786, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1787, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ op_800_0_comp_ff, 2048, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_810_0_comp_ff, 2064, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_818_0_comp_ff, 2072, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_820_0_comp_ff, 2080, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_828_0_comp_ff, 2088, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_830_0_comp_ff, 2096, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_838_0_comp_ff, 2104, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_839_0_comp_ff, 2105, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_83a_0_comp_ff, 2106, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_83b_0_comp_ff, 2107, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_840_0_comp_ff, 2112, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_850_0_comp_ff, 2128, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_858_0_comp_ff, 2136, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_860_0_comp_ff, 2144, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_868_0_comp_ff, 2152, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_870_0_comp_ff, 2160, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_878_0_comp_ff, 2168, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_879_0_comp_ff, 2169, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_880_0_comp_ff, 2176, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_890_0_comp_ff, 2192, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_898_0_comp_ff, 2200, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8a0_0_comp_ff, 2208, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8a8_0_comp_ff, 2216, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8b0_0_comp_ff, 2224, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8b8_0_comp_ff, 2232, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8b9_0_comp_ff, 2233, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8c0_0_comp_ff, 2240, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8d0_0_comp_ff, 2256, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8d8_0_comp_ff, 2264, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8e0_0_comp_ff, 2272, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8e8_0_comp_ff, 2280, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8f0_0_comp_ff, 2288, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8f8_0_comp_ff, 2296, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8f9_0_comp_ff, 2297, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_a00_0_comp_ff, 2560, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a10_0_comp_ff, 2576, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a18_0_comp_ff, 2584, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a20_0_comp_ff, 2592, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a28_0_comp_ff, 2600, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a30_0_comp_ff, 2608, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a38_0_comp_ff, 2616, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a39_0_comp_ff, 2617, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ NULL, 2620, COMP_OPCODE_ISJUMP }, /* EORSR */ +{ op_a40_0_comp_ff, 2624, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a50_0_comp_ff, 2640, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a58_0_comp_ff, 2648, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a60_0_comp_ff, 2656, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a68_0_comp_ff, 2664, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a70_0_comp_ff, 2672, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a78_0_comp_ff, 2680, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a79_0_comp_ff, 2681, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ NULL, 2684, COMP_OPCODE_ISJUMP }, /* EORSR */ +{ op_a80_0_comp_ff, 2688, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a90_0_comp_ff, 2704, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a98_0_comp_ff, 2712, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_aa0_0_comp_ff, 2720, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_aa8_0_comp_ff, 2728, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_ab0_0_comp_ff, 2736, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_ab8_0_comp_ff, 2744, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_ab9_0_comp_ff, 2745, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ NULL, 2768, 0 }, /* CAS */ +{ NULL, 2776, 0 }, /* CAS */ +{ NULL, 2784, 0 }, /* CAS */ +{ NULL, 2792, 0 }, /* CAS */ +{ NULL, 2800, 0 }, /* CAS */ +{ NULL, 2808, 0 }, /* CAS */ +{ NULL, 2809, 0 }, /* CAS */ +{ op_c00_0_comp_ff, 3072, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c10_0_comp_ff, 3088, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c18_0_comp_ff, 3096, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c20_0_comp_ff, 3104, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c28_0_comp_ff, 3112, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c30_0_comp_ff, 3120, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c38_0_comp_ff, 3128, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c39_0_comp_ff, 3129, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c3a_0_comp_ff, 3130, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c3b_0_comp_ff, 3131, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c40_0_comp_ff, 3136, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c50_0_comp_ff, 3152, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c58_0_comp_ff, 3160, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c60_0_comp_ff, 3168, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c68_0_comp_ff, 3176, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c70_0_comp_ff, 3184, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c78_0_comp_ff, 3192, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c79_0_comp_ff, 3193, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c7a_0_comp_ff, 3194, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c7b_0_comp_ff, 3195, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c80_0_comp_ff, 3200, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c90_0_comp_ff, 3216, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c98_0_comp_ff, 3224, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_ca0_0_comp_ff, 3232, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_ca8_0_comp_ff, 3240, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cb0_0_comp_ff, 3248, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cb8_0_comp_ff, 3256, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cb9_0_comp_ff, 3257, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cba_0_comp_ff, 3258, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cbb_0_comp_ff, 3259, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ NULL, 3280, 0 }, /* CAS */ +{ NULL, 3288, 0 }, /* CAS */ +{ NULL, 3296, 0 }, /* CAS */ +{ NULL, 3304, 0 }, /* CAS */ +{ NULL, 3312, 0 }, /* CAS */ +{ NULL, 3320, 0 }, /* CAS */ +{ NULL, 3321, 0 }, /* CAS */ +{ NULL, 3324, 0 }, /* CAS2 */ +{ NULL, 3600, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3608, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3616, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3624, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3632, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3640, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3641, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3664, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3672, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3680, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3688, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3696, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3704, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3705, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3728, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3736, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3744, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3752, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3760, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3768, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3769, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3792, 0 }, /* CAS */ +{ NULL, 3800, 0 }, /* CAS */ +{ NULL, 3808, 0 }, /* CAS */ +{ NULL, 3816, 0 }, /* CAS */ +{ NULL, 3824, 0 }, /* CAS */ +{ NULL, 3832, 0 }, /* CAS */ +{ NULL, 3833, 0 }, /* CAS */ +{ NULL, 3836, 0 }, /* CAS2 */ +{ op_1000_0_comp_ff, 4096, 0 }, /* MOVE */ +{ op_1010_0_comp_ff, 4112, 0 }, /* MOVE */ +{ op_1018_0_comp_ff, 4120, 0 }, /* MOVE */ +{ op_1020_0_comp_ff, 4128, 0 }, /* MOVE */ +{ op_1028_0_comp_ff, 4136, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1030_0_comp_ff, 4144, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1038_0_comp_ff, 4152, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1039_0_comp_ff, 4153, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_103a_0_comp_ff, 4154, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_103b_0_comp_ff, 4155, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_103c_0_comp_ff, 4156, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1080_0_comp_ff, 4224, 0 }, /* MOVE */ +{ op_1090_0_comp_ff, 4240, 0 }, /* MOVE */ +{ op_1098_0_comp_ff, 4248, 0 }, /* MOVE */ +{ op_10a0_0_comp_ff, 4256, 0 }, /* MOVE */ +{ op_10a8_0_comp_ff, 4264, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10b0_0_comp_ff, 4272, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10b8_0_comp_ff, 4280, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10b9_0_comp_ff, 4281, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10ba_0_comp_ff, 4282, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10bb_0_comp_ff, 4283, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10bc_0_comp_ff, 4284, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10c0_0_comp_ff, 4288, 0 }, /* MOVE */ +{ op_10d0_0_comp_ff, 4304, 0 }, /* MOVE */ +{ op_10d8_0_comp_ff, 4312, 0 }, /* MOVE */ +{ op_10e0_0_comp_ff, 4320, 0 }, /* MOVE */ +{ op_10e8_0_comp_ff, 4328, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10f0_0_comp_ff, 4336, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10f8_0_comp_ff, 4344, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10f9_0_comp_ff, 4345, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10fa_0_comp_ff, 4346, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10fb_0_comp_ff, 4347, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10fc_0_comp_ff, 4348, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1100_0_comp_ff, 4352, 0 }, /* MOVE */ +{ op_1110_0_comp_ff, 4368, 0 }, /* MOVE */ +{ op_1118_0_comp_ff, 4376, 0 }, /* MOVE */ +{ op_1120_0_comp_ff, 4384, 0 }, /* MOVE */ +{ op_1128_0_comp_ff, 4392, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1130_0_comp_ff, 4400, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1138_0_comp_ff, 4408, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1139_0_comp_ff, 4409, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_113a_0_comp_ff, 4410, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_113b_0_comp_ff, 4411, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_113c_0_comp_ff, 4412, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1140_0_comp_ff, 4416, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1150_0_comp_ff, 4432, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1158_0_comp_ff, 4440, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1160_0_comp_ff, 4448, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1168_0_comp_ff, 4456, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1170_0_comp_ff, 4464, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1178_0_comp_ff, 4472, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1179_0_comp_ff, 4473, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_117a_0_comp_ff, 4474, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_117b_0_comp_ff, 4475, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_117c_0_comp_ff, 4476, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1180_0_comp_ff, 4480, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1190_0_comp_ff, 4496, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1198_0_comp_ff, 4504, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11a0_0_comp_ff, 4512, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11a8_0_comp_ff, 4520, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11b0_0_comp_ff, 4528, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11b8_0_comp_ff, 4536, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11b9_0_comp_ff, 4537, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11ba_0_comp_ff, 4538, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11bb_0_comp_ff, 4539, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11bc_0_comp_ff, 4540, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11c0_0_comp_ff, 4544, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11d0_0_comp_ff, 4560, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11d8_0_comp_ff, 4568, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11e0_0_comp_ff, 4576, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11e8_0_comp_ff, 4584, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11f0_0_comp_ff, 4592, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11f8_0_comp_ff, 4600, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11f9_0_comp_ff, 4601, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11fa_0_comp_ff, 4602, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11fb_0_comp_ff, 4603, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11fc_0_comp_ff, 4604, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13c0_0_comp_ff, 5056, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13d0_0_comp_ff, 5072, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13d8_0_comp_ff, 5080, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13e0_0_comp_ff, 5088, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13e8_0_comp_ff, 5096, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13f0_0_comp_ff, 5104, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13f8_0_comp_ff, 5112, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13f9_0_comp_ff, 5113, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13fa_0_comp_ff, 5114, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13fb_0_comp_ff, 5115, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13fc_0_comp_ff, 5116, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2000_0_comp_ff, 8192, 0 }, /* MOVE */ +{ op_2008_0_comp_ff, 8200, 0 }, /* MOVE */ +{ op_2010_0_comp_ff, 8208, 0 }, /* MOVE */ +{ op_2018_0_comp_ff, 8216, 0 }, /* MOVE */ +{ op_2020_0_comp_ff, 8224, 0 }, /* MOVE */ +{ op_2028_0_comp_ff, 8232, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2030_0_comp_ff, 8240, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2038_0_comp_ff, 8248, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2039_0_comp_ff, 8249, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_203a_0_comp_ff, 8250, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_203b_0_comp_ff, 8251, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_203c_0_comp_ff, 8252, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2040_0_comp_ff, 8256, 0 }, /* MOVEA */ +{ op_2048_0_comp_ff, 8264, 0 }, /* MOVEA */ +{ op_2050_0_comp_ff, 8272, 0 }, /* MOVEA */ +{ op_2058_0_comp_ff, 8280, 0 }, /* MOVEA */ +{ op_2060_0_comp_ff, 8288, 0 }, /* MOVEA */ +{ op_2068_0_comp_ff, 8296, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_2070_0_comp_ff, 8304, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_2078_0_comp_ff, 8312, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_2079_0_comp_ff, 8313, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_207a_0_comp_ff, 8314, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_207b_0_comp_ff, 8315, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_207c_0_comp_ff, 8316, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_2080_0_comp_ff, 8320, 0 }, /* MOVE */ +{ op_2088_0_comp_ff, 8328, 0 }, /* MOVE */ +{ op_2090_0_comp_ff, 8336, 0 }, /* MOVE */ +{ op_2098_0_comp_ff, 8344, 0 }, /* MOVE */ +{ op_20a0_0_comp_ff, 8352, 0 }, /* MOVE */ +{ op_20a8_0_comp_ff, 8360, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20b0_0_comp_ff, 8368, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20b8_0_comp_ff, 8376, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20b9_0_comp_ff, 8377, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20ba_0_comp_ff, 8378, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20bb_0_comp_ff, 8379, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20bc_0_comp_ff, 8380, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20c0_0_comp_ff, 8384, 0 }, /* MOVE */ +{ op_20c8_0_comp_ff, 8392, 0 }, /* MOVE */ +{ op_20d0_0_comp_ff, 8400, 0 }, /* MOVE */ +{ op_20d8_0_comp_ff, 8408, 0 }, /* MOVE */ +{ op_20e0_0_comp_ff, 8416, 0 }, /* MOVE */ +{ op_20e8_0_comp_ff, 8424, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20f0_0_comp_ff, 8432, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20f8_0_comp_ff, 8440, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20f9_0_comp_ff, 8441, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20fa_0_comp_ff, 8442, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20fb_0_comp_ff, 8443, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20fc_0_comp_ff, 8444, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2100_0_comp_ff, 8448, 0 }, /* MOVE */ +{ op_2108_0_comp_ff, 8456, 0 }, /* MOVE */ +{ op_2110_0_comp_ff, 8464, 0 }, /* MOVE */ +{ op_2118_0_comp_ff, 8472, 0 }, /* MOVE */ +{ op_2120_0_comp_ff, 8480, 0 }, /* MOVE */ +{ op_2128_0_comp_ff, 8488, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2130_0_comp_ff, 8496, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2138_0_comp_ff, 8504, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2139_0_comp_ff, 8505, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_213a_0_comp_ff, 8506, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_213b_0_comp_ff, 8507, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_213c_0_comp_ff, 8508, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2140_0_comp_ff, 8512, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2148_0_comp_ff, 8520, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2150_0_comp_ff, 8528, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2158_0_comp_ff, 8536, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2160_0_comp_ff, 8544, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2168_0_comp_ff, 8552, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2170_0_comp_ff, 8560, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2178_0_comp_ff, 8568, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2179_0_comp_ff, 8569, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_217a_0_comp_ff, 8570, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_217b_0_comp_ff, 8571, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_217c_0_comp_ff, 8572, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2180_0_comp_ff, 8576, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2188_0_comp_ff, 8584, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2190_0_comp_ff, 8592, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2198_0_comp_ff, 8600, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21a0_0_comp_ff, 8608, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21a8_0_comp_ff, 8616, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21b0_0_comp_ff, 8624, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21b8_0_comp_ff, 8632, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21b9_0_comp_ff, 8633, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21ba_0_comp_ff, 8634, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21bb_0_comp_ff, 8635, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21bc_0_comp_ff, 8636, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21c0_0_comp_ff, 8640, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21c8_0_comp_ff, 8648, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21d0_0_comp_ff, 8656, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21d8_0_comp_ff, 8664, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21e0_0_comp_ff, 8672, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21e8_0_comp_ff, 8680, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21f0_0_comp_ff, 8688, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21f8_0_comp_ff, 8696, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21f9_0_comp_ff, 8697, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21fa_0_comp_ff, 8698, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21fb_0_comp_ff, 8699, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21fc_0_comp_ff, 8700, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23c0_0_comp_ff, 9152, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23c8_0_comp_ff, 9160, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23d0_0_comp_ff, 9168, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23d8_0_comp_ff, 9176, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23e0_0_comp_ff, 9184, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23e8_0_comp_ff, 9192, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23f0_0_comp_ff, 9200, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23f8_0_comp_ff, 9208, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23f9_0_comp_ff, 9209, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23fa_0_comp_ff, 9210, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23fb_0_comp_ff, 9211, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23fc_0_comp_ff, 9212, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3000_0_comp_ff, 12288, 0 }, /* MOVE */ +{ op_3008_0_comp_ff, 12296, 0 }, /* MOVE */ +{ op_3010_0_comp_ff, 12304, 0 }, /* MOVE */ +{ op_3018_0_comp_ff, 12312, 0 }, /* MOVE */ +{ op_3020_0_comp_ff, 12320, 0 }, /* MOVE */ +{ op_3028_0_comp_ff, 12328, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3030_0_comp_ff, 12336, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3038_0_comp_ff, 12344, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3039_0_comp_ff, 12345, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_303a_0_comp_ff, 12346, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_303b_0_comp_ff, 12347, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_303c_0_comp_ff, 12348, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3040_0_comp_ff, 12352, 0 }, /* MOVEA */ +{ op_3048_0_comp_ff, 12360, 0 }, /* MOVEA */ +{ op_3050_0_comp_ff, 12368, 0 }, /* MOVEA */ +{ op_3058_0_comp_ff, 12376, 0 }, /* MOVEA */ +{ op_3060_0_comp_ff, 12384, 0 }, /* MOVEA */ +{ op_3068_0_comp_ff, 12392, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_3070_0_comp_ff, 12400, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_3078_0_comp_ff, 12408, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_3079_0_comp_ff, 12409, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_307a_0_comp_ff, 12410, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_307b_0_comp_ff, 12411, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_307c_0_comp_ff, 12412, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_3080_0_comp_ff, 12416, 0 }, /* MOVE */ +{ op_3088_0_comp_ff, 12424, 0 }, /* MOVE */ +{ op_3090_0_comp_ff, 12432, 0 }, /* MOVE */ +{ op_3098_0_comp_ff, 12440, 0 }, /* MOVE */ +{ op_30a0_0_comp_ff, 12448, 0 }, /* MOVE */ +{ op_30a8_0_comp_ff, 12456, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30b0_0_comp_ff, 12464, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30b8_0_comp_ff, 12472, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30b9_0_comp_ff, 12473, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30ba_0_comp_ff, 12474, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30bb_0_comp_ff, 12475, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30bc_0_comp_ff, 12476, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30c0_0_comp_ff, 12480, 0 }, /* MOVE */ +{ op_30c8_0_comp_ff, 12488, 0 }, /* MOVE */ +{ op_30d0_0_comp_ff, 12496, 0 }, /* MOVE */ +{ op_30d8_0_comp_ff, 12504, 0 }, /* MOVE */ +{ op_30e0_0_comp_ff, 12512, 0 }, /* MOVE */ +{ op_30e8_0_comp_ff, 12520, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30f0_0_comp_ff, 12528, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30f8_0_comp_ff, 12536, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30f9_0_comp_ff, 12537, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30fa_0_comp_ff, 12538, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30fb_0_comp_ff, 12539, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30fc_0_comp_ff, 12540, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3100_0_comp_ff, 12544, 0 }, /* MOVE */ +{ op_3108_0_comp_ff, 12552, 0 }, /* MOVE */ +{ op_3110_0_comp_ff, 12560, 0 }, /* MOVE */ +{ op_3118_0_comp_ff, 12568, 0 }, /* MOVE */ +{ op_3120_0_comp_ff, 12576, 0 }, /* MOVE */ +{ op_3128_0_comp_ff, 12584, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3130_0_comp_ff, 12592, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3138_0_comp_ff, 12600, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3139_0_comp_ff, 12601, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_313a_0_comp_ff, 12602, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_313b_0_comp_ff, 12603, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_313c_0_comp_ff, 12604, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3140_0_comp_ff, 12608, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3148_0_comp_ff, 12616, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3150_0_comp_ff, 12624, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3158_0_comp_ff, 12632, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3160_0_comp_ff, 12640, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3168_0_comp_ff, 12648, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3170_0_comp_ff, 12656, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3178_0_comp_ff, 12664, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3179_0_comp_ff, 12665, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_317a_0_comp_ff, 12666, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_317b_0_comp_ff, 12667, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_317c_0_comp_ff, 12668, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3180_0_comp_ff, 12672, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3188_0_comp_ff, 12680, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3190_0_comp_ff, 12688, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3198_0_comp_ff, 12696, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31a0_0_comp_ff, 12704, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31a8_0_comp_ff, 12712, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31b0_0_comp_ff, 12720, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31b8_0_comp_ff, 12728, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31b9_0_comp_ff, 12729, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31ba_0_comp_ff, 12730, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31bb_0_comp_ff, 12731, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31bc_0_comp_ff, 12732, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31c0_0_comp_ff, 12736, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31c8_0_comp_ff, 12744, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31d0_0_comp_ff, 12752, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31d8_0_comp_ff, 12760, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31e0_0_comp_ff, 12768, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31e8_0_comp_ff, 12776, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31f0_0_comp_ff, 12784, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31f8_0_comp_ff, 12792, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31f9_0_comp_ff, 12793, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31fa_0_comp_ff, 12794, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31fb_0_comp_ff, 12795, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31fc_0_comp_ff, 12796, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33c0_0_comp_ff, 13248, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33c8_0_comp_ff, 13256, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33d0_0_comp_ff, 13264, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33d8_0_comp_ff, 13272, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33e0_0_comp_ff, 13280, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33e8_0_comp_ff, 13288, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33f0_0_comp_ff, 13296, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33f8_0_comp_ff, 13304, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33f9_0_comp_ff, 13305, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33fa_0_comp_ff, 13306, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33fb_0_comp_ff, 13307, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33fc_0_comp_ff, 13308, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_4000_0_comp_ff, 16384, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4010_0_comp_ff, 16400, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4018_0_comp_ff, 16408, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4020_0_comp_ff, 16416, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4028_0_comp_ff, 16424, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4030_0_comp_ff, 16432, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4038_0_comp_ff, 16440, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4039_0_comp_ff, 16441, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4040_0_comp_ff, 16448, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4050_0_comp_ff, 16464, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4058_0_comp_ff, 16472, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4060_0_comp_ff, 16480, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4068_0_comp_ff, 16488, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4070_0_comp_ff, 16496, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4078_0_comp_ff, 16504, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4079_0_comp_ff, 16505, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4080_0_comp_ff, 16512, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4090_0_comp_ff, 16528, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4098_0_comp_ff, 16536, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40a0_0_comp_ff, 16544, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40a8_0_comp_ff, 16552, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40b0_0_comp_ff, 16560, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40b8_0_comp_ff, 16568, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40b9_0_comp_ff, 16569, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* NEGX */ +{ NULL, 16576, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16592, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16600, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16608, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16616, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16624, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16632, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16633, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16640, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16656, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16664, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16672, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16680, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16688, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16696, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16697, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16698, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16699, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16700, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16768, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16784, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16792, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16800, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16808, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16816, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16824, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16825, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16826, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16827, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16828, COMP_OPCODE_ISJUMP }, /* CHK */ +{ op_41d0_0_comp_ff, 16848, 0 }, /* LEA */ +{ op_41e8_0_comp_ff, 16872, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41f0_0_comp_ff, 16880, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41f8_0_comp_ff, 16888, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41f9_0_comp_ff, 16889, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41fa_0_comp_ff, 16890, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41fb_0_comp_ff, 16891, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_4200_0_comp_ff, 16896, 0 }, /* CLR */ +{ op_4210_0_comp_ff, 16912, 0 }, /* CLR */ +{ op_4218_0_comp_ff, 16920, 0 }, /* CLR */ +{ op_4220_0_comp_ff, 16928, 0 }, /* CLR */ +{ op_4228_0_comp_ff, 16936, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4230_0_comp_ff, 16944, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4238_0_comp_ff, 16952, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4239_0_comp_ff, 16953, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4240_0_comp_ff, 16960, 0 }, /* CLR */ +{ op_4250_0_comp_ff, 16976, 0 }, /* CLR */ +{ op_4258_0_comp_ff, 16984, 0 }, /* CLR */ +{ op_4260_0_comp_ff, 16992, 0 }, /* CLR */ +{ op_4268_0_comp_ff, 17000, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4270_0_comp_ff, 17008, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4278_0_comp_ff, 17016, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4279_0_comp_ff, 17017, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4280_0_comp_ff, 17024, 0 }, /* CLR */ +{ op_4290_0_comp_ff, 17040, 0 }, /* CLR */ +{ op_4298_0_comp_ff, 17048, 0 }, /* CLR */ +{ op_42a0_0_comp_ff, 17056, 0 }, /* CLR */ +{ op_42a8_0_comp_ff, 17064, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_42b0_0_comp_ff, 17072, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_42b8_0_comp_ff, 17080, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_42b9_0_comp_ff, 17081, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ NULL, 17088, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17104, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17112, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17120, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17128, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17136, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17144, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17145, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ op_4400_0_comp_ff, 17408, 0 }, /* NEG */ +{ op_4410_0_comp_ff, 17424, 0 }, /* NEG */ +{ op_4418_0_comp_ff, 17432, 0 }, /* NEG */ +{ op_4420_0_comp_ff, 17440, 0 }, /* NEG */ +{ op_4428_0_comp_ff, 17448, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4430_0_comp_ff, 17456, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4438_0_comp_ff, 17464, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4439_0_comp_ff, 17465, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4440_0_comp_ff, 17472, 0 }, /* NEG */ +{ op_4450_0_comp_ff, 17488, 0 }, /* NEG */ +{ op_4458_0_comp_ff, 17496, 0 }, /* NEG */ +{ op_4460_0_comp_ff, 17504, 0 }, /* NEG */ +{ op_4468_0_comp_ff, 17512, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4470_0_comp_ff, 17520, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4478_0_comp_ff, 17528, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4479_0_comp_ff, 17529, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4480_0_comp_ff, 17536, 0 }, /* NEG */ +{ op_4490_0_comp_ff, 17552, 0 }, /* NEG */ +{ op_4498_0_comp_ff, 17560, 0 }, /* NEG */ +{ op_44a0_0_comp_ff, 17568, 0 }, /* NEG */ +{ op_44a8_0_comp_ff, 17576, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_44b0_0_comp_ff, 17584, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_44b8_0_comp_ff, 17592, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_44b9_0_comp_ff, 17593, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ NULL, 17600, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17616, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17624, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17632, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17640, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17648, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17656, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17657, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17658, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17659, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17660, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ op_4600_0_comp_ff, 17920, 0 }, /* NOT */ +{ op_4610_0_comp_ff, 17936, 0 }, /* NOT */ +{ op_4618_0_comp_ff, 17944, 0 }, /* NOT */ +{ op_4620_0_comp_ff, 17952, 0 }, /* NOT */ +{ op_4628_0_comp_ff, 17960, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4630_0_comp_ff, 17968, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4638_0_comp_ff, 17976, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4639_0_comp_ff, 17977, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4640_0_comp_ff, 17984, 0 }, /* NOT */ +{ op_4650_0_comp_ff, 18000, 0 }, /* NOT */ +{ op_4658_0_comp_ff, 18008, 0 }, /* NOT */ +{ op_4660_0_comp_ff, 18016, 0 }, /* NOT */ +{ op_4668_0_comp_ff, 18024, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4670_0_comp_ff, 18032, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4678_0_comp_ff, 18040, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4679_0_comp_ff, 18041, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4680_0_comp_ff, 18048, 0 }, /* NOT */ +{ op_4690_0_comp_ff, 18064, 0 }, /* NOT */ +{ op_4698_0_comp_ff, 18072, 0 }, /* NOT */ +{ op_46a0_0_comp_ff, 18080, 0 }, /* NOT */ +{ op_46a8_0_comp_ff, 18088, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_46b0_0_comp_ff, 18096, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_46b8_0_comp_ff, 18104, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_46b9_0_comp_ff, 18105, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ NULL, 18112, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18128, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18136, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18144, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18152, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18160, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18168, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18169, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18170, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18171, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18172, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18432, 0 }, /* NBCD */ +{ op_4808_0_comp_ff, 18440, COMP_OPCODE_LONG_OPCODE }, /* LINK */ +{ NULL, 18448, 0 }, /* NBCD */ +{ NULL, 18456, 0 }, /* NBCD */ +{ NULL, 18464, 0 }, /* NBCD */ +{ NULL, 18472, 0 }, /* NBCD */ +{ NULL, 18480, 0 }, /* NBCD */ +{ NULL, 18488, 0 }, /* NBCD */ +{ NULL, 18489, 0 }, /* NBCD */ +{ op_4840_0_comp_ff, 18496, 0 }, /* SWAP */ +{ NULL, 18504, COMP_OPCODE_ISJUMP }, /* BKPT */ +{ op_4850_0_comp_ff, 18512, 0 }, /* PEA */ +{ op_4868_0_comp_ff, 18536, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_4870_0_comp_ff, 18544, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_4878_0_comp_ff, 18552, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_4879_0_comp_ff, 18553, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_487a_0_comp_ff, 18554, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_487b_0_comp_ff, 18555, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_4880_0_comp_ff, 18560, 0 }, /* EXT */ +{ op_4890_0_comp_ff, 18576, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48a0_0_comp_ff, 18592, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48a8_0_comp_ff, 18600, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48b0_0_comp_ff, 18608, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48b8_0_comp_ff, 18616, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48b9_0_comp_ff, 18617, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48c0_0_comp_ff, 18624, 0 }, /* EXT */ +{ op_48d0_0_comp_ff, 18640, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48e0_0_comp_ff, 18656, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48e8_0_comp_ff, 18664, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48f0_0_comp_ff, 18672, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48f8_0_comp_ff, 18680, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48f9_0_comp_ff, 18681, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_49c0_0_comp_ff, 18880, 0 }, /* EXT */ +{ op_4a00_0_comp_ff, 18944, 0 }, /* TST */ +{ op_4a10_0_comp_ff, 18960, 0 }, /* TST */ +{ op_4a18_0_comp_ff, 18968, 0 }, /* TST */ +{ op_4a20_0_comp_ff, 18976, 0 }, /* TST */ +{ op_4a28_0_comp_ff, 18984, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a30_0_comp_ff, 18992, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a38_0_comp_ff, 19000, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a39_0_comp_ff, 19001, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a3a_0_comp_ff, 19002, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a3b_0_comp_ff, 19003, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a3c_0_comp_ff, 19004, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a40_0_comp_ff, 19008, 0 }, /* TST */ +{ op_4a48_0_comp_ff, 19016, 0 }, /* TST */ +{ op_4a50_0_comp_ff, 19024, 0 }, /* TST */ +{ op_4a58_0_comp_ff, 19032, 0 }, /* TST */ +{ op_4a60_0_comp_ff, 19040, 0 }, /* TST */ +{ op_4a68_0_comp_ff, 19048, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a70_0_comp_ff, 19056, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a78_0_comp_ff, 19064, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a79_0_comp_ff, 19065, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a7a_0_comp_ff, 19066, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a7b_0_comp_ff, 19067, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a7c_0_comp_ff, 19068, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a80_0_comp_ff, 19072, 0 }, /* TST */ +{ op_4a88_0_comp_ff, 19080, 0 }, /* TST */ +{ op_4a90_0_comp_ff, 19088, 0 }, /* TST */ +{ op_4a98_0_comp_ff, 19096, 0 }, /* TST */ +{ op_4aa0_0_comp_ff, 19104, 0 }, /* TST */ +{ op_4aa8_0_comp_ff, 19112, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4ab0_0_comp_ff, 19120, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4ab8_0_comp_ff, 19128, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4ab9_0_comp_ff, 19129, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4aba_0_comp_ff, 19130, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4abb_0_comp_ff, 19131, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4abc_0_comp_ff, 19132, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ NULL, 19136, 0 }, /* TAS */ +{ NULL, 19144, COMP_OPCODE_ISJUMP }, /* HALT */ +{ NULL, 19148, COMP_OPCODE_ISJUMP }, /* PULSE */ +{ NULL, 19152, 0 }, /* TAS */ +{ NULL, 19160, 0 }, /* TAS */ +{ NULL, 19168, 0 }, /* TAS */ +{ NULL, 19176, 0 }, /* TAS */ +{ NULL, 19184, 0 }, /* TAS */ +{ NULL, 19192, 0 }, /* TAS */ +{ NULL, 19193, 0 }, /* TAS */ +{ NULL, 19456, 0 }, /* MULL */ +{ NULL, 19472, 0 }, /* MULL */ +{ NULL, 19480, 0 }, /* MULL */ +{ NULL, 19488, 0 }, /* MULL */ +{ NULL, 19496, 0 }, /* MULL */ +{ NULL, 19504, 0 }, /* MULL */ +{ NULL, 19512, 0 }, /* MULL */ +{ NULL, 19513, 0 }, /* MULL */ +{ NULL, 19514, 0 }, /* MULL */ +{ NULL, 19515, 0 }, /* MULL */ +{ NULL, 19516, 0 }, /* MULL */ +{ NULL, 19520, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19536, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19544, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19552, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19560, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19568, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19576, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19577, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19578, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19579, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19580, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ op_4c90_0_comp_ff, 19600, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4c98_0_comp_ff, 19608, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4ca8_0_comp_ff, 19624, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cb0_0_comp_ff, 19632, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cb8_0_comp_ff, 19640, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cb9_0_comp_ff, 19641, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cba_0_comp_ff, 19642, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cbb_0_comp_ff, 19643, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cd0_0_comp_ff, 19664, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cd8_0_comp_ff, 19672, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4ce8_0_comp_ff, 19688, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cf0_0_comp_ff, 19696, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cf8_0_comp_ff, 19704, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cf9_0_comp_ff, 19705, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cfa_0_comp_ff, 19706, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cfb_0_comp_ff, 19707, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ NULL, 20032, COMP_OPCODE_ISJUMP }, /* TRAP */ +{ op_4e50_0_comp_ff, 20048, COMP_OPCODE_LONG_OPCODE }, /* LINK */ +{ op_4e58_0_comp_ff, 20056, 0 }, /* UNLK */ +{ NULL, 20064, COMP_OPCODE_ISJUMP }, /* MVR2USP */ +{ NULL, 20072, COMP_OPCODE_ISJUMP }, /* MVUSP2R */ +{ NULL, 20080, COMP_OPCODE_ISJUMP }, /* RESET */ +{ op_4e71_0_comp_ff, 20081, 0 }, /* NOP */ +{ NULL, 20082, COMP_OPCODE_ISJUMP }, /* STOP */ +{ NULL, 20083, COMP_OPCODE_ISJUMP }, /* RTE */ +{ op_4e74_0_comp_ff, 20084, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* RTD */ +{ op_4e75_0_comp_ff, 20085, COMP_OPCODE_ISJUMP }, /* RTS */ +{ NULL, 20086, COMP_OPCODE_ISJUMP }, /* TRAPV */ +{ NULL, 20087, COMP_OPCODE_ISJUMP }, /* RTR */ +{ NULL, 20090, COMP_OPCODE_ISJUMP }, /* MOVEC2 */ +{ NULL, 20091, COMP_OPCODE_ISJUMP }, /* MOVE2C */ +{ op_4e90_0_comp_ff, 20112, COMP_OPCODE_ISJUMP }, /* JSR */ +{ op_4ea8_0_comp_ff, 20136, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4eb0_0_comp_ff, 20144, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4eb8_0_comp_ff, 20152, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4eb9_0_comp_ff, 20153, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4eba_0_comp_ff, 20154, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4ebb_0_comp_ff, 20155, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4ed0_0_comp_ff, 20176, COMP_OPCODE_ISJUMP }, /* JMP */ +{ op_4ee8_0_comp_ff, 20200, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4ef0_0_comp_ff, 20208, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4ef8_0_comp_ff, 20216, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4ef9_0_comp_ff, 20217, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4efa_0_comp_ff, 20218, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4efb_0_comp_ff, 20219, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_5000_0_comp_ff, 20480, 0 }, /* ADD */ +{ op_5010_0_comp_ff, 20496, 0 }, /* ADD */ +{ op_5018_0_comp_ff, 20504, 0 }, /* ADD */ +{ op_5020_0_comp_ff, 20512, 0 }, /* ADD */ +{ op_5028_0_comp_ff, 20520, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5030_0_comp_ff, 20528, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5038_0_comp_ff, 20536, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5039_0_comp_ff, 20537, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5040_0_comp_ff, 20544, 0 }, /* ADD */ +{ op_5048_0_comp_ff, 20552, 0 }, /* ADDA */ +{ op_5050_0_comp_ff, 20560, 0 }, /* ADD */ +{ op_5058_0_comp_ff, 20568, 0 }, /* ADD */ +{ op_5060_0_comp_ff, 20576, 0 }, /* ADD */ +{ op_5068_0_comp_ff, 20584, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5070_0_comp_ff, 20592, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5078_0_comp_ff, 20600, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5079_0_comp_ff, 20601, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5080_0_comp_ff, 20608, 0 }, /* ADD */ +{ op_5088_0_comp_ff, 20616, 0 }, /* ADDA */ +{ op_5090_0_comp_ff, 20624, 0 }, /* ADD */ +{ op_5098_0_comp_ff, 20632, 0 }, /* ADD */ +{ op_50a0_0_comp_ff, 20640, 0 }, /* ADD */ +{ op_50a8_0_comp_ff, 20648, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_50b0_0_comp_ff, 20656, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_50b8_0_comp_ff, 20664, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_50b9_0_comp_ff, 20665, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_50c0_0_comp_ff, 20672, 0 }, /* Scc */ +{ op_50c8_0_comp_ff, 20680, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_50d0_0_comp_ff, 20688, 0 }, /* Scc */ +{ op_50d8_0_comp_ff, 20696, 0 }, /* Scc */ +{ op_50e0_0_comp_ff, 20704, 0 }, /* Scc */ +{ op_50e8_0_comp_ff, 20712, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_50f0_0_comp_ff, 20720, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_50f8_0_comp_ff, 20728, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_50f9_0_comp_ff, 20729, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 20730, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 20731, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 20732, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5100_0_comp_ff, 20736, 0 }, /* SUB */ +{ op_5110_0_comp_ff, 20752, 0 }, /* SUB */ +{ op_5118_0_comp_ff, 20760, 0 }, /* SUB */ +{ op_5120_0_comp_ff, 20768, 0 }, /* SUB */ +{ op_5128_0_comp_ff, 20776, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5130_0_comp_ff, 20784, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5138_0_comp_ff, 20792, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5139_0_comp_ff, 20793, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5140_0_comp_ff, 20800, 0 }, /* SUB */ +{ op_5148_0_comp_ff, 20808, 0 }, /* SUBA */ +{ op_5150_0_comp_ff, 20816, 0 }, /* SUB */ +{ op_5158_0_comp_ff, 20824, 0 }, /* SUB */ +{ op_5160_0_comp_ff, 20832, 0 }, /* SUB */ +{ op_5168_0_comp_ff, 20840, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5170_0_comp_ff, 20848, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5178_0_comp_ff, 20856, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5179_0_comp_ff, 20857, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5180_0_comp_ff, 20864, 0 }, /* SUB */ +{ op_5188_0_comp_ff, 20872, 0 }, /* SUBA */ +{ op_5190_0_comp_ff, 20880, 0 }, /* SUB */ +{ op_5198_0_comp_ff, 20888, 0 }, /* SUB */ +{ op_51a0_0_comp_ff, 20896, 0 }, /* SUB */ +{ op_51a8_0_comp_ff, 20904, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_51b0_0_comp_ff, 20912, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_51b8_0_comp_ff, 20920, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_51b9_0_comp_ff, 20921, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_51c0_0_comp_ff, 20928, 0 }, /* Scc */ +{ op_51c8_0_comp_ff, 20936, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_51d0_0_comp_ff, 20944, 0 }, /* Scc */ +{ op_51d8_0_comp_ff, 20952, 0 }, /* Scc */ +{ op_51e0_0_comp_ff, 20960, 0 }, /* Scc */ +{ op_51e8_0_comp_ff, 20968, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_51f0_0_comp_ff, 20976, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_51f8_0_comp_ff, 20984, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_51f9_0_comp_ff, 20985, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 20986, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 20987, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 20988, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_52c0_0_comp_ff, 21184, 0 }, /* Scc */ +{ op_52c8_0_comp_ff, 21192, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_52d0_0_comp_ff, 21200, 0 }, /* Scc */ +{ op_52d8_0_comp_ff, 21208, 0 }, /* Scc */ +{ op_52e0_0_comp_ff, 21216, 0 }, /* Scc */ +{ op_52e8_0_comp_ff, 21224, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_52f0_0_comp_ff, 21232, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_52f8_0_comp_ff, 21240, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_52f9_0_comp_ff, 21241, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 21242, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21243, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21244, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_53c0_0_comp_ff, 21440, 0 }, /* Scc */ +{ op_53c8_0_comp_ff, 21448, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_53d0_0_comp_ff, 21456, 0 }, /* Scc */ +{ op_53d8_0_comp_ff, 21464, 0 }, /* Scc */ +{ op_53e0_0_comp_ff, 21472, 0 }, /* Scc */ +{ op_53e8_0_comp_ff, 21480, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_53f0_0_comp_ff, 21488, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_53f8_0_comp_ff, 21496, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_53f9_0_comp_ff, 21497, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 21498, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21499, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21500, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_54c0_0_comp_ff, 21696, 0 }, /* Scc */ +{ op_54c8_0_comp_ff, 21704, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_54d0_0_comp_ff, 21712, 0 }, /* Scc */ +{ op_54d8_0_comp_ff, 21720, 0 }, /* Scc */ +{ op_54e0_0_comp_ff, 21728, 0 }, /* Scc */ +{ op_54e8_0_comp_ff, 21736, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_54f0_0_comp_ff, 21744, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_54f8_0_comp_ff, 21752, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_54f9_0_comp_ff, 21753, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 21754, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21755, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21756, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_55c0_0_comp_ff, 21952, 0 }, /* Scc */ +{ op_55c8_0_comp_ff, 21960, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_55d0_0_comp_ff, 21968, 0 }, /* Scc */ +{ op_55d8_0_comp_ff, 21976, 0 }, /* Scc */ +{ op_55e0_0_comp_ff, 21984, 0 }, /* Scc */ +{ op_55e8_0_comp_ff, 21992, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_55f0_0_comp_ff, 22000, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_55f8_0_comp_ff, 22008, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_55f9_0_comp_ff, 22009, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22010, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22011, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22012, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_56c0_0_comp_ff, 22208, 0 }, /* Scc */ +{ op_56c8_0_comp_ff, 22216, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_56d0_0_comp_ff, 22224, 0 }, /* Scc */ +{ op_56d8_0_comp_ff, 22232, 0 }, /* Scc */ +{ op_56e0_0_comp_ff, 22240, 0 }, /* Scc */ +{ op_56e8_0_comp_ff, 22248, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_56f0_0_comp_ff, 22256, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_56f8_0_comp_ff, 22264, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_56f9_0_comp_ff, 22265, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22266, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22267, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22268, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_57c0_0_comp_ff, 22464, 0 }, /* Scc */ +{ op_57c8_0_comp_ff, 22472, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_57d0_0_comp_ff, 22480, 0 }, /* Scc */ +{ op_57d8_0_comp_ff, 22488, 0 }, /* Scc */ +{ op_57e0_0_comp_ff, 22496, 0 }, /* Scc */ +{ op_57e8_0_comp_ff, 22504, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_57f0_0_comp_ff, 22512, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_57f8_0_comp_ff, 22520, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_57f9_0_comp_ff, 22521, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22522, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22523, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22524, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22720, 0 }, /* Scc */ +{ NULL, 22728, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ NULL, 22736, 0 }, /* Scc */ +{ NULL, 22744, 0 }, /* Scc */ +{ NULL, 22752, 0 }, /* Scc */ +{ NULL, 22760, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22768, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22776, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22777, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22778, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22779, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22780, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22976, 0 }, /* Scc */ +{ NULL, 22984, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ NULL, 22992, 0 }, /* Scc */ +{ NULL, 23000, 0 }, /* Scc */ +{ NULL, 23008, 0 }, /* Scc */ +{ NULL, 23016, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23024, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23032, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23033, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23034, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23035, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23036, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5ac0_0_comp_ff, 23232, 0 }, /* Scc */ +{ op_5ac8_0_comp_ff, 23240, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5ad0_0_comp_ff, 23248, 0 }, /* Scc */ +{ op_5ad8_0_comp_ff, 23256, 0 }, /* Scc */ +{ op_5ae0_0_comp_ff, 23264, 0 }, /* Scc */ +{ op_5ae8_0_comp_ff, 23272, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5af0_0_comp_ff, 23280, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5af8_0_comp_ff, 23288, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5af9_0_comp_ff, 23289, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23290, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23291, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23292, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5bc0_0_comp_ff, 23488, 0 }, /* Scc */ +{ op_5bc8_0_comp_ff, 23496, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5bd0_0_comp_ff, 23504, 0 }, /* Scc */ +{ op_5bd8_0_comp_ff, 23512, 0 }, /* Scc */ +{ op_5be0_0_comp_ff, 23520, 0 }, /* Scc */ +{ op_5be8_0_comp_ff, 23528, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5bf0_0_comp_ff, 23536, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5bf8_0_comp_ff, 23544, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5bf9_0_comp_ff, 23545, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23546, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23547, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23548, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5cc0_0_comp_ff, 23744, 0 }, /* Scc */ +{ op_5cc8_0_comp_ff, 23752, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5cd0_0_comp_ff, 23760, 0 }, /* Scc */ +{ op_5cd8_0_comp_ff, 23768, 0 }, /* Scc */ +{ op_5ce0_0_comp_ff, 23776, 0 }, /* Scc */ +{ op_5ce8_0_comp_ff, 23784, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5cf0_0_comp_ff, 23792, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5cf8_0_comp_ff, 23800, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5cf9_0_comp_ff, 23801, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23802, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23803, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23804, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5dc0_0_comp_ff, 24000, 0 }, /* Scc */ +{ op_5dc8_0_comp_ff, 24008, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5dd0_0_comp_ff, 24016, 0 }, /* Scc */ +{ op_5dd8_0_comp_ff, 24024, 0 }, /* Scc */ +{ op_5de0_0_comp_ff, 24032, 0 }, /* Scc */ +{ op_5de8_0_comp_ff, 24040, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5df0_0_comp_ff, 24048, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5df8_0_comp_ff, 24056, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5df9_0_comp_ff, 24057, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 24058, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24059, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24060, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5ec0_0_comp_ff, 24256, 0 }, /* Scc */ +{ op_5ec8_0_comp_ff, 24264, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5ed0_0_comp_ff, 24272, 0 }, /* Scc */ +{ op_5ed8_0_comp_ff, 24280, 0 }, /* Scc */ +{ op_5ee0_0_comp_ff, 24288, 0 }, /* Scc */ +{ op_5ee8_0_comp_ff, 24296, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ef0_0_comp_ff, 24304, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ef8_0_comp_ff, 24312, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ef9_0_comp_ff, 24313, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 24314, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24315, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24316, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5fc0_0_comp_ff, 24512, 0 }, /* Scc */ +{ op_5fc8_0_comp_ff, 24520, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5fd0_0_comp_ff, 24528, 0 }, /* Scc */ +{ op_5fd8_0_comp_ff, 24536, 0 }, /* Scc */ +{ op_5fe0_0_comp_ff, 24544, 0 }, /* Scc */ +{ op_5fe8_0_comp_ff, 24552, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ff0_0_comp_ff, 24560, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ff8_0_comp_ff, 24568, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ff9_0_comp_ff, 24569, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 24570, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24571, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24572, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_6000_0_comp_ff, 24576, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISCJUMP }, /* Bcc */ +{ op_6001_0_comp_ff, 24577, COMP_OPCODE_ISCJUMP }, /* Bcc */ +{ op_60ff_0_comp_ff, 24831, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISCJUMP }, /* Bcc */ +{ op_6100_0_comp_ff, 24832, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISCJUMP }, /* BSR */ +{ op_6101_0_comp_ff, 24833, COMP_OPCODE_ISCJUMP }, /* BSR */ +{ op_61ff_0_comp_ff, 25087, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISCJUMP }, /* BSR */ +{ op_6200_0_comp_ff, 25088, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6201_0_comp_ff, 25089, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_62ff_0_comp_ff, 25343, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6300_0_comp_ff, 25344, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6301_0_comp_ff, 25345, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_63ff_0_comp_ff, 25599, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6400_0_comp_ff, 25600, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6401_0_comp_ff, 25601, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_64ff_0_comp_ff, 25855, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6500_0_comp_ff, 25856, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6501_0_comp_ff, 25857, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_65ff_0_comp_ff, 26111, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6600_0_comp_ff, 26112, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6601_0_comp_ff, 26113, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_66ff_0_comp_ff, 26367, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6700_0_comp_ff, 26368, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6701_0_comp_ff, 26369, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_67ff_0_comp_ff, 26623, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ NULL, 26624, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ NULL, 26625, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ NULL, 26879, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ NULL, 26880, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ NULL, 26881, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ NULL, 27135, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6a00_0_comp_ff, 27136, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6a01_0_comp_ff, 27137, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6aff_0_comp_ff, 27391, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6b00_0_comp_ff, 27392, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6b01_0_comp_ff, 27393, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6bff_0_comp_ff, 27647, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6c00_0_comp_ff, 27648, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6c01_0_comp_ff, 27649, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6cff_0_comp_ff, 27903, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6d00_0_comp_ff, 27904, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6d01_0_comp_ff, 27905, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6dff_0_comp_ff, 28159, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6e00_0_comp_ff, 28160, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6e01_0_comp_ff, 28161, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6eff_0_comp_ff, 28415, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6f00_0_comp_ff, 28416, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6f01_0_comp_ff, 28417, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6fff_0_comp_ff, 28671, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_7000_0_comp_ff, 28672, 0 }, /* MOVE */ +{ op_8000_0_comp_ff, 32768, 0 }, /* OR */ +{ op_8010_0_comp_ff, 32784, 0 }, /* OR */ +{ op_8018_0_comp_ff, 32792, 0 }, /* OR */ +{ op_8020_0_comp_ff, 32800, 0 }, /* OR */ +{ op_8028_0_comp_ff, 32808, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8030_0_comp_ff, 32816, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8038_0_comp_ff, 32824, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8039_0_comp_ff, 32825, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_803a_0_comp_ff, 32826, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_803b_0_comp_ff, 32827, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_803c_0_comp_ff, 32828, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8040_0_comp_ff, 32832, 0 }, /* OR */ +{ op_8050_0_comp_ff, 32848, 0 }, /* OR */ +{ op_8058_0_comp_ff, 32856, 0 }, /* OR */ +{ op_8060_0_comp_ff, 32864, 0 }, /* OR */ +{ op_8068_0_comp_ff, 32872, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8070_0_comp_ff, 32880, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8078_0_comp_ff, 32888, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8079_0_comp_ff, 32889, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_807a_0_comp_ff, 32890, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_807b_0_comp_ff, 32891, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_807c_0_comp_ff, 32892, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8080_0_comp_ff, 32896, 0 }, /* OR */ +{ op_8090_0_comp_ff, 32912, 0 }, /* OR */ +{ op_8098_0_comp_ff, 32920, 0 }, /* OR */ +{ op_80a0_0_comp_ff, 32928, 0 }, /* OR */ +{ op_80a8_0_comp_ff, 32936, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80b0_0_comp_ff, 32944, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80b8_0_comp_ff, 32952, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80b9_0_comp_ff, 32953, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80ba_0_comp_ff, 32954, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80bb_0_comp_ff, 32955, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80bc_0_comp_ff, 32956, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 32960, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 32976, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 32984, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 32992, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33000, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33008, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33016, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33017, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33018, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33019, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33020, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33024, 0 }, /* SBCD */ +{ NULL, 33032, 0 }, /* SBCD */ +{ op_8110_0_comp_ff, 33040, 0 }, /* OR */ +{ op_8118_0_comp_ff, 33048, 0 }, /* OR */ +{ op_8120_0_comp_ff, 33056, 0 }, /* OR */ +{ op_8128_0_comp_ff, 33064, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8130_0_comp_ff, 33072, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8138_0_comp_ff, 33080, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8139_0_comp_ff, 33081, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 33088, 0 }, /* PACK */ +{ NULL, 33096, 0 }, /* PACK */ +{ op_8150_0_comp_ff, 33104, 0 }, /* OR */ +{ op_8158_0_comp_ff, 33112, 0 }, /* OR */ +{ op_8160_0_comp_ff, 33120, 0 }, /* OR */ +{ op_8168_0_comp_ff, 33128, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8170_0_comp_ff, 33136, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8178_0_comp_ff, 33144, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8179_0_comp_ff, 33145, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 33152, 0 }, /* UNPK */ +{ NULL, 33160, 0 }, /* UNPK */ +{ op_8190_0_comp_ff, 33168, 0 }, /* OR */ +{ op_8198_0_comp_ff, 33176, 0 }, /* OR */ +{ op_81a0_0_comp_ff, 33184, 0 }, /* OR */ +{ op_81a8_0_comp_ff, 33192, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_81b0_0_comp_ff, 33200, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_81b8_0_comp_ff, 33208, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_81b9_0_comp_ff, 33209, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 33216, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33232, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33240, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33248, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33256, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33264, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33272, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33273, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33274, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33275, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33276, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ op_9000_0_comp_ff, 36864, 0 }, /* SUB */ +{ op_9010_0_comp_ff, 36880, 0 }, /* SUB */ +{ op_9018_0_comp_ff, 36888, 0 }, /* SUB */ +{ op_9020_0_comp_ff, 36896, 0 }, /* SUB */ +{ op_9028_0_comp_ff, 36904, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9030_0_comp_ff, 36912, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9038_0_comp_ff, 36920, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9039_0_comp_ff, 36921, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_903a_0_comp_ff, 36922, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_903b_0_comp_ff, 36923, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_903c_0_comp_ff, 36924, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9040_0_comp_ff, 36928, 0 }, /* SUB */ +{ op_9048_0_comp_ff, 36936, 0 }, /* SUB */ +{ op_9050_0_comp_ff, 36944, 0 }, /* SUB */ +{ op_9058_0_comp_ff, 36952, 0 }, /* SUB */ +{ op_9060_0_comp_ff, 36960, 0 }, /* SUB */ +{ op_9068_0_comp_ff, 36968, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9070_0_comp_ff, 36976, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9078_0_comp_ff, 36984, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9079_0_comp_ff, 36985, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_907a_0_comp_ff, 36986, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_907b_0_comp_ff, 36987, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_907c_0_comp_ff, 36988, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9080_0_comp_ff, 36992, 0 }, /* SUB */ +{ op_9088_0_comp_ff, 37000, 0 }, /* SUB */ +{ op_9090_0_comp_ff, 37008, 0 }, /* SUB */ +{ op_9098_0_comp_ff, 37016, 0 }, /* SUB */ +{ op_90a0_0_comp_ff, 37024, 0 }, /* SUB */ +{ op_90a8_0_comp_ff, 37032, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90b0_0_comp_ff, 37040, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90b8_0_comp_ff, 37048, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90b9_0_comp_ff, 37049, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90ba_0_comp_ff, 37050, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90bb_0_comp_ff, 37051, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90bc_0_comp_ff, 37052, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90c0_0_comp_ff, 37056, 0 }, /* SUBA */ +{ op_90c8_0_comp_ff, 37064, 0 }, /* SUBA */ +{ op_90d0_0_comp_ff, 37072, 0 }, /* SUBA */ +{ op_90d8_0_comp_ff, 37080, 0 }, /* SUBA */ +{ op_90e0_0_comp_ff, 37088, 0 }, /* SUBA */ +{ op_90e8_0_comp_ff, 37096, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90f0_0_comp_ff, 37104, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90f8_0_comp_ff, 37112, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90f9_0_comp_ff, 37113, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90fa_0_comp_ff, 37114, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90fb_0_comp_ff, 37115, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90fc_0_comp_ff, 37116, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_9100_0_comp_ff, 37120, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9108_0_comp_ff, 37128, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9110_0_comp_ff, 37136, 0 }, /* SUB */ +{ op_9118_0_comp_ff, 37144, 0 }, /* SUB */ +{ op_9120_0_comp_ff, 37152, 0 }, /* SUB */ +{ op_9128_0_comp_ff, 37160, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9130_0_comp_ff, 37168, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9138_0_comp_ff, 37176, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9139_0_comp_ff, 37177, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9140_0_comp_ff, 37184, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9148_0_comp_ff, 37192, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9150_0_comp_ff, 37200, 0 }, /* SUB */ +{ op_9158_0_comp_ff, 37208, 0 }, /* SUB */ +{ op_9160_0_comp_ff, 37216, 0 }, /* SUB */ +{ op_9168_0_comp_ff, 37224, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9170_0_comp_ff, 37232, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9178_0_comp_ff, 37240, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9179_0_comp_ff, 37241, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9180_0_comp_ff, 37248, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9188_0_comp_ff, 37256, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9190_0_comp_ff, 37264, 0 }, /* SUB */ +{ op_9198_0_comp_ff, 37272, 0 }, /* SUB */ +{ op_91a0_0_comp_ff, 37280, 0 }, /* SUB */ +{ op_91a8_0_comp_ff, 37288, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_91b0_0_comp_ff, 37296, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_91b8_0_comp_ff, 37304, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_91b9_0_comp_ff, 37305, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_91c0_0_comp_ff, 37312, 0 }, /* SUBA */ +{ op_91c8_0_comp_ff, 37320, 0 }, /* SUBA */ +{ op_91d0_0_comp_ff, 37328, 0 }, /* SUBA */ +{ op_91d8_0_comp_ff, 37336, 0 }, /* SUBA */ +{ op_91e0_0_comp_ff, 37344, 0 }, /* SUBA */ +{ op_91e8_0_comp_ff, 37352, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91f0_0_comp_ff, 37360, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91f8_0_comp_ff, 37368, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91f9_0_comp_ff, 37369, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91fa_0_comp_ff, 37370, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91fb_0_comp_ff, 37371, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91fc_0_comp_ff, 37372, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_b000_0_comp_ff, 45056, 0 }, /* CMP */ +{ op_b010_0_comp_ff, 45072, 0 }, /* CMP */ +{ op_b018_0_comp_ff, 45080, 0 }, /* CMP */ +{ op_b020_0_comp_ff, 45088, 0 }, /* CMP */ +{ op_b028_0_comp_ff, 45096, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b030_0_comp_ff, 45104, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b038_0_comp_ff, 45112, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b039_0_comp_ff, 45113, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b03a_0_comp_ff, 45114, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b03b_0_comp_ff, 45115, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b03c_0_comp_ff, 45116, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b040_0_comp_ff, 45120, 0 }, /* CMP */ +{ op_b048_0_comp_ff, 45128, 0 }, /* CMP */ +{ op_b050_0_comp_ff, 45136, 0 }, /* CMP */ +{ op_b058_0_comp_ff, 45144, 0 }, /* CMP */ +{ op_b060_0_comp_ff, 45152, 0 }, /* CMP */ +{ op_b068_0_comp_ff, 45160, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b070_0_comp_ff, 45168, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b078_0_comp_ff, 45176, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b079_0_comp_ff, 45177, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b07a_0_comp_ff, 45178, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b07b_0_comp_ff, 45179, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b07c_0_comp_ff, 45180, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b080_0_comp_ff, 45184, 0 }, /* CMP */ +{ op_b088_0_comp_ff, 45192, 0 }, /* CMP */ +{ op_b090_0_comp_ff, 45200, 0 }, /* CMP */ +{ op_b098_0_comp_ff, 45208, 0 }, /* CMP */ +{ op_b0a0_0_comp_ff, 45216, 0 }, /* CMP */ +{ op_b0a8_0_comp_ff, 45224, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0b0_0_comp_ff, 45232, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0b8_0_comp_ff, 45240, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0b9_0_comp_ff, 45241, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0ba_0_comp_ff, 45242, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0bb_0_comp_ff, 45243, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0bc_0_comp_ff, 45244, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0c0_0_comp_ff, 45248, 0 }, /* CMPA */ +{ op_b0c8_0_comp_ff, 45256, 0 }, /* CMPA */ +{ op_b0d0_0_comp_ff, 45264, 0 }, /* CMPA */ +{ op_b0d8_0_comp_ff, 45272, 0 }, /* CMPA */ +{ op_b0e0_0_comp_ff, 45280, 0 }, /* CMPA */ +{ op_b0e8_0_comp_ff, 45288, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0f0_0_comp_ff, 45296, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0f8_0_comp_ff, 45304, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0f9_0_comp_ff, 45305, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0fa_0_comp_ff, 45306, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0fb_0_comp_ff, 45307, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0fc_0_comp_ff, 45308, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b100_0_comp_ff, 45312, 0 }, /* EOR */ +{ op_b108_0_comp_ff, 45320, 0 }, /* CMPM */ +{ op_b110_0_comp_ff, 45328, 0 }, /* EOR */ +{ op_b118_0_comp_ff, 45336, 0 }, /* EOR */ +{ op_b120_0_comp_ff, 45344, 0 }, /* EOR */ +{ op_b128_0_comp_ff, 45352, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b130_0_comp_ff, 45360, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b138_0_comp_ff, 45368, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b139_0_comp_ff, 45369, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b140_0_comp_ff, 45376, 0 }, /* EOR */ +{ op_b148_0_comp_ff, 45384, 0 }, /* CMPM */ +{ op_b150_0_comp_ff, 45392, 0 }, /* EOR */ +{ op_b158_0_comp_ff, 45400, 0 }, /* EOR */ +{ op_b160_0_comp_ff, 45408, 0 }, /* EOR */ +{ op_b168_0_comp_ff, 45416, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b170_0_comp_ff, 45424, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b178_0_comp_ff, 45432, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b179_0_comp_ff, 45433, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b180_0_comp_ff, 45440, 0 }, /* EOR */ +{ op_b188_0_comp_ff, 45448, 0 }, /* CMPM */ +{ op_b190_0_comp_ff, 45456, 0 }, /* EOR */ +{ op_b198_0_comp_ff, 45464, 0 }, /* EOR */ +{ op_b1a0_0_comp_ff, 45472, 0 }, /* EOR */ +{ op_b1a8_0_comp_ff, 45480, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b1b0_0_comp_ff, 45488, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b1b8_0_comp_ff, 45496, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b1b9_0_comp_ff, 45497, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b1c0_0_comp_ff, 45504, 0 }, /* CMPA */ +{ op_b1c8_0_comp_ff, 45512, 0 }, /* CMPA */ +{ op_b1d0_0_comp_ff, 45520, 0 }, /* CMPA */ +{ op_b1d8_0_comp_ff, 45528, 0 }, /* CMPA */ +{ op_b1e0_0_comp_ff, 45536, 0 }, /* CMPA */ +{ op_b1e8_0_comp_ff, 45544, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1f0_0_comp_ff, 45552, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1f8_0_comp_ff, 45560, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1f9_0_comp_ff, 45561, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1fa_0_comp_ff, 45562, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1fb_0_comp_ff, 45563, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1fc_0_comp_ff, 45564, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_c000_0_comp_ff, 49152, 0 }, /* AND */ +{ op_c010_0_comp_ff, 49168, 0 }, /* AND */ +{ op_c018_0_comp_ff, 49176, 0 }, /* AND */ +{ op_c020_0_comp_ff, 49184, 0 }, /* AND */ +{ op_c028_0_comp_ff, 49192, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c030_0_comp_ff, 49200, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c038_0_comp_ff, 49208, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c039_0_comp_ff, 49209, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c03a_0_comp_ff, 49210, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c03b_0_comp_ff, 49211, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c03c_0_comp_ff, 49212, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c040_0_comp_ff, 49216, 0 }, /* AND */ +{ op_c050_0_comp_ff, 49232, 0 }, /* AND */ +{ op_c058_0_comp_ff, 49240, 0 }, /* AND */ +{ op_c060_0_comp_ff, 49248, 0 }, /* AND */ +{ op_c068_0_comp_ff, 49256, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c070_0_comp_ff, 49264, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c078_0_comp_ff, 49272, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c079_0_comp_ff, 49273, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c07a_0_comp_ff, 49274, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c07b_0_comp_ff, 49275, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c07c_0_comp_ff, 49276, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c080_0_comp_ff, 49280, 0 }, /* AND */ +{ op_c090_0_comp_ff, 49296, 0 }, /* AND */ +{ op_c098_0_comp_ff, 49304, 0 }, /* AND */ +{ op_c0a0_0_comp_ff, 49312, 0 }, /* AND */ +{ op_c0a8_0_comp_ff, 49320, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0b0_0_comp_ff, 49328, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0b8_0_comp_ff, 49336, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0b9_0_comp_ff, 49337, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0ba_0_comp_ff, 49338, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0bb_0_comp_ff, 49339, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0bc_0_comp_ff, 49340, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0c0_0_comp_ff, 49344, 0 }, /* MULU */ +{ op_c0d0_0_comp_ff, 49360, 0 }, /* MULU */ +{ op_c0d8_0_comp_ff, 49368, 0 }, /* MULU */ +{ op_c0e0_0_comp_ff, 49376, 0 }, /* MULU */ +{ op_c0e8_0_comp_ff, 49384, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0f0_0_comp_ff, 49392, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0f8_0_comp_ff, 49400, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0f9_0_comp_ff, 49401, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0fa_0_comp_ff, 49402, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0fb_0_comp_ff, 49403, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0fc_0_comp_ff, 49404, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ NULL, 49408, 0 }, /* ABCD */ +{ NULL, 49416, 0 }, /* ABCD */ +{ op_c110_0_comp_ff, 49424, 0 }, /* AND */ +{ op_c118_0_comp_ff, 49432, 0 }, /* AND */ +{ op_c120_0_comp_ff, 49440, 0 }, /* AND */ +{ op_c128_0_comp_ff, 49448, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c130_0_comp_ff, 49456, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c138_0_comp_ff, 49464, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c139_0_comp_ff, 49465, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c140_0_comp_ff, 49472, 0 }, /* EXG */ +{ op_c148_0_comp_ff, 49480, 0 }, /* EXG */ +{ op_c150_0_comp_ff, 49488, 0 }, /* AND */ +{ op_c158_0_comp_ff, 49496, 0 }, /* AND */ +{ op_c160_0_comp_ff, 49504, 0 }, /* AND */ +{ op_c168_0_comp_ff, 49512, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c170_0_comp_ff, 49520, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c178_0_comp_ff, 49528, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c179_0_comp_ff, 49529, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c188_0_comp_ff, 49544, 0 }, /* EXG */ +{ op_c190_0_comp_ff, 49552, 0 }, /* AND */ +{ op_c198_0_comp_ff, 49560, 0 }, /* AND */ +{ op_c1a0_0_comp_ff, 49568, 0 }, /* AND */ +{ op_c1a8_0_comp_ff, 49576, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c1b0_0_comp_ff, 49584, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c1b8_0_comp_ff, 49592, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c1b9_0_comp_ff, 49593, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c1c0_0_comp_ff, 49600, 0 }, /* MULS */ +{ op_c1d0_0_comp_ff, 49616, 0 }, /* MULS */ +{ op_c1d8_0_comp_ff, 49624, 0 }, /* MULS */ +{ op_c1e0_0_comp_ff, 49632, 0 }, /* MULS */ +{ op_c1e8_0_comp_ff, 49640, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1f0_0_comp_ff, 49648, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1f8_0_comp_ff, 49656, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1f9_0_comp_ff, 49657, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1fa_0_comp_ff, 49658, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1fb_0_comp_ff, 49659, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1fc_0_comp_ff, 49660, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_d000_0_comp_ff, 53248, 0 }, /* ADD */ +{ op_d010_0_comp_ff, 53264, 0 }, /* ADD */ +{ op_d018_0_comp_ff, 53272, 0 }, /* ADD */ +{ op_d020_0_comp_ff, 53280, 0 }, /* ADD */ +{ op_d028_0_comp_ff, 53288, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d030_0_comp_ff, 53296, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d038_0_comp_ff, 53304, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d039_0_comp_ff, 53305, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d03a_0_comp_ff, 53306, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d03b_0_comp_ff, 53307, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d03c_0_comp_ff, 53308, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d040_0_comp_ff, 53312, 0 }, /* ADD */ +{ op_d048_0_comp_ff, 53320, 0 }, /* ADD */ +{ op_d050_0_comp_ff, 53328, 0 }, /* ADD */ +{ op_d058_0_comp_ff, 53336, 0 }, /* ADD */ +{ op_d060_0_comp_ff, 53344, 0 }, /* ADD */ +{ op_d068_0_comp_ff, 53352, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d070_0_comp_ff, 53360, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d078_0_comp_ff, 53368, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d079_0_comp_ff, 53369, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d07a_0_comp_ff, 53370, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d07b_0_comp_ff, 53371, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d07c_0_comp_ff, 53372, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d080_0_comp_ff, 53376, 0 }, /* ADD */ +{ op_d088_0_comp_ff, 53384, 0 }, /* ADD */ +{ op_d090_0_comp_ff, 53392, 0 }, /* ADD */ +{ op_d098_0_comp_ff, 53400, 0 }, /* ADD */ +{ op_d0a0_0_comp_ff, 53408, 0 }, /* ADD */ +{ op_d0a8_0_comp_ff, 53416, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0b0_0_comp_ff, 53424, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0b8_0_comp_ff, 53432, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0b9_0_comp_ff, 53433, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0ba_0_comp_ff, 53434, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0bb_0_comp_ff, 53435, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0bc_0_comp_ff, 53436, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0c0_0_comp_ff, 53440, 0 }, /* ADDA */ +{ op_d0c8_0_comp_ff, 53448, 0 }, /* ADDA */ +{ op_d0d0_0_comp_ff, 53456, 0 }, /* ADDA */ +{ op_d0d8_0_comp_ff, 53464, 0 }, /* ADDA */ +{ op_d0e0_0_comp_ff, 53472, 0 }, /* ADDA */ +{ op_d0e8_0_comp_ff, 53480, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0f0_0_comp_ff, 53488, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0f8_0_comp_ff, 53496, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0f9_0_comp_ff, 53497, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0fa_0_comp_ff, 53498, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0fb_0_comp_ff, 53499, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0fc_0_comp_ff, 53500, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d100_0_comp_ff, 53504, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d108_0_comp_ff, 53512, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d110_0_comp_ff, 53520, 0 }, /* ADD */ +{ op_d118_0_comp_ff, 53528, 0 }, /* ADD */ +{ op_d120_0_comp_ff, 53536, 0 }, /* ADD */ +{ op_d128_0_comp_ff, 53544, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d130_0_comp_ff, 53552, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d138_0_comp_ff, 53560, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d139_0_comp_ff, 53561, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d140_0_comp_ff, 53568, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d148_0_comp_ff, 53576, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d150_0_comp_ff, 53584, 0 }, /* ADD */ +{ op_d158_0_comp_ff, 53592, 0 }, /* ADD */ +{ op_d160_0_comp_ff, 53600, 0 }, /* ADD */ +{ op_d168_0_comp_ff, 53608, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d170_0_comp_ff, 53616, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d178_0_comp_ff, 53624, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d179_0_comp_ff, 53625, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d180_0_comp_ff, 53632, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d188_0_comp_ff, 53640, COMP_OPCODE_CMOV|COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d190_0_comp_ff, 53648, 0 }, /* ADD */ +{ op_d198_0_comp_ff, 53656, 0 }, /* ADD */ +{ op_d1a0_0_comp_ff, 53664, 0 }, /* ADD */ +{ op_d1a8_0_comp_ff, 53672, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d1b0_0_comp_ff, 53680, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d1b8_0_comp_ff, 53688, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d1b9_0_comp_ff, 53689, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d1c0_0_comp_ff, 53696, 0 }, /* ADDA */ +{ op_d1c8_0_comp_ff, 53704, 0 }, /* ADDA */ +{ op_d1d0_0_comp_ff, 53712, 0 }, /* ADDA */ +{ op_d1d8_0_comp_ff, 53720, 0 }, /* ADDA */ +{ op_d1e0_0_comp_ff, 53728, 0 }, /* ADDA */ +{ op_d1e8_0_comp_ff, 53736, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1f0_0_comp_ff, 53744, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1f8_0_comp_ff, 53752, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1f9_0_comp_ff, 53753, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1fa_0_comp_ff, 53754, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1fb_0_comp_ff, 53755, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1fc_0_comp_ff, 53756, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_e000_0_comp_ff, 57344, 0 }, /* ASR */ +{ op_e008_0_comp_ff, 57352, 0 }, /* LSR */ +{ NULL, 57360, 0 }, /* ROXR */ +{ op_e018_0_comp_ff, 57368, 0 }, /* ROR */ +{ op_e020_0_comp_ff, 57376, COMP_OPCODE_CMOV }, /* ASR */ +{ op_e028_0_comp_ff, 57384, COMP_OPCODE_CMOV }, /* LSR */ +{ NULL, 57392, 0 }, /* ROXR */ +{ op_e038_0_comp_ff, 57400, 0 }, /* ROR */ +{ op_e040_0_comp_ff, 57408, 0 }, /* ASR */ +{ op_e048_0_comp_ff, 57416, 0 }, /* LSR */ +{ NULL, 57424, 0 }, /* ROXR */ +{ op_e058_0_comp_ff, 57432, 0 }, /* ROR */ +{ op_e060_0_comp_ff, 57440, COMP_OPCODE_CMOV }, /* ASR */ +{ op_e068_0_comp_ff, 57448, COMP_OPCODE_CMOV }, /* LSR */ +{ NULL, 57456, 0 }, /* ROXR */ +{ op_e078_0_comp_ff, 57464, 0 }, /* ROR */ +{ op_e080_0_comp_ff, 57472, 0 }, /* ASR */ +{ op_e088_0_comp_ff, 57480, 0 }, /* LSR */ +{ NULL, 57488, 0 }, /* ROXR */ +{ op_e098_0_comp_ff, 57496, 0 }, /* ROR */ +{ op_e0a0_0_comp_ff, 57504, COMP_OPCODE_CMOV }, /* ASR */ +{ op_e0a8_0_comp_ff, 57512, COMP_OPCODE_CMOV }, /* LSR */ +{ NULL, 57520, 0 }, /* ROXR */ +{ op_e0b8_0_comp_ff, 57528, 0 }, /* ROR */ +{ NULL, 57552, 0 }, /* ASRW */ +{ NULL, 57560, 0 }, /* ASRW */ +{ NULL, 57568, 0 }, /* ASRW */ +{ NULL, 57576, 0 }, /* ASRW */ +{ NULL, 57584, 0 }, /* ASRW */ +{ NULL, 57592, 0 }, /* ASRW */ +{ NULL, 57593, 0 }, /* ASRW */ +{ op_e100_0_comp_ff, 57600, 0 }, /* ASL */ +{ op_e108_0_comp_ff, 57608, 0 }, /* LSL */ +{ NULL, 57616, 0 }, /* ROXL */ +{ op_e118_0_comp_ff, 57624, 0 }, /* ROL */ +{ op_e120_0_comp_ff, 57632, COMP_OPCODE_CMOV }, /* ASL */ +{ op_e128_0_comp_ff, 57640, COMP_OPCODE_CMOV }, /* LSL */ +{ NULL, 57648, 0 }, /* ROXL */ +{ op_e138_0_comp_ff, 57656, 0 }, /* ROL */ +{ op_e140_0_comp_ff, 57664, 0 }, /* ASL */ +{ op_e148_0_comp_ff, 57672, 0 }, /* LSL */ +{ NULL, 57680, 0 }, /* ROXL */ +{ op_e158_0_comp_ff, 57688, 0 }, /* ROL */ +{ op_e160_0_comp_ff, 57696, COMP_OPCODE_CMOV }, /* ASL */ +{ op_e168_0_comp_ff, 57704, COMP_OPCODE_CMOV }, /* LSL */ +{ NULL, 57712, 0 }, /* ROXL */ +{ op_e178_0_comp_ff, 57720, 0 }, /* ROL */ +{ op_e180_0_comp_ff, 57728, 0 }, /* ASL */ +{ op_e188_0_comp_ff, 57736, 0 }, /* LSL */ +{ NULL, 57744, 0 }, /* ROXL */ +{ op_e198_0_comp_ff, 57752, 0 }, /* ROL */ +{ op_e1a0_0_comp_ff, 57760, COMP_OPCODE_CMOV }, /* ASL */ +{ op_e1a8_0_comp_ff, 57768, COMP_OPCODE_CMOV }, /* LSL */ +{ NULL, 57776, 0 }, /* ROXL */ +{ op_e1b8_0_comp_ff, 57784, 0 }, /* ROL */ +{ NULL, 57808, 0 }, /* ASLW */ +{ NULL, 57816, 0 }, /* ASLW */ +{ NULL, 57824, 0 }, /* ASLW */ +{ NULL, 57832, 0 }, /* ASLW */ +{ NULL, 57840, 0 }, /* ASLW */ +{ NULL, 57848, 0 }, /* ASLW */ +{ NULL, 57849, 0 }, /* ASLW */ +{ NULL, 58064, 0 }, /* LSRW */ +{ NULL, 58072, 0 }, /* LSRW */ +{ NULL, 58080, 0 }, /* LSRW */ +{ NULL, 58088, 0 }, /* LSRW */ +{ NULL, 58096, 0 }, /* LSRW */ +{ NULL, 58104, 0 }, /* LSRW */ +{ NULL, 58105, 0 }, /* LSRW */ +{ NULL, 58320, 0 }, /* LSLW */ +{ NULL, 58328, 0 }, /* LSLW */ +{ NULL, 58336, 0 }, /* LSLW */ +{ NULL, 58344, 0 }, /* LSLW */ +{ NULL, 58352, 0 }, /* LSLW */ +{ NULL, 58360, 0 }, /* LSLW */ +{ NULL, 58361, 0 }, /* LSLW */ +{ NULL, 58576, 0 }, /* ROXRW */ +{ NULL, 58584, 0 }, /* ROXRW */ +{ NULL, 58592, 0 }, /* ROXRW */ +{ NULL, 58600, 0 }, /* ROXRW */ +{ NULL, 58608, 0 }, /* ROXRW */ +{ NULL, 58616, 0 }, /* ROXRW */ +{ NULL, 58617, 0 }, /* ROXRW */ +{ NULL, 58832, 0 }, /* ROXLW */ +{ NULL, 58840, 0 }, /* ROXLW */ +{ NULL, 58848, 0 }, /* ROXLW */ +{ NULL, 58856, 0 }, /* ROXLW */ +{ NULL, 58864, 0 }, /* ROXLW */ +{ NULL, 58872, 0 }, /* ROXLW */ +{ NULL, 58873, 0 }, /* ROXLW */ +{ NULL, 59088, 0 }, /* RORW */ +{ NULL, 59096, 0 }, /* RORW */ +{ NULL, 59104, 0 }, /* RORW */ +{ NULL, 59112, 0 }, /* RORW */ +{ NULL, 59120, 0 }, /* RORW */ +{ NULL, 59128, 0 }, /* RORW */ +{ NULL, 59129, 0 }, /* RORW */ +{ NULL, 59344, 0 }, /* ROLW */ +{ NULL, 59352, 0 }, /* ROLW */ +{ NULL, 59360, 0 }, /* ROLW */ +{ NULL, 59368, 0 }, /* ROLW */ +{ NULL, 59376, 0 }, /* ROLW */ +{ NULL, 59384, 0 }, /* ROLW */ +{ NULL, 59385, 0 }, /* ROLW */ +{ NULL, 59584, 0 }, /* BFTST */ +{ NULL, 59600, 0 }, /* BFTST */ +{ NULL, 59624, 0 }, /* BFTST */ +{ NULL, 59632, 0 }, /* BFTST */ +{ NULL, 59640, 0 }, /* BFTST */ +{ NULL, 59641, 0 }, /* BFTST */ +{ NULL, 59642, 0 }, /* BFTST */ +{ NULL, 59643, 0 }, /* BFTST */ +{ NULL, 59840, 0 }, /* BFEXTU */ +{ NULL, 59856, 0 }, /* BFEXTU */ +{ NULL, 59880, 0 }, /* BFEXTU */ +{ NULL, 59888, 0 }, /* BFEXTU */ +{ NULL, 59896, 0 }, /* BFEXTU */ +{ NULL, 59897, 0 }, /* BFEXTU */ +{ NULL, 59898, 0 }, /* BFEXTU */ +{ NULL, 59899, 0 }, /* BFEXTU */ +{ NULL, 60096, 0 }, /* BFCHG */ +{ NULL, 60112, 0 }, /* BFCHG */ +{ NULL, 60136, 0 }, /* BFCHG */ +{ NULL, 60144, 0 }, /* BFCHG */ +{ NULL, 60152, 0 }, /* BFCHG */ +{ NULL, 60153, 0 }, /* BFCHG */ +{ NULL, 60352, 0 }, /* BFEXTS */ +{ NULL, 60368, 0 }, /* BFEXTS */ +{ NULL, 60392, 0 }, /* BFEXTS */ +{ NULL, 60400, 0 }, /* BFEXTS */ +{ NULL, 60408, 0 }, /* BFEXTS */ +{ NULL, 60409, 0 }, /* BFEXTS */ +{ NULL, 60410, 0 }, /* BFEXTS */ +{ NULL, 60411, 0 }, /* BFEXTS */ +{ NULL, 60608, 0 }, /* BFCLR */ +{ NULL, 60624, 0 }, /* BFCLR */ +{ NULL, 60648, 0 }, /* BFCLR */ +{ NULL, 60656, 0 }, /* BFCLR */ +{ NULL, 60664, 0 }, /* BFCLR */ +{ NULL, 60665, 0 }, /* BFCLR */ +{ NULL, 60864, 0 }, /* BFFFO */ +{ NULL, 60880, 0 }, /* BFFFO */ +{ NULL, 60904, 0 }, /* BFFFO */ +{ NULL, 60912, 0 }, /* BFFFO */ +{ NULL, 60920, 0 }, /* BFFFO */ +{ NULL, 60921, 0 }, /* BFFFO */ +{ NULL, 60922, 0 }, /* BFFFO */ +{ NULL, 60923, 0 }, /* BFFFO */ +{ NULL, 61120, 0 }, /* BFSET */ +{ NULL, 61136, 0 }, /* BFSET */ +{ NULL, 61160, 0 }, /* BFSET */ +{ NULL, 61168, 0 }, /* BFSET */ +{ NULL, 61176, 0 }, /* BFSET */ +{ NULL, 61177, 0 }, /* BFSET */ +{ NULL, 61376, 0 }, /* BFINS */ +{ NULL, 61392, 0 }, /* BFINS */ +{ NULL, 61416, 0 }, /* BFINS */ +{ NULL, 61424, 0 }, /* BFINS */ +{ NULL, 61432, 0 }, /* BFINS */ +{ NULL, 61433, 0 }, /* BFINS */ +{ NULL, 61440, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61448, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61456, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61464, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61472, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61480, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61488, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61496, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61497, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ op_f200_0_comp_ff, 61952, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f208_0_comp_ff, 61960, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f210_0_comp_ff, 61968, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f218_0_comp_ff, 61976, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f220_0_comp_ff, 61984, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f228_0_comp_ff, 61992, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f230_0_comp_ff, 62000, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f238_0_comp_ff, 62008, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f239_0_comp_ff, 62009, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f23a_0_comp_ff, 62010, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f23b_0_comp_ff, 62011, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f23c_0_comp_ff, 62012, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f240_0_comp_ff, 62016, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ NULL, 62024, COMP_OPCODE_ISJUMP|COMP_OPCODE_USES_FPU }, /* FDBcc */ +{ op_f250_0_comp_ff, 62032, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f258_0_comp_ff, 62040, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f260_0_comp_ff, 62048, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f268_0_comp_ff, 62056, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f270_0_comp_ff, 62064, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f278_0_comp_ff, 62072, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f279_0_comp_ff, 62073, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ NULL, 62074, COMP_OPCODE_ISJUMP|COMP_OPCODE_USES_FPU }, /* FTRAPcc */ +{ NULL, 62075, COMP_OPCODE_ISJUMP|COMP_OPCODE_USES_FPU }, /* FTRAPcc */ +{ NULL, 62076, COMP_OPCODE_ISJUMP|COMP_OPCODE_USES_FPU }, /* FTRAPcc */ +{ op_f280_0_comp_ff, 62080, COMP_OPCODE_ISJUMP|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FBcc */ +{ op_f2c0_0_comp_ff, 62144, COMP_OPCODE_ISJUMP|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FBcc */ +{ NULL, 62224, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62240, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62248, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62256, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62264, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62265, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62288, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62296, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62312, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62320, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62328, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62329, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62330, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62331, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62472, COMP_OPCODE_ISJUMP }, /* CINVL */ +{ NULL, 62480, COMP_OPCODE_ISJUMP }, /* CINVP */ +{ NULL, 62488, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62489, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62490, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62491, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62492, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62493, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62494, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62495, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62504, COMP_OPCODE_ISJUMP }, /* CPUSHL */ +{ NULL, 62512, COMP_OPCODE_ISJUMP }, /* CPUSHP */ +{ NULL, 62520, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62521, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62522, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62523, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62524, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62525, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62526, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62527, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62720, COMP_OPCODE_ISJUMP }, /* PFLUSHN */ +{ NULL, 62728, COMP_OPCODE_ISJUMP }, /* PFLUSH */ +{ NULL, 62736, COMP_OPCODE_ISJUMP }, /* PFLUSHAN */ +{ NULL, 62744, COMP_OPCODE_ISJUMP }, /* PFLUSHA */ +{ NULL, 62792, COMP_OPCODE_ISJUMP }, /* PTESTW */ +{ NULL, 62824, COMP_OPCODE_ISJUMP }, /* PTESTR */ +{ NULL, 62856, COMP_OPCODE_ISJUMP }, /* PLPAW */ +{ NULL, 62920, COMP_OPCODE_ISJUMP }, /* PLPAR */ +{ op_f600_0_comp_ff, 62976, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ op_f608_0_comp_ff, 62984, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ op_f610_0_comp_ff, 62992, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ op_f618_0_comp_ff, 63000, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ op_f620_0_comp_ff, 63008, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ NULL, 63488, COMP_OPCODE_ISJUMP }, /* LPSTOP */ +{ 0, 65536, 0 }}; +const struct comptbl op_smalltbl_0_comp_nf[] = { +{ op_0_0_comp_nf, 0, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_10_0_comp_nf, 16, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_18_0_comp_nf, 24, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_20_0_comp_nf, 32, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_28_0_comp_nf, 40, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_30_0_comp_nf, 48, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_38_0_comp_nf, 56, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_39_0_comp_nf, 57, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 60, COMP_OPCODE_ISJUMP }, /* ORSR */ +{ op_40_0_comp_nf, 64, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_50_0_comp_nf, 80, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_58_0_comp_nf, 88, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_60_0_comp_nf, 96, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_68_0_comp_nf, 104, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_70_0_comp_nf, 112, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_78_0_comp_nf, 120, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_79_0_comp_nf, 121, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 124, COMP_OPCODE_ISJUMP }, /* ORSR */ +{ op_80_0_comp_nf, 128, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_90_0_comp_nf, 144, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_98_0_comp_nf, 152, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_a0_0_comp_nf, 160, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_a8_0_comp_nf, 168, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_b0_0_comp_nf, 176, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_b8_0_comp_nf, 184, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_b9_0_comp_nf, 185, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 208, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 232, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 240, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 248, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 249, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 250, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 251, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ op_100_0_comp_nf, 256, 0 }, /* BTST */ +{ NULL, 264, COMP_OPCODE_ISJUMP }, /* MVPMR */ +{ op_110_0_comp_nf, 272, 0 }, /* BTST */ +{ op_118_0_comp_nf, 280, 0 }, /* BTST */ +{ op_120_0_comp_nf, 288, 0 }, /* BTST */ +{ op_128_0_comp_nf, 296, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_130_0_comp_nf, 304, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_138_0_comp_nf, 312, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_139_0_comp_nf, 313, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_13a_0_comp_nf, 314, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_13b_0_comp_nf, 315, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_13c_0_comp_nf, 316, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_140_0_comp_nf, 320, 0 }, /* BCHG */ +{ NULL, 328, COMP_OPCODE_ISJUMP }, /* MVPMR */ +{ op_150_0_comp_nf, 336, 0 }, /* BCHG */ +{ op_158_0_comp_nf, 344, 0 }, /* BCHG */ +{ op_160_0_comp_nf, 352, 0 }, /* BCHG */ +{ op_168_0_comp_nf, 360, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_170_0_comp_nf, 368, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_178_0_comp_nf, 376, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_179_0_comp_nf, 377, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_180_0_comp_nf, 384, 0 }, /* BCLR */ +{ NULL, 392, COMP_OPCODE_ISJUMP }, /* MVPRM */ +{ op_190_0_comp_nf, 400, 0 }, /* BCLR */ +{ op_198_0_comp_nf, 408, 0 }, /* BCLR */ +{ op_1a0_0_comp_nf, 416, 0 }, /* BCLR */ +{ op_1a8_0_comp_nf, 424, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_1b0_0_comp_nf, 432, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_1b8_0_comp_nf, 440, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_1b9_0_comp_nf, 441, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_1c0_0_comp_nf, 448, 0 }, /* BSET */ +{ NULL, 456, COMP_OPCODE_ISJUMP }, /* MVPRM */ +{ op_1d0_0_comp_nf, 464, 0 }, /* BSET */ +{ op_1d8_0_comp_nf, 472, 0 }, /* BSET */ +{ op_1e0_0_comp_nf, 480, 0 }, /* BSET */ +{ op_1e8_0_comp_nf, 488, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_1f0_0_comp_nf, 496, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_1f8_0_comp_nf, 504, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_1f9_0_comp_nf, 505, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_200_0_comp_nf, 512, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_210_0_comp_nf, 528, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_218_0_comp_nf, 536, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_220_0_comp_nf, 544, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_228_0_comp_nf, 552, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_230_0_comp_nf, 560, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_238_0_comp_nf, 568, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_239_0_comp_nf, 569, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ NULL, 572, COMP_OPCODE_ISJUMP }, /* ANDSR */ +{ op_240_0_comp_nf, 576, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_250_0_comp_nf, 592, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_258_0_comp_nf, 600, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_260_0_comp_nf, 608, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_268_0_comp_nf, 616, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_270_0_comp_nf, 624, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_278_0_comp_nf, 632, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_279_0_comp_nf, 633, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ NULL, 636, COMP_OPCODE_ISJUMP }, /* ANDSR */ +{ op_280_0_comp_nf, 640, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_290_0_comp_nf, 656, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_298_0_comp_nf, 664, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2a0_0_comp_nf, 672, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2a8_0_comp_nf, 680, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2b0_0_comp_nf, 688, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2b8_0_comp_nf, 696, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_2b9_0_comp_nf, 697, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ NULL, 720, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 744, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 752, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 760, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 761, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 762, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 763, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ op_400_0_comp_nf, 1024, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_410_0_comp_nf, 1040, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_418_0_comp_nf, 1048, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_420_0_comp_nf, 1056, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_428_0_comp_nf, 1064, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_430_0_comp_nf, 1072, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_438_0_comp_nf, 1080, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_439_0_comp_nf, 1081, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_440_0_comp_nf, 1088, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_450_0_comp_nf, 1104, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_458_0_comp_nf, 1112, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_460_0_comp_nf, 1120, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_468_0_comp_nf, 1128, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_470_0_comp_nf, 1136, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_478_0_comp_nf, 1144, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_479_0_comp_nf, 1145, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_480_0_comp_nf, 1152, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_490_0_comp_nf, 1168, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_498_0_comp_nf, 1176, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4a0_0_comp_nf, 1184, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4a8_0_comp_nf, 1192, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4b0_0_comp_nf, 1200, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4b8_0_comp_nf, 1208, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_4b9_0_comp_nf, 1209, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ NULL, 1232, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1256, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1264, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1272, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1273, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1274, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ NULL, 1275, COMP_OPCODE_ISJUMP }, /* CHK2 */ +{ op_600_0_comp_nf, 1536, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_610_0_comp_nf, 1552, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_618_0_comp_nf, 1560, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_620_0_comp_nf, 1568, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_628_0_comp_nf, 1576, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_630_0_comp_nf, 1584, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_638_0_comp_nf, 1592, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_639_0_comp_nf, 1593, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_640_0_comp_nf, 1600, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_650_0_comp_nf, 1616, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_658_0_comp_nf, 1624, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_660_0_comp_nf, 1632, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_668_0_comp_nf, 1640, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_670_0_comp_nf, 1648, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_678_0_comp_nf, 1656, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_679_0_comp_nf, 1657, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_680_0_comp_nf, 1664, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_690_0_comp_nf, 1680, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_698_0_comp_nf, 1688, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6a0_0_comp_nf, 1696, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6a8_0_comp_nf, 1704, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6b0_0_comp_nf, 1712, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6b8_0_comp_nf, 1720, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_6b9_0_comp_nf, 1721, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ NULL, 1728, COMP_OPCODE_ISJUMP }, /* RTM */ +{ NULL, 1736, COMP_OPCODE_ISJUMP }, /* RTM */ +{ NULL, 1744, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1768, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1776, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1784, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1785, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1786, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ NULL, 1787, COMP_OPCODE_ISJUMP }, /* CALLM */ +{ op_800_0_comp_nf, 2048, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_810_0_comp_nf, 2064, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_818_0_comp_nf, 2072, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_820_0_comp_nf, 2080, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_828_0_comp_nf, 2088, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_830_0_comp_nf, 2096, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_838_0_comp_nf, 2104, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_839_0_comp_nf, 2105, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_83a_0_comp_nf, 2106, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_83b_0_comp_nf, 2107, COMP_OPCODE_LONG_OPCODE }, /* BTST */ +{ op_840_0_comp_nf, 2112, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_850_0_comp_nf, 2128, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_858_0_comp_nf, 2136, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_860_0_comp_nf, 2144, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_868_0_comp_nf, 2152, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_870_0_comp_nf, 2160, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_878_0_comp_nf, 2168, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_879_0_comp_nf, 2169, COMP_OPCODE_LONG_OPCODE }, /* BCHG */ +{ op_880_0_comp_nf, 2176, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_890_0_comp_nf, 2192, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_898_0_comp_nf, 2200, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8a0_0_comp_nf, 2208, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8a8_0_comp_nf, 2216, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8b0_0_comp_nf, 2224, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8b8_0_comp_nf, 2232, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8b9_0_comp_nf, 2233, COMP_OPCODE_LONG_OPCODE }, /* BCLR */ +{ op_8c0_0_comp_nf, 2240, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8d0_0_comp_nf, 2256, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8d8_0_comp_nf, 2264, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8e0_0_comp_nf, 2272, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8e8_0_comp_nf, 2280, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8f0_0_comp_nf, 2288, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8f8_0_comp_nf, 2296, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_8f9_0_comp_nf, 2297, COMP_OPCODE_LONG_OPCODE }, /* BSET */ +{ op_a00_0_comp_nf, 2560, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a10_0_comp_nf, 2576, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a18_0_comp_nf, 2584, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a20_0_comp_nf, 2592, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a28_0_comp_nf, 2600, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a30_0_comp_nf, 2608, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a38_0_comp_nf, 2616, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a39_0_comp_nf, 2617, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ NULL, 2620, COMP_OPCODE_ISJUMP }, /* EORSR */ +{ op_a40_0_comp_nf, 2624, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a50_0_comp_nf, 2640, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a58_0_comp_nf, 2648, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a60_0_comp_nf, 2656, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a68_0_comp_nf, 2664, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a70_0_comp_nf, 2672, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a78_0_comp_nf, 2680, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a79_0_comp_nf, 2681, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ NULL, 2684, COMP_OPCODE_ISJUMP }, /* EORSR */ +{ op_a80_0_comp_nf, 2688, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a90_0_comp_nf, 2704, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_a98_0_comp_nf, 2712, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_aa0_0_comp_nf, 2720, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_aa8_0_comp_nf, 2728, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_ab0_0_comp_nf, 2736, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_ab8_0_comp_nf, 2744, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_ab9_0_comp_nf, 2745, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ NULL, 2768, 0 }, /* CAS */ +{ NULL, 2776, 0 }, /* CAS */ +{ NULL, 2784, 0 }, /* CAS */ +{ NULL, 2792, 0 }, /* CAS */ +{ NULL, 2800, 0 }, /* CAS */ +{ NULL, 2808, 0 }, /* CAS */ +{ NULL, 2809, 0 }, /* CAS */ +{ op_c00_0_comp_nf, 3072, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c10_0_comp_nf, 3088, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c18_0_comp_nf, 3096, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c20_0_comp_nf, 3104, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c28_0_comp_nf, 3112, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c30_0_comp_nf, 3120, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c38_0_comp_nf, 3128, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c39_0_comp_nf, 3129, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c3a_0_comp_nf, 3130, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c3b_0_comp_nf, 3131, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c40_0_comp_nf, 3136, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c50_0_comp_nf, 3152, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c58_0_comp_nf, 3160, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c60_0_comp_nf, 3168, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c68_0_comp_nf, 3176, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c70_0_comp_nf, 3184, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c78_0_comp_nf, 3192, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c79_0_comp_nf, 3193, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c7a_0_comp_nf, 3194, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c7b_0_comp_nf, 3195, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c80_0_comp_nf, 3200, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c90_0_comp_nf, 3216, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_c98_0_comp_nf, 3224, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_ca0_0_comp_nf, 3232, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_ca8_0_comp_nf, 3240, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cb0_0_comp_nf, 3248, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cb8_0_comp_nf, 3256, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cb9_0_comp_nf, 3257, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cba_0_comp_nf, 3258, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_cbb_0_comp_nf, 3259, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ NULL, 3280, 0 }, /* CAS */ +{ NULL, 3288, 0 }, /* CAS */ +{ NULL, 3296, 0 }, /* CAS */ +{ NULL, 3304, 0 }, /* CAS */ +{ NULL, 3312, 0 }, /* CAS */ +{ NULL, 3320, 0 }, /* CAS */ +{ NULL, 3321, 0 }, /* CAS */ +{ NULL, 3324, 0 }, /* CAS2 */ +{ NULL, 3600, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3608, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3616, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3624, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3632, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3640, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3641, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3664, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3672, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3680, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3688, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3696, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3704, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3705, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3728, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3736, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3744, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3752, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3760, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3768, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3769, COMP_OPCODE_ISJUMP }, /* MOVES */ +{ NULL, 3792, 0 }, /* CAS */ +{ NULL, 3800, 0 }, /* CAS */ +{ NULL, 3808, 0 }, /* CAS */ +{ NULL, 3816, 0 }, /* CAS */ +{ NULL, 3824, 0 }, /* CAS */ +{ NULL, 3832, 0 }, /* CAS */ +{ NULL, 3833, 0 }, /* CAS */ +{ NULL, 3836, 0 }, /* CAS2 */ +{ op_1000_0_comp_nf, 4096, 0 }, /* MOVE */ +{ op_1010_0_comp_nf, 4112, 0 }, /* MOVE */ +{ op_1018_0_comp_nf, 4120, 0 }, /* MOVE */ +{ op_1020_0_comp_nf, 4128, 0 }, /* MOVE */ +{ op_1028_0_comp_nf, 4136, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1030_0_comp_nf, 4144, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1038_0_comp_nf, 4152, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1039_0_comp_nf, 4153, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_103a_0_comp_nf, 4154, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_103b_0_comp_nf, 4155, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_103c_0_comp_nf, 4156, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1080_0_comp_nf, 4224, 0 }, /* MOVE */ +{ op_1090_0_comp_nf, 4240, 0 }, /* MOVE */ +{ op_1098_0_comp_nf, 4248, 0 }, /* MOVE */ +{ op_10a0_0_comp_nf, 4256, 0 }, /* MOVE */ +{ op_10a8_0_comp_nf, 4264, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10b0_0_comp_nf, 4272, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10b8_0_comp_nf, 4280, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10b9_0_comp_nf, 4281, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10ba_0_comp_nf, 4282, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10bb_0_comp_nf, 4283, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10bc_0_comp_nf, 4284, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10c0_0_comp_nf, 4288, 0 }, /* MOVE */ +{ op_10d0_0_comp_nf, 4304, 0 }, /* MOVE */ +{ op_10d8_0_comp_nf, 4312, 0 }, /* MOVE */ +{ op_10e0_0_comp_nf, 4320, 0 }, /* MOVE */ +{ op_10e8_0_comp_nf, 4328, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10f0_0_comp_nf, 4336, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10f8_0_comp_nf, 4344, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10f9_0_comp_nf, 4345, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10fa_0_comp_nf, 4346, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10fb_0_comp_nf, 4347, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_10fc_0_comp_nf, 4348, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1100_0_comp_nf, 4352, 0 }, /* MOVE */ +{ op_1110_0_comp_nf, 4368, 0 }, /* MOVE */ +{ op_1118_0_comp_nf, 4376, 0 }, /* MOVE */ +{ op_1120_0_comp_nf, 4384, 0 }, /* MOVE */ +{ op_1128_0_comp_nf, 4392, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1130_0_comp_nf, 4400, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1138_0_comp_nf, 4408, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1139_0_comp_nf, 4409, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_113a_0_comp_nf, 4410, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_113b_0_comp_nf, 4411, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_113c_0_comp_nf, 4412, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1140_0_comp_nf, 4416, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1150_0_comp_nf, 4432, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1158_0_comp_nf, 4440, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1160_0_comp_nf, 4448, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1168_0_comp_nf, 4456, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1170_0_comp_nf, 4464, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1178_0_comp_nf, 4472, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1179_0_comp_nf, 4473, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_117a_0_comp_nf, 4474, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_117b_0_comp_nf, 4475, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_117c_0_comp_nf, 4476, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1180_0_comp_nf, 4480, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1190_0_comp_nf, 4496, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_1198_0_comp_nf, 4504, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11a0_0_comp_nf, 4512, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11a8_0_comp_nf, 4520, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11b0_0_comp_nf, 4528, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11b8_0_comp_nf, 4536, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11b9_0_comp_nf, 4537, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11ba_0_comp_nf, 4538, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11bb_0_comp_nf, 4539, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11bc_0_comp_nf, 4540, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11c0_0_comp_nf, 4544, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11d0_0_comp_nf, 4560, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11d8_0_comp_nf, 4568, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11e0_0_comp_nf, 4576, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11e8_0_comp_nf, 4584, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11f0_0_comp_nf, 4592, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11f8_0_comp_nf, 4600, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11f9_0_comp_nf, 4601, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11fa_0_comp_nf, 4602, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11fb_0_comp_nf, 4603, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_11fc_0_comp_nf, 4604, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13c0_0_comp_nf, 5056, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13d0_0_comp_nf, 5072, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13d8_0_comp_nf, 5080, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13e0_0_comp_nf, 5088, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13e8_0_comp_nf, 5096, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13f0_0_comp_nf, 5104, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13f8_0_comp_nf, 5112, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13f9_0_comp_nf, 5113, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13fa_0_comp_nf, 5114, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13fb_0_comp_nf, 5115, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_13fc_0_comp_nf, 5116, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2000_0_comp_nf, 8192, 0 }, /* MOVE */ +{ op_2008_0_comp_nf, 8200, 0 }, /* MOVE */ +{ op_2010_0_comp_nf, 8208, 0 }, /* MOVE */ +{ op_2018_0_comp_nf, 8216, 0 }, /* MOVE */ +{ op_2020_0_comp_nf, 8224, 0 }, /* MOVE */ +{ op_2028_0_comp_nf, 8232, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2030_0_comp_nf, 8240, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2038_0_comp_nf, 8248, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2039_0_comp_nf, 8249, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_203a_0_comp_nf, 8250, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_203b_0_comp_nf, 8251, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_203c_0_comp_nf, 8252, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2040_0_comp_nf, 8256, 0 }, /* MOVEA */ +{ op_2048_0_comp_nf, 8264, 0 }, /* MOVEA */ +{ op_2050_0_comp_nf, 8272, 0 }, /* MOVEA */ +{ op_2058_0_comp_nf, 8280, 0 }, /* MOVEA */ +{ op_2060_0_comp_nf, 8288, 0 }, /* MOVEA */ +{ op_2068_0_comp_nf, 8296, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_2070_0_comp_nf, 8304, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_2078_0_comp_nf, 8312, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_2079_0_comp_nf, 8313, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_207a_0_comp_nf, 8314, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_207b_0_comp_nf, 8315, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_207c_0_comp_nf, 8316, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_2080_0_comp_nf, 8320, 0 }, /* MOVE */ +{ op_2088_0_comp_nf, 8328, 0 }, /* MOVE */ +{ op_2090_0_comp_nf, 8336, 0 }, /* MOVE */ +{ op_2098_0_comp_nf, 8344, 0 }, /* MOVE */ +{ op_20a0_0_comp_nf, 8352, 0 }, /* MOVE */ +{ op_20a8_0_comp_nf, 8360, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20b0_0_comp_nf, 8368, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20b8_0_comp_nf, 8376, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20b9_0_comp_nf, 8377, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20ba_0_comp_nf, 8378, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20bb_0_comp_nf, 8379, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20bc_0_comp_nf, 8380, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20c0_0_comp_nf, 8384, 0 }, /* MOVE */ +{ op_20c8_0_comp_nf, 8392, 0 }, /* MOVE */ +{ op_20d0_0_comp_nf, 8400, 0 }, /* MOVE */ +{ op_20d8_0_comp_nf, 8408, 0 }, /* MOVE */ +{ op_20e0_0_comp_nf, 8416, 0 }, /* MOVE */ +{ op_20e8_0_comp_nf, 8424, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20f0_0_comp_nf, 8432, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20f8_0_comp_nf, 8440, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20f9_0_comp_nf, 8441, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20fa_0_comp_nf, 8442, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20fb_0_comp_nf, 8443, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_20fc_0_comp_nf, 8444, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2100_0_comp_nf, 8448, 0 }, /* MOVE */ +{ op_2108_0_comp_nf, 8456, 0 }, /* MOVE */ +{ op_2110_0_comp_nf, 8464, 0 }, /* MOVE */ +{ op_2118_0_comp_nf, 8472, 0 }, /* MOVE */ +{ op_2120_0_comp_nf, 8480, 0 }, /* MOVE */ +{ op_2128_0_comp_nf, 8488, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2130_0_comp_nf, 8496, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2138_0_comp_nf, 8504, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2139_0_comp_nf, 8505, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_213a_0_comp_nf, 8506, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_213b_0_comp_nf, 8507, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_213c_0_comp_nf, 8508, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2140_0_comp_nf, 8512, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2148_0_comp_nf, 8520, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2150_0_comp_nf, 8528, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2158_0_comp_nf, 8536, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2160_0_comp_nf, 8544, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2168_0_comp_nf, 8552, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2170_0_comp_nf, 8560, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2178_0_comp_nf, 8568, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2179_0_comp_nf, 8569, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_217a_0_comp_nf, 8570, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_217b_0_comp_nf, 8571, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_217c_0_comp_nf, 8572, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2180_0_comp_nf, 8576, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2188_0_comp_nf, 8584, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2190_0_comp_nf, 8592, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_2198_0_comp_nf, 8600, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21a0_0_comp_nf, 8608, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21a8_0_comp_nf, 8616, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21b0_0_comp_nf, 8624, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21b8_0_comp_nf, 8632, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21b9_0_comp_nf, 8633, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21ba_0_comp_nf, 8634, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21bb_0_comp_nf, 8635, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21bc_0_comp_nf, 8636, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21c0_0_comp_nf, 8640, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21c8_0_comp_nf, 8648, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21d0_0_comp_nf, 8656, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21d8_0_comp_nf, 8664, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21e0_0_comp_nf, 8672, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21e8_0_comp_nf, 8680, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21f0_0_comp_nf, 8688, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21f8_0_comp_nf, 8696, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21f9_0_comp_nf, 8697, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21fa_0_comp_nf, 8698, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21fb_0_comp_nf, 8699, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_21fc_0_comp_nf, 8700, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23c0_0_comp_nf, 9152, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23c8_0_comp_nf, 9160, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23d0_0_comp_nf, 9168, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23d8_0_comp_nf, 9176, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23e0_0_comp_nf, 9184, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23e8_0_comp_nf, 9192, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23f0_0_comp_nf, 9200, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23f8_0_comp_nf, 9208, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23f9_0_comp_nf, 9209, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23fa_0_comp_nf, 9210, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23fb_0_comp_nf, 9211, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_23fc_0_comp_nf, 9212, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3000_0_comp_nf, 12288, 0 }, /* MOVE */ +{ op_3008_0_comp_nf, 12296, 0 }, /* MOVE */ +{ op_3010_0_comp_nf, 12304, 0 }, /* MOVE */ +{ op_3018_0_comp_nf, 12312, 0 }, /* MOVE */ +{ op_3020_0_comp_nf, 12320, 0 }, /* MOVE */ +{ op_3028_0_comp_nf, 12328, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3030_0_comp_nf, 12336, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3038_0_comp_nf, 12344, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3039_0_comp_nf, 12345, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_303a_0_comp_nf, 12346, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_303b_0_comp_nf, 12347, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_303c_0_comp_nf, 12348, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3040_0_comp_nf, 12352, 0 }, /* MOVEA */ +{ op_3048_0_comp_nf, 12360, 0 }, /* MOVEA */ +{ op_3050_0_comp_nf, 12368, 0 }, /* MOVEA */ +{ op_3058_0_comp_nf, 12376, 0 }, /* MOVEA */ +{ op_3060_0_comp_nf, 12384, 0 }, /* MOVEA */ +{ op_3068_0_comp_nf, 12392, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_3070_0_comp_nf, 12400, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_3078_0_comp_nf, 12408, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_3079_0_comp_nf, 12409, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_307a_0_comp_nf, 12410, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_307b_0_comp_nf, 12411, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_307c_0_comp_nf, 12412, COMP_OPCODE_LONG_OPCODE }, /* MOVEA */ +{ op_3080_0_comp_nf, 12416, 0 }, /* MOVE */ +{ op_3088_0_comp_nf, 12424, 0 }, /* MOVE */ +{ op_3090_0_comp_nf, 12432, 0 }, /* MOVE */ +{ op_3098_0_comp_nf, 12440, 0 }, /* MOVE */ +{ op_30a0_0_comp_nf, 12448, 0 }, /* MOVE */ +{ op_30a8_0_comp_nf, 12456, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30b0_0_comp_nf, 12464, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30b8_0_comp_nf, 12472, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30b9_0_comp_nf, 12473, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30ba_0_comp_nf, 12474, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30bb_0_comp_nf, 12475, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30bc_0_comp_nf, 12476, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30c0_0_comp_nf, 12480, 0 }, /* MOVE */ +{ op_30c8_0_comp_nf, 12488, 0 }, /* MOVE */ +{ op_30d0_0_comp_nf, 12496, 0 }, /* MOVE */ +{ op_30d8_0_comp_nf, 12504, 0 }, /* MOVE */ +{ op_30e0_0_comp_nf, 12512, 0 }, /* MOVE */ +{ op_30e8_0_comp_nf, 12520, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30f0_0_comp_nf, 12528, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30f8_0_comp_nf, 12536, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30f9_0_comp_nf, 12537, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30fa_0_comp_nf, 12538, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30fb_0_comp_nf, 12539, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_30fc_0_comp_nf, 12540, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3100_0_comp_nf, 12544, 0 }, /* MOVE */ +{ op_3108_0_comp_nf, 12552, 0 }, /* MOVE */ +{ op_3110_0_comp_nf, 12560, 0 }, /* MOVE */ +{ op_3118_0_comp_nf, 12568, 0 }, /* MOVE */ +{ op_3120_0_comp_nf, 12576, 0 }, /* MOVE */ +{ op_3128_0_comp_nf, 12584, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3130_0_comp_nf, 12592, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3138_0_comp_nf, 12600, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3139_0_comp_nf, 12601, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_313a_0_comp_nf, 12602, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_313b_0_comp_nf, 12603, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_313c_0_comp_nf, 12604, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3140_0_comp_nf, 12608, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3148_0_comp_nf, 12616, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3150_0_comp_nf, 12624, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3158_0_comp_nf, 12632, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3160_0_comp_nf, 12640, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3168_0_comp_nf, 12648, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3170_0_comp_nf, 12656, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3178_0_comp_nf, 12664, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3179_0_comp_nf, 12665, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_317a_0_comp_nf, 12666, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_317b_0_comp_nf, 12667, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_317c_0_comp_nf, 12668, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3180_0_comp_nf, 12672, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3188_0_comp_nf, 12680, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3190_0_comp_nf, 12688, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_3198_0_comp_nf, 12696, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31a0_0_comp_nf, 12704, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31a8_0_comp_nf, 12712, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31b0_0_comp_nf, 12720, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31b8_0_comp_nf, 12728, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31b9_0_comp_nf, 12729, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31ba_0_comp_nf, 12730, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31bb_0_comp_nf, 12731, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31bc_0_comp_nf, 12732, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31c0_0_comp_nf, 12736, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31c8_0_comp_nf, 12744, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31d0_0_comp_nf, 12752, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31d8_0_comp_nf, 12760, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31e0_0_comp_nf, 12768, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31e8_0_comp_nf, 12776, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31f0_0_comp_nf, 12784, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31f8_0_comp_nf, 12792, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31f9_0_comp_nf, 12793, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31fa_0_comp_nf, 12794, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31fb_0_comp_nf, 12795, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_31fc_0_comp_nf, 12796, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33c0_0_comp_nf, 13248, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33c8_0_comp_nf, 13256, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33d0_0_comp_nf, 13264, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33d8_0_comp_nf, 13272, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33e0_0_comp_nf, 13280, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33e8_0_comp_nf, 13288, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33f0_0_comp_nf, 13296, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33f8_0_comp_nf, 13304, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33f9_0_comp_nf, 13305, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33fa_0_comp_nf, 13306, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33fb_0_comp_nf, 13307, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_33fc_0_comp_nf, 13308, COMP_OPCODE_LONG_OPCODE }, /* MOVE */ +{ op_4000_0_comp_nf, 16384, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4010_0_comp_nf, 16400, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4018_0_comp_nf, 16408, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4020_0_comp_nf, 16416, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4028_0_comp_nf, 16424, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4030_0_comp_nf, 16432, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4038_0_comp_nf, 16440, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4039_0_comp_nf, 16441, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4040_0_comp_nf, 16448, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4050_0_comp_nf, 16464, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4058_0_comp_nf, 16472, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4060_0_comp_nf, 16480, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4068_0_comp_nf, 16488, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4070_0_comp_nf, 16496, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4078_0_comp_nf, 16504, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4079_0_comp_nf, 16505, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4080_0_comp_nf, 16512, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4090_0_comp_nf, 16528, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_4098_0_comp_nf, 16536, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40a0_0_comp_nf, 16544, COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40a8_0_comp_nf, 16552, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40b0_0_comp_nf, 16560, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40b8_0_comp_nf, 16568, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ op_40b9_0_comp_nf, 16569, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISADDX }, /* NEGX */ +{ NULL, 16576, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16592, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16600, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16608, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16616, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16624, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16632, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16633, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 16640, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16656, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16664, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16672, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16680, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16688, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16696, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16697, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16698, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16699, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16700, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16768, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16784, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16792, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16800, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16808, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16816, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16824, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16825, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16826, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16827, COMP_OPCODE_ISJUMP }, /* CHK */ +{ NULL, 16828, COMP_OPCODE_ISJUMP }, /* CHK */ +{ op_41d0_0_comp_nf, 16848, 0 }, /* LEA */ +{ op_41e8_0_comp_nf, 16872, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41f0_0_comp_nf, 16880, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41f8_0_comp_nf, 16888, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41f9_0_comp_nf, 16889, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41fa_0_comp_nf, 16890, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_41fb_0_comp_nf, 16891, COMP_OPCODE_LONG_OPCODE }, /* LEA */ +{ op_4200_0_comp_nf, 16896, 0 }, /* CLR */ +{ op_4210_0_comp_nf, 16912, 0 }, /* CLR */ +{ op_4218_0_comp_nf, 16920, 0 }, /* CLR */ +{ op_4220_0_comp_nf, 16928, 0 }, /* CLR */ +{ op_4228_0_comp_nf, 16936, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4230_0_comp_nf, 16944, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4238_0_comp_nf, 16952, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4239_0_comp_nf, 16953, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4240_0_comp_nf, 16960, 0 }, /* CLR */ +{ op_4250_0_comp_nf, 16976, 0 }, /* CLR */ +{ op_4258_0_comp_nf, 16984, 0 }, /* CLR */ +{ op_4260_0_comp_nf, 16992, 0 }, /* CLR */ +{ op_4268_0_comp_nf, 17000, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4270_0_comp_nf, 17008, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4278_0_comp_nf, 17016, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4279_0_comp_nf, 17017, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_4280_0_comp_nf, 17024, 0 }, /* CLR */ +{ op_4290_0_comp_nf, 17040, 0 }, /* CLR */ +{ op_4298_0_comp_nf, 17048, 0 }, /* CLR */ +{ op_42a0_0_comp_nf, 17056, 0 }, /* CLR */ +{ op_42a8_0_comp_nf, 17064, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_42b0_0_comp_nf, 17072, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_42b8_0_comp_nf, 17080, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ op_42b9_0_comp_nf, 17081, COMP_OPCODE_LONG_OPCODE }, /* CLR */ +{ NULL, 17088, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17104, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17112, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17120, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17128, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17136, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17144, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ NULL, 17145, COMP_OPCODE_ISJUMP }, /* MVSR2 */ +{ op_4400_0_comp_nf, 17408, 0 }, /* NEG */ +{ op_4410_0_comp_nf, 17424, 0 }, /* NEG */ +{ op_4418_0_comp_nf, 17432, 0 }, /* NEG */ +{ op_4420_0_comp_nf, 17440, 0 }, /* NEG */ +{ op_4428_0_comp_nf, 17448, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4430_0_comp_nf, 17456, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4438_0_comp_nf, 17464, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4439_0_comp_nf, 17465, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4440_0_comp_nf, 17472, 0 }, /* NEG */ +{ op_4450_0_comp_nf, 17488, 0 }, /* NEG */ +{ op_4458_0_comp_nf, 17496, 0 }, /* NEG */ +{ op_4460_0_comp_nf, 17504, 0 }, /* NEG */ +{ op_4468_0_comp_nf, 17512, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4470_0_comp_nf, 17520, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4478_0_comp_nf, 17528, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4479_0_comp_nf, 17529, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_4480_0_comp_nf, 17536, 0 }, /* NEG */ +{ op_4490_0_comp_nf, 17552, 0 }, /* NEG */ +{ op_4498_0_comp_nf, 17560, 0 }, /* NEG */ +{ op_44a0_0_comp_nf, 17568, 0 }, /* NEG */ +{ op_44a8_0_comp_nf, 17576, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_44b0_0_comp_nf, 17584, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_44b8_0_comp_nf, 17592, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ op_44b9_0_comp_nf, 17593, COMP_OPCODE_LONG_OPCODE }, /* NEG */ +{ NULL, 17600, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17616, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17624, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17632, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17640, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17648, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17656, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17657, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17658, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17659, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 17660, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ op_4600_0_comp_nf, 17920, 0 }, /* NOT */ +{ op_4610_0_comp_nf, 17936, 0 }, /* NOT */ +{ op_4618_0_comp_nf, 17944, 0 }, /* NOT */ +{ op_4620_0_comp_nf, 17952, 0 }, /* NOT */ +{ op_4628_0_comp_nf, 17960, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4630_0_comp_nf, 17968, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4638_0_comp_nf, 17976, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4639_0_comp_nf, 17977, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4640_0_comp_nf, 17984, 0 }, /* NOT */ +{ op_4650_0_comp_nf, 18000, 0 }, /* NOT */ +{ op_4658_0_comp_nf, 18008, 0 }, /* NOT */ +{ op_4660_0_comp_nf, 18016, 0 }, /* NOT */ +{ op_4668_0_comp_nf, 18024, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4670_0_comp_nf, 18032, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4678_0_comp_nf, 18040, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4679_0_comp_nf, 18041, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_4680_0_comp_nf, 18048, 0 }, /* NOT */ +{ op_4690_0_comp_nf, 18064, 0 }, /* NOT */ +{ op_4698_0_comp_nf, 18072, 0 }, /* NOT */ +{ op_46a0_0_comp_nf, 18080, 0 }, /* NOT */ +{ op_46a8_0_comp_nf, 18088, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_46b0_0_comp_nf, 18096, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_46b8_0_comp_nf, 18104, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ op_46b9_0_comp_nf, 18105, COMP_OPCODE_LONG_OPCODE }, /* NOT */ +{ NULL, 18112, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18128, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18136, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18144, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18152, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18160, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18168, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18169, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18170, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18171, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18172, COMP_OPCODE_ISJUMP }, /* MV2SR */ +{ NULL, 18432, 0 }, /* NBCD */ +{ op_4808_0_comp_nf, 18440, COMP_OPCODE_LONG_OPCODE }, /* LINK */ +{ NULL, 18448, 0 }, /* NBCD */ +{ NULL, 18456, 0 }, /* NBCD */ +{ NULL, 18464, 0 }, /* NBCD */ +{ NULL, 18472, 0 }, /* NBCD */ +{ NULL, 18480, 0 }, /* NBCD */ +{ NULL, 18488, 0 }, /* NBCD */ +{ NULL, 18489, 0 }, /* NBCD */ +{ op_4840_0_comp_nf, 18496, 0 }, /* SWAP */ +{ NULL, 18504, COMP_OPCODE_ISJUMP }, /* BKPT */ +{ op_4850_0_comp_nf, 18512, 0 }, /* PEA */ +{ op_4868_0_comp_nf, 18536, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_4870_0_comp_nf, 18544, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_4878_0_comp_nf, 18552, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_4879_0_comp_nf, 18553, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_487a_0_comp_nf, 18554, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_487b_0_comp_nf, 18555, COMP_OPCODE_LONG_OPCODE }, /* PEA */ +{ op_4880_0_comp_nf, 18560, 0 }, /* EXT */ +{ op_4890_0_comp_nf, 18576, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48a0_0_comp_nf, 18592, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48a8_0_comp_nf, 18600, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48b0_0_comp_nf, 18608, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48b8_0_comp_nf, 18616, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48b9_0_comp_nf, 18617, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48c0_0_comp_nf, 18624, 0 }, /* EXT */ +{ op_48d0_0_comp_nf, 18640, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48e0_0_comp_nf, 18656, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48e8_0_comp_nf, 18664, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48f0_0_comp_nf, 18672, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48f8_0_comp_nf, 18680, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_48f9_0_comp_nf, 18681, COMP_OPCODE_LONG_OPCODE }, /* MVMLE */ +{ op_49c0_0_comp_nf, 18880, 0 }, /* EXT */ +{ op_4a00_0_comp_nf, 18944, 0 }, /* TST */ +{ op_4a10_0_comp_nf, 18960, 0 }, /* TST */ +{ op_4a18_0_comp_nf, 18968, 0 }, /* TST */ +{ op_4a20_0_comp_nf, 18976, 0 }, /* TST */ +{ op_4a28_0_comp_nf, 18984, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a30_0_comp_nf, 18992, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a38_0_comp_nf, 19000, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a39_0_comp_nf, 19001, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a3a_0_comp_nf, 19002, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a3b_0_comp_nf, 19003, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a3c_0_comp_nf, 19004, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a40_0_comp_nf, 19008, 0 }, /* TST */ +{ op_4a48_0_comp_nf, 19016, 0 }, /* TST */ +{ op_4a50_0_comp_nf, 19024, 0 }, /* TST */ +{ op_4a58_0_comp_nf, 19032, 0 }, /* TST */ +{ op_4a60_0_comp_nf, 19040, 0 }, /* TST */ +{ op_4a68_0_comp_nf, 19048, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a70_0_comp_nf, 19056, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a78_0_comp_nf, 19064, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a79_0_comp_nf, 19065, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a7a_0_comp_nf, 19066, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a7b_0_comp_nf, 19067, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a7c_0_comp_nf, 19068, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4a80_0_comp_nf, 19072, 0 }, /* TST */ +{ op_4a88_0_comp_nf, 19080, 0 }, /* TST */ +{ op_4a90_0_comp_nf, 19088, 0 }, /* TST */ +{ op_4a98_0_comp_nf, 19096, 0 }, /* TST */ +{ op_4aa0_0_comp_nf, 19104, 0 }, /* TST */ +{ op_4aa8_0_comp_nf, 19112, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4ab0_0_comp_nf, 19120, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4ab8_0_comp_nf, 19128, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4ab9_0_comp_nf, 19129, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4aba_0_comp_nf, 19130, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4abb_0_comp_nf, 19131, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ op_4abc_0_comp_nf, 19132, COMP_OPCODE_LONG_OPCODE }, /* TST */ +{ NULL, 19136, 0 }, /* TAS */ +{ NULL, 19144, COMP_OPCODE_ISJUMP }, /* HALT */ +{ NULL, 19148, COMP_OPCODE_ISJUMP }, /* PULSE */ +{ NULL, 19152, 0 }, /* TAS */ +{ NULL, 19160, 0 }, /* TAS */ +{ NULL, 19168, 0 }, /* TAS */ +{ NULL, 19176, 0 }, /* TAS */ +{ NULL, 19184, 0 }, /* TAS */ +{ NULL, 19192, 0 }, /* TAS */ +{ NULL, 19193, 0 }, /* TAS */ +{ op_4c00_0_comp_nf, 19456, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c10_0_comp_nf, 19472, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c18_0_comp_nf, 19480, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c20_0_comp_nf, 19488, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c28_0_comp_nf, 19496, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c30_0_comp_nf, 19504, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c38_0_comp_nf, 19512, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c39_0_comp_nf, 19513, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c3a_0_comp_nf, 19514, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c3b_0_comp_nf, 19515, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ op_4c3c_0_comp_nf, 19516, COMP_OPCODE_LONG_OPCODE }, /* MULL */ +{ NULL, 19520, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19536, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19544, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19552, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19560, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19568, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19576, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19577, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19578, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19579, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ NULL, 19580, COMP_OPCODE_ISJUMP }, /* DIVL */ +{ op_4c90_0_comp_nf, 19600, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4c98_0_comp_nf, 19608, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4ca8_0_comp_nf, 19624, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cb0_0_comp_nf, 19632, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cb8_0_comp_nf, 19640, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cb9_0_comp_nf, 19641, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cba_0_comp_nf, 19642, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cbb_0_comp_nf, 19643, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cd0_0_comp_nf, 19664, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cd8_0_comp_nf, 19672, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4ce8_0_comp_nf, 19688, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cf0_0_comp_nf, 19696, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cf8_0_comp_nf, 19704, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cf9_0_comp_nf, 19705, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cfa_0_comp_nf, 19706, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ op_4cfb_0_comp_nf, 19707, COMP_OPCODE_LONG_OPCODE }, /* MVMEL */ +{ NULL, 20032, COMP_OPCODE_ISJUMP }, /* TRAP */ +{ op_4e50_0_comp_nf, 20048, COMP_OPCODE_LONG_OPCODE }, /* LINK */ +{ op_4e58_0_comp_nf, 20056, 0 }, /* UNLK */ +{ NULL, 20064, COMP_OPCODE_ISJUMP }, /* MVR2USP */ +{ NULL, 20072, COMP_OPCODE_ISJUMP }, /* MVUSP2R */ +{ NULL, 20080, COMP_OPCODE_ISJUMP }, /* RESET */ +{ op_4e71_0_comp_nf, 20081, 0 }, /* NOP */ +{ NULL, 20082, COMP_OPCODE_ISJUMP }, /* STOP */ +{ NULL, 20083, COMP_OPCODE_ISJUMP }, /* RTE */ +{ op_4e74_0_comp_nf, 20084, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* RTD */ +{ op_4e75_0_comp_nf, 20085, COMP_OPCODE_ISJUMP }, /* RTS */ +{ NULL, 20086, COMP_OPCODE_ISJUMP }, /* TRAPV */ +{ NULL, 20087, COMP_OPCODE_ISJUMP }, /* RTR */ +{ NULL, 20090, COMP_OPCODE_ISJUMP }, /* MOVEC2 */ +{ NULL, 20091, COMP_OPCODE_ISJUMP }, /* MOVE2C */ +{ op_4e90_0_comp_nf, 20112, COMP_OPCODE_ISJUMP }, /* JSR */ +{ op_4ea8_0_comp_nf, 20136, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4eb0_0_comp_nf, 20144, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4eb8_0_comp_nf, 20152, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4eb9_0_comp_nf, 20153, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4eba_0_comp_nf, 20154, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4ebb_0_comp_nf, 20155, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JSR */ +{ op_4ed0_0_comp_nf, 20176, COMP_OPCODE_ISJUMP }, /* JMP */ +{ op_4ee8_0_comp_nf, 20200, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4ef0_0_comp_nf, 20208, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4ef8_0_comp_nf, 20216, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4ef9_0_comp_nf, 20217, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4efa_0_comp_nf, 20218, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_4efb_0_comp_nf, 20219, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* JMP */ +{ op_5000_0_comp_nf, 20480, 0 }, /* ADD */ +{ op_5010_0_comp_nf, 20496, 0 }, /* ADD */ +{ op_5018_0_comp_nf, 20504, 0 }, /* ADD */ +{ op_5020_0_comp_nf, 20512, 0 }, /* ADD */ +{ op_5028_0_comp_nf, 20520, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5030_0_comp_nf, 20528, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5038_0_comp_nf, 20536, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5039_0_comp_nf, 20537, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5040_0_comp_nf, 20544, 0 }, /* ADD */ +{ op_5048_0_comp_nf, 20552, 0 }, /* ADDA */ +{ op_5050_0_comp_nf, 20560, 0 }, /* ADD */ +{ op_5058_0_comp_nf, 20568, 0 }, /* ADD */ +{ op_5060_0_comp_nf, 20576, 0 }, /* ADD */ +{ op_5068_0_comp_nf, 20584, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5070_0_comp_nf, 20592, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5078_0_comp_nf, 20600, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5079_0_comp_nf, 20601, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_5080_0_comp_nf, 20608, 0 }, /* ADD */ +{ op_5088_0_comp_nf, 20616, 0 }, /* ADDA */ +{ op_5090_0_comp_nf, 20624, 0 }, /* ADD */ +{ op_5098_0_comp_nf, 20632, 0 }, /* ADD */ +{ op_50a0_0_comp_nf, 20640, 0 }, /* ADD */ +{ op_50a8_0_comp_nf, 20648, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_50b0_0_comp_nf, 20656, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_50b8_0_comp_nf, 20664, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_50b9_0_comp_nf, 20665, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_50c0_0_comp_nf, 20672, 0 }, /* Scc */ +{ op_50c8_0_comp_nf, 20680, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_50d0_0_comp_nf, 20688, 0 }, /* Scc */ +{ op_50d8_0_comp_nf, 20696, 0 }, /* Scc */ +{ op_50e0_0_comp_nf, 20704, 0 }, /* Scc */ +{ op_50e8_0_comp_nf, 20712, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_50f0_0_comp_nf, 20720, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_50f8_0_comp_nf, 20728, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_50f9_0_comp_nf, 20729, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 20730, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 20731, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 20732, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5100_0_comp_nf, 20736, 0 }, /* SUB */ +{ op_5110_0_comp_nf, 20752, 0 }, /* SUB */ +{ op_5118_0_comp_nf, 20760, 0 }, /* SUB */ +{ op_5120_0_comp_nf, 20768, 0 }, /* SUB */ +{ op_5128_0_comp_nf, 20776, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5130_0_comp_nf, 20784, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5138_0_comp_nf, 20792, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5139_0_comp_nf, 20793, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5140_0_comp_nf, 20800, 0 }, /* SUB */ +{ op_5148_0_comp_nf, 20808, 0 }, /* SUBA */ +{ op_5150_0_comp_nf, 20816, 0 }, /* SUB */ +{ op_5158_0_comp_nf, 20824, 0 }, /* SUB */ +{ op_5160_0_comp_nf, 20832, 0 }, /* SUB */ +{ op_5168_0_comp_nf, 20840, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5170_0_comp_nf, 20848, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5178_0_comp_nf, 20856, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5179_0_comp_nf, 20857, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_5180_0_comp_nf, 20864, 0 }, /* SUB */ +{ op_5188_0_comp_nf, 20872, 0 }, /* SUBA */ +{ op_5190_0_comp_nf, 20880, 0 }, /* SUB */ +{ op_5198_0_comp_nf, 20888, 0 }, /* SUB */ +{ op_51a0_0_comp_nf, 20896, 0 }, /* SUB */ +{ op_51a8_0_comp_nf, 20904, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_51b0_0_comp_nf, 20912, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_51b8_0_comp_nf, 20920, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_51b9_0_comp_nf, 20921, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_51c0_0_comp_nf, 20928, 0 }, /* Scc */ +{ op_51c8_0_comp_nf, 20936, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_51d0_0_comp_nf, 20944, 0 }, /* Scc */ +{ op_51d8_0_comp_nf, 20952, 0 }, /* Scc */ +{ op_51e0_0_comp_nf, 20960, 0 }, /* Scc */ +{ op_51e8_0_comp_nf, 20968, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_51f0_0_comp_nf, 20976, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_51f8_0_comp_nf, 20984, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_51f9_0_comp_nf, 20985, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 20986, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 20987, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 20988, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_52c0_0_comp_nf, 21184, 0 }, /* Scc */ +{ op_52c8_0_comp_nf, 21192, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_52d0_0_comp_nf, 21200, 0 }, /* Scc */ +{ op_52d8_0_comp_nf, 21208, 0 }, /* Scc */ +{ op_52e0_0_comp_nf, 21216, 0 }, /* Scc */ +{ op_52e8_0_comp_nf, 21224, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_52f0_0_comp_nf, 21232, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_52f8_0_comp_nf, 21240, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_52f9_0_comp_nf, 21241, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 21242, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21243, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21244, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_53c0_0_comp_nf, 21440, 0 }, /* Scc */ +{ op_53c8_0_comp_nf, 21448, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_53d0_0_comp_nf, 21456, 0 }, /* Scc */ +{ op_53d8_0_comp_nf, 21464, 0 }, /* Scc */ +{ op_53e0_0_comp_nf, 21472, 0 }, /* Scc */ +{ op_53e8_0_comp_nf, 21480, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_53f0_0_comp_nf, 21488, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_53f8_0_comp_nf, 21496, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_53f9_0_comp_nf, 21497, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 21498, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21499, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21500, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_54c0_0_comp_nf, 21696, 0 }, /* Scc */ +{ op_54c8_0_comp_nf, 21704, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_54d0_0_comp_nf, 21712, 0 }, /* Scc */ +{ op_54d8_0_comp_nf, 21720, 0 }, /* Scc */ +{ op_54e0_0_comp_nf, 21728, 0 }, /* Scc */ +{ op_54e8_0_comp_nf, 21736, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_54f0_0_comp_nf, 21744, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_54f8_0_comp_nf, 21752, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_54f9_0_comp_nf, 21753, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 21754, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21755, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 21756, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_55c0_0_comp_nf, 21952, 0 }, /* Scc */ +{ op_55c8_0_comp_nf, 21960, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_55d0_0_comp_nf, 21968, 0 }, /* Scc */ +{ op_55d8_0_comp_nf, 21976, 0 }, /* Scc */ +{ op_55e0_0_comp_nf, 21984, 0 }, /* Scc */ +{ op_55e8_0_comp_nf, 21992, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_55f0_0_comp_nf, 22000, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_55f8_0_comp_nf, 22008, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_55f9_0_comp_nf, 22009, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22010, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22011, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22012, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_56c0_0_comp_nf, 22208, 0 }, /* Scc */ +{ op_56c8_0_comp_nf, 22216, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_56d0_0_comp_nf, 22224, 0 }, /* Scc */ +{ op_56d8_0_comp_nf, 22232, 0 }, /* Scc */ +{ op_56e0_0_comp_nf, 22240, 0 }, /* Scc */ +{ op_56e8_0_comp_nf, 22248, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_56f0_0_comp_nf, 22256, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_56f8_0_comp_nf, 22264, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_56f9_0_comp_nf, 22265, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22266, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22267, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22268, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_57c0_0_comp_nf, 22464, 0 }, /* Scc */ +{ op_57c8_0_comp_nf, 22472, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_57d0_0_comp_nf, 22480, 0 }, /* Scc */ +{ op_57d8_0_comp_nf, 22488, 0 }, /* Scc */ +{ op_57e0_0_comp_nf, 22496, 0 }, /* Scc */ +{ op_57e8_0_comp_nf, 22504, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_57f0_0_comp_nf, 22512, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_57f8_0_comp_nf, 22520, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_57f9_0_comp_nf, 22521, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22522, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22523, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22524, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22720, 0 }, /* Scc */ +{ NULL, 22728, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ NULL, 22736, 0 }, /* Scc */ +{ NULL, 22744, 0 }, /* Scc */ +{ NULL, 22752, 0 }, /* Scc */ +{ NULL, 22760, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22768, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22776, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22777, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 22778, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22779, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22780, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 22976, 0 }, /* Scc */ +{ NULL, 22984, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ NULL, 22992, 0 }, /* Scc */ +{ NULL, 23000, 0 }, /* Scc */ +{ NULL, 23008, 0 }, /* Scc */ +{ NULL, 23016, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23024, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23032, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23033, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23034, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23035, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23036, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5ac0_0_comp_nf, 23232, 0 }, /* Scc */ +{ op_5ac8_0_comp_nf, 23240, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5ad0_0_comp_nf, 23248, 0 }, /* Scc */ +{ op_5ad8_0_comp_nf, 23256, 0 }, /* Scc */ +{ op_5ae0_0_comp_nf, 23264, 0 }, /* Scc */ +{ op_5ae8_0_comp_nf, 23272, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5af0_0_comp_nf, 23280, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5af8_0_comp_nf, 23288, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5af9_0_comp_nf, 23289, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23290, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23291, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23292, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5bc0_0_comp_nf, 23488, 0 }, /* Scc */ +{ op_5bc8_0_comp_nf, 23496, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5bd0_0_comp_nf, 23504, 0 }, /* Scc */ +{ op_5bd8_0_comp_nf, 23512, 0 }, /* Scc */ +{ op_5be0_0_comp_nf, 23520, 0 }, /* Scc */ +{ op_5be8_0_comp_nf, 23528, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5bf0_0_comp_nf, 23536, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5bf8_0_comp_nf, 23544, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5bf9_0_comp_nf, 23545, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23546, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23547, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23548, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5cc0_0_comp_nf, 23744, 0 }, /* Scc */ +{ op_5cc8_0_comp_nf, 23752, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5cd0_0_comp_nf, 23760, 0 }, /* Scc */ +{ op_5cd8_0_comp_nf, 23768, 0 }, /* Scc */ +{ op_5ce0_0_comp_nf, 23776, 0 }, /* Scc */ +{ op_5ce8_0_comp_nf, 23784, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5cf0_0_comp_nf, 23792, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5cf8_0_comp_nf, 23800, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5cf9_0_comp_nf, 23801, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 23802, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23803, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 23804, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5dc0_0_comp_nf, 24000, 0 }, /* Scc */ +{ op_5dc8_0_comp_nf, 24008, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5dd0_0_comp_nf, 24016, 0 }, /* Scc */ +{ op_5dd8_0_comp_nf, 24024, 0 }, /* Scc */ +{ op_5de0_0_comp_nf, 24032, 0 }, /* Scc */ +{ op_5de8_0_comp_nf, 24040, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5df0_0_comp_nf, 24048, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5df8_0_comp_nf, 24056, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5df9_0_comp_nf, 24057, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 24058, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24059, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24060, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5ec0_0_comp_nf, 24256, 0 }, /* Scc */ +{ op_5ec8_0_comp_nf, 24264, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5ed0_0_comp_nf, 24272, 0 }, /* Scc */ +{ op_5ed8_0_comp_nf, 24280, 0 }, /* Scc */ +{ op_5ee0_0_comp_nf, 24288, 0 }, /* Scc */ +{ op_5ee8_0_comp_nf, 24296, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ef0_0_comp_nf, 24304, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ef8_0_comp_nf, 24312, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ef9_0_comp_nf, 24313, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 24314, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24315, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24316, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_5fc0_0_comp_nf, 24512, 0 }, /* Scc */ +{ op_5fc8_0_comp_nf, 24520, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV }, /* DBcc */ +{ op_5fd0_0_comp_nf, 24528, 0 }, /* Scc */ +{ op_5fd8_0_comp_nf, 24536, 0 }, /* Scc */ +{ op_5fe0_0_comp_nf, 24544, 0 }, /* Scc */ +{ op_5fe8_0_comp_nf, 24552, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ff0_0_comp_nf, 24560, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ff8_0_comp_nf, 24568, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ op_5ff9_0_comp_nf, 24569, COMP_OPCODE_LONG_OPCODE }, /* Scc */ +{ NULL, 24570, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24571, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ NULL, 24572, COMP_OPCODE_ISJUMP }, /* TRAPcc */ +{ op_6000_0_comp_nf, 24576, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISCJUMP }, /* Bcc */ +{ op_6001_0_comp_nf, 24577, COMP_OPCODE_ISCJUMP }, /* Bcc */ +{ op_60ff_0_comp_nf, 24831, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISCJUMP }, /* Bcc */ +{ op_6100_0_comp_nf, 24832, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISCJUMP }, /* BSR */ +{ op_6101_0_comp_nf, 24833, COMP_OPCODE_ISCJUMP }, /* BSR */ +{ op_61ff_0_comp_nf, 25087, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_ISCJUMP }, /* BSR */ +{ op_6200_0_comp_nf, 25088, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6201_0_comp_nf, 25089, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_62ff_0_comp_nf, 25343, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6300_0_comp_nf, 25344, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6301_0_comp_nf, 25345, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_63ff_0_comp_nf, 25599, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6400_0_comp_nf, 25600, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6401_0_comp_nf, 25601, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_64ff_0_comp_nf, 25855, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6500_0_comp_nf, 25856, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6501_0_comp_nf, 25857, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_65ff_0_comp_nf, 26111, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6600_0_comp_nf, 26112, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6601_0_comp_nf, 26113, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_66ff_0_comp_nf, 26367, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6700_0_comp_nf, 26368, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6701_0_comp_nf, 26369, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_67ff_0_comp_nf, 26623, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ NULL, 26624, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ NULL, 26625, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ NULL, 26879, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ NULL, 26880, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ NULL, 26881, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ NULL, 27135, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6a00_0_comp_nf, 27136, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6a01_0_comp_nf, 27137, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6aff_0_comp_nf, 27391, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6b00_0_comp_nf, 27392, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6b01_0_comp_nf, 27393, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6bff_0_comp_nf, 27647, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6c00_0_comp_nf, 27648, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6c01_0_comp_nf, 27649, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6cff_0_comp_nf, 27903, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6d00_0_comp_nf, 27904, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6d01_0_comp_nf, 27905, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6dff_0_comp_nf, 28159, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6e00_0_comp_nf, 28160, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6e01_0_comp_nf, 28161, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6eff_0_comp_nf, 28415, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6f00_0_comp_nf, 28416, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_6f01_0_comp_nf, 28417, COMP_OPCODE_ISJUMP }, /* Bcc */ +{ op_6fff_0_comp_nf, 28671, COMP_OPCODE_ISJUMP|COMP_OPCODE_LONG_OPCODE }, /* Bcc */ +{ op_7000_0_comp_nf, 28672, 0 }, /* MOVE */ +{ op_8000_0_comp_nf, 32768, 0 }, /* OR */ +{ op_8010_0_comp_nf, 32784, 0 }, /* OR */ +{ op_8018_0_comp_nf, 32792, 0 }, /* OR */ +{ op_8020_0_comp_nf, 32800, 0 }, /* OR */ +{ op_8028_0_comp_nf, 32808, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8030_0_comp_nf, 32816, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8038_0_comp_nf, 32824, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8039_0_comp_nf, 32825, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_803a_0_comp_nf, 32826, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_803b_0_comp_nf, 32827, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_803c_0_comp_nf, 32828, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8040_0_comp_nf, 32832, 0 }, /* OR */ +{ op_8050_0_comp_nf, 32848, 0 }, /* OR */ +{ op_8058_0_comp_nf, 32856, 0 }, /* OR */ +{ op_8060_0_comp_nf, 32864, 0 }, /* OR */ +{ op_8068_0_comp_nf, 32872, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8070_0_comp_nf, 32880, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8078_0_comp_nf, 32888, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8079_0_comp_nf, 32889, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_807a_0_comp_nf, 32890, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_807b_0_comp_nf, 32891, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_807c_0_comp_nf, 32892, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8080_0_comp_nf, 32896, 0 }, /* OR */ +{ op_8090_0_comp_nf, 32912, 0 }, /* OR */ +{ op_8098_0_comp_nf, 32920, 0 }, /* OR */ +{ op_80a0_0_comp_nf, 32928, 0 }, /* OR */ +{ op_80a8_0_comp_nf, 32936, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80b0_0_comp_nf, 32944, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80b8_0_comp_nf, 32952, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80b9_0_comp_nf, 32953, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80ba_0_comp_nf, 32954, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80bb_0_comp_nf, 32955, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_80bc_0_comp_nf, 32956, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 32960, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 32976, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 32984, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 32992, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33000, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33008, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33016, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33017, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33018, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33019, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33020, COMP_OPCODE_ISJUMP }, /* DIVU */ +{ NULL, 33024, 0 }, /* SBCD */ +{ NULL, 33032, 0 }, /* SBCD */ +{ op_8110_0_comp_nf, 33040, 0 }, /* OR */ +{ op_8118_0_comp_nf, 33048, 0 }, /* OR */ +{ op_8120_0_comp_nf, 33056, 0 }, /* OR */ +{ op_8128_0_comp_nf, 33064, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8130_0_comp_nf, 33072, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8138_0_comp_nf, 33080, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8139_0_comp_nf, 33081, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 33088, 0 }, /* PACK */ +{ NULL, 33096, 0 }, /* PACK */ +{ op_8150_0_comp_nf, 33104, 0 }, /* OR */ +{ op_8158_0_comp_nf, 33112, 0 }, /* OR */ +{ op_8160_0_comp_nf, 33120, 0 }, /* OR */ +{ op_8168_0_comp_nf, 33128, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8170_0_comp_nf, 33136, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8178_0_comp_nf, 33144, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_8179_0_comp_nf, 33145, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 33152, 0 }, /* UNPK */ +{ NULL, 33160, 0 }, /* UNPK */ +{ op_8190_0_comp_nf, 33168, 0 }, /* OR */ +{ op_8198_0_comp_nf, 33176, 0 }, /* OR */ +{ op_81a0_0_comp_nf, 33184, 0 }, /* OR */ +{ op_81a8_0_comp_nf, 33192, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_81b0_0_comp_nf, 33200, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_81b8_0_comp_nf, 33208, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ op_81b9_0_comp_nf, 33209, COMP_OPCODE_LONG_OPCODE }, /* OR */ +{ NULL, 33216, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33232, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33240, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33248, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33256, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33264, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33272, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33273, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33274, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33275, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ NULL, 33276, COMP_OPCODE_ISJUMP }, /* DIVS */ +{ op_9000_0_comp_nf, 36864, 0 }, /* SUB */ +{ op_9010_0_comp_nf, 36880, 0 }, /* SUB */ +{ op_9018_0_comp_nf, 36888, 0 }, /* SUB */ +{ op_9020_0_comp_nf, 36896, 0 }, /* SUB */ +{ op_9028_0_comp_nf, 36904, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9030_0_comp_nf, 36912, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9038_0_comp_nf, 36920, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9039_0_comp_nf, 36921, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_903a_0_comp_nf, 36922, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_903b_0_comp_nf, 36923, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_903c_0_comp_nf, 36924, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9040_0_comp_nf, 36928, 0 }, /* SUB */ +{ op_9048_0_comp_nf, 36936, 0 }, /* SUB */ +{ op_9050_0_comp_nf, 36944, 0 }, /* SUB */ +{ op_9058_0_comp_nf, 36952, 0 }, /* SUB */ +{ op_9060_0_comp_nf, 36960, 0 }, /* SUB */ +{ op_9068_0_comp_nf, 36968, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9070_0_comp_nf, 36976, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9078_0_comp_nf, 36984, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9079_0_comp_nf, 36985, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_907a_0_comp_nf, 36986, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_907b_0_comp_nf, 36987, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_907c_0_comp_nf, 36988, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9080_0_comp_nf, 36992, 0 }, /* SUB */ +{ op_9088_0_comp_nf, 37000, 0 }, /* SUB */ +{ op_9090_0_comp_nf, 37008, 0 }, /* SUB */ +{ op_9098_0_comp_nf, 37016, 0 }, /* SUB */ +{ op_90a0_0_comp_nf, 37024, 0 }, /* SUB */ +{ op_90a8_0_comp_nf, 37032, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90b0_0_comp_nf, 37040, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90b8_0_comp_nf, 37048, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90b9_0_comp_nf, 37049, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90ba_0_comp_nf, 37050, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90bb_0_comp_nf, 37051, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90bc_0_comp_nf, 37052, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_90c0_0_comp_nf, 37056, 0 }, /* SUBA */ +{ op_90c8_0_comp_nf, 37064, 0 }, /* SUBA */ +{ op_90d0_0_comp_nf, 37072, 0 }, /* SUBA */ +{ op_90d8_0_comp_nf, 37080, 0 }, /* SUBA */ +{ op_90e0_0_comp_nf, 37088, 0 }, /* SUBA */ +{ op_90e8_0_comp_nf, 37096, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90f0_0_comp_nf, 37104, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90f8_0_comp_nf, 37112, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90f9_0_comp_nf, 37113, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90fa_0_comp_nf, 37114, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90fb_0_comp_nf, 37115, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_90fc_0_comp_nf, 37116, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_9100_0_comp_nf, 37120, COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9108_0_comp_nf, 37128, COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9110_0_comp_nf, 37136, 0 }, /* SUB */ +{ op_9118_0_comp_nf, 37144, 0 }, /* SUB */ +{ op_9120_0_comp_nf, 37152, 0 }, /* SUB */ +{ op_9128_0_comp_nf, 37160, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9130_0_comp_nf, 37168, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9138_0_comp_nf, 37176, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9139_0_comp_nf, 37177, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9140_0_comp_nf, 37184, COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9148_0_comp_nf, 37192, COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9150_0_comp_nf, 37200, 0 }, /* SUB */ +{ op_9158_0_comp_nf, 37208, 0 }, /* SUB */ +{ op_9160_0_comp_nf, 37216, 0 }, /* SUB */ +{ op_9168_0_comp_nf, 37224, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9170_0_comp_nf, 37232, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9178_0_comp_nf, 37240, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9179_0_comp_nf, 37241, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_9180_0_comp_nf, 37248, COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9188_0_comp_nf, 37256, COMP_OPCODE_ISADDX }, /* SUBX */ +{ op_9190_0_comp_nf, 37264, 0 }, /* SUB */ +{ op_9198_0_comp_nf, 37272, 0 }, /* SUB */ +{ op_91a0_0_comp_nf, 37280, 0 }, /* SUB */ +{ op_91a8_0_comp_nf, 37288, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_91b0_0_comp_nf, 37296, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_91b8_0_comp_nf, 37304, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_91b9_0_comp_nf, 37305, COMP_OPCODE_LONG_OPCODE }, /* SUB */ +{ op_91c0_0_comp_nf, 37312, 0 }, /* SUBA */ +{ op_91c8_0_comp_nf, 37320, 0 }, /* SUBA */ +{ op_91d0_0_comp_nf, 37328, 0 }, /* SUBA */ +{ op_91d8_0_comp_nf, 37336, 0 }, /* SUBA */ +{ op_91e0_0_comp_nf, 37344, 0 }, /* SUBA */ +{ op_91e8_0_comp_nf, 37352, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91f0_0_comp_nf, 37360, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91f8_0_comp_nf, 37368, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91f9_0_comp_nf, 37369, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91fa_0_comp_nf, 37370, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91fb_0_comp_nf, 37371, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_91fc_0_comp_nf, 37372, COMP_OPCODE_LONG_OPCODE }, /* SUBA */ +{ op_b000_0_comp_nf, 45056, 0 }, /* CMP */ +{ op_b010_0_comp_nf, 45072, 0 }, /* CMP */ +{ op_b018_0_comp_nf, 45080, 0 }, /* CMP */ +{ op_b020_0_comp_nf, 45088, 0 }, /* CMP */ +{ op_b028_0_comp_nf, 45096, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b030_0_comp_nf, 45104, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b038_0_comp_nf, 45112, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b039_0_comp_nf, 45113, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b03a_0_comp_nf, 45114, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b03b_0_comp_nf, 45115, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b03c_0_comp_nf, 45116, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b040_0_comp_nf, 45120, 0 }, /* CMP */ +{ op_b048_0_comp_nf, 45128, 0 }, /* CMP */ +{ op_b050_0_comp_nf, 45136, 0 }, /* CMP */ +{ op_b058_0_comp_nf, 45144, 0 }, /* CMP */ +{ op_b060_0_comp_nf, 45152, 0 }, /* CMP */ +{ op_b068_0_comp_nf, 45160, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b070_0_comp_nf, 45168, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b078_0_comp_nf, 45176, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b079_0_comp_nf, 45177, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b07a_0_comp_nf, 45178, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b07b_0_comp_nf, 45179, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b07c_0_comp_nf, 45180, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b080_0_comp_nf, 45184, 0 }, /* CMP */ +{ op_b088_0_comp_nf, 45192, 0 }, /* CMP */ +{ op_b090_0_comp_nf, 45200, 0 }, /* CMP */ +{ op_b098_0_comp_nf, 45208, 0 }, /* CMP */ +{ op_b0a0_0_comp_nf, 45216, 0 }, /* CMP */ +{ op_b0a8_0_comp_nf, 45224, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0b0_0_comp_nf, 45232, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0b8_0_comp_nf, 45240, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0b9_0_comp_nf, 45241, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0ba_0_comp_nf, 45242, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0bb_0_comp_nf, 45243, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0bc_0_comp_nf, 45244, COMP_OPCODE_LONG_OPCODE }, /* CMP */ +{ op_b0c0_0_comp_nf, 45248, 0 }, /* CMPA */ +{ op_b0c8_0_comp_nf, 45256, 0 }, /* CMPA */ +{ op_b0d0_0_comp_nf, 45264, 0 }, /* CMPA */ +{ op_b0d8_0_comp_nf, 45272, 0 }, /* CMPA */ +{ op_b0e0_0_comp_nf, 45280, 0 }, /* CMPA */ +{ op_b0e8_0_comp_nf, 45288, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0f0_0_comp_nf, 45296, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0f8_0_comp_nf, 45304, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0f9_0_comp_nf, 45305, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0fa_0_comp_nf, 45306, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0fb_0_comp_nf, 45307, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b0fc_0_comp_nf, 45308, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b100_0_comp_nf, 45312, 0 }, /* EOR */ +{ op_b108_0_comp_nf, 45320, 0 }, /* CMPM */ +{ op_b110_0_comp_nf, 45328, 0 }, /* EOR */ +{ op_b118_0_comp_nf, 45336, 0 }, /* EOR */ +{ op_b120_0_comp_nf, 45344, 0 }, /* EOR */ +{ op_b128_0_comp_nf, 45352, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b130_0_comp_nf, 45360, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b138_0_comp_nf, 45368, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b139_0_comp_nf, 45369, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b140_0_comp_nf, 45376, 0 }, /* EOR */ +{ op_b148_0_comp_nf, 45384, 0 }, /* CMPM */ +{ op_b150_0_comp_nf, 45392, 0 }, /* EOR */ +{ op_b158_0_comp_nf, 45400, 0 }, /* EOR */ +{ op_b160_0_comp_nf, 45408, 0 }, /* EOR */ +{ op_b168_0_comp_nf, 45416, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b170_0_comp_nf, 45424, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b178_0_comp_nf, 45432, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b179_0_comp_nf, 45433, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b180_0_comp_nf, 45440, 0 }, /* EOR */ +{ op_b188_0_comp_nf, 45448, 0 }, /* CMPM */ +{ op_b190_0_comp_nf, 45456, 0 }, /* EOR */ +{ op_b198_0_comp_nf, 45464, 0 }, /* EOR */ +{ op_b1a0_0_comp_nf, 45472, 0 }, /* EOR */ +{ op_b1a8_0_comp_nf, 45480, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b1b0_0_comp_nf, 45488, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b1b8_0_comp_nf, 45496, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b1b9_0_comp_nf, 45497, COMP_OPCODE_LONG_OPCODE }, /* EOR */ +{ op_b1c0_0_comp_nf, 45504, 0 }, /* CMPA */ +{ op_b1c8_0_comp_nf, 45512, 0 }, /* CMPA */ +{ op_b1d0_0_comp_nf, 45520, 0 }, /* CMPA */ +{ op_b1d8_0_comp_nf, 45528, 0 }, /* CMPA */ +{ op_b1e0_0_comp_nf, 45536, 0 }, /* CMPA */ +{ op_b1e8_0_comp_nf, 45544, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1f0_0_comp_nf, 45552, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1f8_0_comp_nf, 45560, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1f9_0_comp_nf, 45561, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1fa_0_comp_nf, 45562, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1fb_0_comp_nf, 45563, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_b1fc_0_comp_nf, 45564, COMP_OPCODE_LONG_OPCODE }, /* CMPA */ +{ op_c000_0_comp_nf, 49152, 0 }, /* AND */ +{ op_c010_0_comp_nf, 49168, 0 }, /* AND */ +{ op_c018_0_comp_nf, 49176, 0 }, /* AND */ +{ op_c020_0_comp_nf, 49184, 0 }, /* AND */ +{ op_c028_0_comp_nf, 49192, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c030_0_comp_nf, 49200, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c038_0_comp_nf, 49208, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c039_0_comp_nf, 49209, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c03a_0_comp_nf, 49210, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c03b_0_comp_nf, 49211, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c03c_0_comp_nf, 49212, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c040_0_comp_nf, 49216, 0 }, /* AND */ +{ op_c050_0_comp_nf, 49232, 0 }, /* AND */ +{ op_c058_0_comp_nf, 49240, 0 }, /* AND */ +{ op_c060_0_comp_nf, 49248, 0 }, /* AND */ +{ op_c068_0_comp_nf, 49256, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c070_0_comp_nf, 49264, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c078_0_comp_nf, 49272, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c079_0_comp_nf, 49273, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c07a_0_comp_nf, 49274, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c07b_0_comp_nf, 49275, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c07c_0_comp_nf, 49276, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c080_0_comp_nf, 49280, 0 }, /* AND */ +{ op_c090_0_comp_nf, 49296, 0 }, /* AND */ +{ op_c098_0_comp_nf, 49304, 0 }, /* AND */ +{ op_c0a0_0_comp_nf, 49312, 0 }, /* AND */ +{ op_c0a8_0_comp_nf, 49320, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0b0_0_comp_nf, 49328, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0b8_0_comp_nf, 49336, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0b9_0_comp_nf, 49337, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0ba_0_comp_nf, 49338, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0bb_0_comp_nf, 49339, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0bc_0_comp_nf, 49340, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c0c0_0_comp_nf, 49344, 0 }, /* MULU */ +{ op_c0d0_0_comp_nf, 49360, 0 }, /* MULU */ +{ op_c0d8_0_comp_nf, 49368, 0 }, /* MULU */ +{ op_c0e0_0_comp_nf, 49376, 0 }, /* MULU */ +{ op_c0e8_0_comp_nf, 49384, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0f0_0_comp_nf, 49392, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0f8_0_comp_nf, 49400, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0f9_0_comp_nf, 49401, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0fa_0_comp_nf, 49402, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0fb_0_comp_nf, 49403, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ op_c0fc_0_comp_nf, 49404, COMP_OPCODE_LONG_OPCODE }, /* MULU */ +{ NULL, 49408, 0 }, /* ABCD */ +{ NULL, 49416, 0 }, /* ABCD */ +{ op_c110_0_comp_nf, 49424, 0 }, /* AND */ +{ op_c118_0_comp_nf, 49432, 0 }, /* AND */ +{ op_c120_0_comp_nf, 49440, 0 }, /* AND */ +{ op_c128_0_comp_nf, 49448, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c130_0_comp_nf, 49456, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c138_0_comp_nf, 49464, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c139_0_comp_nf, 49465, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c140_0_comp_nf, 49472, 0 }, /* EXG */ +{ op_c148_0_comp_nf, 49480, 0 }, /* EXG */ +{ op_c150_0_comp_nf, 49488, 0 }, /* AND */ +{ op_c158_0_comp_nf, 49496, 0 }, /* AND */ +{ op_c160_0_comp_nf, 49504, 0 }, /* AND */ +{ op_c168_0_comp_nf, 49512, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c170_0_comp_nf, 49520, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c178_0_comp_nf, 49528, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c179_0_comp_nf, 49529, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c188_0_comp_nf, 49544, 0 }, /* EXG */ +{ op_c190_0_comp_nf, 49552, 0 }, /* AND */ +{ op_c198_0_comp_nf, 49560, 0 }, /* AND */ +{ op_c1a0_0_comp_nf, 49568, 0 }, /* AND */ +{ op_c1a8_0_comp_nf, 49576, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c1b0_0_comp_nf, 49584, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c1b8_0_comp_nf, 49592, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c1b9_0_comp_nf, 49593, COMP_OPCODE_LONG_OPCODE }, /* AND */ +{ op_c1c0_0_comp_nf, 49600, 0 }, /* MULS */ +{ op_c1d0_0_comp_nf, 49616, 0 }, /* MULS */ +{ op_c1d8_0_comp_nf, 49624, 0 }, /* MULS */ +{ op_c1e0_0_comp_nf, 49632, 0 }, /* MULS */ +{ op_c1e8_0_comp_nf, 49640, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1f0_0_comp_nf, 49648, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1f8_0_comp_nf, 49656, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1f9_0_comp_nf, 49657, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1fa_0_comp_nf, 49658, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1fb_0_comp_nf, 49659, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_c1fc_0_comp_nf, 49660, COMP_OPCODE_LONG_OPCODE }, /* MULS */ +{ op_d000_0_comp_nf, 53248, 0 }, /* ADD */ +{ op_d010_0_comp_nf, 53264, 0 }, /* ADD */ +{ op_d018_0_comp_nf, 53272, 0 }, /* ADD */ +{ op_d020_0_comp_nf, 53280, 0 }, /* ADD */ +{ op_d028_0_comp_nf, 53288, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d030_0_comp_nf, 53296, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d038_0_comp_nf, 53304, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d039_0_comp_nf, 53305, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d03a_0_comp_nf, 53306, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d03b_0_comp_nf, 53307, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d03c_0_comp_nf, 53308, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d040_0_comp_nf, 53312, 0 }, /* ADD */ +{ op_d048_0_comp_nf, 53320, 0 }, /* ADD */ +{ op_d050_0_comp_nf, 53328, 0 }, /* ADD */ +{ op_d058_0_comp_nf, 53336, 0 }, /* ADD */ +{ op_d060_0_comp_nf, 53344, 0 }, /* ADD */ +{ op_d068_0_comp_nf, 53352, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d070_0_comp_nf, 53360, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d078_0_comp_nf, 53368, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d079_0_comp_nf, 53369, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d07a_0_comp_nf, 53370, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d07b_0_comp_nf, 53371, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d07c_0_comp_nf, 53372, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d080_0_comp_nf, 53376, 0 }, /* ADD */ +{ op_d088_0_comp_nf, 53384, 0 }, /* ADD */ +{ op_d090_0_comp_nf, 53392, 0 }, /* ADD */ +{ op_d098_0_comp_nf, 53400, 0 }, /* ADD */ +{ op_d0a0_0_comp_nf, 53408, 0 }, /* ADD */ +{ op_d0a8_0_comp_nf, 53416, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0b0_0_comp_nf, 53424, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0b8_0_comp_nf, 53432, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0b9_0_comp_nf, 53433, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0ba_0_comp_nf, 53434, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0bb_0_comp_nf, 53435, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0bc_0_comp_nf, 53436, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d0c0_0_comp_nf, 53440, 0 }, /* ADDA */ +{ op_d0c8_0_comp_nf, 53448, 0 }, /* ADDA */ +{ op_d0d0_0_comp_nf, 53456, 0 }, /* ADDA */ +{ op_d0d8_0_comp_nf, 53464, 0 }, /* ADDA */ +{ op_d0e0_0_comp_nf, 53472, 0 }, /* ADDA */ +{ op_d0e8_0_comp_nf, 53480, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0f0_0_comp_nf, 53488, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0f8_0_comp_nf, 53496, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0f9_0_comp_nf, 53497, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0fa_0_comp_nf, 53498, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0fb_0_comp_nf, 53499, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d0fc_0_comp_nf, 53500, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d100_0_comp_nf, 53504, COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d108_0_comp_nf, 53512, COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d110_0_comp_nf, 53520, 0 }, /* ADD */ +{ op_d118_0_comp_nf, 53528, 0 }, /* ADD */ +{ op_d120_0_comp_nf, 53536, 0 }, /* ADD */ +{ op_d128_0_comp_nf, 53544, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d130_0_comp_nf, 53552, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d138_0_comp_nf, 53560, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d139_0_comp_nf, 53561, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d140_0_comp_nf, 53568, COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d148_0_comp_nf, 53576, COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d150_0_comp_nf, 53584, 0 }, /* ADD */ +{ op_d158_0_comp_nf, 53592, 0 }, /* ADD */ +{ op_d160_0_comp_nf, 53600, 0 }, /* ADD */ +{ op_d168_0_comp_nf, 53608, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d170_0_comp_nf, 53616, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d178_0_comp_nf, 53624, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d179_0_comp_nf, 53625, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d180_0_comp_nf, 53632, COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d188_0_comp_nf, 53640, COMP_OPCODE_ISADDX }, /* ADDX */ +{ op_d190_0_comp_nf, 53648, 0 }, /* ADD */ +{ op_d198_0_comp_nf, 53656, 0 }, /* ADD */ +{ op_d1a0_0_comp_nf, 53664, 0 }, /* ADD */ +{ op_d1a8_0_comp_nf, 53672, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d1b0_0_comp_nf, 53680, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d1b8_0_comp_nf, 53688, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d1b9_0_comp_nf, 53689, COMP_OPCODE_LONG_OPCODE }, /* ADD */ +{ op_d1c0_0_comp_nf, 53696, 0 }, /* ADDA */ +{ op_d1c8_0_comp_nf, 53704, 0 }, /* ADDA */ +{ op_d1d0_0_comp_nf, 53712, 0 }, /* ADDA */ +{ op_d1d8_0_comp_nf, 53720, 0 }, /* ADDA */ +{ op_d1e0_0_comp_nf, 53728, 0 }, /* ADDA */ +{ op_d1e8_0_comp_nf, 53736, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1f0_0_comp_nf, 53744, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1f8_0_comp_nf, 53752, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1f9_0_comp_nf, 53753, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1fa_0_comp_nf, 53754, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1fb_0_comp_nf, 53755, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_d1fc_0_comp_nf, 53756, COMP_OPCODE_LONG_OPCODE }, /* ADDA */ +{ op_e000_0_comp_nf, 57344, 0 }, /* ASR */ +{ op_e008_0_comp_nf, 57352, 0 }, /* LSR */ +{ NULL, 57360, 0 }, /* ROXR */ +{ op_e018_0_comp_nf, 57368, 0 }, /* ROR */ +{ op_e020_0_comp_nf, 57376, COMP_OPCODE_CMOV }, /* ASR */ +{ op_e028_0_comp_nf, 57384, COMP_OPCODE_CMOV }, /* LSR */ +{ NULL, 57392, 0 }, /* ROXR */ +{ op_e038_0_comp_nf, 57400, 0 }, /* ROR */ +{ op_e040_0_comp_nf, 57408, 0 }, /* ASR */ +{ op_e048_0_comp_nf, 57416, 0 }, /* LSR */ +{ NULL, 57424, 0 }, /* ROXR */ +{ op_e058_0_comp_nf, 57432, 0 }, /* ROR */ +{ op_e060_0_comp_nf, 57440, COMP_OPCODE_CMOV }, /* ASR */ +{ op_e068_0_comp_nf, 57448, COMP_OPCODE_CMOV }, /* LSR */ +{ NULL, 57456, 0 }, /* ROXR */ +{ op_e078_0_comp_nf, 57464, 0 }, /* ROR */ +{ op_e080_0_comp_nf, 57472, 0 }, /* ASR */ +{ op_e088_0_comp_nf, 57480, 0 }, /* LSR */ +{ NULL, 57488, 0 }, /* ROXR */ +{ op_e098_0_comp_nf, 57496, 0 }, /* ROR */ +{ op_e0a0_0_comp_nf, 57504, COMP_OPCODE_CMOV }, /* ASR */ +{ op_e0a8_0_comp_nf, 57512, COMP_OPCODE_CMOV }, /* LSR */ +{ NULL, 57520, 0 }, /* ROXR */ +{ op_e0b8_0_comp_nf, 57528, 0 }, /* ROR */ +{ NULL, 57552, 0 }, /* ASRW */ +{ NULL, 57560, 0 }, /* ASRW */ +{ NULL, 57568, 0 }, /* ASRW */ +{ NULL, 57576, 0 }, /* ASRW */ +{ NULL, 57584, 0 }, /* ASRW */ +{ NULL, 57592, 0 }, /* ASRW */ +{ NULL, 57593, 0 }, /* ASRW */ +{ op_e100_0_comp_nf, 57600, 0 }, /* ASL */ +{ op_e108_0_comp_nf, 57608, 0 }, /* LSL */ +{ NULL, 57616, 0 }, /* ROXL */ +{ op_e118_0_comp_nf, 57624, 0 }, /* ROL */ +{ op_e120_0_comp_nf, 57632, COMP_OPCODE_CMOV }, /* ASL */ +{ op_e128_0_comp_nf, 57640, COMP_OPCODE_CMOV }, /* LSL */ +{ NULL, 57648, 0 }, /* ROXL */ +{ op_e138_0_comp_nf, 57656, 0 }, /* ROL */ +{ op_e140_0_comp_nf, 57664, 0 }, /* ASL */ +{ op_e148_0_comp_nf, 57672, 0 }, /* LSL */ +{ NULL, 57680, 0 }, /* ROXL */ +{ op_e158_0_comp_nf, 57688, 0 }, /* ROL */ +{ op_e160_0_comp_nf, 57696, COMP_OPCODE_CMOV }, /* ASL */ +{ op_e168_0_comp_nf, 57704, COMP_OPCODE_CMOV }, /* LSL */ +{ NULL, 57712, 0 }, /* ROXL */ +{ op_e178_0_comp_nf, 57720, 0 }, /* ROL */ +{ op_e180_0_comp_nf, 57728, 0 }, /* ASL */ +{ op_e188_0_comp_nf, 57736, 0 }, /* LSL */ +{ NULL, 57744, 0 }, /* ROXL */ +{ op_e198_0_comp_nf, 57752, 0 }, /* ROL */ +{ op_e1a0_0_comp_nf, 57760, COMP_OPCODE_CMOV }, /* ASL */ +{ op_e1a8_0_comp_nf, 57768, COMP_OPCODE_CMOV }, /* LSL */ +{ NULL, 57776, 0 }, /* ROXL */ +{ op_e1b8_0_comp_nf, 57784, 0 }, /* ROL */ +{ NULL, 57808, 0 }, /* ASLW */ +{ NULL, 57816, 0 }, /* ASLW */ +{ NULL, 57824, 0 }, /* ASLW */ +{ NULL, 57832, 0 }, /* ASLW */ +{ NULL, 57840, 0 }, /* ASLW */ +{ NULL, 57848, 0 }, /* ASLW */ +{ NULL, 57849, 0 }, /* ASLW */ +{ NULL, 58064, 0 }, /* LSRW */ +{ NULL, 58072, 0 }, /* LSRW */ +{ NULL, 58080, 0 }, /* LSRW */ +{ NULL, 58088, 0 }, /* LSRW */ +{ NULL, 58096, 0 }, /* LSRW */ +{ NULL, 58104, 0 }, /* LSRW */ +{ NULL, 58105, 0 }, /* LSRW */ +{ NULL, 58320, 0 }, /* LSLW */ +{ NULL, 58328, 0 }, /* LSLW */ +{ NULL, 58336, 0 }, /* LSLW */ +{ NULL, 58344, 0 }, /* LSLW */ +{ NULL, 58352, 0 }, /* LSLW */ +{ NULL, 58360, 0 }, /* LSLW */ +{ NULL, 58361, 0 }, /* LSLW */ +{ NULL, 58576, 0 }, /* ROXRW */ +{ NULL, 58584, 0 }, /* ROXRW */ +{ NULL, 58592, 0 }, /* ROXRW */ +{ NULL, 58600, 0 }, /* ROXRW */ +{ NULL, 58608, 0 }, /* ROXRW */ +{ NULL, 58616, 0 }, /* ROXRW */ +{ NULL, 58617, 0 }, /* ROXRW */ +{ NULL, 58832, 0 }, /* ROXLW */ +{ NULL, 58840, 0 }, /* ROXLW */ +{ NULL, 58848, 0 }, /* ROXLW */ +{ NULL, 58856, 0 }, /* ROXLW */ +{ NULL, 58864, 0 }, /* ROXLW */ +{ NULL, 58872, 0 }, /* ROXLW */ +{ NULL, 58873, 0 }, /* ROXLW */ +{ NULL, 59088, 0 }, /* RORW */ +{ NULL, 59096, 0 }, /* RORW */ +{ NULL, 59104, 0 }, /* RORW */ +{ NULL, 59112, 0 }, /* RORW */ +{ NULL, 59120, 0 }, /* RORW */ +{ NULL, 59128, 0 }, /* RORW */ +{ NULL, 59129, 0 }, /* RORW */ +{ NULL, 59344, 0 }, /* ROLW */ +{ NULL, 59352, 0 }, /* ROLW */ +{ NULL, 59360, 0 }, /* ROLW */ +{ NULL, 59368, 0 }, /* ROLW */ +{ NULL, 59376, 0 }, /* ROLW */ +{ NULL, 59384, 0 }, /* ROLW */ +{ NULL, 59385, 0 }, /* ROLW */ +{ NULL, 59584, 0 }, /* BFTST */ +{ NULL, 59600, 0 }, /* BFTST */ +{ NULL, 59624, 0 }, /* BFTST */ +{ NULL, 59632, 0 }, /* BFTST */ +{ NULL, 59640, 0 }, /* BFTST */ +{ NULL, 59641, 0 }, /* BFTST */ +{ NULL, 59642, 0 }, /* BFTST */ +{ NULL, 59643, 0 }, /* BFTST */ +{ NULL, 59840, 0 }, /* BFEXTU */ +{ NULL, 59856, 0 }, /* BFEXTU */ +{ NULL, 59880, 0 }, /* BFEXTU */ +{ NULL, 59888, 0 }, /* BFEXTU */ +{ NULL, 59896, 0 }, /* BFEXTU */ +{ NULL, 59897, 0 }, /* BFEXTU */ +{ NULL, 59898, 0 }, /* BFEXTU */ +{ NULL, 59899, 0 }, /* BFEXTU */ +{ NULL, 60096, 0 }, /* BFCHG */ +{ NULL, 60112, 0 }, /* BFCHG */ +{ NULL, 60136, 0 }, /* BFCHG */ +{ NULL, 60144, 0 }, /* BFCHG */ +{ NULL, 60152, 0 }, /* BFCHG */ +{ NULL, 60153, 0 }, /* BFCHG */ +{ NULL, 60352, 0 }, /* BFEXTS */ +{ NULL, 60368, 0 }, /* BFEXTS */ +{ NULL, 60392, 0 }, /* BFEXTS */ +{ NULL, 60400, 0 }, /* BFEXTS */ +{ NULL, 60408, 0 }, /* BFEXTS */ +{ NULL, 60409, 0 }, /* BFEXTS */ +{ NULL, 60410, 0 }, /* BFEXTS */ +{ NULL, 60411, 0 }, /* BFEXTS */ +{ NULL, 60608, 0 }, /* BFCLR */ +{ NULL, 60624, 0 }, /* BFCLR */ +{ NULL, 60648, 0 }, /* BFCLR */ +{ NULL, 60656, 0 }, /* BFCLR */ +{ NULL, 60664, 0 }, /* BFCLR */ +{ NULL, 60665, 0 }, /* BFCLR */ +{ NULL, 60864, 0 }, /* BFFFO */ +{ NULL, 60880, 0 }, /* BFFFO */ +{ NULL, 60904, 0 }, /* BFFFO */ +{ NULL, 60912, 0 }, /* BFFFO */ +{ NULL, 60920, 0 }, /* BFFFO */ +{ NULL, 60921, 0 }, /* BFFFO */ +{ NULL, 60922, 0 }, /* BFFFO */ +{ NULL, 60923, 0 }, /* BFFFO */ +{ NULL, 61120, 0 }, /* BFSET */ +{ NULL, 61136, 0 }, /* BFSET */ +{ NULL, 61160, 0 }, /* BFSET */ +{ NULL, 61168, 0 }, /* BFSET */ +{ NULL, 61176, 0 }, /* BFSET */ +{ NULL, 61177, 0 }, /* BFSET */ +{ NULL, 61376, 0 }, /* BFINS */ +{ NULL, 61392, 0 }, /* BFINS */ +{ NULL, 61416, 0 }, /* BFINS */ +{ NULL, 61424, 0 }, /* BFINS */ +{ NULL, 61432, 0 }, /* BFINS */ +{ NULL, 61433, 0 }, /* BFINS */ +{ NULL, 61440, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61448, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61456, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61464, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61472, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61480, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61488, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61496, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ NULL, 61497, COMP_OPCODE_ISJUMP }, /* MMUOP030 */ +{ op_f200_0_comp_nf, 61952, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f208_0_comp_nf, 61960, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f210_0_comp_nf, 61968, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f218_0_comp_nf, 61976, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f220_0_comp_nf, 61984, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f228_0_comp_nf, 61992, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f230_0_comp_nf, 62000, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f238_0_comp_nf, 62008, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f239_0_comp_nf, 62009, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f23a_0_comp_nf, 62010, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f23b_0_comp_nf, 62011, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f23c_0_comp_nf, 62012, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_USES_FPU }, /* FPP */ +{ op_f240_0_comp_nf, 62016, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ NULL, 62024, COMP_OPCODE_ISJUMP|COMP_OPCODE_USES_FPU }, /* FDBcc */ +{ op_f250_0_comp_nf, 62032, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f258_0_comp_nf, 62040, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f260_0_comp_nf, 62048, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f268_0_comp_nf, 62056, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f270_0_comp_nf, 62064, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f278_0_comp_nf, 62072, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ op_f279_0_comp_nf, 62073, COMP_OPCODE_LONG_OPCODE|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FScc */ +{ NULL, 62074, COMP_OPCODE_ISJUMP|COMP_OPCODE_USES_FPU }, /* FTRAPcc */ +{ NULL, 62075, COMP_OPCODE_ISJUMP|COMP_OPCODE_USES_FPU }, /* FTRAPcc */ +{ NULL, 62076, COMP_OPCODE_ISJUMP|COMP_OPCODE_USES_FPU }, /* FTRAPcc */ +{ op_f280_0_comp_nf, 62080, COMP_OPCODE_ISJUMP|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FBcc */ +{ op_f2c0_0_comp_nf, 62144, COMP_OPCODE_ISJUMP|COMP_OPCODE_CMOV|COMP_OPCODE_USES_FPU }, /* FBcc */ +{ NULL, 62224, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62240, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62248, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62256, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62264, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62265, COMP_OPCODE_USES_FPU }, /* FSAVE */ +{ NULL, 62288, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62296, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62312, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62320, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62328, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62329, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62330, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62331, COMP_OPCODE_USES_FPU }, /* FRESTORE */ +{ NULL, 62472, COMP_OPCODE_ISJUMP }, /* CINVL */ +{ NULL, 62480, COMP_OPCODE_ISJUMP }, /* CINVP */ +{ NULL, 62488, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62489, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62490, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62491, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62492, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62493, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62494, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62495, COMP_OPCODE_ISJUMP }, /* CINVA */ +{ NULL, 62504, COMP_OPCODE_ISJUMP }, /* CPUSHL */ +{ NULL, 62512, COMP_OPCODE_ISJUMP }, /* CPUSHP */ +{ NULL, 62520, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62521, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62522, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62523, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62524, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62525, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62526, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62527, COMP_OPCODE_ISJUMP }, /* CPUSHA */ +{ NULL, 62720, COMP_OPCODE_ISJUMP }, /* PFLUSHN */ +{ NULL, 62728, COMP_OPCODE_ISJUMP }, /* PFLUSH */ +{ NULL, 62736, COMP_OPCODE_ISJUMP }, /* PFLUSHAN */ +{ NULL, 62744, COMP_OPCODE_ISJUMP }, /* PFLUSHA */ +{ NULL, 62792, COMP_OPCODE_ISJUMP }, /* PTESTW */ +{ NULL, 62824, COMP_OPCODE_ISJUMP }, /* PTESTR */ +{ NULL, 62856, COMP_OPCODE_ISJUMP }, /* PLPAW */ +{ NULL, 62920, COMP_OPCODE_ISJUMP }, /* PLPAR */ +{ op_f600_0_comp_nf, 62976, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ op_f608_0_comp_nf, 62984, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ op_f610_0_comp_nf, 62992, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ op_f618_0_comp_nf, 63000, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ op_f620_0_comp_nf, 63008, COMP_OPCODE_LONG_OPCODE }, /* MOVE16 */ +{ NULL, 63488, COMP_OPCODE_ISJUMP }, /* LPSTOP */ +{ 0, 65536, 0 }}; +#endif diff --git a/jit/comptbl.h b/jit/comptbl.h new file mode 100644 index 00000000..c1adbfc8 --- /dev/null +++ b/jit/comptbl.h @@ -0,0 +1,2803 @@ +extern const struct comptbl op_smalltbl_0_comp_nf[]; +extern const struct comptbl op_smalltbl_0_comp_ff[]; +extern compop_func op_0_0_comp_ff; +extern compop_func op_10_0_comp_ff; +extern compop_func op_18_0_comp_ff; +extern compop_func op_20_0_comp_ff; +extern compop_func op_28_0_comp_ff; +extern compop_func op_30_0_comp_ff; +extern compop_func op_38_0_comp_ff; +extern compop_func op_39_0_comp_ff; +extern compop_func op_40_0_comp_ff; +extern compop_func op_50_0_comp_ff; +extern compop_func op_58_0_comp_ff; +extern compop_func op_60_0_comp_ff; +extern compop_func op_68_0_comp_ff; +extern compop_func op_70_0_comp_ff; +extern compop_func op_78_0_comp_ff; +extern compop_func op_79_0_comp_ff; +extern compop_func op_80_0_comp_ff; +extern compop_func op_90_0_comp_ff; +extern compop_func op_98_0_comp_ff; +extern compop_func op_a0_0_comp_ff; +extern compop_func op_a8_0_comp_ff; +extern compop_func op_b0_0_comp_ff; +extern compop_func op_b8_0_comp_ff; +extern compop_func op_b9_0_comp_ff; +extern compop_func op_100_0_comp_ff; +extern compop_func op_110_0_comp_ff; +extern compop_func op_118_0_comp_ff; +extern compop_func op_120_0_comp_ff; +extern compop_func op_128_0_comp_ff; +extern compop_func op_130_0_comp_ff; +extern compop_func op_138_0_comp_ff; +extern compop_func op_139_0_comp_ff; +extern compop_func op_13a_0_comp_ff; +extern compop_func op_13b_0_comp_ff; +extern compop_func op_13c_0_comp_ff; +extern compop_func op_140_0_comp_ff; +extern compop_func op_150_0_comp_ff; +extern compop_func op_158_0_comp_ff; +extern compop_func op_160_0_comp_ff; +extern compop_func op_168_0_comp_ff; +extern compop_func op_170_0_comp_ff; +extern compop_func op_178_0_comp_ff; +extern compop_func op_179_0_comp_ff; +extern compop_func op_180_0_comp_ff; +extern compop_func op_190_0_comp_ff; +extern compop_func op_198_0_comp_ff; +extern compop_func op_1a0_0_comp_ff; +extern compop_func op_1a8_0_comp_ff; +extern compop_func op_1b0_0_comp_ff; +extern compop_func op_1b8_0_comp_ff; +extern compop_func op_1b9_0_comp_ff; +extern compop_func op_1c0_0_comp_ff; +extern compop_func op_1d0_0_comp_ff; +extern compop_func op_1d8_0_comp_ff; +extern compop_func op_1e0_0_comp_ff; +extern compop_func op_1e8_0_comp_ff; +extern compop_func op_1f0_0_comp_ff; +extern compop_func op_1f8_0_comp_ff; +extern compop_func op_1f9_0_comp_ff; +extern compop_func op_200_0_comp_ff; +extern compop_func op_210_0_comp_ff; +extern compop_func op_218_0_comp_ff; +extern compop_func op_220_0_comp_ff; +extern compop_func op_228_0_comp_ff; +extern compop_func op_230_0_comp_ff; +extern compop_func op_238_0_comp_ff; +extern compop_func op_239_0_comp_ff; +extern compop_func op_240_0_comp_ff; +extern compop_func op_250_0_comp_ff; +extern compop_func op_258_0_comp_ff; +extern compop_func op_260_0_comp_ff; +extern compop_func op_268_0_comp_ff; +extern compop_func op_270_0_comp_ff; +extern compop_func op_278_0_comp_ff; +extern compop_func op_279_0_comp_ff; +extern compop_func op_280_0_comp_ff; +extern compop_func op_290_0_comp_ff; +extern compop_func op_298_0_comp_ff; +extern compop_func op_2a0_0_comp_ff; +extern compop_func op_2a8_0_comp_ff; +extern compop_func op_2b0_0_comp_ff; +extern compop_func op_2b8_0_comp_ff; +extern compop_func op_2b9_0_comp_ff; +extern compop_func op_400_0_comp_ff; +extern compop_func op_410_0_comp_ff; +extern compop_func op_418_0_comp_ff; +extern compop_func op_420_0_comp_ff; +extern compop_func op_428_0_comp_ff; +extern compop_func op_430_0_comp_ff; +extern compop_func op_438_0_comp_ff; +extern compop_func op_439_0_comp_ff; +extern compop_func op_440_0_comp_ff; +extern compop_func op_450_0_comp_ff; +extern compop_func op_458_0_comp_ff; +extern compop_func op_460_0_comp_ff; +extern compop_func op_468_0_comp_ff; +extern compop_func op_470_0_comp_ff; +extern compop_func op_478_0_comp_ff; +extern compop_func op_479_0_comp_ff; +extern compop_func op_480_0_comp_ff; +extern compop_func op_490_0_comp_ff; +extern compop_func op_498_0_comp_ff; +extern compop_func op_4a0_0_comp_ff; +extern compop_func op_4a8_0_comp_ff; +extern compop_func op_4b0_0_comp_ff; +extern compop_func op_4b8_0_comp_ff; +extern compop_func op_4b9_0_comp_ff; +extern compop_func op_600_0_comp_ff; +extern compop_func op_610_0_comp_ff; +extern compop_func op_618_0_comp_ff; +extern compop_func op_620_0_comp_ff; +extern compop_func op_628_0_comp_ff; +extern compop_func op_630_0_comp_ff; +extern compop_func op_638_0_comp_ff; +extern compop_func op_639_0_comp_ff; +extern compop_func op_640_0_comp_ff; +extern compop_func op_650_0_comp_ff; +extern compop_func op_658_0_comp_ff; +extern compop_func op_660_0_comp_ff; +extern compop_func op_668_0_comp_ff; +extern compop_func op_670_0_comp_ff; +extern compop_func op_678_0_comp_ff; +extern compop_func op_679_0_comp_ff; +extern compop_func op_680_0_comp_ff; +extern compop_func op_690_0_comp_ff; +extern compop_func op_698_0_comp_ff; +extern compop_func op_6a0_0_comp_ff; +extern compop_func op_6a8_0_comp_ff; +extern compop_func op_6b0_0_comp_ff; +extern compop_func op_6b8_0_comp_ff; +extern compop_func op_6b9_0_comp_ff; +extern compop_func op_800_0_comp_ff; +extern compop_func op_810_0_comp_ff; +extern compop_func op_818_0_comp_ff; +extern compop_func op_820_0_comp_ff; +extern compop_func op_828_0_comp_ff; +extern compop_func op_830_0_comp_ff; +extern compop_func op_838_0_comp_ff; +extern compop_func op_839_0_comp_ff; +extern compop_func op_83a_0_comp_ff; +extern compop_func op_83b_0_comp_ff; +extern compop_func op_840_0_comp_ff; +extern compop_func op_850_0_comp_ff; +extern compop_func op_858_0_comp_ff; +extern compop_func op_860_0_comp_ff; +extern compop_func op_868_0_comp_ff; +extern compop_func op_870_0_comp_ff; +extern compop_func op_878_0_comp_ff; +extern compop_func op_879_0_comp_ff; +extern compop_func op_880_0_comp_ff; +extern compop_func op_890_0_comp_ff; +extern compop_func op_898_0_comp_ff; +extern compop_func op_8a0_0_comp_ff; +extern compop_func op_8a8_0_comp_ff; +extern compop_func op_8b0_0_comp_ff; +extern compop_func op_8b8_0_comp_ff; +extern compop_func op_8b9_0_comp_ff; +extern compop_func op_8c0_0_comp_ff; +extern compop_func op_8d0_0_comp_ff; +extern compop_func op_8d8_0_comp_ff; +extern compop_func op_8e0_0_comp_ff; +extern compop_func op_8e8_0_comp_ff; +extern compop_func op_8f0_0_comp_ff; +extern compop_func op_8f8_0_comp_ff; +extern compop_func op_8f9_0_comp_ff; +extern compop_func op_a00_0_comp_ff; +extern compop_func op_a10_0_comp_ff; +extern compop_func op_a18_0_comp_ff; +extern compop_func op_a20_0_comp_ff; +extern compop_func op_a28_0_comp_ff; +extern compop_func op_a30_0_comp_ff; +extern compop_func op_a38_0_comp_ff; +extern compop_func op_a39_0_comp_ff; +extern compop_func op_a40_0_comp_ff; +extern compop_func op_a50_0_comp_ff; +extern compop_func op_a58_0_comp_ff; +extern compop_func op_a60_0_comp_ff; +extern compop_func op_a68_0_comp_ff; +extern compop_func op_a70_0_comp_ff; +extern compop_func op_a78_0_comp_ff; +extern compop_func op_a79_0_comp_ff; +extern compop_func op_a80_0_comp_ff; +extern compop_func op_a90_0_comp_ff; +extern compop_func op_a98_0_comp_ff; +extern compop_func op_aa0_0_comp_ff; +extern compop_func op_aa8_0_comp_ff; +extern compop_func op_ab0_0_comp_ff; +extern compop_func op_ab8_0_comp_ff; +extern compop_func op_ab9_0_comp_ff; +extern compop_func op_c00_0_comp_ff; +extern compop_func op_c10_0_comp_ff; +extern compop_func op_c18_0_comp_ff; +extern compop_func op_c20_0_comp_ff; +extern compop_func op_c28_0_comp_ff; +extern compop_func op_c30_0_comp_ff; +extern compop_func op_c38_0_comp_ff; +extern compop_func op_c39_0_comp_ff; +extern compop_func op_c3a_0_comp_ff; +extern compop_func op_c3b_0_comp_ff; +extern compop_func op_c40_0_comp_ff; +extern compop_func op_c50_0_comp_ff; +extern compop_func op_c58_0_comp_ff; +extern compop_func op_c60_0_comp_ff; +extern compop_func op_c68_0_comp_ff; +extern compop_func op_c70_0_comp_ff; +extern compop_func op_c78_0_comp_ff; +extern compop_func op_c79_0_comp_ff; +extern compop_func op_c7a_0_comp_ff; +extern compop_func op_c7b_0_comp_ff; +extern compop_func op_c80_0_comp_ff; +extern compop_func op_c90_0_comp_ff; +extern compop_func op_c98_0_comp_ff; +extern compop_func op_ca0_0_comp_ff; +extern compop_func op_ca8_0_comp_ff; +extern compop_func op_cb0_0_comp_ff; +extern compop_func op_cb8_0_comp_ff; +extern compop_func op_cb9_0_comp_ff; +extern compop_func op_cba_0_comp_ff; +extern compop_func op_cbb_0_comp_ff; +extern compop_func op_1000_0_comp_ff; +extern compop_func op_1010_0_comp_ff; +extern compop_func op_1018_0_comp_ff; +extern compop_func op_1020_0_comp_ff; +extern compop_func op_1028_0_comp_ff; +extern compop_func op_1030_0_comp_ff; +extern compop_func op_1038_0_comp_ff; +extern compop_func op_1039_0_comp_ff; +extern compop_func op_103a_0_comp_ff; +extern compop_func op_103b_0_comp_ff; +extern compop_func op_103c_0_comp_ff; +extern compop_func op_1080_0_comp_ff; +extern compop_func op_1090_0_comp_ff; +extern compop_func op_1098_0_comp_ff; +extern compop_func op_10a0_0_comp_ff; +extern compop_func op_10a8_0_comp_ff; +extern compop_func op_10b0_0_comp_ff; +extern compop_func op_10b8_0_comp_ff; +extern compop_func op_10b9_0_comp_ff; +extern compop_func op_10ba_0_comp_ff; +extern compop_func op_10bb_0_comp_ff; +extern compop_func op_10bc_0_comp_ff; +extern compop_func op_10c0_0_comp_ff; +extern compop_func op_10d0_0_comp_ff; +extern compop_func op_10d8_0_comp_ff; +extern compop_func op_10e0_0_comp_ff; +extern compop_func op_10e8_0_comp_ff; +extern compop_func op_10f0_0_comp_ff; +extern compop_func op_10f8_0_comp_ff; +extern compop_func op_10f9_0_comp_ff; +extern compop_func op_10fa_0_comp_ff; +extern compop_func op_10fb_0_comp_ff; +extern compop_func op_10fc_0_comp_ff; +extern compop_func op_1100_0_comp_ff; +extern compop_func op_1110_0_comp_ff; +extern compop_func op_1118_0_comp_ff; +extern compop_func op_1120_0_comp_ff; +extern compop_func op_1128_0_comp_ff; +extern compop_func op_1130_0_comp_ff; +extern compop_func op_1138_0_comp_ff; +extern compop_func op_1139_0_comp_ff; +extern compop_func op_113a_0_comp_ff; +extern compop_func op_113b_0_comp_ff; +extern compop_func op_113c_0_comp_ff; +extern compop_func op_1140_0_comp_ff; +extern compop_func op_1150_0_comp_ff; +extern compop_func op_1158_0_comp_ff; +extern compop_func op_1160_0_comp_ff; +extern compop_func op_1168_0_comp_ff; +extern compop_func op_1170_0_comp_ff; +extern compop_func op_1178_0_comp_ff; +extern compop_func op_1179_0_comp_ff; +extern compop_func op_117a_0_comp_ff; +extern compop_func op_117b_0_comp_ff; +extern compop_func op_117c_0_comp_ff; +extern compop_func op_1180_0_comp_ff; +extern compop_func op_1190_0_comp_ff; +extern compop_func op_1198_0_comp_ff; +extern compop_func op_11a0_0_comp_ff; +extern compop_func op_11a8_0_comp_ff; +extern compop_func op_11b0_0_comp_ff; +extern compop_func op_11b8_0_comp_ff; +extern compop_func op_11b9_0_comp_ff; +extern compop_func op_11ba_0_comp_ff; +extern compop_func op_11bb_0_comp_ff; +extern compop_func op_11bc_0_comp_ff; +extern compop_func op_11c0_0_comp_ff; +extern compop_func op_11d0_0_comp_ff; +extern compop_func op_11d8_0_comp_ff; +extern compop_func op_11e0_0_comp_ff; +extern compop_func op_11e8_0_comp_ff; +extern compop_func op_11f0_0_comp_ff; +extern compop_func op_11f8_0_comp_ff; +extern compop_func op_11f9_0_comp_ff; +extern compop_func op_11fa_0_comp_ff; +extern compop_func op_11fb_0_comp_ff; +extern compop_func op_11fc_0_comp_ff; +extern compop_func op_13c0_0_comp_ff; +extern compop_func op_13d0_0_comp_ff; +extern compop_func op_13d8_0_comp_ff; +extern compop_func op_13e0_0_comp_ff; +extern compop_func op_13e8_0_comp_ff; +extern compop_func op_13f0_0_comp_ff; +extern compop_func op_13f8_0_comp_ff; +extern compop_func op_13f9_0_comp_ff; +extern compop_func op_13fa_0_comp_ff; +extern compop_func op_13fb_0_comp_ff; +extern compop_func op_13fc_0_comp_ff; +extern compop_func op_2000_0_comp_ff; +extern compop_func op_2008_0_comp_ff; +extern compop_func op_2010_0_comp_ff; +extern compop_func op_2018_0_comp_ff; +extern compop_func op_2020_0_comp_ff; +extern compop_func op_2028_0_comp_ff; +extern compop_func op_2030_0_comp_ff; +extern compop_func op_2038_0_comp_ff; +extern compop_func op_2039_0_comp_ff; +extern compop_func op_203a_0_comp_ff; +extern compop_func op_203b_0_comp_ff; +extern compop_func op_203c_0_comp_ff; +extern compop_func op_2040_0_comp_ff; +extern compop_func op_2048_0_comp_ff; +extern compop_func op_2050_0_comp_ff; +extern compop_func op_2058_0_comp_ff; +extern compop_func op_2060_0_comp_ff; +extern compop_func op_2068_0_comp_ff; +extern compop_func op_2070_0_comp_ff; +extern compop_func op_2078_0_comp_ff; +extern compop_func op_2079_0_comp_ff; +extern compop_func op_207a_0_comp_ff; +extern compop_func op_207b_0_comp_ff; +extern compop_func op_207c_0_comp_ff; +extern compop_func op_2080_0_comp_ff; +extern compop_func op_2088_0_comp_ff; +extern compop_func op_2090_0_comp_ff; +extern compop_func op_2098_0_comp_ff; +extern compop_func op_20a0_0_comp_ff; +extern compop_func op_20a8_0_comp_ff; +extern compop_func op_20b0_0_comp_ff; +extern compop_func op_20b8_0_comp_ff; +extern compop_func op_20b9_0_comp_ff; +extern compop_func op_20ba_0_comp_ff; +extern compop_func op_20bb_0_comp_ff; +extern compop_func op_20bc_0_comp_ff; +extern compop_func op_20c0_0_comp_ff; +extern compop_func op_20c8_0_comp_ff; +extern compop_func op_20d0_0_comp_ff; +extern compop_func op_20d8_0_comp_ff; +extern compop_func op_20e0_0_comp_ff; +extern compop_func op_20e8_0_comp_ff; +extern compop_func op_20f0_0_comp_ff; +extern compop_func op_20f8_0_comp_ff; +extern compop_func op_20f9_0_comp_ff; +extern compop_func op_20fa_0_comp_ff; +extern compop_func op_20fb_0_comp_ff; +extern compop_func op_20fc_0_comp_ff; +extern compop_func op_2100_0_comp_ff; +extern compop_func op_2108_0_comp_ff; +extern compop_func op_2110_0_comp_ff; +extern compop_func op_2118_0_comp_ff; +extern compop_func op_2120_0_comp_ff; +extern compop_func op_2128_0_comp_ff; +extern compop_func op_2130_0_comp_ff; +extern compop_func op_2138_0_comp_ff; +extern compop_func op_2139_0_comp_ff; +extern compop_func op_213a_0_comp_ff; +extern compop_func op_213b_0_comp_ff; +extern compop_func op_213c_0_comp_ff; +extern compop_func op_2140_0_comp_ff; +extern compop_func op_2148_0_comp_ff; +extern compop_func op_2150_0_comp_ff; +extern compop_func op_2158_0_comp_ff; +extern compop_func op_2160_0_comp_ff; +extern compop_func op_2168_0_comp_ff; +extern compop_func op_2170_0_comp_ff; +extern compop_func op_2178_0_comp_ff; +extern compop_func op_2179_0_comp_ff; +extern compop_func op_217a_0_comp_ff; +extern compop_func op_217b_0_comp_ff; +extern compop_func op_217c_0_comp_ff; +extern compop_func op_2180_0_comp_ff; +extern compop_func op_2188_0_comp_ff; +extern compop_func op_2190_0_comp_ff; +extern compop_func op_2198_0_comp_ff; +extern compop_func op_21a0_0_comp_ff; +extern compop_func op_21a8_0_comp_ff; +extern compop_func op_21b0_0_comp_ff; +extern compop_func op_21b8_0_comp_ff; +extern compop_func op_21b9_0_comp_ff; +extern compop_func op_21ba_0_comp_ff; +extern compop_func op_21bb_0_comp_ff; +extern compop_func op_21bc_0_comp_ff; +extern compop_func op_21c0_0_comp_ff; +extern compop_func op_21c8_0_comp_ff; +extern compop_func op_21d0_0_comp_ff; +extern compop_func op_21d8_0_comp_ff; +extern compop_func op_21e0_0_comp_ff; +extern compop_func op_21e8_0_comp_ff; +extern compop_func op_21f0_0_comp_ff; +extern compop_func op_21f8_0_comp_ff; +extern compop_func op_21f9_0_comp_ff; +extern compop_func op_21fa_0_comp_ff; +extern compop_func op_21fb_0_comp_ff; +extern compop_func op_21fc_0_comp_ff; +extern compop_func op_23c0_0_comp_ff; +extern compop_func op_23c8_0_comp_ff; +extern compop_func op_23d0_0_comp_ff; +extern compop_func op_23d8_0_comp_ff; +extern compop_func op_23e0_0_comp_ff; +extern compop_func op_23e8_0_comp_ff; +extern compop_func op_23f0_0_comp_ff; +extern compop_func op_23f8_0_comp_ff; +extern compop_func op_23f9_0_comp_ff; +extern compop_func op_23fa_0_comp_ff; +extern compop_func op_23fb_0_comp_ff; +extern compop_func op_23fc_0_comp_ff; +extern compop_func op_3000_0_comp_ff; +extern compop_func op_3008_0_comp_ff; +extern compop_func op_3010_0_comp_ff; +extern compop_func op_3018_0_comp_ff; +extern compop_func op_3020_0_comp_ff; +extern compop_func op_3028_0_comp_ff; +extern compop_func op_3030_0_comp_ff; +extern compop_func op_3038_0_comp_ff; +extern compop_func op_3039_0_comp_ff; +extern compop_func op_303a_0_comp_ff; +extern compop_func op_303b_0_comp_ff; +extern compop_func op_303c_0_comp_ff; +extern compop_func op_3040_0_comp_ff; +extern compop_func op_3048_0_comp_ff; +extern compop_func op_3050_0_comp_ff; +extern compop_func op_3058_0_comp_ff; +extern compop_func op_3060_0_comp_ff; +extern compop_func op_3068_0_comp_ff; +extern compop_func op_3070_0_comp_ff; +extern compop_func op_3078_0_comp_ff; +extern compop_func op_3079_0_comp_ff; +extern compop_func op_307a_0_comp_ff; +extern compop_func op_307b_0_comp_ff; +extern compop_func op_307c_0_comp_ff; +extern compop_func op_3080_0_comp_ff; +extern compop_func op_3088_0_comp_ff; +extern compop_func op_3090_0_comp_ff; +extern compop_func op_3098_0_comp_ff; +extern compop_func op_30a0_0_comp_ff; +extern compop_func op_30a8_0_comp_ff; +extern compop_func op_30b0_0_comp_ff; +extern compop_func op_30b8_0_comp_ff; +extern compop_func op_30b9_0_comp_ff; +extern compop_func op_30ba_0_comp_ff; +extern compop_func op_30bb_0_comp_ff; +extern compop_func op_30bc_0_comp_ff; +extern compop_func op_30c0_0_comp_ff; +extern compop_func op_30c8_0_comp_ff; +extern compop_func op_30d0_0_comp_ff; +extern compop_func op_30d8_0_comp_ff; +extern compop_func op_30e0_0_comp_ff; +extern compop_func op_30e8_0_comp_ff; +extern compop_func op_30f0_0_comp_ff; +extern compop_func op_30f8_0_comp_ff; +extern compop_func op_30f9_0_comp_ff; +extern compop_func op_30fa_0_comp_ff; +extern compop_func op_30fb_0_comp_ff; +extern compop_func op_30fc_0_comp_ff; +extern compop_func op_3100_0_comp_ff; +extern compop_func op_3108_0_comp_ff; +extern compop_func op_3110_0_comp_ff; +extern compop_func op_3118_0_comp_ff; +extern compop_func op_3120_0_comp_ff; +extern compop_func op_3128_0_comp_ff; +extern compop_func op_3130_0_comp_ff; +extern compop_func op_3138_0_comp_ff; +extern compop_func op_3139_0_comp_ff; +extern compop_func op_313a_0_comp_ff; +extern compop_func op_313b_0_comp_ff; +extern compop_func op_313c_0_comp_ff; +extern compop_func op_3140_0_comp_ff; +extern compop_func op_3148_0_comp_ff; +extern compop_func op_3150_0_comp_ff; +extern compop_func op_3158_0_comp_ff; +extern compop_func op_3160_0_comp_ff; +extern compop_func op_3168_0_comp_ff; +extern compop_func op_3170_0_comp_ff; +extern compop_func op_3178_0_comp_ff; +extern compop_func op_3179_0_comp_ff; +extern compop_func op_317a_0_comp_ff; +extern compop_func op_317b_0_comp_ff; +extern compop_func op_317c_0_comp_ff; +extern compop_func op_3180_0_comp_ff; +extern compop_func op_3188_0_comp_ff; +extern compop_func op_3190_0_comp_ff; +extern compop_func op_3198_0_comp_ff; +extern compop_func op_31a0_0_comp_ff; +extern compop_func op_31a8_0_comp_ff; +extern compop_func op_31b0_0_comp_ff; +extern compop_func op_31b8_0_comp_ff; +extern compop_func op_31b9_0_comp_ff; +extern compop_func op_31ba_0_comp_ff; +extern compop_func op_31bb_0_comp_ff; +extern compop_func op_31bc_0_comp_ff; +extern compop_func op_31c0_0_comp_ff; +extern compop_func op_31c8_0_comp_ff; +extern compop_func op_31d0_0_comp_ff; +extern compop_func op_31d8_0_comp_ff; +extern compop_func op_31e0_0_comp_ff; +extern compop_func op_31e8_0_comp_ff; +extern compop_func op_31f0_0_comp_ff; +extern compop_func op_31f8_0_comp_ff; +extern compop_func op_31f9_0_comp_ff; +extern compop_func op_31fa_0_comp_ff; +extern compop_func op_31fb_0_comp_ff; +extern compop_func op_31fc_0_comp_ff; +extern compop_func op_33c0_0_comp_ff; +extern compop_func op_33c8_0_comp_ff; +extern compop_func op_33d0_0_comp_ff; +extern compop_func op_33d8_0_comp_ff; +extern compop_func op_33e0_0_comp_ff; +extern compop_func op_33e8_0_comp_ff; +extern compop_func op_33f0_0_comp_ff; +extern compop_func op_33f8_0_comp_ff; +extern compop_func op_33f9_0_comp_ff; +extern compop_func op_33fa_0_comp_ff; +extern compop_func op_33fb_0_comp_ff; +extern compop_func op_33fc_0_comp_ff; +extern compop_func op_4000_0_comp_ff; +extern compop_func op_4010_0_comp_ff; +extern compop_func op_4018_0_comp_ff; +extern compop_func op_4020_0_comp_ff; +extern compop_func op_4028_0_comp_ff; +extern compop_func op_4030_0_comp_ff; +extern compop_func op_4038_0_comp_ff; +extern compop_func op_4039_0_comp_ff; +extern compop_func op_4040_0_comp_ff; +extern compop_func op_4050_0_comp_ff; +extern compop_func op_4058_0_comp_ff; +extern compop_func op_4060_0_comp_ff; +extern compop_func op_4068_0_comp_ff; +extern compop_func op_4070_0_comp_ff; +extern compop_func op_4078_0_comp_ff; +extern compop_func op_4079_0_comp_ff; +extern compop_func op_4080_0_comp_ff; +extern compop_func op_4090_0_comp_ff; +extern compop_func op_4098_0_comp_ff; +extern compop_func op_40a0_0_comp_ff; +extern compop_func op_40a8_0_comp_ff; +extern compop_func op_40b0_0_comp_ff; +extern compop_func op_40b8_0_comp_ff; +extern compop_func op_40b9_0_comp_ff; +extern compop_func op_41d0_0_comp_ff; +extern compop_func op_41e8_0_comp_ff; +extern compop_func op_41f0_0_comp_ff; +extern compop_func op_41f8_0_comp_ff; +extern compop_func op_41f9_0_comp_ff; +extern compop_func op_41fa_0_comp_ff; +extern compop_func op_41fb_0_comp_ff; +extern compop_func op_4200_0_comp_ff; +extern compop_func op_4210_0_comp_ff; +extern compop_func op_4218_0_comp_ff; +extern compop_func op_4220_0_comp_ff; +extern compop_func op_4228_0_comp_ff; +extern compop_func op_4230_0_comp_ff; +extern compop_func op_4238_0_comp_ff; +extern compop_func op_4239_0_comp_ff; +extern compop_func op_4240_0_comp_ff; +extern compop_func op_4250_0_comp_ff; +extern compop_func op_4258_0_comp_ff; +extern compop_func op_4260_0_comp_ff; +extern compop_func op_4268_0_comp_ff; +extern compop_func op_4270_0_comp_ff; +extern compop_func op_4278_0_comp_ff; +extern compop_func op_4279_0_comp_ff; +extern compop_func op_4280_0_comp_ff; +extern compop_func op_4290_0_comp_ff; +extern compop_func op_4298_0_comp_ff; +extern compop_func op_42a0_0_comp_ff; +extern compop_func op_42a8_0_comp_ff; +extern compop_func op_42b0_0_comp_ff; +extern compop_func op_42b8_0_comp_ff; +extern compop_func op_42b9_0_comp_ff; +extern compop_func op_4400_0_comp_ff; +extern compop_func op_4410_0_comp_ff; +extern compop_func op_4418_0_comp_ff; +extern compop_func op_4420_0_comp_ff; +extern compop_func op_4428_0_comp_ff; +extern compop_func op_4430_0_comp_ff; +extern compop_func op_4438_0_comp_ff; +extern compop_func op_4439_0_comp_ff; +extern compop_func op_4440_0_comp_ff; +extern compop_func op_4450_0_comp_ff; +extern compop_func op_4458_0_comp_ff; +extern compop_func op_4460_0_comp_ff; +extern compop_func op_4468_0_comp_ff; +extern compop_func op_4470_0_comp_ff; +extern compop_func op_4478_0_comp_ff; +extern compop_func op_4479_0_comp_ff; +extern compop_func op_4480_0_comp_ff; +extern compop_func op_4490_0_comp_ff; +extern compop_func op_4498_0_comp_ff; +extern compop_func op_44a0_0_comp_ff; +extern compop_func op_44a8_0_comp_ff; +extern compop_func op_44b0_0_comp_ff; +extern compop_func op_44b8_0_comp_ff; +extern compop_func op_44b9_0_comp_ff; +extern compop_func op_4600_0_comp_ff; +extern compop_func op_4610_0_comp_ff; +extern compop_func op_4618_0_comp_ff; +extern compop_func op_4620_0_comp_ff; +extern compop_func op_4628_0_comp_ff; +extern compop_func op_4630_0_comp_ff; +extern compop_func op_4638_0_comp_ff; +extern compop_func op_4639_0_comp_ff; +extern compop_func op_4640_0_comp_ff; +extern compop_func op_4650_0_comp_ff; +extern compop_func op_4658_0_comp_ff; +extern compop_func op_4660_0_comp_ff; +extern compop_func op_4668_0_comp_ff; +extern compop_func op_4670_0_comp_ff; +extern compop_func op_4678_0_comp_ff; +extern compop_func op_4679_0_comp_ff; +extern compop_func op_4680_0_comp_ff; +extern compop_func op_4690_0_comp_ff; +extern compop_func op_4698_0_comp_ff; +extern compop_func op_46a0_0_comp_ff; +extern compop_func op_46a8_0_comp_ff; +extern compop_func op_46b0_0_comp_ff; +extern compop_func op_46b8_0_comp_ff; +extern compop_func op_46b9_0_comp_ff; +extern compop_func op_4808_0_comp_ff; +extern compop_func op_4840_0_comp_ff; +extern compop_func op_4850_0_comp_ff; +extern compop_func op_4868_0_comp_ff; +extern compop_func op_4870_0_comp_ff; +extern compop_func op_4878_0_comp_ff; +extern compop_func op_4879_0_comp_ff; +extern compop_func op_487a_0_comp_ff; +extern compop_func op_487b_0_comp_ff; +extern compop_func op_4880_0_comp_ff; +extern compop_func op_4890_0_comp_ff; +extern compop_func op_48a0_0_comp_ff; +extern compop_func op_48a8_0_comp_ff; +extern compop_func op_48b0_0_comp_ff; +extern compop_func op_48b8_0_comp_ff; +extern compop_func op_48b9_0_comp_ff; +extern compop_func op_48c0_0_comp_ff; +extern compop_func op_48d0_0_comp_ff; +extern compop_func op_48e0_0_comp_ff; +extern compop_func op_48e8_0_comp_ff; +extern compop_func op_48f0_0_comp_ff; +extern compop_func op_48f8_0_comp_ff; +extern compop_func op_48f9_0_comp_ff; +extern compop_func op_49c0_0_comp_ff; +extern compop_func op_4a00_0_comp_ff; +extern compop_func op_4a10_0_comp_ff; +extern compop_func op_4a18_0_comp_ff; +extern compop_func op_4a20_0_comp_ff; +extern compop_func op_4a28_0_comp_ff; +extern compop_func op_4a30_0_comp_ff; +extern compop_func op_4a38_0_comp_ff; +extern compop_func op_4a39_0_comp_ff; +extern compop_func op_4a3a_0_comp_ff; +extern compop_func op_4a3b_0_comp_ff; +extern compop_func op_4a3c_0_comp_ff; +extern compop_func op_4a40_0_comp_ff; +extern compop_func op_4a48_0_comp_ff; +extern compop_func op_4a50_0_comp_ff; +extern compop_func op_4a58_0_comp_ff; +extern compop_func op_4a60_0_comp_ff; +extern compop_func op_4a68_0_comp_ff; +extern compop_func op_4a70_0_comp_ff; +extern compop_func op_4a78_0_comp_ff; +extern compop_func op_4a79_0_comp_ff; +extern compop_func op_4a7a_0_comp_ff; +extern compop_func op_4a7b_0_comp_ff; +extern compop_func op_4a7c_0_comp_ff; +extern compop_func op_4a80_0_comp_ff; +extern compop_func op_4a88_0_comp_ff; +extern compop_func op_4a90_0_comp_ff; +extern compop_func op_4a98_0_comp_ff; +extern compop_func op_4aa0_0_comp_ff; +extern compop_func op_4aa8_0_comp_ff; +extern compop_func op_4ab0_0_comp_ff; +extern compop_func op_4ab8_0_comp_ff; +extern compop_func op_4ab9_0_comp_ff; +extern compop_func op_4aba_0_comp_ff; +extern compop_func op_4abb_0_comp_ff; +extern compop_func op_4abc_0_comp_ff; +extern compop_func op_4c90_0_comp_ff; +extern compop_func op_4c98_0_comp_ff; +extern compop_func op_4ca8_0_comp_ff; +extern compop_func op_4cb0_0_comp_ff; +extern compop_func op_4cb8_0_comp_ff; +extern compop_func op_4cb9_0_comp_ff; +extern compop_func op_4cba_0_comp_ff; +extern compop_func op_4cbb_0_comp_ff; +extern compop_func op_4cd0_0_comp_ff; +extern compop_func op_4cd8_0_comp_ff; +extern compop_func op_4ce8_0_comp_ff; +extern compop_func op_4cf0_0_comp_ff; +extern compop_func op_4cf8_0_comp_ff; +extern compop_func op_4cf9_0_comp_ff; +extern compop_func op_4cfa_0_comp_ff; +extern compop_func op_4cfb_0_comp_ff; +extern compop_func op_4e50_0_comp_ff; +extern compop_func op_4e58_0_comp_ff; +extern compop_func op_4e71_0_comp_ff; +extern compop_func op_4e74_0_comp_ff; +extern compop_func op_4e75_0_comp_ff; +extern compop_func op_4e90_0_comp_ff; +extern compop_func op_4ea8_0_comp_ff; +extern compop_func op_4eb0_0_comp_ff; +extern compop_func op_4eb8_0_comp_ff; +extern compop_func op_4eb9_0_comp_ff; +extern compop_func op_4eba_0_comp_ff; +extern compop_func op_4ebb_0_comp_ff; +extern compop_func op_4ed0_0_comp_ff; +extern compop_func op_4ee8_0_comp_ff; +extern compop_func op_4ef0_0_comp_ff; +extern compop_func op_4ef8_0_comp_ff; +extern compop_func op_4ef9_0_comp_ff; +extern compop_func op_4efa_0_comp_ff; +extern compop_func op_4efb_0_comp_ff; +extern compop_func op_5000_0_comp_ff; +extern compop_func op_5010_0_comp_ff; +extern compop_func op_5018_0_comp_ff; +extern compop_func op_5020_0_comp_ff; +extern compop_func op_5028_0_comp_ff; +extern compop_func op_5030_0_comp_ff; +extern compop_func op_5038_0_comp_ff; +extern compop_func op_5039_0_comp_ff; +extern compop_func op_5040_0_comp_ff; +extern compop_func op_5048_0_comp_ff; +extern compop_func op_5050_0_comp_ff; +extern compop_func op_5058_0_comp_ff; +extern compop_func op_5060_0_comp_ff; +extern compop_func op_5068_0_comp_ff; +extern compop_func op_5070_0_comp_ff; +extern compop_func op_5078_0_comp_ff; +extern compop_func op_5079_0_comp_ff; +extern compop_func op_5080_0_comp_ff; +extern compop_func op_5088_0_comp_ff; +extern compop_func op_5090_0_comp_ff; +extern compop_func op_5098_0_comp_ff; +extern compop_func op_50a0_0_comp_ff; +extern compop_func op_50a8_0_comp_ff; +extern compop_func op_50b0_0_comp_ff; +extern compop_func op_50b8_0_comp_ff; +extern compop_func op_50b9_0_comp_ff; +extern compop_func op_50c0_0_comp_ff; +extern compop_func op_50c8_0_comp_ff; +extern compop_func op_50d0_0_comp_ff; +extern compop_func op_50d8_0_comp_ff; +extern compop_func op_50e0_0_comp_ff; +extern compop_func op_50e8_0_comp_ff; +extern compop_func op_50f0_0_comp_ff; +extern compop_func op_50f8_0_comp_ff; +extern compop_func op_50f9_0_comp_ff; +extern compop_func op_5100_0_comp_ff; +extern compop_func op_5110_0_comp_ff; +extern compop_func op_5118_0_comp_ff; +extern compop_func op_5120_0_comp_ff; +extern compop_func op_5128_0_comp_ff; +extern compop_func op_5130_0_comp_ff; +extern compop_func op_5138_0_comp_ff; +extern compop_func op_5139_0_comp_ff; +extern compop_func op_5140_0_comp_ff; +extern compop_func op_5148_0_comp_ff; +extern compop_func op_5150_0_comp_ff; +extern compop_func op_5158_0_comp_ff; +extern compop_func op_5160_0_comp_ff; +extern compop_func op_5168_0_comp_ff; +extern compop_func op_5170_0_comp_ff; +extern compop_func op_5178_0_comp_ff; +extern compop_func op_5179_0_comp_ff; +extern compop_func op_5180_0_comp_ff; +extern compop_func op_5188_0_comp_ff; +extern compop_func op_5190_0_comp_ff; +extern compop_func op_5198_0_comp_ff; +extern compop_func op_51a0_0_comp_ff; +extern compop_func op_51a8_0_comp_ff; +extern compop_func op_51b0_0_comp_ff; +extern compop_func op_51b8_0_comp_ff; +extern compop_func op_51b9_0_comp_ff; +extern compop_func op_51c0_0_comp_ff; +extern compop_func op_51c8_0_comp_ff; +extern compop_func op_51d0_0_comp_ff; +extern compop_func op_51d8_0_comp_ff; +extern compop_func op_51e0_0_comp_ff; +extern compop_func op_51e8_0_comp_ff; +extern compop_func op_51f0_0_comp_ff; +extern compop_func op_51f8_0_comp_ff; +extern compop_func op_51f9_0_comp_ff; +extern compop_func op_52c0_0_comp_ff; +extern compop_func op_52c8_0_comp_ff; +extern compop_func op_52d0_0_comp_ff; +extern compop_func op_52d8_0_comp_ff; +extern compop_func op_52e0_0_comp_ff; +extern compop_func op_52e8_0_comp_ff; +extern compop_func op_52f0_0_comp_ff; +extern compop_func op_52f8_0_comp_ff; +extern compop_func op_52f9_0_comp_ff; +extern compop_func op_53c0_0_comp_ff; +extern compop_func op_53c8_0_comp_ff; +extern compop_func op_53d0_0_comp_ff; +extern compop_func op_53d8_0_comp_ff; +extern compop_func op_53e0_0_comp_ff; +extern compop_func op_53e8_0_comp_ff; +extern compop_func op_53f0_0_comp_ff; +extern compop_func op_53f8_0_comp_ff; +extern compop_func op_53f9_0_comp_ff; +extern compop_func op_54c0_0_comp_ff; +extern compop_func op_54c8_0_comp_ff; +extern compop_func op_54d0_0_comp_ff; +extern compop_func op_54d8_0_comp_ff; +extern compop_func op_54e0_0_comp_ff; +extern compop_func op_54e8_0_comp_ff; +extern compop_func op_54f0_0_comp_ff; +extern compop_func op_54f8_0_comp_ff; +extern compop_func op_54f9_0_comp_ff; +extern compop_func op_55c0_0_comp_ff; +extern compop_func op_55c8_0_comp_ff; +extern compop_func op_55d0_0_comp_ff; +extern compop_func op_55d8_0_comp_ff; +extern compop_func op_55e0_0_comp_ff; +extern compop_func op_55e8_0_comp_ff; +extern compop_func op_55f0_0_comp_ff; +extern compop_func op_55f8_0_comp_ff; +extern compop_func op_55f9_0_comp_ff; +extern compop_func op_56c0_0_comp_ff; +extern compop_func op_56c8_0_comp_ff; +extern compop_func op_56d0_0_comp_ff; +extern compop_func op_56d8_0_comp_ff; +extern compop_func op_56e0_0_comp_ff; +extern compop_func op_56e8_0_comp_ff; +extern compop_func op_56f0_0_comp_ff; +extern compop_func op_56f8_0_comp_ff; +extern compop_func op_56f9_0_comp_ff; +extern compop_func op_57c0_0_comp_ff; +extern compop_func op_57c8_0_comp_ff; +extern compop_func op_57d0_0_comp_ff; +extern compop_func op_57d8_0_comp_ff; +extern compop_func op_57e0_0_comp_ff; +extern compop_func op_57e8_0_comp_ff; +extern compop_func op_57f0_0_comp_ff; +extern compop_func op_57f8_0_comp_ff; +extern compop_func op_57f9_0_comp_ff; +extern compop_func op_5ac0_0_comp_ff; +extern compop_func op_5ac8_0_comp_ff; +extern compop_func op_5ad0_0_comp_ff; +extern compop_func op_5ad8_0_comp_ff; +extern compop_func op_5ae0_0_comp_ff; +extern compop_func op_5ae8_0_comp_ff; +extern compop_func op_5af0_0_comp_ff; +extern compop_func op_5af8_0_comp_ff; +extern compop_func op_5af9_0_comp_ff; +extern compop_func op_5bc0_0_comp_ff; +extern compop_func op_5bc8_0_comp_ff; +extern compop_func op_5bd0_0_comp_ff; +extern compop_func op_5bd8_0_comp_ff; +extern compop_func op_5be0_0_comp_ff; +extern compop_func op_5be8_0_comp_ff; +extern compop_func op_5bf0_0_comp_ff; +extern compop_func op_5bf8_0_comp_ff; +extern compop_func op_5bf9_0_comp_ff; +extern compop_func op_5cc0_0_comp_ff; +extern compop_func op_5cc8_0_comp_ff; +extern compop_func op_5cd0_0_comp_ff; +extern compop_func op_5cd8_0_comp_ff; +extern compop_func op_5ce0_0_comp_ff; +extern compop_func op_5ce8_0_comp_ff; +extern compop_func op_5cf0_0_comp_ff; +extern compop_func op_5cf8_0_comp_ff; +extern compop_func op_5cf9_0_comp_ff; +extern compop_func op_5dc0_0_comp_ff; +extern compop_func op_5dc8_0_comp_ff; +extern compop_func op_5dd0_0_comp_ff; +extern compop_func op_5dd8_0_comp_ff; +extern compop_func op_5de0_0_comp_ff; +extern compop_func op_5de8_0_comp_ff; +extern compop_func op_5df0_0_comp_ff; +extern compop_func op_5df8_0_comp_ff; +extern compop_func op_5df9_0_comp_ff; +extern compop_func op_5ec0_0_comp_ff; +extern compop_func op_5ec8_0_comp_ff; +extern compop_func op_5ed0_0_comp_ff; +extern compop_func op_5ed8_0_comp_ff; +extern compop_func op_5ee0_0_comp_ff; +extern compop_func op_5ee8_0_comp_ff; +extern compop_func op_5ef0_0_comp_ff; +extern compop_func op_5ef8_0_comp_ff; +extern compop_func op_5ef9_0_comp_ff; +extern compop_func op_5fc0_0_comp_ff; +extern compop_func op_5fc8_0_comp_ff; +extern compop_func op_5fd0_0_comp_ff; +extern compop_func op_5fd8_0_comp_ff; +extern compop_func op_5fe0_0_comp_ff; +extern compop_func op_5fe8_0_comp_ff; +extern compop_func op_5ff0_0_comp_ff; +extern compop_func op_5ff8_0_comp_ff; +extern compop_func op_5ff9_0_comp_ff; +extern compop_func op_6000_0_comp_ff; +extern compop_func op_6001_0_comp_ff; +extern compop_func op_60ff_0_comp_ff; +extern compop_func op_6100_0_comp_ff; +extern compop_func op_6101_0_comp_ff; +extern compop_func op_61ff_0_comp_ff; +extern compop_func op_6200_0_comp_ff; +extern compop_func op_6201_0_comp_ff; +extern compop_func op_62ff_0_comp_ff; +extern compop_func op_6300_0_comp_ff; +extern compop_func op_6301_0_comp_ff; +extern compop_func op_63ff_0_comp_ff; +extern compop_func op_6400_0_comp_ff; +extern compop_func op_6401_0_comp_ff; +extern compop_func op_64ff_0_comp_ff; +extern compop_func op_6500_0_comp_ff; +extern compop_func op_6501_0_comp_ff; +extern compop_func op_65ff_0_comp_ff; +extern compop_func op_6600_0_comp_ff; +extern compop_func op_6601_0_comp_ff; +extern compop_func op_66ff_0_comp_ff; +extern compop_func op_6700_0_comp_ff; +extern compop_func op_6701_0_comp_ff; +extern compop_func op_67ff_0_comp_ff; +extern compop_func op_6a00_0_comp_ff; +extern compop_func op_6a01_0_comp_ff; +extern compop_func op_6aff_0_comp_ff; +extern compop_func op_6b00_0_comp_ff; +extern compop_func op_6b01_0_comp_ff; +extern compop_func op_6bff_0_comp_ff; +extern compop_func op_6c00_0_comp_ff; +extern compop_func op_6c01_0_comp_ff; +extern compop_func op_6cff_0_comp_ff; +extern compop_func op_6d00_0_comp_ff; +extern compop_func op_6d01_0_comp_ff; +extern compop_func op_6dff_0_comp_ff; +extern compop_func op_6e00_0_comp_ff; +extern compop_func op_6e01_0_comp_ff; +extern compop_func op_6eff_0_comp_ff; +extern compop_func op_6f00_0_comp_ff; +extern compop_func op_6f01_0_comp_ff; +extern compop_func op_6fff_0_comp_ff; +extern compop_func op_7000_0_comp_ff; +extern compop_func op_8000_0_comp_ff; +extern compop_func op_8010_0_comp_ff; +extern compop_func op_8018_0_comp_ff; +extern compop_func op_8020_0_comp_ff; +extern compop_func op_8028_0_comp_ff; +extern compop_func op_8030_0_comp_ff; +extern compop_func op_8038_0_comp_ff; +extern compop_func op_8039_0_comp_ff; +extern compop_func op_803a_0_comp_ff; +extern compop_func op_803b_0_comp_ff; +extern compop_func op_803c_0_comp_ff; +extern compop_func op_8040_0_comp_ff; +extern compop_func op_8050_0_comp_ff; +extern compop_func op_8058_0_comp_ff; +extern compop_func op_8060_0_comp_ff; +extern compop_func op_8068_0_comp_ff; +extern compop_func op_8070_0_comp_ff; +extern compop_func op_8078_0_comp_ff; +extern compop_func op_8079_0_comp_ff; +extern compop_func op_807a_0_comp_ff; +extern compop_func op_807b_0_comp_ff; +extern compop_func op_807c_0_comp_ff; +extern compop_func op_8080_0_comp_ff; +extern compop_func op_8090_0_comp_ff; +extern compop_func op_8098_0_comp_ff; +extern compop_func op_80a0_0_comp_ff; +extern compop_func op_80a8_0_comp_ff; +extern compop_func op_80b0_0_comp_ff; +extern compop_func op_80b8_0_comp_ff; +extern compop_func op_80b9_0_comp_ff; +extern compop_func op_80ba_0_comp_ff; +extern compop_func op_80bb_0_comp_ff; +extern compop_func op_80bc_0_comp_ff; +extern compop_func op_8110_0_comp_ff; +extern compop_func op_8118_0_comp_ff; +extern compop_func op_8120_0_comp_ff; +extern compop_func op_8128_0_comp_ff; +extern compop_func op_8130_0_comp_ff; +extern compop_func op_8138_0_comp_ff; +extern compop_func op_8139_0_comp_ff; +extern compop_func op_8150_0_comp_ff; +extern compop_func op_8158_0_comp_ff; +extern compop_func op_8160_0_comp_ff; +extern compop_func op_8168_0_comp_ff; +extern compop_func op_8170_0_comp_ff; +extern compop_func op_8178_0_comp_ff; +extern compop_func op_8179_0_comp_ff; +extern compop_func op_8190_0_comp_ff; +extern compop_func op_8198_0_comp_ff; +extern compop_func op_81a0_0_comp_ff; +extern compop_func op_81a8_0_comp_ff; +extern compop_func op_81b0_0_comp_ff; +extern compop_func op_81b8_0_comp_ff; +extern compop_func op_81b9_0_comp_ff; +extern compop_func op_9000_0_comp_ff; +extern compop_func op_9010_0_comp_ff; +extern compop_func op_9018_0_comp_ff; +extern compop_func op_9020_0_comp_ff; +extern compop_func op_9028_0_comp_ff; +extern compop_func op_9030_0_comp_ff; +extern compop_func op_9038_0_comp_ff; +extern compop_func op_9039_0_comp_ff; +extern compop_func op_903a_0_comp_ff; +extern compop_func op_903b_0_comp_ff; +extern compop_func op_903c_0_comp_ff; +extern compop_func op_9040_0_comp_ff; +extern compop_func op_9048_0_comp_ff; +extern compop_func op_9050_0_comp_ff; +extern compop_func op_9058_0_comp_ff; +extern compop_func op_9060_0_comp_ff; +extern compop_func op_9068_0_comp_ff; +extern compop_func op_9070_0_comp_ff; +extern compop_func op_9078_0_comp_ff; +extern compop_func op_9079_0_comp_ff; +extern compop_func op_907a_0_comp_ff; +extern compop_func op_907b_0_comp_ff; +extern compop_func op_907c_0_comp_ff; +extern compop_func op_9080_0_comp_ff; +extern compop_func op_9088_0_comp_ff; +extern compop_func op_9090_0_comp_ff; +extern compop_func op_9098_0_comp_ff; +extern compop_func op_90a0_0_comp_ff; +extern compop_func op_90a8_0_comp_ff; +extern compop_func op_90b0_0_comp_ff; +extern compop_func op_90b8_0_comp_ff; +extern compop_func op_90b9_0_comp_ff; +extern compop_func op_90ba_0_comp_ff; +extern compop_func op_90bb_0_comp_ff; +extern compop_func op_90bc_0_comp_ff; +extern compop_func op_90c0_0_comp_ff; +extern compop_func op_90c8_0_comp_ff; +extern compop_func op_90d0_0_comp_ff; +extern compop_func op_90d8_0_comp_ff; +extern compop_func op_90e0_0_comp_ff; +extern compop_func op_90e8_0_comp_ff; +extern compop_func op_90f0_0_comp_ff; +extern compop_func op_90f8_0_comp_ff; +extern compop_func op_90f9_0_comp_ff; +extern compop_func op_90fa_0_comp_ff; +extern compop_func op_90fb_0_comp_ff; +extern compop_func op_90fc_0_comp_ff; +extern compop_func op_9100_0_comp_ff; +extern compop_func op_9108_0_comp_ff; +extern compop_func op_9110_0_comp_ff; +extern compop_func op_9118_0_comp_ff; +extern compop_func op_9120_0_comp_ff; +extern compop_func op_9128_0_comp_ff; +extern compop_func op_9130_0_comp_ff; +extern compop_func op_9138_0_comp_ff; +extern compop_func op_9139_0_comp_ff; +extern compop_func op_9140_0_comp_ff; +extern compop_func op_9148_0_comp_ff; +extern compop_func op_9150_0_comp_ff; +extern compop_func op_9158_0_comp_ff; +extern compop_func op_9160_0_comp_ff; +extern compop_func op_9168_0_comp_ff; +extern compop_func op_9170_0_comp_ff; +extern compop_func op_9178_0_comp_ff; +extern compop_func op_9179_0_comp_ff; +extern compop_func op_9180_0_comp_ff; +extern compop_func op_9188_0_comp_ff; +extern compop_func op_9190_0_comp_ff; +extern compop_func op_9198_0_comp_ff; +extern compop_func op_91a0_0_comp_ff; +extern compop_func op_91a8_0_comp_ff; +extern compop_func op_91b0_0_comp_ff; +extern compop_func op_91b8_0_comp_ff; +extern compop_func op_91b9_0_comp_ff; +extern compop_func op_91c0_0_comp_ff; +extern compop_func op_91c8_0_comp_ff; +extern compop_func op_91d0_0_comp_ff; +extern compop_func op_91d8_0_comp_ff; +extern compop_func op_91e0_0_comp_ff; +extern compop_func op_91e8_0_comp_ff; +extern compop_func op_91f0_0_comp_ff; +extern compop_func op_91f8_0_comp_ff; +extern compop_func op_91f9_0_comp_ff; +extern compop_func op_91fa_0_comp_ff; +extern compop_func op_91fb_0_comp_ff; +extern compop_func op_91fc_0_comp_ff; +extern compop_func op_b000_0_comp_ff; +extern compop_func op_b010_0_comp_ff; +extern compop_func op_b018_0_comp_ff; +extern compop_func op_b020_0_comp_ff; +extern compop_func op_b028_0_comp_ff; +extern compop_func op_b030_0_comp_ff; +extern compop_func op_b038_0_comp_ff; +extern compop_func op_b039_0_comp_ff; +extern compop_func op_b03a_0_comp_ff; +extern compop_func op_b03b_0_comp_ff; +extern compop_func op_b03c_0_comp_ff; +extern compop_func op_b040_0_comp_ff; +extern compop_func op_b048_0_comp_ff; +extern compop_func op_b050_0_comp_ff; +extern compop_func op_b058_0_comp_ff; +extern compop_func op_b060_0_comp_ff; +extern compop_func op_b068_0_comp_ff; +extern compop_func op_b070_0_comp_ff; +extern compop_func op_b078_0_comp_ff; +extern compop_func op_b079_0_comp_ff; +extern compop_func op_b07a_0_comp_ff; +extern compop_func op_b07b_0_comp_ff; +extern compop_func op_b07c_0_comp_ff; +extern compop_func op_b080_0_comp_ff; +extern compop_func op_b088_0_comp_ff; +extern compop_func op_b090_0_comp_ff; +extern compop_func op_b098_0_comp_ff; +extern compop_func op_b0a0_0_comp_ff; +extern compop_func op_b0a8_0_comp_ff; +extern compop_func op_b0b0_0_comp_ff; +extern compop_func op_b0b8_0_comp_ff; +extern compop_func op_b0b9_0_comp_ff; +extern compop_func op_b0ba_0_comp_ff; +extern compop_func op_b0bb_0_comp_ff; +extern compop_func op_b0bc_0_comp_ff; +extern compop_func op_b0c0_0_comp_ff; +extern compop_func op_b0c8_0_comp_ff; +extern compop_func op_b0d0_0_comp_ff; +extern compop_func op_b0d8_0_comp_ff; +extern compop_func op_b0e0_0_comp_ff; +extern compop_func op_b0e8_0_comp_ff; +extern compop_func op_b0f0_0_comp_ff; +extern compop_func op_b0f8_0_comp_ff; +extern compop_func op_b0f9_0_comp_ff; +extern compop_func op_b0fa_0_comp_ff; +extern compop_func op_b0fb_0_comp_ff; +extern compop_func op_b0fc_0_comp_ff; +extern compop_func op_b100_0_comp_ff; +extern compop_func op_b108_0_comp_ff; +extern compop_func op_b110_0_comp_ff; +extern compop_func op_b118_0_comp_ff; +extern compop_func op_b120_0_comp_ff; +extern compop_func op_b128_0_comp_ff; +extern compop_func op_b130_0_comp_ff; +extern compop_func op_b138_0_comp_ff; +extern compop_func op_b139_0_comp_ff; +extern compop_func op_b140_0_comp_ff; +extern compop_func op_b148_0_comp_ff; +extern compop_func op_b150_0_comp_ff; +extern compop_func op_b158_0_comp_ff; +extern compop_func op_b160_0_comp_ff; +extern compop_func op_b168_0_comp_ff; +extern compop_func op_b170_0_comp_ff; +extern compop_func op_b178_0_comp_ff; +extern compop_func op_b179_0_comp_ff; +extern compop_func op_b180_0_comp_ff; +extern compop_func op_b188_0_comp_ff; +extern compop_func op_b190_0_comp_ff; +extern compop_func op_b198_0_comp_ff; +extern compop_func op_b1a0_0_comp_ff; +extern compop_func op_b1a8_0_comp_ff; +extern compop_func op_b1b0_0_comp_ff; +extern compop_func op_b1b8_0_comp_ff; +extern compop_func op_b1b9_0_comp_ff; +extern compop_func op_b1c0_0_comp_ff; +extern compop_func op_b1c8_0_comp_ff; +extern compop_func op_b1d0_0_comp_ff; +extern compop_func op_b1d8_0_comp_ff; +extern compop_func op_b1e0_0_comp_ff; +extern compop_func op_b1e8_0_comp_ff; +extern compop_func op_b1f0_0_comp_ff; +extern compop_func op_b1f8_0_comp_ff; +extern compop_func op_b1f9_0_comp_ff; +extern compop_func op_b1fa_0_comp_ff; +extern compop_func op_b1fb_0_comp_ff; +extern compop_func op_b1fc_0_comp_ff; +extern compop_func op_c000_0_comp_ff; +extern compop_func op_c010_0_comp_ff; +extern compop_func op_c018_0_comp_ff; +extern compop_func op_c020_0_comp_ff; +extern compop_func op_c028_0_comp_ff; +extern compop_func op_c030_0_comp_ff; +extern compop_func op_c038_0_comp_ff; +extern compop_func op_c039_0_comp_ff; +extern compop_func op_c03a_0_comp_ff; +extern compop_func op_c03b_0_comp_ff; +extern compop_func op_c03c_0_comp_ff; +extern compop_func op_c040_0_comp_ff; +extern compop_func op_c050_0_comp_ff; +extern compop_func op_c058_0_comp_ff; +extern compop_func op_c060_0_comp_ff; +extern compop_func op_c068_0_comp_ff; +extern compop_func op_c070_0_comp_ff; +extern compop_func op_c078_0_comp_ff; +extern compop_func op_c079_0_comp_ff; +extern compop_func op_c07a_0_comp_ff; +extern compop_func op_c07b_0_comp_ff; +extern compop_func op_c07c_0_comp_ff; +extern compop_func op_c080_0_comp_ff; +extern compop_func op_c090_0_comp_ff; +extern compop_func op_c098_0_comp_ff; +extern compop_func op_c0a0_0_comp_ff; +extern compop_func op_c0a8_0_comp_ff; +extern compop_func op_c0b0_0_comp_ff; +extern compop_func op_c0b8_0_comp_ff; +extern compop_func op_c0b9_0_comp_ff; +extern compop_func op_c0ba_0_comp_ff; +extern compop_func op_c0bb_0_comp_ff; +extern compop_func op_c0bc_0_comp_ff; +extern compop_func op_c0c0_0_comp_ff; +extern compop_func op_c0d0_0_comp_ff; +extern compop_func op_c0d8_0_comp_ff; +extern compop_func op_c0e0_0_comp_ff; +extern compop_func op_c0e8_0_comp_ff; +extern compop_func op_c0f0_0_comp_ff; +extern compop_func op_c0f8_0_comp_ff; +extern compop_func op_c0f9_0_comp_ff; +extern compop_func op_c0fa_0_comp_ff; +extern compop_func op_c0fb_0_comp_ff; +extern compop_func op_c0fc_0_comp_ff; +extern compop_func op_c110_0_comp_ff; +extern compop_func op_c118_0_comp_ff; +extern compop_func op_c120_0_comp_ff; +extern compop_func op_c128_0_comp_ff; +extern compop_func op_c130_0_comp_ff; +extern compop_func op_c138_0_comp_ff; +extern compop_func op_c139_0_comp_ff; +extern compop_func op_c140_0_comp_ff; +extern compop_func op_c148_0_comp_ff; +extern compop_func op_c150_0_comp_ff; +extern compop_func op_c158_0_comp_ff; +extern compop_func op_c160_0_comp_ff; +extern compop_func op_c168_0_comp_ff; +extern compop_func op_c170_0_comp_ff; +extern compop_func op_c178_0_comp_ff; +extern compop_func op_c179_0_comp_ff; +extern compop_func op_c188_0_comp_ff; +extern compop_func op_c190_0_comp_ff; +extern compop_func op_c198_0_comp_ff; +extern compop_func op_c1a0_0_comp_ff; +extern compop_func op_c1a8_0_comp_ff; +extern compop_func op_c1b0_0_comp_ff; +extern compop_func op_c1b8_0_comp_ff; +extern compop_func op_c1b9_0_comp_ff; +extern compop_func op_c1c0_0_comp_ff; +extern compop_func op_c1d0_0_comp_ff; +extern compop_func op_c1d8_0_comp_ff; +extern compop_func op_c1e0_0_comp_ff; +extern compop_func op_c1e8_0_comp_ff; +extern compop_func op_c1f0_0_comp_ff; +extern compop_func op_c1f8_0_comp_ff; +extern compop_func op_c1f9_0_comp_ff; +extern compop_func op_c1fa_0_comp_ff; +extern compop_func op_c1fb_0_comp_ff; +extern compop_func op_c1fc_0_comp_ff; +extern compop_func op_d000_0_comp_ff; +extern compop_func op_d010_0_comp_ff; +extern compop_func op_d018_0_comp_ff; +extern compop_func op_d020_0_comp_ff; +extern compop_func op_d028_0_comp_ff; +extern compop_func op_d030_0_comp_ff; +extern compop_func op_d038_0_comp_ff; +extern compop_func op_d039_0_comp_ff; +extern compop_func op_d03a_0_comp_ff; +extern compop_func op_d03b_0_comp_ff; +extern compop_func op_d03c_0_comp_ff; +extern compop_func op_d040_0_comp_ff; +extern compop_func op_d048_0_comp_ff; +extern compop_func op_d050_0_comp_ff; +extern compop_func op_d058_0_comp_ff; +extern compop_func op_d060_0_comp_ff; +extern compop_func op_d068_0_comp_ff; +extern compop_func op_d070_0_comp_ff; +extern compop_func op_d078_0_comp_ff; +extern compop_func op_d079_0_comp_ff; +extern compop_func op_d07a_0_comp_ff; +extern compop_func op_d07b_0_comp_ff; +extern compop_func op_d07c_0_comp_ff; +extern compop_func op_d080_0_comp_ff; +extern compop_func op_d088_0_comp_ff; +extern compop_func op_d090_0_comp_ff; +extern compop_func op_d098_0_comp_ff; +extern compop_func op_d0a0_0_comp_ff; +extern compop_func op_d0a8_0_comp_ff; +extern compop_func op_d0b0_0_comp_ff; +extern compop_func op_d0b8_0_comp_ff; +extern compop_func op_d0b9_0_comp_ff; +extern compop_func op_d0ba_0_comp_ff; +extern compop_func op_d0bb_0_comp_ff; +extern compop_func op_d0bc_0_comp_ff; +extern compop_func op_d0c0_0_comp_ff; +extern compop_func op_d0c8_0_comp_ff; +extern compop_func op_d0d0_0_comp_ff; +extern compop_func op_d0d8_0_comp_ff; +extern compop_func op_d0e0_0_comp_ff; +extern compop_func op_d0e8_0_comp_ff; +extern compop_func op_d0f0_0_comp_ff; +extern compop_func op_d0f8_0_comp_ff; +extern compop_func op_d0f9_0_comp_ff; +extern compop_func op_d0fa_0_comp_ff; +extern compop_func op_d0fb_0_comp_ff; +extern compop_func op_d0fc_0_comp_ff; +extern compop_func op_d100_0_comp_ff; +extern compop_func op_d108_0_comp_ff; +extern compop_func op_d110_0_comp_ff; +extern compop_func op_d118_0_comp_ff; +extern compop_func op_d120_0_comp_ff; +extern compop_func op_d128_0_comp_ff; +extern compop_func op_d130_0_comp_ff; +extern compop_func op_d138_0_comp_ff; +extern compop_func op_d139_0_comp_ff; +extern compop_func op_d140_0_comp_ff; +extern compop_func op_d148_0_comp_ff; +extern compop_func op_d150_0_comp_ff; +extern compop_func op_d158_0_comp_ff; +extern compop_func op_d160_0_comp_ff; +extern compop_func op_d168_0_comp_ff; +extern compop_func op_d170_0_comp_ff; +extern compop_func op_d178_0_comp_ff; +extern compop_func op_d179_0_comp_ff; +extern compop_func op_d180_0_comp_ff; +extern compop_func op_d188_0_comp_ff; +extern compop_func op_d190_0_comp_ff; +extern compop_func op_d198_0_comp_ff; +extern compop_func op_d1a0_0_comp_ff; +extern compop_func op_d1a8_0_comp_ff; +extern compop_func op_d1b0_0_comp_ff; +extern compop_func op_d1b8_0_comp_ff; +extern compop_func op_d1b9_0_comp_ff; +extern compop_func op_d1c0_0_comp_ff; +extern compop_func op_d1c8_0_comp_ff; +extern compop_func op_d1d0_0_comp_ff; +extern compop_func op_d1d8_0_comp_ff; +extern compop_func op_d1e0_0_comp_ff; +extern compop_func op_d1e8_0_comp_ff; +extern compop_func op_d1f0_0_comp_ff; +extern compop_func op_d1f8_0_comp_ff; +extern compop_func op_d1f9_0_comp_ff; +extern compop_func op_d1fa_0_comp_ff; +extern compop_func op_d1fb_0_comp_ff; +extern compop_func op_d1fc_0_comp_ff; +extern compop_func op_e000_0_comp_ff; +extern compop_func op_e008_0_comp_ff; +extern compop_func op_e018_0_comp_ff; +extern compop_func op_e020_0_comp_ff; +extern compop_func op_e028_0_comp_ff; +extern compop_func op_e038_0_comp_ff; +extern compop_func op_e040_0_comp_ff; +extern compop_func op_e048_0_comp_ff; +extern compop_func op_e058_0_comp_ff; +extern compop_func op_e060_0_comp_ff; +extern compop_func op_e068_0_comp_ff; +extern compop_func op_e078_0_comp_ff; +extern compop_func op_e080_0_comp_ff; +extern compop_func op_e088_0_comp_ff; +extern compop_func op_e098_0_comp_ff; +extern compop_func op_e0a0_0_comp_ff; +extern compop_func op_e0a8_0_comp_ff; +extern compop_func op_e0b8_0_comp_ff; +extern compop_func op_e100_0_comp_ff; +extern compop_func op_e108_0_comp_ff; +extern compop_func op_e118_0_comp_ff; +extern compop_func op_e120_0_comp_ff; +extern compop_func op_e128_0_comp_ff; +extern compop_func op_e138_0_comp_ff; +extern compop_func op_e140_0_comp_ff; +extern compop_func op_e148_0_comp_ff; +extern compop_func op_e158_0_comp_ff; +extern compop_func op_e160_0_comp_ff; +extern compop_func op_e168_0_comp_ff; +extern compop_func op_e178_0_comp_ff; +extern compop_func op_e180_0_comp_ff; +extern compop_func op_e188_0_comp_ff; +extern compop_func op_e198_0_comp_ff; +extern compop_func op_e1a0_0_comp_ff; +extern compop_func op_e1a8_0_comp_ff; +extern compop_func op_e1b8_0_comp_ff; +extern compop_func op_f200_0_comp_ff; +extern compop_func op_f208_0_comp_ff; +extern compop_func op_f210_0_comp_ff; +extern compop_func op_f218_0_comp_ff; +extern compop_func op_f220_0_comp_ff; +extern compop_func op_f228_0_comp_ff; +extern compop_func op_f230_0_comp_ff; +extern compop_func op_f238_0_comp_ff; +extern compop_func op_f239_0_comp_ff; +extern compop_func op_f23a_0_comp_ff; +extern compop_func op_f23b_0_comp_ff; +extern compop_func op_f23c_0_comp_ff; +extern compop_func op_f240_0_comp_ff; +extern compop_func op_f250_0_comp_ff; +extern compop_func op_f258_0_comp_ff; +extern compop_func op_f260_0_comp_ff; +extern compop_func op_f268_0_comp_ff; +extern compop_func op_f270_0_comp_ff; +extern compop_func op_f278_0_comp_ff; +extern compop_func op_f279_0_comp_ff; +extern compop_func op_f280_0_comp_ff; +extern compop_func op_f2c0_0_comp_ff; +extern compop_func op_f600_0_comp_ff; +extern compop_func op_f608_0_comp_ff; +extern compop_func op_f610_0_comp_ff; +extern compop_func op_f618_0_comp_ff; +extern compop_func op_f620_0_comp_ff; +extern compop_func op_0_0_comp_nf; +extern compop_func op_10_0_comp_nf; +extern compop_func op_18_0_comp_nf; +extern compop_func op_20_0_comp_nf; +extern compop_func op_28_0_comp_nf; +extern compop_func op_30_0_comp_nf; +extern compop_func op_38_0_comp_nf; +extern compop_func op_39_0_comp_nf; +extern compop_func op_40_0_comp_nf; +extern compop_func op_50_0_comp_nf; +extern compop_func op_58_0_comp_nf; +extern compop_func op_60_0_comp_nf; +extern compop_func op_68_0_comp_nf; +extern compop_func op_70_0_comp_nf; +extern compop_func op_78_0_comp_nf; +extern compop_func op_79_0_comp_nf; +extern compop_func op_80_0_comp_nf; +extern compop_func op_90_0_comp_nf; +extern compop_func op_98_0_comp_nf; +extern compop_func op_a0_0_comp_nf; +extern compop_func op_a8_0_comp_nf; +extern compop_func op_b0_0_comp_nf; +extern compop_func op_b8_0_comp_nf; +extern compop_func op_b9_0_comp_nf; +extern compop_func op_100_0_comp_nf; +extern compop_func op_110_0_comp_nf; +extern compop_func op_118_0_comp_nf; +extern compop_func op_120_0_comp_nf; +extern compop_func op_128_0_comp_nf; +extern compop_func op_130_0_comp_nf; +extern compop_func op_138_0_comp_nf; +extern compop_func op_139_0_comp_nf; +extern compop_func op_13a_0_comp_nf; +extern compop_func op_13b_0_comp_nf; +extern compop_func op_13c_0_comp_nf; +extern compop_func op_140_0_comp_nf; +extern compop_func op_150_0_comp_nf; +extern compop_func op_158_0_comp_nf; +extern compop_func op_160_0_comp_nf; +extern compop_func op_168_0_comp_nf; +extern compop_func op_170_0_comp_nf; +extern compop_func op_178_0_comp_nf; +extern compop_func op_179_0_comp_nf; +extern compop_func op_180_0_comp_nf; +extern compop_func op_190_0_comp_nf; +extern compop_func op_198_0_comp_nf; +extern compop_func op_1a0_0_comp_nf; +extern compop_func op_1a8_0_comp_nf; +extern compop_func op_1b0_0_comp_nf; +extern compop_func op_1b8_0_comp_nf; +extern compop_func op_1b9_0_comp_nf; +extern compop_func op_1c0_0_comp_nf; +extern compop_func op_1d0_0_comp_nf; +extern compop_func op_1d8_0_comp_nf; +extern compop_func op_1e0_0_comp_nf; +extern compop_func op_1e8_0_comp_nf; +extern compop_func op_1f0_0_comp_nf; +extern compop_func op_1f8_0_comp_nf; +extern compop_func op_1f9_0_comp_nf; +extern compop_func op_200_0_comp_nf; +extern compop_func op_210_0_comp_nf; +extern compop_func op_218_0_comp_nf; +extern compop_func op_220_0_comp_nf; +extern compop_func op_228_0_comp_nf; +extern compop_func op_230_0_comp_nf; +extern compop_func op_238_0_comp_nf; +extern compop_func op_239_0_comp_nf; +extern compop_func op_240_0_comp_nf; +extern compop_func op_250_0_comp_nf; +extern compop_func op_258_0_comp_nf; +extern compop_func op_260_0_comp_nf; +extern compop_func op_268_0_comp_nf; +extern compop_func op_270_0_comp_nf; +extern compop_func op_278_0_comp_nf; +extern compop_func op_279_0_comp_nf; +extern compop_func op_280_0_comp_nf; +extern compop_func op_290_0_comp_nf; +extern compop_func op_298_0_comp_nf; +extern compop_func op_2a0_0_comp_nf; +extern compop_func op_2a8_0_comp_nf; +extern compop_func op_2b0_0_comp_nf; +extern compop_func op_2b8_0_comp_nf; +extern compop_func op_2b9_0_comp_nf; +extern compop_func op_400_0_comp_nf; +extern compop_func op_410_0_comp_nf; +extern compop_func op_418_0_comp_nf; +extern compop_func op_420_0_comp_nf; +extern compop_func op_428_0_comp_nf; +extern compop_func op_430_0_comp_nf; +extern compop_func op_438_0_comp_nf; +extern compop_func op_439_0_comp_nf; +extern compop_func op_440_0_comp_nf; +extern compop_func op_450_0_comp_nf; +extern compop_func op_458_0_comp_nf; +extern compop_func op_460_0_comp_nf; +extern compop_func op_468_0_comp_nf; +extern compop_func op_470_0_comp_nf; +extern compop_func op_478_0_comp_nf; +extern compop_func op_479_0_comp_nf; +extern compop_func op_480_0_comp_nf; +extern compop_func op_490_0_comp_nf; +extern compop_func op_498_0_comp_nf; +extern compop_func op_4a0_0_comp_nf; +extern compop_func op_4a8_0_comp_nf; +extern compop_func op_4b0_0_comp_nf; +extern compop_func op_4b8_0_comp_nf; +extern compop_func op_4b9_0_comp_nf; +extern compop_func op_600_0_comp_nf; +extern compop_func op_610_0_comp_nf; +extern compop_func op_618_0_comp_nf; +extern compop_func op_620_0_comp_nf; +extern compop_func op_628_0_comp_nf; +extern compop_func op_630_0_comp_nf; +extern compop_func op_638_0_comp_nf; +extern compop_func op_639_0_comp_nf; +extern compop_func op_640_0_comp_nf; +extern compop_func op_650_0_comp_nf; +extern compop_func op_658_0_comp_nf; +extern compop_func op_660_0_comp_nf; +extern compop_func op_668_0_comp_nf; +extern compop_func op_670_0_comp_nf; +extern compop_func op_678_0_comp_nf; +extern compop_func op_679_0_comp_nf; +extern compop_func op_680_0_comp_nf; +extern compop_func op_690_0_comp_nf; +extern compop_func op_698_0_comp_nf; +extern compop_func op_6a0_0_comp_nf; +extern compop_func op_6a8_0_comp_nf; +extern compop_func op_6b0_0_comp_nf; +extern compop_func op_6b8_0_comp_nf; +extern compop_func op_6b9_0_comp_nf; +extern compop_func op_800_0_comp_nf; +extern compop_func op_810_0_comp_nf; +extern compop_func op_818_0_comp_nf; +extern compop_func op_820_0_comp_nf; +extern compop_func op_828_0_comp_nf; +extern compop_func op_830_0_comp_nf; +extern compop_func op_838_0_comp_nf; +extern compop_func op_839_0_comp_nf; +extern compop_func op_83a_0_comp_nf; +extern compop_func op_83b_0_comp_nf; +extern compop_func op_840_0_comp_nf; +extern compop_func op_850_0_comp_nf; +extern compop_func op_858_0_comp_nf; +extern compop_func op_860_0_comp_nf; +extern compop_func op_868_0_comp_nf; +extern compop_func op_870_0_comp_nf; +extern compop_func op_878_0_comp_nf; +extern compop_func op_879_0_comp_nf; +extern compop_func op_880_0_comp_nf; +extern compop_func op_890_0_comp_nf; +extern compop_func op_898_0_comp_nf; +extern compop_func op_8a0_0_comp_nf; +extern compop_func op_8a8_0_comp_nf; +extern compop_func op_8b0_0_comp_nf; +extern compop_func op_8b8_0_comp_nf; +extern compop_func op_8b9_0_comp_nf; +extern compop_func op_8c0_0_comp_nf; +extern compop_func op_8d0_0_comp_nf; +extern compop_func op_8d8_0_comp_nf; +extern compop_func op_8e0_0_comp_nf; +extern compop_func op_8e8_0_comp_nf; +extern compop_func op_8f0_0_comp_nf; +extern compop_func op_8f8_0_comp_nf; +extern compop_func op_8f9_0_comp_nf; +extern compop_func op_a00_0_comp_nf; +extern compop_func op_a10_0_comp_nf; +extern compop_func op_a18_0_comp_nf; +extern compop_func op_a20_0_comp_nf; +extern compop_func op_a28_0_comp_nf; +extern compop_func op_a30_0_comp_nf; +extern compop_func op_a38_0_comp_nf; +extern compop_func op_a39_0_comp_nf; +extern compop_func op_a40_0_comp_nf; +extern compop_func op_a50_0_comp_nf; +extern compop_func op_a58_0_comp_nf; +extern compop_func op_a60_0_comp_nf; +extern compop_func op_a68_0_comp_nf; +extern compop_func op_a70_0_comp_nf; +extern compop_func op_a78_0_comp_nf; +extern compop_func op_a79_0_comp_nf; +extern compop_func op_a80_0_comp_nf; +extern compop_func op_a90_0_comp_nf; +extern compop_func op_a98_0_comp_nf; +extern compop_func op_aa0_0_comp_nf; +extern compop_func op_aa8_0_comp_nf; +extern compop_func op_ab0_0_comp_nf; +extern compop_func op_ab8_0_comp_nf; +extern compop_func op_ab9_0_comp_nf; +extern compop_func op_c00_0_comp_nf; +extern compop_func op_c10_0_comp_nf; +extern compop_func op_c18_0_comp_nf; +extern compop_func op_c20_0_comp_nf; +extern compop_func op_c28_0_comp_nf; +extern compop_func op_c30_0_comp_nf; +extern compop_func op_c38_0_comp_nf; +extern compop_func op_c39_0_comp_nf; +extern compop_func op_c3a_0_comp_nf; +extern compop_func op_c3b_0_comp_nf; +extern compop_func op_c40_0_comp_nf; +extern compop_func op_c50_0_comp_nf; +extern compop_func op_c58_0_comp_nf; +extern compop_func op_c60_0_comp_nf; +extern compop_func op_c68_0_comp_nf; +extern compop_func op_c70_0_comp_nf; +extern compop_func op_c78_0_comp_nf; +extern compop_func op_c79_0_comp_nf; +extern compop_func op_c7a_0_comp_nf; +extern compop_func op_c7b_0_comp_nf; +extern compop_func op_c80_0_comp_nf; +extern compop_func op_c90_0_comp_nf; +extern compop_func op_c98_0_comp_nf; +extern compop_func op_ca0_0_comp_nf; +extern compop_func op_ca8_0_comp_nf; +extern compop_func op_cb0_0_comp_nf; +extern compop_func op_cb8_0_comp_nf; +extern compop_func op_cb9_0_comp_nf; +extern compop_func op_cba_0_comp_nf; +extern compop_func op_cbb_0_comp_nf; +extern compop_func op_1000_0_comp_nf; +extern compop_func op_1010_0_comp_nf; +extern compop_func op_1018_0_comp_nf; +extern compop_func op_1020_0_comp_nf; +extern compop_func op_1028_0_comp_nf; +extern compop_func op_1030_0_comp_nf; +extern compop_func op_1038_0_comp_nf; +extern compop_func op_1039_0_comp_nf; +extern compop_func op_103a_0_comp_nf; +extern compop_func op_103b_0_comp_nf; +extern compop_func op_103c_0_comp_nf; +extern compop_func op_1080_0_comp_nf; +extern compop_func op_1090_0_comp_nf; +extern compop_func op_1098_0_comp_nf; +extern compop_func op_10a0_0_comp_nf; +extern compop_func op_10a8_0_comp_nf; +extern compop_func op_10b0_0_comp_nf; +extern compop_func op_10b8_0_comp_nf; +extern compop_func op_10b9_0_comp_nf; +extern compop_func op_10ba_0_comp_nf; +extern compop_func op_10bb_0_comp_nf; +extern compop_func op_10bc_0_comp_nf; +extern compop_func op_10c0_0_comp_nf; +extern compop_func op_10d0_0_comp_nf; +extern compop_func op_10d8_0_comp_nf; +extern compop_func op_10e0_0_comp_nf; +extern compop_func op_10e8_0_comp_nf; +extern compop_func op_10f0_0_comp_nf; +extern compop_func op_10f8_0_comp_nf; +extern compop_func op_10f9_0_comp_nf; +extern compop_func op_10fa_0_comp_nf; +extern compop_func op_10fb_0_comp_nf; +extern compop_func op_10fc_0_comp_nf; +extern compop_func op_1100_0_comp_nf; +extern compop_func op_1110_0_comp_nf; +extern compop_func op_1118_0_comp_nf; +extern compop_func op_1120_0_comp_nf; +extern compop_func op_1128_0_comp_nf; +extern compop_func op_1130_0_comp_nf; +extern compop_func op_1138_0_comp_nf; +extern compop_func op_1139_0_comp_nf; +extern compop_func op_113a_0_comp_nf; +extern compop_func op_113b_0_comp_nf; +extern compop_func op_113c_0_comp_nf; +extern compop_func op_1140_0_comp_nf; +extern compop_func op_1150_0_comp_nf; +extern compop_func op_1158_0_comp_nf; +extern compop_func op_1160_0_comp_nf; +extern compop_func op_1168_0_comp_nf; +extern compop_func op_1170_0_comp_nf; +extern compop_func op_1178_0_comp_nf; +extern compop_func op_1179_0_comp_nf; +extern compop_func op_117a_0_comp_nf; +extern compop_func op_117b_0_comp_nf; +extern compop_func op_117c_0_comp_nf; +extern compop_func op_1180_0_comp_nf; +extern compop_func op_1190_0_comp_nf; +extern compop_func op_1198_0_comp_nf; +extern compop_func op_11a0_0_comp_nf; +extern compop_func op_11a8_0_comp_nf; +extern compop_func op_11b0_0_comp_nf; +extern compop_func op_11b8_0_comp_nf; +extern compop_func op_11b9_0_comp_nf; +extern compop_func op_11ba_0_comp_nf; +extern compop_func op_11bb_0_comp_nf; +extern compop_func op_11bc_0_comp_nf; +extern compop_func op_11c0_0_comp_nf; +extern compop_func op_11d0_0_comp_nf; +extern compop_func op_11d8_0_comp_nf; +extern compop_func op_11e0_0_comp_nf; +extern compop_func op_11e8_0_comp_nf; +extern compop_func op_11f0_0_comp_nf; +extern compop_func op_11f8_0_comp_nf; +extern compop_func op_11f9_0_comp_nf; +extern compop_func op_11fa_0_comp_nf; +extern compop_func op_11fb_0_comp_nf; +extern compop_func op_11fc_0_comp_nf; +extern compop_func op_13c0_0_comp_nf; +extern compop_func op_13d0_0_comp_nf; +extern compop_func op_13d8_0_comp_nf; +extern compop_func op_13e0_0_comp_nf; +extern compop_func op_13e8_0_comp_nf; +extern compop_func op_13f0_0_comp_nf; +extern compop_func op_13f8_0_comp_nf; +extern compop_func op_13f9_0_comp_nf; +extern compop_func op_13fa_0_comp_nf; +extern compop_func op_13fb_0_comp_nf; +extern compop_func op_13fc_0_comp_nf; +extern compop_func op_2000_0_comp_nf; +extern compop_func op_2008_0_comp_nf; +extern compop_func op_2010_0_comp_nf; +extern compop_func op_2018_0_comp_nf; +extern compop_func op_2020_0_comp_nf; +extern compop_func op_2028_0_comp_nf; +extern compop_func op_2030_0_comp_nf; +extern compop_func op_2038_0_comp_nf; +extern compop_func op_2039_0_comp_nf; +extern compop_func op_203a_0_comp_nf; +extern compop_func op_203b_0_comp_nf; +extern compop_func op_203c_0_comp_nf; +extern compop_func op_2040_0_comp_nf; +extern compop_func op_2048_0_comp_nf; +extern compop_func op_2050_0_comp_nf; +extern compop_func op_2058_0_comp_nf; +extern compop_func op_2060_0_comp_nf; +extern compop_func op_2068_0_comp_nf; +extern compop_func op_2070_0_comp_nf; +extern compop_func op_2078_0_comp_nf; +extern compop_func op_2079_0_comp_nf; +extern compop_func op_207a_0_comp_nf; +extern compop_func op_207b_0_comp_nf; +extern compop_func op_207c_0_comp_nf; +extern compop_func op_2080_0_comp_nf; +extern compop_func op_2088_0_comp_nf; +extern compop_func op_2090_0_comp_nf; +extern compop_func op_2098_0_comp_nf; +extern compop_func op_20a0_0_comp_nf; +extern compop_func op_20a8_0_comp_nf; +extern compop_func op_20b0_0_comp_nf; +extern compop_func op_20b8_0_comp_nf; +extern compop_func op_20b9_0_comp_nf; +extern compop_func op_20ba_0_comp_nf; +extern compop_func op_20bb_0_comp_nf; +extern compop_func op_20bc_0_comp_nf; +extern compop_func op_20c0_0_comp_nf; +extern compop_func op_20c8_0_comp_nf; +extern compop_func op_20d0_0_comp_nf; +extern compop_func op_20d8_0_comp_nf; +extern compop_func op_20e0_0_comp_nf; +extern compop_func op_20e8_0_comp_nf; +extern compop_func op_20f0_0_comp_nf; +extern compop_func op_20f8_0_comp_nf; +extern compop_func op_20f9_0_comp_nf; +extern compop_func op_20fa_0_comp_nf; +extern compop_func op_20fb_0_comp_nf; +extern compop_func op_20fc_0_comp_nf; +extern compop_func op_2100_0_comp_nf; +extern compop_func op_2108_0_comp_nf; +extern compop_func op_2110_0_comp_nf; +extern compop_func op_2118_0_comp_nf; +extern compop_func op_2120_0_comp_nf; +extern compop_func op_2128_0_comp_nf; +extern compop_func op_2130_0_comp_nf; +extern compop_func op_2138_0_comp_nf; +extern compop_func op_2139_0_comp_nf; +extern compop_func op_213a_0_comp_nf; +extern compop_func op_213b_0_comp_nf; +extern compop_func op_213c_0_comp_nf; +extern compop_func op_2140_0_comp_nf; +extern compop_func op_2148_0_comp_nf; +extern compop_func op_2150_0_comp_nf; +extern compop_func op_2158_0_comp_nf; +extern compop_func op_2160_0_comp_nf; +extern compop_func op_2168_0_comp_nf; +extern compop_func op_2170_0_comp_nf; +extern compop_func op_2178_0_comp_nf; +extern compop_func op_2179_0_comp_nf; +extern compop_func op_217a_0_comp_nf; +extern compop_func op_217b_0_comp_nf; +extern compop_func op_217c_0_comp_nf; +extern compop_func op_2180_0_comp_nf; +extern compop_func op_2188_0_comp_nf; +extern compop_func op_2190_0_comp_nf; +extern compop_func op_2198_0_comp_nf; +extern compop_func op_21a0_0_comp_nf; +extern compop_func op_21a8_0_comp_nf; +extern compop_func op_21b0_0_comp_nf; +extern compop_func op_21b8_0_comp_nf; +extern compop_func op_21b9_0_comp_nf; +extern compop_func op_21ba_0_comp_nf; +extern compop_func op_21bb_0_comp_nf; +extern compop_func op_21bc_0_comp_nf; +extern compop_func op_21c0_0_comp_nf; +extern compop_func op_21c8_0_comp_nf; +extern compop_func op_21d0_0_comp_nf; +extern compop_func op_21d8_0_comp_nf; +extern compop_func op_21e0_0_comp_nf; +extern compop_func op_21e8_0_comp_nf; +extern compop_func op_21f0_0_comp_nf; +extern compop_func op_21f8_0_comp_nf; +extern compop_func op_21f9_0_comp_nf; +extern compop_func op_21fa_0_comp_nf; +extern compop_func op_21fb_0_comp_nf; +extern compop_func op_21fc_0_comp_nf; +extern compop_func op_23c0_0_comp_nf; +extern compop_func op_23c8_0_comp_nf; +extern compop_func op_23d0_0_comp_nf; +extern compop_func op_23d8_0_comp_nf; +extern compop_func op_23e0_0_comp_nf; +extern compop_func op_23e8_0_comp_nf; +extern compop_func op_23f0_0_comp_nf; +extern compop_func op_23f8_0_comp_nf; +extern compop_func op_23f9_0_comp_nf; +extern compop_func op_23fa_0_comp_nf; +extern compop_func op_23fb_0_comp_nf; +extern compop_func op_23fc_0_comp_nf; +extern compop_func op_3000_0_comp_nf; +extern compop_func op_3008_0_comp_nf; +extern compop_func op_3010_0_comp_nf; +extern compop_func op_3018_0_comp_nf; +extern compop_func op_3020_0_comp_nf; +extern compop_func op_3028_0_comp_nf; +extern compop_func op_3030_0_comp_nf; +extern compop_func op_3038_0_comp_nf; +extern compop_func op_3039_0_comp_nf; +extern compop_func op_303a_0_comp_nf; +extern compop_func op_303b_0_comp_nf; +extern compop_func op_303c_0_comp_nf; +extern compop_func op_3040_0_comp_nf; +extern compop_func op_3048_0_comp_nf; +extern compop_func op_3050_0_comp_nf; +extern compop_func op_3058_0_comp_nf; +extern compop_func op_3060_0_comp_nf; +extern compop_func op_3068_0_comp_nf; +extern compop_func op_3070_0_comp_nf; +extern compop_func op_3078_0_comp_nf; +extern compop_func op_3079_0_comp_nf; +extern compop_func op_307a_0_comp_nf; +extern compop_func op_307b_0_comp_nf; +extern compop_func op_307c_0_comp_nf; +extern compop_func op_3080_0_comp_nf; +extern compop_func op_3088_0_comp_nf; +extern compop_func op_3090_0_comp_nf; +extern compop_func op_3098_0_comp_nf; +extern compop_func op_30a0_0_comp_nf; +extern compop_func op_30a8_0_comp_nf; +extern compop_func op_30b0_0_comp_nf; +extern compop_func op_30b8_0_comp_nf; +extern compop_func op_30b9_0_comp_nf; +extern compop_func op_30ba_0_comp_nf; +extern compop_func op_30bb_0_comp_nf; +extern compop_func op_30bc_0_comp_nf; +extern compop_func op_30c0_0_comp_nf; +extern compop_func op_30c8_0_comp_nf; +extern compop_func op_30d0_0_comp_nf; +extern compop_func op_30d8_0_comp_nf; +extern compop_func op_30e0_0_comp_nf; +extern compop_func op_30e8_0_comp_nf; +extern compop_func op_30f0_0_comp_nf; +extern compop_func op_30f8_0_comp_nf; +extern compop_func op_30f9_0_comp_nf; +extern compop_func op_30fa_0_comp_nf; +extern compop_func op_30fb_0_comp_nf; +extern compop_func op_30fc_0_comp_nf; +extern compop_func op_3100_0_comp_nf; +extern compop_func op_3108_0_comp_nf; +extern compop_func op_3110_0_comp_nf; +extern compop_func op_3118_0_comp_nf; +extern compop_func op_3120_0_comp_nf; +extern compop_func op_3128_0_comp_nf; +extern compop_func op_3130_0_comp_nf; +extern compop_func op_3138_0_comp_nf; +extern compop_func op_3139_0_comp_nf; +extern compop_func op_313a_0_comp_nf; +extern compop_func op_313b_0_comp_nf; +extern compop_func op_313c_0_comp_nf; +extern compop_func op_3140_0_comp_nf; +extern compop_func op_3148_0_comp_nf; +extern compop_func op_3150_0_comp_nf; +extern compop_func op_3158_0_comp_nf; +extern compop_func op_3160_0_comp_nf; +extern compop_func op_3168_0_comp_nf; +extern compop_func op_3170_0_comp_nf; +extern compop_func op_3178_0_comp_nf; +extern compop_func op_3179_0_comp_nf; +extern compop_func op_317a_0_comp_nf; +extern compop_func op_317b_0_comp_nf; +extern compop_func op_317c_0_comp_nf; +extern compop_func op_3180_0_comp_nf; +extern compop_func op_3188_0_comp_nf; +extern compop_func op_3190_0_comp_nf; +extern compop_func op_3198_0_comp_nf; +extern compop_func op_31a0_0_comp_nf; +extern compop_func op_31a8_0_comp_nf; +extern compop_func op_31b0_0_comp_nf; +extern compop_func op_31b8_0_comp_nf; +extern compop_func op_31b9_0_comp_nf; +extern compop_func op_31ba_0_comp_nf; +extern compop_func op_31bb_0_comp_nf; +extern compop_func op_31bc_0_comp_nf; +extern compop_func op_31c0_0_comp_nf; +extern compop_func op_31c8_0_comp_nf; +extern compop_func op_31d0_0_comp_nf; +extern compop_func op_31d8_0_comp_nf; +extern compop_func op_31e0_0_comp_nf; +extern compop_func op_31e8_0_comp_nf; +extern compop_func op_31f0_0_comp_nf; +extern compop_func op_31f8_0_comp_nf; +extern compop_func op_31f9_0_comp_nf; +extern compop_func op_31fa_0_comp_nf; +extern compop_func op_31fb_0_comp_nf; +extern compop_func op_31fc_0_comp_nf; +extern compop_func op_33c0_0_comp_nf; +extern compop_func op_33c8_0_comp_nf; +extern compop_func op_33d0_0_comp_nf; +extern compop_func op_33d8_0_comp_nf; +extern compop_func op_33e0_0_comp_nf; +extern compop_func op_33e8_0_comp_nf; +extern compop_func op_33f0_0_comp_nf; +extern compop_func op_33f8_0_comp_nf; +extern compop_func op_33f9_0_comp_nf; +extern compop_func op_33fa_0_comp_nf; +extern compop_func op_33fb_0_comp_nf; +extern compop_func op_33fc_0_comp_nf; +extern compop_func op_4000_0_comp_nf; +extern compop_func op_4010_0_comp_nf; +extern compop_func op_4018_0_comp_nf; +extern compop_func op_4020_0_comp_nf; +extern compop_func op_4028_0_comp_nf; +extern compop_func op_4030_0_comp_nf; +extern compop_func op_4038_0_comp_nf; +extern compop_func op_4039_0_comp_nf; +extern compop_func op_4040_0_comp_nf; +extern compop_func op_4050_0_comp_nf; +extern compop_func op_4058_0_comp_nf; +extern compop_func op_4060_0_comp_nf; +extern compop_func op_4068_0_comp_nf; +extern compop_func op_4070_0_comp_nf; +extern compop_func op_4078_0_comp_nf; +extern compop_func op_4079_0_comp_nf; +extern compop_func op_4080_0_comp_nf; +extern compop_func op_4090_0_comp_nf; +extern compop_func op_4098_0_comp_nf; +extern compop_func op_40a0_0_comp_nf; +extern compop_func op_40a8_0_comp_nf; +extern compop_func op_40b0_0_comp_nf; +extern compop_func op_40b8_0_comp_nf; +extern compop_func op_40b9_0_comp_nf; +extern compop_func op_41d0_0_comp_nf; +extern compop_func op_41e8_0_comp_nf; +extern compop_func op_41f0_0_comp_nf; +extern compop_func op_41f8_0_comp_nf; +extern compop_func op_41f9_0_comp_nf; +extern compop_func op_41fa_0_comp_nf; +extern compop_func op_41fb_0_comp_nf; +extern compop_func op_4200_0_comp_nf; +extern compop_func op_4210_0_comp_nf; +extern compop_func op_4218_0_comp_nf; +extern compop_func op_4220_0_comp_nf; +extern compop_func op_4228_0_comp_nf; +extern compop_func op_4230_0_comp_nf; +extern compop_func op_4238_0_comp_nf; +extern compop_func op_4239_0_comp_nf; +extern compop_func op_4240_0_comp_nf; +extern compop_func op_4250_0_comp_nf; +extern compop_func op_4258_0_comp_nf; +extern compop_func op_4260_0_comp_nf; +extern compop_func op_4268_0_comp_nf; +extern compop_func op_4270_0_comp_nf; +extern compop_func op_4278_0_comp_nf; +extern compop_func op_4279_0_comp_nf; +extern compop_func op_4280_0_comp_nf; +extern compop_func op_4290_0_comp_nf; +extern compop_func op_4298_0_comp_nf; +extern compop_func op_42a0_0_comp_nf; +extern compop_func op_42a8_0_comp_nf; +extern compop_func op_42b0_0_comp_nf; +extern compop_func op_42b8_0_comp_nf; +extern compop_func op_42b9_0_comp_nf; +extern compop_func op_4400_0_comp_nf; +extern compop_func op_4410_0_comp_nf; +extern compop_func op_4418_0_comp_nf; +extern compop_func op_4420_0_comp_nf; +extern compop_func op_4428_0_comp_nf; +extern compop_func op_4430_0_comp_nf; +extern compop_func op_4438_0_comp_nf; +extern compop_func op_4439_0_comp_nf; +extern compop_func op_4440_0_comp_nf; +extern compop_func op_4450_0_comp_nf; +extern compop_func op_4458_0_comp_nf; +extern compop_func op_4460_0_comp_nf; +extern compop_func op_4468_0_comp_nf; +extern compop_func op_4470_0_comp_nf; +extern compop_func op_4478_0_comp_nf; +extern compop_func op_4479_0_comp_nf; +extern compop_func op_4480_0_comp_nf; +extern compop_func op_4490_0_comp_nf; +extern compop_func op_4498_0_comp_nf; +extern compop_func op_44a0_0_comp_nf; +extern compop_func op_44a8_0_comp_nf; +extern compop_func op_44b0_0_comp_nf; +extern compop_func op_44b8_0_comp_nf; +extern compop_func op_44b9_0_comp_nf; +extern compop_func op_4600_0_comp_nf; +extern compop_func op_4610_0_comp_nf; +extern compop_func op_4618_0_comp_nf; +extern compop_func op_4620_0_comp_nf; +extern compop_func op_4628_0_comp_nf; +extern compop_func op_4630_0_comp_nf; +extern compop_func op_4638_0_comp_nf; +extern compop_func op_4639_0_comp_nf; +extern compop_func op_4640_0_comp_nf; +extern compop_func op_4650_0_comp_nf; +extern compop_func op_4658_0_comp_nf; +extern compop_func op_4660_0_comp_nf; +extern compop_func op_4668_0_comp_nf; +extern compop_func op_4670_0_comp_nf; +extern compop_func op_4678_0_comp_nf; +extern compop_func op_4679_0_comp_nf; +extern compop_func op_4680_0_comp_nf; +extern compop_func op_4690_0_comp_nf; +extern compop_func op_4698_0_comp_nf; +extern compop_func op_46a0_0_comp_nf; +extern compop_func op_46a8_0_comp_nf; +extern compop_func op_46b0_0_comp_nf; +extern compop_func op_46b8_0_comp_nf; +extern compop_func op_46b9_0_comp_nf; +extern compop_func op_4808_0_comp_nf; +extern compop_func op_4840_0_comp_nf; +extern compop_func op_4850_0_comp_nf; +extern compop_func op_4868_0_comp_nf; +extern compop_func op_4870_0_comp_nf; +extern compop_func op_4878_0_comp_nf; +extern compop_func op_4879_0_comp_nf; +extern compop_func op_487a_0_comp_nf; +extern compop_func op_487b_0_comp_nf; +extern compop_func op_4880_0_comp_nf; +extern compop_func op_4890_0_comp_nf; +extern compop_func op_48a0_0_comp_nf; +extern compop_func op_48a8_0_comp_nf; +extern compop_func op_48b0_0_comp_nf; +extern compop_func op_48b8_0_comp_nf; +extern compop_func op_48b9_0_comp_nf; +extern compop_func op_48c0_0_comp_nf; +extern compop_func op_48d0_0_comp_nf; +extern compop_func op_48e0_0_comp_nf; +extern compop_func op_48e8_0_comp_nf; +extern compop_func op_48f0_0_comp_nf; +extern compop_func op_48f8_0_comp_nf; +extern compop_func op_48f9_0_comp_nf; +extern compop_func op_49c0_0_comp_nf; +extern compop_func op_4a00_0_comp_nf; +extern compop_func op_4a10_0_comp_nf; +extern compop_func op_4a18_0_comp_nf; +extern compop_func op_4a20_0_comp_nf; +extern compop_func op_4a28_0_comp_nf; +extern compop_func op_4a30_0_comp_nf; +extern compop_func op_4a38_0_comp_nf; +extern compop_func op_4a39_0_comp_nf; +extern compop_func op_4a3a_0_comp_nf; +extern compop_func op_4a3b_0_comp_nf; +extern compop_func op_4a3c_0_comp_nf; +extern compop_func op_4a40_0_comp_nf; +extern compop_func op_4a48_0_comp_nf; +extern compop_func op_4a50_0_comp_nf; +extern compop_func op_4a58_0_comp_nf; +extern compop_func op_4a60_0_comp_nf; +extern compop_func op_4a68_0_comp_nf; +extern compop_func op_4a70_0_comp_nf; +extern compop_func op_4a78_0_comp_nf; +extern compop_func op_4a79_0_comp_nf; +extern compop_func op_4a7a_0_comp_nf; +extern compop_func op_4a7b_0_comp_nf; +extern compop_func op_4a7c_0_comp_nf; +extern compop_func op_4a80_0_comp_nf; +extern compop_func op_4a88_0_comp_nf; +extern compop_func op_4a90_0_comp_nf; +extern compop_func op_4a98_0_comp_nf; +extern compop_func op_4aa0_0_comp_nf; +extern compop_func op_4aa8_0_comp_nf; +extern compop_func op_4ab0_0_comp_nf; +extern compop_func op_4ab8_0_comp_nf; +extern compop_func op_4ab9_0_comp_nf; +extern compop_func op_4aba_0_comp_nf; +extern compop_func op_4abb_0_comp_nf; +extern compop_func op_4abc_0_comp_nf; +extern compop_func op_4c00_0_comp_nf; +extern compop_func op_4c10_0_comp_nf; +extern compop_func op_4c18_0_comp_nf; +extern compop_func op_4c20_0_comp_nf; +extern compop_func op_4c28_0_comp_nf; +extern compop_func op_4c30_0_comp_nf; +extern compop_func op_4c38_0_comp_nf; +extern compop_func op_4c39_0_comp_nf; +extern compop_func op_4c3a_0_comp_nf; +extern compop_func op_4c3b_0_comp_nf; +extern compop_func op_4c3c_0_comp_nf; +extern compop_func op_4c90_0_comp_nf; +extern compop_func op_4c98_0_comp_nf; +extern compop_func op_4ca8_0_comp_nf; +extern compop_func op_4cb0_0_comp_nf; +extern compop_func op_4cb8_0_comp_nf; +extern compop_func op_4cb9_0_comp_nf; +extern compop_func op_4cba_0_comp_nf; +extern compop_func op_4cbb_0_comp_nf; +extern compop_func op_4cd0_0_comp_nf; +extern compop_func op_4cd8_0_comp_nf; +extern compop_func op_4ce8_0_comp_nf; +extern compop_func op_4cf0_0_comp_nf; +extern compop_func op_4cf8_0_comp_nf; +extern compop_func op_4cf9_0_comp_nf; +extern compop_func op_4cfa_0_comp_nf; +extern compop_func op_4cfb_0_comp_nf; +extern compop_func op_4e50_0_comp_nf; +extern compop_func op_4e58_0_comp_nf; +extern compop_func op_4e71_0_comp_nf; +extern compop_func op_4e74_0_comp_nf; +extern compop_func op_4e75_0_comp_nf; +extern compop_func op_4e90_0_comp_nf; +extern compop_func op_4ea8_0_comp_nf; +extern compop_func op_4eb0_0_comp_nf; +extern compop_func op_4eb8_0_comp_nf; +extern compop_func op_4eb9_0_comp_nf; +extern compop_func op_4eba_0_comp_nf; +extern compop_func op_4ebb_0_comp_nf; +extern compop_func op_4ed0_0_comp_nf; +extern compop_func op_4ee8_0_comp_nf; +extern compop_func op_4ef0_0_comp_nf; +extern compop_func op_4ef8_0_comp_nf; +extern compop_func op_4ef9_0_comp_nf; +extern compop_func op_4efa_0_comp_nf; +extern compop_func op_4efb_0_comp_nf; +extern compop_func op_5000_0_comp_nf; +extern compop_func op_5010_0_comp_nf; +extern compop_func op_5018_0_comp_nf; +extern compop_func op_5020_0_comp_nf; +extern compop_func op_5028_0_comp_nf; +extern compop_func op_5030_0_comp_nf; +extern compop_func op_5038_0_comp_nf; +extern compop_func op_5039_0_comp_nf; +extern compop_func op_5040_0_comp_nf; +extern compop_func op_5048_0_comp_nf; +extern compop_func op_5050_0_comp_nf; +extern compop_func op_5058_0_comp_nf; +extern compop_func op_5060_0_comp_nf; +extern compop_func op_5068_0_comp_nf; +extern compop_func op_5070_0_comp_nf; +extern compop_func op_5078_0_comp_nf; +extern compop_func op_5079_0_comp_nf; +extern compop_func op_5080_0_comp_nf; +extern compop_func op_5088_0_comp_nf; +extern compop_func op_5090_0_comp_nf; +extern compop_func op_5098_0_comp_nf; +extern compop_func op_50a0_0_comp_nf; +extern compop_func op_50a8_0_comp_nf; +extern compop_func op_50b0_0_comp_nf; +extern compop_func op_50b8_0_comp_nf; +extern compop_func op_50b9_0_comp_nf; +extern compop_func op_50c0_0_comp_nf; +extern compop_func op_50c8_0_comp_nf; +extern compop_func op_50d0_0_comp_nf; +extern compop_func op_50d8_0_comp_nf; +extern compop_func op_50e0_0_comp_nf; +extern compop_func op_50e8_0_comp_nf; +extern compop_func op_50f0_0_comp_nf; +extern compop_func op_50f8_0_comp_nf; +extern compop_func op_50f9_0_comp_nf; +extern compop_func op_5100_0_comp_nf; +extern compop_func op_5110_0_comp_nf; +extern compop_func op_5118_0_comp_nf; +extern compop_func op_5120_0_comp_nf; +extern compop_func op_5128_0_comp_nf; +extern compop_func op_5130_0_comp_nf; +extern compop_func op_5138_0_comp_nf; +extern compop_func op_5139_0_comp_nf; +extern compop_func op_5140_0_comp_nf; +extern compop_func op_5148_0_comp_nf; +extern compop_func op_5150_0_comp_nf; +extern compop_func op_5158_0_comp_nf; +extern compop_func op_5160_0_comp_nf; +extern compop_func op_5168_0_comp_nf; +extern compop_func op_5170_0_comp_nf; +extern compop_func op_5178_0_comp_nf; +extern compop_func op_5179_0_comp_nf; +extern compop_func op_5180_0_comp_nf; +extern compop_func op_5188_0_comp_nf; +extern compop_func op_5190_0_comp_nf; +extern compop_func op_5198_0_comp_nf; +extern compop_func op_51a0_0_comp_nf; +extern compop_func op_51a8_0_comp_nf; +extern compop_func op_51b0_0_comp_nf; +extern compop_func op_51b8_0_comp_nf; +extern compop_func op_51b9_0_comp_nf; +extern compop_func op_51c0_0_comp_nf; +extern compop_func op_51c8_0_comp_nf; +extern compop_func op_51d0_0_comp_nf; +extern compop_func op_51d8_0_comp_nf; +extern compop_func op_51e0_0_comp_nf; +extern compop_func op_51e8_0_comp_nf; +extern compop_func op_51f0_0_comp_nf; +extern compop_func op_51f8_0_comp_nf; +extern compop_func op_51f9_0_comp_nf; +extern compop_func op_52c0_0_comp_nf; +extern compop_func op_52c8_0_comp_nf; +extern compop_func op_52d0_0_comp_nf; +extern compop_func op_52d8_0_comp_nf; +extern compop_func op_52e0_0_comp_nf; +extern compop_func op_52e8_0_comp_nf; +extern compop_func op_52f0_0_comp_nf; +extern compop_func op_52f8_0_comp_nf; +extern compop_func op_52f9_0_comp_nf; +extern compop_func op_53c0_0_comp_nf; +extern compop_func op_53c8_0_comp_nf; +extern compop_func op_53d0_0_comp_nf; +extern compop_func op_53d8_0_comp_nf; +extern compop_func op_53e0_0_comp_nf; +extern compop_func op_53e8_0_comp_nf; +extern compop_func op_53f0_0_comp_nf; +extern compop_func op_53f8_0_comp_nf; +extern compop_func op_53f9_0_comp_nf; +extern compop_func op_54c0_0_comp_nf; +extern compop_func op_54c8_0_comp_nf; +extern compop_func op_54d0_0_comp_nf; +extern compop_func op_54d8_0_comp_nf; +extern compop_func op_54e0_0_comp_nf; +extern compop_func op_54e8_0_comp_nf; +extern compop_func op_54f0_0_comp_nf; +extern compop_func op_54f8_0_comp_nf; +extern compop_func op_54f9_0_comp_nf; +extern compop_func op_55c0_0_comp_nf; +extern compop_func op_55c8_0_comp_nf; +extern compop_func op_55d0_0_comp_nf; +extern compop_func op_55d8_0_comp_nf; +extern compop_func op_55e0_0_comp_nf; +extern compop_func op_55e8_0_comp_nf; +extern compop_func op_55f0_0_comp_nf; +extern compop_func op_55f8_0_comp_nf; +extern compop_func op_55f9_0_comp_nf; +extern compop_func op_56c0_0_comp_nf; +extern compop_func op_56c8_0_comp_nf; +extern compop_func op_56d0_0_comp_nf; +extern compop_func op_56d8_0_comp_nf; +extern compop_func op_56e0_0_comp_nf; +extern compop_func op_56e8_0_comp_nf; +extern compop_func op_56f0_0_comp_nf; +extern compop_func op_56f8_0_comp_nf; +extern compop_func op_56f9_0_comp_nf; +extern compop_func op_57c0_0_comp_nf; +extern compop_func op_57c8_0_comp_nf; +extern compop_func op_57d0_0_comp_nf; +extern compop_func op_57d8_0_comp_nf; +extern compop_func op_57e0_0_comp_nf; +extern compop_func op_57e8_0_comp_nf; +extern compop_func op_57f0_0_comp_nf; +extern compop_func op_57f8_0_comp_nf; +extern compop_func op_57f9_0_comp_nf; +extern compop_func op_5ac0_0_comp_nf; +extern compop_func op_5ac8_0_comp_nf; +extern compop_func op_5ad0_0_comp_nf; +extern compop_func op_5ad8_0_comp_nf; +extern compop_func op_5ae0_0_comp_nf; +extern compop_func op_5ae8_0_comp_nf; +extern compop_func op_5af0_0_comp_nf; +extern compop_func op_5af8_0_comp_nf; +extern compop_func op_5af9_0_comp_nf; +extern compop_func op_5bc0_0_comp_nf; +extern compop_func op_5bc8_0_comp_nf; +extern compop_func op_5bd0_0_comp_nf; +extern compop_func op_5bd8_0_comp_nf; +extern compop_func op_5be0_0_comp_nf; +extern compop_func op_5be8_0_comp_nf; +extern compop_func op_5bf0_0_comp_nf; +extern compop_func op_5bf8_0_comp_nf; +extern compop_func op_5bf9_0_comp_nf; +extern compop_func op_5cc0_0_comp_nf; +extern compop_func op_5cc8_0_comp_nf; +extern compop_func op_5cd0_0_comp_nf; +extern compop_func op_5cd8_0_comp_nf; +extern compop_func op_5ce0_0_comp_nf; +extern compop_func op_5ce8_0_comp_nf; +extern compop_func op_5cf0_0_comp_nf; +extern compop_func op_5cf8_0_comp_nf; +extern compop_func op_5cf9_0_comp_nf; +extern compop_func op_5dc0_0_comp_nf; +extern compop_func op_5dc8_0_comp_nf; +extern compop_func op_5dd0_0_comp_nf; +extern compop_func op_5dd8_0_comp_nf; +extern compop_func op_5de0_0_comp_nf; +extern compop_func op_5de8_0_comp_nf; +extern compop_func op_5df0_0_comp_nf; +extern compop_func op_5df8_0_comp_nf; +extern compop_func op_5df9_0_comp_nf; +extern compop_func op_5ec0_0_comp_nf; +extern compop_func op_5ec8_0_comp_nf; +extern compop_func op_5ed0_0_comp_nf; +extern compop_func op_5ed8_0_comp_nf; +extern compop_func op_5ee0_0_comp_nf; +extern compop_func op_5ee8_0_comp_nf; +extern compop_func op_5ef0_0_comp_nf; +extern compop_func op_5ef8_0_comp_nf; +extern compop_func op_5ef9_0_comp_nf; +extern compop_func op_5fc0_0_comp_nf; +extern compop_func op_5fc8_0_comp_nf; +extern compop_func op_5fd0_0_comp_nf; +extern compop_func op_5fd8_0_comp_nf; +extern compop_func op_5fe0_0_comp_nf; +extern compop_func op_5fe8_0_comp_nf; +extern compop_func op_5ff0_0_comp_nf; +extern compop_func op_5ff8_0_comp_nf; +extern compop_func op_5ff9_0_comp_nf; +extern compop_func op_6000_0_comp_nf; +extern compop_func op_6001_0_comp_nf; +extern compop_func op_60ff_0_comp_nf; +extern compop_func op_6100_0_comp_nf; +extern compop_func op_6101_0_comp_nf; +extern compop_func op_61ff_0_comp_nf; +extern compop_func op_6200_0_comp_nf; +extern compop_func op_6201_0_comp_nf; +extern compop_func op_62ff_0_comp_nf; +extern compop_func op_6300_0_comp_nf; +extern compop_func op_6301_0_comp_nf; +extern compop_func op_63ff_0_comp_nf; +extern compop_func op_6400_0_comp_nf; +extern compop_func op_6401_0_comp_nf; +extern compop_func op_64ff_0_comp_nf; +extern compop_func op_6500_0_comp_nf; +extern compop_func op_6501_0_comp_nf; +extern compop_func op_65ff_0_comp_nf; +extern compop_func op_6600_0_comp_nf; +extern compop_func op_6601_0_comp_nf; +extern compop_func op_66ff_0_comp_nf; +extern compop_func op_6700_0_comp_nf; +extern compop_func op_6701_0_comp_nf; +extern compop_func op_67ff_0_comp_nf; +extern compop_func op_6a00_0_comp_nf; +extern compop_func op_6a01_0_comp_nf; +extern compop_func op_6aff_0_comp_nf; +extern compop_func op_6b00_0_comp_nf; +extern compop_func op_6b01_0_comp_nf; +extern compop_func op_6bff_0_comp_nf; +extern compop_func op_6c00_0_comp_nf; +extern compop_func op_6c01_0_comp_nf; +extern compop_func op_6cff_0_comp_nf; +extern compop_func op_6d00_0_comp_nf; +extern compop_func op_6d01_0_comp_nf; +extern compop_func op_6dff_0_comp_nf; +extern compop_func op_6e00_0_comp_nf; +extern compop_func op_6e01_0_comp_nf; +extern compop_func op_6eff_0_comp_nf; +extern compop_func op_6f00_0_comp_nf; +extern compop_func op_6f01_0_comp_nf; +extern compop_func op_6fff_0_comp_nf; +extern compop_func op_7000_0_comp_nf; +extern compop_func op_8000_0_comp_nf; +extern compop_func op_8010_0_comp_nf; +extern compop_func op_8018_0_comp_nf; +extern compop_func op_8020_0_comp_nf; +extern compop_func op_8028_0_comp_nf; +extern compop_func op_8030_0_comp_nf; +extern compop_func op_8038_0_comp_nf; +extern compop_func op_8039_0_comp_nf; +extern compop_func op_803a_0_comp_nf; +extern compop_func op_803b_0_comp_nf; +extern compop_func op_803c_0_comp_nf; +extern compop_func op_8040_0_comp_nf; +extern compop_func op_8050_0_comp_nf; +extern compop_func op_8058_0_comp_nf; +extern compop_func op_8060_0_comp_nf; +extern compop_func op_8068_0_comp_nf; +extern compop_func op_8070_0_comp_nf; +extern compop_func op_8078_0_comp_nf; +extern compop_func op_8079_0_comp_nf; +extern compop_func op_807a_0_comp_nf; +extern compop_func op_807b_0_comp_nf; +extern compop_func op_807c_0_comp_nf; +extern compop_func op_8080_0_comp_nf; +extern compop_func op_8090_0_comp_nf; +extern compop_func op_8098_0_comp_nf; +extern compop_func op_80a0_0_comp_nf; +extern compop_func op_80a8_0_comp_nf; +extern compop_func op_80b0_0_comp_nf; +extern compop_func op_80b8_0_comp_nf; +extern compop_func op_80b9_0_comp_nf; +extern compop_func op_80ba_0_comp_nf; +extern compop_func op_80bb_0_comp_nf; +extern compop_func op_80bc_0_comp_nf; +extern compop_func op_8110_0_comp_nf; +extern compop_func op_8118_0_comp_nf; +extern compop_func op_8120_0_comp_nf; +extern compop_func op_8128_0_comp_nf; +extern compop_func op_8130_0_comp_nf; +extern compop_func op_8138_0_comp_nf; +extern compop_func op_8139_0_comp_nf; +extern compop_func op_8150_0_comp_nf; +extern compop_func op_8158_0_comp_nf; +extern compop_func op_8160_0_comp_nf; +extern compop_func op_8168_0_comp_nf; +extern compop_func op_8170_0_comp_nf; +extern compop_func op_8178_0_comp_nf; +extern compop_func op_8179_0_comp_nf; +extern compop_func op_8190_0_comp_nf; +extern compop_func op_8198_0_comp_nf; +extern compop_func op_81a0_0_comp_nf; +extern compop_func op_81a8_0_comp_nf; +extern compop_func op_81b0_0_comp_nf; +extern compop_func op_81b8_0_comp_nf; +extern compop_func op_81b9_0_comp_nf; +extern compop_func op_9000_0_comp_nf; +extern compop_func op_9010_0_comp_nf; +extern compop_func op_9018_0_comp_nf; +extern compop_func op_9020_0_comp_nf; +extern compop_func op_9028_0_comp_nf; +extern compop_func op_9030_0_comp_nf; +extern compop_func op_9038_0_comp_nf; +extern compop_func op_9039_0_comp_nf; +extern compop_func op_903a_0_comp_nf; +extern compop_func op_903b_0_comp_nf; +extern compop_func op_903c_0_comp_nf; +extern compop_func op_9040_0_comp_nf; +extern compop_func op_9048_0_comp_nf; +extern compop_func op_9050_0_comp_nf; +extern compop_func op_9058_0_comp_nf; +extern compop_func op_9060_0_comp_nf; +extern compop_func op_9068_0_comp_nf; +extern compop_func op_9070_0_comp_nf; +extern compop_func op_9078_0_comp_nf; +extern compop_func op_9079_0_comp_nf; +extern compop_func op_907a_0_comp_nf; +extern compop_func op_907b_0_comp_nf; +extern compop_func op_907c_0_comp_nf; +extern compop_func op_9080_0_comp_nf; +extern compop_func op_9088_0_comp_nf; +extern compop_func op_9090_0_comp_nf; +extern compop_func op_9098_0_comp_nf; +extern compop_func op_90a0_0_comp_nf; +extern compop_func op_90a8_0_comp_nf; +extern compop_func op_90b0_0_comp_nf; +extern compop_func op_90b8_0_comp_nf; +extern compop_func op_90b9_0_comp_nf; +extern compop_func op_90ba_0_comp_nf; +extern compop_func op_90bb_0_comp_nf; +extern compop_func op_90bc_0_comp_nf; +extern compop_func op_90c0_0_comp_nf; +extern compop_func op_90c8_0_comp_nf; +extern compop_func op_90d0_0_comp_nf; +extern compop_func op_90d8_0_comp_nf; +extern compop_func op_90e0_0_comp_nf; +extern compop_func op_90e8_0_comp_nf; +extern compop_func op_90f0_0_comp_nf; +extern compop_func op_90f8_0_comp_nf; +extern compop_func op_90f9_0_comp_nf; +extern compop_func op_90fa_0_comp_nf; +extern compop_func op_90fb_0_comp_nf; +extern compop_func op_90fc_0_comp_nf; +extern compop_func op_9100_0_comp_nf; +extern compop_func op_9108_0_comp_nf; +extern compop_func op_9110_0_comp_nf; +extern compop_func op_9118_0_comp_nf; +extern compop_func op_9120_0_comp_nf; +extern compop_func op_9128_0_comp_nf; +extern compop_func op_9130_0_comp_nf; +extern compop_func op_9138_0_comp_nf; +extern compop_func op_9139_0_comp_nf; +extern compop_func op_9140_0_comp_nf; +extern compop_func op_9148_0_comp_nf; +extern compop_func op_9150_0_comp_nf; +extern compop_func op_9158_0_comp_nf; +extern compop_func op_9160_0_comp_nf; +extern compop_func op_9168_0_comp_nf; +extern compop_func op_9170_0_comp_nf; +extern compop_func op_9178_0_comp_nf; +extern compop_func op_9179_0_comp_nf; +extern compop_func op_9180_0_comp_nf; +extern compop_func op_9188_0_comp_nf; +extern compop_func op_9190_0_comp_nf; +extern compop_func op_9198_0_comp_nf; +extern compop_func op_91a0_0_comp_nf; +extern compop_func op_91a8_0_comp_nf; +extern compop_func op_91b0_0_comp_nf; +extern compop_func op_91b8_0_comp_nf; +extern compop_func op_91b9_0_comp_nf; +extern compop_func op_91c0_0_comp_nf; +extern compop_func op_91c8_0_comp_nf; +extern compop_func op_91d0_0_comp_nf; +extern compop_func op_91d8_0_comp_nf; +extern compop_func op_91e0_0_comp_nf; +extern compop_func op_91e8_0_comp_nf; +extern compop_func op_91f0_0_comp_nf; +extern compop_func op_91f8_0_comp_nf; +extern compop_func op_91f9_0_comp_nf; +extern compop_func op_91fa_0_comp_nf; +extern compop_func op_91fb_0_comp_nf; +extern compop_func op_91fc_0_comp_nf; +extern compop_func op_b000_0_comp_nf; +extern compop_func op_b010_0_comp_nf; +extern compop_func op_b018_0_comp_nf; +extern compop_func op_b020_0_comp_nf; +extern compop_func op_b028_0_comp_nf; +extern compop_func op_b030_0_comp_nf; +extern compop_func op_b038_0_comp_nf; +extern compop_func op_b039_0_comp_nf; +extern compop_func op_b03a_0_comp_nf; +extern compop_func op_b03b_0_comp_nf; +extern compop_func op_b03c_0_comp_nf; +extern compop_func op_b040_0_comp_nf; +extern compop_func op_b048_0_comp_nf; +extern compop_func op_b050_0_comp_nf; +extern compop_func op_b058_0_comp_nf; +extern compop_func op_b060_0_comp_nf; +extern compop_func op_b068_0_comp_nf; +extern compop_func op_b070_0_comp_nf; +extern compop_func op_b078_0_comp_nf; +extern compop_func op_b079_0_comp_nf; +extern compop_func op_b07a_0_comp_nf; +extern compop_func op_b07b_0_comp_nf; +extern compop_func op_b07c_0_comp_nf; +extern compop_func op_b080_0_comp_nf; +extern compop_func op_b088_0_comp_nf; +extern compop_func op_b090_0_comp_nf; +extern compop_func op_b098_0_comp_nf; +extern compop_func op_b0a0_0_comp_nf; +extern compop_func op_b0a8_0_comp_nf; +extern compop_func op_b0b0_0_comp_nf; +extern compop_func op_b0b8_0_comp_nf; +extern compop_func op_b0b9_0_comp_nf; +extern compop_func op_b0ba_0_comp_nf; +extern compop_func op_b0bb_0_comp_nf; +extern compop_func op_b0bc_0_comp_nf; +extern compop_func op_b0c0_0_comp_nf; +extern compop_func op_b0c8_0_comp_nf; +extern compop_func op_b0d0_0_comp_nf; +extern compop_func op_b0d8_0_comp_nf; +extern compop_func op_b0e0_0_comp_nf; +extern compop_func op_b0e8_0_comp_nf; +extern compop_func op_b0f0_0_comp_nf; +extern compop_func op_b0f8_0_comp_nf; +extern compop_func op_b0f9_0_comp_nf; +extern compop_func op_b0fa_0_comp_nf; +extern compop_func op_b0fb_0_comp_nf; +extern compop_func op_b0fc_0_comp_nf; +extern compop_func op_b100_0_comp_nf; +extern compop_func op_b108_0_comp_nf; +extern compop_func op_b110_0_comp_nf; +extern compop_func op_b118_0_comp_nf; +extern compop_func op_b120_0_comp_nf; +extern compop_func op_b128_0_comp_nf; +extern compop_func op_b130_0_comp_nf; +extern compop_func op_b138_0_comp_nf; +extern compop_func op_b139_0_comp_nf; +extern compop_func op_b140_0_comp_nf; +extern compop_func op_b148_0_comp_nf; +extern compop_func op_b150_0_comp_nf; +extern compop_func op_b158_0_comp_nf; +extern compop_func op_b160_0_comp_nf; +extern compop_func op_b168_0_comp_nf; +extern compop_func op_b170_0_comp_nf; +extern compop_func op_b178_0_comp_nf; +extern compop_func op_b179_0_comp_nf; +extern compop_func op_b180_0_comp_nf; +extern compop_func op_b188_0_comp_nf; +extern compop_func op_b190_0_comp_nf; +extern compop_func op_b198_0_comp_nf; +extern compop_func op_b1a0_0_comp_nf; +extern compop_func op_b1a8_0_comp_nf; +extern compop_func op_b1b0_0_comp_nf; +extern compop_func op_b1b8_0_comp_nf; +extern compop_func op_b1b9_0_comp_nf; +extern compop_func op_b1c0_0_comp_nf; +extern compop_func op_b1c8_0_comp_nf; +extern compop_func op_b1d0_0_comp_nf; +extern compop_func op_b1d8_0_comp_nf; +extern compop_func op_b1e0_0_comp_nf; +extern compop_func op_b1e8_0_comp_nf; +extern compop_func op_b1f0_0_comp_nf; +extern compop_func op_b1f8_0_comp_nf; +extern compop_func op_b1f9_0_comp_nf; +extern compop_func op_b1fa_0_comp_nf; +extern compop_func op_b1fb_0_comp_nf; +extern compop_func op_b1fc_0_comp_nf; +extern compop_func op_c000_0_comp_nf; +extern compop_func op_c010_0_comp_nf; +extern compop_func op_c018_0_comp_nf; +extern compop_func op_c020_0_comp_nf; +extern compop_func op_c028_0_comp_nf; +extern compop_func op_c030_0_comp_nf; +extern compop_func op_c038_0_comp_nf; +extern compop_func op_c039_0_comp_nf; +extern compop_func op_c03a_0_comp_nf; +extern compop_func op_c03b_0_comp_nf; +extern compop_func op_c03c_0_comp_nf; +extern compop_func op_c040_0_comp_nf; +extern compop_func op_c050_0_comp_nf; +extern compop_func op_c058_0_comp_nf; +extern compop_func op_c060_0_comp_nf; +extern compop_func op_c068_0_comp_nf; +extern compop_func op_c070_0_comp_nf; +extern compop_func op_c078_0_comp_nf; +extern compop_func op_c079_0_comp_nf; +extern compop_func op_c07a_0_comp_nf; +extern compop_func op_c07b_0_comp_nf; +extern compop_func op_c07c_0_comp_nf; +extern compop_func op_c080_0_comp_nf; +extern compop_func op_c090_0_comp_nf; +extern compop_func op_c098_0_comp_nf; +extern compop_func op_c0a0_0_comp_nf; +extern compop_func op_c0a8_0_comp_nf; +extern compop_func op_c0b0_0_comp_nf; +extern compop_func op_c0b8_0_comp_nf; +extern compop_func op_c0b9_0_comp_nf; +extern compop_func op_c0ba_0_comp_nf; +extern compop_func op_c0bb_0_comp_nf; +extern compop_func op_c0bc_0_comp_nf; +extern compop_func op_c0c0_0_comp_nf; +extern compop_func op_c0d0_0_comp_nf; +extern compop_func op_c0d8_0_comp_nf; +extern compop_func op_c0e0_0_comp_nf; +extern compop_func op_c0e8_0_comp_nf; +extern compop_func op_c0f0_0_comp_nf; +extern compop_func op_c0f8_0_comp_nf; +extern compop_func op_c0f9_0_comp_nf; +extern compop_func op_c0fa_0_comp_nf; +extern compop_func op_c0fb_0_comp_nf; +extern compop_func op_c0fc_0_comp_nf; +extern compop_func op_c110_0_comp_nf; +extern compop_func op_c118_0_comp_nf; +extern compop_func op_c120_0_comp_nf; +extern compop_func op_c128_0_comp_nf; +extern compop_func op_c130_0_comp_nf; +extern compop_func op_c138_0_comp_nf; +extern compop_func op_c139_0_comp_nf; +extern compop_func op_c140_0_comp_nf; +extern compop_func op_c148_0_comp_nf; +extern compop_func op_c150_0_comp_nf; +extern compop_func op_c158_0_comp_nf; +extern compop_func op_c160_0_comp_nf; +extern compop_func op_c168_0_comp_nf; +extern compop_func op_c170_0_comp_nf; +extern compop_func op_c178_0_comp_nf; +extern compop_func op_c179_0_comp_nf; +extern compop_func op_c188_0_comp_nf; +extern compop_func op_c190_0_comp_nf; +extern compop_func op_c198_0_comp_nf; +extern compop_func op_c1a0_0_comp_nf; +extern compop_func op_c1a8_0_comp_nf; +extern compop_func op_c1b0_0_comp_nf; +extern compop_func op_c1b8_0_comp_nf; +extern compop_func op_c1b9_0_comp_nf; +extern compop_func op_c1c0_0_comp_nf; +extern compop_func op_c1d0_0_comp_nf; +extern compop_func op_c1d8_0_comp_nf; +extern compop_func op_c1e0_0_comp_nf; +extern compop_func op_c1e8_0_comp_nf; +extern compop_func op_c1f0_0_comp_nf; +extern compop_func op_c1f8_0_comp_nf; +extern compop_func op_c1f9_0_comp_nf; +extern compop_func op_c1fa_0_comp_nf; +extern compop_func op_c1fb_0_comp_nf; +extern compop_func op_c1fc_0_comp_nf; +extern compop_func op_d000_0_comp_nf; +extern compop_func op_d010_0_comp_nf; +extern compop_func op_d018_0_comp_nf; +extern compop_func op_d020_0_comp_nf; +extern compop_func op_d028_0_comp_nf; +extern compop_func op_d030_0_comp_nf; +extern compop_func op_d038_0_comp_nf; +extern compop_func op_d039_0_comp_nf; +extern compop_func op_d03a_0_comp_nf; +extern compop_func op_d03b_0_comp_nf; +extern compop_func op_d03c_0_comp_nf; +extern compop_func op_d040_0_comp_nf; +extern compop_func op_d048_0_comp_nf; +extern compop_func op_d050_0_comp_nf; +extern compop_func op_d058_0_comp_nf; +extern compop_func op_d060_0_comp_nf; +extern compop_func op_d068_0_comp_nf; +extern compop_func op_d070_0_comp_nf; +extern compop_func op_d078_0_comp_nf; +extern compop_func op_d079_0_comp_nf; +extern compop_func op_d07a_0_comp_nf; +extern compop_func op_d07b_0_comp_nf; +extern compop_func op_d07c_0_comp_nf; +extern compop_func op_d080_0_comp_nf; +extern compop_func op_d088_0_comp_nf; +extern compop_func op_d090_0_comp_nf; +extern compop_func op_d098_0_comp_nf; +extern compop_func op_d0a0_0_comp_nf; +extern compop_func op_d0a8_0_comp_nf; +extern compop_func op_d0b0_0_comp_nf; +extern compop_func op_d0b8_0_comp_nf; +extern compop_func op_d0b9_0_comp_nf; +extern compop_func op_d0ba_0_comp_nf; +extern compop_func op_d0bb_0_comp_nf; +extern compop_func op_d0bc_0_comp_nf; +extern compop_func op_d0c0_0_comp_nf; +extern compop_func op_d0c8_0_comp_nf; +extern compop_func op_d0d0_0_comp_nf; +extern compop_func op_d0d8_0_comp_nf; +extern compop_func op_d0e0_0_comp_nf; +extern compop_func op_d0e8_0_comp_nf; +extern compop_func op_d0f0_0_comp_nf; +extern compop_func op_d0f8_0_comp_nf; +extern compop_func op_d0f9_0_comp_nf; +extern compop_func op_d0fa_0_comp_nf; +extern compop_func op_d0fb_0_comp_nf; +extern compop_func op_d0fc_0_comp_nf; +extern compop_func op_d100_0_comp_nf; +extern compop_func op_d108_0_comp_nf; +extern compop_func op_d110_0_comp_nf; +extern compop_func op_d118_0_comp_nf; +extern compop_func op_d120_0_comp_nf; +extern compop_func op_d128_0_comp_nf; +extern compop_func op_d130_0_comp_nf; +extern compop_func op_d138_0_comp_nf; +extern compop_func op_d139_0_comp_nf; +extern compop_func op_d140_0_comp_nf; +extern compop_func op_d148_0_comp_nf; +extern compop_func op_d150_0_comp_nf; +extern compop_func op_d158_0_comp_nf; +extern compop_func op_d160_0_comp_nf; +extern compop_func op_d168_0_comp_nf; +extern compop_func op_d170_0_comp_nf; +extern compop_func op_d178_0_comp_nf; +extern compop_func op_d179_0_comp_nf; +extern compop_func op_d180_0_comp_nf; +extern compop_func op_d188_0_comp_nf; +extern compop_func op_d190_0_comp_nf; +extern compop_func op_d198_0_comp_nf; +extern compop_func op_d1a0_0_comp_nf; +extern compop_func op_d1a8_0_comp_nf; +extern compop_func op_d1b0_0_comp_nf; +extern compop_func op_d1b8_0_comp_nf; +extern compop_func op_d1b9_0_comp_nf; +extern compop_func op_d1c0_0_comp_nf; +extern compop_func op_d1c8_0_comp_nf; +extern compop_func op_d1d0_0_comp_nf; +extern compop_func op_d1d8_0_comp_nf; +extern compop_func op_d1e0_0_comp_nf; +extern compop_func op_d1e8_0_comp_nf; +extern compop_func op_d1f0_0_comp_nf; +extern compop_func op_d1f8_0_comp_nf; +extern compop_func op_d1f9_0_comp_nf; +extern compop_func op_d1fa_0_comp_nf; +extern compop_func op_d1fb_0_comp_nf; +extern compop_func op_d1fc_0_comp_nf; +extern compop_func op_e000_0_comp_nf; +extern compop_func op_e008_0_comp_nf; +extern compop_func op_e018_0_comp_nf; +extern compop_func op_e020_0_comp_nf; +extern compop_func op_e028_0_comp_nf; +extern compop_func op_e038_0_comp_nf; +extern compop_func op_e040_0_comp_nf; +extern compop_func op_e048_0_comp_nf; +extern compop_func op_e058_0_comp_nf; +extern compop_func op_e060_0_comp_nf; +extern compop_func op_e068_0_comp_nf; +extern compop_func op_e078_0_comp_nf; +extern compop_func op_e080_0_comp_nf; +extern compop_func op_e088_0_comp_nf; +extern compop_func op_e098_0_comp_nf; +extern compop_func op_e0a0_0_comp_nf; +extern compop_func op_e0a8_0_comp_nf; +extern compop_func op_e0b8_0_comp_nf; +extern compop_func op_e100_0_comp_nf; +extern compop_func op_e108_0_comp_nf; +extern compop_func op_e118_0_comp_nf; +extern compop_func op_e120_0_comp_nf; +extern compop_func op_e128_0_comp_nf; +extern compop_func op_e138_0_comp_nf; +extern compop_func op_e140_0_comp_nf; +extern compop_func op_e148_0_comp_nf; +extern compop_func op_e158_0_comp_nf; +extern compop_func op_e160_0_comp_nf; +extern compop_func op_e168_0_comp_nf; +extern compop_func op_e178_0_comp_nf; +extern compop_func op_e180_0_comp_nf; +extern compop_func op_e188_0_comp_nf; +extern compop_func op_e198_0_comp_nf; +extern compop_func op_e1a0_0_comp_nf; +extern compop_func op_e1a8_0_comp_nf; +extern compop_func op_e1b8_0_comp_nf; +extern compop_func op_f200_0_comp_nf; +extern compop_func op_f208_0_comp_nf; +extern compop_func op_f210_0_comp_nf; +extern compop_func op_f218_0_comp_nf; +extern compop_func op_f220_0_comp_nf; +extern compop_func op_f228_0_comp_nf; +extern compop_func op_f230_0_comp_nf; +extern compop_func op_f238_0_comp_nf; +extern compop_func op_f239_0_comp_nf; +extern compop_func op_f23a_0_comp_nf; +extern compop_func op_f23b_0_comp_nf; +extern compop_func op_f23c_0_comp_nf; +extern compop_func op_f240_0_comp_nf; +extern compop_func op_f250_0_comp_nf; +extern compop_func op_f258_0_comp_nf; +extern compop_func op_f260_0_comp_nf; +extern compop_func op_f268_0_comp_nf; +extern compop_func op_f270_0_comp_nf; +extern compop_func op_f278_0_comp_nf; +extern compop_func op_f279_0_comp_nf; +extern compop_func op_f280_0_comp_nf; +extern compop_func op_f2c0_0_comp_nf; +extern compop_func op_f600_0_comp_nf; +extern compop_func op_f608_0_comp_nf; +extern compop_func op_f610_0_comp_nf; +extern compop_func op_f618_0_comp_nf; +extern compop_func op_f620_0_comp_nf; diff --git a/linetoscr.cpp b/linetoscr.cpp new file mode 100644 index 00000000..e2388f38 --- /dev/null +++ b/linetoscr.cpp @@ -0,0 +1,21120 @@ +/* + * UAE - The portable Amiga emulator. + * + * This file was generated by genlinetoscr. Don't edit. + */ + +static int NOINLINE linetoscr_16(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_stretch1(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_stretch1_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_stretch2(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_stretch2_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink1(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink1_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink1f(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink1f_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink2(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink2_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink2f(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink2f_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_stretch1_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_stretch1_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_stretch2_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_stretch2_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink1_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink1_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink1f_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink1f_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink2_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink2_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink2f_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_16_shrink2f_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +#ifdef AGA +static int NOINLINE linetoscr_16_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch1_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch2_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1f_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2f_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_aga(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch1_aga(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch1_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch2_aga(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch2_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1_aga(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1f_aga(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1f_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2_aga(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2f_aga(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2f_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_HAM: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + case CMODE_EXTRAHB: + { + int rem; + if (((uintptr_t)&buf[dpix]) & 2) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + if (dpix >= dpix_end) + return spix; + rem = (((uintptr_t)&buf[dpix_end]) & 2); + if (rem) + dpix_end--; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = (out_val & 0xFFFF) | (dpix_val << 16); + *((uae_u32 *)&buf[dpix]) = out_val; + dpix += 2; + } + if (rem) { + uae_u32 spix_val; + uae_u32 dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + buf[dpix++] = dpix_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch1_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 1, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch1_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 1, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch2_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 1, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 1, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 1, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_stretch2_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + genlock_buf[dpix + 2] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + genlock_buf[dpix + 3] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + genlock_buf[dpix + 2] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + genlock_buf[dpix + 3] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 1, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 1, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + genlock_buf[dpix + 2] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 1, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + genlock_buf[dpix + 3] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + genlock_buf[dpix + 2] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + genlock_buf[dpix + 3] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1f_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink1f_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel16 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2f_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_16_shrink2f_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u16 *buf = (uae_u16 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel16 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel16 (tmp_val3, dpix_val); + dpix_val = merge_2pixel16 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +static int NOINLINE linetoscr_32(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_stretch1(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_stretch1_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_stretch2(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_stretch2_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink1(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink1_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink1f(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink1f_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink2(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink2_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink2f(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink2f_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_stretch1_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_stretch1_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_stretch2_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_stretch2_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + + genlock_buf[dpix + 2] = genlock_buf[dpix]; + + genlock_buf[dpix + 3] = genlock_buf[dpix]; + + } + } + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink1_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink1_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink1f_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink1f_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink2_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink2_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink2f_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +static int NOINLINE linetoscr_32_shrink2f_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = p_xcolors[spix_val]; + sprpix_val = pixdata.apixels[spix]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 15); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2 : dblpf_ind1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[lookup[spix_val]]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 1, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + if (spix_val <= 31) + dpix_val = p_acolors[spix_val]; + else + dpix_val = p_xcolors[(colors_for_drawing.color_regs_ecs[spix_val - 32] >> 1) & 0x777]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB_ECS_KILLEHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + dpix_val = p_acolors[spix_val & 31]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix, 0, sprpix_val, 0); + if (sprcol) { + uae_u32 spcol = p_acolors[sprcol]; + out_val = spcol; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} + +#ifdef AGA +static int NOINLINE linetoscr_32_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch1_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch2_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1f_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2f_aga_spronly(int spix, int dpix, int dpix_end, int blank) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + + if (1) { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 out_val; + + sprpix_val = 0; + spix++; + out_val = blank ? 0 : p_acolors[0]; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_aga(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch1_aga(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch1_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch2_aga(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch2_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1_aga(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1f_aga(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1f_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2_aga(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2f_aga(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2f_aga_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch1_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 1, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch1_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 1, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + } + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch2_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 1, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 1, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 1, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_stretch2_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + genlock_buf[dpix + 2] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + genlock_buf[dpix + 3] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + genlock_buf[dpix + 2] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + genlock_buf[dpix + 3] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 1, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 1, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + genlock_buf[dpix + 2] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 1, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + genlock_buf[dpix + 3] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + genlock_buf[dpix + 1] = genlock_buf[dpix]; + genlock_buf[dpix + 2] = genlock_buf[dpix]; + genlock_buf[dpix + 3] = genlock_buf[dpix]; + { + uae_u32 out_val1 = out_val; + uae_u32 out_val2 = out_val; + uae_u32 out_val3 = out_val; + uae_u32 out_val4 = out_val; + if (spritepixels[dpix + 0].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val1 = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + if (spritepixels[dpix + 1].data) { + sprcol = render_sprites (dpix + 1, 0, sprpix_val, 1); + if (sprcol) { + out_val2 = p_acolors[sprcol]; + genlock_buf[dpix + 1] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 2].data) { + sprcol = render_sprites (dpix + 2, 0, sprpix_val, 1); + if (sprcol) { + out_val3 = p_acolors[sprcol]; + genlock_buf[dpix + 2] = get_genlock_transparency(sprcol); + + } + } + if (spritepixels[dpix + 3].data) { + sprcol = render_sprites (dpix + 3, 0, sprpix_val, 1); + if (sprcol) { + out_val4 = p_acolors[sprcol]; + genlock_buf[dpix + 3] = get_genlock_transparency(sprcol); + + } + } + buf[dpix++] = out_val1; + buf[dpix++] = out_val2; + buf[dpix++] = out_val3; + buf[dpix++] = out_val4; + } + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 2; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1f_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink1f_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + dpix_val = merge_2pixel32 (dpix_val, tmp_val); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix += 4; + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2f_aga_spr(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif + +#ifdef AGA +static int NOINLINE linetoscr_32_shrink2f_aga_spr_genlock(int spix, int dpix, int dpix_end) +{ + uae_u32 *buf = (uae_u32 *) xlinebuffer; + uae_u8 *genlock_buf = xlinebuffer_genlock; + uae_u8 sprcol; + uae_u8 xor_val = bplxor; + uae_u8 and_val = bpland; + + switch(bplmode) + { + case CMODE_NORMAL: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_HAM: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = ham_linebuf[spix]; + dpix_val = CONVERT_RGB (spix_val); + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency((spix_val >> 2) & 63); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_DUALPF: + { + int *lookup = bpldualpfpri ? dblpf_ind2_aga : dblpf_ind1_aga; + int *lookup_no = bpldualpfpri ? dblpf_2nd2 : dblpf_2nd1; + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val2 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + spix++; + tmp_val3 = dpix_val; + spix_val = pixdata.apixels[spix]; + sprpix_val = spix_val; + { + uae_u8 val = lookup[spix_val]; + if (lookup_no[spix_val]) + val += dblpfofs[bpldualpf2of]; + val ^= xor_val; + dpix_val = p_acolors[val]; + } + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(lookup[spix_val]); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 1, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + case CMODE_EXTRAHB: + { + while (dpix < dpix_end) { + uae_u32 sprpix_val; + uae_u32 spix_val; + uae_u32 dpix_val; + uae_u32 out_val; + + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + { + uae_u32 tmp_val, tmp_val2, tmp_val3; + spix++; + tmp_val = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val2 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + spix++; + tmp_val3 = dpix_val; + sprpix_val = pixdata.apixels[spix]; + spix_val = (pixdata.apixels[spix] ^ xor_val) & and_val; + if (pixdata.apixels[spix] & 0x20) { + unsigned int c = (colors_for_drawing.color_regs_aga[spix_val & 0x1f] >> 1) & 0x7F7F7F; + dpix_val = CONVERT_RGB (c); + } else + dpix_val = p_acolors[spix_val]; + tmp_val = merge_2pixel32 (tmp_val, tmp_val2); + tmp_val2 = merge_2pixel32 (tmp_val3, dpix_val); + dpix_val = merge_2pixel32 (tmp_val, tmp_val2); + spix++; + } + out_val = dpix_val; + genlock_buf[dpix] = get_genlock_transparency(spix_val & 31); + if (spritepixels[dpix].data) { + sprcol = render_sprites (dpix + 0, 0, sprpix_val, 1); + if (sprcol) { + out_val = p_acolors[sprcol]; + genlock_buf[dpix] = get_genlock_transparency(sprcol); + } + } + buf[dpix++] = out_val; + } + } + break; + } + + return spix; +} +#endif +